2006.231.08:37:21.29:Log Opened: Mark IV Field System Version 9.7.7 2006.231.08:37:21.30:location,TSUKUB32,-140.09,36.10,61.0 2006.231.08:37:21.30:horizon1,0.,5.,360. 2006.231.08:37:21.31:antenna,32.0,180.0,180.0,10.0,710.0,5.0,88.0,azel 2006.231.08:37:21.31:equip,k42c/mk4,vlbab,vlbab,mk4,500.10,3,a/d,101,60,20,none,41,1,in,8bit,cdp,3 2006.231.08:37:21.31:drivev11,330,270,no 2006.231.08:37:21.32:drivev12,mvme117,0,11.400,2548.000,152.780,-6.655,0.014,152,10.000,54500 2006.231.08:37:21.32:drivev13,15.000,268,10.000,10.000,10.000 2006.231.08:37:21.32:drivev21,330,270,no 2006.231.08:37:21.33:drivev22,mvme117,0,11.500,2821.000,127.500,-8.640,0.015,152,14.000,54500 2006.231.08:37:21.33:drivev23,15.000,268,10.000,10.000,10.000 2006.231.08:37:21.37:head10,all,all,all,odd,adaptive,no,5.0000,1 2006.231.08:37:21.38:head11,131.5,16.4,-291.0,131.5,16.4,0.8,168.30,168.30 2006.231.08:37:21.38:head12,122.8,13.9,-150.8,122.8,14.7,2.5,167.61,167.61 2006.231.08:37:21.38:head20,all,all,all,odd,adaptive,no,5.0000,1 2006.231.08:37:21.39:head21,145.3,16.1,-209.3,137.2,16.1,58.9,165.28,165.28 2006.231.08:37:21.39:head22,157.5,17.4,-203.7,149.2,16.6,56.5,169.73,169.73 2006.231.08:37:21.39:time,-0.364,101.533,rate 2006.231.08:37:21.40:flagr,200 2006.231.08:37:21.40:proc=k06232ts 2006.231.08:37:21.40:" k06232 2006 tsukub32 t ts 2006.231.08:37:21.41:" t tsukub32 azel .0000 180.0 14 10.0 710.0 180.0 14 5.0 88.0 32.0 ts 108 2006.231.08:37:21.41:" ts tsukub32 -3957408.75120 3310229.34660 3737494.83600 73452301 2006.231.08:37:21.46:" 108 tsukub32 14 17400 2006.231.08:37:21.46:" drudg version 050216 compiled under fs 9.7.07 2006.231.08:37:21.46:" rack=k4-2/m4 recorder 1=k5 recorder 2=none 2006.231.08:37:21.47:!2006.232.06:29:50 2006.232.06:29:50.00:sy=/usr2/oper/k5/bin/freeze_chk.pl & 2006.232.06:29:50.03:!2006.232.07:19:50 2006.232.07:19:50.00:unstow 2006.232.07:19:50.00&unstow/antenna=e 2006.232.07:19:50.00&unstow/!+10s 2006.232.07:19:50.00&unstow/antenna=m2 2006.232.07:20:02.01:scan_name=232-0730,k06232,60 2006.232.07:20:02.01:source=3c418,203837.03,511912.7,2000.0,ccw 2006.232.07:20:03.14#antcn#PM 1 00019 2005 228 00 22 31 00 2006.232.07:20:03.14#antcn#PM 2 90.0000 1 0 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 2006.232.07:20:03.14#antcn#PM 2 -0.0279715 0.0000000 -0.0282214 -0.0241630 -0.0014011 2006.232.07:20:03.14#antcn#PM 3 -0.0059899 0.0042895 -0.0643783 0.0000000 0.0000000 2006.232.07:20:03.14#antcn#PM 4 0.0000000 0.0000000 0.0000000 0.0000000 0.0000000 2006.232.07:20:03.14#antcn#PM 5 0.0000000 0.0000000 0.0000000 0.0000000 0.0000000 2006.232.07:20:04.14:ready_k5 2006.232.07:20:04.14&ready_k5/obsinfo=st 2006.232.07:20:04.14&ready_k5/autoobs=1 2006.232.07:20:04.14&ready_k5/autoobs=2 2006.232.07:20:04.14&ready_k5/autoobs=3 2006.232.07:20:04.14&ready_k5/autoobs=4 2006.232.07:20:04.14&ready_k5/obsinfo 2006.232.07:20:04.14#flagr#flagr/antenna,new-source 2006.232.07:20:04.14/obsinfo=st/error_log.tmp was not found (or not removed). 2006.232.07:20:07.39/autoobs//k5ts1/ autoobs started! 2006.232.07:20:10.70/autoobs//k5ts2/ autoobs started! 2006.232.07:20:13.81/autoobs//k5ts3/ autoobs started! 2006.232.07:20:16.92/autoobs//k5ts4/ autoobs started! 2006.232.07:20:16.95/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.232.07:20:16.95:4f8m12a=1 2006.232.07:20:16.95&4f8m12a/xlog=on 2006.232.07:20:16.95&4f8m12a/echo=on 2006.232.07:20:16.95&4f8m12a/pcalon 2006.232.07:20:16.95&4f8m12a/"tpicd=stop 2006.232.07:20:16.95&4f8m12a/vc4f8 2006.232.07:20:16.95&4f8m12a/ifd4f 2006.232.07:20:16.95&4f8m12a/"form=m,16.000,1:2 2006.232.07:20:16.95&4f8m12a/"tpicd 2006.232.07:20:16.95&4f8m12a/echo=off 2006.232.07:20:16.95&4f8m12a/xlog=off 2006.232.07:20:16.95$4f8m12a/echo=on 2006.232.07:20:16.95$4f8m12a/pcalon 2006.232.07:20:16.95&pcalon/"no phase cal control is implemented here 2006.232.07:20:16.95$pcalon/"no phase cal control is implemented here 2006.232.07:20:16.95$4f8m12a/"tpicd=stop 2006.232.07:20:16.95$4f8m12a/vc4f8 2006.232.07:20:16.95&vc4f8/valo=1,532.99 2006.232.07:20:16.95&vc4f8/va=1,8 2006.232.07:20:16.95&vc4f8/valo=2,572.99 2006.232.07:20:16.95&vc4f8/va=2,7 2006.232.07:20:16.95&vc4f8/valo=3,672.99 2006.232.07:20:16.95&vc4f8/va=3,8 2006.232.07:20:16.95&vc4f8/valo=4,832.99 2006.232.07:20:16.95&vc4f8/va=4,7 2006.232.07:20:16.95&vc4f8/valo=5,652.99 2006.232.07:20:16.95&vc4f8/va=5,7 2006.232.07:20:16.95&vc4f8/valo=6,772.99 2006.232.07:20:16.95&vc4f8/va=6,6 2006.232.07:20:16.95&vc4f8/valo=7,832.99 2006.232.07:20:16.95&vc4f8/va=7,6 2006.232.07:20:16.95&vc4f8/valo=8,852.99 2006.232.07:20:16.95&vc4f8/va=8,6 2006.232.07:20:16.95&vc4f8/vblo=1,632.99 2006.232.07:20:16.95&vc4f8/vb=1,4 2006.232.07:20:16.95&vc4f8/vblo=2,640.99 2006.232.07:20:16.95&vc4f8/vb=2,4 2006.232.07:20:16.95&vc4f8/vblo=3,656.99 2006.232.07:20:16.95&vc4f8/vb=3,4 2006.232.07:20:16.95&vc4f8/vblo=4,712.99 2006.232.07:20:16.95&vc4f8/vb=4,4 2006.232.07:20:16.95&vc4f8/vblo=5,744.99 2006.232.07:20:16.95&vc4f8/vb=5,3 2006.232.07:20:16.95&vc4f8/vblo=6,752.99 2006.232.07:20:16.95&vc4f8/vb=6,4 2006.232.07:20:16.95&vc4f8/vabw=wide 2006.232.07:20:16.95&vc4f8/vbbw=wide 2006.232.07:20:16.95$vc4f8/valo=1,532.99 2006.232.07:20:16.95#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.232.07:20:16.95#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.232.07:20:16.95#ibcon#ireg 17 cls_cnt 0 2006.232.07:20:16.95#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:20:16.95#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:20:16.95#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:20:16.95#ibcon#enter wrdev, iclass 28, count 0 2006.232.07:20:16.95#ibcon#first serial, iclass 28, count 0 2006.232.07:20:16.95#ibcon#enter sib2, iclass 28, count 0 2006.232.07:20:16.95#ibcon#flushed, iclass 28, count 0 2006.232.07:20:16.95#ibcon#about to write, iclass 28, count 0 2006.232.07:20:16.95#ibcon#wrote, iclass 28, count 0 2006.232.07:20:16.95#ibcon#about to read 3, iclass 28, count 0 2006.232.07:20:16.98#ibcon#read 3, iclass 28, count 0 2006.232.07:20:16.98#ibcon#about to read 4, iclass 28, count 0 2006.232.07:20:16.98#ibcon#read 4, iclass 28, count 0 2006.232.07:20:16.98#ibcon#about to read 5, iclass 28, count 0 2006.232.07:20:16.98#ibcon#read 5, iclass 28, count 0 2006.232.07:20:16.98#ibcon#about to read 6, iclass 28, count 0 2006.232.07:20:16.98#ibcon#read 6, iclass 28, count 0 2006.232.07:20:16.98#ibcon#end of sib2, iclass 28, count 0 2006.232.07:20:16.98#ibcon#*mode == 0, iclass 28, count 0 2006.232.07:20:16.98#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.232.07:20:16.98#ibcon#[26=FRQ=01,532.99\r\n] 2006.232.07:20:16.98#ibcon#*before write, iclass 28, count 0 2006.232.07:20:16.98#ibcon#enter sib2, iclass 28, count 0 2006.232.07:20:16.98#ibcon#flushed, iclass 28, count 0 2006.232.07:20:16.98#ibcon#about to write, iclass 28, count 0 2006.232.07:20:16.98#ibcon#wrote, iclass 28, count 0 2006.232.07:20:16.98#ibcon#about to read 3, iclass 28, count 0 2006.232.07:20:17.03#ibcon#read 3, iclass 28, count 0 2006.232.07:20:17.03#ibcon#about to read 4, iclass 28, count 0 2006.232.07:20:17.03#ibcon#read 4, iclass 28, count 0 2006.232.07:20:17.03#ibcon#about to read 5, iclass 28, count 0 2006.232.07:20:17.03#ibcon#read 5, iclass 28, count 0 2006.232.07:20:17.03#ibcon#about to read 6, iclass 28, count 0 2006.232.07:20:17.03#ibcon#read 6, iclass 28, count 0 2006.232.07:20:17.03#ibcon#end of sib2, iclass 28, count 0 2006.232.07:20:17.03#ibcon#*after write, iclass 28, count 0 2006.232.07:20:17.03#ibcon#*before return 0, iclass 28, count 0 2006.232.07:20:17.03#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:20:17.03#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:20:17.03#ibcon#about to clear, iclass 28 cls_cnt 0 2006.232.07:20:17.03#ibcon#cleared, iclass 28 cls_cnt 0 2006.232.07:20:17.03$vc4f8/va=1,8 2006.232.07:20:17.03#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.232.07:20:17.03#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.232.07:20:17.03#ibcon#ireg 11 cls_cnt 2 2006.232.07:20:17.03#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:20:17.03#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:20:17.03#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:20:17.03#ibcon#enter wrdev, iclass 30, count 2 2006.232.07:20:17.03#ibcon#first serial, iclass 30, count 2 2006.232.07:20:17.03#ibcon#enter sib2, iclass 30, count 2 2006.232.07:20:17.03#ibcon#flushed, iclass 30, count 2 2006.232.07:20:17.03#ibcon#about to write, iclass 30, count 2 2006.232.07:20:17.03#ibcon#wrote, iclass 30, count 2 2006.232.07:20:17.03#ibcon#about to read 3, iclass 30, count 2 2006.232.07:20:17.06#ibcon#read 3, iclass 30, count 2 2006.232.07:20:17.06#ibcon#about to read 4, iclass 30, count 2 2006.232.07:20:17.06#ibcon#read 4, iclass 30, count 2 2006.232.07:20:17.06#ibcon#about to read 5, iclass 30, count 2 2006.232.07:20:17.06#ibcon#read 5, iclass 30, count 2 2006.232.07:20:17.06#ibcon#about to read 6, iclass 30, count 2 2006.232.07:20:17.06#ibcon#read 6, iclass 30, count 2 2006.232.07:20:17.06#ibcon#end of sib2, iclass 30, count 2 2006.232.07:20:17.06#ibcon#*mode == 0, iclass 30, count 2 2006.232.07:20:17.06#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.232.07:20:17.06#ibcon#[25=AT01-08\r\n] 2006.232.07:20:17.06#ibcon#*before write, iclass 30, count 2 2006.232.07:20:17.06#ibcon#enter sib2, iclass 30, count 2 2006.232.07:20:17.06#ibcon#flushed, iclass 30, count 2 2006.232.07:20:17.06#ibcon#about to write, iclass 30, count 2 2006.232.07:20:17.06#ibcon#wrote, iclass 30, count 2 2006.232.07:20:17.06#ibcon#about to read 3, iclass 30, count 2 2006.232.07:20:17.09#ibcon#read 3, iclass 30, count 2 2006.232.07:20:17.09#ibcon#about to read 4, iclass 30, count 2 2006.232.07:20:17.09#ibcon#read 4, iclass 30, count 2 2006.232.07:20:17.09#ibcon#about to read 5, iclass 30, count 2 2006.232.07:20:17.09#ibcon#read 5, iclass 30, count 2 2006.232.07:20:17.09#ibcon#about to read 6, iclass 30, count 2 2006.232.07:20:17.09#ibcon#read 6, iclass 30, count 2 2006.232.07:20:17.09#ibcon#end of sib2, iclass 30, count 2 2006.232.07:20:17.09#ibcon#*after write, iclass 30, count 2 2006.232.07:20:17.09#ibcon#*before return 0, iclass 30, count 2 2006.232.07:20:17.09#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:20:17.09#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:20:17.09#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.232.07:20:17.09#ibcon#ireg 7 cls_cnt 0 2006.232.07:20:17.09#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:20:17.21#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:20:17.21#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:20:17.21#ibcon#enter wrdev, iclass 30, count 0 2006.232.07:20:17.21#ibcon#first serial, iclass 30, count 0 2006.232.07:20:17.21#ibcon#enter sib2, iclass 30, count 0 2006.232.07:20:17.21#ibcon#flushed, iclass 30, count 0 2006.232.07:20:17.21#ibcon#about to write, iclass 30, count 0 2006.232.07:20:17.21#ibcon#wrote, iclass 30, count 0 2006.232.07:20:17.21#ibcon#about to read 3, iclass 30, count 0 2006.232.07:20:17.24#ibcon#read 3, iclass 30, count 0 2006.232.07:20:17.24#ibcon#about to read 4, iclass 30, count 0 2006.232.07:20:17.24#ibcon#read 4, iclass 30, count 0 2006.232.07:20:17.24#ibcon#about to read 5, iclass 30, count 0 2006.232.07:20:17.24#ibcon#read 5, iclass 30, count 0 2006.232.07:20:17.24#ibcon#about to read 6, iclass 30, count 0 2006.232.07:20:17.24#ibcon#read 6, iclass 30, count 0 2006.232.07:20:17.24#ibcon#end of sib2, iclass 30, count 0 2006.232.07:20:17.24#ibcon#*mode == 0, iclass 30, count 0 2006.232.07:20:17.24#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.232.07:20:17.24#ibcon#[25=USB\r\n] 2006.232.07:20:17.24#ibcon#*before write, iclass 30, count 0 2006.232.07:20:17.24#ibcon#enter sib2, iclass 30, count 0 2006.232.07:20:17.24#ibcon#flushed, iclass 30, count 0 2006.232.07:20:17.24#ibcon#about to write, iclass 30, count 0 2006.232.07:20:17.24#ibcon#wrote, iclass 30, count 0 2006.232.07:20:17.24#ibcon#about to read 3, iclass 30, count 0 2006.232.07:20:17.27#ibcon#read 3, iclass 30, count 0 2006.232.07:20:17.27#ibcon#about to read 4, iclass 30, count 0 2006.232.07:20:17.27#ibcon#read 4, iclass 30, count 0 2006.232.07:20:17.27#ibcon#about to read 5, iclass 30, count 0 2006.232.07:20:17.27#ibcon#read 5, iclass 30, count 0 2006.232.07:20:17.27#ibcon#about to read 6, iclass 30, count 0 2006.232.07:20:17.27#ibcon#read 6, iclass 30, count 0 2006.232.07:20:17.27#ibcon#end of sib2, iclass 30, count 0 2006.232.07:20:17.27#ibcon#*after write, iclass 30, count 0 2006.232.07:20:17.27#ibcon#*before return 0, iclass 30, count 0 2006.232.07:20:17.27#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:20:17.27#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:20:17.27#ibcon#about to clear, iclass 30 cls_cnt 0 2006.232.07:20:17.27#ibcon#cleared, iclass 30 cls_cnt 0 2006.232.07:20:17.27$vc4f8/valo=2,572.99 2006.232.07:20:17.27#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.232.07:20:17.27#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.232.07:20:17.27#ibcon#ireg 17 cls_cnt 0 2006.232.07:20:17.27#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:20:17.27#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:20:17.27#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:20:17.27#ibcon#enter wrdev, iclass 32, count 0 2006.232.07:20:17.27#ibcon#first serial, iclass 32, count 0 2006.232.07:20:17.27#ibcon#enter sib2, iclass 32, count 0 2006.232.07:20:17.27#ibcon#flushed, iclass 32, count 0 2006.232.07:20:17.27#ibcon#about to write, iclass 32, count 0 2006.232.07:20:17.27#ibcon#wrote, iclass 32, count 0 2006.232.07:20:17.27#ibcon#about to read 3, iclass 32, count 0 2006.232.07:20:17.29#ibcon#read 3, iclass 32, count 0 2006.232.07:20:17.29#ibcon#about to read 4, iclass 32, count 0 2006.232.07:20:17.29#ibcon#read 4, iclass 32, count 0 2006.232.07:20:17.29#ibcon#about to read 5, iclass 32, count 0 2006.232.07:20:17.29#ibcon#read 5, iclass 32, count 0 2006.232.07:20:17.29#ibcon#about to read 6, iclass 32, count 0 2006.232.07:20:17.29#ibcon#read 6, iclass 32, count 0 2006.232.07:20:17.29#ibcon#end of sib2, iclass 32, count 0 2006.232.07:20:17.29#ibcon#*mode == 0, iclass 32, count 0 2006.232.07:20:17.29#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.232.07:20:17.29#ibcon#[26=FRQ=02,572.99\r\n] 2006.232.07:20:17.29#ibcon#*before write, iclass 32, count 0 2006.232.07:20:17.29#ibcon#enter sib2, iclass 32, count 0 2006.232.07:20:17.29#ibcon#flushed, iclass 32, count 0 2006.232.07:20:17.29#ibcon#about to write, iclass 32, count 0 2006.232.07:20:17.29#ibcon#wrote, iclass 32, count 0 2006.232.07:20:17.29#ibcon#about to read 3, iclass 32, count 0 2006.232.07:20:17.33#ibcon#read 3, iclass 32, count 0 2006.232.07:20:17.33#ibcon#about to read 4, iclass 32, count 0 2006.232.07:20:17.33#ibcon#read 4, iclass 32, count 0 2006.232.07:20:17.33#ibcon#about to read 5, iclass 32, count 0 2006.232.07:20:17.33#ibcon#read 5, iclass 32, count 0 2006.232.07:20:17.33#ibcon#about to read 6, iclass 32, count 0 2006.232.07:20:17.33#ibcon#read 6, iclass 32, count 0 2006.232.07:20:17.33#ibcon#end of sib2, iclass 32, count 0 2006.232.07:20:17.33#ibcon#*after write, iclass 32, count 0 2006.232.07:20:17.33#ibcon#*before return 0, iclass 32, count 0 2006.232.07:20:17.33#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:20:17.33#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:20:17.33#ibcon#about to clear, iclass 32 cls_cnt 0 2006.232.07:20:17.33#ibcon#cleared, iclass 32 cls_cnt 0 2006.232.07:20:17.33$vc4f8/va=2,7 2006.232.07:20:17.33#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.232.07:20:17.33#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.232.07:20:17.33#ibcon#ireg 11 cls_cnt 2 2006.232.07:20:17.33#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:20:17.39#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:20:17.39#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:20:17.39#ibcon#enter wrdev, iclass 34, count 2 2006.232.07:20:17.39#ibcon#first serial, iclass 34, count 2 2006.232.07:20:17.39#ibcon#enter sib2, iclass 34, count 2 2006.232.07:20:17.39#ibcon#flushed, iclass 34, count 2 2006.232.07:20:17.39#ibcon#about to write, iclass 34, count 2 2006.232.07:20:17.39#ibcon#wrote, iclass 34, count 2 2006.232.07:20:17.39#ibcon#about to read 3, iclass 34, count 2 2006.232.07:20:17.41#ibcon#read 3, iclass 34, count 2 2006.232.07:20:17.41#ibcon#about to read 4, iclass 34, count 2 2006.232.07:20:17.41#ibcon#read 4, iclass 34, count 2 2006.232.07:20:17.41#ibcon#about to read 5, iclass 34, count 2 2006.232.07:20:17.41#ibcon#read 5, iclass 34, count 2 2006.232.07:20:17.41#ibcon#about to read 6, iclass 34, count 2 2006.232.07:20:17.41#ibcon#read 6, iclass 34, count 2 2006.232.07:20:17.41#ibcon#end of sib2, iclass 34, count 2 2006.232.07:20:17.41#ibcon#*mode == 0, iclass 34, count 2 2006.232.07:20:17.41#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.232.07:20:17.41#ibcon#[25=AT02-07\r\n] 2006.232.07:20:17.41#ibcon#*before write, iclass 34, count 2 2006.232.07:20:17.41#ibcon#enter sib2, iclass 34, count 2 2006.232.07:20:17.41#ibcon#flushed, iclass 34, count 2 2006.232.07:20:17.41#ibcon#about to write, iclass 34, count 2 2006.232.07:20:17.41#ibcon#wrote, iclass 34, count 2 2006.232.07:20:17.41#ibcon#about to read 3, iclass 34, count 2 2006.232.07:20:17.44#ibcon#read 3, iclass 34, count 2 2006.232.07:20:17.44#ibcon#about to read 4, iclass 34, count 2 2006.232.07:20:17.44#ibcon#read 4, iclass 34, count 2 2006.232.07:20:17.44#ibcon#about to read 5, iclass 34, count 2 2006.232.07:20:17.44#ibcon#read 5, iclass 34, count 2 2006.232.07:20:17.44#ibcon#about to read 6, iclass 34, count 2 2006.232.07:20:17.44#ibcon#read 6, iclass 34, count 2 2006.232.07:20:17.44#ibcon#end of sib2, iclass 34, count 2 2006.232.07:20:17.44#ibcon#*after write, iclass 34, count 2 2006.232.07:20:17.44#ibcon#*before return 0, iclass 34, count 2 2006.232.07:20:17.44#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:20:17.44#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:20:17.44#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.232.07:20:17.44#ibcon#ireg 7 cls_cnt 0 2006.232.07:20:17.44#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:20:17.56#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:20:17.56#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:20:17.56#ibcon#enter wrdev, iclass 34, count 0 2006.232.07:20:17.56#ibcon#first serial, iclass 34, count 0 2006.232.07:20:17.56#ibcon#enter sib2, iclass 34, count 0 2006.232.07:20:17.56#ibcon#flushed, iclass 34, count 0 2006.232.07:20:17.56#ibcon#about to write, iclass 34, count 0 2006.232.07:20:17.56#ibcon#wrote, iclass 34, count 0 2006.232.07:20:17.56#ibcon#about to read 3, iclass 34, count 0 2006.232.07:20:17.58#ibcon#read 3, iclass 34, count 0 2006.232.07:20:17.58#ibcon#about to read 4, iclass 34, count 0 2006.232.07:20:17.58#ibcon#read 4, iclass 34, count 0 2006.232.07:20:17.58#ibcon#about to read 5, iclass 34, count 0 2006.232.07:20:17.58#ibcon#read 5, iclass 34, count 0 2006.232.07:20:17.58#ibcon#about to read 6, iclass 34, count 0 2006.232.07:20:17.58#ibcon#read 6, iclass 34, count 0 2006.232.07:20:17.58#ibcon#end of sib2, iclass 34, count 0 2006.232.07:20:17.58#ibcon#*mode == 0, iclass 34, count 0 2006.232.07:20:17.58#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.232.07:20:17.58#ibcon#[25=USB\r\n] 2006.232.07:20:17.58#ibcon#*before write, iclass 34, count 0 2006.232.07:20:17.58#ibcon#enter sib2, iclass 34, count 0 2006.232.07:20:17.58#ibcon#flushed, iclass 34, count 0 2006.232.07:20:17.58#ibcon#about to write, iclass 34, count 0 2006.232.07:20:17.58#ibcon#wrote, iclass 34, count 0 2006.232.07:20:17.58#ibcon#about to read 3, iclass 34, count 0 2006.232.07:20:17.61#ibcon#read 3, iclass 34, count 0 2006.232.07:20:17.61#ibcon#about to read 4, iclass 34, count 0 2006.232.07:20:17.61#ibcon#read 4, iclass 34, count 0 2006.232.07:20:17.61#ibcon#about to read 5, iclass 34, count 0 2006.232.07:20:17.61#ibcon#read 5, iclass 34, count 0 2006.232.07:20:17.61#ibcon#about to read 6, iclass 34, count 0 2006.232.07:20:17.61#ibcon#read 6, iclass 34, count 0 2006.232.07:20:17.61#ibcon#end of sib2, iclass 34, count 0 2006.232.07:20:17.61#ibcon#*after write, iclass 34, count 0 2006.232.07:20:17.61#ibcon#*before return 0, iclass 34, count 0 2006.232.07:20:17.61#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:20:17.61#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:20:17.61#ibcon#about to clear, iclass 34 cls_cnt 0 2006.232.07:20:17.61#ibcon#cleared, iclass 34 cls_cnt 0 2006.232.07:20:17.61$vc4f8/valo=3,672.99 2006.232.07:20:17.61#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.232.07:20:17.61#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.232.07:20:17.61#ibcon#ireg 17 cls_cnt 0 2006.232.07:20:17.61#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:20:17.61#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:20:17.61#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:20:17.61#ibcon#enter wrdev, iclass 36, count 0 2006.232.07:20:17.61#ibcon#first serial, iclass 36, count 0 2006.232.07:20:17.61#ibcon#enter sib2, iclass 36, count 0 2006.232.07:20:17.61#ibcon#flushed, iclass 36, count 0 2006.232.07:20:17.61#ibcon#about to write, iclass 36, count 0 2006.232.07:20:17.61#ibcon#wrote, iclass 36, count 0 2006.232.07:20:17.61#ibcon#about to read 3, iclass 36, count 0 2006.232.07:20:17.63#ibcon#read 3, iclass 36, count 0 2006.232.07:20:17.63#ibcon#about to read 4, iclass 36, count 0 2006.232.07:20:17.63#ibcon#read 4, iclass 36, count 0 2006.232.07:20:17.63#ibcon#about to read 5, iclass 36, count 0 2006.232.07:20:17.63#ibcon#read 5, iclass 36, count 0 2006.232.07:20:17.63#ibcon#about to read 6, iclass 36, count 0 2006.232.07:20:17.63#ibcon#read 6, iclass 36, count 0 2006.232.07:20:17.63#ibcon#end of sib2, iclass 36, count 0 2006.232.07:20:17.63#ibcon#*mode == 0, iclass 36, count 0 2006.232.07:20:17.63#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.232.07:20:17.63#ibcon#[26=FRQ=03,672.99\r\n] 2006.232.07:20:17.63#ibcon#*before write, iclass 36, count 0 2006.232.07:20:17.63#ibcon#enter sib2, iclass 36, count 0 2006.232.07:20:17.63#ibcon#flushed, iclass 36, count 0 2006.232.07:20:17.63#ibcon#about to write, iclass 36, count 0 2006.232.07:20:17.63#ibcon#wrote, iclass 36, count 0 2006.232.07:20:17.63#ibcon#about to read 3, iclass 36, count 0 2006.232.07:20:17.67#ibcon#read 3, iclass 36, count 0 2006.232.07:20:17.67#ibcon#about to read 4, iclass 36, count 0 2006.232.07:20:17.67#ibcon#read 4, iclass 36, count 0 2006.232.07:20:17.67#ibcon#about to read 5, iclass 36, count 0 2006.232.07:20:17.67#ibcon#read 5, iclass 36, count 0 2006.232.07:20:17.67#ibcon#about to read 6, iclass 36, count 0 2006.232.07:20:17.67#ibcon#read 6, iclass 36, count 0 2006.232.07:20:17.67#ibcon#end of sib2, iclass 36, count 0 2006.232.07:20:17.67#ibcon#*after write, iclass 36, count 0 2006.232.07:20:17.67#ibcon#*before return 0, iclass 36, count 0 2006.232.07:20:17.67#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:20:17.67#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:20:17.67#ibcon#about to clear, iclass 36 cls_cnt 0 2006.232.07:20:17.67#ibcon#cleared, iclass 36 cls_cnt 0 2006.232.07:20:17.67$vc4f8/va=3,8 2006.232.07:20:17.67#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.232.07:20:17.67#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.232.07:20:17.67#ibcon#ireg 11 cls_cnt 2 2006.232.07:20:17.67#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.232.07:20:17.73#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.232.07:20:17.73#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.232.07:20:17.73#ibcon#enter wrdev, iclass 38, count 2 2006.232.07:20:17.73#ibcon#first serial, iclass 38, count 2 2006.232.07:20:17.73#ibcon#enter sib2, iclass 38, count 2 2006.232.07:20:17.73#ibcon#flushed, iclass 38, count 2 2006.232.07:20:17.73#ibcon#about to write, iclass 38, count 2 2006.232.07:20:17.73#ibcon#wrote, iclass 38, count 2 2006.232.07:20:17.73#ibcon#about to read 3, iclass 38, count 2 2006.232.07:20:17.75#ibcon#read 3, iclass 38, count 2 2006.232.07:20:17.75#ibcon#about to read 4, iclass 38, count 2 2006.232.07:20:17.75#ibcon#read 4, iclass 38, count 2 2006.232.07:20:17.75#ibcon#about to read 5, iclass 38, count 2 2006.232.07:20:17.75#ibcon#read 5, iclass 38, count 2 2006.232.07:20:17.75#ibcon#about to read 6, iclass 38, count 2 2006.232.07:20:17.75#ibcon#read 6, iclass 38, count 2 2006.232.07:20:17.75#ibcon#end of sib2, iclass 38, count 2 2006.232.07:20:17.75#ibcon#*mode == 0, iclass 38, count 2 2006.232.07:20:17.75#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.232.07:20:17.75#ibcon#[25=AT03-08\r\n] 2006.232.07:20:17.75#ibcon#*before write, iclass 38, count 2 2006.232.07:20:17.75#ibcon#enter sib2, iclass 38, count 2 2006.232.07:20:17.75#ibcon#flushed, iclass 38, count 2 2006.232.07:20:17.75#ibcon#about to write, iclass 38, count 2 2006.232.07:20:17.75#ibcon#wrote, iclass 38, count 2 2006.232.07:20:17.75#ibcon#about to read 3, iclass 38, count 2 2006.232.07:20:17.78#ibcon#read 3, iclass 38, count 2 2006.232.07:20:17.78#ibcon#about to read 4, iclass 38, count 2 2006.232.07:20:17.78#ibcon#read 4, iclass 38, count 2 2006.232.07:20:17.78#ibcon#about to read 5, iclass 38, count 2 2006.232.07:20:17.78#ibcon#read 5, iclass 38, count 2 2006.232.07:20:17.78#ibcon#about to read 6, iclass 38, count 2 2006.232.07:20:17.78#ibcon#read 6, iclass 38, count 2 2006.232.07:20:17.78#ibcon#end of sib2, iclass 38, count 2 2006.232.07:20:17.78#ibcon#*after write, iclass 38, count 2 2006.232.07:20:17.78#ibcon#*before return 0, iclass 38, count 2 2006.232.07:20:17.78#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.232.07:20:17.78#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.232.07:20:17.78#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.232.07:20:17.78#ibcon#ireg 7 cls_cnt 0 2006.232.07:20:17.78#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.232.07:20:17.90#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.232.07:20:17.90#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.232.07:20:17.90#ibcon#enter wrdev, iclass 38, count 0 2006.232.07:20:17.90#ibcon#first serial, iclass 38, count 0 2006.232.07:20:17.90#ibcon#enter sib2, iclass 38, count 0 2006.232.07:20:17.90#ibcon#flushed, iclass 38, count 0 2006.232.07:20:17.90#ibcon#about to write, iclass 38, count 0 2006.232.07:20:17.90#ibcon#wrote, iclass 38, count 0 2006.232.07:20:17.90#ibcon#about to read 3, iclass 38, count 0 2006.232.07:20:17.92#ibcon#read 3, iclass 38, count 0 2006.232.07:20:17.92#ibcon#about to read 4, iclass 38, count 0 2006.232.07:20:17.92#ibcon#read 4, iclass 38, count 0 2006.232.07:20:17.92#ibcon#about to read 5, iclass 38, count 0 2006.232.07:20:17.92#ibcon#read 5, iclass 38, count 0 2006.232.07:20:17.92#ibcon#about to read 6, iclass 38, count 0 2006.232.07:20:17.92#ibcon#read 6, iclass 38, count 0 2006.232.07:20:17.92#ibcon#end of sib2, iclass 38, count 0 2006.232.07:20:17.92#ibcon#*mode == 0, iclass 38, count 0 2006.232.07:20:17.92#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.232.07:20:17.92#ibcon#[25=USB\r\n] 2006.232.07:20:17.92#ibcon#*before write, iclass 38, count 0 2006.232.07:20:17.92#ibcon#enter sib2, iclass 38, count 0 2006.232.07:20:17.92#ibcon#flushed, iclass 38, count 0 2006.232.07:20:17.92#ibcon#about to write, iclass 38, count 0 2006.232.07:20:17.92#ibcon#wrote, iclass 38, count 0 2006.232.07:20:17.92#ibcon#about to read 3, iclass 38, count 0 2006.232.07:20:17.95#ibcon#read 3, iclass 38, count 0 2006.232.07:20:17.95#ibcon#about to read 4, iclass 38, count 0 2006.232.07:20:17.95#ibcon#read 4, iclass 38, count 0 2006.232.07:20:17.95#ibcon#about to read 5, iclass 38, count 0 2006.232.07:20:17.95#ibcon#read 5, iclass 38, count 0 2006.232.07:20:17.95#ibcon#about to read 6, iclass 38, count 0 2006.232.07:20:17.95#ibcon#read 6, iclass 38, count 0 2006.232.07:20:17.95#ibcon#end of sib2, iclass 38, count 0 2006.232.07:20:17.95#ibcon#*after write, iclass 38, count 0 2006.232.07:20:17.95#ibcon#*before return 0, iclass 38, count 0 2006.232.07:20:17.95#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.232.07:20:17.95#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.232.07:20:17.95#ibcon#about to clear, iclass 38 cls_cnt 0 2006.232.07:20:17.95#ibcon#cleared, iclass 38 cls_cnt 0 2006.232.07:20:17.95$vc4f8/valo=4,832.99 2006.232.07:20:17.95#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.232.07:20:17.95#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.232.07:20:17.95#ibcon#ireg 17 cls_cnt 0 2006.232.07:20:17.95#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:20:17.95#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:20:17.95#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:20:17.95#ibcon#enter wrdev, iclass 40, count 0 2006.232.07:20:17.95#ibcon#first serial, iclass 40, count 0 2006.232.07:20:17.95#ibcon#enter sib2, iclass 40, count 0 2006.232.07:20:17.95#ibcon#flushed, iclass 40, count 0 2006.232.07:20:17.95#ibcon#about to write, iclass 40, count 0 2006.232.07:20:17.95#ibcon#wrote, iclass 40, count 0 2006.232.07:20:17.95#ibcon#about to read 3, iclass 40, count 0 2006.232.07:20:17.97#ibcon#read 3, iclass 40, count 0 2006.232.07:20:17.97#ibcon#about to read 4, iclass 40, count 0 2006.232.07:20:17.97#ibcon#read 4, iclass 40, count 0 2006.232.07:20:17.97#ibcon#about to read 5, iclass 40, count 0 2006.232.07:20:17.97#ibcon#read 5, iclass 40, count 0 2006.232.07:20:17.97#ibcon#about to read 6, iclass 40, count 0 2006.232.07:20:17.97#ibcon#read 6, iclass 40, count 0 2006.232.07:20:17.97#ibcon#end of sib2, iclass 40, count 0 2006.232.07:20:17.97#ibcon#*mode == 0, iclass 40, count 0 2006.232.07:20:17.97#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.232.07:20:17.97#ibcon#[26=FRQ=04,832.99\r\n] 2006.232.07:20:17.97#ibcon#*before write, iclass 40, count 0 2006.232.07:20:17.97#ibcon#enter sib2, iclass 40, count 0 2006.232.07:20:17.97#ibcon#flushed, iclass 40, count 0 2006.232.07:20:17.97#ibcon#about to write, iclass 40, count 0 2006.232.07:20:17.97#ibcon#wrote, iclass 40, count 0 2006.232.07:20:17.97#ibcon#about to read 3, iclass 40, count 0 2006.232.07:20:18.01#ibcon#read 3, iclass 40, count 0 2006.232.07:20:18.01#ibcon#about to read 4, iclass 40, count 0 2006.232.07:20:18.01#ibcon#read 4, iclass 40, count 0 2006.232.07:20:18.01#ibcon#about to read 5, iclass 40, count 0 2006.232.07:20:18.01#ibcon#read 5, iclass 40, count 0 2006.232.07:20:18.01#ibcon#about to read 6, iclass 40, count 0 2006.232.07:20:18.01#ibcon#read 6, iclass 40, count 0 2006.232.07:20:18.01#ibcon#end of sib2, iclass 40, count 0 2006.232.07:20:18.01#ibcon#*after write, iclass 40, count 0 2006.232.07:20:18.01#ibcon#*before return 0, iclass 40, count 0 2006.232.07:20:18.01#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:20:18.01#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:20:18.01#ibcon#about to clear, iclass 40 cls_cnt 0 2006.232.07:20:18.01#ibcon#cleared, iclass 40 cls_cnt 0 2006.232.07:20:18.01$vc4f8/va=4,7 2006.232.07:20:18.01#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.232.07:20:18.01#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.232.07:20:18.01#ibcon#ireg 11 cls_cnt 2 2006.232.07:20:18.01#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:20:18.07#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:20:18.07#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:20:18.07#ibcon#enter wrdev, iclass 4, count 2 2006.232.07:20:18.07#ibcon#first serial, iclass 4, count 2 2006.232.07:20:18.07#ibcon#enter sib2, iclass 4, count 2 2006.232.07:20:18.07#ibcon#flushed, iclass 4, count 2 2006.232.07:20:18.07#ibcon#about to write, iclass 4, count 2 2006.232.07:20:18.07#ibcon#wrote, iclass 4, count 2 2006.232.07:20:18.07#ibcon#about to read 3, iclass 4, count 2 2006.232.07:20:18.09#ibcon#read 3, iclass 4, count 2 2006.232.07:20:18.09#ibcon#about to read 4, iclass 4, count 2 2006.232.07:20:18.09#ibcon#read 4, iclass 4, count 2 2006.232.07:20:18.09#ibcon#about to read 5, iclass 4, count 2 2006.232.07:20:18.09#ibcon#read 5, iclass 4, count 2 2006.232.07:20:18.09#ibcon#about to read 6, iclass 4, count 2 2006.232.07:20:18.09#ibcon#read 6, iclass 4, count 2 2006.232.07:20:18.09#ibcon#end of sib2, iclass 4, count 2 2006.232.07:20:18.09#ibcon#*mode == 0, iclass 4, count 2 2006.232.07:20:18.09#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.232.07:20:18.09#ibcon#[25=AT04-07\r\n] 2006.232.07:20:18.09#ibcon#*before write, iclass 4, count 2 2006.232.07:20:18.09#ibcon#enter sib2, iclass 4, count 2 2006.232.07:20:18.09#ibcon#flushed, iclass 4, count 2 2006.232.07:20:18.09#ibcon#about to write, iclass 4, count 2 2006.232.07:20:18.09#ibcon#wrote, iclass 4, count 2 2006.232.07:20:18.09#ibcon#about to read 3, iclass 4, count 2 2006.232.07:20:18.12#ibcon#read 3, iclass 4, count 2 2006.232.07:20:18.12#ibcon#about to read 4, iclass 4, count 2 2006.232.07:20:18.12#ibcon#read 4, iclass 4, count 2 2006.232.07:20:18.12#ibcon#about to read 5, iclass 4, count 2 2006.232.07:20:18.12#ibcon#read 5, iclass 4, count 2 2006.232.07:20:18.12#ibcon#about to read 6, iclass 4, count 2 2006.232.07:20:18.12#ibcon#read 6, iclass 4, count 2 2006.232.07:20:18.12#ibcon#end of sib2, iclass 4, count 2 2006.232.07:20:18.12#ibcon#*after write, iclass 4, count 2 2006.232.07:20:18.12#ibcon#*before return 0, iclass 4, count 2 2006.232.07:20:18.12#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:20:18.12#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:20:18.12#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.232.07:20:18.12#ibcon#ireg 7 cls_cnt 0 2006.232.07:20:18.12#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:20:18.24#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:20:18.24#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:20:18.24#ibcon#enter wrdev, iclass 4, count 0 2006.232.07:20:18.24#ibcon#first serial, iclass 4, count 0 2006.232.07:20:18.24#ibcon#enter sib2, iclass 4, count 0 2006.232.07:20:18.24#ibcon#flushed, iclass 4, count 0 2006.232.07:20:18.24#ibcon#about to write, iclass 4, count 0 2006.232.07:20:18.24#ibcon#wrote, iclass 4, count 0 2006.232.07:20:18.24#ibcon#about to read 3, iclass 4, count 0 2006.232.07:20:18.26#ibcon#read 3, iclass 4, count 0 2006.232.07:20:18.26#ibcon#about to read 4, iclass 4, count 0 2006.232.07:20:18.26#ibcon#read 4, iclass 4, count 0 2006.232.07:20:18.26#ibcon#about to read 5, iclass 4, count 0 2006.232.07:20:18.26#ibcon#read 5, iclass 4, count 0 2006.232.07:20:18.26#ibcon#about to read 6, iclass 4, count 0 2006.232.07:20:18.26#ibcon#read 6, iclass 4, count 0 2006.232.07:20:18.26#ibcon#end of sib2, iclass 4, count 0 2006.232.07:20:18.26#ibcon#*mode == 0, iclass 4, count 0 2006.232.07:20:18.26#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.232.07:20:18.26#ibcon#[25=USB\r\n] 2006.232.07:20:18.26#ibcon#*before write, iclass 4, count 0 2006.232.07:20:18.26#ibcon#enter sib2, iclass 4, count 0 2006.232.07:20:18.26#ibcon#flushed, iclass 4, count 0 2006.232.07:20:18.26#ibcon#about to write, iclass 4, count 0 2006.232.07:20:18.26#ibcon#wrote, iclass 4, count 0 2006.232.07:20:18.26#ibcon#about to read 3, iclass 4, count 0 2006.232.07:20:18.29#ibcon#read 3, iclass 4, count 0 2006.232.07:20:18.29#ibcon#about to read 4, iclass 4, count 0 2006.232.07:20:18.29#ibcon#read 4, iclass 4, count 0 2006.232.07:20:18.29#ibcon#about to read 5, iclass 4, count 0 2006.232.07:20:18.29#ibcon#read 5, iclass 4, count 0 2006.232.07:20:18.29#ibcon#about to read 6, iclass 4, count 0 2006.232.07:20:18.29#ibcon#read 6, iclass 4, count 0 2006.232.07:20:18.29#ibcon#end of sib2, iclass 4, count 0 2006.232.07:20:18.29#ibcon#*after write, iclass 4, count 0 2006.232.07:20:18.29#ibcon#*before return 0, iclass 4, count 0 2006.232.07:20:18.29#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:20:18.29#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:20:18.29#ibcon#about to clear, iclass 4 cls_cnt 0 2006.232.07:20:18.29#ibcon#cleared, iclass 4 cls_cnt 0 2006.232.07:20:18.29$vc4f8/valo=5,652.99 2006.232.07:20:18.29#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.232.07:20:18.29#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.232.07:20:18.29#ibcon#ireg 17 cls_cnt 0 2006.232.07:20:18.29#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:20:18.29#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:20:18.29#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:20:18.29#ibcon#enter wrdev, iclass 6, count 0 2006.232.07:20:18.29#ibcon#first serial, iclass 6, count 0 2006.232.07:20:18.29#ibcon#enter sib2, iclass 6, count 0 2006.232.07:20:18.29#ibcon#flushed, iclass 6, count 0 2006.232.07:20:18.29#ibcon#about to write, iclass 6, count 0 2006.232.07:20:18.29#ibcon#wrote, iclass 6, count 0 2006.232.07:20:18.29#ibcon#about to read 3, iclass 6, count 0 2006.232.07:20:18.31#ibcon#read 3, iclass 6, count 0 2006.232.07:20:18.31#ibcon#about to read 4, iclass 6, count 0 2006.232.07:20:18.31#ibcon#read 4, iclass 6, count 0 2006.232.07:20:18.31#ibcon#about to read 5, iclass 6, count 0 2006.232.07:20:18.31#ibcon#read 5, iclass 6, count 0 2006.232.07:20:18.31#ibcon#about to read 6, iclass 6, count 0 2006.232.07:20:18.31#ibcon#read 6, iclass 6, count 0 2006.232.07:20:18.31#ibcon#end of sib2, iclass 6, count 0 2006.232.07:20:18.31#ibcon#*mode == 0, iclass 6, count 0 2006.232.07:20:18.31#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.232.07:20:18.31#ibcon#[26=FRQ=05,652.99\r\n] 2006.232.07:20:18.31#ibcon#*before write, iclass 6, count 0 2006.232.07:20:18.31#ibcon#enter sib2, iclass 6, count 0 2006.232.07:20:18.31#ibcon#flushed, iclass 6, count 0 2006.232.07:20:18.31#ibcon#about to write, iclass 6, count 0 2006.232.07:20:18.31#ibcon#wrote, iclass 6, count 0 2006.232.07:20:18.31#ibcon#about to read 3, iclass 6, count 0 2006.232.07:20:18.35#ibcon#read 3, iclass 6, count 0 2006.232.07:20:18.35#ibcon#about to read 4, iclass 6, count 0 2006.232.07:20:18.35#ibcon#read 4, iclass 6, count 0 2006.232.07:20:18.35#ibcon#about to read 5, iclass 6, count 0 2006.232.07:20:18.35#ibcon#read 5, iclass 6, count 0 2006.232.07:20:18.35#ibcon#about to read 6, iclass 6, count 0 2006.232.07:20:18.35#ibcon#read 6, iclass 6, count 0 2006.232.07:20:18.35#ibcon#end of sib2, iclass 6, count 0 2006.232.07:20:18.35#ibcon#*after write, iclass 6, count 0 2006.232.07:20:18.35#ibcon#*before return 0, iclass 6, count 0 2006.232.07:20:18.35#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:20:18.35#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:20:18.35#ibcon#about to clear, iclass 6 cls_cnt 0 2006.232.07:20:18.35#ibcon#cleared, iclass 6 cls_cnt 0 2006.232.07:20:18.35$vc4f8/va=5,7 2006.232.07:20:18.35#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.232.07:20:18.35#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.232.07:20:18.35#ibcon#ireg 11 cls_cnt 2 2006.232.07:20:18.35#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.232.07:20:18.42#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.232.07:20:18.42#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.232.07:20:18.42#ibcon#enter wrdev, iclass 10, count 2 2006.232.07:20:18.42#ibcon#first serial, iclass 10, count 2 2006.232.07:20:18.42#ibcon#enter sib2, iclass 10, count 2 2006.232.07:20:18.42#ibcon#flushed, iclass 10, count 2 2006.232.07:20:18.42#ibcon#about to write, iclass 10, count 2 2006.232.07:20:18.42#ibcon#wrote, iclass 10, count 2 2006.232.07:20:18.42#ibcon#about to read 3, iclass 10, count 2 2006.232.07:20:18.43#ibcon#read 3, iclass 10, count 2 2006.232.07:20:18.43#ibcon#about to read 4, iclass 10, count 2 2006.232.07:20:18.43#ibcon#read 4, iclass 10, count 2 2006.232.07:20:18.43#ibcon#about to read 5, iclass 10, count 2 2006.232.07:20:18.43#ibcon#read 5, iclass 10, count 2 2006.232.07:20:18.43#ibcon#about to read 6, iclass 10, count 2 2006.232.07:20:18.43#ibcon#read 6, iclass 10, count 2 2006.232.07:20:18.43#ibcon#end of sib2, iclass 10, count 2 2006.232.07:20:18.43#ibcon#*mode == 0, iclass 10, count 2 2006.232.07:20:18.43#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.232.07:20:18.43#ibcon#[25=AT05-07\r\n] 2006.232.07:20:18.43#ibcon#*before write, iclass 10, count 2 2006.232.07:20:18.43#ibcon#enter sib2, iclass 10, count 2 2006.232.07:20:18.43#ibcon#flushed, iclass 10, count 2 2006.232.07:20:18.43#ibcon#about to write, iclass 10, count 2 2006.232.07:20:18.43#ibcon#wrote, iclass 10, count 2 2006.232.07:20:18.43#ibcon#about to read 3, iclass 10, count 2 2006.232.07:20:18.46#ibcon#read 3, iclass 10, count 2 2006.232.07:20:18.46#ibcon#about to read 4, iclass 10, count 2 2006.232.07:20:18.46#ibcon#read 4, iclass 10, count 2 2006.232.07:20:18.46#ibcon#about to read 5, iclass 10, count 2 2006.232.07:20:18.46#ibcon#read 5, iclass 10, count 2 2006.232.07:20:18.46#ibcon#about to read 6, iclass 10, count 2 2006.232.07:20:18.46#ibcon#read 6, iclass 10, count 2 2006.232.07:20:18.46#ibcon#end of sib2, iclass 10, count 2 2006.232.07:20:18.46#ibcon#*after write, iclass 10, count 2 2006.232.07:20:18.46#ibcon#*before return 0, iclass 10, count 2 2006.232.07:20:18.46#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.232.07:20:18.46#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.232.07:20:18.46#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.232.07:20:18.46#ibcon#ireg 7 cls_cnt 0 2006.232.07:20:18.46#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.232.07:20:18.58#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.232.07:20:18.58#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.232.07:20:18.58#ibcon#enter wrdev, iclass 10, count 0 2006.232.07:20:18.58#ibcon#first serial, iclass 10, count 0 2006.232.07:20:18.58#ibcon#enter sib2, iclass 10, count 0 2006.232.07:20:18.58#ibcon#flushed, iclass 10, count 0 2006.232.07:20:18.58#ibcon#about to write, iclass 10, count 0 2006.232.07:20:18.58#ibcon#wrote, iclass 10, count 0 2006.232.07:20:18.58#ibcon#about to read 3, iclass 10, count 0 2006.232.07:20:18.60#ibcon#read 3, iclass 10, count 0 2006.232.07:20:18.60#ibcon#about to read 4, iclass 10, count 0 2006.232.07:20:18.60#ibcon#read 4, iclass 10, count 0 2006.232.07:20:18.60#ibcon#about to read 5, iclass 10, count 0 2006.232.07:20:18.60#ibcon#read 5, iclass 10, count 0 2006.232.07:20:18.60#ibcon#about to read 6, iclass 10, count 0 2006.232.07:20:18.60#ibcon#read 6, iclass 10, count 0 2006.232.07:20:18.60#ibcon#end of sib2, iclass 10, count 0 2006.232.07:20:18.60#ibcon#*mode == 0, iclass 10, count 0 2006.232.07:20:18.60#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.232.07:20:18.60#ibcon#[25=USB\r\n] 2006.232.07:20:18.60#ibcon#*before write, iclass 10, count 0 2006.232.07:20:18.60#ibcon#enter sib2, iclass 10, count 0 2006.232.07:20:18.60#ibcon#flushed, iclass 10, count 0 2006.232.07:20:18.60#ibcon#about to write, iclass 10, count 0 2006.232.07:20:18.60#ibcon#wrote, iclass 10, count 0 2006.232.07:20:18.60#ibcon#about to read 3, iclass 10, count 0 2006.232.07:20:18.63#ibcon#read 3, iclass 10, count 0 2006.232.07:20:18.63#ibcon#about to read 4, iclass 10, count 0 2006.232.07:20:18.63#ibcon#read 4, iclass 10, count 0 2006.232.07:20:18.63#ibcon#about to read 5, iclass 10, count 0 2006.232.07:20:18.63#ibcon#read 5, iclass 10, count 0 2006.232.07:20:18.63#ibcon#about to read 6, iclass 10, count 0 2006.232.07:20:18.63#ibcon#read 6, iclass 10, count 0 2006.232.07:20:18.63#ibcon#end of sib2, iclass 10, count 0 2006.232.07:20:18.63#ibcon#*after write, iclass 10, count 0 2006.232.07:20:18.63#ibcon#*before return 0, iclass 10, count 0 2006.232.07:20:18.63#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.232.07:20:18.63#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.232.07:20:18.63#ibcon#about to clear, iclass 10 cls_cnt 0 2006.232.07:20:18.63#ibcon#cleared, iclass 10 cls_cnt 0 2006.232.07:20:18.63$vc4f8/valo=6,772.99 2006.232.07:20:18.63#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.232.07:20:18.63#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.232.07:20:18.63#ibcon#ireg 17 cls_cnt 0 2006.232.07:20:18.63#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.232.07:20:18.63#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.232.07:20:18.63#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.232.07:20:18.63#ibcon#enter wrdev, iclass 12, count 0 2006.232.07:20:18.63#ibcon#first serial, iclass 12, count 0 2006.232.07:20:18.63#ibcon#enter sib2, iclass 12, count 0 2006.232.07:20:18.63#ibcon#flushed, iclass 12, count 0 2006.232.07:20:18.63#ibcon#about to write, iclass 12, count 0 2006.232.07:20:18.63#ibcon#wrote, iclass 12, count 0 2006.232.07:20:18.63#ibcon#about to read 3, iclass 12, count 0 2006.232.07:20:18.66#ibcon#read 3, iclass 12, count 0 2006.232.07:20:18.66#ibcon#about to read 4, iclass 12, count 0 2006.232.07:20:18.66#ibcon#read 4, iclass 12, count 0 2006.232.07:20:18.66#ibcon#about to read 5, iclass 12, count 0 2006.232.07:20:18.66#ibcon#read 5, iclass 12, count 0 2006.232.07:20:18.66#ibcon#about to read 6, iclass 12, count 0 2006.232.07:20:18.66#ibcon#read 6, iclass 12, count 0 2006.232.07:20:18.66#ibcon#end of sib2, iclass 12, count 0 2006.232.07:20:18.66#ibcon#*mode == 0, iclass 12, count 0 2006.232.07:20:18.66#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.232.07:20:18.66#ibcon#[26=FRQ=06,772.99\r\n] 2006.232.07:20:18.66#ibcon#*before write, iclass 12, count 0 2006.232.07:20:18.66#ibcon#enter sib2, iclass 12, count 0 2006.232.07:20:18.66#ibcon#flushed, iclass 12, count 0 2006.232.07:20:18.66#ibcon#about to write, iclass 12, count 0 2006.232.07:20:18.66#ibcon#wrote, iclass 12, count 0 2006.232.07:20:18.66#ibcon#about to read 3, iclass 12, count 0 2006.232.07:20:18.70#ibcon#read 3, iclass 12, count 0 2006.232.07:20:18.70#ibcon#about to read 4, iclass 12, count 0 2006.232.07:20:18.70#ibcon#read 4, iclass 12, count 0 2006.232.07:20:18.70#ibcon#about to read 5, iclass 12, count 0 2006.232.07:20:18.70#ibcon#read 5, iclass 12, count 0 2006.232.07:20:18.70#ibcon#about to read 6, iclass 12, count 0 2006.232.07:20:18.70#ibcon#read 6, iclass 12, count 0 2006.232.07:20:18.70#ibcon#end of sib2, iclass 12, count 0 2006.232.07:20:18.70#ibcon#*after write, iclass 12, count 0 2006.232.07:20:18.70#ibcon#*before return 0, iclass 12, count 0 2006.232.07:20:18.70#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.232.07:20:18.70#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.232.07:20:18.70#ibcon#about to clear, iclass 12 cls_cnt 0 2006.232.07:20:18.70#ibcon#cleared, iclass 12 cls_cnt 0 2006.232.07:20:18.70$vc4f8/va=6,6 2006.232.07:20:18.70#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.232.07:20:18.70#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.232.07:20:18.70#ibcon#ireg 11 cls_cnt 2 2006.232.07:20:18.70#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.232.07:20:18.75#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.232.07:20:18.75#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.232.07:20:18.75#ibcon#enter wrdev, iclass 14, count 2 2006.232.07:20:18.75#ibcon#first serial, iclass 14, count 2 2006.232.07:20:18.75#ibcon#enter sib2, iclass 14, count 2 2006.232.07:20:18.75#ibcon#flushed, iclass 14, count 2 2006.232.07:20:18.75#ibcon#about to write, iclass 14, count 2 2006.232.07:20:18.75#ibcon#wrote, iclass 14, count 2 2006.232.07:20:18.75#ibcon#about to read 3, iclass 14, count 2 2006.232.07:20:18.77#ibcon#read 3, iclass 14, count 2 2006.232.07:20:18.77#ibcon#about to read 4, iclass 14, count 2 2006.232.07:20:18.77#ibcon#read 4, iclass 14, count 2 2006.232.07:20:18.77#ibcon#about to read 5, iclass 14, count 2 2006.232.07:20:18.77#ibcon#read 5, iclass 14, count 2 2006.232.07:20:18.77#ibcon#about to read 6, iclass 14, count 2 2006.232.07:20:18.77#ibcon#read 6, iclass 14, count 2 2006.232.07:20:18.77#ibcon#end of sib2, iclass 14, count 2 2006.232.07:20:18.77#ibcon#*mode == 0, iclass 14, count 2 2006.232.07:20:18.77#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.232.07:20:18.77#ibcon#[25=AT06-06\r\n] 2006.232.07:20:18.77#ibcon#*before write, iclass 14, count 2 2006.232.07:20:18.77#ibcon#enter sib2, iclass 14, count 2 2006.232.07:20:18.77#ibcon#flushed, iclass 14, count 2 2006.232.07:20:18.77#ibcon#about to write, iclass 14, count 2 2006.232.07:20:18.77#ibcon#wrote, iclass 14, count 2 2006.232.07:20:18.77#ibcon#about to read 3, iclass 14, count 2 2006.232.07:20:18.80#ibcon#read 3, iclass 14, count 2 2006.232.07:20:18.80#ibcon#about to read 4, iclass 14, count 2 2006.232.07:20:18.80#ibcon#read 4, iclass 14, count 2 2006.232.07:20:18.80#ibcon#about to read 5, iclass 14, count 2 2006.232.07:20:18.80#ibcon#read 5, iclass 14, count 2 2006.232.07:20:18.80#ibcon#about to read 6, iclass 14, count 2 2006.232.07:20:18.80#ibcon#read 6, iclass 14, count 2 2006.232.07:20:18.80#ibcon#end of sib2, iclass 14, count 2 2006.232.07:20:18.80#ibcon#*after write, iclass 14, count 2 2006.232.07:20:18.80#ibcon#*before return 0, iclass 14, count 2 2006.232.07:20:18.80#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.232.07:20:18.80#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.232.07:20:18.80#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.232.07:20:18.80#ibcon#ireg 7 cls_cnt 0 2006.232.07:20:18.80#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.232.07:20:18.92#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.232.07:20:18.92#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.232.07:20:18.92#ibcon#enter wrdev, iclass 14, count 0 2006.232.07:20:18.92#ibcon#first serial, iclass 14, count 0 2006.232.07:20:18.92#ibcon#enter sib2, iclass 14, count 0 2006.232.07:20:18.92#ibcon#flushed, iclass 14, count 0 2006.232.07:20:18.92#ibcon#about to write, iclass 14, count 0 2006.232.07:20:18.92#ibcon#wrote, iclass 14, count 0 2006.232.07:20:18.92#ibcon#about to read 3, iclass 14, count 0 2006.232.07:20:18.94#ibcon#read 3, iclass 14, count 0 2006.232.07:20:18.94#ibcon#about to read 4, iclass 14, count 0 2006.232.07:20:18.94#ibcon#read 4, iclass 14, count 0 2006.232.07:20:18.94#ibcon#about to read 5, iclass 14, count 0 2006.232.07:20:18.94#ibcon#read 5, iclass 14, count 0 2006.232.07:20:18.94#ibcon#about to read 6, iclass 14, count 0 2006.232.07:20:18.94#ibcon#read 6, iclass 14, count 0 2006.232.07:20:18.94#ibcon#end of sib2, iclass 14, count 0 2006.232.07:20:18.94#ibcon#*mode == 0, iclass 14, count 0 2006.232.07:20:18.94#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.232.07:20:18.94#ibcon#[25=USB\r\n] 2006.232.07:20:18.94#ibcon#*before write, iclass 14, count 0 2006.232.07:20:18.94#ibcon#enter sib2, iclass 14, count 0 2006.232.07:20:18.94#ibcon#flushed, iclass 14, count 0 2006.232.07:20:18.94#ibcon#about to write, iclass 14, count 0 2006.232.07:20:18.94#ibcon#wrote, iclass 14, count 0 2006.232.07:20:18.94#ibcon#about to read 3, iclass 14, count 0 2006.232.07:20:18.97#ibcon#read 3, iclass 14, count 0 2006.232.07:20:18.97#ibcon#about to read 4, iclass 14, count 0 2006.232.07:20:18.97#ibcon#read 4, iclass 14, count 0 2006.232.07:20:18.97#ibcon#about to read 5, iclass 14, count 0 2006.232.07:20:18.97#ibcon#read 5, iclass 14, count 0 2006.232.07:20:18.97#ibcon#about to read 6, iclass 14, count 0 2006.232.07:20:18.97#ibcon#read 6, iclass 14, count 0 2006.232.07:20:18.97#ibcon#end of sib2, iclass 14, count 0 2006.232.07:20:18.97#ibcon#*after write, iclass 14, count 0 2006.232.07:20:18.97#ibcon#*before return 0, iclass 14, count 0 2006.232.07:20:18.97#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.232.07:20:18.97#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.232.07:20:18.97#ibcon#about to clear, iclass 14 cls_cnt 0 2006.232.07:20:18.97#ibcon#cleared, iclass 14 cls_cnt 0 2006.232.07:20:18.97$vc4f8/valo=7,832.99 2006.232.07:20:18.97#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.232.07:20:18.97#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.232.07:20:18.97#ibcon#ireg 17 cls_cnt 0 2006.232.07:20:18.97#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:20:18.97#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:20:18.97#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:20:18.97#ibcon#enter wrdev, iclass 16, count 0 2006.232.07:20:18.97#ibcon#first serial, iclass 16, count 0 2006.232.07:20:18.97#ibcon#enter sib2, iclass 16, count 0 2006.232.07:20:18.97#ibcon#flushed, iclass 16, count 0 2006.232.07:20:18.97#ibcon#about to write, iclass 16, count 0 2006.232.07:20:18.97#ibcon#wrote, iclass 16, count 0 2006.232.07:20:18.97#ibcon#about to read 3, iclass 16, count 0 2006.232.07:20:18.99#ibcon#read 3, iclass 16, count 0 2006.232.07:20:18.99#ibcon#about to read 4, iclass 16, count 0 2006.232.07:20:18.99#ibcon#read 4, iclass 16, count 0 2006.232.07:20:18.99#ibcon#about to read 5, iclass 16, count 0 2006.232.07:20:18.99#ibcon#read 5, iclass 16, count 0 2006.232.07:20:18.99#ibcon#about to read 6, iclass 16, count 0 2006.232.07:20:18.99#ibcon#read 6, iclass 16, count 0 2006.232.07:20:18.99#ibcon#end of sib2, iclass 16, count 0 2006.232.07:20:18.99#ibcon#*mode == 0, iclass 16, count 0 2006.232.07:20:18.99#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.232.07:20:18.99#ibcon#[26=FRQ=07,832.99\r\n] 2006.232.07:20:18.99#ibcon#*before write, iclass 16, count 0 2006.232.07:20:18.99#ibcon#enter sib2, iclass 16, count 0 2006.232.07:20:18.99#ibcon#flushed, iclass 16, count 0 2006.232.07:20:18.99#ibcon#about to write, iclass 16, count 0 2006.232.07:20:18.99#ibcon#wrote, iclass 16, count 0 2006.232.07:20:18.99#ibcon#about to read 3, iclass 16, count 0 2006.232.07:20:19.03#ibcon#read 3, iclass 16, count 0 2006.232.07:20:19.03#ibcon#about to read 4, iclass 16, count 0 2006.232.07:20:19.03#ibcon#read 4, iclass 16, count 0 2006.232.07:20:19.03#ibcon#about to read 5, iclass 16, count 0 2006.232.07:20:19.03#ibcon#read 5, iclass 16, count 0 2006.232.07:20:19.03#ibcon#about to read 6, iclass 16, count 0 2006.232.07:20:19.03#ibcon#read 6, iclass 16, count 0 2006.232.07:20:19.03#ibcon#end of sib2, iclass 16, count 0 2006.232.07:20:19.03#ibcon#*after write, iclass 16, count 0 2006.232.07:20:19.03#ibcon#*before return 0, iclass 16, count 0 2006.232.07:20:19.03#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:20:19.03#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:20:19.03#ibcon#about to clear, iclass 16 cls_cnt 0 2006.232.07:20:19.03#ibcon#cleared, iclass 16 cls_cnt 0 2006.232.07:20:19.03$vc4f8/va=7,6 2006.232.07:20:19.03#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.232.07:20:19.03#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.232.07:20:19.03#ibcon#ireg 11 cls_cnt 2 2006.232.07:20:19.03#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:20:19.09#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:20:19.09#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:20:19.09#ibcon#enter wrdev, iclass 18, count 2 2006.232.07:20:19.09#ibcon#first serial, iclass 18, count 2 2006.232.07:20:19.09#ibcon#enter sib2, iclass 18, count 2 2006.232.07:20:19.09#ibcon#flushed, iclass 18, count 2 2006.232.07:20:19.09#ibcon#about to write, iclass 18, count 2 2006.232.07:20:19.09#ibcon#wrote, iclass 18, count 2 2006.232.07:20:19.09#ibcon#about to read 3, iclass 18, count 2 2006.232.07:20:19.11#ibcon#read 3, iclass 18, count 2 2006.232.07:20:19.11#ibcon#about to read 4, iclass 18, count 2 2006.232.07:20:19.11#ibcon#read 4, iclass 18, count 2 2006.232.07:20:19.11#ibcon#about to read 5, iclass 18, count 2 2006.232.07:20:19.11#ibcon#read 5, iclass 18, count 2 2006.232.07:20:19.11#ibcon#about to read 6, iclass 18, count 2 2006.232.07:20:19.11#ibcon#read 6, iclass 18, count 2 2006.232.07:20:19.11#ibcon#end of sib2, iclass 18, count 2 2006.232.07:20:19.11#ibcon#*mode == 0, iclass 18, count 2 2006.232.07:20:19.11#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.232.07:20:19.11#ibcon#[25=AT07-06\r\n] 2006.232.07:20:19.11#ibcon#*before write, iclass 18, count 2 2006.232.07:20:19.11#ibcon#enter sib2, iclass 18, count 2 2006.232.07:20:19.11#ibcon#flushed, iclass 18, count 2 2006.232.07:20:19.11#ibcon#about to write, iclass 18, count 2 2006.232.07:20:19.11#ibcon#wrote, iclass 18, count 2 2006.232.07:20:19.11#ibcon#about to read 3, iclass 18, count 2 2006.232.07:20:19.14#ibcon#read 3, iclass 18, count 2 2006.232.07:20:19.14#ibcon#about to read 4, iclass 18, count 2 2006.232.07:20:19.14#ibcon#read 4, iclass 18, count 2 2006.232.07:20:19.14#ibcon#about to read 5, iclass 18, count 2 2006.232.07:20:19.14#ibcon#read 5, iclass 18, count 2 2006.232.07:20:19.14#ibcon#about to read 6, iclass 18, count 2 2006.232.07:20:19.14#ibcon#read 6, iclass 18, count 2 2006.232.07:20:19.14#ibcon#end of sib2, iclass 18, count 2 2006.232.07:20:19.14#ibcon#*after write, iclass 18, count 2 2006.232.07:20:19.14#ibcon#*before return 0, iclass 18, count 2 2006.232.07:20:19.14#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:20:19.14#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:20:19.14#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.232.07:20:19.14#ibcon#ireg 7 cls_cnt 0 2006.232.07:20:19.14#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:20:19.26#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:20:19.26#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:20:19.26#ibcon#enter wrdev, iclass 18, count 0 2006.232.07:20:19.26#ibcon#first serial, iclass 18, count 0 2006.232.07:20:19.26#ibcon#enter sib2, iclass 18, count 0 2006.232.07:20:19.26#ibcon#flushed, iclass 18, count 0 2006.232.07:20:19.26#ibcon#about to write, iclass 18, count 0 2006.232.07:20:19.26#ibcon#wrote, iclass 18, count 0 2006.232.07:20:19.26#ibcon#about to read 3, iclass 18, count 0 2006.232.07:20:19.28#ibcon#read 3, iclass 18, count 0 2006.232.07:20:19.28#ibcon#about to read 4, iclass 18, count 0 2006.232.07:20:19.28#ibcon#read 4, iclass 18, count 0 2006.232.07:20:19.28#ibcon#about to read 5, iclass 18, count 0 2006.232.07:20:19.28#ibcon#read 5, iclass 18, count 0 2006.232.07:20:19.28#ibcon#about to read 6, iclass 18, count 0 2006.232.07:20:19.28#ibcon#read 6, iclass 18, count 0 2006.232.07:20:19.28#ibcon#end of sib2, iclass 18, count 0 2006.232.07:20:19.28#ibcon#*mode == 0, iclass 18, count 0 2006.232.07:20:19.28#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.232.07:20:19.28#ibcon#[25=USB\r\n] 2006.232.07:20:19.28#ibcon#*before write, iclass 18, count 0 2006.232.07:20:19.28#ibcon#enter sib2, iclass 18, count 0 2006.232.07:20:19.28#ibcon#flushed, iclass 18, count 0 2006.232.07:20:19.28#ibcon#about to write, iclass 18, count 0 2006.232.07:20:19.28#ibcon#wrote, iclass 18, count 0 2006.232.07:20:19.28#ibcon#about to read 3, iclass 18, count 0 2006.232.07:20:19.31#ibcon#read 3, iclass 18, count 0 2006.232.07:20:19.31#ibcon#about to read 4, iclass 18, count 0 2006.232.07:20:19.31#ibcon#read 4, iclass 18, count 0 2006.232.07:20:19.31#ibcon#about to read 5, iclass 18, count 0 2006.232.07:20:19.31#ibcon#read 5, iclass 18, count 0 2006.232.07:20:19.31#ibcon#about to read 6, iclass 18, count 0 2006.232.07:20:19.31#ibcon#read 6, iclass 18, count 0 2006.232.07:20:19.31#ibcon#end of sib2, iclass 18, count 0 2006.232.07:20:19.31#ibcon#*after write, iclass 18, count 0 2006.232.07:20:19.31#ibcon#*before return 0, iclass 18, count 0 2006.232.07:20:19.31#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:20:19.31#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:20:19.31#ibcon#about to clear, iclass 18 cls_cnt 0 2006.232.07:20:19.31#ibcon#cleared, iclass 18 cls_cnt 0 2006.232.07:20:19.31$vc4f8/valo=8,852.99 2006.232.07:20:19.31#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.232.07:20:19.31#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.232.07:20:19.31#ibcon#ireg 17 cls_cnt 0 2006.232.07:20:19.31#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:20:19.31#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:20:19.31#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:20:19.31#ibcon#enter wrdev, iclass 20, count 0 2006.232.07:20:19.31#ibcon#first serial, iclass 20, count 0 2006.232.07:20:19.31#ibcon#enter sib2, iclass 20, count 0 2006.232.07:20:19.31#ibcon#flushed, iclass 20, count 0 2006.232.07:20:19.31#ibcon#about to write, iclass 20, count 0 2006.232.07:20:19.31#ibcon#wrote, iclass 20, count 0 2006.232.07:20:19.31#ibcon#about to read 3, iclass 20, count 0 2006.232.07:20:19.33#ibcon#read 3, iclass 20, count 0 2006.232.07:20:19.33#ibcon#about to read 4, iclass 20, count 0 2006.232.07:20:19.33#ibcon#read 4, iclass 20, count 0 2006.232.07:20:19.33#ibcon#about to read 5, iclass 20, count 0 2006.232.07:20:19.33#ibcon#read 5, iclass 20, count 0 2006.232.07:20:19.33#ibcon#about to read 6, iclass 20, count 0 2006.232.07:20:19.33#ibcon#read 6, iclass 20, count 0 2006.232.07:20:19.33#ibcon#end of sib2, iclass 20, count 0 2006.232.07:20:19.33#ibcon#*mode == 0, iclass 20, count 0 2006.232.07:20:19.33#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.232.07:20:19.33#ibcon#[26=FRQ=08,852.99\r\n] 2006.232.07:20:19.33#ibcon#*before write, iclass 20, count 0 2006.232.07:20:19.33#ibcon#enter sib2, iclass 20, count 0 2006.232.07:20:19.33#ibcon#flushed, iclass 20, count 0 2006.232.07:20:19.33#ibcon#about to write, iclass 20, count 0 2006.232.07:20:19.33#ibcon#wrote, iclass 20, count 0 2006.232.07:20:19.33#ibcon#about to read 3, iclass 20, count 0 2006.232.07:20:19.37#ibcon#read 3, iclass 20, count 0 2006.232.07:20:19.37#ibcon#about to read 4, iclass 20, count 0 2006.232.07:20:19.37#ibcon#read 4, iclass 20, count 0 2006.232.07:20:19.37#ibcon#about to read 5, iclass 20, count 0 2006.232.07:20:19.37#ibcon#read 5, iclass 20, count 0 2006.232.07:20:19.37#ibcon#about to read 6, iclass 20, count 0 2006.232.07:20:19.37#ibcon#read 6, iclass 20, count 0 2006.232.07:20:19.37#ibcon#end of sib2, iclass 20, count 0 2006.232.07:20:19.37#ibcon#*after write, iclass 20, count 0 2006.232.07:20:19.37#ibcon#*before return 0, iclass 20, count 0 2006.232.07:20:19.37#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:20:19.37#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:20:19.37#ibcon#about to clear, iclass 20 cls_cnt 0 2006.232.07:20:19.37#ibcon#cleared, iclass 20 cls_cnt 0 2006.232.07:20:19.37$vc4f8/va=8,6 2006.232.07:20:19.37#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.232.07:20:19.37#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.232.07:20:19.37#ibcon#ireg 11 cls_cnt 2 2006.232.07:20:19.37#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:20:19.43#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:20:19.43#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:20:19.43#ibcon#enter wrdev, iclass 22, count 2 2006.232.07:20:19.43#ibcon#first serial, iclass 22, count 2 2006.232.07:20:19.43#ibcon#enter sib2, iclass 22, count 2 2006.232.07:20:19.43#ibcon#flushed, iclass 22, count 2 2006.232.07:20:19.43#ibcon#about to write, iclass 22, count 2 2006.232.07:20:19.43#ibcon#wrote, iclass 22, count 2 2006.232.07:20:19.43#ibcon#about to read 3, iclass 22, count 2 2006.232.07:20:19.45#ibcon#read 3, iclass 22, count 2 2006.232.07:20:19.45#ibcon#about to read 4, iclass 22, count 2 2006.232.07:20:19.45#ibcon#read 4, iclass 22, count 2 2006.232.07:20:19.45#ibcon#about to read 5, iclass 22, count 2 2006.232.07:20:19.45#ibcon#read 5, iclass 22, count 2 2006.232.07:20:19.45#ibcon#about to read 6, iclass 22, count 2 2006.232.07:20:19.45#ibcon#read 6, iclass 22, count 2 2006.232.07:20:19.45#ibcon#end of sib2, iclass 22, count 2 2006.232.07:20:19.45#ibcon#*mode == 0, iclass 22, count 2 2006.232.07:20:19.45#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.232.07:20:19.45#ibcon#[25=AT08-06\r\n] 2006.232.07:20:19.45#ibcon#*before write, iclass 22, count 2 2006.232.07:20:19.45#ibcon#enter sib2, iclass 22, count 2 2006.232.07:20:19.45#ibcon#flushed, iclass 22, count 2 2006.232.07:20:19.45#ibcon#about to write, iclass 22, count 2 2006.232.07:20:19.45#ibcon#wrote, iclass 22, count 2 2006.232.07:20:19.45#ibcon#about to read 3, iclass 22, count 2 2006.232.07:20:19.48#ibcon#read 3, iclass 22, count 2 2006.232.07:20:19.48#ibcon#about to read 4, iclass 22, count 2 2006.232.07:20:19.48#ibcon#read 4, iclass 22, count 2 2006.232.07:20:19.48#ibcon#about to read 5, iclass 22, count 2 2006.232.07:20:19.48#ibcon#read 5, iclass 22, count 2 2006.232.07:20:19.48#ibcon#about to read 6, iclass 22, count 2 2006.232.07:20:19.48#ibcon#read 6, iclass 22, count 2 2006.232.07:20:19.48#ibcon#end of sib2, iclass 22, count 2 2006.232.07:20:19.48#ibcon#*after write, iclass 22, count 2 2006.232.07:20:19.48#ibcon#*before return 0, iclass 22, count 2 2006.232.07:20:19.48#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:20:19.48#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:20:19.48#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.232.07:20:19.48#ibcon#ireg 7 cls_cnt 0 2006.232.07:20:19.48#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:20:19.60#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:20:19.60#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:20:19.60#ibcon#enter wrdev, iclass 22, count 0 2006.232.07:20:19.60#ibcon#first serial, iclass 22, count 0 2006.232.07:20:19.60#ibcon#enter sib2, iclass 22, count 0 2006.232.07:20:19.60#ibcon#flushed, iclass 22, count 0 2006.232.07:20:19.60#ibcon#about to write, iclass 22, count 0 2006.232.07:20:19.60#ibcon#wrote, iclass 22, count 0 2006.232.07:20:19.60#ibcon#about to read 3, iclass 22, count 0 2006.232.07:20:19.62#ibcon#read 3, iclass 22, count 0 2006.232.07:20:19.62#ibcon#about to read 4, iclass 22, count 0 2006.232.07:20:19.62#ibcon#read 4, iclass 22, count 0 2006.232.07:20:19.62#ibcon#about to read 5, iclass 22, count 0 2006.232.07:20:19.62#ibcon#read 5, iclass 22, count 0 2006.232.07:20:19.62#ibcon#about to read 6, iclass 22, count 0 2006.232.07:20:19.62#ibcon#read 6, iclass 22, count 0 2006.232.07:20:19.62#ibcon#end of sib2, iclass 22, count 0 2006.232.07:20:19.62#ibcon#*mode == 0, iclass 22, count 0 2006.232.07:20:19.62#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.232.07:20:19.62#ibcon#[25=USB\r\n] 2006.232.07:20:19.62#ibcon#*before write, iclass 22, count 0 2006.232.07:20:19.62#ibcon#enter sib2, iclass 22, count 0 2006.232.07:20:19.62#ibcon#flushed, iclass 22, count 0 2006.232.07:20:19.62#ibcon#about to write, iclass 22, count 0 2006.232.07:20:19.62#ibcon#wrote, iclass 22, count 0 2006.232.07:20:19.62#ibcon#about to read 3, iclass 22, count 0 2006.232.07:20:19.65#ibcon#read 3, iclass 22, count 0 2006.232.07:20:19.65#ibcon#about to read 4, iclass 22, count 0 2006.232.07:20:19.65#ibcon#read 4, iclass 22, count 0 2006.232.07:20:19.65#ibcon#about to read 5, iclass 22, count 0 2006.232.07:20:19.65#ibcon#read 5, iclass 22, count 0 2006.232.07:20:19.65#ibcon#about to read 6, iclass 22, count 0 2006.232.07:20:19.65#ibcon#read 6, iclass 22, count 0 2006.232.07:20:19.65#ibcon#end of sib2, iclass 22, count 0 2006.232.07:20:19.65#ibcon#*after write, iclass 22, count 0 2006.232.07:20:19.65#ibcon#*before return 0, iclass 22, count 0 2006.232.07:20:19.65#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:20:19.65#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:20:19.65#ibcon#about to clear, iclass 22 cls_cnt 0 2006.232.07:20:19.65#ibcon#cleared, iclass 22 cls_cnt 0 2006.232.07:20:19.65$vc4f8/vblo=1,632.99 2006.232.07:20:19.65#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.232.07:20:19.65#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.232.07:20:19.65#ibcon#ireg 17 cls_cnt 0 2006.232.07:20:19.65#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:20:19.65#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:20:19.65#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:20:19.65#ibcon#enter wrdev, iclass 24, count 0 2006.232.07:20:19.65#ibcon#first serial, iclass 24, count 0 2006.232.07:20:19.65#ibcon#enter sib2, iclass 24, count 0 2006.232.07:20:19.65#ibcon#flushed, iclass 24, count 0 2006.232.07:20:19.65#ibcon#about to write, iclass 24, count 0 2006.232.07:20:19.65#ibcon#wrote, iclass 24, count 0 2006.232.07:20:19.65#ibcon#about to read 3, iclass 24, count 0 2006.232.07:20:19.67#ibcon#read 3, iclass 24, count 0 2006.232.07:20:19.67#ibcon#about to read 4, iclass 24, count 0 2006.232.07:20:19.67#ibcon#read 4, iclass 24, count 0 2006.232.07:20:19.67#ibcon#about to read 5, iclass 24, count 0 2006.232.07:20:19.67#ibcon#read 5, iclass 24, count 0 2006.232.07:20:19.67#ibcon#about to read 6, iclass 24, count 0 2006.232.07:20:19.67#ibcon#read 6, iclass 24, count 0 2006.232.07:20:19.67#ibcon#end of sib2, iclass 24, count 0 2006.232.07:20:19.67#ibcon#*mode == 0, iclass 24, count 0 2006.232.07:20:19.67#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.232.07:20:19.67#ibcon#[28=FRQ=01,632.99\r\n] 2006.232.07:20:19.67#ibcon#*before write, iclass 24, count 0 2006.232.07:20:19.67#ibcon#enter sib2, iclass 24, count 0 2006.232.07:20:19.67#ibcon#flushed, iclass 24, count 0 2006.232.07:20:19.67#ibcon#about to write, iclass 24, count 0 2006.232.07:20:19.67#ibcon#wrote, iclass 24, count 0 2006.232.07:20:19.67#ibcon#about to read 3, iclass 24, count 0 2006.232.07:20:19.71#ibcon#read 3, iclass 24, count 0 2006.232.07:20:19.71#ibcon#about to read 4, iclass 24, count 0 2006.232.07:20:19.71#ibcon#read 4, iclass 24, count 0 2006.232.07:20:19.71#ibcon#about to read 5, iclass 24, count 0 2006.232.07:20:19.71#ibcon#read 5, iclass 24, count 0 2006.232.07:20:19.71#ibcon#about to read 6, iclass 24, count 0 2006.232.07:20:19.71#ibcon#read 6, iclass 24, count 0 2006.232.07:20:19.71#ibcon#end of sib2, iclass 24, count 0 2006.232.07:20:19.71#ibcon#*after write, iclass 24, count 0 2006.232.07:20:19.71#ibcon#*before return 0, iclass 24, count 0 2006.232.07:20:19.71#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:20:19.71#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:20:19.71#ibcon#about to clear, iclass 24 cls_cnt 0 2006.232.07:20:19.71#ibcon#cleared, iclass 24 cls_cnt 0 2006.232.07:20:19.71$vc4f8/vb=1,4 2006.232.07:20:19.71#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.232.07:20:19.71#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.232.07:20:19.71#ibcon#ireg 11 cls_cnt 2 2006.232.07:20:19.71#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:20:19.71#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:20:19.71#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:20:19.71#ibcon#enter wrdev, iclass 26, count 2 2006.232.07:20:19.71#ibcon#first serial, iclass 26, count 2 2006.232.07:20:19.71#ibcon#enter sib2, iclass 26, count 2 2006.232.07:20:19.71#ibcon#flushed, iclass 26, count 2 2006.232.07:20:19.71#ibcon#about to write, iclass 26, count 2 2006.232.07:20:19.71#ibcon#wrote, iclass 26, count 2 2006.232.07:20:19.71#ibcon#about to read 3, iclass 26, count 2 2006.232.07:20:19.73#ibcon#read 3, iclass 26, count 2 2006.232.07:20:19.73#ibcon#about to read 4, iclass 26, count 2 2006.232.07:20:19.73#ibcon#read 4, iclass 26, count 2 2006.232.07:20:19.73#ibcon#about to read 5, iclass 26, count 2 2006.232.07:20:19.73#ibcon#read 5, iclass 26, count 2 2006.232.07:20:19.73#ibcon#about to read 6, iclass 26, count 2 2006.232.07:20:19.73#ibcon#read 6, iclass 26, count 2 2006.232.07:20:19.73#ibcon#end of sib2, iclass 26, count 2 2006.232.07:20:19.73#ibcon#*mode == 0, iclass 26, count 2 2006.232.07:20:19.73#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.232.07:20:19.73#ibcon#[27=AT01-04\r\n] 2006.232.07:20:19.73#ibcon#*before write, iclass 26, count 2 2006.232.07:20:19.73#ibcon#enter sib2, iclass 26, count 2 2006.232.07:20:19.73#ibcon#flushed, iclass 26, count 2 2006.232.07:20:19.73#ibcon#about to write, iclass 26, count 2 2006.232.07:20:19.73#ibcon#wrote, iclass 26, count 2 2006.232.07:20:19.73#ibcon#about to read 3, iclass 26, count 2 2006.232.07:20:19.76#ibcon#read 3, iclass 26, count 2 2006.232.07:20:19.76#ibcon#about to read 4, iclass 26, count 2 2006.232.07:20:19.76#ibcon#read 4, iclass 26, count 2 2006.232.07:20:19.76#ibcon#about to read 5, iclass 26, count 2 2006.232.07:20:19.76#ibcon#read 5, iclass 26, count 2 2006.232.07:20:19.76#ibcon#about to read 6, iclass 26, count 2 2006.232.07:20:19.76#ibcon#read 6, iclass 26, count 2 2006.232.07:20:19.76#ibcon#end of sib2, iclass 26, count 2 2006.232.07:20:19.76#ibcon#*after write, iclass 26, count 2 2006.232.07:20:19.76#ibcon#*before return 0, iclass 26, count 2 2006.232.07:20:19.76#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:20:19.76#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:20:19.76#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.232.07:20:19.76#ibcon#ireg 7 cls_cnt 0 2006.232.07:20:19.76#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:20:19.88#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:20:19.88#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:20:19.88#ibcon#enter wrdev, iclass 26, count 0 2006.232.07:20:19.88#ibcon#first serial, iclass 26, count 0 2006.232.07:20:19.88#ibcon#enter sib2, iclass 26, count 0 2006.232.07:20:19.88#ibcon#flushed, iclass 26, count 0 2006.232.07:20:19.88#ibcon#about to write, iclass 26, count 0 2006.232.07:20:19.88#ibcon#wrote, iclass 26, count 0 2006.232.07:20:19.88#ibcon#about to read 3, iclass 26, count 0 2006.232.07:20:19.90#ibcon#read 3, iclass 26, count 0 2006.232.07:20:19.90#ibcon#about to read 4, iclass 26, count 0 2006.232.07:20:19.90#ibcon#read 4, iclass 26, count 0 2006.232.07:20:19.90#ibcon#about to read 5, iclass 26, count 0 2006.232.07:20:19.90#ibcon#read 5, iclass 26, count 0 2006.232.07:20:19.90#ibcon#about to read 6, iclass 26, count 0 2006.232.07:20:19.90#ibcon#read 6, iclass 26, count 0 2006.232.07:20:19.90#ibcon#end of sib2, iclass 26, count 0 2006.232.07:20:19.90#ibcon#*mode == 0, iclass 26, count 0 2006.232.07:20:19.90#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.232.07:20:19.90#ibcon#[27=USB\r\n] 2006.232.07:20:19.90#ibcon#*before write, iclass 26, count 0 2006.232.07:20:19.90#ibcon#enter sib2, iclass 26, count 0 2006.232.07:20:19.90#ibcon#flushed, iclass 26, count 0 2006.232.07:20:19.90#ibcon#about to write, iclass 26, count 0 2006.232.07:20:19.90#ibcon#wrote, iclass 26, count 0 2006.232.07:20:19.90#ibcon#about to read 3, iclass 26, count 0 2006.232.07:20:19.93#ibcon#read 3, iclass 26, count 0 2006.232.07:20:19.93#ibcon#about to read 4, iclass 26, count 0 2006.232.07:20:19.93#ibcon#read 4, iclass 26, count 0 2006.232.07:20:19.93#ibcon#about to read 5, iclass 26, count 0 2006.232.07:20:19.93#ibcon#read 5, iclass 26, count 0 2006.232.07:20:19.93#ibcon#about to read 6, iclass 26, count 0 2006.232.07:20:19.93#ibcon#read 6, iclass 26, count 0 2006.232.07:20:19.93#ibcon#end of sib2, iclass 26, count 0 2006.232.07:20:19.93#ibcon#*after write, iclass 26, count 0 2006.232.07:20:19.93#ibcon#*before return 0, iclass 26, count 0 2006.232.07:20:19.93#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:20:19.93#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:20:19.93#ibcon#about to clear, iclass 26 cls_cnt 0 2006.232.07:20:19.93#ibcon#cleared, iclass 26 cls_cnt 0 2006.232.07:20:19.93$vc4f8/vblo=2,640.99 2006.232.07:20:19.93#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.232.07:20:19.93#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.232.07:20:19.93#ibcon#ireg 17 cls_cnt 0 2006.232.07:20:19.93#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:20:19.93#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:20:19.93#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:20:19.93#ibcon#enter wrdev, iclass 28, count 0 2006.232.07:20:19.93#ibcon#first serial, iclass 28, count 0 2006.232.07:20:19.93#ibcon#enter sib2, iclass 28, count 0 2006.232.07:20:19.93#ibcon#flushed, iclass 28, count 0 2006.232.07:20:19.93#ibcon#about to write, iclass 28, count 0 2006.232.07:20:19.93#ibcon#wrote, iclass 28, count 0 2006.232.07:20:19.93#ibcon#about to read 3, iclass 28, count 0 2006.232.07:20:19.95#ibcon#read 3, iclass 28, count 0 2006.232.07:20:19.95#ibcon#about to read 4, iclass 28, count 0 2006.232.07:20:19.95#ibcon#read 4, iclass 28, count 0 2006.232.07:20:19.95#ibcon#about to read 5, iclass 28, count 0 2006.232.07:20:19.95#ibcon#read 5, iclass 28, count 0 2006.232.07:20:19.95#ibcon#about to read 6, iclass 28, count 0 2006.232.07:20:19.95#ibcon#read 6, iclass 28, count 0 2006.232.07:20:19.95#ibcon#end of sib2, iclass 28, count 0 2006.232.07:20:19.95#ibcon#*mode == 0, iclass 28, count 0 2006.232.07:20:19.95#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.232.07:20:19.95#ibcon#[28=FRQ=02,640.99\r\n] 2006.232.07:20:19.95#ibcon#*before write, iclass 28, count 0 2006.232.07:20:19.95#ibcon#enter sib2, iclass 28, count 0 2006.232.07:20:19.95#ibcon#flushed, iclass 28, count 0 2006.232.07:20:19.95#ibcon#about to write, iclass 28, count 0 2006.232.07:20:19.95#ibcon#wrote, iclass 28, count 0 2006.232.07:20:19.95#ibcon#about to read 3, iclass 28, count 0 2006.232.07:20:19.99#ibcon#read 3, iclass 28, count 0 2006.232.07:20:19.99#ibcon#about to read 4, iclass 28, count 0 2006.232.07:20:19.99#ibcon#read 4, iclass 28, count 0 2006.232.07:20:19.99#ibcon#about to read 5, iclass 28, count 0 2006.232.07:20:19.99#ibcon#read 5, iclass 28, count 0 2006.232.07:20:19.99#ibcon#about to read 6, iclass 28, count 0 2006.232.07:20:19.99#ibcon#read 6, iclass 28, count 0 2006.232.07:20:19.99#ibcon#end of sib2, iclass 28, count 0 2006.232.07:20:19.99#ibcon#*after write, iclass 28, count 0 2006.232.07:20:19.99#ibcon#*before return 0, iclass 28, count 0 2006.232.07:20:19.99#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:20:19.99#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:20:19.99#ibcon#about to clear, iclass 28 cls_cnt 0 2006.232.07:20:19.99#ibcon#cleared, iclass 28 cls_cnt 0 2006.232.07:20:19.99$vc4f8/vb=2,4 2006.232.07:20:19.99#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.232.07:20:19.99#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.232.07:20:19.99#ibcon#ireg 11 cls_cnt 2 2006.232.07:20:19.99#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:20:20.05#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:20:20.05#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:20:20.05#ibcon#enter wrdev, iclass 30, count 2 2006.232.07:20:20.05#ibcon#first serial, iclass 30, count 2 2006.232.07:20:20.05#ibcon#enter sib2, iclass 30, count 2 2006.232.07:20:20.05#ibcon#flushed, iclass 30, count 2 2006.232.07:20:20.05#ibcon#about to write, iclass 30, count 2 2006.232.07:20:20.05#ibcon#wrote, iclass 30, count 2 2006.232.07:20:20.05#ibcon#about to read 3, iclass 30, count 2 2006.232.07:20:20.07#ibcon#read 3, iclass 30, count 2 2006.232.07:20:20.07#ibcon#about to read 4, iclass 30, count 2 2006.232.07:20:20.07#ibcon#read 4, iclass 30, count 2 2006.232.07:20:20.07#ibcon#about to read 5, iclass 30, count 2 2006.232.07:20:20.07#ibcon#read 5, iclass 30, count 2 2006.232.07:20:20.07#ibcon#about to read 6, iclass 30, count 2 2006.232.07:20:20.07#ibcon#read 6, iclass 30, count 2 2006.232.07:20:20.07#ibcon#end of sib2, iclass 30, count 2 2006.232.07:20:20.07#ibcon#*mode == 0, iclass 30, count 2 2006.232.07:20:20.07#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.232.07:20:20.07#ibcon#[27=AT02-04\r\n] 2006.232.07:20:20.07#ibcon#*before write, iclass 30, count 2 2006.232.07:20:20.07#ibcon#enter sib2, iclass 30, count 2 2006.232.07:20:20.07#ibcon#flushed, iclass 30, count 2 2006.232.07:20:20.07#ibcon#about to write, iclass 30, count 2 2006.232.07:20:20.07#ibcon#wrote, iclass 30, count 2 2006.232.07:20:20.07#ibcon#about to read 3, iclass 30, count 2 2006.232.07:20:20.10#ibcon#read 3, iclass 30, count 2 2006.232.07:20:20.10#ibcon#about to read 4, iclass 30, count 2 2006.232.07:20:20.10#ibcon#read 4, iclass 30, count 2 2006.232.07:20:20.10#ibcon#about to read 5, iclass 30, count 2 2006.232.07:20:20.10#ibcon#read 5, iclass 30, count 2 2006.232.07:20:20.10#ibcon#about to read 6, iclass 30, count 2 2006.232.07:20:20.10#ibcon#read 6, iclass 30, count 2 2006.232.07:20:20.10#ibcon#end of sib2, iclass 30, count 2 2006.232.07:20:20.10#ibcon#*after write, iclass 30, count 2 2006.232.07:20:20.10#ibcon#*before return 0, iclass 30, count 2 2006.232.07:20:20.10#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:20:20.10#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:20:20.10#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.232.07:20:20.10#ibcon#ireg 7 cls_cnt 0 2006.232.07:20:20.10#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:20:20.22#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:20:20.22#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:20:20.22#ibcon#enter wrdev, iclass 30, count 0 2006.232.07:20:20.22#ibcon#first serial, iclass 30, count 0 2006.232.07:20:20.22#ibcon#enter sib2, iclass 30, count 0 2006.232.07:20:20.22#ibcon#flushed, iclass 30, count 0 2006.232.07:20:20.22#ibcon#about to write, iclass 30, count 0 2006.232.07:20:20.22#ibcon#wrote, iclass 30, count 0 2006.232.07:20:20.22#ibcon#about to read 3, iclass 30, count 0 2006.232.07:20:20.24#ibcon#read 3, iclass 30, count 0 2006.232.07:20:20.24#ibcon#about to read 4, iclass 30, count 0 2006.232.07:20:20.24#ibcon#read 4, iclass 30, count 0 2006.232.07:20:20.24#ibcon#about to read 5, iclass 30, count 0 2006.232.07:20:20.24#ibcon#read 5, iclass 30, count 0 2006.232.07:20:20.24#ibcon#about to read 6, iclass 30, count 0 2006.232.07:20:20.24#ibcon#read 6, iclass 30, count 0 2006.232.07:20:20.24#ibcon#end of sib2, iclass 30, count 0 2006.232.07:20:20.24#ibcon#*mode == 0, iclass 30, count 0 2006.232.07:20:20.24#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.232.07:20:20.24#ibcon#[27=USB\r\n] 2006.232.07:20:20.24#ibcon#*before write, iclass 30, count 0 2006.232.07:20:20.24#ibcon#enter sib2, iclass 30, count 0 2006.232.07:20:20.24#ibcon#flushed, iclass 30, count 0 2006.232.07:20:20.24#ibcon#about to write, iclass 30, count 0 2006.232.07:20:20.24#ibcon#wrote, iclass 30, count 0 2006.232.07:20:20.24#ibcon#about to read 3, iclass 30, count 0 2006.232.07:20:20.27#ibcon#read 3, iclass 30, count 0 2006.232.07:20:20.27#ibcon#about to read 4, iclass 30, count 0 2006.232.07:20:20.27#ibcon#read 4, iclass 30, count 0 2006.232.07:20:20.27#ibcon#about to read 5, iclass 30, count 0 2006.232.07:20:20.27#ibcon#read 5, iclass 30, count 0 2006.232.07:20:20.27#ibcon#about to read 6, iclass 30, count 0 2006.232.07:20:20.27#ibcon#read 6, iclass 30, count 0 2006.232.07:20:20.27#ibcon#end of sib2, iclass 30, count 0 2006.232.07:20:20.27#ibcon#*after write, iclass 30, count 0 2006.232.07:20:20.27#ibcon#*before return 0, iclass 30, count 0 2006.232.07:20:20.27#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:20:20.27#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:20:20.27#ibcon#about to clear, iclass 30 cls_cnt 0 2006.232.07:20:20.27#ibcon#cleared, iclass 30 cls_cnt 0 2006.232.07:20:20.27$vc4f8/vblo=3,656.99 2006.232.07:20:20.27#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.232.07:20:20.27#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.232.07:20:20.27#ibcon#ireg 17 cls_cnt 0 2006.232.07:20:20.27#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:20:20.27#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:20:20.27#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:20:20.27#ibcon#enter wrdev, iclass 32, count 0 2006.232.07:20:20.27#ibcon#first serial, iclass 32, count 0 2006.232.07:20:20.27#ibcon#enter sib2, iclass 32, count 0 2006.232.07:20:20.27#ibcon#flushed, iclass 32, count 0 2006.232.07:20:20.27#ibcon#about to write, iclass 32, count 0 2006.232.07:20:20.27#ibcon#wrote, iclass 32, count 0 2006.232.07:20:20.27#ibcon#about to read 3, iclass 32, count 0 2006.232.07:20:20.29#ibcon#read 3, iclass 32, count 0 2006.232.07:20:20.29#ibcon#about to read 4, iclass 32, count 0 2006.232.07:20:20.29#ibcon#read 4, iclass 32, count 0 2006.232.07:20:20.29#ibcon#about to read 5, iclass 32, count 0 2006.232.07:20:20.29#ibcon#read 5, iclass 32, count 0 2006.232.07:20:20.29#ibcon#about to read 6, iclass 32, count 0 2006.232.07:20:20.29#ibcon#read 6, iclass 32, count 0 2006.232.07:20:20.29#ibcon#end of sib2, iclass 32, count 0 2006.232.07:20:20.29#ibcon#*mode == 0, iclass 32, count 0 2006.232.07:20:20.29#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.232.07:20:20.29#ibcon#[28=FRQ=03,656.99\r\n] 2006.232.07:20:20.29#ibcon#*before write, iclass 32, count 0 2006.232.07:20:20.29#ibcon#enter sib2, iclass 32, count 0 2006.232.07:20:20.29#ibcon#flushed, iclass 32, count 0 2006.232.07:20:20.29#ibcon#about to write, iclass 32, count 0 2006.232.07:20:20.29#ibcon#wrote, iclass 32, count 0 2006.232.07:20:20.29#ibcon#about to read 3, iclass 32, count 0 2006.232.07:20:20.33#ibcon#read 3, iclass 32, count 0 2006.232.07:20:20.33#ibcon#about to read 4, iclass 32, count 0 2006.232.07:20:20.33#ibcon#read 4, iclass 32, count 0 2006.232.07:20:20.33#ibcon#about to read 5, iclass 32, count 0 2006.232.07:20:20.33#ibcon#read 5, iclass 32, count 0 2006.232.07:20:20.33#ibcon#about to read 6, iclass 32, count 0 2006.232.07:20:20.33#ibcon#read 6, iclass 32, count 0 2006.232.07:20:20.33#ibcon#end of sib2, iclass 32, count 0 2006.232.07:20:20.33#ibcon#*after write, iclass 32, count 0 2006.232.07:20:20.33#ibcon#*before return 0, iclass 32, count 0 2006.232.07:20:20.33#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:20:20.33#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:20:20.33#ibcon#about to clear, iclass 32 cls_cnt 0 2006.232.07:20:20.33#ibcon#cleared, iclass 32 cls_cnt 0 2006.232.07:20:20.33$vc4f8/vb=3,4 2006.232.07:20:20.33#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.232.07:20:20.33#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.232.07:20:20.33#ibcon#ireg 11 cls_cnt 2 2006.232.07:20:20.33#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:20:20.39#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:20:20.39#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:20:20.39#ibcon#enter wrdev, iclass 34, count 2 2006.232.07:20:20.39#ibcon#first serial, iclass 34, count 2 2006.232.07:20:20.39#ibcon#enter sib2, iclass 34, count 2 2006.232.07:20:20.39#ibcon#flushed, iclass 34, count 2 2006.232.07:20:20.39#ibcon#about to write, iclass 34, count 2 2006.232.07:20:20.39#ibcon#wrote, iclass 34, count 2 2006.232.07:20:20.39#ibcon#about to read 3, iclass 34, count 2 2006.232.07:20:20.41#ibcon#read 3, iclass 34, count 2 2006.232.07:20:20.41#ibcon#about to read 4, iclass 34, count 2 2006.232.07:20:20.41#ibcon#read 4, iclass 34, count 2 2006.232.07:20:20.41#ibcon#about to read 5, iclass 34, count 2 2006.232.07:20:20.41#ibcon#read 5, iclass 34, count 2 2006.232.07:20:20.41#ibcon#about to read 6, iclass 34, count 2 2006.232.07:20:20.41#ibcon#read 6, iclass 34, count 2 2006.232.07:20:20.41#ibcon#end of sib2, iclass 34, count 2 2006.232.07:20:20.41#ibcon#*mode == 0, iclass 34, count 2 2006.232.07:20:20.41#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.232.07:20:20.41#ibcon#[27=AT03-04\r\n] 2006.232.07:20:20.41#ibcon#*before write, iclass 34, count 2 2006.232.07:20:20.41#ibcon#enter sib2, iclass 34, count 2 2006.232.07:20:20.41#ibcon#flushed, iclass 34, count 2 2006.232.07:20:20.41#ibcon#about to write, iclass 34, count 2 2006.232.07:20:20.41#ibcon#wrote, iclass 34, count 2 2006.232.07:20:20.41#ibcon#about to read 3, iclass 34, count 2 2006.232.07:20:20.44#ibcon#read 3, iclass 34, count 2 2006.232.07:20:20.44#ibcon#about to read 4, iclass 34, count 2 2006.232.07:20:20.44#ibcon#read 4, iclass 34, count 2 2006.232.07:20:20.44#ibcon#about to read 5, iclass 34, count 2 2006.232.07:20:20.44#ibcon#read 5, iclass 34, count 2 2006.232.07:20:20.44#ibcon#about to read 6, iclass 34, count 2 2006.232.07:20:20.44#ibcon#read 6, iclass 34, count 2 2006.232.07:20:20.44#ibcon#end of sib2, iclass 34, count 2 2006.232.07:20:20.44#ibcon#*after write, iclass 34, count 2 2006.232.07:20:20.44#ibcon#*before return 0, iclass 34, count 2 2006.232.07:20:20.44#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:20:20.44#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:20:20.44#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.232.07:20:20.44#ibcon#ireg 7 cls_cnt 0 2006.232.07:20:20.44#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:20:20.56#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:20:20.56#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:20:20.56#ibcon#enter wrdev, iclass 34, count 0 2006.232.07:20:20.56#ibcon#first serial, iclass 34, count 0 2006.232.07:20:20.56#ibcon#enter sib2, iclass 34, count 0 2006.232.07:20:20.56#ibcon#flushed, iclass 34, count 0 2006.232.07:20:20.56#ibcon#about to write, iclass 34, count 0 2006.232.07:20:20.56#ibcon#wrote, iclass 34, count 0 2006.232.07:20:20.56#ibcon#about to read 3, iclass 34, count 0 2006.232.07:20:20.58#ibcon#read 3, iclass 34, count 0 2006.232.07:20:20.58#ibcon#about to read 4, iclass 34, count 0 2006.232.07:20:20.58#ibcon#read 4, iclass 34, count 0 2006.232.07:20:20.58#ibcon#about to read 5, iclass 34, count 0 2006.232.07:20:20.58#ibcon#read 5, iclass 34, count 0 2006.232.07:20:20.58#ibcon#about to read 6, iclass 34, count 0 2006.232.07:20:20.58#ibcon#read 6, iclass 34, count 0 2006.232.07:20:20.58#ibcon#end of sib2, iclass 34, count 0 2006.232.07:20:20.58#ibcon#*mode == 0, iclass 34, count 0 2006.232.07:20:20.58#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.232.07:20:20.58#ibcon#[27=USB\r\n] 2006.232.07:20:20.58#ibcon#*before write, iclass 34, count 0 2006.232.07:20:20.58#ibcon#enter sib2, iclass 34, count 0 2006.232.07:20:20.58#ibcon#flushed, iclass 34, count 0 2006.232.07:20:20.58#ibcon#about to write, iclass 34, count 0 2006.232.07:20:20.58#ibcon#wrote, iclass 34, count 0 2006.232.07:20:20.58#ibcon#about to read 3, iclass 34, count 0 2006.232.07:20:20.61#ibcon#read 3, iclass 34, count 0 2006.232.07:20:20.61#ibcon#about to read 4, iclass 34, count 0 2006.232.07:20:20.61#ibcon#read 4, iclass 34, count 0 2006.232.07:20:20.61#ibcon#about to read 5, iclass 34, count 0 2006.232.07:20:20.61#ibcon#read 5, iclass 34, count 0 2006.232.07:20:20.61#ibcon#about to read 6, iclass 34, count 0 2006.232.07:20:20.61#ibcon#read 6, iclass 34, count 0 2006.232.07:20:20.61#ibcon#end of sib2, iclass 34, count 0 2006.232.07:20:20.61#ibcon#*after write, iclass 34, count 0 2006.232.07:20:20.61#ibcon#*before return 0, iclass 34, count 0 2006.232.07:20:20.61#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:20:20.61#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:20:20.61#ibcon#about to clear, iclass 34 cls_cnt 0 2006.232.07:20:20.61#ibcon#cleared, iclass 34 cls_cnt 0 2006.232.07:20:20.61$vc4f8/vblo=4,712.99 2006.232.07:20:20.61#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.232.07:20:20.61#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.232.07:20:20.61#ibcon#ireg 17 cls_cnt 0 2006.232.07:20:20.61#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:20:20.61#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:20:20.61#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:20:20.61#ibcon#enter wrdev, iclass 36, count 0 2006.232.07:20:20.61#ibcon#first serial, iclass 36, count 0 2006.232.07:20:20.61#ibcon#enter sib2, iclass 36, count 0 2006.232.07:20:20.61#ibcon#flushed, iclass 36, count 0 2006.232.07:20:20.61#ibcon#about to write, iclass 36, count 0 2006.232.07:20:20.61#ibcon#wrote, iclass 36, count 0 2006.232.07:20:20.61#ibcon#about to read 3, iclass 36, count 0 2006.232.07:20:20.63#ibcon#read 3, iclass 36, count 0 2006.232.07:20:20.63#ibcon#about to read 4, iclass 36, count 0 2006.232.07:20:20.63#ibcon#read 4, iclass 36, count 0 2006.232.07:20:20.63#ibcon#about to read 5, iclass 36, count 0 2006.232.07:20:20.63#ibcon#read 5, iclass 36, count 0 2006.232.07:20:20.63#ibcon#about to read 6, iclass 36, count 0 2006.232.07:20:20.63#ibcon#read 6, iclass 36, count 0 2006.232.07:20:20.63#ibcon#end of sib2, iclass 36, count 0 2006.232.07:20:20.63#ibcon#*mode == 0, iclass 36, count 0 2006.232.07:20:20.63#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.232.07:20:20.63#ibcon#[28=FRQ=04,712.99\r\n] 2006.232.07:20:20.63#ibcon#*before write, iclass 36, count 0 2006.232.07:20:20.63#ibcon#enter sib2, iclass 36, count 0 2006.232.07:20:20.63#ibcon#flushed, iclass 36, count 0 2006.232.07:20:20.63#ibcon#about to write, iclass 36, count 0 2006.232.07:20:20.63#ibcon#wrote, iclass 36, count 0 2006.232.07:20:20.63#ibcon#about to read 3, iclass 36, count 0 2006.232.07:20:20.67#ibcon#read 3, iclass 36, count 0 2006.232.07:20:20.67#ibcon#about to read 4, iclass 36, count 0 2006.232.07:20:20.67#ibcon#read 4, iclass 36, count 0 2006.232.07:20:20.67#ibcon#about to read 5, iclass 36, count 0 2006.232.07:20:20.67#ibcon#read 5, iclass 36, count 0 2006.232.07:20:20.67#ibcon#about to read 6, iclass 36, count 0 2006.232.07:20:20.67#ibcon#read 6, iclass 36, count 0 2006.232.07:20:20.67#ibcon#end of sib2, iclass 36, count 0 2006.232.07:20:20.67#ibcon#*after write, iclass 36, count 0 2006.232.07:20:20.67#ibcon#*before return 0, iclass 36, count 0 2006.232.07:20:20.67#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:20:20.67#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:20:20.67#ibcon#about to clear, iclass 36 cls_cnt 0 2006.232.07:20:20.67#ibcon#cleared, iclass 36 cls_cnt 0 2006.232.07:20:20.67$vc4f8/vb=4,4 2006.232.07:20:20.67#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.232.07:20:20.67#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.232.07:20:20.67#ibcon#ireg 11 cls_cnt 2 2006.232.07:20:20.67#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.232.07:20:20.73#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.232.07:20:20.73#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.232.07:20:20.73#ibcon#enter wrdev, iclass 38, count 2 2006.232.07:20:20.73#ibcon#first serial, iclass 38, count 2 2006.232.07:20:20.73#ibcon#enter sib2, iclass 38, count 2 2006.232.07:20:20.73#ibcon#flushed, iclass 38, count 2 2006.232.07:20:20.73#ibcon#about to write, iclass 38, count 2 2006.232.07:20:20.73#ibcon#wrote, iclass 38, count 2 2006.232.07:20:20.73#ibcon#about to read 3, iclass 38, count 2 2006.232.07:20:20.76#ibcon#read 3, iclass 38, count 2 2006.232.07:20:20.76#ibcon#about to read 4, iclass 38, count 2 2006.232.07:20:20.76#ibcon#read 4, iclass 38, count 2 2006.232.07:20:20.76#ibcon#about to read 5, iclass 38, count 2 2006.232.07:20:20.76#ibcon#read 5, iclass 38, count 2 2006.232.07:20:20.76#ibcon#about to read 6, iclass 38, count 2 2006.232.07:20:20.76#ibcon#read 6, iclass 38, count 2 2006.232.07:20:20.76#ibcon#end of sib2, iclass 38, count 2 2006.232.07:20:20.76#ibcon#*mode == 0, iclass 38, count 2 2006.232.07:20:20.76#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.232.07:20:20.76#ibcon#[27=AT04-04\r\n] 2006.232.07:20:20.76#ibcon#*before write, iclass 38, count 2 2006.232.07:20:20.76#ibcon#enter sib2, iclass 38, count 2 2006.232.07:20:20.76#ibcon#flushed, iclass 38, count 2 2006.232.07:20:20.76#ibcon#about to write, iclass 38, count 2 2006.232.07:20:20.76#ibcon#wrote, iclass 38, count 2 2006.232.07:20:20.76#ibcon#about to read 3, iclass 38, count 2 2006.232.07:20:20.79#ibcon#read 3, iclass 38, count 2 2006.232.07:20:20.79#ibcon#about to read 4, iclass 38, count 2 2006.232.07:20:20.79#ibcon#read 4, iclass 38, count 2 2006.232.07:20:20.79#ibcon#about to read 5, iclass 38, count 2 2006.232.07:20:20.79#ibcon#read 5, iclass 38, count 2 2006.232.07:20:20.79#ibcon#about to read 6, iclass 38, count 2 2006.232.07:20:20.79#ibcon#read 6, iclass 38, count 2 2006.232.07:20:20.79#ibcon#end of sib2, iclass 38, count 2 2006.232.07:20:20.79#ibcon#*after write, iclass 38, count 2 2006.232.07:20:20.79#ibcon#*before return 0, iclass 38, count 2 2006.232.07:20:20.79#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.232.07:20:20.79#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.232.07:20:20.79#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.232.07:20:20.79#ibcon#ireg 7 cls_cnt 0 2006.232.07:20:20.79#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.232.07:20:20.91#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.232.07:20:20.91#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.232.07:20:20.91#ibcon#enter wrdev, iclass 38, count 0 2006.232.07:20:20.91#ibcon#first serial, iclass 38, count 0 2006.232.07:20:20.91#ibcon#enter sib2, iclass 38, count 0 2006.232.07:20:20.91#ibcon#flushed, iclass 38, count 0 2006.232.07:20:20.91#ibcon#about to write, iclass 38, count 0 2006.232.07:20:20.91#ibcon#wrote, iclass 38, count 0 2006.232.07:20:20.91#ibcon#about to read 3, iclass 38, count 0 2006.232.07:20:20.93#ibcon#read 3, iclass 38, count 0 2006.232.07:20:20.93#ibcon#about to read 4, iclass 38, count 0 2006.232.07:20:20.93#ibcon#read 4, iclass 38, count 0 2006.232.07:20:20.93#ibcon#about to read 5, iclass 38, count 0 2006.232.07:20:20.93#ibcon#read 5, iclass 38, count 0 2006.232.07:20:20.93#ibcon#about to read 6, iclass 38, count 0 2006.232.07:20:20.93#ibcon#read 6, iclass 38, count 0 2006.232.07:20:20.93#ibcon#end of sib2, iclass 38, count 0 2006.232.07:20:20.93#ibcon#*mode == 0, iclass 38, count 0 2006.232.07:20:20.93#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.232.07:20:20.93#ibcon#[27=USB\r\n] 2006.232.07:20:20.93#ibcon#*before write, iclass 38, count 0 2006.232.07:20:20.93#ibcon#enter sib2, iclass 38, count 0 2006.232.07:20:20.93#ibcon#flushed, iclass 38, count 0 2006.232.07:20:20.93#ibcon#about to write, iclass 38, count 0 2006.232.07:20:20.93#ibcon#wrote, iclass 38, count 0 2006.232.07:20:20.93#ibcon#about to read 3, iclass 38, count 0 2006.232.07:20:20.96#ibcon#read 3, iclass 38, count 0 2006.232.07:20:20.96#ibcon#about to read 4, iclass 38, count 0 2006.232.07:20:20.96#ibcon#read 4, iclass 38, count 0 2006.232.07:20:20.96#ibcon#about to read 5, iclass 38, count 0 2006.232.07:20:20.96#ibcon#read 5, iclass 38, count 0 2006.232.07:20:20.96#ibcon#about to read 6, iclass 38, count 0 2006.232.07:20:20.96#ibcon#read 6, iclass 38, count 0 2006.232.07:20:20.96#ibcon#end of sib2, iclass 38, count 0 2006.232.07:20:20.96#ibcon#*after write, iclass 38, count 0 2006.232.07:20:20.96#ibcon#*before return 0, iclass 38, count 0 2006.232.07:20:20.96#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.232.07:20:20.96#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.232.07:20:20.96#ibcon#about to clear, iclass 38 cls_cnt 0 2006.232.07:20:20.96#ibcon#cleared, iclass 38 cls_cnt 0 2006.232.07:20:20.96$vc4f8/vblo=5,744.99 2006.232.07:20:20.96#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.232.07:20:20.96#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.232.07:20:20.96#ibcon#ireg 17 cls_cnt 0 2006.232.07:20:20.96#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:20:20.96#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:20:20.96#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:20:20.96#ibcon#enter wrdev, iclass 40, count 0 2006.232.07:20:20.96#ibcon#first serial, iclass 40, count 0 2006.232.07:20:20.96#ibcon#enter sib2, iclass 40, count 0 2006.232.07:20:20.96#ibcon#flushed, iclass 40, count 0 2006.232.07:20:20.96#ibcon#about to write, iclass 40, count 0 2006.232.07:20:20.96#ibcon#wrote, iclass 40, count 0 2006.232.07:20:20.96#ibcon#about to read 3, iclass 40, count 0 2006.232.07:20:20.98#ibcon#read 3, iclass 40, count 0 2006.232.07:20:20.98#ibcon#about to read 4, iclass 40, count 0 2006.232.07:20:20.98#ibcon#read 4, iclass 40, count 0 2006.232.07:20:20.98#ibcon#about to read 5, iclass 40, count 0 2006.232.07:20:20.98#ibcon#read 5, iclass 40, count 0 2006.232.07:20:20.98#ibcon#about to read 6, iclass 40, count 0 2006.232.07:20:20.98#ibcon#read 6, iclass 40, count 0 2006.232.07:20:20.98#ibcon#end of sib2, iclass 40, count 0 2006.232.07:20:20.98#ibcon#*mode == 0, iclass 40, count 0 2006.232.07:20:20.98#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.232.07:20:20.98#ibcon#[28=FRQ=05,744.99\r\n] 2006.232.07:20:20.98#ibcon#*before write, iclass 40, count 0 2006.232.07:20:20.98#ibcon#enter sib2, iclass 40, count 0 2006.232.07:20:20.98#ibcon#flushed, iclass 40, count 0 2006.232.07:20:20.98#ibcon#about to write, iclass 40, count 0 2006.232.07:20:20.98#ibcon#wrote, iclass 40, count 0 2006.232.07:20:20.98#ibcon#about to read 3, iclass 40, count 0 2006.232.07:20:21.02#ibcon#read 3, iclass 40, count 0 2006.232.07:20:21.02#ibcon#about to read 4, iclass 40, count 0 2006.232.07:20:21.02#ibcon#read 4, iclass 40, count 0 2006.232.07:20:21.02#ibcon#about to read 5, iclass 40, count 0 2006.232.07:20:21.02#ibcon#read 5, iclass 40, count 0 2006.232.07:20:21.02#ibcon#about to read 6, iclass 40, count 0 2006.232.07:20:21.02#ibcon#read 6, iclass 40, count 0 2006.232.07:20:21.02#ibcon#end of sib2, iclass 40, count 0 2006.232.07:20:21.02#ibcon#*after write, iclass 40, count 0 2006.232.07:20:21.02#ibcon#*before return 0, iclass 40, count 0 2006.232.07:20:21.02#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:20:21.02#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:20:21.02#ibcon#about to clear, iclass 40 cls_cnt 0 2006.232.07:20:21.02#ibcon#cleared, iclass 40 cls_cnt 0 2006.232.07:20:21.02$vc4f8/vb=5,3 2006.232.07:20:21.02#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.232.07:20:21.02#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.232.07:20:21.02#ibcon#ireg 11 cls_cnt 2 2006.232.07:20:21.02#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:20:21.08#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:20:21.08#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:20:21.08#ibcon#enter wrdev, iclass 4, count 2 2006.232.07:20:21.08#ibcon#first serial, iclass 4, count 2 2006.232.07:20:21.08#ibcon#enter sib2, iclass 4, count 2 2006.232.07:20:21.08#ibcon#flushed, iclass 4, count 2 2006.232.07:20:21.08#ibcon#about to write, iclass 4, count 2 2006.232.07:20:21.08#ibcon#wrote, iclass 4, count 2 2006.232.07:20:21.08#ibcon#about to read 3, iclass 4, count 2 2006.232.07:20:21.10#ibcon#read 3, iclass 4, count 2 2006.232.07:20:21.10#ibcon#about to read 4, iclass 4, count 2 2006.232.07:20:21.10#ibcon#read 4, iclass 4, count 2 2006.232.07:20:21.10#ibcon#about to read 5, iclass 4, count 2 2006.232.07:20:21.10#ibcon#read 5, iclass 4, count 2 2006.232.07:20:21.10#ibcon#about to read 6, iclass 4, count 2 2006.232.07:20:21.10#ibcon#read 6, iclass 4, count 2 2006.232.07:20:21.10#ibcon#end of sib2, iclass 4, count 2 2006.232.07:20:21.10#ibcon#*mode == 0, iclass 4, count 2 2006.232.07:20:21.10#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.232.07:20:21.10#ibcon#[27=AT05-03\r\n] 2006.232.07:20:21.10#ibcon#*before write, iclass 4, count 2 2006.232.07:20:21.10#ibcon#enter sib2, iclass 4, count 2 2006.232.07:20:21.10#ibcon#flushed, iclass 4, count 2 2006.232.07:20:21.10#ibcon#about to write, iclass 4, count 2 2006.232.07:20:21.10#ibcon#wrote, iclass 4, count 2 2006.232.07:20:21.10#ibcon#about to read 3, iclass 4, count 2 2006.232.07:20:21.13#ibcon#read 3, iclass 4, count 2 2006.232.07:20:21.13#ibcon#about to read 4, iclass 4, count 2 2006.232.07:20:21.13#ibcon#read 4, iclass 4, count 2 2006.232.07:20:21.13#ibcon#about to read 5, iclass 4, count 2 2006.232.07:20:21.13#ibcon#read 5, iclass 4, count 2 2006.232.07:20:21.13#ibcon#about to read 6, iclass 4, count 2 2006.232.07:20:21.13#ibcon#read 6, iclass 4, count 2 2006.232.07:20:21.13#ibcon#end of sib2, iclass 4, count 2 2006.232.07:20:21.13#ibcon#*after write, iclass 4, count 2 2006.232.07:20:21.13#ibcon#*before return 0, iclass 4, count 2 2006.232.07:20:21.13#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:20:21.13#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:20:21.13#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.232.07:20:21.13#ibcon#ireg 7 cls_cnt 0 2006.232.07:20:21.13#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:20:21.25#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:20:21.25#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:20:21.25#ibcon#enter wrdev, iclass 4, count 0 2006.232.07:20:21.25#ibcon#first serial, iclass 4, count 0 2006.232.07:20:21.25#ibcon#enter sib2, iclass 4, count 0 2006.232.07:20:21.25#ibcon#flushed, iclass 4, count 0 2006.232.07:20:21.25#ibcon#about to write, iclass 4, count 0 2006.232.07:20:21.25#ibcon#wrote, iclass 4, count 0 2006.232.07:20:21.25#ibcon#about to read 3, iclass 4, count 0 2006.232.07:20:21.27#ibcon#read 3, iclass 4, count 0 2006.232.07:20:21.27#ibcon#about to read 4, iclass 4, count 0 2006.232.07:20:21.27#ibcon#read 4, iclass 4, count 0 2006.232.07:20:21.27#ibcon#about to read 5, iclass 4, count 0 2006.232.07:20:21.27#ibcon#read 5, iclass 4, count 0 2006.232.07:20:21.27#ibcon#about to read 6, iclass 4, count 0 2006.232.07:20:21.27#ibcon#read 6, iclass 4, count 0 2006.232.07:20:21.27#ibcon#end of sib2, iclass 4, count 0 2006.232.07:20:21.27#ibcon#*mode == 0, iclass 4, count 0 2006.232.07:20:21.27#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.232.07:20:21.27#ibcon#[27=USB\r\n] 2006.232.07:20:21.27#ibcon#*before write, iclass 4, count 0 2006.232.07:20:21.27#ibcon#enter sib2, iclass 4, count 0 2006.232.07:20:21.27#ibcon#flushed, iclass 4, count 0 2006.232.07:20:21.27#ibcon#about to write, iclass 4, count 0 2006.232.07:20:21.27#ibcon#wrote, iclass 4, count 0 2006.232.07:20:21.27#ibcon#about to read 3, iclass 4, count 0 2006.232.07:20:21.30#ibcon#read 3, iclass 4, count 0 2006.232.07:20:21.30#ibcon#about to read 4, iclass 4, count 0 2006.232.07:20:21.30#ibcon#read 4, iclass 4, count 0 2006.232.07:20:21.30#ibcon#about to read 5, iclass 4, count 0 2006.232.07:20:21.30#ibcon#read 5, iclass 4, count 0 2006.232.07:20:21.30#ibcon#about to read 6, iclass 4, count 0 2006.232.07:20:21.30#ibcon#read 6, iclass 4, count 0 2006.232.07:20:21.30#ibcon#end of sib2, iclass 4, count 0 2006.232.07:20:21.30#ibcon#*after write, iclass 4, count 0 2006.232.07:20:21.30#ibcon#*before return 0, iclass 4, count 0 2006.232.07:20:21.30#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:20:21.30#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:20:21.30#ibcon#about to clear, iclass 4 cls_cnt 0 2006.232.07:20:21.30#ibcon#cleared, iclass 4 cls_cnt 0 2006.232.07:20:21.30$vc4f8/vblo=6,752.99 2006.232.07:20:21.30#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.232.07:20:21.30#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.232.07:20:21.30#ibcon#ireg 17 cls_cnt 0 2006.232.07:20:21.30#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:20:21.30#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:20:21.30#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:20:21.30#ibcon#enter wrdev, iclass 6, count 0 2006.232.07:20:21.30#ibcon#first serial, iclass 6, count 0 2006.232.07:20:21.30#ibcon#enter sib2, iclass 6, count 0 2006.232.07:20:21.30#ibcon#flushed, iclass 6, count 0 2006.232.07:20:21.30#ibcon#about to write, iclass 6, count 0 2006.232.07:20:21.30#ibcon#wrote, iclass 6, count 0 2006.232.07:20:21.30#ibcon#about to read 3, iclass 6, count 0 2006.232.07:20:21.32#ibcon#read 3, iclass 6, count 0 2006.232.07:20:21.32#ibcon#about to read 4, iclass 6, count 0 2006.232.07:20:21.32#ibcon#read 4, iclass 6, count 0 2006.232.07:20:21.32#ibcon#about to read 5, iclass 6, count 0 2006.232.07:20:21.32#ibcon#read 5, iclass 6, count 0 2006.232.07:20:21.32#ibcon#about to read 6, iclass 6, count 0 2006.232.07:20:21.32#ibcon#read 6, iclass 6, count 0 2006.232.07:20:21.32#ibcon#end of sib2, iclass 6, count 0 2006.232.07:20:21.32#ibcon#*mode == 0, iclass 6, count 0 2006.232.07:20:21.32#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.232.07:20:21.32#ibcon#[28=FRQ=06,752.99\r\n] 2006.232.07:20:21.32#ibcon#*before write, iclass 6, count 0 2006.232.07:20:21.32#ibcon#enter sib2, iclass 6, count 0 2006.232.07:20:21.32#ibcon#flushed, iclass 6, count 0 2006.232.07:20:21.32#ibcon#about to write, iclass 6, count 0 2006.232.07:20:21.32#ibcon#wrote, iclass 6, count 0 2006.232.07:20:21.32#ibcon#about to read 3, iclass 6, count 0 2006.232.07:20:21.36#ibcon#read 3, iclass 6, count 0 2006.232.07:20:21.36#ibcon#about to read 4, iclass 6, count 0 2006.232.07:20:21.36#ibcon#read 4, iclass 6, count 0 2006.232.07:20:21.36#ibcon#about to read 5, iclass 6, count 0 2006.232.07:20:21.36#ibcon#read 5, iclass 6, count 0 2006.232.07:20:21.36#ibcon#about to read 6, iclass 6, count 0 2006.232.07:20:21.36#ibcon#read 6, iclass 6, count 0 2006.232.07:20:21.36#ibcon#end of sib2, iclass 6, count 0 2006.232.07:20:21.36#ibcon#*after write, iclass 6, count 0 2006.232.07:20:21.36#ibcon#*before return 0, iclass 6, count 0 2006.232.07:20:21.36#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:20:21.36#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:20:21.36#ibcon#about to clear, iclass 6 cls_cnt 0 2006.232.07:20:21.36#ibcon#cleared, iclass 6 cls_cnt 0 2006.232.07:20:21.36$vc4f8/vb=6,4 2006.232.07:20:21.36#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.232.07:20:21.36#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.232.07:20:21.36#ibcon#ireg 11 cls_cnt 2 2006.232.07:20:21.36#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.232.07:20:21.42#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.232.07:20:21.42#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.232.07:20:21.42#ibcon#enter wrdev, iclass 10, count 2 2006.232.07:20:21.42#ibcon#first serial, iclass 10, count 2 2006.232.07:20:21.42#ibcon#enter sib2, iclass 10, count 2 2006.232.07:20:21.42#ibcon#flushed, iclass 10, count 2 2006.232.07:20:21.42#ibcon#about to write, iclass 10, count 2 2006.232.07:20:21.42#ibcon#wrote, iclass 10, count 2 2006.232.07:20:21.42#ibcon#about to read 3, iclass 10, count 2 2006.232.07:20:21.44#ibcon#read 3, iclass 10, count 2 2006.232.07:20:21.44#ibcon#about to read 4, iclass 10, count 2 2006.232.07:20:21.44#ibcon#read 4, iclass 10, count 2 2006.232.07:20:21.44#ibcon#about to read 5, iclass 10, count 2 2006.232.07:20:21.44#ibcon#read 5, iclass 10, count 2 2006.232.07:20:21.44#ibcon#about to read 6, iclass 10, count 2 2006.232.07:20:21.44#ibcon#read 6, iclass 10, count 2 2006.232.07:20:21.44#ibcon#end of sib2, iclass 10, count 2 2006.232.07:20:21.44#ibcon#*mode == 0, iclass 10, count 2 2006.232.07:20:21.44#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.232.07:20:21.44#ibcon#[27=AT06-04\r\n] 2006.232.07:20:21.44#ibcon#*before write, iclass 10, count 2 2006.232.07:20:21.44#ibcon#enter sib2, iclass 10, count 2 2006.232.07:20:21.44#ibcon#flushed, iclass 10, count 2 2006.232.07:20:21.44#ibcon#about to write, iclass 10, count 2 2006.232.07:20:21.44#ibcon#wrote, iclass 10, count 2 2006.232.07:20:21.44#ibcon#about to read 3, iclass 10, count 2 2006.232.07:20:21.47#ibcon#read 3, iclass 10, count 2 2006.232.07:20:21.47#ibcon#about to read 4, iclass 10, count 2 2006.232.07:20:21.47#ibcon#read 4, iclass 10, count 2 2006.232.07:20:21.47#ibcon#about to read 5, iclass 10, count 2 2006.232.07:20:21.47#ibcon#read 5, iclass 10, count 2 2006.232.07:20:21.47#ibcon#about to read 6, iclass 10, count 2 2006.232.07:20:21.47#ibcon#read 6, iclass 10, count 2 2006.232.07:20:21.47#ibcon#end of sib2, iclass 10, count 2 2006.232.07:20:21.47#ibcon#*after write, iclass 10, count 2 2006.232.07:20:21.47#ibcon#*before return 0, iclass 10, count 2 2006.232.07:20:21.47#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.232.07:20:21.47#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.232.07:20:21.47#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.232.07:20:21.47#ibcon#ireg 7 cls_cnt 0 2006.232.07:20:21.47#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.232.07:20:21.59#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.232.07:20:21.59#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.232.07:20:21.59#ibcon#enter wrdev, iclass 10, count 0 2006.232.07:20:21.59#ibcon#first serial, iclass 10, count 0 2006.232.07:20:21.59#ibcon#enter sib2, iclass 10, count 0 2006.232.07:20:21.59#ibcon#flushed, iclass 10, count 0 2006.232.07:20:21.59#ibcon#about to write, iclass 10, count 0 2006.232.07:20:21.59#ibcon#wrote, iclass 10, count 0 2006.232.07:20:21.59#ibcon#about to read 3, iclass 10, count 0 2006.232.07:20:21.61#ibcon#read 3, iclass 10, count 0 2006.232.07:20:21.61#ibcon#about to read 4, iclass 10, count 0 2006.232.07:20:21.61#ibcon#read 4, iclass 10, count 0 2006.232.07:20:21.61#ibcon#about to read 5, iclass 10, count 0 2006.232.07:20:21.61#ibcon#read 5, iclass 10, count 0 2006.232.07:20:21.61#ibcon#about to read 6, iclass 10, count 0 2006.232.07:20:21.61#ibcon#read 6, iclass 10, count 0 2006.232.07:20:21.61#ibcon#end of sib2, iclass 10, count 0 2006.232.07:20:21.61#ibcon#*mode == 0, iclass 10, count 0 2006.232.07:20:21.61#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.232.07:20:21.61#ibcon#[27=USB\r\n] 2006.232.07:20:21.61#ibcon#*before write, iclass 10, count 0 2006.232.07:20:21.61#ibcon#enter sib2, iclass 10, count 0 2006.232.07:20:21.61#ibcon#flushed, iclass 10, count 0 2006.232.07:20:21.61#ibcon#about to write, iclass 10, count 0 2006.232.07:20:21.61#ibcon#wrote, iclass 10, count 0 2006.232.07:20:21.61#ibcon#about to read 3, iclass 10, count 0 2006.232.07:20:21.64#ibcon#read 3, iclass 10, count 0 2006.232.07:20:21.64#ibcon#about to read 4, iclass 10, count 0 2006.232.07:20:21.64#ibcon#read 4, iclass 10, count 0 2006.232.07:20:21.64#ibcon#about to read 5, iclass 10, count 0 2006.232.07:20:21.64#ibcon#read 5, iclass 10, count 0 2006.232.07:20:21.64#ibcon#about to read 6, iclass 10, count 0 2006.232.07:20:21.64#ibcon#read 6, iclass 10, count 0 2006.232.07:20:21.64#ibcon#end of sib2, iclass 10, count 0 2006.232.07:20:21.64#ibcon#*after write, iclass 10, count 0 2006.232.07:20:21.64#ibcon#*before return 0, iclass 10, count 0 2006.232.07:20:21.64#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.232.07:20:21.64#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.232.07:20:21.64#ibcon#about to clear, iclass 10 cls_cnt 0 2006.232.07:20:21.64#ibcon#cleared, iclass 10 cls_cnt 0 2006.232.07:20:21.64$vc4f8/vabw=wide 2006.232.07:20:21.64#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.232.07:20:21.64#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.232.07:20:21.64#ibcon#ireg 8 cls_cnt 0 2006.232.07:20:21.64#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.232.07:20:21.64#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.232.07:20:21.64#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.232.07:20:21.64#ibcon#enter wrdev, iclass 12, count 0 2006.232.07:20:21.64#ibcon#first serial, iclass 12, count 0 2006.232.07:20:21.64#ibcon#enter sib2, iclass 12, count 0 2006.232.07:20:21.64#ibcon#flushed, iclass 12, count 0 2006.232.07:20:21.64#ibcon#about to write, iclass 12, count 0 2006.232.07:20:21.64#ibcon#wrote, iclass 12, count 0 2006.232.07:20:21.64#ibcon#about to read 3, iclass 12, count 0 2006.232.07:20:21.66#ibcon#read 3, iclass 12, count 0 2006.232.07:20:21.66#ibcon#about to read 4, iclass 12, count 0 2006.232.07:20:21.66#ibcon#read 4, iclass 12, count 0 2006.232.07:20:21.66#ibcon#about to read 5, iclass 12, count 0 2006.232.07:20:21.66#ibcon#read 5, iclass 12, count 0 2006.232.07:20:21.66#ibcon#about to read 6, iclass 12, count 0 2006.232.07:20:21.66#ibcon#read 6, iclass 12, count 0 2006.232.07:20:21.66#ibcon#end of sib2, iclass 12, count 0 2006.232.07:20:21.66#ibcon#*mode == 0, iclass 12, count 0 2006.232.07:20:21.66#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.232.07:20:21.66#ibcon#[25=BW32\r\n] 2006.232.07:20:21.66#ibcon#*before write, iclass 12, count 0 2006.232.07:20:21.66#ibcon#enter sib2, iclass 12, count 0 2006.232.07:20:21.66#ibcon#flushed, iclass 12, count 0 2006.232.07:20:21.66#ibcon#about to write, iclass 12, count 0 2006.232.07:20:21.66#ibcon#wrote, iclass 12, count 0 2006.232.07:20:21.66#ibcon#about to read 3, iclass 12, count 0 2006.232.07:20:21.69#ibcon#read 3, iclass 12, count 0 2006.232.07:20:21.69#ibcon#about to read 4, iclass 12, count 0 2006.232.07:20:21.69#ibcon#read 4, iclass 12, count 0 2006.232.07:20:21.69#ibcon#about to read 5, iclass 12, count 0 2006.232.07:20:21.69#ibcon#read 5, iclass 12, count 0 2006.232.07:20:21.69#ibcon#about to read 6, iclass 12, count 0 2006.232.07:20:21.69#ibcon#read 6, iclass 12, count 0 2006.232.07:20:21.69#ibcon#end of sib2, iclass 12, count 0 2006.232.07:20:21.69#ibcon#*after write, iclass 12, count 0 2006.232.07:20:21.69#ibcon#*before return 0, iclass 12, count 0 2006.232.07:20:21.69#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.232.07:20:21.69#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.232.07:20:21.69#ibcon#about to clear, iclass 12 cls_cnt 0 2006.232.07:20:21.69#ibcon#cleared, iclass 12 cls_cnt 0 2006.232.07:20:21.69$vc4f8/vbbw=wide 2006.232.07:20:21.69#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.232.07:20:21.69#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.232.07:20:21.69#ibcon#ireg 8 cls_cnt 0 2006.232.07:20:21.69#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.232.07:20:21.76#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.232.07:20:21.76#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.232.07:20:21.76#ibcon#enter wrdev, iclass 14, count 0 2006.232.07:20:21.76#ibcon#first serial, iclass 14, count 0 2006.232.07:20:21.76#ibcon#enter sib2, iclass 14, count 0 2006.232.07:20:21.76#ibcon#flushed, iclass 14, count 0 2006.232.07:20:21.76#ibcon#about to write, iclass 14, count 0 2006.232.07:20:21.76#ibcon#wrote, iclass 14, count 0 2006.232.07:20:21.76#ibcon#about to read 3, iclass 14, count 0 2006.232.07:20:21.78#ibcon#read 3, iclass 14, count 0 2006.232.07:20:21.78#ibcon#about to read 4, iclass 14, count 0 2006.232.07:20:21.78#ibcon#read 4, iclass 14, count 0 2006.232.07:20:21.78#ibcon#about to read 5, iclass 14, count 0 2006.232.07:20:21.78#ibcon#read 5, iclass 14, count 0 2006.232.07:20:21.78#ibcon#about to read 6, iclass 14, count 0 2006.232.07:20:21.78#ibcon#read 6, iclass 14, count 0 2006.232.07:20:21.78#ibcon#end of sib2, iclass 14, count 0 2006.232.07:20:21.78#ibcon#*mode == 0, iclass 14, count 0 2006.232.07:20:21.78#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.232.07:20:21.78#ibcon#[27=BW32\r\n] 2006.232.07:20:21.78#ibcon#*before write, iclass 14, count 0 2006.232.07:20:21.78#ibcon#enter sib2, iclass 14, count 0 2006.232.07:20:21.78#ibcon#flushed, iclass 14, count 0 2006.232.07:20:21.78#ibcon#about to write, iclass 14, count 0 2006.232.07:20:21.78#ibcon#wrote, iclass 14, count 0 2006.232.07:20:21.78#ibcon#about to read 3, iclass 14, count 0 2006.232.07:20:21.81#ibcon#read 3, iclass 14, count 0 2006.232.07:20:21.81#ibcon#about to read 4, iclass 14, count 0 2006.232.07:20:21.81#ibcon#read 4, iclass 14, count 0 2006.232.07:20:21.81#ibcon#about to read 5, iclass 14, count 0 2006.232.07:20:21.81#ibcon#read 5, iclass 14, count 0 2006.232.07:20:21.81#ibcon#about to read 6, iclass 14, count 0 2006.232.07:20:21.81#ibcon#read 6, iclass 14, count 0 2006.232.07:20:21.81#ibcon#end of sib2, iclass 14, count 0 2006.232.07:20:21.81#ibcon#*after write, iclass 14, count 0 2006.232.07:20:21.81#ibcon#*before return 0, iclass 14, count 0 2006.232.07:20:21.81#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.232.07:20:21.81#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.232.07:20:21.81#ibcon#about to clear, iclass 14 cls_cnt 0 2006.232.07:20:21.81#ibcon#cleared, iclass 14 cls_cnt 0 2006.232.07:20:21.81$4f8m12a/ifd4f 2006.232.07:20:21.81&ifd4f/lo= 2006.232.07:20:21.81&ifd4f/lo=lo1,7680.00,usb,rcp,1 2006.232.07:20:21.81&ifd4f/lo=lo2,1600.00,usb,rcp,1 2006.232.07:20:21.81&ifd4f/lo=lo3,8080.00,usb,rcp,1 2006.232.07:20:21.81&ifd4f/patch= 2006.232.07:20:21.81&ifd4f/patch=lo1,a1,a2,a3,a4 2006.232.07:20:21.81&ifd4f/patch=lo2,b1,b2,b3,b4,b5,b6 2006.232.07:20:21.81&ifd4f/patch=lo3,a5,a6,a7,a8 2006.232.07:20:21.81$ifd4f/lo= 2006.232.07:20:21.81$ifd4f/lo=lo1,7680.00,usb,rcp,1 2006.232.07:20:21.81$ifd4f/lo=lo2,1600.00,usb,rcp,1 2006.232.07:20:21.81$ifd4f/lo=lo3,8080.00,usb,rcp,1 2006.232.07:20:21.81$ifd4f/patch= 2006.232.07:20:21.81$ifd4f/patch=lo1,a1,a2,a3,a4 2006.232.07:20:21.81$ifd4f/patch=lo2,b1,b2,b3,b4,b5,b6 2006.232.07:20:21.81$ifd4f/patch=lo3,a5,a6,a7,a8 2006.232.07:20:21.81$4f8m12a/"form=m,16.000,1:2 2006.232.07:20:21.81$4f8m12a/"tpicd 2006.232.07:20:21.81$4f8m12a/echo=off 2006.232.07:20:21.81$4f8m12a/xlog=off 2006.232.07:20:21.81:!2006.232.07:29:50 2006.232.07:20:38.14#trakl#Source acquired 2006.232.07:20:38.14#flagr#flagr/antenna,acquired 2006.232.07:29:50.00:preob 2006.232.07:29:50.00&preob/onsource 2006.232.07:29:51.14/onsource/TRACKING 2006.232.07:29:51.14:!2006.232.07:30:00 2006.232.07:30:00.00:data_valid=on 2006.232.07:30:00.00:midob 2006.232.07:30:00.00&midob/onsource 2006.232.07:30:00.00&midob/wx 2006.232.07:30:00.00&midob/cable 2006.232.07:30:00.00&midob/va 2006.232.07:30:00.00&midob/valo 2006.232.07:30:00.00&midob/vb 2006.232.07:30:00.00&midob/vblo 2006.232.07:30:00.00&midob/vabw 2006.232.07:30:00.00&midob/vbbw 2006.232.07:30:00.00&midob/"form 2006.232.07:30:00.00&midob/xfe 2006.232.07:30:00.00&midob/ifatt 2006.232.07:30:00.00&midob/clockoff 2006.232.07:30:00.00&midob/sy=logmail 2006.232.07:30:00.00&midob/"sy=run setcl adapt & 2006.232.07:30:00.14/onsource/TRACKING 2006.232.07:30:00.14/wx/29.53,1007.2,86 2006.232.07:30:00.26/cable/+6.3879E-03 2006.232.07:30:01.35/va/01,08,usb,yes,32,33 2006.232.07:30:01.35/va/02,07,usb,yes,32,33 2006.232.07:30:01.35/va/03,08,usb,yes,24,24 2006.232.07:30:01.35/va/04,07,usb,yes,33,36 2006.232.07:30:01.35/va/05,07,usb,yes,37,39 2006.232.07:30:01.35/va/06,06,usb,yes,37,36 2006.232.07:30:01.35/va/07,06,usb,yes,37,37 2006.232.07:30:01.35/va/08,06,usb,yes,40,39 2006.232.07:30:01.58/valo/01,532.99,yes,locked 2006.232.07:30:01.58/valo/02,572.99,yes,locked 2006.232.07:30:01.58/valo/03,672.99,yes,locked 2006.232.07:30:01.58/valo/04,832.99,yes,locked 2006.232.07:30:01.58/valo/05,652.99,yes,locked 2006.232.07:30:01.58/valo/06,772.99,yes,locked 2006.232.07:30:01.58/valo/07,832.99,yes,locked 2006.232.07:30:01.58/valo/08,852.99,yes,locked 2006.232.07:30:02.67/vb/01,04,usb,yes,32,30 2006.232.07:30:02.67/vb/02,04,usb,yes,34,35 2006.232.07:30:02.67/vb/03,04,usb,yes,30,34 2006.232.07:30:02.67/vb/04,04,usb,yes,31,31 2006.232.07:30:02.67/vb/05,03,usb,yes,36,41 2006.232.07:30:02.67/vb/06,04,usb,yes,30,33 2006.232.07:30:02.67/vb/07,04,usb,yes,32,32 2006.232.07:30:02.67/vb/08,04,usb,yes,30,33 2006.232.07:30:02.91/vblo/01,632.99,yes,locked 2006.232.07:30:02.91/vblo/02,640.99,yes,locked 2006.232.07:30:02.91/vblo/03,656.99,yes,locked 2006.232.07:30:02.91/vblo/04,712.99,yes,locked 2006.232.07:30:02.91/vblo/05,744.99,yes,locked 2006.232.07:30:02.91/vblo/06,752.99,yes,locked 2006.232.07:30:02.91/vblo/07,734.99,yes,locked 2006.232.07:30:02.91/vblo/08,744.99,yes,locked 2006.232.07:30:03.06/vabw/8 2006.232.07:30:03.21/vbbw/8 2006.232.07:30:03.30/xfe/off,on,13.5 2006.232.07:30:03.68/ifatt/23,28,28,28 2006.232.07:30:03.68&clockoff/"gps-fmout=1p 2006.232.07:30:03.68&clockoff/fmout-gps=1p 2006.232.07:30:04.08/fmout-gps/S +4.33E-07 2006.232.07:30:04.12:!2006.232.07:31:00 2006.232.07:31:00.00:data_valid=off 2006.232.07:31:00.00:postob 2006.232.07:31:00.00&postob/cable 2006.232.07:31:00.00&postob/wx 2006.232.07:31:00.00&postob/clockoff 2006.232.07:31:00.10/cable/+6.3857E-03 2006.232.07:31:00.10/wx/29.52,1007.3,87 2006.232.07:31:01.08/fmout-gps/S +4.33E-07 2006.232.07:31:01.08:scan_name=232-0733,k06232,60 2006.232.07:31:01.08:source=oj287,085448.87,200630.6,2000.0,ccw 2006.232.07:31:01.14#flagr#flagr/antenna,new-source 2006.232.07:31:02.14:checkk5 2006.232.07:31:02.14&checkk5/chk_autoobs=1 2006.232.07:31:02.14&checkk5/chk_autoobs=2 2006.232.07:31:02.14&checkk5/chk_autoobs=3 2006.232.07:31:02.14&checkk5/chk_autoobs=4 2006.232.07:31:02.14&checkk5/chk_obsdata=1 2006.232.07:31:02.14&checkk5/chk_obsdata=2 2006.232.07:31:02.14&checkk5/chk_obsdata=3 2006.232.07:31:02.14&checkk5/chk_obsdata=4 2006.232.07:31:02.14&checkk5/k5log=1 2006.232.07:31:02.14&checkk5/k5log=2 2006.232.07:31:02.14&checkk5/k5log=3 2006.232.07:31:02.14&checkk5/k5log=4 2006.232.07:31:02.14&checkk5/obsinfo 2006.232.07:31:02.97/chk_autoobs//k5ts1/ autoobs is running! 2006.232.07:31:03.36/chk_autoobs//k5ts2/ autoobs is running! 2006.232.07:31:03.74/chk_autoobs//k5ts3/ autoobs is running! 2006.232.07:31:04.12/chk_autoobs//k5ts4/ autoobs is running! 2006.232.07:31:04.49/chk_obsdata//k5ts1/T2320730??a.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:31:04.86/chk_obsdata//k5ts2/T2320730??b.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:31:05.24/chk_obsdata//k5ts3/T2320730??c.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:31:05.60/chk_obsdata//k5ts4/T2320730??d.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:31:06.29/k5log//k5ts1_log_newline 2006.232.07:31:06.98/k5log//k5ts2_log_newline 2006.232.07:31:07.67/k5log//k5ts3_log_newline 2006.232.07:31:08.36/k5log//k5ts4_log_newline 2006.232.07:31:08.38/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.232.07:31:08.38:4f8m12a=1 2006.232.07:31:08.38$4f8m12a/echo=on 2006.232.07:31:08.38$4f8m12a/pcalon 2006.232.07:31:08.38$pcalon/"no phase cal control is implemented here 2006.232.07:31:08.38$4f8m12a/"tpicd=stop 2006.232.07:31:08.38$4f8m12a/vc4f8 2006.232.07:31:08.38$vc4f8/valo=1,532.99 2006.232.07:31:08.39#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.232.07:31:08.39#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.232.07:31:08.39#ibcon#ireg 17 cls_cnt 0 2006.232.07:31:08.39#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:31:08.39#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:31:08.39#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:31:08.39#ibcon#enter wrdev, iclass 16, count 0 2006.232.07:31:08.39#ibcon#first serial, iclass 16, count 0 2006.232.07:31:08.39#ibcon#enter sib2, iclass 16, count 0 2006.232.07:31:08.39#ibcon#flushed, iclass 16, count 0 2006.232.07:31:08.39#ibcon#about to write, iclass 16, count 0 2006.232.07:31:08.39#ibcon#wrote, iclass 16, count 0 2006.232.07:31:08.39#ibcon#about to read 3, iclass 16, count 0 2006.232.07:31:08.41#ibcon#read 3, iclass 16, count 0 2006.232.07:31:08.41#ibcon#about to read 4, iclass 16, count 0 2006.232.07:31:08.41#ibcon#read 4, iclass 16, count 0 2006.232.07:31:08.41#ibcon#about to read 5, iclass 16, count 0 2006.232.07:31:08.41#ibcon#read 5, iclass 16, count 0 2006.232.07:31:08.41#ibcon#about to read 6, iclass 16, count 0 2006.232.07:31:08.41#ibcon#read 6, iclass 16, count 0 2006.232.07:31:08.41#ibcon#end of sib2, iclass 16, count 0 2006.232.07:31:08.41#ibcon#*mode == 0, iclass 16, count 0 2006.232.07:31:08.41#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.232.07:31:08.41#ibcon#[26=FRQ=01,532.99\r\n] 2006.232.07:31:08.41#ibcon#*before write, iclass 16, count 0 2006.232.07:31:08.41#ibcon#enter sib2, iclass 16, count 0 2006.232.07:31:08.41#ibcon#flushed, iclass 16, count 0 2006.232.07:31:08.41#ibcon#about to write, iclass 16, count 0 2006.232.07:31:08.41#ibcon#wrote, iclass 16, count 0 2006.232.07:31:08.41#ibcon#about to read 3, iclass 16, count 0 2006.232.07:31:08.46#ibcon#read 3, iclass 16, count 0 2006.232.07:31:08.46#ibcon#about to read 4, iclass 16, count 0 2006.232.07:31:08.46#ibcon#read 4, iclass 16, count 0 2006.232.07:31:08.46#ibcon#about to read 5, iclass 16, count 0 2006.232.07:31:08.46#ibcon#read 5, iclass 16, count 0 2006.232.07:31:08.46#ibcon#about to read 6, iclass 16, count 0 2006.232.07:31:08.46#ibcon#read 6, iclass 16, count 0 2006.232.07:31:08.46#ibcon#end of sib2, iclass 16, count 0 2006.232.07:31:08.46#ibcon#*after write, iclass 16, count 0 2006.232.07:31:08.46#ibcon#*before return 0, iclass 16, count 0 2006.232.07:31:08.46#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:31:08.46#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:31:08.46#ibcon#about to clear, iclass 16 cls_cnt 0 2006.232.07:31:08.46#ibcon#cleared, iclass 16 cls_cnt 0 2006.232.07:31:08.46$vc4f8/va=1,8 2006.232.07:31:08.46#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.232.07:31:08.46#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.232.07:31:08.46#ibcon#ireg 11 cls_cnt 2 2006.232.07:31:08.46#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:31:08.46#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:31:08.46#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:31:08.46#ibcon#enter wrdev, iclass 18, count 2 2006.232.07:31:08.46#ibcon#first serial, iclass 18, count 2 2006.232.07:31:08.46#ibcon#enter sib2, iclass 18, count 2 2006.232.07:31:08.46#ibcon#flushed, iclass 18, count 2 2006.232.07:31:08.46#ibcon#about to write, iclass 18, count 2 2006.232.07:31:08.46#ibcon#wrote, iclass 18, count 2 2006.232.07:31:08.46#ibcon#about to read 3, iclass 18, count 2 2006.232.07:31:08.48#ibcon#read 3, iclass 18, count 2 2006.232.07:31:08.48#ibcon#about to read 4, iclass 18, count 2 2006.232.07:31:08.48#ibcon#read 4, iclass 18, count 2 2006.232.07:31:08.48#ibcon#about to read 5, iclass 18, count 2 2006.232.07:31:08.48#ibcon#read 5, iclass 18, count 2 2006.232.07:31:08.48#ibcon#about to read 6, iclass 18, count 2 2006.232.07:31:08.48#ibcon#read 6, iclass 18, count 2 2006.232.07:31:08.48#ibcon#end of sib2, iclass 18, count 2 2006.232.07:31:08.48#ibcon#*mode == 0, iclass 18, count 2 2006.232.07:31:08.48#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.232.07:31:08.48#ibcon#[25=AT01-08\r\n] 2006.232.07:31:08.48#ibcon#*before write, iclass 18, count 2 2006.232.07:31:08.48#ibcon#enter sib2, iclass 18, count 2 2006.232.07:31:08.48#ibcon#flushed, iclass 18, count 2 2006.232.07:31:08.48#ibcon#about to write, iclass 18, count 2 2006.232.07:31:08.48#ibcon#wrote, iclass 18, count 2 2006.232.07:31:08.48#ibcon#about to read 3, iclass 18, count 2 2006.232.07:31:08.51#ibcon#read 3, iclass 18, count 2 2006.232.07:31:08.51#ibcon#about to read 4, iclass 18, count 2 2006.232.07:31:08.51#ibcon#read 4, iclass 18, count 2 2006.232.07:31:08.51#ibcon#about to read 5, iclass 18, count 2 2006.232.07:31:08.51#ibcon#read 5, iclass 18, count 2 2006.232.07:31:08.51#ibcon#about to read 6, iclass 18, count 2 2006.232.07:31:08.51#ibcon#read 6, iclass 18, count 2 2006.232.07:31:08.51#ibcon#end of sib2, iclass 18, count 2 2006.232.07:31:08.51#ibcon#*after write, iclass 18, count 2 2006.232.07:31:08.51#ibcon#*before return 0, iclass 18, count 2 2006.232.07:31:08.51#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:31:08.51#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:31:08.51#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.232.07:31:08.51#ibcon#ireg 7 cls_cnt 0 2006.232.07:31:08.51#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:31:08.63#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:31:08.63#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:31:08.63#ibcon#enter wrdev, iclass 18, count 0 2006.232.07:31:08.63#ibcon#first serial, iclass 18, count 0 2006.232.07:31:08.63#ibcon#enter sib2, iclass 18, count 0 2006.232.07:31:08.63#ibcon#flushed, iclass 18, count 0 2006.232.07:31:08.63#ibcon#about to write, iclass 18, count 0 2006.232.07:31:08.63#ibcon#wrote, iclass 18, count 0 2006.232.07:31:08.63#ibcon#about to read 3, iclass 18, count 0 2006.232.07:31:08.65#ibcon#read 3, iclass 18, count 0 2006.232.07:31:08.65#ibcon#about to read 4, iclass 18, count 0 2006.232.07:31:08.65#ibcon#read 4, iclass 18, count 0 2006.232.07:31:08.65#ibcon#about to read 5, iclass 18, count 0 2006.232.07:31:08.65#ibcon#read 5, iclass 18, count 0 2006.232.07:31:08.65#ibcon#about to read 6, iclass 18, count 0 2006.232.07:31:08.65#ibcon#read 6, iclass 18, count 0 2006.232.07:31:08.65#ibcon#end of sib2, iclass 18, count 0 2006.232.07:31:08.65#ibcon#*mode == 0, iclass 18, count 0 2006.232.07:31:08.65#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.232.07:31:08.65#ibcon#[25=USB\r\n] 2006.232.07:31:08.65#ibcon#*before write, iclass 18, count 0 2006.232.07:31:08.65#ibcon#enter sib2, iclass 18, count 0 2006.232.07:31:08.65#ibcon#flushed, iclass 18, count 0 2006.232.07:31:08.65#ibcon#about to write, iclass 18, count 0 2006.232.07:31:08.65#ibcon#wrote, iclass 18, count 0 2006.232.07:31:08.65#ibcon#about to read 3, iclass 18, count 0 2006.232.07:31:08.68#ibcon#read 3, iclass 18, count 0 2006.232.07:31:08.68#ibcon#about to read 4, iclass 18, count 0 2006.232.07:31:08.68#ibcon#read 4, iclass 18, count 0 2006.232.07:31:08.68#ibcon#about to read 5, iclass 18, count 0 2006.232.07:31:08.68#ibcon#read 5, iclass 18, count 0 2006.232.07:31:08.68#ibcon#about to read 6, iclass 18, count 0 2006.232.07:31:08.68#ibcon#read 6, iclass 18, count 0 2006.232.07:31:08.68#ibcon#end of sib2, iclass 18, count 0 2006.232.07:31:08.68#ibcon#*after write, iclass 18, count 0 2006.232.07:31:08.68#ibcon#*before return 0, iclass 18, count 0 2006.232.07:31:08.68#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:31:08.68#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:31:08.68#ibcon#about to clear, iclass 18 cls_cnt 0 2006.232.07:31:08.68#ibcon#cleared, iclass 18 cls_cnt 0 2006.232.07:31:08.68$vc4f8/valo=2,572.99 2006.232.07:31:08.68#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.232.07:31:08.68#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.232.07:31:08.68#ibcon#ireg 17 cls_cnt 0 2006.232.07:31:08.68#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:31:08.68#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:31:08.68#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:31:08.68#ibcon#enter wrdev, iclass 20, count 0 2006.232.07:31:08.68#ibcon#first serial, iclass 20, count 0 2006.232.07:31:08.68#ibcon#enter sib2, iclass 20, count 0 2006.232.07:31:08.68#ibcon#flushed, iclass 20, count 0 2006.232.07:31:08.68#ibcon#about to write, iclass 20, count 0 2006.232.07:31:08.68#ibcon#wrote, iclass 20, count 0 2006.232.07:31:08.68#ibcon#about to read 3, iclass 20, count 0 2006.232.07:31:08.70#ibcon#read 3, iclass 20, count 0 2006.232.07:31:08.70#ibcon#about to read 4, iclass 20, count 0 2006.232.07:31:08.70#ibcon#read 4, iclass 20, count 0 2006.232.07:31:08.70#ibcon#about to read 5, iclass 20, count 0 2006.232.07:31:08.70#ibcon#read 5, iclass 20, count 0 2006.232.07:31:08.70#ibcon#about to read 6, iclass 20, count 0 2006.232.07:31:08.70#ibcon#read 6, iclass 20, count 0 2006.232.07:31:08.70#ibcon#end of sib2, iclass 20, count 0 2006.232.07:31:08.70#ibcon#*mode == 0, iclass 20, count 0 2006.232.07:31:08.70#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.232.07:31:08.70#ibcon#[26=FRQ=02,572.99\r\n] 2006.232.07:31:08.70#ibcon#*before write, iclass 20, count 0 2006.232.07:31:08.70#ibcon#enter sib2, iclass 20, count 0 2006.232.07:31:08.70#ibcon#flushed, iclass 20, count 0 2006.232.07:31:08.70#ibcon#about to write, iclass 20, count 0 2006.232.07:31:08.70#ibcon#wrote, iclass 20, count 0 2006.232.07:31:08.70#ibcon#about to read 3, iclass 20, count 0 2006.232.07:31:08.74#ibcon#read 3, iclass 20, count 0 2006.232.07:31:08.74#ibcon#about to read 4, iclass 20, count 0 2006.232.07:31:08.74#ibcon#read 4, iclass 20, count 0 2006.232.07:31:08.74#ibcon#about to read 5, iclass 20, count 0 2006.232.07:31:08.74#ibcon#read 5, iclass 20, count 0 2006.232.07:31:08.74#ibcon#about to read 6, iclass 20, count 0 2006.232.07:31:08.74#ibcon#read 6, iclass 20, count 0 2006.232.07:31:08.74#ibcon#end of sib2, iclass 20, count 0 2006.232.07:31:08.74#ibcon#*after write, iclass 20, count 0 2006.232.07:31:08.74#ibcon#*before return 0, iclass 20, count 0 2006.232.07:31:08.74#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:31:08.74#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:31:08.74#ibcon#about to clear, iclass 20 cls_cnt 0 2006.232.07:31:08.74#ibcon#cleared, iclass 20 cls_cnt 0 2006.232.07:31:08.74$vc4f8/va=2,7 2006.232.07:31:08.74#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.232.07:31:08.74#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.232.07:31:08.74#ibcon#ireg 11 cls_cnt 2 2006.232.07:31:08.74#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:31:08.80#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:31:08.80#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:31:08.80#ibcon#enter wrdev, iclass 22, count 2 2006.232.07:31:08.80#ibcon#first serial, iclass 22, count 2 2006.232.07:31:08.80#ibcon#enter sib2, iclass 22, count 2 2006.232.07:31:08.80#ibcon#flushed, iclass 22, count 2 2006.232.07:31:08.80#ibcon#about to write, iclass 22, count 2 2006.232.07:31:08.80#ibcon#wrote, iclass 22, count 2 2006.232.07:31:08.80#ibcon#about to read 3, iclass 22, count 2 2006.232.07:31:08.82#ibcon#read 3, iclass 22, count 2 2006.232.07:31:08.82#ibcon#about to read 4, iclass 22, count 2 2006.232.07:31:08.82#ibcon#read 4, iclass 22, count 2 2006.232.07:31:08.82#ibcon#about to read 5, iclass 22, count 2 2006.232.07:31:08.82#ibcon#read 5, iclass 22, count 2 2006.232.07:31:08.82#ibcon#about to read 6, iclass 22, count 2 2006.232.07:31:08.82#ibcon#read 6, iclass 22, count 2 2006.232.07:31:08.82#ibcon#end of sib2, iclass 22, count 2 2006.232.07:31:08.82#ibcon#*mode == 0, iclass 22, count 2 2006.232.07:31:08.82#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.232.07:31:08.82#ibcon#[25=AT02-07\r\n] 2006.232.07:31:08.82#ibcon#*before write, iclass 22, count 2 2006.232.07:31:08.82#ibcon#enter sib2, iclass 22, count 2 2006.232.07:31:08.82#ibcon#flushed, iclass 22, count 2 2006.232.07:31:08.82#ibcon#about to write, iclass 22, count 2 2006.232.07:31:08.82#ibcon#wrote, iclass 22, count 2 2006.232.07:31:08.82#ibcon#about to read 3, iclass 22, count 2 2006.232.07:31:08.85#ibcon#read 3, iclass 22, count 2 2006.232.07:31:08.85#ibcon#about to read 4, iclass 22, count 2 2006.232.07:31:08.85#ibcon#read 4, iclass 22, count 2 2006.232.07:31:08.85#ibcon#about to read 5, iclass 22, count 2 2006.232.07:31:08.85#ibcon#read 5, iclass 22, count 2 2006.232.07:31:08.85#ibcon#about to read 6, iclass 22, count 2 2006.232.07:31:08.85#ibcon#read 6, iclass 22, count 2 2006.232.07:31:08.85#ibcon#end of sib2, iclass 22, count 2 2006.232.07:31:08.85#ibcon#*after write, iclass 22, count 2 2006.232.07:31:08.85#ibcon#*before return 0, iclass 22, count 2 2006.232.07:31:08.85#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:31:08.85#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:31:08.85#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.232.07:31:08.85#ibcon#ireg 7 cls_cnt 0 2006.232.07:31:08.85#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:31:08.97#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:31:08.97#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:31:08.97#ibcon#enter wrdev, iclass 22, count 0 2006.232.07:31:08.97#ibcon#first serial, iclass 22, count 0 2006.232.07:31:08.97#ibcon#enter sib2, iclass 22, count 0 2006.232.07:31:08.97#ibcon#flushed, iclass 22, count 0 2006.232.07:31:08.97#ibcon#about to write, iclass 22, count 0 2006.232.07:31:08.97#ibcon#wrote, iclass 22, count 0 2006.232.07:31:08.97#ibcon#about to read 3, iclass 22, count 0 2006.232.07:31:08.99#ibcon#read 3, iclass 22, count 0 2006.232.07:31:08.99#ibcon#about to read 4, iclass 22, count 0 2006.232.07:31:08.99#ibcon#read 4, iclass 22, count 0 2006.232.07:31:08.99#ibcon#about to read 5, iclass 22, count 0 2006.232.07:31:08.99#ibcon#read 5, iclass 22, count 0 2006.232.07:31:08.99#ibcon#about to read 6, iclass 22, count 0 2006.232.07:31:08.99#ibcon#read 6, iclass 22, count 0 2006.232.07:31:08.99#ibcon#end of sib2, iclass 22, count 0 2006.232.07:31:08.99#ibcon#*mode == 0, iclass 22, count 0 2006.232.07:31:08.99#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.232.07:31:08.99#ibcon#[25=USB\r\n] 2006.232.07:31:08.99#ibcon#*before write, iclass 22, count 0 2006.232.07:31:08.99#ibcon#enter sib2, iclass 22, count 0 2006.232.07:31:08.99#ibcon#flushed, iclass 22, count 0 2006.232.07:31:08.99#ibcon#about to write, iclass 22, count 0 2006.232.07:31:08.99#ibcon#wrote, iclass 22, count 0 2006.232.07:31:08.99#ibcon#about to read 3, iclass 22, count 0 2006.232.07:31:09.02#ibcon#read 3, iclass 22, count 0 2006.232.07:31:09.02#ibcon#about to read 4, iclass 22, count 0 2006.232.07:31:09.02#ibcon#read 4, iclass 22, count 0 2006.232.07:31:09.02#ibcon#about to read 5, iclass 22, count 0 2006.232.07:31:09.02#ibcon#read 5, iclass 22, count 0 2006.232.07:31:09.02#ibcon#about to read 6, iclass 22, count 0 2006.232.07:31:09.02#ibcon#read 6, iclass 22, count 0 2006.232.07:31:09.02#ibcon#end of sib2, iclass 22, count 0 2006.232.07:31:09.02#ibcon#*after write, iclass 22, count 0 2006.232.07:31:09.02#ibcon#*before return 0, iclass 22, count 0 2006.232.07:31:09.02#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:31:09.02#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:31:09.02#ibcon#about to clear, iclass 22 cls_cnt 0 2006.232.07:31:09.02#ibcon#cleared, iclass 22 cls_cnt 0 2006.232.07:31:09.02$vc4f8/valo=3,672.99 2006.232.07:31:09.02#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.232.07:31:09.02#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.232.07:31:09.02#ibcon#ireg 17 cls_cnt 0 2006.232.07:31:09.02#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:31:09.02#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:31:09.02#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:31:09.02#ibcon#enter wrdev, iclass 24, count 0 2006.232.07:31:09.02#ibcon#first serial, iclass 24, count 0 2006.232.07:31:09.02#ibcon#enter sib2, iclass 24, count 0 2006.232.07:31:09.02#ibcon#flushed, iclass 24, count 0 2006.232.07:31:09.02#ibcon#about to write, iclass 24, count 0 2006.232.07:31:09.02#ibcon#wrote, iclass 24, count 0 2006.232.07:31:09.02#ibcon#about to read 3, iclass 24, count 0 2006.232.07:31:09.04#ibcon#read 3, iclass 24, count 0 2006.232.07:31:09.04#ibcon#about to read 4, iclass 24, count 0 2006.232.07:31:09.04#ibcon#read 4, iclass 24, count 0 2006.232.07:31:09.04#ibcon#about to read 5, iclass 24, count 0 2006.232.07:31:09.04#ibcon#read 5, iclass 24, count 0 2006.232.07:31:09.04#ibcon#about to read 6, iclass 24, count 0 2006.232.07:31:09.04#ibcon#read 6, iclass 24, count 0 2006.232.07:31:09.04#ibcon#end of sib2, iclass 24, count 0 2006.232.07:31:09.04#ibcon#*mode == 0, iclass 24, count 0 2006.232.07:31:09.04#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.232.07:31:09.04#ibcon#[26=FRQ=03,672.99\r\n] 2006.232.07:31:09.04#ibcon#*before write, iclass 24, count 0 2006.232.07:31:09.04#ibcon#enter sib2, iclass 24, count 0 2006.232.07:31:09.04#ibcon#flushed, iclass 24, count 0 2006.232.07:31:09.04#ibcon#about to write, iclass 24, count 0 2006.232.07:31:09.04#ibcon#wrote, iclass 24, count 0 2006.232.07:31:09.04#ibcon#about to read 3, iclass 24, count 0 2006.232.07:31:09.08#ibcon#read 3, iclass 24, count 0 2006.232.07:31:09.08#ibcon#about to read 4, iclass 24, count 0 2006.232.07:31:09.08#ibcon#read 4, iclass 24, count 0 2006.232.07:31:09.08#ibcon#about to read 5, iclass 24, count 0 2006.232.07:31:09.08#ibcon#read 5, iclass 24, count 0 2006.232.07:31:09.08#ibcon#about to read 6, iclass 24, count 0 2006.232.07:31:09.08#ibcon#read 6, iclass 24, count 0 2006.232.07:31:09.08#ibcon#end of sib2, iclass 24, count 0 2006.232.07:31:09.08#ibcon#*after write, iclass 24, count 0 2006.232.07:31:09.08#ibcon#*before return 0, iclass 24, count 0 2006.232.07:31:09.08#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:31:09.08#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:31:09.08#ibcon#about to clear, iclass 24 cls_cnt 0 2006.232.07:31:09.08#ibcon#cleared, iclass 24 cls_cnt 0 2006.232.07:31:09.08$vc4f8/va=3,8 2006.232.07:31:09.08#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.232.07:31:09.08#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.232.07:31:09.08#ibcon#ireg 11 cls_cnt 2 2006.232.07:31:09.08#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:31:09.14#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:31:09.14#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:31:09.14#ibcon#enter wrdev, iclass 26, count 2 2006.232.07:31:09.14#ibcon#first serial, iclass 26, count 2 2006.232.07:31:09.14#ibcon#enter sib2, iclass 26, count 2 2006.232.07:31:09.14#ibcon#flushed, iclass 26, count 2 2006.232.07:31:09.14#ibcon#about to write, iclass 26, count 2 2006.232.07:31:09.14#ibcon#wrote, iclass 26, count 2 2006.232.07:31:09.14#ibcon#about to read 3, iclass 26, count 2 2006.232.07:31:09.16#ibcon#read 3, iclass 26, count 2 2006.232.07:31:09.16#ibcon#about to read 4, iclass 26, count 2 2006.232.07:31:09.16#ibcon#read 4, iclass 26, count 2 2006.232.07:31:09.16#ibcon#about to read 5, iclass 26, count 2 2006.232.07:31:09.16#ibcon#read 5, iclass 26, count 2 2006.232.07:31:09.16#ibcon#about to read 6, iclass 26, count 2 2006.232.07:31:09.16#ibcon#read 6, iclass 26, count 2 2006.232.07:31:09.16#ibcon#end of sib2, iclass 26, count 2 2006.232.07:31:09.16#ibcon#*mode == 0, iclass 26, count 2 2006.232.07:31:09.16#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.232.07:31:09.16#ibcon#[25=AT03-08\r\n] 2006.232.07:31:09.16#ibcon#*before write, iclass 26, count 2 2006.232.07:31:09.16#ibcon#enter sib2, iclass 26, count 2 2006.232.07:31:09.16#ibcon#flushed, iclass 26, count 2 2006.232.07:31:09.16#ibcon#about to write, iclass 26, count 2 2006.232.07:31:09.16#ibcon#wrote, iclass 26, count 2 2006.232.07:31:09.16#ibcon#about to read 3, iclass 26, count 2 2006.232.07:31:09.19#ibcon#read 3, iclass 26, count 2 2006.232.07:31:09.19#ibcon#about to read 4, iclass 26, count 2 2006.232.07:31:09.19#ibcon#read 4, iclass 26, count 2 2006.232.07:31:09.19#ibcon#about to read 5, iclass 26, count 2 2006.232.07:31:09.19#ibcon#read 5, iclass 26, count 2 2006.232.07:31:09.19#ibcon#about to read 6, iclass 26, count 2 2006.232.07:31:09.19#ibcon#read 6, iclass 26, count 2 2006.232.07:31:09.19#ibcon#end of sib2, iclass 26, count 2 2006.232.07:31:09.19#ibcon#*after write, iclass 26, count 2 2006.232.07:31:09.19#ibcon#*before return 0, iclass 26, count 2 2006.232.07:31:09.19#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:31:09.19#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:31:09.19#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.232.07:31:09.19#ibcon#ireg 7 cls_cnt 0 2006.232.07:31:09.19#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:31:09.31#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:31:09.31#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:31:09.31#ibcon#enter wrdev, iclass 26, count 0 2006.232.07:31:09.31#ibcon#first serial, iclass 26, count 0 2006.232.07:31:09.31#ibcon#enter sib2, iclass 26, count 0 2006.232.07:31:09.31#ibcon#flushed, iclass 26, count 0 2006.232.07:31:09.31#ibcon#about to write, iclass 26, count 0 2006.232.07:31:09.31#ibcon#wrote, iclass 26, count 0 2006.232.07:31:09.31#ibcon#about to read 3, iclass 26, count 0 2006.232.07:31:09.33#ibcon#read 3, iclass 26, count 0 2006.232.07:31:09.33#ibcon#about to read 4, iclass 26, count 0 2006.232.07:31:09.33#ibcon#read 4, iclass 26, count 0 2006.232.07:31:09.33#ibcon#about to read 5, iclass 26, count 0 2006.232.07:31:09.33#ibcon#read 5, iclass 26, count 0 2006.232.07:31:09.33#ibcon#about to read 6, iclass 26, count 0 2006.232.07:31:09.33#ibcon#read 6, iclass 26, count 0 2006.232.07:31:09.33#ibcon#end of sib2, iclass 26, count 0 2006.232.07:31:09.33#ibcon#*mode == 0, iclass 26, count 0 2006.232.07:31:09.33#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.232.07:31:09.33#ibcon#[25=USB\r\n] 2006.232.07:31:09.33#ibcon#*before write, iclass 26, count 0 2006.232.07:31:09.33#ibcon#enter sib2, iclass 26, count 0 2006.232.07:31:09.33#ibcon#flushed, iclass 26, count 0 2006.232.07:31:09.33#ibcon#about to write, iclass 26, count 0 2006.232.07:31:09.33#ibcon#wrote, iclass 26, count 0 2006.232.07:31:09.33#ibcon#about to read 3, iclass 26, count 0 2006.232.07:31:09.36#ibcon#read 3, iclass 26, count 0 2006.232.07:31:09.36#ibcon#about to read 4, iclass 26, count 0 2006.232.07:31:09.36#ibcon#read 4, iclass 26, count 0 2006.232.07:31:09.36#ibcon#about to read 5, iclass 26, count 0 2006.232.07:31:09.36#ibcon#read 5, iclass 26, count 0 2006.232.07:31:09.36#ibcon#about to read 6, iclass 26, count 0 2006.232.07:31:09.36#ibcon#read 6, iclass 26, count 0 2006.232.07:31:09.36#ibcon#end of sib2, iclass 26, count 0 2006.232.07:31:09.36#ibcon#*after write, iclass 26, count 0 2006.232.07:31:09.36#ibcon#*before return 0, iclass 26, count 0 2006.232.07:31:09.36#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:31:09.36#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:31:09.36#ibcon#about to clear, iclass 26 cls_cnt 0 2006.232.07:31:09.36#ibcon#cleared, iclass 26 cls_cnt 0 2006.232.07:31:09.36$vc4f8/valo=4,832.99 2006.232.07:31:09.36#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.232.07:31:09.36#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.232.07:31:09.36#ibcon#ireg 17 cls_cnt 0 2006.232.07:31:09.36#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:31:09.36#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:31:09.36#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:31:09.36#ibcon#enter wrdev, iclass 28, count 0 2006.232.07:31:09.36#ibcon#first serial, iclass 28, count 0 2006.232.07:31:09.36#ibcon#enter sib2, iclass 28, count 0 2006.232.07:31:09.36#ibcon#flushed, iclass 28, count 0 2006.232.07:31:09.36#ibcon#about to write, iclass 28, count 0 2006.232.07:31:09.36#ibcon#wrote, iclass 28, count 0 2006.232.07:31:09.36#ibcon#about to read 3, iclass 28, count 0 2006.232.07:31:09.38#ibcon#read 3, iclass 28, count 0 2006.232.07:31:09.38#ibcon#about to read 4, iclass 28, count 0 2006.232.07:31:09.38#ibcon#read 4, iclass 28, count 0 2006.232.07:31:09.38#ibcon#about to read 5, iclass 28, count 0 2006.232.07:31:09.38#ibcon#read 5, iclass 28, count 0 2006.232.07:31:09.38#ibcon#about to read 6, iclass 28, count 0 2006.232.07:31:09.38#ibcon#read 6, iclass 28, count 0 2006.232.07:31:09.38#ibcon#end of sib2, iclass 28, count 0 2006.232.07:31:09.38#ibcon#*mode == 0, iclass 28, count 0 2006.232.07:31:09.38#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.232.07:31:09.38#ibcon#[26=FRQ=04,832.99\r\n] 2006.232.07:31:09.38#ibcon#*before write, iclass 28, count 0 2006.232.07:31:09.38#ibcon#enter sib2, iclass 28, count 0 2006.232.07:31:09.38#ibcon#flushed, iclass 28, count 0 2006.232.07:31:09.38#ibcon#about to write, iclass 28, count 0 2006.232.07:31:09.38#ibcon#wrote, iclass 28, count 0 2006.232.07:31:09.38#ibcon#about to read 3, iclass 28, count 0 2006.232.07:31:09.42#ibcon#read 3, iclass 28, count 0 2006.232.07:31:09.42#ibcon#about to read 4, iclass 28, count 0 2006.232.07:31:09.42#ibcon#read 4, iclass 28, count 0 2006.232.07:31:09.42#ibcon#about to read 5, iclass 28, count 0 2006.232.07:31:09.42#ibcon#read 5, iclass 28, count 0 2006.232.07:31:09.42#ibcon#about to read 6, iclass 28, count 0 2006.232.07:31:09.42#ibcon#read 6, iclass 28, count 0 2006.232.07:31:09.42#ibcon#end of sib2, iclass 28, count 0 2006.232.07:31:09.42#ibcon#*after write, iclass 28, count 0 2006.232.07:31:09.42#ibcon#*before return 0, iclass 28, count 0 2006.232.07:31:09.42#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:31:09.42#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:31:09.42#ibcon#about to clear, iclass 28 cls_cnt 0 2006.232.07:31:09.42#ibcon#cleared, iclass 28 cls_cnt 0 2006.232.07:31:09.42$vc4f8/va=4,7 2006.232.07:31:09.42#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.232.07:31:09.42#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.232.07:31:09.42#ibcon#ireg 11 cls_cnt 2 2006.232.07:31:09.42#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:31:09.48#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:31:09.48#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:31:09.48#ibcon#enter wrdev, iclass 30, count 2 2006.232.07:31:09.48#ibcon#first serial, iclass 30, count 2 2006.232.07:31:09.48#ibcon#enter sib2, iclass 30, count 2 2006.232.07:31:09.48#ibcon#flushed, iclass 30, count 2 2006.232.07:31:09.48#ibcon#about to write, iclass 30, count 2 2006.232.07:31:09.48#ibcon#wrote, iclass 30, count 2 2006.232.07:31:09.48#ibcon#about to read 3, iclass 30, count 2 2006.232.07:31:09.50#ibcon#read 3, iclass 30, count 2 2006.232.07:31:09.50#ibcon#about to read 4, iclass 30, count 2 2006.232.07:31:09.50#ibcon#read 4, iclass 30, count 2 2006.232.07:31:09.50#ibcon#about to read 5, iclass 30, count 2 2006.232.07:31:09.50#ibcon#read 5, iclass 30, count 2 2006.232.07:31:09.50#ibcon#about to read 6, iclass 30, count 2 2006.232.07:31:09.50#ibcon#read 6, iclass 30, count 2 2006.232.07:31:09.50#ibcon#end of sib2, iclass 30, count 2 2006.232.07:31:09.50#ibcon#*mode == 0, iclass 30, count 2 2006.232.07:31:09.50#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.232.07:31:09.50#ibcon#[25=AT04-07\r\n] 2006.232.07:31:09.50#ibcon#*before write, iclass 30, count 2 2006.232.07:31:09.50#ibcon#enter sib2, iclass 30, count 2 2006.232.07:31:09.50#ibcon#flushed, iclass 30, count 2 2006.232.07:31:09.50#ibcon#about to write, iclass 30, count 2 2006.232.07:31:09.50#ibcon#wrote, iclass 30, count 2 2006.232.07:31:09.50#ibcon#about to read 3, iclass 30, count 2 2006.232.07:31:09.53#ibcon#read 3, iclass 30, count 2 2006.232.07:31:09.53#ibcon#about to read 4, iclass 30, count 2 2006.232.07:31:09.53#ibcon#read 4, iclass 30, count 2 2006.232.07:31:09.53#ibcon#about to read 5, iclass 30, count 2 2006.232.07:31:09.53#ibcon#read 5, iclass 30, count 2 2006.232.07:31:09.53#ibcon#about to read 6, iclass 30, count 2 2006.232.07:31:09.53#ibcon#read 6, iclass 30, count 2 2006.232.07:31:09.53#ibcon#end of sib2, iclass 30, count 2 2006.232.07:31:09.53#ibcon#*after write, iclass 30, count 2 2006.232.07:31:09.53#ibcon#*before return 0, iclass 30, count 2 2006.232.07:31:09.53#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:31:09.53#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:31:09.53#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.232.07:31:09.53#ibcon#ireg 7 cls_cnt 0 2006.232.07:31:09.53#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:31:09.65#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:31:09.65#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:31:09.65#ibcon#enter wrdev, iclass 30, count 0 2006.232.07:31:09.65#ibcon#first serial, iclass 30, count 0 2006.232.07:31:09.65#ibcon#enter sib2, iclass 30, count 0 2006.232.07:31:09.65#ibcon#flushed, iclass 30, count 0 2006.232.07:31:09.65#ibcon#about to write, iclass 30, count 0 2006.232.07:31:09.65#ibcon#wrote, iclass 30, count 0 2006.232.07:31:09.65#ibcon#about to read 3, iclass 30, count 0 2006.232.07:31:09.67#ibcon#read 3, iclass 30, count 0 2006.232.07:31:09.67#ibcon#about to read 4, iclass 30, count 0 2006.232.07:31:09.67#ibcon#read 4, iclass 30, count 0 2006.232.07:31:09.67#ibcon#about to read 5, iclass 30, count 0 2006.232.07:31:09.67#ibcon#read 5, iclass 30, count 0 2006.232.07:31:09.67#ibcon#about to read 6, iclass 30, count 0 2006.232.07:31:09.67#ibcon#read 6, iclass 30, count 0 2006.232.07:31:09.67#ibcon#end of sib2, iclass 30, count 0 2006.232.07:31:09.67#ibcon#*mode == 0, iclass 30, count 0 2006.232.07:31:09.67#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.232.07:31:09.67#ibcon#[25=USB\r\n] 2006.232.07:31:09.67#ibcon#*before write, iclass 30, count 0 2006.232.07:31:09.67#ibcon#enter sib2, iclass 30, count 0 2006.232.07:31:09.67#ibcon#flushed, iclass 30, count 0 2006.232.07:31:09.67#ibcon#about to write, iclass 30, count 0 2006.232.07:31:09.67#ibcon#wrote, iclass 30, count 0 2006.232.07:31:09.67#ibcon#about to read 3, iclass 30, count 0 2006.232.07:31:09.70#ibcon#read 3, iclass 30, count 0 2006.232.07:31:09.70#ibcon#about to read 4, iclass 30, count 0 2006.232.07:31:09.70#ibcon#read 4, iclass 30, count 0 2006.232.07:31:09.70#ibcon#about to read 5, iclass 30, count 0 2006.232.07:31:09.70#ibcon#read 5, iclass 30, count 0 2006.232.07:31:09.70#ibcon#about to read 6, iclass 30, count 0 2006.232.07:31:09.70#ibcon#read 6, iclass 30, count 0 2006.232.07:31:09.70#ibcon#end of sib2, iclass 30, count 0 2006.232.07:31:09.70#ibcon#*after write, iclass 30, count 0 2006.232.07:31:09.70#ibcon#*before return 0, iclass 30, count 0 2006.232.07:31:09.70#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:31:09.70#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:31:09.70#ibcon#about to clear, iclass 30 cls_cnt 0 2006.232.07:31:09.70#ibcon#cleared, iclass 30 cls_cnt 0 2006.232.07:31:09.70$vc4f8/valo=5,652.99 2006.232.07:31:09.70#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.232.07:31:09.70#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.232.07:31:09.70#ibcon#ireg 17 cls_cnt 0 2006.232.07:31:09.70#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:31:09.70#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:31:09.70#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:31:09.70#ibcon#enter wrdev, iclass 32, count 0 2006.232.07:31:09.70#ibcon#first serial, iclass 32, count 0 2006.232.07:31:09.70#ibcon#enter sib2, iclass 32, count 0 2006.232.07:31:09.70#ibcon#flushed, iclass 32, count 0 2006.232.07:31:09.70#ibcon#about to write, iclass 32, count 0 2006.232.07:31:09.70#ibcon#wrote, iclass 32, count 0 2006.232.07:31:09.70#ibcon#about to read 3, iclass 32, count 0 2006.232.07:31:09.72#ibcon#read 3, iclass 32, count 0 2006.232.07:31:09.72#ibcon#about to read 4, iclass 32, count 0 2006.232.07:31:09.72#ibcon#read 4, iclass 32, count 0 2006.232.07:31:09.72#ibcon#about to read 5, iclass 32, count 0 2006.232.07:31:09.72#ibcon#read 5, iclass 32, count 0 2006.232.07:31:09.72#ibcon#about to read 6, iclass 32, count 0 2006.232.07:31:09.72#ibcon#read 6, iclass 32, count 0 2006.232.07:31:09.72#ibcon#end of sib2, iclass 32, count 0 2006.232.07:31:09.72#ibcon#*mode == 0, iclass 32, count 0 2006.232.07:31:09.72#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.232.07:31:09.72#ibcon#[26=FRQ=05,652.99\r\n] 2006.232.07:31:09.72#ibcon#*before write, iclass 32, count 0 2006.232.07:31:09.72#ibcon#enter sib2, iclass 32, count 0 2006.232.07:31:09.72#ibcon#flushed, iclass 32, count 0 2006.232.07:31:09.72#ibcon#about to write, iclass 32, count 0 2006.232.07:31:09.72#ibcon#wrote, iclass 32, count 0 2006.232.07:31:09.72#ibcon#about to read 3, iclass 32, count 0 2006.232.07:31:09.76#ibcon#read 3, iclass 32, count 0 2006.232.07:31:09.76#ibcon#about to read 4, iclass 32, count 0 2006.232.07:31:09.76#ibcon#read 4, iclass 32, count 0 2006.232.07:31:09.76#ibcon#about to read 5, iclass 32, count 0 2006.232.07:31:09.76#ibcon#read 5, iclass 32, count 0 2006.232.07:31:09.76#ibcon#about to read 6, iclass 32, count 0 2006.232.07:31:09.76#ibcon#read 6, iclass 32, count 0 2006.232.07:31:09.76#ibcon#end of sib2, iclass 32, count 0 2006.232.07:31:09.76#ibcon#*after write, iclass 32, count 0 2006.232.07:31:09.76#ibcon#*before return 0, iclass 32, count 0 2006.232.07:31:09.76#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:31:09.76#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:31:09.76#ibcon#about to clear, iclass 32 cls_cnt 0 2006.232.07:31:09.76#ibcon#cleared, iclass 32 cls_cnt 0 2006.232.07:31:09.76$vc4f8/va=5,7 2006.232.07:31:09.76#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.232.07:31:09.76#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.232.07:31:09.76#ibcon#ireg 11 cls_cnt 2 2006.232.07:31:09.76#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:31:09.82#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:31:09.82#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:31:09.82#ibcon#enter wrdev, iclass 34, count 2 2006.232.07:31:09.82#ibcon#first serial, iclass 34, count 2 2006.232.07:31:09.82#ibcon#enter sib2, iclass 34, count 2 2006.232.07:31:09.82#ibcon#flushed, iclass 34, count 2 2006.232.07:31:09.82#ibcon#about to write, iclass 34, count 2 2006.232.07:31:09.82#ibcon#wrote, iclass 34, count 2 2006.232.07:31:09.82#ibcon#about to read 3, iclass 34, count 2 2006.232.07:31:09.84#ibcon#read 3, iclass 34, count 2 2006.232.07:31:09.84#ibcon#about to read 4, iclass 34, count 2 2006.232.07:31:09.84#ibcon#read 4, iclass 34, count 2 2006.232.07:31:09.84#ibcon#about to read 5, iclass 34, count 2 2006.232.07:31:09.84#ibcon#read 5, iclass 34, count 2 2006.232.07:31:09.84#ibcon#about to read 6, iclass 34, count 2 2006.232.07:31:09.84#ibcon#read 6, iclass 34, count 2 2006.232.07:31:09.84#ibcon#end of sib2, iclass 34, count 2 2006.232.07:31:09.84#ibcon#*mode == 0, iclass 34, count 2 2006.232.07:31:09.84#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.232.07:31:09.84#ibcon#[25=AT05-07\r\n] 2006.232.07:31:09.84#ibcon#*before write, iclass 34, count 2 2006.232.07:31:09.84#ibcon#enter sib2, iclass 34, count 2 2006.232.07:31:09.84#ibcon#flushed, iclass 34, count 2 2006.232.07:31:09.84#ibcon#about to write, iclass 34, count 2 2006.232.07:31:09.84#ibcon#wrote, iclass 34, count 2 2006.232.07:31:09.84#ibcon#about to read 3, iclass 34, count 2 2006.232.07:31:09.87#ibcon#read 3, iclass 34, count 2 2006.232.07:31:09.87#ibcon#about to read 4, iclass 34, count 2 2006.232.07:31:09.87#ibcon#read 4, iclass 34, count 2 2006.232.07:31:09.87#ibcon#about to read 5, iclass 34, count 2 2006.232.07:31:09.87#ibcon#read 5, iclass 34, count 2 2006.232.07:31:09.87#ibcon#about to read 6, iclass 34, count 2 2006.232.07:31:09.87#ibcon#read 6, iclass 34, count 2 2006.232.07:31:09.87#ibcon#end of sib2, iclass 34, count 2 2006.232.07:31:09.87#ibcon#*after write, iclass 34, count 2 2006.232.07:31:09.87#ibcon#*before return 0, iclass 34, count 2 2006.232.07:31:09.87#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:31:09.87#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:31:09.87#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.232.07:31:09.87#ibcon#ireg 7 cls_cnt 0 2006.232.07:31:09.87#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:31:09.99#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:31:09.99#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:31:09.99#ibcon#enter wrdev, iclass 34, count 0 2006.232.07:31:09.99#ibcon#first serial, iclass 34, count 0 2006.232.07:31:09.99#ibcon#enter sib2, iclass 34, count 0 2006.232.07:31:09.99#ibcon#flushed, iclass 34, count 0 2006.232.07:31:09.99#ibcon#about to write, iclass 34, count 0 2006.232.07:31:09.99#ibcon#wrote, iclass 34, count 0 2006.232.07:31:09.99#ibcon#about to read 3, iclass 34, count 0 2006.232.07:31:10.01#ibcon#read 3, iclass 34, count 0 2006.232.07:31:10.01#ibcon#about to read 4, iclass 34, count 0 2006.232.07:31:10.01#ibcon#read 4, iclass 34, count 0 2006.232.07:31:10.01#ibcon#about to read 5, iclass 34, count 0 2006.232.07:31:10.01#ibcon#read 5, iclass 34, count 0 2006.232.07:31:10.01#ibcon#about to read 6, iclass 34, count 0 2006.232.07:31:10.01#ibcon#read 6, iclass 34, count 0 2006.232.07:31:10.01#ibcon#end of sib2, iclass 34, count 0 2006.232.07:31:10.01#ibcon#*mode == 0, iclass 34, count 0 2006.232.07:31:10.01#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.232.07:31:10.01#ibcon#[25=USB\r\n] 2006.232.07:31:10.01#ibcon#*before write, iclass 34, count 0 2006.232.07:31:10.01#ibcon#enter sib2, iclass 34, count 0 2006.232.07:31:10.01#ibcon#flushed, iclass 34, count 0 2006.232.07:31:10.01#ibcon#about to write, iclass 34, count 0 2006.232.07:31:10.01#ibcon#wrote, iclass 34, count 0 2006.232.07:31:10.01#ibcon#about to read 3, iclass 34, count 0 2006.232.07:31:10.04#ibcon#read 3, iclass 34, count 0 2006.232.07:31:10.04#ibcon#about to read 4, iclass 34, count 0 2006.232.07:31:10.04#ibcon#read 4, iclass 34, count 0 2006.232.07:31:10.04#ibcon#about to read 5, iclass 34, count 0 2006.232.07:31:10.04#ibcon#read 5, iclass 34, count 0 2006.232.07:31:10.04#ibcon#about to read 6, iclass 34, count 0 2006.232.07:31:10.04#ibcon#read 6, iclass 34, count 0 2006.232.07:31:10.04#ibcon#end of sib2, iclass 34, count 0 2006.232.07:31:10.04#ibcon#*after write, iclass 34, count 0 2006.232.07:31:10.04#ibcon#*before return 0, iclass 34, count 0 2006.232.07:31:10.04#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:31:10.04#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:31:10.04#ibcon#about to clear, iclass 34 cls_cnt 0 2006.232.07:31:10.04#ibcon#cleared, iclass 34 cls_cnt 0 2006.232.07:31:10.04$vc4f8/valo=6,772.99 2006.232.07:31:10.04#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.232.07:31:10.04#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.232.07:31:10.04#ibcon#ireg 17 cls_cnt 0 2006.232.07:31:10.04#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:31:10.04#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:31:10.04#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:31:10.04#ibcon#enter wrdev, iclass 36, count 0 2006.232.07:31:10.04#ibcon#first serial, iclass 36, count 0 2006.232.07:31:10.04#ibcon#enter sib2, iclass 36, count 0 2006.232.07:31:10.04#ibcon#flushed, iclass 36, count 0 2006.232.07:31:10.04#ibcon#about to write, iclass 36, count 0 2006.232.07:31:10.04#ibcon#wrote, iclass 36, count 0 2006.232.07:31:10.04#ibcon#about to read 3, iclass 36, count 0 2006.232.07:31:10.06#ibcon#read 3, iclass 36, count 0 2006.232.07:31:10.06#ibcon#about to read 4, iclass 36, count 0 2006.232.07:31:10.06#ibcon#read 4, iclass 36, count 0 2006.232.07:31:10.06#ibcon#about to read 5, iclass 36, count 0 2006.232.07:31:10.06#ibcon#read 5, iclass 36, count 0 2006.232.07:31:10.06#ibcon#about to read 6, iclass 36, count 0 2006.232.07:31:10.06#ibcon#read 6, iclass 36, count 0 2006.232.07:31:10.06#ibcon#end of sib2, iclass 36, count 0 2006.232.07:31:10.06#ibcon#*mode == 0, iclass 36, count 0 2006.232.07:31:10.06#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.232.07:31:10.06#ibcon#[26=FRQ=06,772.99\r\n] 2006.232.07:31:10.06#ibcon#*before write, iclass 36, count 0 2006.232.07:31:10.06#ibcon#enter sib2, iclass 36, count 0 2006.232.07:31:10.06#ibcon#flushed, iclass 36, count 0 2006.232.07:31:10.06#ibcon#about to write, iclass 36, count 0 2006.232.07:31:10.06#ibcon#wrote, iclass 36, count 0 2006.232.07:31:10.06#ibcon#about to read 3, iclass 36, count 0 2006.232.07:31:10.10#ibcon#read 3, iclass 36, count 0 2006.232.07:31:10.10#ibcon#about to read 4, iclass 36, count 0 2006.232.07:31:10.10#ibcon#read 4, iclass 36, count 0 2006.232.07:31:10.10#ibcon#about to read 5, iclass 36, count 0 2006.232.07:31:10.10#ibcon#read 5, iclass 36, count 0 2006.232.07:31:10.10#ibcon#about to read 6, iclass 36, count 0 2006.232.07:31:10.10#ibcon#read 6, iclass 36, count 0 2006.232.07:31:10.10#ibcon#end of sib2, iclass 36, count 0 2006.232.07:31:10.10#ibcon#*after write, iclass 36, count 0 2006.232.07:31:10.10#ibcon#*before return 0, iclass 36, count 0 2006.232.07:31:10.10#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:31:10.10#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:31:10.10#ibcon#about to clear, iclass 36 cls_cnt 0 2006.232.07:31:10.10#ibcon#cleared, iclass 36 cls_cnt 0 2006.232.07:31:10.10$vc4f8/va=6,6 2006.232.07:31:10.10#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.232.07:31:10.10#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.232.07:31:10.10#ibcon#ireg 11 cls_cnt 2 2006.232.07:31:10.10#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.232.07:31:10.16#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.232.07:31:10.16#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.232.07:31:10.16#ibcon#enter wrdev, iclass 38, count 2 2006.232.07:31:10.16#ibcon#first serial, iclass 38, count 2 2006.232.07:31:10.16#ibcon#enter sib2, iclass 38, count 2 2006.232.07:31:10.16#ibcon#flushed, iclass 38, count 2 2006.232.07:31:10.16#ibcon#about to write, iclass 38, count 2 2006.232.07:31:10.16#ibcon#wrote, iclass 38, count 2 2006.232.07:31:10.16#ibcon#about to read 3, iclass 38, count 2 2006.232.07:31:10.18#ibcon#read 3, iclass 38, count 2 2006.232.07:31:10.18#ibcon#about to read 4, iclass 38, count 2 2006.232.07:31:10.18#ibcon#read 4, iclass 38, count 2 2006.232.07:31:10.18#ibcon#about to read 5, iclass 38, count 2 2006.232.07:31:10.18#ibcon#read 5, iclass 38, count 2 2006.232.07:31:10.18#ibcon#about to read 6, iclass 38, count 2 2006.232.07:31:10.18#ibcon#read 6, iclass 38, count 2 2006.232.07:31:10.18#ibcon#end of sib2, iclass 38, count 2 2006.232.07:31:10.18#ibcon#*mode == 0, iclass 38, count 2 2006.232.07:31:10.18#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.232.07:31:10.18#ibcon#[25=AT06-06\r\n] 2006.232.07:31:10.18#ibcon#*before write, iclass 38, count 2 2006.232.07:31:10.18#ibcon#enter sib2, iclass 38, count 2 2006.232.07:31:10.18#ibcon#flushed, iclass 38, count 2 2006.232.07:31:10.18#ibcon#about to write, iclass 38, count 2 2006.232.07:31:10.18#ibcon#wrote, iclass 38, count 2 2006.232.07:31:10.18#ibcon#about to read 3, iclass 38, count 2 2006.232.07:31:10.21#ibcon#read 3, iclass 38, count 2 2006.232.07:31:10.21#ibcon#about to read 4, iclass 38, count 2 2006.232.07:31:10.21#ibcon#read 4, iclass 38, count 2 2006.232.07:31:10.21#ibcon#about to read 5, iclass 38, count 2 2006.232.07:31:10.21#ibcon#read 5, iclass 38, count 2 2006.232.07:31:10.21#ibcon#about to read 6, iclass 38, count 2 2006.232.07:31:10.21#ibcon#read 6, iclass 38, count 2 2006.232.07:31:10.21#ibcon#end of sib2, iclass 38, count 2 2006.232.07:31:10.21#ibcon#*after write, iclass 38, count 2 2006.232.07:31:10.21#ibcon#*before return 0, iclass 38, count 2 2006.232.07:31:10.21#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.232.07:31:10.21#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.232.07:31:10.21#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.232.07:31:10.21#ibcon#ireg 7 cls_cnt 0 2006.232.07:31:10.21#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.232.07:31:10.33#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.232.07:31:10.33#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.232.07:31:10.33#ibcon#enter wrdev, iclass 38, count 0 2006.232.07:31:10.33#ibcon#first serial, iclass 38, count 0 2006.232.07:31:10.33#ibcon#enter sib2, iclass 38, count 0 2006.232.07:31:10.33#ibcon#flushed, iclass 38, count 0 2006.232.07:31:10.33#ibcon#about to write, iclass 38, count 0 2006.232.07:31:10.33#ibcon#wrote, iclass 38, count 0 2006.232.07:31:10.33#ibcon#about to read 3, iclass 38, count 0 2006.232.07:31:10.35#ibcon#read 3, iclass 38, count 0 2006.232.07:31:10.35#ibcon#about to read 4, iclass 38, count 0 2006.232.07:31:10.35#ibcon#read 4, iclass 38, count 0 2006.232.07:31:10.35#ibcon#about to read 5, iclass 38, count 0 2006.232.07:31:10.35#ibcon#read 5, iclass 38, count 0 2006.232.07:31:10.35#ibcon#about to read 6, iclass 38, count 0 2006.232.07:31:10.35#ibcon#read 6, iclass 38, count 0 2006.232.07:31:10.35#ibcon#end of sib2, iclass 38, count 0 2006.232.07:31:10.35#ibcon#*mode == 0, iclass 38, count 0 2006.232.07:31:10.35#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.232.07:31:10.35#ibcon#[25=USB\r\n] 2006.232.07:31:10.35#ibcon#*before write, iclass 38, count 0 2006.232.07:31:10.35#ibcon#enter sib2, iclass 38, count 0 2006.232.07:31:10.35#ibcon#flushed, iclass 38, count 0 2006.232.07:31:10.35#ibcon#about to write, iclass 38, count 0 2006.232.07:31:10.35#ibcon#wrote, iclass 38, count 0 2006.232.07:31:10.35#ibcon#about to read 3, iclass 38, count 0 2006.232.07:31:10.38#ibcon#read 3, iclass 38, count 0 2006.232.07:31:10.38#ibcon#about to read 4, iclass 38, count 0 2006.232.07:31:10.38#ibcon#read 4, iclass 38, count 0 2006.232.07:31:10.38#ibcon#about to read 5, iclass 38, count 0 2006.232.07:31:10.38#ibcon#read 5, iclass 38, count 0 2006.232.07:31:10.38#ibcon#about to read 6, iclass 38, count 0 2006.232.07:31:10.38#ibcon#read 6, iclass 38, count 0 2006.232.07:31:10.38#ibcon#end of sib2, iclass 38, count 0 2006.232.07:31:10.38#ibcon#*after write, iclass 38, count 0 2006.232.07:31:10.38#ibcon#*before return 0, iclass 38, count 0 2006.232.07:31:10.38#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.232.07:31:10.38#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.232.07:31:10.38#ibcon#about to clear, iclass 38 cls_cnt 0 2006.232.07:31:10.38#ibcon#cleared, iclass 38 cls_cnt 0 2006.232.07:31:10.38$vc4f8/valo=7,832.99 2006.232.07:31:10.38#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.232.07:31:10.38#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.232.07:31:10.38#ibcon#ireg 17 cls_cnt 0 2006.232.07:31:10.38#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:31:10.38#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:31:10.38#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:31:10.38#ibcon#enter wrdev, iclass 40, count 0 2006.232.07:31:10.38#ibcon#first serial, iclass 40, count 0 2006.232.07:31:10.38#ibcon#enter sib2, iclass 40, count 0 2006.232.07:31:10.38#ibcon#flushed, iclass 40, count 0 2006.232.07:31:10.38#ibcon#about to write, iclass 40, count 0 2006.232.07:31:10.38#ibcon#wrote, iclass 40, count 0 2006.232.07:31:10.38#ibcon#about to read 3, iclass 40, count 0 2006.232.07:31:10.40#ibcon#read 3, iclass 40, count 0 2006.232.07:31:10.40#ibcon#about to read 4, iclass 40, count 0 2006.232.07:31:10.40#ibcon#read 4, iclass 40, count 0 2006.232.07:31:10.40#ibcon#about to read 5, iclass 40, count 0 2006.232.07:31:10.40#ibcon#read 5, iclass 40, count 0 2006.232.07:31:10.40#ibcon#about to read 6, iclass 40, count 0 2006.232.07:31:10.40#ibcon#read 6, iclass 40, count 0 2006.232.07:31:10.40#ibcon#end of sib2, iclass 40, count 0 2006.232.07:31:10.40#ibcon#*mode == 0, iclass 40, count 0 2006.232.07:31:10.40#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.232.07:31:10.40#ibcon#[26=FRQ=07,832.99\r\n] 2006.232.07:31:10.40#ibcon#*before write, iclass 40, count 0 2006.232.07:31:10.40#ibcon#enter sib2, iclass 40, count 0 2006.232.07:31:10.40#ibcon#flushed, iclass 40, count 0 2006.232.07:31:10.40#ibcon#about to write, iclass 40, count 0 2006.232.07:31:10.40#ibcon#wrote, iclass 40, count 0 2006.232.07:31:10.40#ibcon#about to read 3, iclass 40, count 0 2006.232.07:31:10.44#ibcon#read 3, iclass 40, count 0 2006.232.07:31:10.44#ibcon#about to read 4, iclass 40, count 0 2006.232.07:31:10.44#ibcon#read 4, iclass 40, count 0 2006.232.07:31:10.44#ibcon#about to read 5, iclass 40, count 0 2006.232.07:31:10.44#ibcon#read 5, iclass 40, count 0 2006.232.07:31:10.44#ibcon#about to read 6, iclass 40, count 0 2006.232.07:31:10.44#ibcon#read 6, iclass 40, count 0 2006.232.07:31:10.44#ibcon#end of sib2, iclass 40, count 0 2006.232.07:31:10.44#ibcon#*after write, iclass 40, count 0 2006.232.07:31:10.44#ibcon#*before return 0, iclass 40, count 0 2006.232.07:31:10.44#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:31:10.44#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:31:10.44#ibcon#about to clear, iclass 40 cls_cnt 0 2006.232.07:31:10.44#ibcon#cleared, iclass 40 cls_cnt 0 2006.232.07:31:10.44$vc4f8/va=7,6 2006.232.07:31:10.44#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.232.07:31:10.44#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.232.07:31:10.44#ibcon#ireg 11 cls_cnt 2 2006.232.07:31:10.44#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:31:10.50#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:31:10.50#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:31:10.50#ibcon#enter wrdev, iclass 4, count 2 2006.232.07:31:10.50#ibcon#first serial, iclass 4, count 2 2006.232.07:31:10.50#ibcon#enter sib2, iclass 4, count 2 2006.232.07:31:10.50#ibcon#flushed, iclass 4, count 2 2006.232.07:31:10.50#ibcon#about to write, iclass 4, count 2 2006.232.07:31:10.50#ibcon#wrote, iclass 4, count 2 2006.232.07:31:10.50#ibcon#about to read 3, iclass 4, count 2 2006.232.07:31:10.52#ibcon#read 3, iclass 4, count 2 2006.232.07:31:10.52#ibcon#about to read 4, iclass 4, count 2 2006.232.07:31:10.52#ibcon#read 4, iclass 4, count 2 2006.232.07:31:10.52#ibcon#about to read 5, iclass 4, count 2 2006.232.07:31:10.52#ibcon#read 5, iclass 4, count 2 2006.232.07:31:10.52#ibcon#about to read 6, iclass 4, count 2 2006.232.07:31:10.52#ibcon#read 6, iclass 4, count 2 2006.232.07:31:10.52#ibcon#end of sib2, iclass 4, count 2 2006.232.07:31:10.52#ibcon#*mode == 0, iclass 4, count 2 2006.232.07:31:10.52#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.232.07:31:10.52#ibcon#[25=AT07-06\r\n] 2006.232.07:31:10.52#ibcon#*before write, iclass 4, count 2 2006.232.07:31:10.52#ibcon#enter sib2, iclass 4, count 2 2006.232.07:31:10.52#ibcon#flushed, iclass 4, count 2 2006.232.07:31:10.52#ibcon#about to write, iclass 4, count 2 2006.232.07:31:10.52#ibcon#wrote, iclass 4, count 2 2006.232.07:31:10.52#ibcon#about to read 3, iclass 4, count 2 2006.232.07:31:10.55#ibcon#read 3, iclass 4, count 2 2006.232.07:31:10.55#ibcon#about to read 4, iclass 4, count 2 2006.232.07:31:10.55#ibcon#read 4, iclass 4, count 2 2006.232.07:31:10.55#ibcon#about to read 5, iclass 4, count 2 2006.232.07:31:10.55#ibcon#read 5, iclass 4, count 2 2006.232.07:31:10.55#ibcon#about to read 6, iclass 4, count 2 2006.232.07:31:10.55#ibcon#read 6, iclass 4, count 2 2006.232.07:31:10.55#ibcon#end of sib2, iclass 4, count 2 2006.232.07:31:10.55#ibcon#*after write, iclass 4, count 2 2006.232.07:31:10.55#ibcon#*before return 0, iclass 4, count 2 2006.232.07:31:10.55#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:31:10.55#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:31:10.55#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.232.07:31:10.55#ibcon#ireg 7 cls_cnt 0 2006.232.07:31:10.55#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:31:10.67#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:31:10.67#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:31:10.67#ibcon#enter wrdev, iclass 4, count 0 2006.232.07:31:10.67#ibcon#first serial, iclass 4, count 0 2006.232.07:31:10.67#ibcon#enter sib2, iclass 4, count 0 2006.232.07:31:10.67#ibcon#flushed, iclass 4, count 0 2006.232.07:31:10.67#ibcon#about to write, iclass 4, count 0 2006.232.07:31:10.67#ibcon#wrote, iclass 4, count 0 2006.232.07:31:10.67#ibcon#about to read 3, iclass 4, count 0 2006.232.07:31:10.69#ibcon#read 3, iclass 4, count 0 2006.232.07:31:10.69#ibcon#about to read 4, iclass 4, count 0 2006.232.07:31:10.69#ibcon#read 4, iclass 4, count 0 2006.232.07:31:10.69#ibcon#about to read 5, iclass 4, count 0 2006.232.07:31:10.69#ibcon#read 5, iclass 4, count 0 2006.232.07:31:10.69#ibcon#about to read 6, iclass 4, count 0 2006.232.07:31:10.69#ibcon#read 6, iclass 4, count 0 2006.232.07:31:10.69#ibcon#end of sib2, iclass 4, count 0 2006.232.07:31:10.69#ibcon#*mode == 0, iclass 4, count 0 2006.232.07:31:10.69#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.232.07:31:10.69#ibcon#[25=USB\r\n] 2006.232.07:31:10.69#ibcon#*before write, iclass 4, count 0 2006.232.07:31:10.69#ibcon#enter sib2, iclass 4, count 0 2006.232.07:31:10.69#ibcon#flushed, iclass 4, count 0 2006.232.07:31:10.69#ibcon#about to write, iclass 4, count 0 2006.232.07:31:10.69#ibcon#wrote, iclass 4, count 0 2006.232.07:31:10.69#ibcon#about to read 3, iclass 4, count 0 2006.232.07:31:10.72#ibcon#read 3, iclass 4, count 0 2006.232.07:31:10.72#ibcon#about to read 4, iclass 4, count 0 2006.232.07:31:10.72#ibcon#read 4, iclass 4, count 0 2006.232.07:31:10.72#ibcon#about to read 5, iclass 4, count 0 2006.232.07:31:10.72#ibcon#read 5, iclass 4, count 0 2006.232.07:31:10.72#ibcon#about to read 6, iclass 4, count 0 2006.232.07:31:10.72#ibcon#read 6, iclass 4, count 0 2006.232.07:31:10.72#ibcon#end of sib2, iclass 4, count 0 2006.232.07:31:10.72#ibcon#*after write, iclass 4, count 0 2006.232.07:31:10.72#ibcon#*before return 0, iclass 4, count 0 2006.232.07:31:10.72#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:31:10.72#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:31:10.72#ibcon#about to clear, iclass 4 cls_cnt 0 2006.232.07:31:10.72#ibcon#cleared, iclass 4 cls_cnt 0 2006.232.07:31:10.72$vc4f8/valo=8,852.99 2006.232.07:31:10.72#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.232.07:31:10.72#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.232.07:31:10.72#ibcon#ireg 17 cls_cnt 0 2006.232.07:31:10.72#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:31:10.72#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:31:10.72#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:31:10.72#ibcon#enter wrdev, iclass 6, count 0 2006.232.07:31:10.72#ibcon#first serial, iclass 6, count 0 2006.232.07:31:10.72#ibcon#enter sib2, iclass 6, count 0 2006.232.07:31:10.72#ibcon#flushed, iclass 6, count 0 2006.232.07:31:10.72#ibcon#about to write, iclass 6, count 0 2006.232.07:31:10.72#ibcon#wrote, iclass 6, count 0 2006.232.07:31:10.72#ibcon#about to read 3, iclass 6, count 0 2006.232.07:31:10.74#ibcon#read 3, iclass 6, count 0 2006.232.07:31:10.74#ibcon#about to read 4, iclass 6, count 0 2006.232.07:31:10.74#ibcon#read 4, iclass 6, count 0 2006.232.07:31:10.74#ibcon#about to read 5, iclass 6, count 0 2006.232.07:31:10.74#ibcon#read 5, iclass 6, count 0 2006.232.07:31:10.74#ibcon#about to read 6, iclass 6, count 0 2006.232.07:31:10.74#ibcon#read 6, iclass 6, count 0 2006.232.07:31:10.74#ibcon#end of sib2, iclass 6, count 0 2006.232.07:31:10.74#ibcon#*mode == 0, iclass 6, count 0 2006.232.07:31:10.74#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.232.07:31:10.74#ibcon#[26=FRQ=08,852.99\r\n] 2006.232.07:31:10.74#ibcon#*before write, iclass 6, count 0 2006.232.07:31:10.74#ibcon#enter sib2, iclass 6, count 0 2006.232.07:31:10.74#ibcon#flushed, iclass 6, count 0 2006.232.07:31:10.74#ibcon#about to write, iclass 6, count 0 2006.232.07:31:10.74#ibcon#wrote, iclass 6, count 0 2006.232.07:31:10.74#ibcon#about to read 3, iclass 6, count 0 2006.232.07:31:10.79#ibcon#read 3, iclass 6, count 0 2006.232.07:31:10.79#ibcon#about to read 4, iclass 6, count 0 2006.232.07:31:10.79#ibcon#read 4, iclass 6, count 0 2006.232.07:31:10.79#ibcon#about to read 5, iclass 6, count 0 2006.232.07:31:10.79#ibcon#read 5, iclass 6, count 0 2006.232.07:31:10.79#ibcon#about to read 6, iclass 6, count 0 2006.232.07:31:10.79#ibcon#read 6, iclass 6, count 0 2006.232.07:31:10.79#ibcon#end of sib2, iclass 6, count 0 2006.232.07:31:10.79#ibcon#*after write, iclass 6, count 0 2006.232.07:31:10.79#ibcon#*before return 0, iclass 6, count 0 2006.232.07:31:10.79#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:31:10.79#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:31:10.79#ibcon#about to clear, iclass 6 cls_cnt 0 2006.232.07:31:10.79#ibcon#cleared, iclass 6 cls_cnt 0 2006.232.07:31:10.79$vc4f8/va=8,6 2006.232.07:31:10.79#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.232.07:31:10.79#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.232.07:31:10.79#ibcon#ireg 11 cls_cnt 2 2006.232.07:31:10.79#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.232.07:31:10.84#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.232.07:31:10.84#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.232.07:31:10.84#ibcon#enter wrdev, iclass 10, count 2 2006.232.07:31:10.84#ibcon#first serial, iclass 10, count 2 2006.232.07:31:10.84#ibcon#enter sib2, iclass 10, count 2 2006.232.07:31:10.84#ibcon#flushed, iclass 10, count 2 2006.232.07:31:10.84#ibcon#about to write, iclass 10, count 2 2006.232.07:31:10.84#ibcon#wrote, iclass 10, count 2 2006.232.07:31:10.84#ibcon#about to read 3, iclass 10, count 2 2006.232.07:31:10.86#ibcon#read 3, iclass 10, count 2 2006.232.07:31:10.86#ibcon#about to read 4, iclass 10, count 2 2006.232.07:31:10.86#ibcon#read 4, iclass 10, count 2 2006.232.07:31:10.86#ibcon#about to read 5, iclass 10, count 2 2006.232.07:31:10.86#ibcon#read 5, iclass 10, count 2 2006.232.07:31:10.86#ibcon#about to read 6, iclass 10, count 2 2006.232.07:31:10.86#ibcon#read 6, iclass 10, count 2 2006.232.07:31:10.86#ibcon#end of sib2, iclass 10, count 2 2006.232.07:31:10.86#ibcon#*mode == 0, iclass 10, count 2 2006.232.07:31:10.86#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.232.07:31:10.86#ibcon#[25=AT08-06\r\n] 2006.232.07:31:10.86#ibcon#*before write, iclass 10, count 2 2006.232.07:31:10.86#ibcon#enter sib2, iclass 10, count 2 2006.232.07:31:10.86#ibcon#flushed, iclass 10, count 2 2006.232.07:31:10.86#ibcon#about to write, iclass 10, count 2 2006.232.07:31:10.86#ibcon#wrote, iclass 10, count 2 2006.232.07:31:10.86#ibcon#about to read 3, iclass 10, count 2 2006.232.07:31:10.90#ibcon#read 3, iclass 10, count 2 2006.232.07:31:10.90#ibcon#about to read 4, iclass 10, count 2 2006.232.07:31:10.90#ibcon#read 4, iclass 10, count 2 2006.232.07:31:10.90#ibcon#about to read 5, iclass 10, count 2 2006.232.07:31:10.90#ibcon#read 5, iclass 10, count 2 2006.232.07:31:10.90#ibcon#about to read 6, iclass 10, count 2 2006.232.07:31:10.90#ibcon#read 6, iclass 10, count 2 2006.232.07:31:10.90#ibcon#end of sib2, iclass 10, count 2 2006.232.07:31:10.90#ibcon#*after write, iclass 10, count 2 2006.232.07:31:10.90#ibcon#*before return 0, iclass 10, count 2 2006.232.07:31:10.90#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.232.07:31:10.90#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.232.07:31:10.90#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.232.07:31:10.90#ibcon#ireg 7 cls_cnt 0 2006.232.07:31:10.90#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.232.07:31:11.02#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.232.07:31:11.02#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.232.07:31:11.02#ibcon#enter wrdev, iclass 10, count 0 2006.232.07:31:11.02#ibcon#first serial, iclass 10, count 0 2006.232.07:31:11.02#ibcon#enter sib2, iclass 10, count 0 2006.232.07:31:11.02#ibcon#flushed, iclass 10, count 0 2006.232.07:31:11.02#ibcon#about to write, iclass 10, count 0 2006.232.07:31:11.02#ibcon#wrote, iclass 10, count 0 2006.232.07:31:11.02#ibcon#about to read 3, iclass 10, count 0 2006.232.07:31:11.04#ibcon#read 3, iclass 10, count 0 2006.232.07:31:11.04#ibcon#about to read 4, iclass 10, count 0 2006.232.07:31:11.04#ibcon#read 4, iclass 10, count 0 2006.232.07:31:11.04#ibcon#about to read 5, iclass 10, count 0 2006.232.07:31:11.04#ibcon#read 5, iclass 10, count 0 2006.232.07:31:11.04#ibcon#about to read 6, iclass 10, count 0 2006.232.07:31:11.04#ibcon#read 6, iclass 10, count 0 2006.232.07:31:11.04#ibcon#end of sib2, iclass 10, count 0 2006.232.07:31:11.04#ibcon#*mode == 0, iclass 10, count 0 2006.232.07:31:11.04#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.232.07:31:11.04#ibcon#[25=USB\r\n] 2006.232.07:31:11.04#ibcon#*before write, iclass 10, count 0 2006.232.07:31:11.04#ibcon#enter sib2, iclass 10, count 0 2006.232.07:31:11.04#ibcon#flushed, iclass 10, count 0 2006.232.07:31:11.04#ibcon#about to write, iclass 10, count 0 2006.232.07:31:11.04#ibcon#wrote, iclass 10, count 0 2006.232.07:31:11.04#ibcon#about to read 3, iclass 10, count 0 2006.232.07:31:11.07#ibcon#read 3, iclass 10, count 0 2006.232.07:31:11.07#ibcon#about to read 4, iclass 10, count 0 2006.232.07:31:11.07#ibcon#read 4, iclass 10, count 0 2006.232.07:31:11.07#ibcon#about to read 5, iclass 10, count 0 2006.232.07:31:11.07#ibcon#read 5, iclass 10, count 0 2006.232.07:31:11.07#ibcon#about to read 6, iclass 10, count 0 2006.232.07:31:11.07#ibcon#read 6, iclass 10, count 0 2006.232.07:31:11.07#ibcon#end of sib2, iclass 10, count 0 2006.232.07:31:11.07#ibcon#*after write, iclass 10, count 0 2006.232.07:31:11.07#ibcon#*before return 0, iclass 10, count 0 2006.232.07:31:11.07#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.232.07:31:11.07#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.232.07:31:11.07#ibcon#about to clear, iclass 10 cls_cnt 0 2006.232.07:31:11.07#ibcon#cleared, iclass 10 cls_cnt 0 2006.232.07:31:11.07$vc4f8/vblo=1,632.99 2006.232.07:31:11.07#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.232.07:31:11.07#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.232.07:31:11.07#ibcon#ireg 17 cls_cnt 0 2006.232.07:31:11.07#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.232.07:31:11.07#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.232.07:31:11.07#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.232.07:31:11.07#ibcon#enter wrdev, iclass 12, count 0 2006.232.07:31:11.07#ibcon#first serial, iclass 12, count 0 2006.232.07:31:11.07#ibcon#enter sib2, iclass 12, count 0 2006.232.07:31:11.07#ibcon#flushed, iclass 12, count 0 2006.232.07:31:11.07#ibcon#about to write, iclass 12, count 0 2006.232.07:31:11.07#ibcon#wrote, iclass 12, count 0 2006.232.07:31:11.07#ibcon#about to read 3, iclass 12, count 0 2006.232.07:31:11.09#ibcon#read 3, iclass 12, count 0 2006.232.07:31:11.09#ibcon#about to read 4, iclass 12, count 0 2006.232.07:31:11.09#ibcon#read 4, iclass 12, count 0 2006.232.07:31:11.09#ibcon#about to read 5, iclass 12, count 0 2006.232.07:31:11.09#ibcon#read 5, iclass 12, count 0 2006.232.07:31:11.09#ibcon#about to read 6, iclass 12, count 0 2006.232.07:31:11.09#ibcon#read 6, iclass 12, count 0 2006.232.07:31:11.09#ibcon#end of sib2, iclass 12, count 0 2006.232.07:31:11.09#ibcon#*mode == 0, iclass 12, count 0 2006.232.07:31:11.09#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.232.07:31:11.09#ibcon#[28=FRQ=01,632.99\r\n] 2006.232.07:31:11.09#ibcon#*before write, iclass 12, count 0 2006.232.07:31:11.09#ibcon#enter sib2, iclass 12, count 0 2006.232.07:31:11.09#ibcon#flushed, iclass 12, count 0 2006.232.07:31:11.09#ibcon#about to write, iclass 12, count 0 2006.232.07:31:11.09#ibcon#wrote, iclass 12, count 0 2006.232.07:31:11.09#ibcon#about to read 3, iclass 12, count 0 2006.232.07:31:11.13#ibcon#read 3, iclass 12, count 0 2006.232.07:31:11.13#ibcon#about to read 4, iclass 12, count 0 2006.232.07:31:11.13#ibcon#read 4, iclass 12, count 0 2006.232.07:31:11.13#ibcon#about to read 5, iclass 12, count 0 2006.232.07:31:11.13#ibcon#read 5, iclass 12, count 0 2006.232.07:31:11.13#ibcon#about to read 6, iclass 12, count 0 2006.232.07:31:11.13#ibcon#read 6, iclass 12, count 0 2006.232.07:31:11.13#ibcon#end of sib2, iclass 12, count 0 2006.232.07:31:11.13#ibcon#*after write, iclass 12, count 0 2006.232.07:31:11.13#ibcon#*before return 0, iclass 12, count 0 2006.232.07:31:11.13#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.232.07:31:11.13#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.232.07:31:11.13#ibcon#about to clear, iclass 12 cls_cnt 0 2006.232.07:31:11.13#ibcon#cleared, iclass 12 cls_cnt 0 2006.232.07:31:11.13$vc4f8/vb=1,4 2006.232.07:31:11.13#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.232.07:31:11.13#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.232.07:31:11.13#ibcon#ireg 11 cls_cnt 2 2006.232.07:31:11.13#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.232.07:31:11.13#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.232.07:31:11.13#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.232.07:31:11.13#ibcon#enter wrdev, iclass 14, count 2 2006.232.07:31:11.13#ibcon#first serial, iclass 14, count 2 2006.232.07:31:11.13#ibcon#enter sib2, iclass 14, count 2 2006.232.07:31:11.13#ibcon#flushed, iclass 14, count 2 2006.232.07:31:11.13#ibcon#about to write, iclass 14, count 2 2006.232.07:31:11.13#ibcon#wrote, iclass 14, count 2 2006.232.07:31:11.13#ibcon#about to read 3, iclass 14, count 2 2006.232.07:31:11.15#ibcon#read 3, iclass 14, count 2 2006.232.07:31:11.15#ibcon#about to read 4, iclass 14, count 2 2006.232.07:31:11.15#ibcon#read 4, iclass 14, count 2 2006.232.07:31:11.15#ibcon#about to read 5, iclass 14, count 2 2006.232.07:31:11.15#ibcon#read 5, iclass 14, count 2 2006.232.07:31:11.15#ibcon#about to read 6, iclass 14, count 2 2006.232.07:31:11.15#ibcon#read 6, iclass 14, count 2 2006.232.07:31:11.15#ibcon#end of sib2, iclass 14, count 2 2006.232.07:31:11.15#ibcon#*mode == 0, iclass 14, count 2 2006.232.07:31:11.15#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.232.07:31:11.15#ibcon#[27=AT01-04\r\n] 2006.232.07:31:11.15#ibcon#*before write, iclass 14, count 2 2006.232.07:31:11.15#ibcon#enter sib2, iclass 14, count 2 2006.232.07:31:11.15#ibcon#flushed, iclass 14, count 2 2006.232.07:31:11.15#ibcon#about to write, iclass 14, count 2 2006.232.07:31:11.15#ibcon#wrote, iclass 14, count 2 2006.232.07:31:11.15#ibcon#about to read 3, iclass 14, count 2 2006.232.07:31:11.18#ibcon#read 3, iclass 14, count 2 2006.232.07:31:11.18#ibcon#about to read 4, iclass 14, count 2 2006.232.07:31:11.18#ibcon#read 4, iclass 14, count 2 2006.232.07:31:11.18#ibcon#about to read 5, iclass 14, count 2 2006.232.07:31:11.18#ibcon#read 5, iclass 14, count 2 2006.232.07:31:11.18#ibcon#about to read 6, iclass 14, count 2 2006.232.07:31:11.18#ibcon#read 6, iclass 14, count 2 2006.232.07:31:11.18#ibcon#end of sib2, iclass 14, count 2 2006.232.07:31:11.18#ibcon#*after write, iclass 14, count 2 2006.232.07:31:11.18#ibcon#*before return 0, iclass 14, count 2 2006.232.07:31:11.18#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.232.07:31:11.18#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.232.07:31:11.18#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.232.07:31:11.18#ibcon#ireg 7 cls_cnt 0 2006.232.07:31:11.18#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.232.07:31:11.30#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.232.07:31:11.30#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.232.07:31:11.30#ibcon#enter wrdev, iclass 14, count 0 2006.232.07:31:11.30#ibcon#first serial, iclass 14, count 0 2006.232.07:31:11.30#ibcon#enter sib2, iclass 14, count 0 2006.232.07:31:11.30#ibcon#flushed, iclass 14, count 0 2006.232.07:31:11.30#ibcon#about to write, iclass 14, count 0 2006.232.07:31:11.30#ibcon#wrote, iclass 14, count 0 2006.232.07:31:11.30#ibcon#about to read 3, iclass 14, count 0 2006.232.07:31:11.32#ibcon#read 3, iclass 14, count 0 2006.232.07:31:11.32#ibcon#about to read 4, iclass 14, count 0 2006.232.07:31:11.32#ibcon#read 4, iclass 14, count 0 2006.232.07:31:11.32#ibcon#about to read 5, iclass 14, count 0 2006.232.07:31:11.32#ibcon#read 5, iclass 14, count 0 2006.232.07:31:11.32#ibcon#about to read 6, iclass 14, count 0 2006.232.07:31:11.32#ibcon#read 6, iclass 14, count 0 2006.232.07:31:11.32#ibcon#end of sib2, iclass 14, count 0 2006.232.07:31:11.32#ibcon#*mode == 0, iclass 14, count 0 2006.232.07:31:11.32#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.232.07:31:11.32#ibcon#[27=USB\r\n] 2006.232.07:31:11.32#ibcon#*before write, iclass 14, count 0 2006.232.07:31:11.32#ibcon#enter sib2, iclass 14, count 0 2006.232.07:31:11.32#ibcon#flushed, iclass 14, count 0 2006.232.07:31:11.32#ibcon#about to write, iclass 14, count 0 2006.232.07:31:11.32#ibcon#wrote, iclass 14, count 0 2006.232.07:31:11.32#ibcon#about to read 3, iclass 14, count 0 2006.232.07:31:11.35#ibcon#read 3, iclass 14, count 0 2006.232.07:31:11.35#ibcon#about to read 4, iclass 14, count 0 2006.232.07:31:11.35#ibcon#read 4, iclass 14, count 0 2006.232.07:31:11.35#ibcon#about to read 5, iclass 14, count 0 2006.232.07:31:11.35#ibcon#read 5, iclass 14, count 0 2006.232.07:31:11.35#ibcon#about to read 6, iclass 14, count 0 2006.232.07:31:11.35#ibcon#read 6, iclass 14, count 0 2006.232.07:31:11.35#ibcon#end of sib2, iclass 14, count 0 2006.232.07:31:11.35#ibcon#*after write, iclass 14, count 0 2006.232.07:31:11.35#ibcon#*before return 0, iclass 14, count 0 2006.232.07:31:11.35#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.232.07:31:11.35#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.232.07:31:11.35#ibcon#about to clear, iclass 14 cls_cnt 0 2006.232.07:31:11.35#ibcon#cleared, iclass 14 cls_cnt 0 2006.232.07:31:11.35$vc4f8/vblo=2,640.99 2006.232.07:31:11.35#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.232.07:31:11.35#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.232.07:31:11.35#ibcon#ireg 17 cls_cnt 0 2006.232.07:31:11.35#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:31:11.35#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:31:11.35#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:31:11.35#ibcon#enter wrdev, iclass 16, count 0 2006.232.07:31:11.35#ibcon#first serial, iclass 16, count 0 2006.232.07:31:11.35#ibcon#enter sib2, iclass 16, count 0 2006.232.07:31:11.35#ibcon#flushed, iclass 16, count 0 2006.232.07:31:11.35#ibcon#about to write, iclass 16, count 0 2006.232.07:31:11.35#ibcon#wrote, iclass 16, count 0 2006.232.07:31:11.35#ibcon#about to read 3, iclass 16, count 0 2006.232.07:31:11.37#ibcon#read 3, iclass 16, count 0 2006.232.07:31:11.37#ibcon#about to read 4, iclass 16, count 0 2006.232.07:31:11.37#ibcon#read 4, iclass 16, count 0 2006.232.07:31:11.37#ibcon#about to read 5, iclass 16, count 0 2006.232.07:31:11.37#ibcon#read 5, iclass 16, count 0 2006.232.07:31:11.37#ibcon#about to read 6, iclass 16, count 0 2006.232.07:31:11.37#ibcon#read 6, iclass 16, count 0 2006.232.07:31:11.37#ibcon#end of sib2, iclass 16, count 0 2006.232.07:31:11.37#ibcon#*mode == 0, iclass 16, count 0 2006.232.07:31:11.37#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.232.07:31:11.37#ibcon#[28=FRQ=02,640.99\r\n] 2006.232.07:31:11.37#ibcon#*before write, iclass 16, count 0 2006.232.07:31:11.37#ibcon#enter sib2, iclass 16, count 0 2006.232.07:31:11.37#ibcon#flushed, iclass 16, count 0 2006.232.07:31:11.37#ibcon#about to write, iclass 16, count 0 2006.232.07:31:11.37#ibcon#wrote, iclass 16, count 0 2006.232.07:31:11.37#ibcon#about to read 3, iclass 16, count 0 2006.232.07:31:11.41#ibcon#read 3, iclass 16, count 0 2006.232.07:31:11.41#ibcon#about to read 4, iclass 16, count 0 2006.232.07:31:11.41#ibcon#read 4, iclass 16, count 0 2006.232.07:31:11.41#ibcon#about to read 5, iclass 16, count 0 2006.232.07:31:11.41#ibcon#read 5, iclass 16, count 0 2006.232.07:31:11.41#ibcon#about to read 6, iclass 16, count 0 2006.232.07:31:11.41#ibcon#read 6, iclass 16, count 0 2006.232.07:31:11.41#ibcon#end of sib2, iclass 16, count 0 2006.232.07:31:11.41#ibcon#*after write, iclass 16, count 0 2006.232.07:31:11.41#ibcon#*before return 0, iclass 16, count 0 2006.232.07:31:11.41#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:31:11.41#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:31:11.41#ibcon#about to clear, iclass 16 cls_cnt 0 2006.232.07:31:11.41#ibcon#cleared, iclass 16 cls_cnt 0 2006.232.07:31:11.41$vc4f8/vb=2,4 2006.232.07:31:11.41#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.232.07:31:11.41#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.232.07:31:11.41#ibcon#ireg 11 cls_cnt 2 2006.232.07:31:11.41#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:31:11.47#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:31:11.47#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:31:11.47#ibcon#enter wrdev, iclass 18, count 2 2006.232.07:31:11.47#ibcon#first serial, iclass 18, count 2 2006.232.07:31:11.47#ibcon#enter sib2, iclass 18, count 2 2006.232.07:31:11.47#ibcon#flushed, iclass 18, count 2 2006.232.07:31:11.47#ibcon#about to write, iclass 18, count 2 2006.232.07:31:11.47#ibcon#wrote, iclass 18, count 2 2006.232.07:31:11.47#ibcon#about to read 3, iclass 18, count 2 2006.232.07:31:11.49#ibcon#read 3, iclass 18, count 2 2006.232.07:31:11.49#ibcon#about to read 4, iclass 18, count 2 2006.232.07:31:11.49#ibcon#read 4, iclass 18, count 2 2006.232.07:31:11.49#ibcon#about to read 5, iclass 18, count 2 2006.232.07:31:11.49#ibcon#read 5, iclass 18, count 2 2006.232.07:31:11.49#ibcon#about to read 6, iclass 18, count 2 2006.232.07:31:11.49#ibcon#read 6, iclass 18, count 2 2006.232.07:31:11.49#ibcon#end of sib2, iclass 18, count 2 2006.232.07:31:11.49#ibcon#*mode == 0, iclass 18, count 2 2006.232.07:31:11.49#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.232.07:31:11.49#ibcon#[27=AT02-04\r\n] 2006.232.07:31:11.49#ibcon#*before write, iclass 18, count 2 2006.232.07:31:11.49#ibcon#enter sib2, iclass 18, count 2 2006.232.07:31:11.49#ibcon#flushed, iclass 18, count 2 2006.232.07:31:11.49#ibcon#about to write, iclass 18, count 2 2006.232.07:31:11.49#ibcon#wrote, iclass 18, count 2 2006.232.07:31:11.49#ibcon#about to read 3, iclass 18, count 2 2006.232.07:31:11.52#ibcon#read 3, iclass 18, count 2 2006.232.07:31:11.52#ibcon#about to read 4, iclass 18, count 2 2006.232.07:31:11.52#ibcon#read 4, iclass 18, count 2 2006.232.07:31:11.52#ibcon#about to read 5, iclass 18, count 2 2006.232.07:31:11.52#ibcon#read 5, iclass 18, count 2 2006.232.07:31:11.52#ibcon#about to read 6, iclass 18, count 2 2006.232.07:31:11.52#ibcon#read 6, iclass 18, count 2 2006.232.07:31:11.52#ibcon#end of sib2, iclass 18, count 2 2006.232.07:31:11.52#ibcon#*after write, iclass 18, count 2 2006.232.07:31:11.52#ibcon#*before return 0, iclass 18, count 2 2006.232.07:31:11.52#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:31:11.52#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:31:11.52#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.232.07:31:11.52#ibcon#ireg 7 cls_cnt 0 2006.232.07:31:11.52#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:31:11.64#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:31:11.64#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:31:11.64#ibcon#enter wrdev, iclass 18, count 0 2006.232.07:31:11.64#ibcon#first serial, iclass 18, count 0 2006.232.07:31:11.64#ibcon#enter sib2, iclass 18, count 0 2006.232.07:31:11.64#ibcon#flushed, iclass 18, count 0 2006.232.07:31:11.64#ibcon#about to write, iclass 18, count 0 2006.232.07:31:11.64#ibcon#wrote, iclass 18, count 0 2006.232.07:31:11.64#ibcon#about to read 3, iclass 18, count 0 2006.232.07:31:11.66#ibcon#read 3, iclass 18, count 0 2006.232.07:31:11.66#ibcon#about to read 4, iclass 18, count 0 2006.232.07:31:11.66#ibcon#read 4, iclass 18, count 0 2006.232.07:31:11.66#ibcon#about to read 5, iclass 18, count 0 2006.232.07:31:11.66#ibcon#read 5, iclass 18, count 0 2006.232.07:31:11.66#ibcon#about to read 6, iclass 18, count 0 2006.232.07:31:11.66#ibcon#read 6, iclass 18, count 0 2006.232.07:31:11.66#ibcon#end of sib2, iclass 18, count 0 2006.232.07:31:11.66#ibcon#*mode == 0, iclass 18, count 0 2006.232.07:31:11.66#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.232.07:31:11.66#ibcon#[27=USB\r\n] 2006.232.07:31:11.66#ibcon#*before write, iclass 18, count 0 2006.232.07:31:11.66#ibcon#enter sib2, iclass 18, count 0 2006.232.07:31:11.66#ibcon#flushed, iclass 18, count 0 2006.232.07:31:11.66#ibcon#about to write, iclass 18, count 0 2006.232.07:31:11.66#ibcon#wrote, iclass 18, count 0 2006.232.07:31:11.66#ibcon#about to read 3, iclass 18, count 0 2006.232.07:31:11.69#ibcon#read 3, iclass 18, count 0 2006.232.07:31:11.69#ibcon#about to read 4, iclass 18, count 0 2006.232.07:31:11.69#ibcon#read 4, iclass 18, count 0 2006.232.07:31:11.69#ibcon#about to read 5, iclass 18, count 0 2006.232.07:31:11.69#ibcon#read 5, iclass 18, count 0 2006.232.07:31:11.69#ibcon#about to read 6, iclass 18, count 0 2006.232.07:31:11.69#ibcon#read 6, iclass 18, count 0 2006.232.07:31:11.69#ibcon#end of sib2, iclass 18, count 0 2006.232.07:31:11.69#ibcon#*after write, iclass 18, count 0 2006.232.07:31:11.69#ibcon#*before return 0, iclass 18, count 0 2006.232.07:31:11.69#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:31:11.69#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:31:11.69#ibcon#about to clear, iclass 18 cls_cnt 0 2006.232.07:31:11.69#ibcon#cleared, iclass 18 cls_cnt 0 2006.232.07:31:11.69$vc4f8/vblo=3,656.99 2006.232.07:31:11.69#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.232.07:31:11.69#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.232.07:31:11.69#ibcon#ireg 17 cls_cnt 0 2006.232.07:31:11.69#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:31:11.69#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:31:11.69#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:31:11.69#ibcon#enter wrdev, iclass 20, count 0 2006.232.07:31:11.69#ibcon#first serial, iclass 20, count 0 2006.232.07:31:11.69#ibcon#enter sib2, iclass 20, count 0 2006.232.07:31:11.69#ibcon#flushed, iclass 20, count 0 2006.232.07:31:11.69#ibcon#about to write, iclass 20, count 0 2006.232.07:31:11.69#ibcon#wrote, iclass 20, count 0 2006.232.07:31:11.69#ibcon#about to read 3, iclass 20, count 0 2006.232.07:31:11.71#ibcon#read 3, iclass 20, count 0 2006.232.07:31:11.71#ibcon#about to read 4, iclass 20, count 0 2006.232.07:31:11.71#ibcon#read 4, iclass 20, count 0 2006.232.07:31:11.71#ibcon#about to read 5, iclass 20, count 0 2006.232.07:31:11.71#ibcon#read 5, iclass 20, count 0 2006.232.07:31:11.71#ibcon#about to read 6, iclass 20, count 0 2006.232.07:31:11.71#ibcon#read 6, iclass 20, count 0 2006.232.07:31:11.71#ibcon#end of sib2, iclass 20, count 0 2006.232.07:31:11.71#ibcon#*mode == 0, iclass 20, count 0 2006.232.07:31:11.71#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.232.07:31:11.71#ibcon#[28=FRQ=03,656.99\r\n] 2006.232.07:31:11.71#ibcon#*before write, iclass 20, count 0 2006.232.07:31:11.71#ibcon#enter sib2, iclass 20, count 0 2006.232.07:31:11.71#ibcon#flushed, iclass 20, count 0 2006.232.07:31:11.71#ibcon#about to write, iclass 20, count 0 2006.232.07:31:11.71#ibcon#wrote, iclass 20, count 0 2006.232.07:31:11.71#ibcon#about to read 3, iclass 20, count 0 2006.232.07:31:11.75#ibcon#read 3, iclass 20, count 0 2006.232.07:31:11.75#ibcon#about to read 4, iclass 20, count 0 2006.232.07:31:11.75#ibcon#read 4, iclass 20, count 0 2006.232.07:31:11.75#ibcon#about to read 5, iclass 20, count 0 2006.232.07:31:11.75#ibcon#read 5, iclass 20, count 0 2006.232.07:31:11.75#ibcon#about to read 6, iclass 20, count 0 2006.232.07:31:11.75#ibcon#read 6, iclass 20, count 0 2006.232.07:31:11.75#ibcon#end of sib2, iclass 20, count 0 2006.232.07:31:11.75#ibcon#*after write, iclass 20, count 0 2006.232.07:31:11.75#ibcon#*before return 0, iclass 20, count 0 2006.232.07:31:11.75#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:31:11.75#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:31:11.75#ibcon#about to clear, iclass 20 cls_cnt 0 2006.232.07:31:11.75#ibcon#cleared, iclass 20 cls_cnt 0 2006.232.07:31:11.75$vc4f8/vb=3,4 2006.232.07:31:11.75#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.232.07:31:11.75#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.232.07:31:11.75#ibcon#ireg 11 cls_cnt 2 2006.232.07:31:11.75#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:31:11.81#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:31:11.81#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:31:11.81#ibcon#enter wrdev, iclass 22, count 2 2006.232.07:31:11.81#ibcon#first serial, iclass 22, count 2 2006.232.07:31:11.81#ibcon#enter sib2, iclass 22, count 2 2006.232.07:31:11.81#ibcon#flushed, iclass 22, count 2 2006.232.07:31:11.81#ibcon#about to write, iclass 22, count 2 2006.232.07:31:11.81#ibcon#wrote, iclass 22, count 2 2006.232.07:31:11.81#ibcon#about to read 3, iclass 22, count 2 2006.232.07:31:11.83#ibcon#read 3, iclass 22, count 2 2006.232.07:31:11.83#ibcon#about to read 4, iclass 22, count 2 2006.232.07:31:11.83#ibcon#read 4, iclass 22, count 2 2006.232.07:31:11.83#ibcon#about to read 5, iclass 22, count 2 2006.232.07:31:11.83#ibcon#read 5, iclass 22, count 2 2006.232.07:31:11.83#ibcon#about to read 6, iclass 22, count 2 2006.232.07:31:11.83#ibcon#read 6, iclass 22, count 2 2006.232.07:31:11.83#ibcon#end of sib2, iclass 22, count 2 2006.232.07:31:11.83#ibcon#*mode == 0, iclass 22, count 2 2006.232.07:31:11.83#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.232.07:31:11.83#ibcon#[27=AT03-04\r\n] 2006.232.07:31:11.83#ibcon#*before write, iclass 22, count 2 2006.232.07:31:11.83#ibcon#enter sib2, iclass 22, count 2 2006.232.07:31:11.83#ibcon#flushed, iclass 22, count 2 2006.232.07:31:11.83#ibcon#about to write, iclass 22, count 2 2006.232.07:31:11.83#ibcon#wrote, iclass 22, count 2 2006.232.07:31:11.83#ibcon#about to read 3, iclass 22, count 2 2006.232.07:31:11.86#ibcon#read 3, iclass 22, count 2 2006.232.07:31:11.86#ibcon#about to read 4, iclass 22, count 2 2006.232.07:31:11.86#ibcon#read 4, iclass 22, count 2 2006.232.07:31:11.86#ibcon#about to read 5, iclass 22, count 2 2006.232.07:31:11.86#ibcon#read 5, iclass 22, count 2 2006.232.07:31:11.86#ibcon#about to read 6, iclass 22, count 2 2006.232.07:31:11.86#ibcon#read 6, iclass 22, count 2 2006.232.07:31:11.86#ibcon#end of sib2, iclass 22, count 2 2006.232.07:31:11.86#ibcon#*after write, iclass 22, count 2 2006.232.07:31:11.86#ibcon#*before return 0, iclass 22, count 2 2006.232.07:31:11.86#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:31:11.86#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:31:11.86#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.232.07:31:11.86#ibcon#ireg 7 cls_cnt 0 2006.232.07:31:11.86#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:31:11.98#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:31:11.98#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:31:11.98#ibcon#enter wrdev, iclass 22, count 0 2006.232.07:31:11.98#ibcon#first serial, iclass 22, count 0 2006.232.07:31:11.98#ibcon#enter sib2, iclass 22, count 0 2006.232.07:31:11.98#ibcon#flushed, iclass 22, count 0 2006.232.07:31:11.98#ibcon#about to write, iclass 22, count 0 2006.232.07:31:11.98#ibcon#wrote, iclass 22, count 0 2006.232.07:31:11.98#ibcon#about to read 3, iclass 22, count 0 2006.232.07:31:12.00#ibcon#read 3, iclass 22, count 0 2006.232.07:31:12.00#ibcon#about to read 4, iclass 22, count 0 2006.232.07:31:12.00#ibcon#read 4, iclass 22, count 0 2006.232.07:31:12.00#ibcon#about to read 5, iclass 22, count 0 2006.232.07:31:12.00#ibcon#read 5, iclass 22, count 0 2006.232.07:31:12.00#ibcon#about to read 6, iclass 22, count 0 2006.232.07:31:12.00#ibcon#read 6, iclass 22, count 0 2006.232.07:31:12.00#ibcon#end of sib2, iclass 22, count 0 2006.232.07:31:12.00#ibcon#*mode == 0, iclass 22, count 0 2006.232.07:31:12.00#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.232.07:31:12.00#ibcon#[27=USB\r\n] 2006.232.07:31:12.00#ibcon#*before write, iclass 22, count 0 2006.232.07:31:12.00#ibcon#enter sib2, iclass 22, count 0 2006.232.07:31:12.00#ibcon#flushed, iclass 22, count 0 2006.232.07:31:12.00#ibcon#about to write, iclass 22, count 0 2006.232.07:31:12.00#ibcon#wrote, iclass 22, count 0 2006.232.07:31:12.00#ibcon#about to read 3, iclass 22, count 0 2006.232.07:31:12.03#ibcon#read 3, iclass 22, count 0 2006.232.07:31:12.03#ibcon#about to read 4, iclass 22, count 0 2006.232.07:31:12.03#ibcon#read 4, iclass 22, count 0 2006.232.07:31:12.03#ibcon#about to read 5, iclass 22, count 0 2006.232.07:31:12.03#ibcon#read 5, iclass 22, count 0 2006.232.07:31:12.03#ibcon#about to read 6, iclass 22, count 0 2006.232.07:31:12.03#ibcon#read 6, iclass 22, count 0 2006.232.07:31:12.03#ibcon#end of sib2, iclass 22, count 0 2006.232.07:31:12.03#ibcon#*after write, iclass 22, count 0 2006.232.07:31:12.03#ibcon#*before return 0, iclass 22, count 0 2006.232.07:31:12.03#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:31:12.03#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:31:12.03#ibcon#about to clear, iclass 22 cls_cnt 0 2006.232.07:31:12.03#ibcon#cleared, iclass 22 cls_cnt 0 2006.232.07:31:12.03$vc4f8/vblo=4,712.99 2006.232.07:31:12.03#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.232.07:31:12.03#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.232.07:31:12.03#ibcon#ireg 17 cls_cnt 0 2006.232.07:31:12.03#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:31:12.03#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:31:12.03#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:31:12.03#ibcon#enter wrdev, iclass 24, count 0 2006.232.07:31:12.03#ibcon#first serial, iclass 24, count 0 2006.232.07:31:12.03#ibcon#enter sib2, iclass 24, count 0 2006.232.07:31:12.03#ibcon#flushed, iclass 24, count 0 2006.232.07:31:12.03#ibcon#about to write, iclass 24, count 0 2006.232.07:31:12.03#ibcon#wrote, iclass 24, count 0 2006.232.07:31:12.03#ibcon#about to read 3, iclass 24, count 0 2006.232.07:31:12.05#ibcon#read 3, iclass 24, count 0 2006.232.07:31:12.05#ibcon#about to read 4, iclass 24, count 0 2006.232.07:31:12.05#ibcon#read 4, iclass 24, count 0 2006.232.07:31:12.05#ibcon#about to read 5, iclass 24, count 0 2006.232.07:31:12.05#ibcon#read 5, iclass 24, count 0 2006.232.07:31:12.05#ibcon#about to read 6, iclass 24, count 0 2006.232.07:31:12.05#ibcon#read 6, iclass 24, count 0 2006.232.07:31:12.05#ibcon#end of sib2, iclass 24, count 0 2006.232.07:31:12.05#ibcon#*mode == 0, iclass 24, count 0 2006.232.07:31:12.05#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.232.07:31:12.05#ibcon#[28=FRQ=04,712.99\r\n] 2006.232.07:31:12.05#ibcon#*before write, iclass 24, count 0 2006.232.07:31:12.05#ibcon#enter sib2, iclass 24, count 0 2006.232.07:31:12.05#ibcon#flushed, iclass 24, count 0 2006.232.07:31:12.05#ibcon#about to write, iclass 24, count 0 2006.232.07:31:12.05#ibcon#wrote, iclass 24, count 0 2006.232.07:31:12.05#ibcon#about to read 3, iclass 24, count 0 2006.232.07:31:12.09#ibcon#read 3, iclass 24, count 0 2006.232.07:31:12.09#ibcon#about to read 4, iclass 24, count 0 2006.232.07:31:12.09#ibcon#read 4, iclass 24, count 0 2006.232.07:31:12.09#ibcon#about to read 5, iclass 24, count 0 2006.232.07:31:12.09#ibcon#read 5, iclass 24, count 0 2006.232.07:31:12.09#ibcon#about to read 6, iclass 24, count 0 2006.232.07:31:12.09#ibcon#read 6, iclass 24, count 0 2006.232.07:31:12.09#ibcon#end of sib2, iclass 24, count 0 2006.232.07:31:12.09#ibcon#*after write, iclass 24, count 0 2006.232.07:31:12.09#ibcon#*before return 0, iclass 24, count 0 2006.232.07:31:12.09#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:31:12.09#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:31:12.09#ibcon#about to clear, iclass 24 cls_cnt 0 2006.232.07:31:12.09#ibcon#cleared, iclass 24 cls_cnt 0 2006.232.07:31:12.09$vc4f8/vb=4,4 2006.232.07:31:12.09#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.232.07:31:12.09#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.232.07:31:12.09#ibcon#ireg 11 cls_cnt 2 2006.232.07:31:12.09#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:31:12.15#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:31:12.15#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:31:12.15#ibcon#enter wrdev, iclass 26, count 2 2006.232.07:31:12.15#ibcon#first serial, iclass 26, count 2 2006.232.07:31:12.15#ibcon#enter sib2, iclass 26, count 2 2006.232.07:31:12.15#ibcon#flushed, iclass 26, count 2 2006.232.07:31:12.15#ibcon#about to write, iclass 26, count 2 2006.232.07:31:12.15#ibcon#wrote, iclass 26, count 2 2006.232.07:31:12.15#ibcon#about to read 3, iclass 26, count 2 2006.232.07:31:12.17#ibcon#read 3, iclass 26, count 2 2006.232.07:31:12.17#ibcon#about to read 4, iclass 26, count 2 2006.232.07:31:12.17#ibcon#read 4, iclass 26, count 2 2006.232.07:31:12.17#ibcon#about to read 5, iclass 26, count 2 2006.232.07:31:12.17#ibcon#read 5, iclass 26, count 2 2006.232.07:31:12.17#ibcon#about to read 6, iclass 26, count 2 2006.232.07:31:12.17#ibcon#read 6, iclass 26, count 2 2006.232.07:31:12.17#ibcon#end of sib2, iclass 26, count 2 2006.232.07:31:12.17#ibcon#*mode == 0, iclass 26, count 2 2006.232.07:31:12.17#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.232.07:31:12.17#ibcon#[27=AT04-04\r\n] 2006.232.07:31:12.17#ibcon#*before write, iclass 26, count 2 2006.232.07:31:12.17#ibcon#enter sib2, iclass 26, count 2 2006.232.07:31:12.17#ibcon#flushed, iclass 26, count 2 2006.232.07:31:12.17#ibcon#about to write, iclass 26, count 2 2006.232.07:31:12.17#ibcon#wrote, iclass 26, count 2 2006.232.07:31:12.17#ibcon#about to read 3, iclass 26, count 2 2006.232.07:31:12.20#ibcon#read 3, iclass 26, count 2 2006.232.07:31:12.20#ibcon#about to read 4, iclass 26, count 2 2006.232.07:31:12.20#ibcon#read 4, iclass 26, count 2 2006.232.07:31:12.20#ibcon#about to read 5, iclass 26, count 2 2006.232.07:31:12.20#ibcon#read 5, iclass 26, count 2 2006.232.07:31:12.20#ibcon#about to read 6, iclass 26, count 2 2006.232.07:31:12.20#ibcon#read 6, iclass 26, count 2 2006.232.07:31:12.20#ibcon#end of sib2, iclass 26, count 2 2006.232.07:31:12.20#ibcon#*after write, iclass 26, count 2 2006.232.07:31:12.20#ibcon#*before return 0, iclass 26, count 2 2006.232.07:31:12.20#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:31:12.20#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:31:12.20#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.232.07:31:12.20#ibcon#ireg 7 cls_cnt 0 2006.232.07:31:12.20#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:31:12.32#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:31:12.32#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:31:12.32#ibcon#enter wrdev, iclass 26, count 0 2006.232.07:31:12.32#ibcon#first serial, iclass 26, count 0 2006.232.07:31:12.32#ibcon#enter sib2, iclass 26, count 0 2006.232.07:31:12.32#ibcon#flushed, iclass 26, count 0 2006.232.07:31:12.32#ibcon#about to write, iclass 26, count 0 2006.232.07:31:12.32#ibcon#wrote, iclass 26, count 0 2006.232.07:31:12.32#ibcon#about to read 3, iclass 26, count 0 2006.232.07:31:12.34#ibcon#read 3, iclass 26, count 0 2006.232.07:31:12.34#ibcon#about to read 4, iclass 26, count 0 2006.232.07:31:12.34#ibcon#read 4, iclass 26, count 0 2006.232.07:31:12.34#ibcon#about to read 5, iclass 26, count 0 2006.232.07:31:12.34#ibcon#read 5, iclass 26, count 0 2006.232.07:31:12.34#ibcon#about to read 6, iclass 26, count 0 2006.232.07:31:12.34#ibcon#read 6, iclass 26, count 0 2006.232.07:31:12.34#ibcon#end of sib2, iclass 26, count 0 2006.232.07:31:12.34#ibcon#*mode == 0, iclass 26, count 0 2006.232.07:31:12.34#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.232.07:31:12.34#ibcon#[27=USB\r\n] 2006.232.07:31:12.34#ibcon#*before write, iclass 26, count 0 2006.232.07:31:12.34#ibcon#enter sib2, iclass 26, count 0 2006.232.07:31:12.34#ibcon#flushed, iclass 26, count 0 2006.232.07:31:12.34#ibcon#about to write, iclass 26, count 0 2006.232.07:31:12.34#ibcon#wrote, iclass 26, count 0 2006.232.07:31:12.34#ibcon#about to read 3, iclass 26, count 0 2006.232.07:31:12.37#ibcon#read 3, iclass 26, count 0 2006.232.07:31:12.37#ibcon#about to read 4, iclass 26, count 0 2006.232.07:31:12.37#ibcon#read 4, iclass 26, count 0 2006.232.07:31:12.37#ibcon#about to read 5, iclass 26, count 0 2006.232.07:31:12.37#ibcon#read 5, iclass 26, count 0 2006.232.07:31:12.37#ibcon#about to read 6, iclass 26, count 0 2006.232.07:31:12.37#ibcon#read 6, iclass 26, count 0 2006.232.07:31:12.37#ibcon#end of sib2, iclass 26, count 0 2006.232.07:31:12.37#ibcon#*after write, iclass 26, count 0 2006.232.07:31:12.37#ibcon#*before return 0, iclass 26, count 0 2006.232.07:31:12.37#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:31:12.37#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:31:12.37#ibcon#about to clear, iclass 26 cls_cnt 0 2006.232.07:31:12.37#ibcon#cleared, iclass 26 cls_cnt 0 2006.232.07:31:12.37$vc4f8/vblo=5,744.99 2006.232.07:31:12.37#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.232.07:31:12.37#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.232.07:31:12.37#ibcon#ireg 17 cls_cnt 0 2006.232.07:31:12.37#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:31:12.37#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:31:12.37#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:31:12.37#ibcon#enter wrdev, iclass 28, count 0 2006.232.07:31:12.37#ibcon#first serial, iclass 28, count 0 2006.232.07:31:12.37#ibcon#enter sib2, iclass 28, count 0 2006.232.07:31:12.37#ibcon#flushed, iclass 28, count 0 2006.232.07:31:12.37#ibcon#about to write, iclass 28, count 0 2006.232.07:31:12.37#ibcon#wrote, iclass 28, count 0 2006.232.07:31:12.37#ibcon#about to read 3, iclass 28, count 0 2006.232.07:31:12.39#ibcon#read 3, iclass 28, count 0 2006.232.07:31:12.39#ibcon#about to read 4, iclass 28, count 0 2006.232.07:31:12.39#ibcon#read 4, iclass 28, count 0 2006.232.07:31:12.39#ibcon#about to read 5, iclass 28, count 0 2006.232.07:31:12.39#ibcon#read 5, iclass 28, count 0 2006.232.07:31:12.39#ibcon#about to read 6, iclass 28, count 0 2006.232.07:31:12.39#ibcon#read 6, iclass 28, count 0 2006.232.07:31:12.39#ibcon#end of sib2, iclass 28, count 0 2006.232.07:31:12.39#ibcon#*mode == 0, iclass 28, count 0 2006.232.07:31:12.39#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.232.07:31:12.39#ibcon#[28=FRQ=05,744.99\r\n] 2006.232.07:31:12.39#ibcon#*before write, iclass 28, count 0 2006.232.07:31:12.39#ibcon#enter sib2, iclass 28, count 0 2006.232.07:31:12.39#ibcon#flushed, iclass 28, count 0 2006.232.07:31:12.39#ibcon#about to write, iclass 28, count 0 2006.232.07:31:12.39#ibcon#wrote, iclass 28, count 0 2006.232.07:31:12.39#ibcon#about to read 3, iclass 28, count 0 2006.232.07:31:12.43#ibcon#read 3, iclass 28, count 0 2006.232.07:31:12.43#ibcon#about to read 4, iclass 28, count 0 2006.232.07:31:12.43#ibcon#read 4, iclass 28, count 0 2006.232.07:31:12.43#ibcon#about to read 5, iclass 28, count 0 2006.232.07:31:12.43#ibcon#read 5, iclass 28, count 0 2006.232.07:31:12.43#ibcon#about to read 6, iclass 28, count 0 2006.232.07:31:12.43#ibcon#read 6, iclass 28, count 0 2006.232.07:31:12.43#ibcon#end of sib2, iclass 28, count 0 2006.232.07:31:12.43#ibcon#*after write, iclass 28, count 0 2006.232.07:31:12.43#ibcon#*before return 0, iclass 28, count 0 2006.232.07:31:12.43#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:31:12.43#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:31:12.43#ibcon#about to clear, iclass 28 cls_cnt 0 2006.232.07:31:12.43#ibcon#cleared, iclass 28 cls_cnt 0 2006.232.07:31:12.43$vc4f8/vb=5,3 2006.232.07:31:12.43#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.232.07:31:12.43#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.232.07:31:12.43#ibcon#ireg 11 cls_cnt 2 2006.232.07:31:12.43#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:31:12.49#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:31:12.49#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:31:12.49#ibcon#enter wrdev, iclass 30, count 2 2006.232.07:31:12.49#ibcon#first serial, iclass 30, count 2 2006.232.07:31:12.49#ibcon#enter sib2, iclass 30, count 2 2006.232.07:31:12.49#ibcon#flushed, iclass 30, count 2 2006.232.07:31:12.49#ibcon#about to write, iclass 30, count 2 2006.232.07:31:12.49#ibcon#wrote, iclass 30, count 2 2006.232.07:31:12.49#ibcon#about to read 3, iclass 30, count 2 2006.232.07:31:12.51#ibcon#read 3, iclass 30, count 2 2006.232.07:31:12.51#ibcon#about to read 4, iclass 30, count 2 2006.232.07:31:12.51#ibcon#read 4, iclass 30, count 2 2006.232.07:31:12.51#ibcon#about to read 5, iclass 30, count 2 2006.232.07:31:12.51#ibcon#read 5, iclass 30, count 2 2006.232.07:31:12.51#ibcon#about to read 6, iclass 30, count 2 2006.232.07:31:12.51#ibcon#read 6, iclass 30, count 2 2006.232.07:31:12.51#ibcon#end of sib2, iclass 30, count 2 2006.232.07:31:12.51#ibcon#*mode == 0, iclass 30, count 2 2006.232.07:31:12.51#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.232.07:31:12.51#ibcon#[27=AT05-03\r\n] 2006.232.07:31:12.51#ibcon#*before write, iclass 30, count 2 2006.232.07:31:12.51#ibcon#enter sib2, iclass 30, count 2 2006.232.07:31:12.51#ibcon#flushed, iclass 30, count 2 2006.232.07:31:12.51#ibcon#about to write, iclass 30, count 2 2006.232.07:31:12.51#ibcon#wrote, iclass 30, count 2 2006.232.07:31:12.51#ibcon#about to read 3, iclass 30, count 2 2006.232.07:31:12.54#ibcon#read 3, iclass 30, count 2 2006.232.07:31:12.54#ibcon#about to read 4, iclass 30, count 2 2006.232.07:31:12.54#ibcon#read 4, iclass 30, count 2 2006.232.07:31:12.54#ibcon#about to read 5, iclass 30, count 2 2006.232.07:31:12.54#ibcon#read 5, iclass 30, count 2 2006.232.07:31:12.54#ibcon#about to read 6, iclass 30, count 2 2006.232.07:31:12.54#ibcon#read 6, iclass 30, count 2 2006.232.07:31:12.54#ibcon#end of sib2, iclass 30, count 2 2006.232.07:31:12.54#ibcon#*after write, iclass 30, count 2 2006.232.07:31:12.54#ibcon#*before return 0, iclass 30, count 2 2006.232.07:31:12.54#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:31:12.54#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:31:12.54#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.232.07:31:12.54#ibcon#ireg 7 cls_cnt 0 2006.232.07:31:12.54#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:31:12.66#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:31:12.66#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:31:12.66#ibcon#enter wrdev, iclass 30, count 0 2006.232.07:31:12.66#ibcon#first serial, iclass 30, count 0 2006.232.07:31:12.66#ibcon#enter sib2, iclass 30, count 0 2006.232.07:31:12.66#ibcon#flushed, iclass 30, count 0 2006.232.07:31:12.66#ibcon#about to write, iclass 30, count 0 2006.232.07:31:12.66#ibcon#wrote, iclass 30, count 0 2006.232.07:31:12.66#ibcon#about to read 3, iclass 30, count 0 2006.232.07:31:12.68#ibcon#read 3, iclass 30, count 0 2006.232.07:31:12.68#ibcon#about to read 4, iclass 30, count 0 2006.232.07:31:12.68#ibcon#read 4, iclass 30, count 0 2006.232.07:31:12.68#ibcon#about to read 5, iclass 30, count 0 2006.232.07:31:12.68#ibcon#read 5, iclass 30, count 0 2006.232.07:31:12.68#ibcon#about to read 6, iclass 30, count 0 2006.232.07:31:12.68#ibcon#read 6, iclass 30, count 0 2006.232.07:31:12.68#ibcon#end of sib2, iclass 30, count 0 2006.232.07:31:12.68#ibcon#*mode == 0, iclass 30, count 0 2006.232.07:31:12.68#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.232.07:31:12.68#ibcon#[27=USB\r\n] 2006.232.07:31:12.68#ibcon#*before write, iclass 30, count 0 2006.232.07:31:12.68#ibcon#enter sib2, iclass 30, count 0 2006.232.07:31:12.68#ibcon#flushed, iclass 30, count 0 2006.232.07:31:12.68#ibcon#about to write, iclass 30, count 0 2006.232.07:31:12.68#ibcon#wrote, iclass 30, count 0 2006.232.07:31:12.68#ibcon#about to read 3, iclass 30, count 0 2006.232.07:31:12.71#ibcon#read 3, iclass 30, count 0 2006.232.07:31:12.71#ibcon#about to read 4, iclass 30, count 0 2006.232.07:31:12.71#ibcon#read 4, iclass 30, count 0 2006.232.07:31:12.71#ibcon#about to read 5, iclass 30, count 0 2006.232.07:31:12.71#ibcon#read 5, iclass 30, count 0 2006.232.07:31:12.71#ibcon#about to read 6, iclass 30, count 0 2006.232.07:31:12.71#ibcon#read 6, iclass 30, count 0 2006.232.07:31:12.71#ibcon#end of sib2, iclass 30, count 0 2006.232.07:31:12.71#ibcon#*after write, iclass 30, count 0 2006.232.07:31:12.71#ibcon#*before return 0, iclass 30, count 0 2006.232.07:31:12.71#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:31:12.71#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:31:12.71#ibcon#about to clear, iclass 30 cls_cnt 0 2006.232.07:31:12.71#ibcon#cleared, iclass 30 cls_cnt 0 2006.232.07:31:12.71$vc4f8/vblo=6,752.99 2006.232.07:31:12.71#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.232.07:31:12.71#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.232.07:31:12.71#ibcon#ireg 17 cls_cnt 0 2006.232.07:31:12.71#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:31:12.71#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:31:12.71#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:31:12.71#ibcon#enter wrdev, iclass 32, count 0 2006.232.07:31:12.71#ibcon#first serial, iclass 32, count 0 2006.232.07:31:12.71#ibcon#enter sib2, iclass 32, count 0 2006.232.07:31:12.71#ibcon#flushed, iclass 32, count 0 2006.232.07:31:12.71#ibcon#about to write, iclass 32, count 0 2006.232.07:31:12.71#ibcon#wrote, iclass 32, count 0 2006.232.07:31:12.71#ibcon#about to read 3, iclass 32, count 0 2006.232.07:31:12.73#ibcon#read 3, iclass 32, count 0 2006.232.07:31:12.73#ibcon#about to read 4, iclass 32, count 0 2006.232.07:31:12.73#ibcon#read 4, iclass 32, count 0 2006.232.07:31:12.73#ibcon#about to read 5, iclass 32, count 0 2006.232.07:31:12.73#ibcon#read 5, iclass 32, count 0 2006.232.07:31:12.73#ibcon#about to read 6, iclass 32, count 0 2006.232.07:31:12.73#ibcon#read 6, iclass 32, count 0 2006.232.07:31:12.73#ibcon#end of sib2, iclass 32, count 0 2006.232.07:31:12.73#ibcon#*mode == 0, iclass 32, count 0 2006.232.07:31:12.73#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.232.07:31:12.73#ibcon#[28=FRQ=06,752.99\r\n] 2006.232.07:31:12.73#ibcon#*before write, iclass 32, count 0 2006.232.07:31:12.73#ibcon#enter sib2, iclass 32, count 0 2006.232.07:31:12.73#ibcon#flushed, iclass 32, count 0 2006.232.07:31:12.73#ibcon#about to write, iclass 32, count 0 2006.232.07:31:12.73#ibcon#wrote, iclass 32, count 0 2006.232.07:31:12.73#ibcon#about to read 3, iclass 32, count 0 2006.232.07:31:12.77#ibcon#read 3, iclass 32, count 0 2006.232.07:31:12.77#ibcon#about to read 4, iclass 32, count 0 2006.232.07:31:12.77#ibcon#read 4, iclass 32, count 0 2006.232.07:31:12.77#ibcon#about to read 5, iclass 32, count 0 2006.232.07:31:12.77#ibcon#read 5, iclass 32, count 0 2006.232.07:31:12.77#ibcon#about to read 6, iclass 32, count 0 2006.232.07:31:12.77#ibcon#read 6, iclass 32, count 0 2006.232.07:31:12.77#ibcon#end of sib2, iclass 32, count 0 2006.232.07:31:12.77#ibcon#*after write, iclass 32, count 0 2006.232.07:31:12.77#ibcon#*before return 0, iclass 32, count 0 2006.232.07:31:12.77#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:31:12.77#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:31:12.77#ibcon#about to clear, iclass 32 cls_cnt 0 2006.232.07:31:12.77#ibcon#cleared, iclass 32 cls_cnt 0 2006.232.07:31:12.77$vc4f8/vb=6,4 2006.232.07:31:12.77#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.232.07:31:12.77#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.232.07:31:12.77#ibcon#ireg 11 cls_cnt 2 2006.232.07:31:12.77#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:31:12.83#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:31:12.83#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:31:12.83#ibcon#enter wrdev, iclass 34, count 2 2006.232.07:31:12.83#ibcon#first serial, iclass 34, count 2 2006.232.07:31:12.83#ibcon#enter sib2, iclass 34, count 2 2006.232.07:31:12.83#ibcon#flushed, iclass 34, count 2 2006.232.07:31:12.83#ibcon#about to write, iclass 34, count 2 2006.232.07:31:12.83#ibcon#wrote, iclass 34, count 2 2006.232.07:31:12.83#ibcon#about to read 3, iclass 34, count 2 2006.232.07:31:12.85#ibcon#read 3, iclass 34, count 2 2006.232.07:31:12.85#ibcon#about to read 4, iclass 34, count 2 2006.232.07:31:12.85#ibcon#read 4, iclass 34, count 2 2006.232.07:31:12.85#ibcon#about to read 5, iclass 34, count 2 2006.232.07:31:12.85#ibcon#read 5, iclass 34, count 2 2006.232.07:31:12.85#ibcon#about to read 6, iclass 34, count 2 2006.232.07:31:12.85#ibcon#read 6, iclass 34, count 2 2006.232.07:31:12.85#ibcon#end of sib2, iclass 34, count 2 2006.232.07:31:12.85#ibcon#*mode == 0, iclass 34, count 2 2006.232.07:31:12.85#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.232.07:31:12.85#ibcon#[27=AT06-04\r\n] 2006.232.07:31:12.85#ibcon#*before write, iclass 34, count 2 2006.232.07:31:12.85#ibcon#enter sib2, iclass 34, count 2 2006.232.07:31:12.85#ibcon#flushed, iclass 34, count 2 2006.232.07:31:12.85#ibcon#about to write, iclass 34, count 2 2006.232.07:31:12.85#ibcon#wrote, iclass 34, count 2 2006.232.07:31:12.85#ibcon#about to read 3, iclass 34, count 2 2006.232.07:31:12.88#ibcon#read 3, iclass 34, count 2 2006.232.07:31:12.88#ibcon#about to read 4, iclass 34, count 2 2006.232.07:31:12.88#ibcon#read 4, iclass 34, count 2 2006.232.07:31:12.88#ibcon#about to read 5, iclass 34, count 2 2006.232.07:31:12.88#ibcon#read 5, iclass 34, count 2 2006.232.07:31:12.88#ibcon#about to read 6, iclass 34, count 2 2006.232.07:31:12.88#ibcon#read 6, iclass 34, count 2 2006.232.07:31:12.88#ibcon#end of sib2, iclass 34, count 2 2006.232.07:31:12.88#ibcon#*after write, iclass 34, count 2 2006.232.07:31:12.88#ibcon#*before return 0, iclass 34, count 2 2006.232.07:31:12.88#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:31:12.88#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:31:12.88#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.232.07:31:12.88#ibcon#ireg 7 cls_cnt 0 2006.232.07:31:12.88#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:31:13.00#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:31:13.00#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:31:13.00#ibcon#enter wrdev, iclass 34, count 0 2006.232.07:31:13.00#ibcon#first serial, iclass 34, count 0 2006.232.07:31:13.00#ibcon#enter sib2, iclass 34, count 0 2006.232.07:31:13.00#ibcon#flushed, iclass 34, count 0 2006.232.07:31:13.00#ibcon#about to write, iclass 34, count 0 2006.232.07:31:13.00#ibcon#wrote, iclass 34, count 0 2006.232.07:31:13.00#ibcon#about to read 3, iclass 34, count 0 2006.232.07:31:13.02#ibcon#read 3, iclass 34, count 0 2006.232.07:31:13.02#ibcon#about to read 4, iclass 34, count 0 2006.232.07:31:13.02#ibcon#read 4, iclass 34, count 0 2006.232.07:31:13.02#ibcon#about to read 5, iclass 34, count 0 2006.232.07:31:13.02#ibcon#read 5, iclass 34, count 0 2006.232.07:31:13.02#ibcon#about to read 6, iclass 34, count 0 2006.232.07:31:13.02#ibcon#read 6, iclass 34, count 0 2006.232.07:31:13.02#ibcon#end of sib2, iclass 34, count 0 2006.232.07:31:13.02#ibcon#*mode == 0, iclass 34, count 0 2006.232.07:31:13.02#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.232.07:31:13.02#ibcon#[27=USB\r\n] 2006.232.07:31:13.02#ibcon#*before write, iclass 34, count 0 2006.232.07:31:13.02#ibcon#enter sib2, iclass 34, count 0 2006.232.07:31:13.02#ibcon#flushed, iclass 34, count 0 2006.232.07:31:13.02#ibcon#about to write, iclass 34, count 0 2006.232.07:31:13.02#ibcon#wrote, iclass 34, count 0 2006.232.07:31:13.02#ibcon#about to read 3, iclass 34, count 0 2006.232.07:31:13.05#ibcon#read 3, iclass 34, count 0 2006.232.07:31:13.05#ibcon#about to read 4, iclass 34, count 0 2006.232.07:31:13.05#ibcon#read 4, iclass 34, count 0 2006.232.07:31:13.05#ibcon#about to read 5, iclass 34, count 0 2006.232.07:31:13.05#ibcon#read 5, iclass 34, count 0 2006.232.07:31:13.05#ibcon#about to read 6, iclass 34, count 0 2006.232.07:31:13.05#ibcon#read 6, iclass 34, count 0 2006.232.07:31:13.05#ibcon#end of sib2, iclass 34, count 0 2006.232.07:31:13.05#ibcon#*after write, iclass 34, count 0 2006.232.07:31:13.05#ibcon#*before return 0, iclass 34, count 0 2006.232.07:31:13.05#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:31:13.05#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:31:13.05#ibcon#about to clear, iclass 34 cls_cnt 0 2006.232.07:31:13.05#ibcon#cleared, iclass 34 cls_cnt 0 2006.232.07:31:13.05$vc4f8/vabw=wide 2006.232.07:31:13.05#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.232.07:31:13.05#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.232.07:31:13.05#ibcon#ireg 8 cls_cnt 0 2006.232.07:31:13.05#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:31:13.05#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:31:13.05#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:31:13.05#ibcon#enter wrdev, iclass 36, count 0 2006.232.07:31:13.05#ibcon#first serial, iclass 36, count 0 2006.232.07:31:13.05#ibcon#enter sib2, iclass 36, count 0 2006.232.07:31:13.05#ibcon#flushed, iclass 36, count 0 2006.232.07:31:13.05#ibcon#about to write, iclass 36, count 0 2006.232.07:31:13.05#ibcon#wrote, iclass 36, count 0 2006.232.07:31:13.05#ibcon#about to read 3, iclass 36, count 0 2006.232.07:31:13.07#ibcon#read 3, iclass 36, count 0 2006.232.07:31:13.07#ibcon#about to read 4, iclass 36, count 0 2006.232.07:31:13.07#ibcon#read 4, iclass 36, count 0 2006.232.07:31:13.07#ibcon#about to read 5, iclass 36, count 0 2006.232.07:31:13.07#ibcon#read 5, iclass 36, count 0 2006.232.07:31:13.07#ibcon#about to read 6, iclass 36, count 0 2006.232.07:31:13.07#ibcon#read 6, iclass 36, count 0 2006.232.07:31:13.07#ibcon#end of sib2, iclass 36, count 0 2006.232.07:31:13.07#ibcon#*mode == 0, iclass 36, count 0 2006.232.07:31:13.07#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.232.07:31:13.07#ibcon#[25=BW32\r\n] 2006.232.07:31:13.07#ibcon#*before write, iclass 36, count 0 2006.232.07:31:13.07#ibcon#enter sib2, iclass 36, count 0 2006.232.07:31:13.07#ibcon#flushed, iclass 36, count 0 2006.232.07:31:13.07#ibcon#about to write, iclass 36, count 0 2006.232.07:31:13.07#ibcon#wrote, iclass 36, count 0 2006.232.07:31:13.07#ibcon#about to read 3, iclass 36, count 0 2006.232.07:31:13.10#ibcon#read 3, iclass 36, count 0 2006.232.07:31:13.10#ibcon#about to read 4, iclass 36, count 0 2006.232.07:31:13.10#ibcon#read 4, iclass 36, count 0 2006.232.07:31:13.10#ibcon#about to read 5, iclass 36, count 0 2006.232.07:31:13.10#ibcon#read 5, iclass 36, count 0 2006.232.07:31:13.10#ibcon#about to read 6, iclass 36, count 0 2006.232.07:31:13.10#ibcon#read 6, iclass 36, count 0 2006.232.07:31:13.10#ibcon#end of sib2, iclass 36, count 0 2006.232.07:31:13.10#ibcon#*after write, iclass 36, count 0 2006.232.07:31:13.10#ibcon#*before return 0, iclass 36, count 0 2006.232.07:31:13.10#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:31:13.10#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:31:13.10#ibcon#about to clear, iclass 36 cls_cnt 0 2006.232.07:31:13.10#ibcon#cleared, iclass 36 cls_cnt 0 2006.232.07:31:13.10$vc4f8/vbbw=wide 2006.232.07:31:13.10#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.232.07:31:13.10#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.232.07:31:13.10#ibcon#ireg 8 cls_cnt 0 2006.232.07:31:13.10#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.232.07:31:13.17#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.232.07:31:13.17#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.232.07:31:13.17#ibcon#enter wrdev, iclass 38, count 0 2006.232.07:31:13.17#ibcon#first serial, iclass 38, count 0 2006.232.07:31:13.17#ibcon#enter sib2, iclass 38, count 0 2006.232.07:31:13.17#ibcon#flushed, iclass 38, count 0 2006.232.07:31:13.17#ibcon#about to write, iclass 38, count 0 2006.232.07:31:13.17#ibcon#wrote, iclass 38, count 0 2006.232.07:31:13.17#ibcon#about to read 3, iclass 38, count 0 2006.232.07:31:13.19#ibcon#read 3, iclass 38, count 0 2006.232.07:31:13.19#ibcon#about to read 4, iclass 38, count 0 2006.232.07:31:13.19#ibcon#read 4, iclass 38, count 0 2006.232.07:31:13.19#ibcon#about to read 5, iclass 38, count 0 2006.232.07:31:13.19#ibcon#read 5, iclass 38, count 0 2006.232.07:31:13.19#ibcon#about to read 6, iclass 38, count 0 2006.232.07:31:13.19#ibcon#read 6, iclass 38, count 0 2006.232.07:31:13.19#ibcon#end of sib2, iclass 38, count 0 2006.232.07:31:13.19#ibcon#*mode == 0, iclass 38, count 0 2006.232.07:31:13.19#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.232.07:31:13.19#ibcon#[27=BW32\r\n] 2006.232.07:31:13.19#ibcon#*before write, iclass 38, count 0 2006.232.07:31:13.19#ibcon#enter sib2, iclass 38, count 0 2006.232.07:31:13.19#ibcon#flushed, iclass 38, count 0 2006.232.07:31:13.19#ibcon#about to write, iclass 38, count 0 2006.232.07:31:13.19#ibcon#wrote, iclass 38, count 0 2006.232.07:31:13.19#ibcon#about to read 3, iclass 38, count 0 2006.232.07:31:13.22#ibcon#read 3, iclass 38, count 0 2006.232.07:31:13.22#ibcon#about to read 4, iclass 38, count 0 2006.232.07:31:13.22#ibcon#read 4, iclass 38, count 0 2006.232.07:31:13.22#ibcon#about to read 5, iclass 38, count 0 2006.232.07:31:13.22#ibcon#read 5, iclass 38, count 0 2006.232.07:31:13.22#ibcon#about to read 6, iclass 38, count 0 2006.232.07:31:13.22#ibcon#read 6, iclass 38, count 0 2006.232.07:31:13.22#ibcon#end of sib2, iclass 38, count 0 2006.232.07:31:13.22#ibcon#*after write, iclass 38, count 0 2006.232.07:31:13.22#ibcon#*before return 0, iclass 38, count 0 2006.232.07:31:13.22#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.232.07:31:13.22#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.232.07:31:13.22#ibcon#about to clear, iclass 38 cls_cnt 0 2006.232.07:31:13.22#ibcon#cleared, iclass 38 cls_cnt 0 2006.232.07:31:13.22$4f8m12a/ifd4f 2006.232.07:31:13.22$ifd4f/lo= 2006.232.07:31:13.22$ifd4f/lo=lo1,7680.00,usb,rcp,1 2006.232.07:31:13.22$ifd4f/lo=lo2,1600.00,usb,rcp,1 2006.232.07:31:13.22$ifd4f/lo=lo3,8080.00,usb,rcp,1 2006.232.07:31:13.22$ifd4f/patch= 2006.232.07:31:13.22$ifd4f/patch=lo1,a1,a2,a3,a4 2006.232.07:31:13.22$ifd4f/patch=lo2,b1,b2,b3,b4,b5,b6 2006.232.07:31:13.22$ifd4f/patch=lo3,a5,a6,a7,a8 2006.232.07:31:13.22$4f8m12a/"form=m,16.000,1:2 2006.232.07:31:13.22$4f8m12a/"tpicd 2006.232.07:31:13.22$4f8m12a/echo=off 2006.232.07:31:13.22$4f8m12a/xlog=off 2006.232.07:31:13.22:!2006.232.07:33:20 2006.232.07:31:49.14#trakl#Source acquired 2006.232.07:31:49.14#flagr#flagr/antenna,acquired 2006.232.07:33:20.00:preob 2006.232.07:33:20.13/onsource/TRACKING 2006.232.07:33:20.13:!2006.232.07:33:30 2006.232.07:33:30.00:data_valid=on 2006.232.07:33:30.00:midob 2006.232.07:33:31.13/onsource/TRACKING 2006.232.07:33:31.13/wx/29.51,1007.2,87 2006.232.07:33:31.34/cable/+6.3884E-03 2006.232.07:33:32.43/va/01,08,usb,yes,35,37 2006.232.07:33:32.43/va/02,07,usb,yes,35,37 2006.232.07:33:32.43/va/03,08,usb,yes,27,27 2006.232.07:33:32.43/va/04,07,usb,yes,37,40 2006.232.07:33:32.43/va/05,07,usb,yes,41,44 2006.232.07:33:32.43/va/06,06,usb,yes,41,40 2006.232.07:33:32.43/va/07,06,usb,yes,42,41 2006.232.07:33:32.43/va/08,06,usb,yes,44,43 2006.232.07:33:32.66/valo/01,532.99,yes,locked 2006.232.07:33:32.66/valo/02,572.99,yes,locked 2006.232.07:33:32.66/valo/03,672.99,yes,locked 2006.232.07:33:32.66/valo/04,832.99,yes,locked 2006.232.07:33:32.66/valo/05,652.99,yes,locked 2006.232.07:33:32.66/valo/06,772.99,yes,locked 2006.232.07:33:32.66/valo/07,832.99,yes,locked 2006.232.07:33:32.66/valo/08,852.99,yes,locked 2006.232.07:33:33.75/vb/01,04,usb,yes,33,31 2006.232.07:33:33.75/vb/02,04,usb,yes,36,37 2006.232.07:33:33.75/vb/03,04,usb,yes,31,36 2006.232.07:33:33.75/vb/04,04,usb,yes,32,32 2006.232.07:33:33.75/vb/05,03,usb,yes,38,43 2006.232.07:33:33.75/vb/06,04,usb,yes,31,34 2006.232.07:33:33.75/vb/07,04,usb,yes,34,34 2006.232.07:33:33.75/vb/08,04,usb,yes,31,35 2006.232.07:33:33.98/vblo/01,632.99,yes,locked 2006.232.07:33:33.98/vblo/02,640.99,yes,locked 2006.232.07:33:33.98/vblo/03,656.99,yes,locked 2006.232.07:33:33.98/vblo/04,712.99,yes,locked 2006.232.07:33:33.98/vblo/05,744.99,yes,locked 2006.232.07:33:33.98/vblo/06,752.99,yes,locked 2006.232.07:33:33.98/vblo/07,734.99,yes,locked 2006.232.07:33:33.98/vblo/08,744.99,yes,locked 2006.232.07:33:34.13/vabw/8 2006.232.07:33:34.28/vbbw/8 2006.232.07:33:34.37/xfe/off,on,13.2 2006.232.07:33:34.74/ifatt/23,28,28,28 2006.232.07:33:35.08/fmout-gps/S +4.35E-07 2006.232.07:33:35.12:!2006.232.07:34:30 2006.232.07:34:30.00:data_valid=off 2006.232.07:34:30.00:postob 2006.232.07:34:30.19/cable/+6.3874E-03 2006.232.07:34:30.19/wx/29.50,1007.3,86 2006.232.07:34:31.08/fmout-gps/S +4.36E-07 2006.232.07:34:31.08:scan_name=232-0735,k06232,60 2006.232.07:34:31.08:source=1128+385,113053.28,381518.5,2000.0,ccw 2006.232.07:34:31.13#flagr#flagr/antenna,new-source 2006.232.07:34:32.14:checkk5 2006.232.07:34:32.51/chk_autoobs//k5ts1/ autoobs is running! 2006.232.07:34:32.88/chk_autoobs//k5ts2/ autoobs is running! 2006.232.07:34:33.26/chk_autoobs//k5ts3/ autoobs is running! 2006.232.07:34:33.63/chk_autoobs//k5ts4/ autoobs is running! 2006.232.07:34:33.99/chk_obsdata//k5ts1/T2320733??a.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:34:34.35/chk_obsdata//k5ts2/T2320733??b.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:34:34.73/chk_obsdata//k5ts3/T2320733??c.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:34:35.09/chk_obsdata//k5ts4/T2320733??d.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:34:35.79/k5log//k5ts1_log_newline 2006.232.07:34:36.48/k5log//k5ts2_log_newline 2006.232.07:34:37.17/k5log//k5ts3_log_newline 2006.232.07:34:37.86/k5log//k5ts4_log_newline 2006.232.07:34:37.88/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.232.07:34:37.88:4f8m12a=1 2006.232.07:34:37.88$4f8m12a/echo=on 2006.232.07:34:37.88$4f8m12a/pcalon 2006.232.07:34:37.88$pcalon/"no phase cal control is implemented here 2006.232.07:34:37.88$4f8m12a/"tpicd=stop 2006.232.07:34:37.88$4f8m12a/vc4f8 2006.232.07:34:37.88$vc4f8/valo=1,532.99 2006.232.07:34:37.89#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.232.07:34:37.89#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.232.07:34:37.89#ibcon#ireg 17 cls_cnt 0 2006.232.07:34:37.89#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.232.07:34:37.89#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.232.07:34:37.89#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.232.07:34:37.89#ibcon#enter wrdev, iclass 13, count 0 2006.232.07:34:37.89#ibcon#first serial, iclass 13, count 0 2006.232.07:34:37.89#ibcon#enter sib2, iclass 13, count 0 2006.232.07:34:37.89#ibcon#flushed, iclass 13, count 0 2006.232.07:34:37.89#ibcon#about to write, iclass 13, count 0 2006.232.07:34:37.89#ibcon#wrote, iclass 13, count 0 2006.232.07:34:37.89#ibcon#about to read 3, iclass 13, count 0 2006.232.07:34:37.93#ibcon#read 3, iclass 13, count 0 2006.232.07:34:37.93#ibcon#about to read 4, iclass 13, count 0 2006.232.07:34:37.93#ibcon#read 4, iclass 13, count 0 2006.232.07:34:37.93#ibcon#about to read 5, iclass 13, count 0 2006.232.07:34:37.93#ibcon#read 5, iclass 13, count 0 2006.232.07:34:37.93#ibcon#about to read 6, iclass 13, count 0 2006.232.07:34:37.93#ibcon#read 6, iclass 13, count 0 2006.232.07:34:37.93#ibcon#end of sib2, iclass 13, count 0 2006.232.07:34:37.93#ibcon#*mode == 0, iclass 13, count 0 2006.232.07:34:37.93#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.232.07:34:37.93#ibcon#[26=FRQ=01,532.99\r\n] 2006.232.07:34:37.93#ibcon#*before write, iclass 13, count 0 2006.232.07:34:37.93#ibcon#enter sib2, iclass 13, count 0 2006.232.07:34:37.93#ibcon#flushed, iclass 13, count 0 2006.232.07:34:37.93#ibcon#about to write, iclass 13, count 0 2006.232.07:34:37.93#ibcon#wrote, iclass 13, count 0 2006.232.07:34:37.93#ibcon#about to read 3, iclass 13, count 0 2006.232.07:34:37.98#ibcon#read 3, iclass 13, count 0 2006.232.07:34:37.98#ibcon#about to read 4, iclass 13, count 0 2006.232.07:34:37.98#ibcon#read 4, iclass 13, count 0 2006.232.07:34:37.98#ibcon#about to read 5, iclass 13, count 0 2006.232.07:34:37.98#ibcon#read 5, iclass 13, count 0 2006.232.07:34:37.98#ibcon#about to read 6, iclass 13, count 0 2006.232.07:34:37.98#ibcon#read 6, iclass 13, count 0 2006.232.07:34:37.98#ibcon#end of sib2, iclass 13, count 0 2006.232.07:34:37.98#ibcon#*after write, iclass 13, count 0 2006.232.07:34:37.98#ibcon#*before return 0, iclass 13, count 0 2006.232.07:34:37.98#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.232.07:34:37.98#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.232.07:34:37.98#ibcon#about to clear, iclass 13 cls_cnt 0 2006.232.07:34:37.98#ibcon#cleared, iclass 13 cls_cnt 0 2006.232.07:34:37.98$vc4f8/va=1,8 2006.232.07:34:37.98#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.232.07:34:37.98#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.232.07:34:37.98#ibcon#ireg 11 cls_cnt 2 2006.232.07:34:37.98#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.232.07:34:37.98#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.232.07:34:37.98#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.232.07:34:37.98#ibcon#enter wrdev, iclass 15, count 2 2006.232.07:34:37.98#ibcon#first serial, iclass 15, count 2 2006.232.07:34:37.98#ibcon#enter sib2, iclass 15, count 2 2006.232.07:34:37.98#ibcon#flushed, iclass 15, count 2 2006.232.07:34:37.98#ibcon#about to write, iclass 15, count 2 2006.232.07:34:37.98#ibcon#wrote, iclass 15, count 2 2006.232.07:34:37.98#ibcon#about to read 3, iclass 15, count 2 2006.232.07:34:38.00#ibcon#read 3, iclass 15, count 2 2006.232.07:34:38.00#ibcon#about to read 4, iclass 15, count 2 2006.232.07:34:38.00#ibcon#read 4, iclass 15, count 2 2006.232.07:34:38.00#ibcon#about to read 5, iclass 15, count 2 2006.232.07:34:38.00#ibcon#read 5, iclass 15, count 2 2006.232.07:34:38.00#ibcon#about to read 6, iclass 15, count 2 2006.232.07:34:38.00#ibcon#read 6, iclass 15, count 2 2006.232.07:34:38.00#ibcon#end of sib2, iclass 15, count 2 2006.232.07:34:38.00#ibcon#*mode == 0, iclass 15, count 2 2006.232.07:34:38.00#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.232.07:34:38.00#ibcon#[25=AT01-08\r\n] 2006.232.07:34:38.00#ibcon#*before write, iclass 15, count 2 2006.232.07:34:38.00#ibcon#enter sib2, iclass 15, count 2 2006.232.07:34:38.00#ibcon#flushed, iclass 15, count 2 2006.232.07:34:38.00#ibcon#about to write, iclass 15, count 2 2006.232.07:34:38.00#ibcon#wrote, iclass 15, count 2 2006.232.07:34:38.00#ibcon#about to read 3, iclass 15, count 2 2006.232.07:34:38.03#ibcon#read 3, iclass 15, count 2 2006.232.07:34:38.03#ibcon#about to read 4, iclass 15, count 2 2006.232.07:34:38.03#ibcon#read 4, iclass 15, count 2 2006.232.07:34:38.03#ibcon#about to read 5, iclass 15, count 2 2006.232.07:34:38.03#ibcon#read 5, iclass 15, count 2 2006.232.07:34:38.03#ibcon#about to read 6, iclass 15, count 2 2006.232.07:34:38.03#ibcon#read 6, iclass 15, count 2 2006.232.07:34:38.03#ibcon#end of sib2, iclass 15, count 2 2006.232.07:34:38.03#ibcon#*after write, iclass 15, count 2 2006.232.07:34:38.03#ibcon#*before return 0, iclass 15, count 2 2006.232.07:34:38.03#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.232.07:34:38.03#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.232.07:34:38.03#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.232.07:34:38.03#ibcon#ireg 7 cls_cnt 0 2006.232.07:34:38.03#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.232.07:34:38.15#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.232.07:34:38.15#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.232.07:34:38.15#ibcon#enter wrdev, iclass 15, count 0 2006.232.07:34:38.15#ibcon#first serial, iclass 15, count 0 2006.232.07:34:38.15#ibcon#enter sib2, iclass 15, count 0 2006.232.07:34:38.15#ibcon#flushed, iclass 15, count 0 2006.232.07:34:38.15#ibcon#about to write, iclass 15, count 0 2006.232.07:34:38.15#ibcon#wrote, iclass 15, count 0 2006.232.07:34:38.15#ibcon#about to read 3, iclass 15, count 0 2006.232.07:34:38.17#ibcon#read 3, iclass 15, count 0 2006.232.07:34:38.17#ibcon#about to read 4, iclass 15, count 0 2006.232.07:34:38.17#ibcon#read 4, iclass 15, count 0 2006.232.07:34:38.17#ibcon#about to read 5, iclass 15, count 0 2006.232.07:34:38.17#ibcon#read 5, iclass 15, count 0 2006.232.07:34:38.17#ibcon#about to read 6, iclass 15, count 0 2006.232.07:34:38.17#ibcon#read 6, iclass 15, count 0 2006.232.07:34:38.17#ibcon#end of sib2, iclass 15, count 0 2006.232.07:34:38.17#ibcon#*mode == 0, iclass 15, count 0 2006.232.07:34:38.17#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.232.07:34:38.17#ibcon#[25=USB\r\n] 2006.232.07:34:38.17#ibcon#*before write, iclass 15, count 0 2006.232.07:34:38.17#ibcon#enter sib2, iclass 15, count 0 2006.232.07:34:38.17#ibcon#flushed, iclass 15, count 0 2006.232.07:34:38.17#ibcon#about to write, iclass 15, count 0 2006.232.07:34:38.17#ibcon#wrote, iclass 15, count 0 2006.232.07:34:38.17#ibcon#about to read 3, iclass 15, count 0 2006.232.07:34:38.20#ibcon#read 3, iclass 15, count 0 2006.232.07:34:38.20#ibcon#about to read 4, iclass 15, count 0 2006.232.07:34:38.20#ibcon#read 4, iclass 15, count 0 2006.232.07:34:38.20#ibcon#about to read 5, iclass 15, count 0 2006.232.07:34:38.20#ibcon#read 5, iclass 15, count 0 2006.232.07:34:38.20#ibcon#about to read 6, iclass 15, count 0 2006.232.07:34:38.20#ibcon#read 6, iclass 15, count 0 2006.232.07:34:38.20#ibcon#end of sib2, iclass 15, count 0 2006.232.07:34:38.20#ibcon#*after write, iclass 15, count 0 2006.232.07:34:38.20#ibcon#*before return 0, iclass 15, count 0 2006.232.07:34:38.20#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.232.07:34:38.20#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.232.07:34:38.20#ibcon#about to clear, iclass 15 cls_cnt 0 2006.232.07:34:38.20#ibcon#cleared, iclass 15 cls_cnt 0 2006.232.07:34:38.20$vc4f8/valo=2,572.99 2006.232.07:34:38.20#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.232.07:34:38.20#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.232.07:34:38.20#ibcon#ireg 17 cls_cnt 0 2006.232.07:34:38.20#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.232.07:34:38.20#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.232.07:34:38.20#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.232.07:34:38.20#ibcon#enter wrdev, iclass 17, count 0 2006.232.07:34:38.20#ibcon#first serial, iclass 17, count 0 2006.232.07:34:38.20#ibcon#enter sib2, iclass 17, count 0 2006.232.07:34:38.20#ibcon#flushed, iclass 17, count 0 2006.232.07:34:38.20#ibcon#about to write, iclass 17, count 0 2006.232.07:34:38.20#ibcon#wrote, iclass 17, count 0 2006.232.07:34:38.20#ibcon#about to read 3, iclass 17, count 0 2006.232.07:34:38.22#ibcon#read 3, iclass 17, count 0 2006.232.07:34:38.22#ibcon#about to read 4, iclass 17, count 0 2006.232.07:34:38.22#ibcon#read 4, iclass 17, count 0 2006.232.07:34:38.22#ibcon#about to read 5, iclass 17, count 0 2006.232.07:34:38.22#ibcon#read 5, iclass 17, count 0 2006.232.07:34:38.22#ibcon#about to read 6, iclass 17, count 0 2006.232.07:34:38.22#ibcon#read 6, iclass 17, count 0 2006.232.07:34:38.22#ibcon#end of sib2, iclass 17, count 0 2006.232.07:34:38.22#ibcon#*mode == 0, iclass 17, count 0 2006.232.07:34:38.22#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.232.07:34:38.22#ibcon#[26=FRQ=02,572.99\r\n] 2006.232.07:34:38.22#ibcon#*before write, iclass 17, count 0 2006.232.07:34:38.22#ibcon#enter sib2, iclass 17, count 0 2006.232.07:34:38.22#ibcon#flushed, iclass 17, count 0 2006.232.07:34:38.22#ibcon#about to write, iclass 17, count 0 2006.232.07:34:38.22#ibcon#wrote, iclass 17, count 0 2006.232.07:34:38.22#ibcon#about to read 3, iclass 17, count 0 2006.232.07:34:38.26#ibcon#read 3, iclass 17, count 0 2006.232.07:34:38.26#ibcon#about to read 4, iclass 17, count 0 2006.232.07:34:38.26#ibcon#read 4, iclass 17, count 0 2006.232.07:34:38.26#ibcon#about to read 5, iclass 17, count 0 2006.232.07:34:38.26#ibcon#read 5, iclass 17, count 0 2006.232.07:34:38.26#ibcon#about to read 6, iclass 17, count 0 2006.232.07:34:38.26#ibcon#read 6, iclass 17, count 0 2006.232.07:34:38.26#ibcon#end of sib2, iclass 17, count 0 2006.232.07:34:38.26#ibcon#*after write, iclass 17, count 0 2006.232.07:34:38.26#ibcon#*before return 0, iclass 17, count 0 2006.232.07:34:38.26#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.232.07:34:38.26#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.232.07:34:38.26#ibcon#about to clear, iclass 17 cls_cnt 0 2006.232.07:34:38.26#ibcon#cleared, iclass 17 cls_cnt 0 2006.232.07:34:38.26$vc4f8/va=2,7 2006.232.07:34:38.26#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.232.07:34:38.26#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.232.07:34:38.26#ibcon#ireg 11 cls_cnt 2 2006.232.07:34:38.26#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.232.07:34:38.32#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.232.07:34:38.32#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.232.07:34:38.32#ibcon#enter wrdev, iclass 19, count 2 2006.232.07:34:38.32#ibcon#first serial, iclass 19, count 2 2006.232.07:34:38.32#ibcon#enter sib2, iclass 19, count 2 2006.232.07:34:38.32#ibcon#flushed, iclass 19, count 2 2006.232.07:34:38.32#ibcon#about to write, iclass 19, count 2 2006.232.07:34:38.32#ibcon#wrote, iclass 19, count 2 2006.232.07:34:38.32#ibcon#about to read 3, iclass 19, count 2 2006.232.07:34:38.34#ibcon#read 3, iclass 19, count 2 2006.232.07:34:38.34#ibcon#about to read 4, iclass 19, count 2 2006.232.07:34:38.34#ibcon#read 4, iclass 19, count 2 2006.232.07:34:38.34#ibcon#about to read 5, iclass 19, count 2 2006.232.07:34:38.34#ibcon#read 5, iclass 19, count 2 2006.232.07:34:38.34#ibcon#about to read 6, iclass 19, count 2 2006.232.07:34:38.34#ibcon#read 6, iclass 19, count 2 2006.232.07:34:38.34#ibcon#end of sib2, iclass 19, count 2 2006.232.07:34:38.34#ibcon#*mode == 0, iclass 19, count 2 2006.232.07:34:38.34#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.232.07:34:38.34#ibcon#[25=AT02-07\r\n] 2006.232.07:34:38.34#ibcon#*before write, iclass 19, count 2 2006.232.07:34:38.34#ibcon#enter sib2, iclass 19, count 2 2006.232.07:34:38.34#ibcon#flushed, iclass 19, count 2 2006.232.07:34:38.34#ibcon#about to write, iclass 19, count 2 2006.232.07:34:38.34#ibcon#wrote, iclass 19, count 2 2006.232.07:34:38.34#ibcon#about to read 3, iclass 19, count 2 2006.232.07:34:38.37#ibcon#read 3, iclass 19, count 2 2006.232.07:34:38.37#ibcon#about to read 4, iclass 19, count 2 2006.232.07:34:38.37#ibcon#read 4, iclass 19, count 2 2006.232.07:34:38.37#ibcon#about to read 5, iclass 19, count 2 2006.232.07:34:38.37#ibcon#read 5, iclass 19, count 2 2006.232.07:34:38.37#ibcon#about to read 6, iclass 19, count 2 2006.232.07:34:38.37#ibcon#read 6, iclass 19, count 2 2006.232.07:34:38.37#ibcon#end of sib2, iclass 19, count 2 2006.232.07:34:38.37#ibcon#*after write, iclass 19, count 2 2006.232.07:34:38.37#ibcon#*before return 0, iclass 19, count 2 2006.232.07:34:38.37#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.232.07:34:38.37#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.232.07:34:38.37#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.232.07:34:38.37#ibcon#ireg 7 cls_cnt 0 2006.232.07:34:38.37#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.232.07:34:38.49#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.232.07:34:38.49#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.232.07:34:38.49#ibcon#enter wrdev, iclass 19, count 0 2006.232.07:34:38.49#ibcon#first serial, iclass 19, count 0 2006.232.07:34:38.49#ibcon#enter sib2, iclass 19, count 0 2006.232.07:34:38.49#ibcon#flushed, iclass 19, count 0 2006.232.07:34:38.49#ibcon#about to write, iclass 19, count 0 2006.232.07:34:38.49#ibcon#wrote, iclass 19, count 0 2006.232.07:34:38.49#ibcon#about to read 3, iclass 19, count 0 2006.232.07:34:38.51#ibcon#read 3, iclass 19, count 0 2006.232.07:34:38.51#ibcon#about to read 4, iclass 19, count 0 2006.232.07:34:38.51#ibcon#read 4, iclass 19, count 0 2006.232.07:34:38.51#ibcon#about to read 5, iclass 19, count 0 2006.232.07:34:38.51#ibcon#read 5, iclass 19, count 0 2006.232.07:34:38.51#ibcon#about to read 6, iclass 19, count 0 2006.232.07:34:38.51#ibcon#read 6, iclass 19, count 0 2006.232.07:34:38.51#ibcon#end of sib2, iclass 19, count 0 2006.232.07:34:38.51#ibcon#*mode == 0, iclass 19, count 0 2006.232.07:34:38.51#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.232.07:34:38.51#ibcon#[25=USB\r\n] 2006.232.07:34:38.51#ibcon#*before write, iclass 19, count 0 2006.232.07:34:38.51#ibcon#enter sib2, iclass 19, count 0 2006.232.07:34:38.51#ibcon#flushed, iclass 19, count 0 2006.232.07:34:38.51#ibcon#about to write, iclass 19, count 0 2006.232.07:34:38.51#ibcon#wrote, iclass 19, count 0 2006.232.07:34:38.51#ibcon#about to read 3, iclass 19, count 0 2006.232.07:34:38.54#ibcon#read 3, iclass 19, count 0 2006.232.07:34:38.54#ibcon#about to read 4, iclass 19, count 0 2006.232.07:34:38.54#ibcon#read 4, iclass 19, count 0 2006.232.07:34:38.54#ibcon#about to read 5, iclass 19, count 0 2006.232.07:34:38.54#ibcon#read 5, iclass 19, count 0 2006.232.07:34:38.54#ibcon#about to read 6, iclass 19, count 0 2006.232.07:34:38.54#ibcon#read 6, iclass 19, count 0 2006.232.07:34:38.54#ibcon#end of sib2, iclass 19, count 0 2006.232.07:34:38.54#ibcon#*after write, iclass 19, count 0 2006.232.07:34:38.54#ibcon#*before return 0, iclass 19, count 0 2006.232.07:34:38.54#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.232.07:34:38.54#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.232.07:34:38.54#ibcon#about to clear, iclass 19 cls_cnt 0 2006.232.07:34:38.54#ibcon#cleared, iclass 19 cls_cnt 0 2006.232.07:34:38.54$vc4f8/valo=3,672.99 2006.232.07:34:38.54#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.232.07:34:38.54#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.232.07:34:38.54#ibcon#ireg 17 cls_cnt 0 2006.232.07:34:38.54#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.232.07:34:38.54#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.232.07:34:38.54#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.232.07:34:38.54#ibcon#enter wrdev, iclass 21, count 0 2006.232.07:34:38.54#ibcon#first serial, iclass 21, count 0 2006.232.07:34:38.54#ibcon#enter sib2, iclass 21, count 0 2006.232.07:34:38.54#ibcon#flushed, iclass 21, count 0 2006.232.07:34:38.54#ibcon#about to write, iclass 21, count 0 2006.232.07:34:38.54#ibcon#wrote, iclass 21, count 0 2006.232.07:34:38.54#ibcon#about to read 3, iclass 21, count 0 2006.232.07:34:38.56#ibcon#read 3, iclass 21, count 0 2006.232.07:34:38.56#ibcon#about to read 4, iclass 21, count 0 2006.232.07:34:38.56#ibcon#read 4, iclass 21, count 0 2006.232.07:34:38.56#ibcon#about to read 5, iclass 21, count 0 2006.232.07:34:38.56#ibcon#read 5, iclass 21, count 0 2006.232.07:34:38.56#ibcon#about to read 6, iclass 21, count 0 2006.232.07:34:38.56#ibcon#read 6, iclass 21, count 0 2006.232.07:34:38.56#ibcon#end of sib2, iclass 21, count 0 2006.232.07:34:38.56#ibcon#*mode == 0, iclass 21, count 0 2006.232.07:34:38.56#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.232.07:34:38.56#ibcon#[26=FRQ=03,672.99\r\n] 2006.232.07:34:38.56#ibcon#*before write, iclass 21, count 0 2006.232.07:34:38.56#ibcon#enter sib2, iclass 21, count 0 2006.232.07:34:38.56#ibcon#flushed, iclass 21, count 0 2006.232.07:34:38.56#ibcon#about to write, iclass 21, count 0 2006.232.07:34:38.56#ibcon#wrote, iclass 21, count 0 2006.232.07:34:38.56#ibcon#about to read 3, iclass 21, count 0 2006.232.07:34:38.60#ibcon#read 3, iclass 21, count 0 2006.232.07:34:38.60#ibcon#about to read 4, iclass 21, count 0 2006.232.07:34:38.60#ibcon#read 4, iclass 21, count 0 2006.232.07:34:38.60#ibcon#about to read 5, iclass 21, count 0 2006.232.07:34:38.60#ibcon#read 5, iclass 21, count 0 2006.232.07:34:38.60#ibcon#about to read 6, iclass 21, count 0 2006.232.07:34:38.60#ibcon#read 6, iclass 21, count 0 2006.232.07:34:38.60#ibcon#end of sib2, iclass 21, count 0 2006.232.07:34:38.60#ibcon#*after write, iclass 21, count 0 2006.232.07:34:38.60#ibcon#*before return 0, iclass 21, count 0 2006.232.07:34:38.60#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.232.07:34:38.60#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.232.07:34:38.60#ibcon#about to clear, iclass 21 cls_cnt 0 2006.232.07:34:38.60#ibcon#cleared, iclass 21 cls_cnt 0 2006.232.07:34:38.60$vc4f8/va=3,8 2006.232.07:34:38.60#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.232.07:34:38.60#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.232.07:34:38.60#ibcon#ireg 11 cls_cnt 2 2006.232.07:34:38.60#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.232.07:34:38.66#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.232.07:34:38.66#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.232.07:34:38.66#ibcon#enter wrdev, iclass 23, count 2 2006.232.07:34:38.66#ibcon#first serial, iclass 23, count 2 2006.232.07:34:38.66#ibcon#enter sib2, iclass 23, count 2 2006.232.07:34:38.66#ibcon#flushed, iclass 23, count 2 2006.232.07:34:38.66#ibcon#about to write, iclass 23, count 2 2006.232.07:34:38.66#ibcon#wrote, iclass 23, count 2 2006.232.07:34:38.66#ibcon#about to read 3, iclass 23, count 2 2006.232.07:34:38.68#ibcon#read 3, iclass 23, count 2 2006.232.07:34:38.68#ibcon#about to read 4, iclass 23, count 2 2006.232.07:34:38.68#ibcon#read 4, iclass 23, count 2 2006.232.07:34:38.68#ibcon#about to read 5, iclass 23, count 2 2006.232.07:34:38.68#ibcon#read 5, iclass 23, count 2 2006.232.07:34:38.68#ibcon#about to read 6, iclass 23, count 2 2006.232.07:34:38.68#ibcon#read 6, iclass 23, count 2 2006.232.07:34:38.68#ibcon#end of sib2, iclass 23, count 2 2006.232.07:34:38.68#ibcon#*mode == 0, iclass 23, count 2 2006.232.07:34:38.68#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.232.07:34:38.68#ibcon#[25=AT03-08\r\n] 2006.232.07:34:38.68#ibcon#*before write, iclass 23, count 2 2006.232.07:34:38.68#ibcon#enter sib2, iclass 23, count 2 2006.232.07:34:38.68#ibcon#flushed, iclass 23, count 2 2006.232.07:34:38.68#ibcon#about to write, iclass 23, count 2 2006.232.07:34:38.68#ibcon#wrote, iclass 23, count 2 2006.232.07:34:38.68#ibcon#about to read 3, iclass 23, count 2 2006.232.07:34:38.71#ibcon#read 3, iclass 23, count 2 2006.232.07:34:38.71#ibcon#about to read 4, iclass 23, count 2 2006.232.07:34:38.71#ibcon#read 4, iclass 23, count 2 2006.232.07:34:38.71#ibcon#about to read 5, iclass 23, count 2 2006.232.07:34:38.71#ibcon#read 5, iclass 23, count 2 2006.232.07:34:38.71#ibcon#about to read 6, iclass 23, count 2 2006.232.07:34:38.71#ibcon#read 6, iclass 23, count 2 2006.232.07:34:38.71#ibcon#end of sib2, iclass 23, count 2 2006.232.07:34:38.71#ibcon#*after write, iclass 23, count 2 2006.232.07:34:38.71#ibcon#*before return 0, iclass 23, count 2 2006.232.07:34:38.71#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.232.07:34:38.71#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.232.07:34:38.71#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.232.07:34:38.71#ibcon#ireg 7 cls_cnt 0 2006.232.07:34:38.71#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.232.07:34:38.83#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.232.07:34:38.83#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.232.07:34:38.83#ibcon#enter wrdev, iclass 23, count 0 2006.232.07:34:38.83#ibcon#first serial, iclass 23, count 0 2006.232.07:34:38.83#ibcon#enter sib2, iclass 23, count 0 2006.232.07:34:38.83#ibcon#flushed, iclass 23, count 0 2006.232.07:34:38.83#ibcon#about to write, iclass 23, count 0 2006.232.07:34:38.83#ibcon#wrote, iclass 23, count 0 2006.232.07:34:38.83#ibcon#about to read 3, iclass 23, count 0 2006.232.07:34:38.85#ibcon#read 3, iclass 23, count 0 2006.232.07:34:38.85#ibcon#about to read 4, iclass 23, count 0 2006.232.07:34:38.85#ibcon#read 4, iclass 23, count 0 2006.232.07:34:38.85#ibcon#about to read 5, iclass 23, count 0 2006.232.07:34:38.85#ibcon#read 5, iclass 23, count 0 2006.232.07:34:38.85#ibcon#about to read 6, iclass 23, count 0 2006.232.07:34:38.85#ibcon#read 6, iclass 23, count 0 2006.232.07:34:38.85#ibcon#end of sib2, iclass 23, count 0 2006.232.07:34:38.85#ibcon#*mode == 0, iclass 23, count 0 2006.232.07:34:38.85#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.232.07:34:38.85#ibcon#[25=USB\r\n] 2006.232.07:34:38.85#ibcon#*before write, iclass 23, count 0 2006.232.07:34:38.85#ibcon#enter sib2, iclass 23, count 0 2006.232.07:34:38.85#ibcon#flushed, iclass 23, count 0 2006.232.07:34:38.85#ibcon#about to write, iclass 23, count 0 2006.232.07:34:38.85#ibcon#wrote, iclass 23, count 0 2006.232.07:34:38.85#ibcon#about to read 3, iclass 23, count 0 2006.232.07:34:38.88#ibcon#read 3, iclass 23, count 0 2006.232.07:34:38.88#ibcon#about to read 4, iclass 23, count 0 2006.232.07:34:38.88#ibcon#read 4, iclass 23, count 0 2006.232.07:34:38.88#ibcon#about to read 5, iclass 23, count 0 2006.232.07:34:38.88#ibcon#read 5, iclass 23, count 0 2006.232.07:34:38.88#ibcon#about to read 6, iclass 23, count 0 2006.232.07:34:38.88#ibcon#read 6, iclass 23, count 0 2006.232.07:34:38.88#ibcon#end of sib2, iclass 23, count 0 2006.232.07:34:38.88#ibcon#*after write, iclass 23, count 0 2006.232.07:34:38.88#ibcon#*before return 0, iclass 23, count 0 2006.232.07:34:38.88#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.232.07:34:38.88#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.232.07:34:38.88#ibcon#about to clear, iclass 23 cls_cnt 0 2006.232.07:34:38.88#ibcon#cleared, iclass 23 cls_cnt 0 2006.232.07:34:38.88$vc4f8/valo=4,832.99 2006.232.07:34:38.88#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.232.07:34:38.88#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.232.07:34:38.88#ibcon#ireg 17 cls_cnt 0 2006.232.07:34:38.88#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.232.07:34:38.88#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.232.07:34:38.88#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.232.07:34:38.88#ibcon#enter wrdev, iclass 25, count 0 2006.232.07:34:38.88#ibcon#first serial, iclass 25, count 0 2006.232.07:34:38.88#ibcon#enter sib2, iclass 25, count 0 2006.232.07:34:38.88#ibcon#flushed, iclass 25, count 0 2006.232.07:34:38.88#ibcon#about to write, iclass 25, count 0 2006.232.07:34:38.88#ibcon#wrote, iclass 25, count 0 2006.232.07:34:38.88#ibcon#about to read 3, iclass 25, count 0 2006.232.07:34:38.90#ibcon#read 3, iclass 25, count 0 2006.232.07:34:38.90#ibcon#about to read 4, iclass 25, count 0 2006.232.07:34:38.90#ibcon#read 4, iclass 25, count 0 2006.232.07:34:38.90#ibcon#about to read 5, iclass 25, count 0 2006.232.07:34:38.90#ibcon#read 5, iclass 25, count 0 2006.232.07:34:38.90#ibcon#about to read 6, iclass 25, count 0 2006.232.07:34:38.90#ibcon#read 6, iclass 25, count 0 2006.232.07:34:38.90#ibcon#end of sib2, iclass 25, count 0 2006.232.07:34:38.90#ibcon#*mode == 0, iclass 25, count 0 2006.232.07:34:38.90#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.232.07:34:38.90#ibcon#[26=FRQ=04,832.99\r\n] 2006.232.07:34:38.90#ibcon#*before write, iclass 25, count 0 2006.232.07:34:38.90#ibcon#enter sib2, iclass 25, count 0 2006.232.07:34:38.90#ibcon#flushed, iclass 25, count 0 2006.232.07:34:38.90#ibcon#about to write, iclass 25, count 0 2006.232.07:34:38.90#ibcon#wrote, iclass 25, count 0 2006.232.07:34:38.90#ibcon#about to read 3, iclass 25, count 0 2006.232.07:34:38.94#ibcon#read 3, iclass 25, count 0 2006.232.07:34:38.94#ibcon#about to read 4, iclass 25, count 0 2006.232.07:34:38.94#ibcon#read 4, iclass 25, count 0 2006.232.07:34:38.94#ibcon#about to read 5, iclass 25, count 0 2006.232.07:34:38.94#ibcon#read 5, iclass 25, count 0 2006.232.07:34:38.94#ibcon#about to read 6, iclass 25, count 0 2006.232.07:34:38.94#ibcon#read 6, iclass 25, count 0 2006.232.07:34:38.94#ibcon#end of sib2, iclass 25, count 0 2006.232.07:34:38.94#ibcon#*after write, iclass 25, count 0 2006.232.07:34:38.94#ibcon#*before return 0, iclass 25, count 0 2006.232.07:34:38.94#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.232.07:34:38.94#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.232.07:34:38.94#ibcon#about to clear, iclass 25 cls_cnt 0 2006.232.07:34:38.94#ibcon#cleared, iclass 25 cls_cnt 0 2006.232.07:34:38.94$vc4f8/va=4,7 2006.232.07:34:38.94#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.232.07:34:38.94#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.232.07:34:38.94#ibcon#ireg 11 cls_cnt 2 2006.232.07:34:38.94#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.232.07:34:39.00#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.232.07:34:39.00#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.232.07:34:39.00#ibcon#enter wrdev, iclass 27, count 2 2006.232.07:34:39.00#ibcon#first serial, iclass 27, count 2 2006.232.07:34:39.00#ibcon#enter sib2, iclass 27, count 2 2006.232.07:34:39.00#ibcon#flushed, iclass 27, count 2 2006.232.07:34:39.00#ibcon#about to write, iclass 27, count 2 2006.232.07:34:39.00#ibcon#wrote, iclass 27, count 2 2006.232.07:34:39.00#ibcon#about to read 3, iclass 27, count 2 2006.232.07:34:39.02#ibcon#read 3, iclass 27, count 2 2006.232.07:34:39.02#ibcon#about to read 4, iclass 27, count 2 2006.232.07:34:39.02#ibcon#read 4, iclass 27, count 2 2006.232.07:34:39.02#ibcon#about to read 5, iclass 27, count 2 2006.232.07:34:39.02#ibcon#read 5, iclass 27, count 2 2006.232.07:34:39.02#ibcon#about to read 6, iclass 27, count 2 2006.232.07:34:39.02#ibcon#read 6, iclass 27, count 2 2006.232.07:34:39.02#ibcon#end of sib2, iclass 27, count 2 2006.232.07:34:39.02#ibcon#*mode == 0, iclass 27, count 2 2006.232.07:34:39.02#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.232.07:34:39.02#ibcon#[25=AT04-07\r\n] 2006.232.07:34:39.02#ibcon#*before write, iclass 27, count 2 2006.232.07:34:39.02#ibcon#enter sib2, iclass 27, count 2 2006.232.07:34:39.02#ibcon#flushed, iclass 27, count 2 2006.232.07:34:39.02#ibcon#about to write, iclass 27, count 2 2006.232.07:34:39.02#ibcon#wrote, iclass 27, count 2 2006.232.07:34:39.02#ibcon#about to read 3, iclass 27, count 2 2006.232.07:34:39.05#ibcon#read 3, iclass 27, count 2 2006.232.07:34:39.05#ibcon#about to read 4, iclass 27, count 2 2006.232.07:34:39.05#ibcon#read 4, iclass 27, count 2 2006.232.07:34:39.05#ibcon#about to read 5, iclass 27, count 2 2006.232.07:34:39.05#ibcon#read 5, iclass 27, count 2 2006.232.07:34:39.05#ibcon#about to read 6, iclass 27, count 2 2006.232.07:34:39.05#ibcon#read 6, iclass 27, count 2 2006.232.07:34:39.05#ibcon#end of sib2, iclass 27, count 2 2006.232.07:34:39.05#ibcon#*after write, iclass 27, count 2 2006.232.07:34:39.05#ibcon#*before return 0, iclass 27, count 2 2006.232.07:34:39.05#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.232.07:34:39.05#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.232.07:34:39.05#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.232.07:34:39.05#ibcon#ireg 7 cls_cnt 0 2006.232.07:34:39.05#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.232.07:34:39.17#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.232.07:34:39.17#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.232.07:34:39.17#ibcon#enter wrdev, iclass 27, count 0 2006.232.07:34:39.17#ibcon#first serial, iclass 27, count 0 2006.232.07:34:39.17#ibcon#enter sib2, iclass 27, count 0 2006.232.07:34:39.17#ibcon#flushed, iclass 27, count 0 2006.232.07:34:39.17#ibcon#about to write, iclass 27, count 0 2006.232.07:34:39.17#ibcon#wrote, iclass 27, count 0 2006.232.07:34:39.17#ibcon#about to read 3, iclass 27, count 0 2006.232.07:34:39.19#ibcon#read 3, iclass 27, count 0 2006.232.07:34:39.19#ibcon#about to read 4, iclass 27, count 0 2006.232.07:34:39.19#ibcon#read 4, iclass 27, count 0 2006.232.07:34:39.19#ibcon#about to read 5, iclass 27, count 0 2006.232.07:34:39.19#ibcon#read 5, iclass 27, count 0 2006.232.07:34:39.19#ibcon#about to read 6, iclass 27, count 0 2006.232.07:34:39.19#ibcon#read 6, iclass 27, count 0 2006.232.07:34:39.19#ibcon#end of sib2, iclass 27, count 0 2006.232.07:34:39.19#ibcon#*mode == 0, iclass 27, count 0 2006.232.07:34:39.19#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.232.07:34:39.19#ibcon#[25=USB\r\n] 2006.232.07:34:39.19#ibcon#*before write, iclass 27, count 0 2006.232.07:34:39.19#ibcon#enter sib2, iclass 27, count 0 2006.232.07:34:39.19#ibcon#flushed, iclass 27, count 0 2006.232.07:34:39.19#ibcon#about to write, iclass 27, count 0 2006.232.07:34:39.19#ibcon#wrote, iclass 27, count 0 2006.232.07:34:39.19#ibcon#about to read 3, iclass 27, count 0 2006.232.07:34:39.22#ibcon#read 3, iclass 27, count 0 2006.232.07:34:39.22#ibcon#about to read 4, iclass 27, count 0 2006.232.07:34:39.22#ibcon#read 4, iclass 27, count 0 2006.232.07:34:39.22#ibcon#about to read 5, iclass 27, count 0 2006.232.07:34:39.22#ibcon#read 5, iclass 27, count 0 2006.232.07:34:39.22#ibcon#about to read 6, iclass 27, count 0 2006.232.07:34:39.22#ibcon#read 6, iclass 27, count 0 2006.232.07:34:39.22#ibcon#end of sib2, iclass 27, count 0 2006.232.07:34:39.22#ibcon#*after write, iclass 27, count 0 2006.232.07:34:39.22#ibcon#*before return 0, iclass 27, count 0 2006.232.07:34:39.22#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.232.07:34:39.22#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.232.07:34:39.22#ibcon#about to clear, iclass 27 cls_cnt 0 2006.232.07:34:39.22#ibcon#cleared, iclass 27 cls_cnt 0 2006.232.07:34:39.22$vc4f8/valo=5,652.99 2006.232.07:34:39.22#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.232.07:34:39.22#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.232.07:34:39.22#ibcon#ireg 17 cls_cnt 0 2006.232.07:34:39.22#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:34:39.22#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:34:39.22#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:34:39.22#ibcon#enter wrdev, iclass 29, count 0 2006.232.07:34:39.22#ibcon#first serial, iclass 29, count 0 2006.232.07:34:39.22#ibcon#enter sib2, iclass 29, count 0 2006.232.07:34:39.22#ibcon#flushed, iclass 29, count 0 2006.232.07:34:39.22#ibcon#about to write, iclass 29, count 0 2006.232.07:34:39.22#ibcon#wrote, iclass 29, count 0 2006.232.07:34:39.22#ibcon#about to read 3, iclass 29, count 0 2006.232.07:34:39.24#ibcon#read 3, iclass 29, count 0 2006.232.07:34:39.24#ibcon#about to read 4, iclass 29, count 0 2006.232.07:34:39.24#ibcon#read 4, iclass 29, count 0 2006.232.07:34:39.24#ibcon#about to read 5, iclass 29, count 0 2006.232.07:34:39.24#ibcon#read 5, iclass 29, count 0 2006.232.07:34:39.24#ibcon#about to read 6, iclass 29, count 0 2006.232.07:34:39.24#ibcon#read 6, iclass 29, count 0 2006.232.07:34:39.24#ibcon#end of sib2, iclass 29, count 0 2006.232.07:34:39.24#ibcon#*mode == 0, iclass 29, count 0 2006.232.07:34:39.24#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.232.07:34:39.24#ibcon#[26=FRQ=05,652.99\r\n] 2006.232.07:34:39.24#ibcon#*before write, iclass 29, count 0 2006.232.07:34:39.24#ibcon#enter sib2, iclass 29, count 0 2006.232.07:34:39.24#ibcon#flushed, iclass 29, count 0 2006.232.07:34:39.24#ibcon#about to write, iclass 29, count 0 2006.232.07:34:39.24#ibcon#wrote, iclass 29, count 0 2006.232.07:34:39.24#ibcon#about to read 3, iclass 29, count 0 2006.232.07:34:39.28#ibcon#read 3, iclass 29, count 0 2006.232.07:34:39.28#ibcon#about to read 4, iclass 29, count 0 2006.232.07:34:39.28#ibcon#read 4, iclass 29, count 0 2006.232.07:34:39.28#ibcon#about to read 5, iclass 29, count 0 2006.232.07:34:39.28#ibcon#read 5, iclass 29, count 0 2006.232.07:34:39.28#ibcon#about to read 6, iclass 29, count 0 2006.232.07:34:39.28#ibcon#read 6, iclass 29, count 0 2006.232.07:34:39.28#ibcon#end of sib2, iclass 29, count 0 2006.232.07:34:39.28#ibcon#*after write, iclass 29, count 0 2006.232.07:34:39.28#ibcon#*before return 0, iclass 29, count 0 2006.232.07:34:39.28#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:34:39.28#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:34:39.28#ibcon#about to clear, iclass 29 cls_cnt 0 2006.232.07:34:39.28#ibcon#cleared, iclass 29 cls_cnt 0 2006.232.07:34:39.28$vc4f8/va=5,7 2006.232.07:34:39.28#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.232.07:34:39.28#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.232.07:34:39.28#ibcon#ireg 11 cls_cnt 2 2006.232.07:34:39.28#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.232.07:34:39.34#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.232.07:34:39.34#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.232.07:34:39.34#ibcon#enter wrdev, iclass 31, count 2 2006.232.07:34:39.34#ibcon#first serial, iclass 31, count 2 2006.232.07:34:39.34#ibcon#enter sib2, iclass 31, count 2 2006.232.07:34:39.34#ibcon#flushed, iclass 31, count 2 2006.232.07:34:39.34#ibcon#about to write, iclass 31, count 2 2006.232.07:34:39.34#ibcon#wrote, iclass 31, count 2 2006.232.07:34:39.34#ibcon#about to read 3, iclass 31, count 2 2006.232.07:34:39.36#ibcon#read 3, iclass 31, count 2 2006.232.07:34:39.36#ibcon#about to read 4, iclass 31, count 2 2006.232.07:34:39.36#ibcon#read 4, iclass 31, count 2 2006.232.07:34:39.36#ibcon#about to read 5, iclass 31, count 2 2006.232.07:34:39.36#ibcon#read 5, iclass 31, count 2 2006.232.07:34:39.36#ibcon#about to read 6, iclass 31, count 2 2006.232.07:34:39.36#ibcon#read 6, iclass 31, count 2 2006.232.07:34:39.36#ibcon#end of sib2, iclass 31, count 2 2006.232.07:34:39.36#ibcon#*mode == 0, iclass 31, count 2 2006.232.07:34:39.36#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.232.07:34:39.36#ibcon#[25=AT05-07\r\n] 2006.232.07:34:39.36#ibcon#*before write, iclass 31, count 2 2006.232.07:34:39.36#ibcon#enter sib2, iclass 31, count 2 2006.232.07:34:39.36#ibcon#flushed, iclass 31, count 2 2006.232.07:34:39.36#ibcon#about to write, iclass 31, count 2 2006.232.07:34:39.36#ibcon#wrote, iclass 31, count 2 2006.232.07:34:39.36#ibcon#about to read 3, iclass 31, count 2 2006.232.07:34:39.39#ibcon#read 3, iclass 31, count 2 2006.232.07:34:39.39#ibcon#about to read 4, iclass 31, count 2 2006.232.07:34:39.39#ibcon#read 4, iclass 31, count 2 2006.232.07:34:39.39#ibcon#about to read 5, iclass 31, count 2 2006.232.07:34:39.39#ibcon#read 5, iclass 31, count 2 2006.232.07:34:39.39#ibcon#about to read 6, iclass 31, count 2 2006.232.07:34:39.39#ibcon#read 6, iclass 31, count 2 2006.232.07:34:39.39#ibcon#end of sib2, iclass 31, count 2 2006.232.07:34:39.39#ibcon#*after write, iclass 31, count 2 2006.232.07:34:39.39#ibcon#*before return 0, iclass 31, count 2 2006.232.07:34:39.39#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.232.07:34:39.39#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.232.07:34:39.39#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.232.07:34:39.39#ibcon#ireg 7 cls_cnt 0 2006.232.07:34:39.39#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.232.07:34:39.51#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.232.07:34:39.51#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.232.07:34:39.51#ibcon#enter wrdev, iclass 31, count 0 2006.232.07:34:39.51#ibcon#first serial, iclass 31, count 0 2006.232.07:34:39.51#ibcon#enter sib2, iclass 31, count 0 2006.232.07:34:39.51#ibcon#flushed, iclass 31, count 0 2006.232.07:34:39.51#ibcon#about to write, iclass 31, count 0 2006.232.07:34:39.51#ibcon#wrote, iclass 31, count 0 2006.232.07:34:39.51#ibcon#about to read 3, iclass 31, count 0 2006.232.07:34:39.53#ibcon#read 3, iclass 31, count 0 2006.232.07:34:39.53#ibcon#about to read 4, iclass 31, count 0 2006.232.07:34:39.53#ibcon#read 4, iclass 31, count 0 2006.232.07:34:39.53#ibcon#about to read 5, iclass 31, count 0 2006.232.07:34:39.53#ibcon#read 5, iclass 31, count 0 2006.232.07:34:39.53#ibcon#about to read 6, iclass 31, count 0 2006.232.07:34:39.53#ibcon#read 6, iclass 31, count 0 2006.232.07:34:39.53#ibcon#end of sib2, iclass 31, count 0 2006.232.07:34:39.53#ibcon#*mode == 0, iclass 31, count 0 2006.232.07:34:39.53#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.232.07:34:39.53#ibcon#[25=USB\r\n] 2006.232.07:34:39.53#ibcon#*before write, iclass 31, count 0 2006.232.07:34:39.53#ibcon#enter sib2, iclass 31, count 0 2006.232.07:34:39.53#ibcon#flushed, iclass 31, count 0 2006.232.07:34:39.53#ibcon#about to write, iclass 31, count 0 2006.232.07:34:39.53#ibcon#wrote, iclass 31, count 0 2006.232.07:34:39.53#ibcon#about to read 3, iclass 31, count 0 2006.232.07:34:39.56#ibcon#read 3, iclass 31, count 0 2006.232.07:34:39.56#ibcon#about to read 4, iclass 31, count 0 2006.232.07:34:39.56#ibcon#read 4, iclass 31, count 0 2006.232.07:34:39.56#ibcon#about to read 5, iclass 31, count 0 2006.232.07:34:39.56#ibcon#read 5, iclass 31, count 0 2006.232.07:34:39.56#ibcon#about to read 6, iclass 31, count 0 2006.232.07:34:39.56#ibcon#read 6, iclass 31, count 0 2006.232.07:34:39.56#ibcon#end of sib2, iclass 31, count 0 2006.232.07:34:39.56#ibcon#*after write, iclass 31, count 0 2006.232.07:34:39.56#ibcon#*before return 0, iclass 31, count 0 2006.232.07:34:39.56#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.232.07:34:39.56#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.232.07:34:39.56#ibcon#about to clear, iclass 31 cls_cnt 0 2006.232.07:34:39.56#ibcon#cleared, iclass 31 cls_cnt 0 2006.232.07:34:39.56$vc4f8/valo=6,772.99 2006.232.07:34:39.56#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.232.07:34:39.56#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.232.07:34:39.56#ibcon#ireg 17 cls_cnt 0 2006.232.07:34:39.56#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.232.07:34:39.56#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.232.07:34:39.56#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.232.07:34:39.56#ibcon#enter wrdev, iclass 33, count 0 2006.232.07:34:39.56#ibcon#first serial, iclass 33, count 0 2006.232.07:34:39.56#ibcon#enter sib2, iclass 33, count 0 2006.232.07:34:39.56#ibcon#flushed, iclass 33, count 0 2006.232.07:34:39.56#ibcon#about to write, iclass 33, count 0 2006.232.07:34:39.56#ibcon#wrote, iclass 33, count 0 2006.232.07:34:39.56#ibcon#about to read 3, iclass 33, count 0 2006.232.07:34:39.58#ibcon#read 3, iclass 33, count 0 2006.232.07:34:39.58#ibcon#about to read 4, iclass 33, count 0 2006.232.07:34:39.58#ibcon#read 4, iclass 33, count 0 2006.232.07:34:39.58#ibcon#about to read 5, iclass 33, count 0 2006.232.07:34:39.58#ibcon#read 5, iclass 33, count 0 2006.232.07:34:39.58#ibcon#about to read 6, iclass 33, count 0 2006.232.07:34:39.58#ibcon#read 6, iclass 33, count 0 2006.232.07:34:39.58#ibcon#end of sib2, iclass 33, count 0 2006.232.07:34:39.58#ibcon#*mode == 0, iclass 33, count 0 2006.232.07:34:39.58#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.232.07:34:39.58#ibcon#[26=FRQ=06,772.99\r\n] 2006.232.07:34:39.58#ibcon#*before write, iclass 33, count 0 2006.232.07:34:39.58#ibcon#enter sib2, iclass 33, count 0 2006.232.07:34:39.58#ibcon#flushed, iclass 33, count 0 2006.232.07:34:39.58#ibcon#about to write, iclass 33, count 0 2006.232.07:34:39.58#ibcon#wrote, iclass 33, count 0 2006.232.07:34:39.58#ibcon#about to read 3, iclass 33, count 0 2006.232.07:34:39.62#ibcon#read 3, iclass 33, count 0 2006.232.07:34:39.62#ibcon#about to read 4, iclass 33, count 0 2006.232.07:34:39.62#ibcon#read 4, iclass 33, count 0 2006.232.07:34:39.62#ibcon#about to read 5, iclass 33, count 0 2006.232.07:34:39.62#ibcon#read 5, iclass 33, count 0 2006.232.07:34:39.62#ibcon#about to read 6, iclass 33, count 0 2006.232.07:34:39.62#ibcon#read 6, iclass 33, count 0 2006.232.07:34:39.62#ibcon#end of sib2, iclass 33, count 0 2006.232.07:34:39.62#ibcon#*after write, iclass 33, count 0 2006.232.07:34:39.62#ibcon#*before return 0, iclass 33, count 0 2006.232.07:34:39.62#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.232.07:34:39.62#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.232.07:34:39.62#ibcon#about to clear, iclass 33 cls_cnt 0 2006.232.07:34:39.62#ibcon#cleared, iclass 33 cls_cnt 0 2006.232.07:34:39.62$vc4f8/va=6,6 2006.232.07:34:39.62#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.232.07:34:39.62#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.232.07:34:39.62#ibcon#ireg 11 cls_cnt 2 2006.232.07:34:39.62#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.232.07:34:39.68#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.232.07:34:39.68#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.232.07:34:39.68#ibcon#enter wrdev, iclass 35, count 2 2006.232.07:34:39.68#ibcon#first serial, iclass 35, count 2 2006.232.07:34:39.68#ibcon#enter sib2, iclass 35, count 2 2006.232.07:34:39.68#ibcon#flushed, iclass 35, count 2 2006.232.07:34:39.68#ibcon#about to write, iclass 35, count 2 2006.232.07:34:39.68#ibcon#wrote, iclass 35, count 2 2006.232.07:34:39.68#ibcon#about to read 3, iclass 35, count 2 2006.232.07:34:39.70#ibcon#read 3, iclass 35, count 2 2006.232.07:34:39.70#ibcon#about to read 4, iclass 35, count 2 2006.232.07:34:39.70#ibcon#read 4, iclass 35, count 2 2006.232.07:34:39.70#ibcon#about to read 5, iclass 35, count 2 2006.232.07:34:39.70#ibcon#read 5, iclass 35, count 2 2006.232.07:34:39.70#ibcon#about to read 6, iclass 35, count 2 2006.232.07:34:39.70#ibcon#read 6, iclass 35, count 2 2006.232.07:34:39.70#ibcon#end of sib2, iclass 35, count 2 2006.232.07:34:39.70#ibcon#*mode == 0, iclass 35, count 2 2006.232.07:34:39.70#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.232.07:34:39.70#ibcon#[25=AT06-06\r\n] 2006.232.07:34:39.70#ibcon#*before write, iclass 35, count 2 2006.232.07:34:39.70#ibcon#enter sib2, iclass 35, count 2 2006.232.07:34:39.70#ibcon#flushed, iclass 35, count 2 2006.232.07:34:39.70#ibcon#about to write, iclass 35, count 2 2006.232.07:34:39.70#ibcon#wrote, iclass 35, count 2 2006.232.07:34:39.70#ibcon#about to read 3, iclass 35, count 2 2006.232.07:34:39.73#ibcon#read 3, iclass 35, count 2 2006.232.07:34:39.73#ibcon#about to read 4, iclass 35, count 2 2006.232.07:34:39.73#ibcon#read 4, iclass 35, count 2 2006.232.07:34:39.73#ibcon#about to read 5, iclass 35, count 2 2006.232.07:34:39.73#ibcon#read 5, iclass 35, count 2 2006.232.07:34:39.73#ibcon#about to read 6, iclass 35, count 2 2006.232.07:34:39.73#ibcon#read 6, iclass 35, count 2 2006.232.07:34:39.73#ibcon#end of sib2, iclass 35, count 2 2006.232.07:34:39.73#ibcon#*after write, iclass 35, count 2 2006.232.07:34:39.73#ibcon#*before return 0, iclass 35, count 2 2006.232.07:34:39.73#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.232.07:34:39.73#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.232.07:34:39.73#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.232.07:34:39.73#ibcon#ireg 7 cls_cnt 0 2006.232.07:34:39.73#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.232.07:34:39.85#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.232.07:34:39.85#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.232.07:34:39.85#ibcon#enter wrdev, iclass 35, count 0 2006.232.07:34:39.85#ibcon#first serial, iclass 35, count 0 2006.232.07:34:39.85#ibcon#enter sib2, iclass 35, count 0 2006.232.07:34:39.85#ibcon#flushed, iclass 35, count 0 2006.232.07:34:39.85#ibcon#about to write, iclass 35, count 0 2006.232.07:34:39.85#ibcon#wrote, iclass 35, count 0 2006.232.07:34:39.85#ibcon#about to read 3, iclass 35, count 0 2006.232.07:34:39.87#ibcon#read 3, iclass 35, count 0 2006.232.07:34:39.87#ibcon#about to read 4, iclass 35, count 0 2006.232.07:34:39.87#ibcon#read 4, iclass 35, count 0 2006.232.07:34:39.87#ibcon#about to read 5, iclass 35, count 0 2006.232.07:34:39.87#ibcon#read 5, iclass 35, count 0 2006.232.07:34:39.87#ibcon#about to read 6, iclass 35, count 0 2006.232.07:34:39.87#ibcon#read 6, iclass 35, count 0 2006.232.07:34:39.87#ibcon#end of sib2, iclass 35, count 0 2006.232.07:34:39.87#ibcon#*mode == 0, iclass 35, count 0 2006.232.07:34:39.87#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.232.07:34:39.87#ibcon#[25=USB\r\n] 2006.232.07:34:39.87#ibcon#*before write, iclass 35, count 0 2006.232.07:34:39.87#ibcon#enter sib2, iclass 35, count 0 2006.232.07:34:39.87#ibcon#flushed, iclass 35, count 0 2006.232.07:34:39.87#ibcon#about to write, iclass 35, count 0 2006.232.07:34:39.87#ibcon#wrote, iclass 35, count 0 2006.232.07:34:39.87#ibcon#about to read 3, iclass 35, count 0 2006.232.07:34:39.90#ibcon#read 3, iclass 35, count 0 2006.232.07:34:39.90#ibcon#about to read 4, iclass 35, count 0 2006.232.07:34:39.90#ibcon#read 4, iclass 35, count 0 2006.232.07:34:39.90#ibcon#about to read 5, iclass 35, count 0 2006.232.07:34:39.90#ibcon#read 5, iclass 35, count 0 2006.232.07:34:39.90#ibcon#about to read 6, iclass 35, count 0 2006.232.07:34:39.90#ibcon#read 6, iclass 35, count 0 2006.232.07:34:39.90#ibcon#end of sib2, iclass 35, count 0 2006.232.07:34:39.90#ibcon#*after write, iclass 35, count 0 2006.232.07:34:39.90#ibcon#*before return 0, iclass 35, count 0 2006.232.07:34:39.90#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.232.07:34:39.90#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.232.07:34:39.90#ibcon#about to clear, iclass 35 cls_cnt 0 2006.232.07:34:39.90#ibcon#cleared, iclass 35 cls_cnt 0 2006.232.07:34:39.90$vc4f8/valo=7,832.99 2006.232.07:34:39.90#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.232.07:34:39.90#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.232.07:34:39.90#ibcon#ireg 17 cls_cnt 0 2006.232.07:34:39.90#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.232.07:34:39.90#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.232.07:34:39.90#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.232.07:34:39.90#ibcon#enter wrdev, iclass 37, count 0 2006.232.07:34:39.90#ibcon#first serial, iclass 37, count 0 2006.232.07:34:39.90#ibcon#enter sib2, iclass 37, count 0 2006.232.07:34:39.90#ibcon#flushed, iclass 37, count 0 2006.232.07:34:39.90#ibcon#about to write, iclass 37, count 0 2006.232.07:34:39.90#ibcon#wrote, iclass 37, count 0 2006.232.07:34:39.90#ibcon#about to read 3, iclass 37, count 0 2006.232.07:34:39.92#ibcon#read 3, iclass 37, count 0 2006.232.07:34:39.92#ibcon#about to read 4, iclass 37, count 0 2006.232.07:34:39.92#ibcon#read 4, iclass 37, count 0 2006.232.07:34:39.92#ibcon#about to read 5, iclass 37, count 0 2006.232.07:34:39.92#ibcon#read 5, iclass 37, count 0 2006.232.07:34:39.92#ibcon#about to read 6, iclass 37, count 0 2006.232.07:34:39.92#ibcon#read 6, iclass 37, count 0 2006.232.07:34:39.92#ibcon#end of sib2, iclass 37, count 0 2006.232.07:34:39.92#ibcon#*mode == 0, iclass 37, count 0 2006.232.07:34:39.92#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.232.07:34:39.92#ibcon#[26=FRQ=07,832.99\r\n] 2006.232.07:34:39.92#ibcon#*before write, iclass 37, count 0 2006.232.07:34:39.92#ibcon#enter sib2, iclass 37, count 0 2006.232.07:34:39.92#ibcon#flushed, iclass 37, count 0 2006.232.07:34:39.92#ibcon#about to write, iclass 37, count 0 2006.232.07:34:39.92#ibcon#wrote, iclass 37, count 0 2006.232.07:34:39.92#ibcon#about to read 3, iclass 37, count 0 2006.232.07:34:39.96#ibcon#read 3, iclass 37, count 0 2006.232.07:34:39.96#ibcon#about to read 4, iclass 37, count 0 2006.232.07:34:39.96#ibcon#read 4, iclass 37, count 0 2006.232.07:34:39.96#ibcon#about to read 5, iclass 37, count 0 2006.232.07:34:39.96#ibcon#read 5, iclass 37, count 0 2006.232.07:34:39.96#ibcon#about to read 6, iclass 37, count 0 2006.232.07:34:39.96#ibcon#read 6, iclass 37, count 0 2006.232.07:34:39.96#ibcon#end of sib2, iclass 37, count 0 2006.232.07:34:39.96#ibcon#*after write, iclass 37, count 0 2006.232.07:34:39.96#ibcon#*before return 0, iclass 37, count 0 2006.232.07:34:39.96#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.232.07:34:39.96#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.232.07:34:39.96#ibcon#about to clear, iclass 37 cls_cnt 0 2006.232.07:34:39.96#ibcon#cleared, iclass 37 cls_cnt 0 2006.232.07:34:39.96$vc4f8/va=7,6 2006.232.07:34:39.96#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.232.07:34:39.96#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.232.07:34:39.96#ibcon#ireg 11 cls_cnt 2 2006.232.07:34:39.96#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.232.07:34:40.00#abcon#<5=/05 2.7 4.6 29.50 861007.3\r\n> 2006.232.07:34:40.02#abcon#{5=INTERFACE CLEAR} 2006.232.07:34:40.02#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.232.07:34:40.02#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.232.07:34:40.02#ibcon#enter wrdev, iclass 40, count 2 2006.232.07:34:40.02#ibcon#first serial, iclass 40, count 2 2006.232.07:34:40.02#ibcon#enter sib2, iclass 40, count 2 2006.232.07:34:40.02#ibcon#flushed, iclass 40, count 2 2006.232.07:34:40.02#ibcon#about to write, iclass 40, count 2 2006.232.07:34:40.02#ibcon#wrote, iclass 40, count 2 2006.232.07:34:40.02#ibcon#about to read 3, iclass 40, count 2 2006.232.07:34:40.04#ibcon#read 3, iclass 40, count 2 2006.232.07:34:40.04#ibcon#about to read 4, iclass 40, count 2 2006.232.07:34:40.04#ibcon#read 4, iclass 40, count 2 2006.232.07:34:40.04#ibcon#about to read 5, iclass 40, count 2 2006.232.07:34:40.04#ibcon#read 5, iclass 40, count 2 2006.232.07:34:40.04#ibcon#about to read 6, iclass 40, count 2 2006.232.07:34:40.04#ibcon#read 6, iclass 40, count 2 2006.232.07:34:40.04#ibcon#end of sib2, iclass 40, count 2 2006.232.07:34:40.04#ibcon#*mode == 0, iclass 40, count 2 2006.232.07:34:40.04#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.232.07:34:40.04#ibcon#[25=AT07-06\r\n] 2006.232.07:34:40.04#ibcon#*before write, iclass 40, count 2 2006.232.07:34:40.04#ibcon#enter sib2, iclass 40, count 2 2006.232.07:34:40.04#ibcon#flushed, iclass 40, count 2 2006.232.07:34:40.04#ibcon#about to write, iclass 40, count 2 2006.232.07:34:40.04#ibcon#wrote, iclass 40, count 2 2006.232.07:34:40.04#ibcon#about to read 3, iclass 40, count 2 2006.232.07:34:40.07#ibcon#read 3, iclass 40, count 2 2006.232.07:34:40.07#ibcon#about to read 4, iclass 40, count 2 2006.232.07:34:40.07#ibcon#read 4, iclass 40, count 2 2006.232.07:34:40.07#ibcon#about to read 5, iclass 40, count 2 2006.232.07:34:40.07#ibcon#read 5, iclass 40, count 2 2006.232.07:34:40.07#ibcon#about to read 6, iclass 40, count 2 2006.232.07:34:40.07#ibcon#read 6, iclass 40, count 2 2006.232.07:34:40.07#ibcon#end of sib2, iclass 40, count 2 2006.232.07:34:40.07#ibcon#*after write, iclass 40, count 2 2006.232.07:34:40.07#ibcon#*before return 0, iclass 40, count 2 2006.232.07:34:40.07#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.232.07:34:40.07#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.232.07:34:40.07#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.232.07:34:40.07#ibcon#ireg 7 cls_cnt 0 2006.232.07:34:40.07#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.232.07:34:40.08#abcon#[5=S1D000X0/0*\r\n] 2006.232.07:34:40.19#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.232.07:34:40.19#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.232.07:34:40.19#ibcon#enter wrdev, iclass 40, count 0 2006.232.07:34:40.19#ibcon#first serial, iclass 40, count 0 2006.232.07:34:40.19#ibcon#enter sib2, iclass 40, count 0 2006.232.07:34:40.19#ibcon#flushed, iclass 40, count 0 2006.232.07:34:40.19#ibcon#about to write, iclass 40, count 0 2006.232.07:34:40.19#ibcon#wrote, iclass 40, count 0 2006.232.07:34:40.19#ibcon#about to read 3, iclass 40, count 0 2006.232.07:34:40.21#ibcon#read 3, iclass 40, count 0 2006.232.07:34:40.21#ibcon#about to read 4, iclass 40, count 0 2006.232.07:34:40.21#ibcon#read 4, iclass 40, count 0 2006.232.07:34:40.21#ibcon#about to read 5, iclass 40, count 0 2006.232.07:34:40.21#ibcon#read 5, iclass 40, count 0 2006.232.07:34:40.21#ibcon#about to read 6, iclass 40, count 0 2006.232.07:34:40.21#ibcon#read 6, iclass 40, count 0 2006.232.07:34:40.21#ibcon#end of sib2, iclass 40, count 0 2006.232.07:34:40.21#ibcon#*mode == 0, iclass 40, count 0 2006.232.07:34:40.21#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.232.07:34:40.21#ibcon#[25=USB\r\n] 2006.232.07:34:40.21#ibcon#*before write, iclass 40, count 0 2006.232.07:34:40.21#ibcon#enter sib2, iclass 40, count 0 2006.232.07:34:40.21#ibcon#flushed, iclass 40, count 0 2006.232.07:34:40.21#ibcon#about to write, iclass 40, count 0 2006.232.07:34:40.21#ibcon#wrote, iclass 40, count 0 2006.232.07:34:40.21#ibcon#about to read 3, iclass 40, count 0 2006.232.07:34:40.24#ibcon#read 3, iclass 40, count 0 2006.232.07:34:40.24#ibcon#about to read 4, iclass 40, count 0 2006.232.07:34:40.24#ibcon#read 4, iclass 40, count 0 2006.232.07:34:40.24#ibcon#about to read 5, iclass 40, count 0 2006.232.07:34:40.24#ibcon#read 5, iclass 40, count 0 2006.232.07:34:40.24#ibcon#about to read 6, iclass 40, count 0 2006.232.07:34:40.24#ibcon#read 6, iclass 40, count 0 2006.232.07:34:40.24#ibcon#end of sib2, iclass 40, count 0 2006.232.07:34:40.24#ibcon#*after write, iclass 40, count 0 2006.232.07:34:40.24#ibcon#*before return 0, iclass 40, count 0 2006.232.07:34:40.24#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.232.07:34:40.24#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.232.07:34:40.24#ibcon#about to clear, iclass 40 cls_cnt 0 2006.232.07:34:40.24#ibcon#cleared, iclass 40 cls_cnt 0 2006.232.07:34:40.24$vc4f8/valo=8,852.99 2006.232.07:34:40.24#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.232.07:34:40.24#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.232.07:34:40.24#ibcon#ireg 17 cls_cnt 0 2006.232.07:34:40.24#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.232.07:34:40.24#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.232.07:34:40.24#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.232.07:34:40.24#ibcon#enter wrdev, iclass 7, count 0 2006.232.07:34:40.24#ibcon#first serial, iclass 7, count 0 2006.232.07:34:40.24#ibcon#enter sib2, iclass 7, count 0 2006.232.07:34:40.24#ibcon#flushed, iclass 7, count 0 2006.232.07:34:40.24#ibcon#about to write, iclass 7, count 0 2006.232.07:34:40.24#ibcon#wrote, iclass 7, count 0 2006.232.07:34:40.24#ibcon#about to read 3, iclass 7, count 0 2006.232.07:34:40.26#ibcon#read 3, iclass 7, count 0 2006.232.07:34:40.26#ibcon#about to read 4, iclass 7, count 0 2006.232.07:34:40.26#ibcon#read 4, iclass 7, count 0 2006.232.07:34:40.26#ibcon#about to read 5, iclass 7, count 0 2006.232.07:34:40.26#ibcon#read 5, iclass 7, count 0 2006.232.07:34:40.26#ibcon#about to read 6, iclass 7, count 0 2006.232.07:34:40.26#ibcon#read 6, iclass 7, count 0 2006.232.07:34:40.26#ibcon#end of sib2, iclass 7, count 0 2006.232.07:34:40.26#ibcon#*mode == 0, iclass 7, count 0 2006.232.07:34:40.26#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.232.07:34:40.26#ibcon#[26=FRQ=08,852.99\r\n] 2006.232.07:34:40.26#ibcon#*before write, iclass 7, count 0 2006.232.07:34:40.26#ibcon#enter sib2, iclass 7, count 0 2006.232.07:34:40.26#ibcon#flushed, iclass 7, count 0 2006.232.07:34:40.26#ibcon#about to write, iclass 7, count 0 2006.232.07:34:40.26#ibcon#wrote, iclass 7, count 0 2006.232.07:34:40.26#ibcon#about to read 3, iclass 7, count 0 2006.232.07:34:40.30#ibcon#read 3, iclass 7, count 0 2006.232.07:34:40.30#ibcon#about to read 4, iclass 7, count 0 2006.232.07:34:40.30#ibcon#read 4, iclass 7, count 0 2006.232.07:34:40.30#ibcon#about to read 5, iclass 7, count 0 2006.232.07:34:40.30#ibcon#read 5, iclass 7, count 0 2006.232.07:34:40.30#ibcon#about to read 6, iclass 7, count 0 2006.232.07:34:40.30#ibcon#read 6, iclass 7, count 0 2006.232.07:34:40.30#ibcon#end of sib2, iclass 7, count 0 2006.232.07:34:40.30#ibcon#*after write, iclass 7, count 0 2006.232.07:34:40.30#ibcon#*before return 0, iclass 7, count 0 2006.232.07:34:40.30#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.232.07:34:40.30#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.232.07:34:40.30#ibcon#about to clear, iclass 7 cls_cnt 0 2006.232.07:34:40.30#ibcon#cleared, iclass 7 cls_cnt 0 2006.232.07:34:40.30$vc4f8/va=8,6 2006.232.07:34:40.30#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.232.07:34:40.30#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.232.07:34:40.30#ibcon#ireg 11 cls_cnt 2 2006.232.07:34:40.30#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.232.07:34:40.36#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.232.07:34:40.36#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.232.07:34:40.36#ibcon#enter wrdev, iclass 11, count 2 2006.232.07:34:40.36#ibcon#first serial, iclass 11, count 2 2006.232.07:34:40.36#ibcon#enter sib2, iclass 11, count 2 2006.232.07:34:40.36#ibcon#flushed, iclass 11, count 2 2006.232.07:34:40.36#ibcon#about to write, iclass 11, count 2 2006.232.07:34:40.36#ibcon#wrote, iclass 11, count 2 2006.232.07:34:40.36#ibcon#about to read 3, iclass 11, count 2 2006.232.07:34:40.38#ibcon#read 3, iclass 11, count 2 2006.232.07:34:40.38#ibcon#about to read 4, iclass 11, count 2 2006.232.07:34:40.38#ibcon#read 4, iclass 11, count 2 2006.232.07:34:40.38#ibcon#about to read 5, iclass 11, count 2 2006.232.07:34:40.38#ibcon#read 5, iclass 11, count 2 2006.232.07:34:40.38#ibcon#about to read 6, iclass 11, count 2 2006.232.07:34:40.38#ibcon#read 6, iclass 11, count 2 2006.232.07:34:40.38#ibcon#end of sib2, iclass 11, count 2 2006.232.07:34:40.38#ibcon#*mode == 0, iclass 11, count 2 2006.232.07:34:40.38#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.232.07:34:40.38#ibcon#[25=AT08-06\r\n] 2006.232.07:34:40.38#ibcon#*before write, iclass 11, count 2 2006.232.07:34:40.38#ibcon#enter sib2, iclass 11, count 2 2006.232.07:34:40.38#ibcon#flushed, iclass 11, count 2 2006.232.07:34:40.38#ibcon#about to write, iclass 11, count 2 2006.232.07:34:40.38#ibcon#wrote, iclass 11, count 2 2006.232.07:34:40.38#ibcon#about to read 3, iclass 11, count 2 2006.232.07:34:40.41#ibcon#read 3, iclass 11, count 2 2006.232.07:34:40.41#ibcon#about to read 4, iclass 11, count 2 2006.232.07:34:40.41#ibcon#read 4, iclass 11, count 2 2006.232.07:34:40.41#ibcon#about to read 5, iclass 11, count 2 2006.232.07:34:40.41#ibcon#read 5, iclass 11, count 2 2006.232.07:34:40.41#ibcon#about to read 6, iclass 11, count 2 2006.232.07:34:40.41#ibcon#read 6, iclass 11, count 2 2006.232.07:34:40.41#ibcon#end of sib2, iclass 11, count 2 2006.232.07:34:40.41#ibcon#*after write, iclass 11, count 2 2006.232.07:34:40.41#ibcon#*before return 0, iclass 11, count 2 2006.232.07:34:40.41#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.232.07:34:40.41#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.232.07:34:40.41#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.232.07:34:40.41#ibcon#ireg 7 cls_cnt 0 2006.232.07:34:40.41#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.232.07:34:40.53#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.232.07:34:40.53#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.232.07:34:40.53#ibcon#enter wrdev, iclass 11, count 0 2006.232.07:34:40.53#ibcon#first serial, iclass 11, count 0 2006.232.07:34:40.53#ibcon#enter sib2, iclass 11, count 0 2006.232.07:34:40.53#ibcon#flushed, iclass 11, count 0 2006.232.07:34:40.53#ibcon#about to write, iclass 11, count 0 2006.232.07:34:40.53#ibcon#wrote, iclass 11, count 0 2006.232.07:34:40.53#ibcon#about to read 3, iclass 11, count 0 2006.232.07:34:40.55#ibcon#read 3, iclass 11, count 0 2006.232.07:34:40.55#ibcon#about to read 4, iclass 11, count 0 2006.232.07:34:40.55#ibcon#read 4, iclass 11, count 0 2006.232.07:34:40.55#ibcon#about to read 5, iclass 11, count 0 2006.232.07:34:40.55#ibcon#read 5, iclass 11, count 0 2006.232.07:34:40.55#ibcon#about to read 6, iclass 11, count 0 2006.232.07:34:40.55#ibcon#read 6, iclass 11, count 0 2006.232.07:34:40.55#ibcon#end of sib2, iclass 11, count 0 2006.232.07:34:40.55#ibcon#*mode == 0, iclass 11, count 0 2006.232.07:34:40.55#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.232.07:34:40.55#ibcon#[25=USB\r\n] 2006.232.07:34:40.55#ibcon#*before write, iclass 11, count 0 2006.232.07:34:40.55#ibcon#enter sib2, iclass 11, count 0 2006.232.07:34:40.55#ibcon#flushed, iclass 11, count 0 2006.232.07:34:40.55#ibcon#about to write, iclass 11, count 0 2006.232.07:34:40.55#ibcon#wrote, iclass 11, count 0 2006.232.07:34:40.55#ibcon#about to read 3, iclass 11, count 0 2006.232.07:34:40.58#ibcon#read 3, iclass 11, count 0 2006.232.07:34:40.58#ibcon#about to read 4, iclass 11, count 0 2006.232.07:34:40.58#ibcon#read 4, iclass 11, count 0 2006.232.07:34:40.58#ibcon#about to read 5, iclass 11, count 0 2006.232.07:34:40.58#ibcon#read 5, iclass 11, count 0 2006.232.07:34:40.58#ibcon#about to read 6, iclass 11, count 0 2006.232.07:34:40.58#ibcon#read 6, iclass 11, count 0 2006.232.07:34:40.58#ibcon#end of sib2, iclass 11, count 0 2006.232.07:34:40.58#ibcon#*after write, iclass 11, count 0 2006.232.07:34:40.58#ibcon#*before return 0, iclass 11, count 0 2006.232.07:34:40.58#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.232.07:34:40.58#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.232.07:34:40.58#ibcon#about to clear, iclass 11 cls_cnt 0 2006.232.07:34:40.58#ibcon#cleared, iclass 11 cls_cnt 0 2006.232.07:34:40.58$vc4f8/vblo=1,632.99 2006.232.07:34:40.58#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.232.07:34:40.58#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.232.07:34:40.58#ibcon#ireg 17 cls_cnt 0 2006.232.07:34:40.58#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.232.07:34:40.58#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.232.07:34:40.58#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.232.07:34:40.58#ibcon#enter wrdev, iclass 13, count 0 2006.232.07:34:40.58#ibcon#first serial, iclass 13, count 0 2006.232.07:34:40.58#ibcon#enter sib2, iclass 13, count 0 2006.232.07:34:40.58#ibcon#flushed, iclass 13, count 0 2006.232.07:34:40.58#ibcon#about to write, iclass 13, count 0 2006.232.07:34:40.58#ibcon#wrote, iclass 13, count 0 2006.232.07:34:40.58#ibcon#about to read 3, iclass 13, count 0 2006.232.07:34:40.60#ibcon#read 3, iclass 13, count 0 2006.232.07:34:40.60#ibcon#about to read 4, iclass 13, count 0 2006.232.07:34:40.60#ibcon#read 4, iclass 13, count 0 2006.232.07:34:40.60#ibcon#about to read 5, iclass 13, count 0 2006.232.07:34:40.60#ibcon#read 5, iclass 13, count 0 2006.232.07:34:40.60#ibcon#about to read 6, iclass 13, count 0 2006.232.07:34:40.60#ibcon#read 6, iclass 13, count 0 2006.232.07:34:40.60#ibcon#end of sib2, iclass 13, count 0 2006.232.07:34:40.60#ibcon#*mode == 0, iclass 13, count 0 2006.232.07:34:40.60#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.232.07:34:40.60#ibcon#[28=FRQ=01,632.99\r\n] 2006.232.07:34:40.60#ibcon#*before write, iclass 13, count 0 2006.232.07:34:40.60#ibcon#enter sib2, iclass 13, count 0 2006.232.07:34:40.60#ibcon#flushed, iclass 13, count 0 2006.232.07:34:40.60#ibcon#about to write, iclass 13, count 0 2006.232.07:34:40.60#ibcon#wrote, iclass 13, count 0 2006.232.07:34:40.60#ibcon#about to read 3, iclass 13, count 0 2006.232.07:34:40.64#ibcon#read 3, iclass 13, count 0 2006.232.07:34:40.64#ibcon#about to read 4, iclass 13, count 0 2006.232.07:34:40.64#ibcon#read 4, iclass 13, count 0 2006.232.07:34:40.64#ibcon#about to read 5, iclass 13, count 0 2006.232.07:34:40.64#ibcon#read 5, iclass 13, count 0 2006.232.07:34:40.64#ibcon#about to read 6, iclass 13, count 0 2006.232.07:34:40.64#ibcon#read 6, iclass 13, count 0 2006.232.07:34:40.64#ibcon#end of sib2, iclass 13, count 0 2006.232.07:34:40.64#ibcon#*after write, iclass 13, count 0 2006.232.07:34:40.64#ibcon#*before return 0, iclass 13, count 0 2006.232.07:34:40.64#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.232.07:34:40.64#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.232.07:34:40.64#ibcon#about to clear, iclass 13 cls_cnt 0 2006.232.07:34:40.64#ibcon#cleared, iclass 13 cls_cnt 0 2006.232.07:34:40.64$vc4f8/vb=1,4 2006.232.07:34:40.64#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.232.07:34:40.64#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.232.07:34:40.64#ibcon#ireg 11 cls_cnt 2 2006.232.07:34:40.64#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.232.07:34:40.64#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.232.07:34:40.64#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.232.07:34:40.64#ibcon#enter wrdev, iclass 15, count 2 2006.232.07:34:40.64#ibcon#first serial, iclass 15, count 2 2006.232.07:34:40.64#ibcon#enter sib2, iclass 15, count 2 2006.232.07:34:40.64#ibcon#flushed, iclass 15, count 2 2006.232.07:34:40.64#ibcon#about to write, iclass 15, count 2 2006.232.07:34:40.64#ibcon#wrote, iclass 15, count 2 2006.232.07:34:40.64#ibcon#about to read 3, iclass 15, count 2 2006.232.07:34:40.66#ibcon#read 3, iclass 15, count 2 2006.232.07:34:40.66#ibcon#about to read 4, iclass 15, count 2 2006.232.07:34:40.66#ibcon#read 4, iclass 15, count 2 2006.232.07:34:40.66#ibcon#about to read 5, iclass 15, count 2 2006.232.07:34:40.66#ibcon#read 5, iclass 15, count 2 2006.232.07:34:40.66#ibcon#about to read 6, iclass 15, count 2 2006.232.07:34:40.66#ibcon#read 6, iclass 15, count 2 2006.232.07:34:40.66#ibcon#end of sib2, iclass 15, count 2 2006.232.07:34:40.66#ibcon#*mode == 0, iclass 15, count 2 2006.232.07:34:40.66#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.232.07:34:40.66#ibcon#[27=AT01-04\r\n] 2006.232.07:34:40.66#ibcon#*before write, iclass 15, count 2 2006.232.07:34:40.66#ibcon#enter sib2, iclass 15, count 2 2006.232.07:34:40.66#ibcon#flushed, iclass 15, count 2 2006.232.07:34:40.66#ibcon#about to write, iclass 15, count 2 2006.232.07:34:40.66#ibcon#wrote, iclass 15, count 2 2006.232.07:34:40.66#ibcon#about to read 3, iclass 15, count 2 2006.232.07:34:40.69#ibcon#read 3, iclass 15, count 2 2006.232.07:34:40.69#ibcon#about to read 4, iclass 15, count 2 2006.232.07:34:40.69#ibcon#read 4, iclass 15, count 2 2006.232.07:34:40.69#ibcon#about to read 5, iclass 15, count 2 2006.232.07:34:40.69#ibcon#read 5, iclass 15, count 2 2006.232.07:34:40.69#ibcon#about to read 6, iclass 15, count 2 2006.232.07:34:40.69#ibcon#read 6, iclass 15, count 2 2006.232.07:34:40.69#ibcon#end of sib2, iclass 15, count 2 2006.232.07:34:40.69#ibcon#*after write, iclass 15, count 2 2006.232.07:34:40.69#ibcon#*before return 0, iclass 15, count 2 2006.232.07:34:40.69#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.232.07:34:40.69#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.232.07:34:40.69#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.232.07:34:40.69#ibcon#ireg 7 cls_cnt 0 2006.232.07:34:40.69#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.232.07:34:40.81#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.232.07:34:40.81#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.232.07:34:40.81#ibcon#enter wrdev, iclass 15, count 0 2006.232.07:34:40.81#ibcon#first serial, iclass 15, count 0 2006.232.07:34:40.81#ibcon#enter sib2, iclass 15, count 0 2006.232.07:34:40.81#ibcon#flushed, iclass 15, count 0 2006.232.07:34:40.81#ibcon#about to write, iclass 15, count 0 2006.232.07:34:40.81#ibcon#wrote, iclass 15, count 0 2006.232.07:34:40.81#ibcon#about to read 3, iclass 15, count 0 2006.232.07:34:40.83#ibcon#read 3, iclass 15, count 0 2006.232.07:34:40.83#ibcon#about to read 4, iclass 15, count 0 2006.232.07:34:40.83#ibcon#read 4, iclass 15, count 0 2006.232.07:34:40.83#ibcon#about to read 5, iclass 15, count 0 2006.232.07:34:40.83#ibcon#read 5, iclass 15, count 0 2006.232.07:34:40.83#ibcon#about to read 6, iclass 15, count 0 2006.232.07:34:40.83#ibcon#read 6, iclass 15, count 0 2006.232.07:34:40.83#ibcon#end of sib2, iclass 15, count 0 2006.232.07:34:40.83#ibcon#*mode == 0, iclass 15, count 0 2006.232.07:34:40.83#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.232.07:34:40.83#ibcon#[27=USB\r\n] 2006.232.07:34:40.83#ibcon#*before write, iclass 15, count 0 2006.232.07:34:40.83#ibcon#enter sib2, iclass 15, count 0 2006.232.07:34:40.83#ibcon#flushed, iclass 15, count 0 2006.232.07:34:40.83#ibcon#about to write, iclass 15, count 0 2006.232.07:34:40.83#ibcon#wrote, iclass 15, count 0 2006.232.07:34:40.83#ibcon#about to read 3, iclass 15, count 0 2006.232.07:34:40.86#ibcon#read 3, iclass 15, count 0 2006.232.07:34:40.86#ibcon#about to read 4, iclass 15, count 0 2006.232.07:34:40.86#ibcon#read 4, iclass 15, count 0 2006.232.07:34:40.86#ibcon#about to read 5, iclass 15, count 0 2006.232.07:34:40.86#ibcon#read 5, iclass 15, count 0 2006.232.07:34:40.86#ibcon#about to read 6, iclass 15, count 0 2006.232.07:34:40.86#ibcon#read 6, iclass 15, count 0 2006.232.07:34:40.86#ibcon#end of sib2, iclass 15, count 0 2006.232.07:34:40.86#ibcon#*after write, iclass 15, count 0 2006.232.07:34:40.86#ibcon#*before return 0, iclass 15, count 0 2006.232.07:34:40.86#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.232.07:34:40.86#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.232.07:34:40.86#ibcon#about to clear, iclass 15 cls_cnt 0 2006.232.07:34:40.86#ibcon#cleared, iclass 15 cls_cnt 0 2006.232.07:34:40.86$vc4f8/vblo=2,640.99 2006.232.07:34:40.86#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.232.07:34:40.86#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.232.07:34:40.86#ibcon#ireg 17 cls_cnt 0 2006.232.07:34:40.86#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.232.07:34:40.86#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.232.07:34:40.86#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.232.07:34:40.86#ibcon#enter wrdev, iclass 17, count 0 2006.232.07:34:40.86#ibcon#first serial, iclass 17, count 0 2006.232.07:34:40.86#ibcon#enter sib2, iclass 17, count 0 2006.232.07:34:40.86#ibcon#flushed, iclass 17, count 0 2006.232.07:34:40.86#ibcon#about to write, iclass 17, count 0 2006.232.07:34:40.86#ibcon#wrote, iclass 17, count 0 2006.232.07:34:40.86#ibcon#about to read 3, iclass 17, count 0 2006.232.07:34:40.88#ibcon#read 3, iclass 17, count 0 2006.232.07:34:40.88#ibcon#about to read 4, iclass 17, count 0 2006.232.07:34:40.88#ibcon#read 4, iclass 17, count 0 2006.232.07:34:40.88#ibcon#about to read 5, iclass 17, count 0 2006.232.07:34:40.88#ibcon#read 5, iclass 17, count 0 2006.232.07:34:40.88#ibcon#about to read 6, iclass 17, count 0 2006.232.07:34:40.88#ibcon#read 6, iclass 17, count 0 2006.232.07:34:40.88#ibcon#end of sib2, iclass 17, count 0 2006.232.07:34:40.88#ibcon#*mode == 0, iclass 17, count 0 2006.232.07:34:40.88#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.232.07:34:40.88#ibcon#[28=FRQ=02,640.99\r\n] 2006.232.07:34:40.88#ibcon#*before write, iclass 17, count 0 2006.232.07:34:40.88#ibcon#enter sib2, iclass 17, count 0 2006.232.07:34:40.88#ibcon#flushed, iclass 17, count 0 2006.232.07:34:40.88#ibcon#about to write, iclass 17, count 0 2006.232.07:34:40.88#ibcon#wrote, iclass 17, count 0 2006.232.07:34:40.88#ibcon#about to read 3, iclass 17, count 0 2006.232.07:34:40.92#ibcon#read 3, iclass 17, count 0 2006.232.07:34:40.92#ibcon#about to read 4, iclass 17, count 0 2006.232.07:34:40.92#ibcon#read 4, iclass 17, count 0 2006.232.07:34:40.92#ibcon#about to read 5, iclass 17, count 0 2006.232.07:34:40.92#ibcon#read 5, iclass 17, count 0 2006.232.07:34:40.92#ibcon#about to read 6, iclass 17, count 0 2006.232.07:34:40.92#ibcon#read 6, iclass 17, count 0 2006.232.07:34:40.92#ibcon#end of sib2, iclass 17, count 0 2006.232.07:34:40.92#ibcon#*after write, iclass 17, count 0 2006.232.07:34:40.92#ibcon#*before return 0, iclass 17, count 0 2006.232.07:34:40.92#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.232.07:34:40.92#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.232.07:34:40.92#ibcon#about to clear, iclass 17 cls_cnt 0 2006.232.07:34:40.92#ibcon#cleared, iclass 17 cls_cnt 0 2006.232.07:34:40.92$vc4f8/vb=2,4 2006.232.07:34:40.92#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.232.07:34:40.92#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.232.07:34:40.92#ibcon#ireg 11 cls_cnt 2 2006.232.07:34:40.92#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.232.07:34:40.98#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.232.07:34:40.98#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.232.07:34:40.98#ibcon#enter wrdev, iclass 19, count 2 2006.232.07:34:40.98#ibcon#first serial, iclass 19, count 2 2006.232.07:34:40.98#ibcon#enter sib2, iclass 19, count 2 2006.232.07:34:40.98#ibcon#flushed, iclass 19, count 2 2006.232.07:34:40.98#ibcon#about to write, iclass 19, count 2 2006.232.07:34:40.98#ibcon#wrote, iclass 19, count 2 2006.232.07:34:40.98#ibcon#about to read 3, iclass 19, count 2 2006.232.07:34:41.00#ibcon#read 3, iclass 19, count 2 2006.232.07:34:41.00#ibcon#about to read 4, iclass 19, count 2 2006.232.07:34:41.00#ibcon#read 4, iclass 19, count 2 2006.232.07:34:41.00#ibcon#about to read 5, iclass 19, count 2 2006.232.07:34:41.00#ibcon#read 5, iclass 19, count 2 2006.232.07:34:41.00#ibcon#about to read 6, iclass 19, count 2 2006.232.07:34:41.00#ibcon#read 6, iclass 19, count 2 2006.232.07:34:41.00#ibcon#end of sib2, iclass 19, count 2 2006.232.07:34:41.00#ibcon#*mode == 0, iclass 19, count 2 2006.232.07:34:41.00#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.232.07:34:41.00#ibcon#[27=AT02-04\r\n] 2006.232.07:34:41.00#ibcon#*before write, iclass 19, count 2 2006.232.07:34:41.00#ibcon#enter sib2, iclass 19, count 2 2006.232.07:34:41.00#ibcon#flushed, iclass 19, count 2 2006.232.07:34:41.00#ibcon#about to write, iclass 19, count 2 2006.232.07:34:41.00#ibcon#wrote, iclass 19, count 2 2006.232.07:34:41.00#ibcon#about to read 3, iclass 19, count 2 2006.232.07:34:41.03#ibcon#read 3, iclass 19, count 2 2006.232.07:34:41.03#ibcon#about to read 4, iclass 19, count 2 2006.232.07:34:41.03#ibcon#read 4, iclass 19, count 2 2006.232.07:34:41.03#ibcon#about to read 5, iclass 19, count 2 2006.232.07:34:41.03#ibcon#read 5, iclass 19, count 2 2006.232.07:34:41.03#ibcon#about to read 6, iclass 19, count 2 2006.232.07:34:41.03#ibcon#read 6, iclass 19, count 2 2006.232.07:34:41.03#ibcon#end of sib2, iclass 19, count 2 2006.232.07:34:41.03#ibcon#*after write, iclass 19, count 2 2006.232.07:34:41.03#ibcon#*before return 0, iclass 19, count 2 2006.232.07:34:41.03#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.232.07:34:41.03#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.232.07:34:41.03#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.232.07:34:41.03#ibcon#ireg 7 cls_cnt 0 2006.232.07:34:41.03#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.232.07:34:41.15#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.232.07:34:41.15#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.232.07:34:41.15#ibcon#enter wrdev, iclass 19, count 0 2006.232.07:34:41.15#ibcon#first serial, iclass 19, count 0 2006.232.07:34:41.15#ibcon#enter sib2, iclass 19, count 0 2006.232.07:34:41.15#ibcon#flushed, iclass 19, count 0 2006.232.07:34:41.15#ibcon#about to write, iclass 19, count 0 2006.232.07:34:41.15#ibcon#wrote, iclass 19, count 0 2006.232.07:34:41.15#ibcon#about to read 3, iclass 19, count 0 2006.232.07:34:41.17#ibcon#read 3, iclass 19, count 0 2006.232.07:34:41.17#ibcon#about to read 4, iclass 19, count 0 2006.232.07:34:41.17#ibcon#read 4, iclass 19, count 0 2006.232.07:34:41.17#ibcon#about to read 5, iclass 19, count 0 2006.232.07:34:41.17#ibcon#read 5, iclass 19, count 0 2006.232.07:34:41.17#ibcon#about to read 6, iclass 19, count 0 2006.232.07:34:41.17#ibcon#read 6, iclass 19, count 0 2006.232.07:34:41.17#ibcon#end of sib2, iclass 19, count 0 2006.232.07:34:41.17#ibcon#*mode == 0, iclass 19, count 0 2006.232.07:34:41.17#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.232.07:34:41.17#ibcon#[27=USB\r\n] 2006.232.07:34:41.17#ibcon#*before write, iclass 19, count 0 2006.232.07:34:41.17#ibcon#enter sib2, iclass 19, count 0 2006.232.07:34:41.17#ibcon#flushed, iclass 19, count 0 2006.232.07:34:41.17#ibcon#about to write, iclass 19, count 0 2006.232.07:34:41.17#ibcon#wrote, iclass 19, count 0 2006.232.07:34:41.17#ibcon#about to read 3, iclass 19, count 0 2006.232.07:34:41.20#ibcon#read 3, iclass 19, count 0 2006.232.07:34:41.20#ibcon#about to read 4, iclass 19, count 0 2006.232.07:34:41.20#ibcon#read 4, iclass 19, count 0 2006.232.07:34:41.20#ibcon#about to read 5, iclass 19, count 0 2006.232.07:34:41.20#ibcon#read 5, iclass 19, count 0 2006.232.07:34:41.20#ibcon#about to read 6, iclass 19, count 0 2006.232.07:34:41.20#ibcon#read 6, iclass 19, count 0 2006.232.07:34:41.20#ibcon#end of sib2, iclass 19, count 0 2006.232.07:34:41.20#ibcon#*after write, iclass 19, count 0 2006.232.07:34:41.20#ibcon#*before return 0, iclass 19, count 0 2006.232.07:34:41.20#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.232.07:34:41.20#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.232.07:34:41.20#ibcon#about to clear, iclass 19 cls_cnt 0 2006.232.07:34:41.20#ibcon#cleared, iclass 19 cls_cnt 0 2006.232.07:34:41.20$vc4f8/vblo=3,656.99 2006.232.07:34:41.20#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.232.07:34:41.20#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.232.07:34:41.20#ibcon#ireg 17 cls_cnt 0 2006.232.07:34:41.20#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.232.07:34:41.20#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.232.07:34:41.20#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.232.07:34:41.20#ibcon#enter wrdev, iclass 21, count 0 2006.232.07:34:41.20#ibcon#first serial, iclass 21, count 0 2006.232.07:34:41.20#ibcon#enter sib2, iclass 21, count 0 2006.232.07:34:41.20#ibcon#flushed, iclass 21, count 0 2006.232.07:34:41.20#ibcon#about to write, iclass 21, count 0 2006.232.07:34:41.20#ibcon#wrote, iclass 21, count 0 2006.232.07:34:41.20#ibcon#about to read 3, iclass 21, count 0 2006.232.07:34:41.22#ibcon#read 3, iclass 21, count 0 2006.232.07:34:41.22#ibcon#about to read 4, iclass 21, count 0 2006.232.07:34:41.22#ibcon#read 4, iclass 21, count 0 2006.232.07:34:41.22#ibcon#about to read 5, iclass 21, count 0 2006.232.07:34:41.22#ibcon#read 5, iclass 21, count 0 2006.232.07:34:41.22#ibcon#about to read 6, iclass 21, count 0 2006.232.07:34:41.22#ibcon#read 6, iclass 21, count 0 2006.232.07:34:41.22#ibcon#end of sib2, iclass 21, count 0 2006.232.07:34:41.22#ibcon#*mode == 0, iclass 21, count 0 2006.232.07:34:41.22#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.232.07:34:41.22#ibcon#[28=FRQ=03,656.99\r\n] 2006.232.07:34:41.22#ibcon#*before write, iclass 21, count 0 2006.232.07:34:41.22#ibcon#enter sib2, iclass 21, count 0 2006.232.07:34:41.22#ibcon#flushed, iclass 21, count 0 2006.232.07:34:41.22#ibcon#about to write, iclass 21, count 0 2006.232.07:34:41.22#ibcon#wrote, iclass 21, count 0 2006.232.07:34:41.22#ibcon#about to read 3, iclass 21, count 0 2006.232.07:34:41.26#ibcon#read 3, iclass 21, count 0 2006.232.07:34:41.26#ibcon#about to read 4, iclass 21, count 0 2006.232.07:34:41.26#ibcon#read 4, iclass 21, count 0 2006.232.07:34:41.26#ibcon#about to read 5, iclass 21, count 0 2006.232.07:34:41.26#ibcon#read 5, iclass 21, count 0 2006.232.07:34:41.26#ibcon#about to read 6, iclass 21, count 0 2006.232.07:34:41.26#ibcon#read 6, iclass 21, count 0 2006.232.07:34:41.26#ibcon#end of sib2, iclass 21, count 0 2006.232.07:34:41.26#ibcon#*after write, iclass 21, count 0 2006.232.07:34:41.26#ibcon#*before return 0, iclass 21, count 0 2006.232.07:34:41.26#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.232.07:34:41.26#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.232.07:34:41.26#ibcon#about to clear, iclass 21 cls_cnt 0 2006.232.07:34:41.26#ibcon#cleared, iclass 21 cls_cnt 0 2006.232.07:34:41.26$vc4f8/vb=3,4 2006.232.07:34:41.26#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.232.07:34:41.26#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.232.07:34:41.26#ibcon#ireg 11 cls_cnt 2 2006.232.07:34:41.26#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.232.07:34:41.32#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.232.07:34:41.32#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.232.07:34:41.32#ibcon#enter wrdev, iclass 23, count 2 2006.232.07:34:41.32#ibcon#first serial, iclass 23, count 2 2006.232.07:34:41.32#ibcon#enter sib2, iclass 23, count 2 2006.232.07:34:41.32#ibcon#flushed, iclass 23, count 2 2006.232.07:34:41.32#ibcon#about to write, iclass 23, count 2 2006.232.07:34:41.32#ibcon#wrote, iclass 23, count 2 2006.232.07:34:41.32#ibcon#about to read 3, iclass 23, count 2 2006.232.07:34:41.34#ibcon#read 3, iclass 23, count 2 2006.232.07:34:41.34#ibcon#about to read 4, iclass 23, count 2 2006.232.07:34:41.34#ibcon#read 4, iclass 23, count 2 2006.232.07:34:41.34#ibcon#about to read 5, iclass 23, count 2 2006.232.07:34:41.34#ibcon#read 5, iclass 23, count 2 2006.232.07:34:41.34#ibcon#about to read 6, iclass 23, count 2 2006.232.07:34:41.34#ibcon#read 6, iclass 23, count 2 2006.232.07:34:41.34#ibcon#end of sib2, iclass 23, count 2 2006.232.07:34:41.34#ibcon#*mode == 0, iclass 23, count 2 2006.232.07:34:41.34#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.232.07:34:41.34#ibcon#[27=AT03-04\r\n] 2006.232.07:34:41.34#ibcon#*before write, iclass 23, count 2 2006.232.07:34:41.34#ibcon#enter sib2, iclass 23, count 2 2006.232.07:34:41.34#ibcon#flushed, iclass 23, count 2 2006.232.07:34:41.34#ibcon#about to write, iclass 23, count 2 2006.232.07:34:41.34#ibcon#wrote, iclass 23, count 2 2006.232.07:34:41.34#ibcon#about to read 3, iclass 23, count 2 2006.232.07:34:41.37#ibcon#read 3, iclass 23, count 2 2006.232.07:34:41.37#ibcon#about to read 4, iclass 23, count 2 2006.232.07:34:41.37#ibcon#read 4, iclass 23, count 2 2006.232.07:34:41.37#ibcon#about to read 5, iclass 23, count 2 2006.232.07:34:41.37#ibcon#read 5, iclass 23, count 2 2006.232.07:34:41.37#ibcon#about to read 6, iclass 23, count 2 2006.232.07:34:41.37#ibcon#read 6, iclass 23, count 2 2006.232.07:34:41.37#ibcon#end of sib2, iclass 23, count 2 2006.232.07:34:41.37#ibcon#*after write, iclass 23, count 2 2006.232.07:34:41.37#ibcon#*before return 0, iclass 23, count 2 2006.232.07:34:41.37#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.232.07:34:41.37#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.232.07:34:41.37#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.232.07:34:41.37#ibcon#ireg 7 cls_cnt 0 2006.232.07:34:41.37#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.232.07:34:41.49#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.232.07:34:41.49#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.232.07:34:41.49#ibcon#enter wrdev, iclass 23, count 0 2006.232.07:34:41.49#ibcon#first serial, iclass 23, count 0 2006.232.07:34:41.49#ibcon#enter sib2, iclass 23, count 0 2006.232.07:34:41.49#ibcon#flushed, iclass 23, count 0 2006.232.07:34:41.49#ibcon#about to write, iclass 23, count 0 2006.232.07:34:41.49#ibcon#wrote, iclass 23, count 0 2006.232.07:34:41.49#ibcon#about to read 3, iclass 23, count 0 2006.232.07:34:41.51#ibcon#read 3, iclass 23, count 0 2006.232.07:34:41.51#ibcon#about to read 4, iclass 23, count 0 2006.232.07:34:41.51#ibcon#read 4, iclass 23, count 0 2006.232.07:34:41.51#ibcon#about to read 5, iclass 23, count 0 2006.232.07:34:41.51#ibcon#read 5, iclass 23, count 0 2006.232.07:34:41.51#ibcon#about to read 6, iclass 23, count 0 2006.232.07:34:41.51#ibcon#read 6, iclass 23, count 0 2006.232.07:34:41.51#ibcon#end of sib2, iclass 23, count 0 2006.232.07:34:41.51#ibcon#*mode == 0, iclass 23, count 0 2006.232.07:34:41.51#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.232.07:34:41.51#ibcon#[27=USB\r\n] 2006.232.07:34:41.51#ibcon#*before write, iclass 23, count 0 2006.232.07:34:41.51#ibcon#enter sib2, iclass 23, count 0 2006.232.07:34:41.51#ibcon#flushed, iclass 23, count 0 2006.232.07:34:41.51#ibcon#about to write, iclass 23, count 0 2006.232.07:34:41.51#ibcon#wrote, iclass 23, count 0 2006.232.07:34:41.51#ibcon#about to read 3, iclass 23, count 0 2006.232.07:34:41.54#ibcon#read 3, iclass 23, count 0 2006.232.07:34:41.54#ibcon#about to read 4, iclass 23, count 0 2006.232.07:34:41.54#ibcon#read 4, iclass 23, count 0 2006.232.07:34:41.54#ibcon#about to read 5, iclass 23, count 0 2006.232.07:34:41.54#ibcon#read 5, iclass 23, count 0 2006.232.07:34:41.54#ibcon#about to read 6, iclass 23, count 0 2006.232.07:34:41.54#ibcon#read 6, iclass 23, count 0 2006.232.07:34:41.54#ibcon#end of sib2, iclass 23, count 0 2006.232.07:34:41.54#ibcon#*after write, iclass 23, count 0 2006.232.07:34:41.54#ibcon#*before return 0, iclass 23, count 0 2006.232.07:34:41.54#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.232.07:34:41.54#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.232.07:34:41.54#ibcon#about to clear, iclass 23 cls_cnt 0 2006.232.07:34:41.54#ibcon#cleared, iclass 23 cls_cnt 0 2006.232.07:34:41.54$vc4f8/vblo=4,712.99 2006.232.07:34:41.54#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.232.07:34:41.54#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.232.07:34:41.54#ibcon#ireg 17 cls_cnt 0 2006.232.07:34:41.54#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.232.07:34:41.54#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.232.07:34:41.54#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.232.07:34:41.54#ibcon#enter wrdev, iclass 25, count 0 2006.232.07:34:41.54#ibcon#first serial, iclass 25, count 0 2006.232.07:34:41.54#ibcon#enter sib2, iclass 25, count 0 2006.232.07:34:41.54#ibcon#flushed, iclass 25, count 0 2006.232.07:34:41.54#ibcon#about to write, iclass 25, count 0 2006.232.07:34:41.54#ibcon#wrote, iclass 25, count 0 2006.232.07:34:41.54#ibcon#about to read 3, iclass 25, count 0 2006.232.07:34:41.56#ibcon#read 3, iclass 25, count 0 2006.232.07:34:41.56#ibcon#about to read 4, iclass 25, count 0 2006.232.07:34:41.56#ibcon#read 4, iclass 25, count 0 2006.232.07:34:41.56#ibcon#about to read 5, iclass 25, count 0 2006.232.07:34:41.56#ibcon#read 5, iclass 25, count 0 2006.232.07:34:41.56#ibcon#about to read 6, iclass 25, count 0 2006.232.07:34:41.56#ibcon#read 6, iclass 25, count 0 2006.232.07:34:41.56#ibcon#end of sib2, iclass 25, count 0 2006.232.07:34:41.56#ibcon#*mode == 0, iclass 25, count 0 2006.232.07:34:41.56#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.232.07:34:41.56#ibcon#[28=FRQ=04,712.99\r\n] 2006.232.07:34:41.56#ibcon#*before write, iclass 25, count 0 2006.232.07:34:41.56#ibcon#enter sib2, iclass 25, count 0 2006.232.07:34:41.56#ibcon#flushed, iclass 25, count 0 2006.232.07:34:41.56#ibcon#about to write, iclass 25, count 0 2006.232.07:34:41.56#ibcon#wrote, iclass 25, count 0 2006.232.07:34:41.56#ibcon#about to read 3, iclass 25, count 0 2006.232.07:34:41.60#ibcon#read 3, iclass 25, count 0 2006.232.07:34:41.60#ibcon#about to read 4, iclass 25, count 0 2006.232.07:34:41.60#ibcon#read 4, iclass 25, count 0 2006.232.07:34:41.60#ibcon#about to read 5, iclass 25, count 0 2006.232.07:34:41.60#ibcon#read 5, iclass 25, count 0 2006.232.07:34:41.60#ibcon#about to read 6, iclass 25, count 0 2006.232.07:34:41.60#ibcon#read 6, iclass 25, count 0 2006.232.07:34:41.60#ibcon#end of sib2, iclass 25, count 0 2006.232.07:34:41.60#ibcon#*after write, iclass 25, count 0 2006.232.07:34:41.60#ibcon#*before return 0, iclass 25, count 0 2006.232.07:34:41.60#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.232.07:34:41.60#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.232.07:34:41.60#ibcon#about to clear, iclass 25 cls_cnt 0 2006.232.07:34:41.60#ibcon#cleared, iclass 25 cls_cnt 0 2006.232.07:34:41.60$vc4f8/vb=4,4 2006.232.07:34:41.60#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.232.07:34:41.60#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.232.07:34:41.60#ibcon#ireg 11 cls_cnt 2 2006.232.07:34:41.60#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.232.07:34:41.66#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.232.07:34:41.66#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.232.07:34:41.66#ibcon#enter wrdev, iclass 27, count 2 2006.232.07:34:41.66#ibcon#first serial, iclass 27, count 2 2006.232.07:34:41.66#ibcon#enter sib2, iclass 27, count 2 2006.232.07:34:41.66#ibcon#flushed, iclass 27, count 2 2006.232.07:34:41.66#ibcon#about to write, iclass 27, count 2 2006.232.07:34:41.66#ibcon#wrote, iclass 27, count 2 2006.232.07:34:41.66#ibcon#about to read 3, iclass 27, count 2 2006.232.07:34:41.68#ibcon#read 3, iclass 27, count 2 2006.232.07:34:41.68#ibcon#about to read 4, iclass 27, count 2 2006.232.07:34:41.68#ibcon#read 4, iclass 27, count 2 2006.232.07:34:41.68#ibcon#about to read 5, iclass 27, count 2 2006.232.07:34:41.68#ibcon#read 5, iclass 27, count 2 2006.232.07:34:41.68#ibcon#about to read 6, iclass 27, count 2 2006.232.07:34:41.68#ibcon#read 6, iclass 27, count 2 2006.232.07:34:41.68#ibcon#end of sib2, iclass 27, count 2 2006.232.07:34:41.68#ibcon#*mode == 0, iclass 27, count 2 2006.232.07:34:41.68#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.232.07:34:41.68#ibcon#[27=AT04-04\r\n] 2006.232.07:34:41.68#ibcon#*before write, iclass 27, count 2 2006.232.07:34:41.68#ibcon#enter sib2, iclass 27, count 2 2006.232.07:34:41.68#ibcon#flushed, iclass 27, count 2 2006.232.07:34:41.68#ibcon#about to write, iclass 27, count 2 2006.232.07:34:41.68#ibcon#wrote, iclass 27, count 2 2006.232.07:34:41.68#ibcon#about to read 3, iclass 27, count 2 2006.232.07:34:41.71#ibcon#read 3, iclass 27, count 2 2006.232.07:34:41.71#ibcon#about to read 4, iclass 27, count 2 2006.232.07:34:41.71#ibcon#read 4, iclass 27, count 2 2006.232.07:34:41.71#ibcon#about to read 5, iclass 27, count 2 2006.232.07:34:41.71#ibcon#read 5, iclass 27, count 2 2006.232.07:34:41.71#ibcon#about to read 6, iclass 27, count 2 2006.232.07:34:41.71#ibcon#read 6, iclass 27, count 2 2006.232.07:34:41.71#ibcon#end of sib2, iclass 27, count 2 2006.232.07:34:41.71#ibcon#*after write, iclass 27, count 2 2006.232.07:34:41.71#ibcon#*before return 0, iclass 27, count 2 2006.232.07:34:41.71#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.232.07:34:41.71#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.232.07:34:41.71#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.232.07:34:41.71#ibcon#ireg 7 cls_cnt 0 2006.232.07:34:41.71#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.232.07:34:41.83#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.232.07:34:41.83#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.232.07:34:41.83#ibcon#enter wrdev, iclass 27, count 0 2006.232.07:34:41.83#ibcon#first serial, iclass 27, count 0 2006.232.07:34:41.83#ibcon#enter sib2, iclass 27, count 0 2006.232.07:34:41.83#ibcon#flushed, iclass 27, count 0 2006.232.07:34:41.83#ibcon#about to write, iclass 27, count 0 2006.232.07:34:41.83#ibcon#wrote, iclass 27, count 0 2006.232.07:34:41.83#ibcon#about to read 3, iclass 27, count 0 2006.232.07:34:41.85#ibcon#read 3, iclass 27, count 0 2006.232.07:34:41.85#ibcon#about to read 4, iclass 27, count 0 2006.232.07:34:41.85#ibcon#read 4, iclass 27, count 0 2006.232.07:34:41.85#ibcon#about to read 5, iclass 27, count 0 2006.232.07:34:41.85#ibcon#read 5, iclass 27, count 0 2006.232.07:34:41.85#ibcon#about to read 6, iclass 27, count 0 2006.232.07:34:41.85#ibcon#read 6, iclass 27, count 0 2006.232.07:34:41.85#ibcon#end of sib2, iclass 27, count 0 2006.232.07:34:41.85#ibcon#*mode == 0, iclass 27, count 0 2006.232.07:34:41.85#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.232.07:34:41.85#ibcon#[27=USB\r\n] 2006.232.07:34:41.85#ibcon#*before write, iclass 27, count 0 2006.232.07:34:41.85#ibcon#enter sib2, iclass 27, count 0 2006.232.07:34:41.85#ibcon#flushed, iclass 27, count 0 2006.232.07:34:41.85#ibcon#about to write, iclass 27, count 0 2006.232.07:34:41.85#ibcon#wrote, iclass 27, count 0 2006.232.07:34:41.85#ibcon#about to read 3, iclass 27, count 0 2006.232.07:34:41.88#ibcon#read 3, iclass 27, count 0 2006.232.07:34:41.88#ibcon#about to read 4, iclass 27, count 0 2006.232.07:34:41.88#ibcon#read 4, iclass 27, count 0 2006.232.07:34:41.88#ibcon#about to read 5, iclass 27, count 0 2006.232.07:34:41.88#ibcon#read 5, iclass 27, count 0 2006.232.07:34:41.88#ibcon#about to read 6, iclass 27, count 0 2006.232.07:34:41.88#ibcon#read 6, iclass 27, count 0 2006.232.07:34:41.88#ibcon#end of sib2, iclass 27, count 0 2006.232.07:34:41.88#ibcon#*after write, iclass 27, count 0 2006.232.07:34:41.88#ibcon#*before return 0, iclass 27, count 0 2006.232.07:34:41.88#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.232.07:34:41.88#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.232.07:34:41.88#ibcon#about to clear, iclass 27 cls_cnt 0 2006.232.07:34:41.88#ibcon#cleared, iclass 27 cls_cnt 0 2006.232.07:34:41.88$vc4f8/vblo=5,744.99 2006.232.07:34:41.88#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.232.07:34:41.88#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.232.07:34:41.88#ibcon#ireg 17 cls_cnt 0 2006.232.07:34:41.88#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:34:41.88#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:34:41.88#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:34:41.88#ibcon#enter wrdev, iclass 29, count 0 2006.232.07:34:41.88#ibcon#first serial, iclass 29, count 0 2006.232.07:34:41.88#ibcon#enter sib2, iclass 29, count 0 2006.232.07:34:41.88#ibcon#flushed, iclass 29, count 0 2006.232.07:34:41.88#ibcon#about to write, iclass 29, count 0 2006.232.07:34:41.88#ibcon#wrote, iclass 29, count 0 2006.232.07:34:41.88#ibcon#about to read 3, iclass 29, count 0 2006.232.07:34:41.90#ibcon#read 3, iclass 29, count 0 2006.232.07:34:41.90#ibcon#about to read 4, iclass 29, count 0 2006.232.07:34:41.90#ibcon#read 4, iclass 29, count 0 2006.232.07:34:41.90#ibcon#about to read 5, iclass 29, count 0 2006.232.07:34:41.90#ibcon#read 5, iclass 29, count 0 2006.232.07:34:41.90#ibcon#about to read 6, iclass 29, count 0 2006.232.07:34:41.90#ibcon#read 6, iclass 29, count 0 2006.232.07:34:41.90#ibcon#end of sib2, iclass 29, count 0 2006.232.07:34:41.90#ibcon#*mode == 0, iclass 29, count 0 2006.232.07:34:41.90#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.232.07:34:41.90#ibcon#[28=FRQ=05,744.99\r\n] 2006.232.07:34:41.90#ibcon#*before write, iclass 29, count 0 2006.232.07:34:41.90#ibcon#enter sib2, iclass 29, count 0 2006.232.07:34:41.90#ibcon#flushed, iclass 29, count 0 2006.232.07:34:41.90#ibcon#about to write, iclass 29, count 0 2006.232.07:34:41.90#ibcon#wrote, iclass 29, count 0 2006.232.07:34:41.90#ibcon#about to read 3, iclass 29, count 0 2006.232.07:34:41.94#ibcon#read 3, iclass 29, count 0 2006.232.07:34:41.94#ibcon#about to read 4, iclass 29, count 0 2006.232.07:34:41.94#ibcon#read 4, iclass 29, count 0 2006.232.07:34:41.94#ibcon#about to read 5, iclass 29, count 0 2006.232.07:34:41.94#ibcon#read 5, iclass 29, count 0 2006.232.07:34:41.94#ibcon#about to read 6, iclass 29, count 0 2006.232.07:34:41.94#ibcon#read 6, iclass 29, count 0 2006.232.07:34:41.94#ibcon#end of sib2, iclass 29, count 0 2006.232.07:34:41.94#ibcon#*after write, iclass 29, count 0 2006.232.07:34:41.94#ibcon#*before return 0, iclass 29, count 0 2006.232.07:34:41.94#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:34:41.94#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:34:41.94#ibcon#about to clear, iclass 29 cls_cnt 0 2006.232.07:34:41.94#ibcon#cleared, iclass 29 cls_cnt 0 2006.232.07:34:41.94$vc4f8/vb=5,3 2006.232.07:34:41.94#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.232.07:34:41.94#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.232.07:34:41.94#ibcon#ireg 11 cls_cnt 2 2006.232.07:34:41.94#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.232.07:34:42.00#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.232.07:34:42.00#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.232.07:34:42.00#ibcon#enter wrdev, iclass 31, count 2 2006.232.07:34:42.00#ibcon#first serial, iclass 31, count 2 2006.232.07:34:42.00#ibcon#enter sib2, iclass 31, count 2 2006.232.07:34:42.00#ibcon#flushed, iclass 31, count 2 2006.232.07:34:42.00#ibcon#about to write, iclass 31, count 2 2006.232.07:34:42.00#ibcon#wrote, iclass 31, count 2 2006.232.07:34:42.00#ibcon#about to read 3, iclass 31, count 2 2006.232.07:34:42.02#ibcon#read 3, iclass 31, count 2 2006.232.07:34:42.02#ibcon#about to read 4, iclass 31, count 2 2006.232.07:34:42.02#ibcon#read 4, iclass 31, count 2 2006.232.07:34:42.02#ibcon#about to read 5, iclass 31, count 2 2006.232.07:34:42.02#ibcon#read 5, iclass 31, count 2 2006.232.07:34:42.02#ibcon#about to read 6, iclass 31, count 2 2006.232.07:34:42.02#ibcon#read 6, iclass 31, count 2 2006.232.07:34:42.02#ibcon#end of sib2, iclass 31, count 2 2006.232.07:34:42.02#ibcon#*mode == 0, iclass 31, count 2 2006.232.07:34:42.02#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.232.07:34:42.02#ibcon#[27=AT05-03\r\n] 2006.232.07:34:42.02#ibcon#*before write, iclass 31, count 2 2006.232.07:34:42.02#ibcon#enter sib2, iclass 31, count 2 2006.232.07:34:42.02#ibcon#flushed, iclass 31, count 2 2006.232.07:34:42.02#ibcon#about to write, iclass 31, count 2 2006.232.07:34:42.02#ibcon#wrote, iclass 31, count 2 2006.232.07:34:42.02#ibcon#about to read 3, iclass 31, count 2 2006.232.07:34:42.06#ibcon#read 3, iclass 31, count 2 2006.232.07:34:42.06#ibcon#about to read 4, iclass 31, count 2 2006.232.07:34:42.06#ibcon#read 4, iclass 31, count 2 2006.232.07:34:42.06#ibcon#about to read 5, iclass 31, count 2 2006.232.07:34:42.06#ibcon#read 5, iclass 31, count 2 2006.232.07:34:42.06#ibcon#about to read 6, iclass 31, count 2 2006.232.07:34:42.06#ibcon#read 6, iclass 31, count 2 2006.232.07:34:42.06#ibcon#end of sib2, iclass 31, count 2 2006.232.07:34:42.06#ibcon#*after write, iclass 31, count 2 2006.232.07:34:42.06#ibcon#*before return 0, iclass 31, count 2 2006.232.07:34:42.06#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.232.07:34:42.06#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.232.07:34:42.06#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.232.07:34:42.06#ibcon#ireg 7 cls_cnt 0 2006.232.07:34:42.06#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.232.07:34:42.18#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.232.07:34:42.18#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.232.07:34:42.18#ibcon#enter wrdev, iclass 31, count 0 2006.232.07:34:42.18#ibcon#first serial, iclass 31, count 0 2006.232.07:34:42.18#ibcon#enter sib2, iclass 31, count 0 2006.232.07:34:42.18#ibcon#flushed, iclass 31, count 0 2006.232.07:34:42.18#ibcon#about to write, iclass 31, count 0 2006.232.07:34:42.18#ibcon#wrote, iclass 31, count 0 2006.232.07:34:42.18#ibcon#about to read 3, iclass 31, count 0 2006.232.07:34:42.20#ibcon#read 3, iclass 31, count 0 2006.232.07:34:42.20#ibcon#about to read 4, iclass 31, count 0 2006.232.07:34:42.20#ibcon#read 4, iclass 31, count 0 2006.232.07:34:42.20#ibcon#about to read 5, iclass 31, count 0 2006.232.07:34:42.20#ibcon#read 5, iclass 31, count 0 2006.232.07:34:42.20#ibcon#about to read 6, iclass 31, count 0 2006.232.07:34:42.20#ibcon#read 6, iclass 31, count 0 2006.232.07:34:42.20#ibcon#end of sib2, iclass 31, count 0 2006.232.07:34:42.20#ibcon#*mode == 0, iclass 31, count 0 2006.232.07:34:42.20#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.232.07:34:42.20#ibcon#[27=USB\r\n] 2006.232.07:34:42.20#ibcon#*before write, iclass 31, count 0 2006.232.07:34:42.20#ibcon#enter sib2, iclass 31, count 0 2006.232.07:34:42.20#ibcon#flushed, iclass 31, count 0 2006.232.07:34:42.20#ibcon#about to write, iclass 31, count 0 2006.232.07:34:42.20#ibcon#wrote, iclass 31, count 0 2006.232.07:34:42.20#ibcon#about to read 3, iclass 31, count 0 2006.232.07:34:42.23#ibcon#read 3, iclass 31, count 0 2006.232.07:34:42.23#ibcon#about to read 4, iclass 31, count 0 2006.232.07:34:42.23#ibcon#read 4, iclass 31, count 0 2006.232.07:34:42.23#ibcon#about to read 5, iclass 31, count 0 2006.232.07:34:42.23#ibcon#read 5, iclass 31, count 0 2006.232.07:34:42.23#ibcon#about to read 6, iclass 31, count 0 2006.232.07:34:42.23#ibcon#read 6, iclass 31, count 0 2006.232.07:34:42.23#ibcon#end of sib2, iclass 31, count 0 2006.232.07:34:42.23#ibcon#*after write, iclass 31, count 0 2006.232.07:34:42.23#ibcon#*before return 0, iclass 31, count 0 2006.232.07:34:42.23#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.232.07:34:42.23#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.232.07:34:42.23#ibcon#about to clear, iclass 31 cls_cnt 0 2006.232.07:34:42.23#ibcon#cleared, iclass 31 cls_cnt 0 2006.232.07:34:42.23$vc4f8/vblo=6,752.99 2006.232.07:34:42.23#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.232.07:34:42.23#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.232.07:34:42.23#ibcon#ireg 17 cls_cnt 0 2006.232.07:34:42.23#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.232.07:34:42.23#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.232.07:34:42.23#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.232.07:34:42.23#ibcon#enter wrdev, iclass 33, count 0 2006.232.07:34:42.23#ibcon#first serial, iclass 33, count 0 2006.232.07:34:42.23#ibcon#enter sib2, iclass 33, count 0 2006.232.07:34:42.23#ibcon#flushed, iclass 33, count 0 2006.232.07:34:42.23#ibcon#about to write, iclass 33, count 0 2006.232.07:34:42.23#ibcon#wrote, iclass 33, count 0 2006.232.07:34:42.23#ibcon#about to read 3, iclass 33, count 0 2006.232.07:34:42.25#ibcon#read 3, iclass 33, count 0 2006.232.07:34:42.25#ibcon#about to read 4, iclass 33, count 0 2006.232.07:34:42.25#ibcon#read 4, iclass 33, count 0 2006.232.07:34:42.25#ibcon#about to read 5, iclass 33, count 0 2006.232.07:34:42.25#ibcon#read 5, iclass 33, count 0 2006.232.07:34:42.25#ibcon#about to read 6, iclass 33, count 0 2006.232.07:34:42.25#ibcon#read 6, iclass 33, count 0 2006.232.07:34:42.25#ibcon#end of sib2, iclass 33, count 0 2006.232.07:34:42.25#ibcon#*mode == 0, iclass 33, count 0 2006.232.07:34:42.25#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.232.07:34:42.25#ibcon#[28=FRQ=06,752.99\r\n] 2006.232.07:34:42.25#ibcon#*before write, iclass 33, count 0 2006.232.07:34:42.25#ibcon#enter sib2, iclass 33, count 0 2006.232.07:34:42.25#ibcon#flushed, iclass 33, count 0 2006.232.07:34:42.25#ibcon#about to write, iclass 33, count 0 2006.232.07:34:42.25#ibcon#wrote, iclass 33, count 0 2006.232.07:34:42.25#ibcon#about to read 3, iclass 33, count 0 2006.232.07:34:42.29#ibcon#read 3, iclass 33, count 0 2006.232.07:34:42.29#ibcon#about to read 4, iclass 33, count 0 2006.232.07:34:42.29#ibcon#read 4, iclass 33, count 0 2006.232.07:34:42.29#ibcon#about to read 5, iclass 33, count 0 2006.232.07:34:42.29#ibcon#read 5, iclass 33, count 0 2006.232.07:34:42.29#ibcon#about to read 6, iclass 33, count 0 2006.232.07:34:42.29#ibcon#read 6, iclass 33, count 0 2006.232.07:34:42.29#ibcon#end of sib2, iclass 33, count 0 2006.232.07:34:42.29#ibcon#*after write, iclass 33, count 0 2006.232.07:34:42.29#ibcon#*before return 0, iclass 33, count 0 2006.232.07:34:42.29#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.232.07:34:42.29#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.232.07:34:42.29#ibcon#about to clear, iclass 33 cls_cnt 0 2006.232.07:34:42.29#ibcon#cleared, iclass 33 cls_cnt 0 2006.232.07:34:42.29$vc4f8/vb=6,4 2006.232.07:34:42.29#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.232.07:34:42.29#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.232.07:34:42.29#ibcon#ireg 11 cls_cnt 2 2006.232.07:34:42.29#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.232.07:34:42.35#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.232.07:34:42.35#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.232.07:34:42.35#ibcon#enter wrdev, iclass 35, count 2 2006.232.07:34:42.35#ibcon#first serial, iclass 35, count 2 2006.232.07:34:42.35#ibcon#enter sib2, iclass 35, count 2 2006.232.07:34:42.35#ibcon#flushed, iclass 35, count 2 2006.232.07:34:42.35#ibcon#about to write, iclass 35, count 2 2006.232.07:34:42.35#ibcon#wrote, iclass 35, count 2 2006.232.07:34:42.35#ibcon#about to read 3, iclass 35, count 2 2006.232.07:34:42.37#ibcon#read 3, iclass 35, count 2 2006.232.07:34:42.37#ibcon#about to read 4, iclass 35, count 2 2006.232.07:34:42.37#ibcon#read 4, iclass 35, count 2 2006.232.07:34:42.37#ibcon#about to read 5, iclass 35, count 2 2006.232.07:34:42.37#ibcon#read 5, iclass 35, count 2 2006.232.07:34:42.37#ibcon#about to read 6, iclass 35, count 2 2006.232.07:34:42.37#ibcon#read 6, iclass 35, count 2 2006.232.07:34:42.37#ibcon#end of sib2, iclass 35, count 2 2006.232.07:34:42.37#ibcon#*mode == 0, iclass 35, count 2 2006.232.07:34:42.37#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.232.07:34:42.37#ibcon#[27=AT06-04\r\n] 2006.232.07:34:42.37#ibcon#*before write, iclass 35, count 2 2006.232.07:34:42.37#ibcon#enter sib2, iclass 35, count 2 2006.232.07:34:42.37#ibcon#flushed, iclass 35, count 2 2006.232.07:34:42.37#ibcon#about to write, iclass 35, count 2 2006.232.07:34:42.37#ibcon#wrote, iclass 35, count 2 2006.232.07:34:42.37#ibcon#about to read 3, iclass 35, count 2 2006.232.07:34:42.40#ibcon#read 3, iclass 35, count 2 2006.232.07:34:42.40#ibcon#about to read 4, iclass 35, count 2 2006.232.07:34:42.40#ibcon#read 4, iclass 35, count 2 2006.232.07:34:42.40#ibcon#about to read 5, iclass 35, count 2 2006.232.07:34:42.40#ibcon#read 5, iclass 35, count 2 2006.232.07:34:42.40#ibcon#about to read 6, iclass 35, count 2 2006.232.07:34:42.40#ibcon#read 6, iclass 35, count 2 2006.232.07:34:42.40#ibcon#end of sib2, iclass 35, count 2 2006.232.07:34:42.40#ibcon#*after write, iclass 35, count 2 2006.232.07:34:42.40#ibcon#*before return 0, iclass 35, count 2 2006.232.07:34:42.40#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.232.07:34:42.40#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.232.07:34:42.40#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.232.07:34:42.40#ibcon#ireg 7 cls_cnt 0 2006.232.07:34:42.40#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.232.07:34:42.52#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.232.07:34:42.52#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.232.07:34:42.52#ibcon#enter wrdev, iclass 35, count 0 2006.232.07:34:42.52#ibcon#first serial, iclass 35, count 0 2006.232.07:34:42.52#ibcon#enter sib2, iclass 35, count 0 2006.232.07:34:42.52#ibcon#flushed, iclass 35, count 0 2006.232.07:34:42.52#ibcon#about to write, iclass 35, count 0 2006.232.07:34:42.52#ibcon#wrote, iclass 35, count 0 2006.232.07:34:42.52#ibcon#about to read 3, iclass 35, count 0 2006.232.07:34:42.54#ibcon#read 3, iclass 35, count 0 2006.232.07:34:42.54#ibcon#about to read 4, iclass 35, count 0 2006.232.07:34:42.54#ibcon#read 4, iclass 35, count 0 2006.232.07:34:42.54#ibcon#about to read 5, iclass 35, count 0 2006.232.07:34:42.54#ibcon#read 5, iclass 35, count 0 2006.232.07:34:42.54#ibcon#about to read 6, iclass 35, count 0 2006.232.07:34:42.54#ibcon#read 6, iclass 35, count 0 2006.232.07:34:42.54#ibcon#end of sib2, iclass 35, count 0 2006.232.07:34:42.54#ibcon#*mode == 0, iclass 35, count 0 2006.232.07:34:42.54#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.232.07:34:42.54#ibcon#[27=USB\r\n] 2006.232.07:34:42.54#ibcon#*before write, iclass 35, count 0 2006.232.07:34:42.54#ibcon#enter sib2, iclass 35, count 0 2006.232.07:34:42.54#ibcon#flushed, iclass 35, count 0 2006.232.07:34:42.54#ibcon#about to write, iclass 35, count 0 2006.232.07:34:42.54#ibcon#wrote, iclass 35, count 0 2006.232.07:34:42.54#ibcon#about to read 3, iclass 35, count 0 2006.232.07:34:42.57#ibcon#read 3, iclass 35, count 0 2006.232.07:34:42.57#ibcon#about to read 4, iclass 35, count 0 2006.232.07:34:42.57#ibcon#read 4, iclass 35, count 0 2006.232.07:34:42.57#ibcon#about to read 5, iclass 35, count 0 2006.232.07:34:42.57#ibcon#read 5, iclass 35, count 0 2006.232.07:34:42.57#ibcon#about to read 6, iclass 35, count 0 2006.232.07:34:42.57#ibcon#read 6, iclass 35, count 0 2006.232.07:34:42.57#ibcon#end of sib2, iclass 35, count 0 2006.232.07:34:42.57#ibcon#*after write, iclass 35, count 0 2006.232.07:34:42.57#ibcon#*before return 0, iclass 35, count 0 2006.232.07:34:42.57#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.232.07:34:42.57#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.232.07:34:42.57#ibcon#about to clear, iclass 35 cls_cnt 0 2006.232.07:34:42.57#ibcon#cleared, iclass 35 cls_cnt 0 2006.232.07:34:42.57$vc4f8/vabw=wide 2006.232.07:34:42.57#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.232.07:34:42.57#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.232.07:34:42.57#ibcon#ireg 8 cls_cnt 0 2006.232.07:34:42.57#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.232.07:34:42.57#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.232.07:34:42.57#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.232.07:34:42.57#ibcon#enter wrdev, iclass 37, count 0 2006.232.07:34:42.57#ibcon#first serial, iclass 37, count 0 2006.232.07:34:42.57#ibcon#enter sib2, iclass 37, count 0 2006.232.07:34:42.57#ibcon#flushed, iclass 37, count 0 2006.232.07:34:42.57#ibcon#about to write, iclass 37, count 0 2006.232.07:34:42.57#ibcon#wrote, iclass 37, count 0 2006.232.07:34:42.57#ibcon#about to read 3, iclass 37, count 0 2006.232.07:34:42.59#ibcon#read 3, iclass 37, count 0 2006.232.07:34:42.59#ibcon#about to read 4, iclass 37, count 0 2006.232.07:34:42.59#ibcon#read 4, iclass 37, count 0 2006.232.07:34:42.59#ibcon#about to read 5, iclass 37, count 0 2006.232.07:34:42.59#ibcon#read 5, iclass 37, count 0 2006.232.07:34:42.59#ibcon#about to read 6, iclass 37, count 0 2006.232.07:34:42.59#ibcon#read 6, iclass 37, count 0 2006.232.07:34:42.59#ibcon#end of sib2, iclass 37, count 0 2006.232.07:34:42.59#ibcon#*mode == 0, iclass 37, count 0 2006.232.07:34:42.59#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.232.07:34:42.59#ibcon#[25=BW32\r\n] 2006.232.07:34:42.59#ibcon#*before write, iclass 37, count 0 2006.232.07:34:42.59#ibcon#enter sib2, iclass 37, count 0 2006.232.07:34:42.59#ibcon#flushed, iclass 37, count 0 2006.232.07:34:42.59#ibcon#about to write, iclass 37, count 0 2006.232.07:34:42.59#ibcon#wrote, iclass 37, count 0 2006.232.07:34:42.59#ibcon#about to read 3, iclass 37, count 0 2006.232.07:34:42.62#ibcon#read 3, iclass 37, count 0 2006.232.07:34:42.62#ibcon#about to read 4, iclass 37, count 0 2006.232.07:34:42.62#ibcon#read 4, iclass 37, count 0 2006.232.07:34:42.62#ibcon#about to read 5, iclass 37, count 0 2006.232.07:34:42.62#ibcon#read 5, iclass 37, count 0 2006.232.07:34:42.62#ibcon#about to read 6, iclass 37, count 0 2006.232.07:34:42.62#ibcon#read 6, iclass 37, count 0 2006.232.07:34:42.62#ibcon#end of sib2, iclass 37, count 0 2006.232.07:34:42.62#ibcon#*after write, iclass 37, count 0 2006.232.07:34:42.62#ibcon#*before return 0, iclass 37, count 0 2006.232.07:34:42.62#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.232.07:34:42.62#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.232.07:34:42.62#ibcon#about to clear, iclass 37 cls_cnt 0 2006.232.07:34:42.62#ibcon#cleared, iclass 37 cls_cnt 0 2006.232.07:34:42.62$vc4f8/vbbw=wide 2006.232.07:34:42.62#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.232.07:34:42.62#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.232.07:34:42.62#ibcon#ireg 8 cls_cnt 0 2006.232.07:34:42.62#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.232.07:34:42.69#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.232.07:34:42.69#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.232.07:34:42.69#ibcon#enter wrdev, iclass 39, count 0 2006.232.07:34:42.69#ibcon#first serial, iclass 39, count 0 2006.232.07:34:42.69#ibcon#enter sib2, iclass 39, count 0 2006.232.07:34:42.69#ibcon#flushed, iclass 39, count 0 2006.232.07:34:42.69#ibcon#about to write, iclass 39, count 0 2006.232.07:34:42.69#ibcon#wrote, iclass 39, count 0 2006.232.07:34:42.69#ibcon#about to read 3, iclass 39, count 0 2006.232.07:34:42.71#ibcon#read 3, iclass 39, count 0 2006.232.07:34:42.71#ibcon#about to read 4, iclass 39, count 0 2006.232.07:34:42.71#ibcon#read 4, iclass 39, count 0 2006.232.07:34:42.71#ibcon#about to read 5, iclass 39, count 0 2006.232.07:34:42.71#ibcon#read 5, iclass 39, count 0 2006.232.07:34:42.71#ibcon#about to read 6, iclass 39, count 0 2006.232.07:34:42.71#ibcon#read 6, iclass 39, count 0 2006.232.07:34:42.71#ibcon#end of sib2, iclass 39, count 0 2006.232.07:34:42.71#ibcon#*mode == 0, iclass 39, count 0 2006.232.07:34:42.71#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.232.07:34:42.71#ibcon#[27=BW32\r\n] 2006.232.07:34:42.71#ibcon#*before write, iclass 39, count 0 2006.232.07:34:42.71#ibcon#enter sib2, iclass 39, count 0 2006.232.07:34:42.71#ibcon#flushed, iclass 39, count 0 2006.232.07:34:42.71#ibcon#about to write, iclass 39, count 0 2006.232.07:34:42.71#ibcon#wrote, iclass 39, count 0 2006.232.07:34:42.71#ibcon#about to read 3, iclass 39, count 0 2006.232.07:34:42.74#ibcon#read 3, iclass 39, count 0 2006.232.07:34:42.74#ibcon#about to read 4, iclass 39, count 0 2006.232.07:34:42.74#ibcon#read 4, iclass 39, count 0 2006.232.07:34:42.74#ibcon#about to read 5, iclass 39, count 0 2006.232.07:34:42.74#ibcon#read 5, iclass 39, count 0 2006.232.07:34:42.74#ibcon#about to read 6, iclass 39, count 0 2006.232.07:34:42.74#ibcon#read 6, iclass 39, count 0 2006.232.07:34:42.74#ibcon#end of sib2, iclass 39, count 0 2006.232.07:34:42.74#ibcon#*after write, iclass 39, count 0 2006.232.07:34:42.74#ibcon#*before return 0, iclass 39, count 0 2006.232.07:34:42.74#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.232.07:34:42.74#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.232.07:34:42.74#ibcon#about to clear, iclass 39 cls_cnt 0 2006.232.07:34:42.74#ibcon#cleared, iclass 39 cls_cnt 0 2006.232.07:34:42.74$4f8m12a/ifd4f 2006.232.07:34:42.74$ifd4f/lo= 2006.232.07:34:42.74$ifd4f/lo=lo1,7680.00,usb,rcp,1 2006.232.07:34:42.74$ifd4f/lo=lo2,1600.00,usb,rcp,1 2006.232.07:34:42.74$ifd4f/lo=lo3,8080.00,usb,rcp,1 2006.232.07:34:42.74$ifd4f/patch= 2006.232.07:34:42.74$ifd4f/patch=lo1,a1,a2,a3,a4 2006.232.07:34:42.74$ifd4f/patch=lo2,b1,b2,b3,b4,b5,b6 2006.232.07:34:42.74$ifd4f/patch=lo3,a5,a6,a7,a8 2006.232.07:34:42.74$4f8m12a/"form=m,16.000,1:2 2006.232.07:34:42.74$4f8m12a/"tpicd 2006.232.07:34:42.74$4f8m12a/echo=off 2006.232.07:34:42.74$4f8m12a/xlog=off 2006.232.07:34:42.74:!2006.232.07:35:10 2006.232.07:34:55.14#trakl#Source acquired 2006.232.07:34:55.14#flagr#flagr/antenna,acquired 2006.232.07:35:10.00:preob 2006.232.07:35:11.14/onsource/TRACKING 2006.232.07:35:11.14:!2006.232.07:35:20 2006.232.07:35:20.00:data_valid=on 2006.232.07:35:20.00:midob 2006.232.07:35:20.14/onsource/TRACKING 2006.232.07:35:20.14/wx/29.49,1007.2,87 2006.232.07:35:20.22/cable/+6.3874E-03 2006.232.07:35:21.31/va/01,08,usb,yes,30,32 2006.232.07:35:21.31/va/02,07,usb,yes,30,32 2006.232.07:35:21.31/va/03,08,usb,yes,23,23 2006.232.07:35:21.31/va/04,07,usb,yes,32,34 2006.232.07:35:21.31/va/05,07,usb,yes,36,38 2006.232.07:35:21.31/va/06,06,usb,yes,35,35 2006.232.07:35:21.31/va/07,06,usb,yes,36,35 2006.232.07:35:21.31/va/08,06,usb,yes,38,37 2006.232.07:35:21.54/valo/01,532.99,yes,locked 2006.232.07:35:21.54/valo/02,572.99,yes,locked 2006.232.07:35:21.54/valo/03,672.99,yes,locked 2006.232.07:35:21.54/valo/04,832.99,yes,locked 2006.232.07:35:21.54/valo/05,652.99,yes,locked 2006.232.07:35:21.54/valo/06,772.99,yes,locked 2006.232.07:35:21.54/valo/07,832.99,yes,locked 2006.232.07:35:21.54/valo/08,852.99,yes,locked 2006.232.07:35:22.63/vb/01,04,usb,yes,30,29 2006.232.07:35:22.63/vb/02,04,usb,yes,32,34 2006.232.07:35:22.63/vb/03,04,usb,yes,29,32 2006.232.07:35:22.63/vb/04,04,usb,yes,29,30 2006.232.07:35:22.63/vb/05,03,usb,yes,35,39 2006.232.07:35:22.63/vb/06,04,usb,yes,29,32 2006.232.07:35:22.63/vb/07,04,usb,yes,31,31 2006.232.07:35:22.63/vb/08,04,usb,yes,28,32 2006.232.07:35:22.87/vblo/01,632.99,yes,locked 2006.232.07:35:22.87/vblo/02,640.99,yes,locked 2006.232.07:35:22.87/vblo/03,656.99,yes,locked 2006.232.07:35:22.87/vblo/04,712.99,yes,locked 2006.232.07:35:22.87/vblo/05,744.99,yes,locked 2006.232.07:35:22.87/vblo/06,752.99,yes,locked 2006.232.07:35:22.87/vblo/07,734.99,yes,locked 2006.232.07:35:22.87/vblo/08,744.99,yes,locked 2006.232.07:35:23.02/vabw/8 2006.232.07:35:23.17/vbbw/8 2006.232.07:35:23.26/xfe/off,on,13.2 2006.232.07:35:23.64/ifatt/23,28,28,28 2006.232.07:35:24.08/fmout-gps/S +4.36E-07 2006.232.07:35:24.12:!2006.232.07:36:20 2006.232.07:36:20.02:data_valid=off 2006.232.07:36:20.02:postob 2006.232.07:36:20.26/cable/+6.3891E-03 2006.232.07:36:20.26/wx/29.47,1007.2,87 2006.232.07:36:21.09/fmout-gps/S +4.37E-07 2006.232.07:36:21.09:scan_name=232-0737,k06232,60 2006.232.07:36:21.09:source=1417+385,141946.61,382148.5,2000.0,ccw 2006.232.07:36:21.15#flagr#flagr/antenna,new-source 2006.232.07:36:22.15:checkk5 2006.232.07:36:22.48/chk_autoobs//k5ts1/ autoobs is running! 2006.232.07:36:22.86/chk_autoobs//k5ts2/ autoobs is running! 2006.232.07:36:23.24/chk_autoobs//k5ts3/ autoobs is running! 2006.232.07:36:23.61/chk_autoobs//k5ts4/ autoobs is running! 2006.232.07:36:23.97/chk_obsdata//k5ts1/T2320735??a.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:36:24.34/chk_obsdata//k5ts2/T2320735??b.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:36:24.71/chk_obsdata//k5ts3/T2320735??c.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:36:25.07/chk_obsdata//k5ts4/T2320735??d.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:36:25.76/k5log//k5ts1_log_newline 2006.232.07:36:26.44/k5log//k5ts2_log_newline 2006.232.07:36:27.13/k5log//k5ts3_log_newline 2006.232.07:36:27.83/k5log//k5ts4_log_newline 2006.232.07:36:27.85/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.232.07:36:27.85:4f8m12a=1 2006.232.07:36:27.86$4f8m12a/echo=on 2006.232.07:36:27.86$4f8m12a/pcalon 2006.232.07:36:27.86$pcalon/"no phase cal control is implemented here 2006.232.07:36:27.86$4f8m12a/"tpicd=stop 2006.232.07:36:27.86$4f8m12a/vc4f8 2006.232.07:36:27.86$vc4f8/valo=1,532.99 2006.232.07:36:27.86#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.232.07:36:27.86#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.232.07:36:27.86#ibcon#ireg 17 cls_cnt 0 2006.232.07:36:27.86#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.232.07:36:27.86#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.232.07:36:27.86#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.232.07:36:27.86#ibcon#enter wrdev, iclass 10, count 0 2006.232.07:36:27.86#ibcon#first serial, iclass 10, count 0 2006.232.07:36:27.86#ibcon#enter sib2, iclass 10, count 0 2006.232.07:36:27.86#ibcon#flushed, iclass 10, count 0 2006.232.07:36:27.86#ibcon#about to write, iclass 10, count 0 2006.232.07:36:27.86#ibcon#wrote, iclass 10, count 0 2006.232.07:36:27.86#ibcon#about to read 3, iclass 10, count 0 2006.232.07:36:27.90#ibcon#read 3, iclass 10, count 0 2006.232.07:36:27.90#ibcon#about to read 4, iclass 10, count 0 2006.232.07:36:27.90#ibcon#read 4, iclass 10, count 0 2006.232.07:36:27.90#ibcon#about to read 5, iclass 10, count 0 2006.232.07:36:27.90#ibcon#read 5, iclass 10, count 0 2006.232.07:36:27.90#ibcon#about to read 6, iclass 10, count 0 2006.232.07:36:27.90#ibcon#read 6, iclass 10, count 0 2006.232.07:36:27.90#ibcon#end of sib2, iclass 10, count 0 2006.232.07:36:27.90#ibcon#*mode == 0, iclass 10, count 0 2006.232.07:36:27.90#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.232.07:36:27.90#ibcon#[26=FRQ=01,532.99\r\n] 2006.232.07:36:27.90#ibcon#*before write, iclass 10, count 0 2006.232.07:36:27.90#ibcon#enter sib2, iclass 10, count 0 2006.232.07:36:27.90#ibcon#flushed, iclass 10, count 0 2006.232.07:36:27.90#ibcon#about to write, iclass 10, count 0 2006.232.07:36:27.90#ibcon#wrote, iclass 10, count 0 2006.232.07:36:27.90#ibcon#about to read 3, iclass 10, count 0 2006.232.07:36:27.94#ibcon#read 3, iclass 10, count 0 2006.232.07:36:27.94#ibcon#about to read 4, iclass 10, count 0 2006.232.07:36:27.94#ibcon#read 4, iclass 10, count 0 2006.232.07:36:27.94#ibcon#about to read 5, iclass 10, count 0 2006.232.07:36:27.94#ibcon#read 5, iclass 10, count 0 2006.232.07:36:27.94#ibcon#about to read 6, iclass 10, count 0 2006.232.07:36:27.94#ibcon#read 6, iclass 10, count 0 2006.232.07:36:27.94#ibcon#end of sib2, iclass 10, count 0 2006.232.07:36:27.94#ibcon#*after write, iclass 10, count 0 2006.232.07:36:27.94#ibcon#*before return 0, iclass 10, count 0 2006.232.07:36:27.94#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.232.07:36:27.95#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.232.07:36:27.95#ibcon#about to clear, iclass 10 cls_cnt 0 2006.232.07:36:27.95#ibcon#cleared, iclass 10 cls_cnt 0 2006.232.07:36:27.95$vc4f8/va=1,8 2006.232.07:36:27.95#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.232.07:36:27.95#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.232.07:36:27.95#ibcon#ireg 11 cls_cnt 2 2006.232.07:36:27.95#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.232.07:36:27.95#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.232.07:36:27.95#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.232.07:36:27.95#ibcon#enter wrdev, iclass 12, count 2 2006.232.07:36:27.95#ibcon#first serial, iclass 12, count 2 2006.232.07:36:27.95#ibcon#enter sib2, iclass 12, count 2 2006.232.07:36:27.95#ibcon#flushed, iclass 12, count 2 2006.232.07:36:27.95#ibcon#about to write, iclass 12, count 2 2006.232.07:36:27.95#ibcon#wrote, iclass 12, count 2 2006.232.07:36:27.95#ibcon#about to read 3, iclass 12, count 2 2006.232.07:36:27.96#ibcon#read 3, iclass 12, count 2 2006.232.07:36:27.96#ibcon#about to read 4, iclass 12, count 2 2006.232.07:36:27.96#ibcon#read 4, iclass 12, count 2 2006.232.07:36:27.96#ibcon#about to read 5, iclass 12, count 2 2006.232.07:36:27.96#ibcon#read 5, iclass 12, count 2 2006.232.07:36:27.96#ibcon#about to read 6, iclass 12, count 2 2006.232.07:36:27.96#ibcon#read 6, iclass 12, count 2 2006.232.07:36:27.96#ibcon#end of sib2, iclass 12, count 2 2006.232.07:36:27.96#ibcon#*mode == 0, iclass 12, count 2 2006.232.07:36:27.96#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.232.07:36:27.96#ibcon#[25=AT01-08\r\n] 2006.232.07:36:27.96#ibcon#*before write, iclass 12, count 2 2006.232.07:36:27.96#ibcon#enter sib2, iclass 12, count 2 2006.232.07:36:27.96#ibcon#flushed, iclass 12, count 2 2006.232.07:36:27.97#ibcon#about to write, iclass 12, count 2 2006.232.07:36:27.97#ibcon#wrote, iclass 12, count 2 2006.232.07:36:27.97#ibcon#about to read 3, iclass 12, count 2 2006.232.07:36:28.00#ibcon#read 3, iclass 12, count 2 2006.232.07:36:28.00#ibcon#about to read 4, iclass 12, count 2 2006.232.07:36:28.00#ibcon#read 4, iclass 12, count 2 2006.232.07:36:28.00#ibcon#about to read 5, iclass 12, count 2 2006.232.07:36:28.00#ibcon#read 5, iclass 12, count 2 2006.232.07:36:28.00#ibcon#about to read 6, iclass 12, count 2 2006.232.07:36:28.00#ibcon#read 6, iclass 12, count 2 2006.232.07:36:28.00#ibcon#end of sib2, iclass 12, count 2 2006.232.07:36:28.00#ibcon#*after write, iclass 12, count 2 2006.232.07:36:28.00#ibcon#*before return 0, iclass 12, count 2 2006.232.07:36:28.00#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.232.07:36:28.00#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.232.07:36:28.00#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.232.07:36:28.00#ibcon#ireg 7 cls_cnt 0 2006.232.07:36:28.00#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.232.07:36:28.11#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.232.07:36:28.11#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.232.07:36:28.11#ibcon#enter wrdev, iclass 12, count 0 2006.232.07:36:28.11#ibcon#first serial, iclass 12, count 0 2006.232.07:36:28.11#ibcon#enter sib2, iclass 12, count 0 2006.232.07:36:28.11#ibcon#flushed, iclass 12, count 0 2006.232.07:36:28.11#ibcon#about to write, iclass 12, count 0 2006.232.07:36:28.11#ibcon#wrote, iclass 12, count 0 2006.232.07:36:28.11#ibcon#about to read 3, iclass 12, count 0 2006.232.07:36:28.13#ibcon#read 3, iclass 12, count 0 2006.232.07:36:28.13#ibcon#about to read 4, iclass 12, count 0 2006.232.07:36:28.13#ibcon#read 4, iclass 12, count 0 2006.232.07:36:28.13#ibcon#about to read 5, iclass 12, count 0 2006.232.07:36:28.13#ibcon#read 5, iclass 12, count 0 2006.232.07:36:28.13#ibcon#about to read 6, iclass 12, count 0 2006.232.07:36:28.13#ibcon#read 6, iclass 12, count 0 2006.232.07:36:28.13#ibcon#end of sib2, iclass 12, count 0 2006.232.07:36:28.13#ibcon#*mode == 0, iclass 12, count 0 2006.232.07:36:28.13#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.232.07:36:28.13#ibcon#[25=USB\r\n] 2006.232.07:36:28.13#ibcon#*before write, iclass 12, count 0 2006.232.07:36:28.14#ibcon#enter sib2, iclass 12, count 0 2006.232.07:36:28.14#ibcon#flushed, iclass 12, count 0 2006.232.07:36:28.14#ibcon#about to write, iclass 12, count 0 2006.232.07:36:28.14#ibcon#wrote, iclass 12, count 0 2006.232.07:36:28.14#ibcon#about to read 3, iclass 12, count 0 2006.232.07:36:28.17#ibcon#read 3, iclass 12, count 0 2006.232.07:36:28.17#ibcon#about to read 4, iclass 12, count 0 2006.232.07:36:28.17#ibcon#read 4, iclass 12, count 0 2006.232.07:36:28.17#ibcon#about to read 5, iclass 12, count 0 2006.232.07:36:28.17#ibcon#read 5, iclass 12, count 0 2006.232.07:36:28.17#ibcon#about to read 6, iclass 12, count 0 2006.232.07:36:28.17#ibcon#read 6, iclass 12, count 0 2006.232.07:36:28.17#ibcon#end of sib2, iclass 12, count 0 2006.232.07:36:28.17#ibcon#*after write, iclass 12, count 0 2006.232.07:36:28.17#ibcon#*before return 0, iclass 12, count 0 2006.232.07:36:28.17#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.232.07:36:28.17#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.232.07:36:28.17#ibcon#about to clear, iclass 12 cls_cnt 0 2006.232.07:36:28.17#ibcon#cleared, iclass 12 cls_cnt 0 2006.232.07:36:28.17$vc4f8/valo=2,572.99 2006.232.07:36:28.17#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.232.07:36:28.17#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.232.07:36:28.17#ibcon#ireg 17 cls_cnt 0 2006.232.07:36:28.17#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.232.07:36:28.17#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.232.07:36:28.17#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.232.07:36:28.17#ibcon#enter wrdev, iclass 14, count 0 2006.232.07:36:28.17#ibcon#first serial, iclass 14, count 0 2006.232.07:36:28.17#ibcon#enter sib2, iclass 14, count 0 2006.232.07:36:28.17#ibcon#flushed, iclass 14, count 0 2006.232.07:36:28.17#ibcon#about to write, iclass 14, count 0 2006.232.07:36:28.17#ibcon#wrote, iclass 14, count 0 2006.232.07:36:28.17#ibcon#about to read 3, iclass 14, count 0 2006.232.07:36:28.18#ibcon#read 3, iclass 14, count 0 2006.232.07:36:28.18#ibcon#about to read 4, iclass 14, count 0 2006.232.07:36:28.18#ibcon#read 4, iclass 14, count 0 2006.232.07:36:28.18#ibcon#about to read 5, iclass 14, count 0 2006.232.07:36:28.18#ibcon#read 5, iclass 14, count 0 2006.232.07:36:28.18#ibcon#about to read 6, iclass 14, count 0 2006.232.07:36:28.18#ibcon#read 6, iclass 14, count 0 2006.232.07:36:28.18#ibcon#end of sib2, iclass 14, count 0 2006.232.07:36:28.18#ibcon#*mode == 0, iclass 14, count 0 2006.232.07:36:28.19#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.232.07:36:28.19#ibcon#[26=FRQ=02,572.99\r\n] 2006.232.07:36:28.19#ibcon#*before write, iclass 14, count 0 2006.232.07:36:28.19#ibcon#enter sib2, iclass 14, count 0 2006.232.07:36:28.19#ibcon#flushed, iclass 14, count 0 2006.232.07:36:28.19#ibcon#about to write, iclass 14, count 0 2006.232.07:36:28.19#ibcon#wrote, iclass 14, count 0 2006.232.07:36:28.19#ibcon#about to read 3, iclass 14, count 0 2006.232.07:36:28.22#ibcon#read 3, iclass 14, count 0 2006.232.07:36:28.22#ibcon#about to read 4, iclass 14, count 0 2006.232.07:36:28.22#ibcon#read 4, iclass 14, count 0 2006.232.07:36:28.22#ibcon#about to read 5, iclass 14, count 0 2006.232.07:36:28.22#ibcon#read 5, iclass 14, count 0 2006.232.07:36:28.22#ibcon#about to read 6, iclass 14, count 0 2006.232.07:36:28.22#ibcon#read 6, iclass 14, count 0 2006.232.07:36:28.22#ibcon#end of sib2, iclass 14, count 0 2006.232.07:36:28.22#ibcon#*after write, iclass 14, count 0 2006.232.07:36:28.22#ibcon#*before return 0, iclass 14, count 0 2006.232.07:36:28.22#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.232.07:36:28.22#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.232.07:36:28.22#ibcon#about to clear, iclass 14 cls_cnt 0 2006.232.07:36:28.22#ibcon#cleared, iclass 14 cls_cnt 0 2006.232.07:36:28.23$vc4f8/va=2,7 2006.232.07:36:28.23#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.232.07:36:28.23#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.232.07:36:28.23#ibcon#ireg 11 cls_cnt 2 2006.232.07:36:28.23#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.232.07:36:28.29#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.232.07:36:28.29#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.232.07:36:28.29#ibcon#enter wrdev, iclass 16, count 2 2006.232.07:36:28.29#ibcon#first serial, iclass 16, count 2 2006.232.07:36:28.29#ibcon#enter sib2, iclass 16, count 2 2006.232.07:36:28.29#ibcon#flushed, iclass 16, count 2 2006.232.07:36:28.29#ibcon#about to write, iclass 16, count 2 2006.232.07:36:28.29#ibcon#wrote, iclass 16, count 2 2006.232.07:36:28.29#ibcon#about to read 3, iclass 16, count 2 2006.232.07:36:28.30#ibcon#read 3, iclass 16, count 2 2006.232.07:36:28.30#ibcon#about to read 4, iclass 16, count 2 2006.232.07:36:28.30#ibcon#read 4, iclass 16, count 2 2006.232.07:36:28.30#ibcon#about to read 5, iclass 16, count 2 2006.232.07:36:28.30#ibcon#read 5, iclass 16, count 2 2006.232.07:36:28.30#ibcon#about to read 6, iclass 16, count 2 2006.232.07:36:28.30#ibcon#read 6, iclass 16, count 2 2006.232.07:36:28.30#ibcon#end of sib2, iclass 16, count 2 2006.232.07:36:28.30#ibcon#*mode == 0, iclass 16, count 2 2006.232.07:36:28.30#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.232.07:36:28.30#ibcon#[25=AT02-07\r\n] 2006.232.07:36:28.31#ibcon#*before write, iclass 16, count 2 2006.232.07:36:28.31#ibcon#enter sib2, iclass 16, count 2 2006.232.07:36:28.31#ibcon#flushed, iclass 16, count 2 2006.232.07:36:28.31#ibcon#about to write, iclass 16, count 2 2006.232.07:36:28.31#ibcon#wrote, iclass 16, count 2 2006.232.07:36:28.31#ibcon#about to read 3, iclass 16, count 2 2006.232.07:36:28.33#ibcon#read 3, iclass 16, count 2 2006.232.07:36:28.33#ibcon#about to read 4, iclass 16, count 2 2006.232.07:36:28.33#ibcon#read 4, iclass 16, count 2 2006.232.07:36:28.33#ibcon#about to read 5, iclass 16, count 2 2006.232.07:36:28.33#ibcon#read 5, iclass 16, count 2 2006.232.07:36:28.33#ibcon#about to read 6, iclass 16, count 2 2006.232.07:36:28.33#ibcon#read 6, iclass 16, count 2 2006.232.07:36:28.33#ibcon#end of sib2, iclass 16, count 2 2006.232.07:36:28.33#ibcon#*after write, iclass 16, count 2 2006.232.07:36:28.33#ibcon#*before return 0, iclass 16, count 2 2006.232.07:36:28.33#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.232.07:36:28.33#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.232.07:36:28.33#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.232.07:36:28.34#ibcon#ireg 7 cls_cnt 0 2006.232.07:36:28.34#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.232.07:36:28.44#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.232.07:36:28.44#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.232.07:36:28.44#ibcon#enter wrdev, iclass 16, count 0 2006.232.07:36:28.44#ibcon#first serial, iclass 16, count 0 2006.232.07:36:28.44#ibcon#enter sib2, iclass 16, count 0 2006.232.07:36:28.44#ibcon#flushed, iclass 16, count 0 2006.232.07:36:28.44#ibcon#about to write, iclass 16, count 0 2006.232.07:36:28.44#ibcon#wrote, iclass 16, count 0 2006.232.07:36:28.44#ibcon#about to read 3, iclass 16, count 0 2006.232.07:36:28.46#ibcon#read 3, iclass 16, count 0 2006.232.07:36:28.46#ibcon#about to read 4, iclass 16, count 0 2006.232.07:36:28.46#ibcon#read 4, iclass 16, count 0 2006.232.07:36:28.46#ibcon#about to read 5, iclass 16, count 0 2006.232.07:36:28.46#ibcon#read 5, iclass 16, count 0 2006.232.07:36:28.46#ibcon#about to read 6, iclass 16, count 0 2006.232.07:36:28.46#ibcon#read 6, iclass 16, count 0 2006.232.07:36:28.46#ibcon#end of sib2, iclass 16, count 0 2006.232.07:36:28.46#ibcon#*mode == 0, iclass 16, count 0 2006.232.07:36:28.46#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.232.07:36:28.46#ibcon#[25=USB\r\n] 2006.232.07:36:28.46#ibcon#*before write, iclass 16, count 0 2006.232.07:36:28.46#ibcon#enter sib2, iclass 16, count 0 2006.232.07:36:28.46#ibcon#flushed, iclass 16, count 0 2006.232.07:36:28.46#ibcon#about to write, iclass 16, count 0 2006.232.07:36:28.47#ibcon#wrote, iclass 16, count 0 2006.232.07:36:28.47#ibcon#about to read 3, iclass 16, count 0 2006.232.07:36:28.50#ibcon#read 3, iclass 16, count 0 2006.232.07:36:28.50#ibcon#about to read 4, iclass 16, count 0 2006.232.07:36:28.50#ibcon#read 4, iclass 16, count 0 2006.232.07:36:28.50#ibcon#about to read 5, iclass 16, count 0 2006.232.07:36:28.50#ibcon#read 5, iclass 16, count 0 2006.232.07:36:28.50#ibcon#about to read 6, iclass 16, count 0 2006.232.07:36:28.50#ibcon#read 6, iclass 16, count 0 2006.232.07:36:28.50#ibcon#end of sib2, iclass 16, count 0 2006.232.07:36:28.50#ibcon#*after write, iclass 16, count 0 2006.232.07:36:28.50#ibcon#*before return 0, iclass 16, count 0 2006.232.07:36:28.50#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.232.07:36:28.50#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.232.07:36:28.50#ibcon#about to clear, iclass 16 cls_cnt 0 2006.232.07:36:28.50#ibcon#cleared, iclass 16 cls_cnt 0 2006.232.07:36:28.50$vc4f8/valo=3,672.99 2006.232.07:36:28.50#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.232.07:36:28.50#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.232.07:36:28.50#ibcon#ireg 17 cls_cnt 0 2006.232.07:36:28.50#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.232.07:36:28.50#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.232.07:36:28.50#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.232.07:36:28.50#ibcon#enter wrdev, iclass 18, count 0 2006.232.07:36:28.50#ibcon#first serial, iclass 18, count 0 2006.232.07:36:28.50#ibcon#enter sib2, iclass 18, count 0 2006.232.07:36:28.50#ibcon#flushed, iclass 18, count 0 2006.232.07:36:28.50#ibcon#about to write, iclass 18, count 0 2006.232.07:36:28.50#ibcon#wrote, iclass 18, count 0 2006.232.07:36:28.50#ibcon#about to read 3, iclass 18, count 0 2006.232.07:36:28.52#ibcon#read 3, iclass 18, count 0 2006.232.07:36:28.52#ibcon#about to read 4, iclass 18, count 0 2006.232.07:36:28.52#ibcon#read 4, iclass 18, count 0 2006.232.07:36:28.52#ibcon#about to read 5, iclass 18, count 0 2006.232.07:36:28.52#ibcon#read 5, iclass 18, count 0 2006.232.07:36:28.52#ibcon#about to read 6, iclass 18, count 0 2006.232.07:36:28.52#ibcon#read 6, iclass 18, count 0 2006.232.07:36:28.52#ibcon#end of sib2, iclass 18, count 0 2006.232.07:36:28.52#ibcon#*mode == 0, iclass 18, count 0 2006.232.07:36:28.52#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.232.07:36:28.52#ibcon#[26=FRQ=03,672.99\r\n] 2006.232.07:36:28.52#ibcon#*before write, iclass 18, count 0 2006.232.07:36:28.52#ibcon#enter sib2, iclass 18, count 0 2006.232.07:36:28.52#ibcon#flushed, iclass 18, count 0 2006.232.07:36:28.52#ibcon#about to write, iclass 18, count 0 2006.232.07:36:28.52#ibcon#wrote, iclass 18, count 0 2006.232.07:36:28.52#ibcon#about to read 3, iclass 18, count 0 2006.232.07:36:28.55#ibcon#read 3, iclass 18, count 0 2006.232.07:36:28.55#ibcon#about to read 4, iclass 18, count 0 2006.232.07:36:28.55#ibcon#read 4, iclass 18, count 0 2006.232.07:36:28.55#ibcon#about to read 5, iclass 18, count 0 2006.232.07:36:28.55#ibcon#read 5, iclass 18, count 0 2006.232.07:36:28.55#ibcon#about to read 6, iclass 18, count 0 2006.232.07:36:28.55#ibcon#read 6, iclass 18, count 0 2006.232.07:36:28.55#ibcon#end of sib2, iclass 18, count 0 2006.232.07:36:28.55#ibcon#*after write, iclass 18, count 0 2006.232.07:36:28.55#ibcon#*before return 0, iclass 18, count 0 2006.232.07:36:28.55#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.232.07:36:28.55#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.232.07:36:28.55#ibcon#about to clear, iclass 18 cls_cnt 0 2006.232.07:36:28.56#ibcon#cleared, iclass 18 cls_cnt 0 2006.232.07:36:28.56$vc4f8/va=3,8 2006.232.07:36:28.56#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.232.07:36:28.56#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.232.07:36:28.56#ibcon#ireg 11 cls_cnt 2 2006.232.07:36:28.56#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.232.07:36:28.61#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.232.07:36:28.61#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.232.07:36:28.61#ibcon#enter wrdev, iclass 20, count 2 2006.232.07:36:28.61#ibcon#first serial, iclass 20, count 2 2006.232.07:36:28.61#ibcon#enter sib2, iclass 20, count 2 2006.232.07:36:28.61#ibcon#flushed, iclass 20, count 2 2006.232.07:36:28.61#ibcon#about to write, iclass 20, count 2 2006.232.07:36:28.61#ibcon#wrote, iclass 20, count 2 2006.232.07:36:28.61#ibcon#about to read 3, iclass 20, count 2 2006.232.07:36:28.63#ibcon#read 3, iclass 20, count 2 2006.232.07:36:28.63#ibcon#about to read 4, iclass 20, count 2 2006.232.07:36:28.63#ibcon#read 4, iclass 20, count 2 2006.232.07:36:28.63#ibcon#about to read 5, iclass 20, count 2 2006.232.07:36:28.63#ibcon#read 5, iclass 20, count 2 2006.232.07:36:28.63#ibcon#about to read 6, iclass 20, count 2 2006.232.07:36:28.63#ibcon#read 6, iclass 20, count 2 2006.232.07:36:28.63#ibcon#end of sib2, iclass 20, count 2 2006.232.07:36:28.63#ibcon#*mode == 0, iclass 20, count 2 2006.232.07:36:28.63#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.232.07:36:28.63#ibcon#[25=AT03-08\r\n] 2006.232.07:36:28.63#ibcon#*before write, iclass 20, count 2 2006.232.07:36:28.63#ibcon#enter sib2, iclass 20, count 2 2006.232.07:36:28.63#ibcon#flushed, iclass 20, count 2 2006.232.07:36:28.63#ibcon#about to write, iclass 20, count 2 2006.232.07:36:28.64#ibcon#wrote, iclass 20, count 2 2006.232.07:36:28.64#ibcon#about to read 3, iclass 20, count 2 2006.232.07:36:28.66#ibcon#read 3, iclass 20, count 2 2006.232.07:36:28.66#ibcon#about to read 4, iclass 20, count 2 2006.232.07:36:28.66#ibcon#read 4, iclass 20, count 2 2006.232.07:36:28.66#ibcon#about to read 5, iclass 20, count 2 2006.232.07:36:28.66#ibcon#read 5, iclass 20, count 2 2006.232.07:36:28.66#ibcon#about to read 6, iclass 20, count 2 2006.232.07:36:28.66#ibcon#read 6, iclass 20, count 2 2006.232.07:36:28.66#ibcon#end of sib2, iclass 20, count 2 2006.232.07:36:28.66#ibcon#*after write, iclass 20, count 2 2006.232.07:36:28.66#ibcon#*before return 0, iclass 20, count 2 2006.232.07:36:28.66#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.232.07:36:28.66#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.232.07:36:28.66#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.232.07:36:28.67#ibcon#ireg 7 cls_cnt 0 2006.232.07:36:28.67#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.232.07:36:28.77#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.232.07:36:28.77#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.232.07:36:28.77#ibcon#enter wrdev, iclass 20, count 0 2006.232.07:36:28.77#ibcon#first serial, iclass 20, count 0 2006.232.07:36:28.77#ibcon#enter sib2, iclass 20, count 0 2006.232.07:36:28.77#ibcon#flushed, iclass 20, count 0 2006.232.07:36:28.77#ibcon#about to write, iclass 20, count 0 2006.232.07:36:28.77#ibcon#wrote, iclass 20, count 0 2006.232.07:36:28.77#ibcon#about to read 3, iclass 20, count 0 2006.232.07:36:28.79#ibcon#read 3, iclass 20, count 0 2006.232.07:36:28.79#ibcon#about to read 4, iclass 20, count 0 2006.232.07:36:28.79#ibcon#read 4, iclass 20, count 0 2006.232.07:36:28.79#ibcon#about to read 5, iclass 20, count 0 2006.232.07:36:28.79#ibcon#read 5, iclass 20, count 0 2006.232.07:36:28.79#ibcon#about to read 6, iclass 20, count 0 2006.232.07:36:28.79#ibcon#read 6, iclass 20, count 0 2006.232.07:36:28.79#ibcon#end of sib2, iclass 20, count 0 2006.232.07:36:28.79#ibcon#*mode == 0, iclass 20, count 0 2006.232.07:36:28.79#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.232.07:36:28.79#ibcon#[25=USB\r\n] 2006.232.07:36:28.79#ibcon#*before write, iclass 20, count 0 2006.232.07:36:28.79#ibcon#enter sib2, iclass 20, count 0 2006.232.07:36:28.79#ibcon#flushed, iclass 20, count 0 2006.232.07:36:28.79#ibcon#about to write, iclass 20, count 0 2006.232.07:36:28.80#ibcon#wrote, iclass 20, count 0 2006.232.07:36:28.80#ibcon#about to read 3, iclass 20, count 0 2006.232.07:36:28.82#ibcon#read 3, iclass 20, count 0 2006.232.07:36:28.82#ibcon#about to read 4, iclass 20, count 0 2006.232.07:36:28.82#ibcon#read 4, iclass 20, count 0 2006.232.07:36:28.82#ibcon#about to read 5, iclass 20, count 0 2006.232.07:36:28.82#ibcon#read 5, iclass 20, count 0 2006.232.07:36:28.82#ibcon#about to read 6, iclass 20, count 0 2006.232.07:36:28.82#ibcon#read 6, iclass 20, count 0 2006.232.07:36:28.82#ibcon#end of sib2, iclass 20, count 0 2006.232.07:36:28.82#ibcon#*after write, iclass 20, count 0 2006.232.07:36:28.82#ibcon#*before return 0, iclass 20, count 0 2006.232.07:36:28.82#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.232.07:36:28.82#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.232.07:36:28.82#ibcon#about to clear, iclass 20 cls_cnt 0 2006.232.07:36:28.82#ibcon#cleared, iclass 20 cls_cnt 0 2006.232.07:36:28.83$vc4f8/valo=4,832.99 2006.232.07:36:28.83#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.232.07:36:28.83#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.232.07:36:28.83#ibcon#ireg 17 cls_cnt 0 2006.232.07:36:28.83#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.232.07:36:28.83#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.232.07:36:28.83#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.232.07:36:28.83#ibcon#enter wrdev, iclass 22, count 0 2006.232.07:36:28.83#ibcon#first serial, iclass 22, count 0 2006.232.07:36:28.83#ibcon#enter sib2, iclass 22, count 0 2006.232.07:36:28.83#ibcon#flushed, iclass 22, count 0 2006.232.07:36:28.83#ibcon#about to write, iclass 22, count 0 2006.232.07:36:28.83#ibcon#wrote, iclass 22, count 0 2006.232.07:36:28.83#ibcon#about to read 3, iclass 22, count 0 2006.232.07:36:28.84#ibcon#read 3, iclass 22, count 0 2006.232.07:36:28.84#ibcon#about to read 4, iclass 22, count 0 2006.232.07:36:28.84#ibcon#read 4, iclass 22, count 0 2006.232.07:36:28.84#ibcon#about to read 5, iclass 22, count 0 2006.232.07:36:28.84#ibcon#read 5, iclass 22, count 0 2006.232.07:36:28.84#ibcon#about to read 6, iclass 22, count 0 2006.232.07:36:28.84#ibcon#read 6, iclass 22, count 0 2006.232.07:36:28.84#ibcon#end of sib2, iclass 22, count 0 2006.232.07:36:28.84#ibcon#*mode == 0, iclass 22, count 0 2006.232.07:36:28.84#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.232.07:36:28.84#ibcon#[26=FRQ=04,832.99\r\n] 2006.232.07:36:28.84#ibcon#*before write, iclass 22, count 0 2006.232.07:36:28.84#ibcon#enter sib2, iclass 22, count 0 2006.232.07:36:28.84#ibcon#flushed, iclass 22, count 0 2006.232.07:36:28.84#ibcon#about to write, iclass 22, count 0 2006.232.07:36:28.85#ibcon#wrote, iclass 22, count 0 2006.232.07:36:28.85#ibcon#about to read 3, iclass 22, count 0 2006.232.07:36:28.88#ibcon#read 3, iclass 22, count 0 2006.232.07:36:28.88#ibcon#about to read 4, iclass 22, count 0 2006.232.07:36:28.88#ibcon#read 4, iclass 22, count 0 2006.232.07:36:28.88#ibcon#about to read 5, iclass 22, count 0 2006.232.07:36:28.88#ibcon#read 5, iclass 22, count 0 2006.232.07:36:28.88#ibcon#about to read 6, iclass 22, count 0 2006.232.07:36:28.88#ibcon#read 6, iclass 22, count 0 2006.232.07:36:28.88#ibcon#end of sib2, iclass 22, count 0 2006.232.07:36:28.88#ibcon#*after write, iclass 22, count 0 2006.232.07:36:28.88#ibcon#*before return 0, iclass 22, count 0 2006.232.07:36:28.88#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.232.07:36:28.89#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.232.07:36:28.89#ibcon#about to clear, iclass 22 cls_cnt 0 2006.232.07:36:28.89#ibcon#cleared, iclass 22 cls_cnt 0 2006.232.07:36:28.89$vc4f8/va=4,7 2006.232.07:36:28.89#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.232.07:36:28.89#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.232.07:36:28.89#ibcon#ireg 11 cls_cnt 2 2006.232.07:36:28.89#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.232.07:36:28.93#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.232.07:36:28.93#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.232.07:36:28.93#ibcon#enter wrdev, iclass 24, count 2 2006.232.07:36:28.93#ibcon#first serial, iclass 24, count 2 2006.232.07:36:28.93#ibcon#enter sib2, iclass 24, count 2 2006.232.07:36:28.93#ibcon#flushed, iclass 24, count 2 2006.232.07:36:28.93#ibcon#about to write, iclass 24, count 2 2006.232.07:36:28.93#ibcon#wrote, iclass 24, count 2 2006.232.07:36:28.93#ibcon#about to read 3, iclass 24, count 2 2006.232.07:36:28.95#ibcon#read 3, iclass 24, count 2 2006.232.07:36:28.95#ibcon#about to read 4, iclass 24, count 2 2006.232.07:36:28.95#ibcon#read 4, iclass 24, count 2 2006.232.07:36:28.95#ibcon#about to read 5, iclass 24, count 2 2006.232.07:36:28.95#ibcon#read 5, iclass 24, count 2 2006.232.07:36:28.95#ibcon#about to read 6, iclass 24, count 2 2006.232.07:36:28.95#ibcon#read 6, iclass 24, count 2 2006.232.07:36:28.95#ibcon#end of sib2, iclass 24, count 2 2006.232.07:36:28.95#ibcon#*mode == 0, iclass 24, count 2 2006.232.07:36:28.95#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.232.07:36:28.95#ibcon#[25=AT04-07\r\n] 2006.232.07:36:28.95#ibcon#*before write, iclass 24, count 2 2006.232.07:36:28.95#ibcon#enter sib2, iclass 24, count 2 2006.232.07:36:28.96#ibcon#flushed, iclass 24, count 2 2006.232.07:36:28.96#ibcon#about to write, iclass 24, count 2 2006.232.07:36:28.96#ibcon#wrote, iclass 24, count 2 2006.232.07:36:28.96#ibcon#about to read 3, iclass 24, count 2 2006.232.07:36:28.98#ibcon#read 3, iclass 24, count 2 2006.232.07:36:28.98#ibcon#about to read 4, iclass 24, count 2 2006.232.07:36:28.98#ibcon#read 4, iclass 24, count 2 2006.232.07:36:28.98#ibcon#about to read 5, iclass 24, count 2 2006.232.07:36:28.98#ibcon#read 5, iclass 24, count 2 2006.232.07:36:28.98#ibcon#about to read 6, iclass 24, count 2 2006.232.07:36:28.98#ibcon#read 6, iclass 24, count 2 2006.232.07:36:28.98#ibcon#end of sib2, iclass 24, count 2 2006.232.07:36:28.98#ibcon#*after write, iclass 24, count 2 2006.232.07:36:28.98#ibcon#*before return 0, iclass 24, count 2 2006.232.07:36:28.98#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.232.07:36:28.98#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.232.07:36:28.98#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.232.07:36:28.99#ibcon#ireg 7 cls_cnt 0 2006.232.07:36:28.99#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.232.07:36:29.09#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.232.07:36:29.09#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.232.07:36:29.09#ibcon#enter wrdev, iclass 24, count 0 2006.232.07:36:29.09#ibcon#first serial, iclass 24, count 0 2006.232.07:36:29.09#ibcon#enter sib2, iclass 24, count 0 2006.232.07:36:29.09#ibcon#flushed, iclass 24, count 0 2006.232.07:36:29.09#ibcon#about to write, iclass 24, count 0 2006.232.07:36:29.09#ibcon#wrote, iclass 24, count 0 2006.232.07:36:29.09#ibcon#about to read 3, iclass 24, count 0 2006.232.07:36:29.11#ibcon#read 3, iclass 24, count 0 2006.232.07:36:29.11#ibcon#about to read 4, iclass 24, count 0 2006.232.07:36:29.11#ibcon#read 4, iclass 24, count 0 2006.232.07:36:29.11#ibcon#about to read 5, iclass 24, count 0 2006.232.07:36:29.11#ibcon#read 5, iclass 24, count 0 2006.232.07:36:29.11#ibcon#about to read 6, iclass 24, count 0 2006.232.07:36:29.11#ibcon#read 6, iclass 24, count 0 2006.232.07:36:29.11#ibcon#end of sib2, iclass 24, count 0 2006.232.07:36:29.11#ibcon#*mode == 0, iclass 24, count 0 2006.232.07:36:29.11#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.232.07:36:29.11#ibcon#[25=USB\r\n] 2006.232.07:36:29.11#ibcon#*before write, iclass 24, count 0 2006.232.07:36:29.11#ibcon#enter sib2, iclass 24, count 0 2006.232.07:36:29.11#ibcon#flushed, iclass 24, count 0 2006.232.07:36:29.11#ibcon#about to write, iclass 24, count 0 2006.232.07:36:29.12#ibcon#wrote, iclass 24, count 0 2006.232.07:36:29.12#ibcon#about to read 3, iclass 24, count 0 2006.232.07:36:29.14#ibcon#read 3, iclass 24, count 0 2006.232.07:36:29.14#ibcon#about to read 4, iclass 24, count 0 2006.232.07:36:29.14#ibcon#read 4, iclass 24, count 0 2006.232.07:36:29.14#ibcon#about to read 5, iclass 24, count 0 2006.232.07:36:29.14#ibcon#read 5, iclass 24, count 0 2006.232.07:36:29.14#ibcon#about to read 6, iclass 24, count 0 2006.232.07:36:29.14#ibcon#read 6, iclass 24, count 0 2006.232.07:36:29.14#ibcon#end of sib2, iclass 24, count 0 2006.232.07:36:29.14#ibcon#*after write, iclass 24, count 0 2006.232.07:36:29.14#ibcon#*before return 0, iclass 24, count 0 2006.232.07:36:29.14#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.232.07:36:29.14#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.232.07:36:29.14#ibcon#about to clear, iclass 24 cls_cnt 0 2006.232.07:36:29.14#ibcon#cleared, iclass 24 cls_cnt 0 2006.232.07:36:29.15$vc4f8/valo=5,652.99 2006.232.07:36:29.15#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.232.07:36:29.15#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.232.07:36:29.15#ibcon#ireg 17 cls_cnt 0 2006.232.07:36:29.15#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.232.07:36:29.15#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.232.07:36:29.15#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.232.07:36:29.15#ibcon#enter wrdev, iclass 26, count 0 2006.232.07:36:29.15#ibcon#first serial, iclass 26, count 0 2006.232.07:36:29.15#ibcon#enter sib2, iclass 26, count 0 2006.232.07:36:29.15#ibcon#flushed, iclass 26, count 0 2006.232.07:36:29.15#ibcon#about to write, iclass 26, count 0 2006.232.07:36:29.15#ibcon#wrote, iclass 26, count 0 2006.232.07:36:29.15#ibcon#about to read 3, iclass 26, count 0 2006.232.07:36:29.16#ibcon#read 3, iclass 26, count 0 2006.232.07:36:29.16#ibcon#about to read 4, iclass 26, count 0 2006.232.07:36:29.16#ibcon#read 4, iclass 26, count 0 2006.232.07:36:29.16#ibcon#about to read 5, iclass 26, count 0 2006.232.07:36:29.16#ibcon#read 5, iclass 26, count 0 2006.232.07:36:29.16#ibcon#about to read 6, iclass 26, count 0 2006.232.07:36:29.16#ibcon#read 6, iclass 26, count 0 2006.232.07:36:29.16#ibcon#end of sib2, iclass 26, count 0 2006.232.07:36:29.16#ibcon#*mode == 0, iclass 26, count 0 2006.232.07:36:29.16#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.232.07:36:29.16#ibcon#[26=FRQ=05,652.99\r\n] 2006.232.07:36:29.16#ibcon#*before write, iclass 26, count 0 2006.232.07:36:29.16#ibcon#enter sib2, iclass 26, count 0 2006.232.07:36:29.16#ibcon#flushed, iclass 26, count 0 2006.232.07:36:29.17#ibcon#about to write, iclass 26, count 0 2006.232.07:36:29.17#ibcon#wrote, iclass 26, count 0 2006.232.07:36:29.17#ibcon#about to read 3, iclass 26, count 0 2006.232.07:36:29.20#ibcon#read 3, iclass 26, count 0 2006.232.07:36:29.20#ibcon#about to read 4, iclass 26, count 0 2006.232.07:36:29.20#ibcon#read 4, iclass 26, count 0 2006.232.07:36:29.20#ibcon#about to read 5, iclass 26, count 0 2006.232.07:36:29.20#ibcon#read 5, iclass 26, count 0 2006.232.07:36:29.20#ibcon#about to read 6, iclass 26, count 0 2006.232.07:36:29.20#ibcon#read 6, iclass 26, count 0 2006.232.07:36:29.20#ibcon#end of sib2, iclass 26, count 0 2006.232.07:36:29.20#ibcon#*after write, iclass 26, count 0 2006.232.07:36:29.20#ibcon#*before return 0, iclass 26, count 0 2006.232.07:36:29.20#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.232.07:36:29.20#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.232.07:36:29.20#ibcon#about to clear, iclass 26 cls_cnt 0 2006.232.07:36:29.21#ibcon#cleared, iclass 26 cls_cnt 0 2006.232.07:36:29.21$vc4f8/va=5,7 2006.232.07:36:29.21#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.232.07:36:29.21#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.232.07:36:29.21#ibcon#ireg 11 cls_cnt 2 2006.232.07:36:29.21#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.232.07:36:29.25#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.232.07:36:29.25#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.232.07:36:29.25#ibcon#enter wrdev, iclass 28, count 2 2006.232.07:36:29.25#ibcon#first serial, iclass 28, count 2 2006.232.07:36:29.25#ibcon#enter sib2, iclass 28, count 2 2006.232.07:36:29.25#ibcon#flushed, iclass 28, count 2 2006.232.07:36:29.25#ibcon#about to write, iclass 28, count 2 2006.232.07:36:29.25#ibcon#wrote, iclass 28, count 2 2006.232.07:36:29.25#ibcon#about to read 3, iclass 28, count 2 2006.232.07:36:29.27#ibcon#read 3, iclass 28, count 2 2006.232.07:36:29.27#ibcon#about to read 4, iclass 28, count 2 2006.232.07:36:29.27#ibcon#read 4, iclass 28, count 2 2006.232.07:36:29.27#ibcon#about to read 5, iclass 28, count 2 2006.232.07:36:29.27#ibcon#read 5, iclass 28, count 2 2006.232.07:36:29.27#ibcon#about to read 6, iclass 28, count 2 2006.232.07:36:29.27#ibcon#read 6, iclass 28, count 2 2006.232.07:36:29.27#ibcon#end of sib2, iclass 28, count 2 2006.232.07:36:29.27#ibcon#*mode == 0, iclass 28, count 2 2006.232.07:36:29.27#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.232.07:36:29.27#ibcon#[25=AT05-07\r\n] 2006.232.07:36:29.27#ibcon#*before write, iclass 28, count 2 2006.232.07:36:29.28#ibcon#enter sib2, iclass 28, count 2 2006.232.07:36:29.28#ibcon#flushed, iclass 28, count 2 2006.232.07:36:29.28#ibcon#about to write, iclass 28, count 2 2006.232.07:36:29.28#ibcon#wrote, iclass 28, count 2 2006.232.07:36:29.28#ibcon#about to read 3, iclass 28, count 2 2006.232.07:36:29.30#ibcon#read 3, iclass 28, count 2 2006.232.07:36:29.30#ibcon#about to read 4, iclass 28, count 2 2006.232.07:36:29.30#ibcon#read 4, iclass 28, count 2 2006.232.07:36:29.30#ibcon#about to read 5, iclass 28, count 2 2006.232.07:36:29.30#ibcon#read 5, iclass 28, count 2 2006.232.07:36:29.30#ibcon#about to read 6, iclass 28, count 2 2006.232.07:36:29.30#ibcon#read 6, iclass 28, count 2 2006.232.07:36:29.30#ibcon#end of sib2, iclass 28, count 2 2006.232.07:36:29.30#ibcon#*after write, iclass 28, count 2 2006.232.07:36:29.30#ibcon#*before return 0, iclass 28, count 2 2006.232.07:36:29.30#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.232.07:36:29.30#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.232.07:36:29.30#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.232.07:36:29.31#ibcon#ireg 7 cls_cnt 0 2006.232.07:36:29.31#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.232.07:36:29.41#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.232.07:36:29.41#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.232.07:36:29.41#ibcon#enter wrdev, iclass 28, count 0 2006.232.07:36:29.41#ibcon#first serial, iclass 28, count 0 2006.232.07:36:29.41#ibcon#enter sib2, iclass 28, count 0 2006.232.07:36:29.41#ibcon#flushed, iclass 28, count 0 2006.232.07:36:29.41#ibcon#about to write, iclass 28, count 0 2006.232.07:36:29.41#ibcon#wrote, iclass 28, count 0 2006.232.07:36:29.41#ibcon#about to read 3, iclass 28, count 0 2006.232.07:36:29.43#ibcon#read 3, iclass 28, count 0 2006.232.07:36:29.43#ibcon#about to read 4, iclass 28, count 0 2006.232.07:36:29.43#ibcon#read 4, iclass 28, count 0 2006.232.07:36:29.43#ibcon#about to read 5, iclass 28, count 0 2006.232.07:36:29.43#ibcon#read 5, iclass 28, count 0 2006.232.07:36:29.43#ibcon#about to read 6, iclass 28, count 0 2006.232.07:36:29.43#ibcon#read 6, iclass 28, count 0 2006.232.07:36:29.43#ibcon#end of sib2, iclass 28, count 0 2006.232.07:36:29.43#ibcon#*mode == 0, iclass 28, count 0 2006.232.07:36:29.43#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.232.07:36:29.43#ibcon#[25=USB\r\n] 2006.232.07:36:29.43#ibcon#*before write, iclass 28, count 0 2006.232.07:36:29.43#ibcon#enter sib2, iclass 28, count 0 2006.232.07:36:29.43#ibcon#flushed, iclass 28, count 0 2006.232.07:36:29.43#ibcon#about to write, iclass 28, count 0 2006.232.07:36:29.44#ibcon#wrote, iclass 28, count 0 2006.232.07:36:29.44#ibcon#about to read 3, iclass 28, count 0 2006.232.07:36:29.47#ibcon#read 3, iclass 28, count 0 2006.232.07:36:29.47#ibcon#about to read 4, iclass 28, count 0 2006.232.07:36:29.47#ibcon#read 4, iclass 28, count 0 2006.232.07:36:29.47#ibcon#about to read 5, iclass 28, count 0 2006.232.07:36:29.47#ibcon#read 5, iclass 28, count 0 2006.232.07:36:29.47#ibcon#about to read 6, iclass 28, count 0 2006.232.07:36:29.47#ibcon#read 6, iclass 28, count 0 2006.232.07:36:29.47#ibcon#end of sib2, iclass 28, count 0 2006.232.07:36:29.47#ibcon#*after write, iclass 28, count 0 2006.232.07:36:29.47#ibcon#*before return 0, iclass 28, count 0 2006.232.07:36:29.47#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.232.07:36:29.47#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.232.07:36:29.47#ibcon#about to clear, iclass 28 cls_cnt 0 2006.232.07:36:29.47#ibcon#cleared, iclass 28 cls_cnt 0 2006.232.07:36:29.47$vc4f8/valo=6,772.99 2006.232.07:36:29.47#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.232.07:36:29.47#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.232.07:36:29.47#ibcon#ireg 17 cls_cnt 0 2006.232.07:36:29.47#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.232.07:36:29.47#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.232.07:36:29.47#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.232.07:36:29.47#ibcon#enter wrdev, iclass 30, count 0 2006.232.07:36:29.47#ibcon#first serial, iclass 30, count 0 2006.232.07:36:29.47#ibcon#enter sib2, iclass 30, count 0 2006.232.07:36:29.47#ibcon#flushed, iclass 30, count 0 2006.232.07:36:29.47#ibcon#about to write, iclass 30, count 0 2006.232.07:36:29.47#ibcon#wrote, iclass 30, count 0 2006.232.07:36:29.47#ibcon#about to read 3, iclass 30, count 0 2006.232.07:36:29.48#ibcon#read 3, iclass 30, count 0 2006.232.07:36:29.48#ibcon#about to read 4, iclass 30, count 0 2006.232.07:36:29.48#ibcon#read 4, iclass 30, count 0 2006.232.07:36:29.48#ibcon#about to read 5, iclass 30, count 0 2006.232.07:36:29.48#ibcon#read 5, iclass 30, count 0 2006.232.07:36:29.48#ibcon#about to read 6, iclass 30, count 0 2006.232.07:36:29.48#ibcon#read 6, iclass 30, count 0 2006.232.07:36:29.48#ibcon#end of sib2, iclass 30, count 0 2006.232.07:36:29.48#ibcon#*mode == 0, iclass 30, count 0 2006.232.07:36:29.48#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.232.07:36:29.48#ibcon#[26=FRQ=06,772.99\r\n] 2006.232.07:36:29.48#ibcon#*before write, iclass 30, count 0 2006.232.07:36:29.48#ibcon#enter sib2, iclass 30, count 0 2006.232.07:36:29.48#ibcon#flushed, iclass 30, count 0 2006.232.07:36:29.49#ibcon#about to write, iclass 30, count 0 2006.232.07:36:29.49#ibcon#wrote, iclass 30, count 0 2006.232.07:36:29.49#ibcon#about to read 3, iclass 30, count 0 2006.232.07:36:29.52#ibcon#read 3, iclass 30, count 0 2006.232.07:36:29.52#ibcon#about to read 4, iclass 30, count 0 2006.232.07:36:29.52#ibcon#read 4, iclass 30, count 0 2006.232.07:36:29.52#ibcon#about to read 5, iclass 30, count 0 2006.232.07:36:29.52#ibcon#read 5, iclass 30, count 0 2006.232.07:36:29.52#ibcon#about to read 6, iclass 30, count 0 2006.232.07:36:29.52#ibcon#read 6, iclass 30, count 0 2006.232.07:36:29.52#ibcon#end of sib2, iclass 30, count 0 2006.232.07:36:29.52#ibcon#*after write, iclass 30, count 0 2006.232.07:36:29.52#ibcon#*before return 0, iclass 30, count 0 2006.232.07:36:29.52#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.232.07:36:29.52#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.232.07:36:29.52#ibcon#about to clear, iclass 30 cls_cnt 0 2006.232.07:36:29.52#ibcon#cleared, iclass 30 cls_cnt 0 2006.232.07:36:29.53$vc4f8/va=6,6 2006.232.07:36:29.53#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.232.07:36:29.53#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.232.07:36:29.53#ibcon#ireg 11 cls_cnt 2 2006.232.07:36:29.53#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.232.07:36:29.58#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.232.07:36:29.58#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.232.07:36:29.58#ibcon#enter wrdev, iclass 32, count 2 2006.232.07:36:29.58#ibcon#first serial, iclass 32, count 2 2006.232.07:36:29.58#ibcon#enter sib2, iclass 32, count 2 2006.232.07:36:29.58#ibcon#flushed, iclass 32, count 2 2006.232.07:36:29.58#ibcon#about to write, iclass 32, count 2 2006.232.07:36:29.58#ibcon#wrote, iclass 32, count 2 2006.232.07:36:29.58#ibcon#about to read 3, iclass 32, count 2 2006.232.07:36:29.60#ibcon#read 3, iclass 32, count 2 2006.232.07:36:29.60#ibcon#about to read 4, iclass 32, count 2 2006.232.07:36:29.60#ibcon#read 4, iclass 32, count 2 2006.232.07:36:29.60#ibcon#about to read 5, iclass 32, count 2 2006.232.07:36:29.60#ibcon#read 5, iclass 32, count 2 2006.232.07:36:29.60#ibcon#about to read 6, iclass 32, count 2 2006.232.07:36:29.60#ibcon#read 6, iclass 32, count 2 2006.232.07:36:29.60#ibcon#end of sib2, iclass 32, count 2 2006.232.07:36:29.60#ibcon#*mode == 0, iclass 32, count 2 2006.232.07:36:29.60#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.232.07:36:29.60#ibcon#[25=AT06-06\r\n] 2006.232.07:36:29.60#ibcon#*before write, iclass 32, count 2 2006.232.07:36:29.60#ibcon#enter sib2, iclass 32, count 2 2006.232.07:36:29.60#ibcon#flushed, iclass 32, count 2 2006.232.07:36:29.60#ibcon#about to write, iclass 32, count 2 2006.232.07:36:29.61#ibcon#wrote, iclass 32, count 2 2006.232.07:36:29.61#ibcon#about to read 3, iclass 32, count 2 2006.232.07:36:29.63#ibcon#read 3, iclass 32, count 2 2006.232.07:36:29.63#ibcon#about to read 4, iclass 32, count 2 2006.232.07:36:29.63#ibcon#read 4, iclass 32, count 2 2006.232.07:36:29.63#ibcon#about to read 5, iclass 32, count 2 2006.232.07:36:29.63#ibcon#read 5, iclass 32, count 2 2006.232.07:36:29.63#ibcon#about to read 6, iclass 32, count 2 2006.232.07:36:29.63#ibcon#read 6, iclass 32, count 2 2006.232.07:36:29.63#ibcon#end of sib2, iclass 32, count 2 2006.232.07:36:29.63#ibcon#*after write, iclass 32, count 2 2006.232.07:36:29.63#ibcon#*before return 0, iclass 32, count 2 2006.232.07:36:29.63#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.232.07:36:29.63#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.232.07:36:29.63#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.232.07:36:29.64#ibcon#ireg 7 cls_cnt 0 2006.232.07:36:29.64#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.232.07:36:29.74#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.232.07:36:29.74#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.232.07:36:29.74#ibcon#enter wrdev, iclass 32, count 0 2006.232.07:36:29.74#ibcon#first serial, iclass 32, count 0 2006.232.07:36:29.74#ibcon#enter sib2, iclass 32, count 0 2006.232.07:36:29.74#ibcon#flushed, iclass 32, count 0 2006.232.07:36:29.74#ibcon#about to write, iclass 32, count 0 2006.232.07:36:29.74#ibcon#wrote, iclass 32, count 0 2006.232.07:36:29.74#ibcon#about to read 3, iclass 32, count 0 2006.232.07:36:29.76#ibcon#read 3, iclass 32, count 0 2006.232.07:36:29.76#ibcon#about to read 4, iclass 32, count 0 2006.232.07:36:29.76#ibcon#read 4, iclass 32, count 0 2006.232.07:36:29.76#ibcon#about to read 5, iclass 32, count 0 2006.232.07:36:29.76#ibcon#read 5, iclass 32, count 0 2006.232.07:36:29.76#ibcon#about to read 6, iclass 32, count 0 2006.232.07:36:29.76#ibcon#read 6, iclass 32, count 0 2006.232.07:36:29.76#ibcon#end of sib2, iclass 32, count 0 2006.232.07:36:29.76#ibcon#*mode == 0, iclass 32, count 0 2006.232.07:36:29.76#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.232.07:36:29.76#ibcon#[25=USB\r\n] 2006.232.07:36:29.76#ibcon#*before write, iclass 32, count 0 2006.232.07:36:29.76#ibcon#enter sib2, iclass 32, count 0 2006.232.07:36:29.76#ibcon#flushed, iclass 32, count 0 2006.232.07:36:29.76#ibcon#about to write, iclass 32, count 0 2006.232.07:36:29.77#ibcon#wrote, iclass 32, count 0 2006.232.07:36:29.77#ibcon#about to read 3, iclass 32, count 0 2006.232.07:36:29.79#ibcon#read 3, iclass 32, count 0 2006.232.07:36:29.79#ibcon#about to read 4, iclass 32, count 0 2006.232.07:36:29.79#ibcon#read 4, iclass 32, count 0 2006.232.07:36:29.79#ibcon#about to read 5, iclass 32, count 0 2006.232.07:36:29.79#ibcon#read 5, iclass 32, count 0 2006.232.07:36:29.79#ibcon#about to read 6, iclass 32, count 0 2006.232.07:36:29.79#ibcon#read 6, iclass 32, count 0 2006.232.07:36:29.79#ibcon#end of sib2, iclass 32, count 0 2006.232.07:36:29.79#ibcon#*after write, iclass 32, count 0 2006.232.07:36:29.79#ibcon#*before return 0, iclass 32, count 0 2006.232.07:36:29.79#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.232.07:36:29.79#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.232.07:36:29.79#ibcon#about to clear, iclass 32 cls_cnt 0 2006.232.07:36:29.79#ibcon#cleared, iclass 32 cls_cnt 0 2006.232.07:36:29.80$vc4f8/valo=7,832.99 2006.232.07:36:29.80#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.232.07:36:29.80#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.232.07:36:29.80#ibcon#ireg 17 cls_cnt 0 2006.232.07:36:29.80#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.232.07:36:29.80#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.232.07:36:29.80#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.232.07:36:29.80#ibcon#enter wrdev, iclass 34, count 0 2006.232.07:36:29.80#ibcon#first serial, iclass 34, count 0 2006.232.07:36:29.80#ibcon#enter sib2, iclass 34, count 0 2006.232.07:36:29.80#ibcon#flushed, iclass 34, count 0 2006.232.07:36:29.80#ibcon#about to write, iclass 34, count 0 2006.232.07:36:29.80#ibcon#wrote, iclass 34, count 0 2006.232.07:36:29.80#ibcon#about to read 3, iclass 34, count 0 2006.232.07:36:29.81#ibcon#read 3, iclass 34, count 0 2006.232.07:36:29.81#ibcon#about to read 4, iclass 34, count 0 2006.232.07:36:29.81#ibcon#read 4, iclass 34, count 0 2006.232.07:36:29.81#ibcon#about to read 5, iclass 34, count 0 2006.232.07:36:29.81#ibcon#read 5, iclass 34, count 0 2006.232.07:36:29.81#ibcon#about to read 6, iclass 34, count 0 2006.232.07:36:29.81#ibcon#read 6, iclass 34, count 0 2006.232.07:36:29.81#ibcon#end of sib2, iclass 34, count 0 2006.232.07:36:29.81#ibcon#*mode == 0, iclass 34, count 0 2006.232.07:36:29.81#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.232.07:36:29.81#ibcon#[26=FRQ=07,832.99\r\n] 2006.232.07:36:29.81#ibcon#*before write, iclass 34, count 0 2006.232.07:36:29.81#ibcon#enter sib2, iclass 34, count 0 2006.232.07:36:29.81#ibcon#flushed, iclass 34, count 0 2006.232.07:36:29.81#ibcon#about to write, iclass 34, count 0 2006.232.07:36:29.82#ibcon#wrote, iclass 34, count 0 2006.232.07:36:29.82#ibcon#about to read 3, iclass 34, count 0 2006.232.07:36:29.85#ibcon#read 3, iclass 34, count 0 2006.232.07:36:29.85#ibcon#about to read 4, iclass 34, count 0 2006.232.07:36:29.85#ibcon#read 4, iclass 34, count 0 2006.232.07:36:29.85#ibcon#about to read 5, iclass 34, count 0 2006.232.07:36:29.85#ibcon#read 5, iclass 34, count 0 2006.232.07:36:29.85#ibcon#about to read 6, iclass 34, count 0 2006.232.07:36:29.85#ibcon#read 6, iclass 34, count 0 2006.232.07:36:29.85#ibcon#end of sib2, iclass 34, count 0 2006.232.07:36:29.85#ibcon#*after write, iclass 34, count 0 2006.232.07:36:29.85#ibcon#*before return 0, iclass 34, count 0 2006.232.07:36:29.85#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.232.07:36:29.85#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.232.07:36:29.85#ibcon#about to clear, iclass 34 cls_cnt 0 2006.232.07:36:29.86#ibcon#cleared, iclass 34 cls_cnt 0 2006.232.07:36:29.86$vc4f8/va=7,6 2006.232.07:36:29.86#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.232.07:36:29.86#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.232.07:36:29.86#ibcon#ireg 11 cls_cnt 2 2006.232.07:36:29.86#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.232.07:36:29.90#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.232.07:36:29.90#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.232.07:36:29.90#ibcon#enter wrdev, iclass 36, count 2 2006.232.07:36:29.90#ibcon#first serial, iclass 36, count 2 2006.232.07:36:29.90#ibcon#enter sib2, iclass 36, count 2 2006.232.07:36:29.90#ibcon#flushed, iclass 36, count 2 2006.232.07:36:29.90#ibcon#about to write, iclass 36, count 2 2006.232.07:36:29.90#ibcon#wrote, iclass 36, count 2 2006.232.07:36:29.90#ibcon#about to read 3, iclass 36, count 2 2006.232.07:36:29.92#ibcon#read 3, iclass 36, count 2 2006.232.07:36:29.92#ibcon#about to read 4, iclass 36, count 2 2006.232.07:36:29.92#ibcon#read 4, iclass 36, count 2 2006.232.07:36:29.92#ibcon#about to read 5, iclass 36, count 2 2006.232.07:36:29.92#ibcon#read 5, iclass 36, count 2 2006.232.07:36:29.92#ibcon#about to read 6, iclass 36, count 2 2006.232.07:36:29.92#ibcon#read 6, iclass 36, count 2 2006.232.07:36:29.92#ibcon#end of sib2, iclass 36, count 2 2006.232.07:36:29.92#ibcon#*mode == 0, iclass 36, count 2 2006.232.07:36:29.92#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.232.07:36:29.92#ibcon#[25=AT07-06\r\n] 2006.232.07:36:29.93#ibcon#*before write, iclass 36, count 2 2006.232.07:36:29.93#ibcon#enter sib2, iclass 36, count 2 2006.232.07:36:29.93#ibcon#flushed, iclass 36, count 2 2006.232.07:36:29.93#ibcon#about to write, iclass 36, count 2 2006.232.07:36:29.93#ibcon#wrote, iclass 36, count 2 2006.232.07:36:29.93#ibcon#about to read 3, iclass 36, count 2 2006.232.07:36:29.95#ibcon#read 3, iclass 36, count 2 2006.232.07:36:29.95#ibcon#about to read 4, iclass 36, count 2 2006.232.07:36:29.95#ibcon#read 4, iclass 36, count 2 2006.232.07:36:29.95#ibcon#about to read 5, iclass 36, count 2 2006.232.07:36:29.95#ibcon#read 5, iclass 36, count 2 2006.232.07:36:29.95#ibcon#about to read 6, iclass 36, count 2 2006.232.07:36:29.95#ibcon#read 6, iclass 36, count 2 2006.232.07:36:29.95#ibcon#end of sib2, iclass 36, count 2 2006.232.07:36:29.95#ibcon#*after write, iclass 36, count 2 2006.232.07:36:29.95#ibcon#*before return 0, iclass 36, count 2 2006.232.07:36:29.95#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.232.07:36:29.95#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.232.07:36:29.95#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.232.07:36:29.96#ibcon#ireg 7 cls_cnt 0 2006.232.07:36:29.96#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.232.07:36:30.06#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.232.07:36:30.06#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.232.07:36:30.06#ibcon#enter wrdev, iclass 36, count 0 2006.232.07:36:30.06#ibcon#first serial, iclass 36, count 0 2006.232.07:36:30.06#ibcon#enter sib2, iclass 36, count 0 2006.232.07:36:30.06#ibcon#flushed, iclass 36, count 0 2006.232.07:36:30.06#ibcon#about to write, iclass 36, count 0 2006.232.07:36:30.06#ibcon#wrote, iclass 36, count 0 2006.232.07:36:30.06#ibcon#about to read 3, iclass 36, count 0 2006.232.07:36:30.08#ibcon#read 3, iclass 36, count 0 2006.232.07:36:30.08#ibcon#about to read 4, iclass 36, count 0 2006.232.07:36:30.08#ibcon#read 4, iclass 36, count 0 2006.232.07:36:30.08#ibcon#about to read 5, iclass 36, count 0 2006.232.07:36:30.08#ibcon#read 5, iclass 36, count 0 2006.232.07:36:30.08#ibcon#about to read 6, iclass 36, count 0 2006.232.07:36:30.08#ibcon#read 6, iclass 36, count 0 2006.232.07:36:30.08#ibcon#end of sib2, iclass 36, count 0 2006.232.07:36:30.08#ibcon#*mode == 0, iclass 36, count 0 2006.232.07:36:30.08#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.232.07:36:30.08#ibcon#[25=USB\r\n] 2006.232.07:36:30.08#ibcon#*before write, iclass 36, count 0 2006.232.07:36:30.08#ibcon#enter sib2, iclass 36, count 0 2006.232.07:36:30.08#ibcon#flushed, iclass 36, count 0 2006.232.07:36:30.08#ibcon#about to write, iclass 36, count 0 2006.232.07:36:30.09#ibcon#wrote, iclass 36, count 0 2006.232.07:36:30.09#ibcon#about to read 3, iclass 36, count 0 2006.232.07:36:30.11#ibcon#read 3, iclass 36, count 0 2006.232.07:36:30.11#ibcon#about to read 4, iclass 36, count 0 2006.232.07:36:30.11#ibcon#read 4, iclass 36, count 0 2006.232.07:36:30.11#ibcon#about to read 5, iclass 36, count 0 2006.232.07:36:30.11#ibcon#read 5, iclass 36, count 0 2006.232.07:36:30.11#ibcon#about to read 6, iclass 36, count 0 2006.232.07:36:30.11#ibcon#read 6, iclass 36, count 0 2006.232.07:36:30.11#ibcon#end of sib2, iclass 36, count 0 2006.232.07:36:30.11#ibcon#*after write, iclass 36, count 0 2006.232.07:36:30.11#ibcon#*before return 0, iclass 36, count 0 2006.232.07:36:30.11#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.232.07:36:30.11#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.232.07:36:30.11#ibcon#about to clear, iclass 36 cls_cnt 0 2006.232.07:36:30.11#ibcon#cleared, iclass 36 cls_cnt 0 2006.232.07:36:30.12$vc4f8/valo=8,852.99 2006.232.07:36:30.12#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.232.07:36:30.12#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.232.07:36:30.12#ibcon#ireg 17 cls_cnt 0 2006.232.07:36:30.12#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.232.07:36:30.12#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.232.07:36:30.12#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.232.07:36:30.12#ibcon#enter wrdev, iclass 38, count 0 2006.232.07:36:30.12#ibcon#first serial, iclass 38, count 0 2006.232.07:36:30.12#ibcon#enter sib2, iclass 38, count 0 2006.232.07:36:30.12#ibcon#flushed, iclass 38, count 0 2006.232.07:36:30.12#ibcon#about to write, iclass 38, count 0 2006.232.07:36:30.12#ibcon#wrote, iclass 38, count 0 2006.232.07:36:30.12#ibcon#about to read 3, iclass 38, count 0 2006.232.07:36:30.13#ibcon#read 3, iclass 38, count 0 2006.232.07:36:30.13#ibcon#about to read 4, iclass 38, count 0 2006.232.07:36:30.13#ibcon#read 4, iclass 38, count 0 2006.232.07:36:30.13#ibcon#about to read 5, iclass 38, count 0 2006.232.07:36:30.13#ibcon#read 5, iclass 38, count 0 2006.232.07:36:30.13#ibcon#about to read 6, iclass 38, count 0 2006.232.07:36:30.13#ibcon#read 6, iclass 38, count 0 2006.232.07:36:30.13#ibcon#end of sib2, iclass 38, count 0 2006.232.07:36:30.13#ibcon#*mode == 0, iclass 38, count 0 2006.232.07:36:30.13#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.232.07:36:30.13#ibcon#[26=FRQ=08,852.99\r\n] 2006.232.07:36:30.13#ibcon#*before write, iclass 38, count 0 2006.232.07:36:30.13#ibcon#enter sib2, iclass 38, count 0 2006.232.07:36:30.13#ibcon#flushed, iclass 38, count 0 2006.232.07:36:30.13#ibcon#about to write, iclass 38, count 0 2006.232.07:36:30.14#ibcon#wrote, iclass 38, count 0 2006.232.07:36:30.14#ibcon#about to read 3, iclass 38, count 0 2006.232.07:36:30.17#ibcon#read 3, iclass 38, count 0 2006.232.07:36:30.17#ibcon#about to read 4, iclass 38, count 0 2006.232.07:36:30.17#ibcon#read 4, iclass 38, count 0 2006.232.07:36:30.17#ibcon#about to read 5, iclass 38, count 0 2006.232.07:36:30.17#ibcon#read 5, iclass 38, count 0 2006.232.07:36:30.17#ibcon#about to read 6, iclass 38, count 0 2006.232.07:36:30.17#ibcon#read 6, iclass 38, count 0 2006.232.07:36:30.17#ibcon#end of sib2, iclass 38, count 0 2006.232.07:36:30.17#ibcon#*after write, iclass 38, count 0 2006.232.07:36:30.17#ibcon#*before return 0, iclass 38, count 0 2006.232.07:36:30.17#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.232.07:36:30.17#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.232.07:36:30.17#ibcon#about to clear, iclass 38 cls_cnt 0 2006.232.07:36:30.18#ibcon#cleared, iclass 38 cls_cnt 0 2006.232.07:36:30.18$vc4f8/va=8,6 2006.232.07:36:30.18#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.232.07:36:30.18#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.232.07:36:30.18#ibcon#ireg 11 cls_cnt 2 2006.232.07:36:30.18#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.232.07:36:30.23#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.232.07:36:30.23#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.232.07:36:30.23#ibcon#enter wrdev, iclass 40, count 2 2006.232.07:36:30.23#ibcon#first serial, iclass 40, count 2 2006.232.07:36:30.23#ibcon#enter sib2, iclass 40, count 2 2006.232.07:36:30.23#ibcon#flushed, iclass 40, count 2 2006.232.07:36:30.23#ibcon#about to write, iclass 40, count 2 2006.232.07:36:30.23#ibcon#wrote, iclass 40, count 2 2006.232.07:36:30.23#ibcon#about to read 3, iclass 40, count 2 2006.232.07:36:30.24#ibcon#read 3, iclass 40, count 2 2006.232.07:36:30.24#ibcon#about to read 4, iclass 40, count 2 2006.232.07:36:30.24#ibcon#read 4, iclass 40, count 2 2006.232.07:36:30.24#ibcon#about to read 5, iclass 40, count 2 2006.232.07:36:30.24#ibcon#read 5, iclass 40, count 2 2006.232.07:36:30.24#ibcon#about to read 6, iclass 40, count 2 2006.232.07:36:30.24#ibcon#read 6, iclass 40, count 2 2006.232.07:36:30.24#ibcon#end of sib2, iclass 40, count 2 2006.232.07:36:30.24#ibcon#*mode == 0, iclass 40, count 2 2006.232.07:36:30.24#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.232.07:36:30.24#ibcon#[25=AT08-06\r\n] 2006.232.07:36:30.24#ibcon#*before write, iclass 40, count 2 2006.232.07:36:30.24#ibcon#enter sib2, iclass 40, count 2 2006.232.07:36:30.25#ibcon#flushed, iclass 40, count 2 2006.232.07:36:30.25#ibcon#about to write, iclass 40, count 2 2006.232.07:36:30.25#ibcon#wrote, iclass 40, count 2 2006.232.07:36:30.25#ibcon#about to read 3, iclass 40, count 2 2006.232.07:36:30.27#ibcon#read 3, iclass 40, count 2 2006.232.07:36:30.27#ibcon#about to read 4, iclass 40, count 2 2006.232.07:36:30.27#ibcon#read 4, iclass 40, count 2 2006.232.07:36:30.27#ibcon#about to read 5, iclass 40, count 2 2006.232.07:36:30.27#ibcon#read 5, iclass 40, count 2 2006.232.07:36:30.27#ibcon#about to read 6, iclass 40, count 2 2006.232.07:36:30.27#ibcon#read 6, iclass 40, count 2 2006.232.07:36:30.27#ibcon#end of sib2, iclass 40, count 2 2006.232.07:36:30.27#ibcon#*after write, iclass 40, count 2 2006.232.07:36:30.27#ibcon#*before return 0, iclass 40, count 2 2006.232.07:36:30.27#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.232.07:36:30.27#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.232.07:36:30.27#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.232.07:36:30.27#ibcon#ireg 7 cls_cnt 0 2006.232.07:36:30.28#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.232.07:36:30.38#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.232.07:36:30.38#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.232.07:36:30.38#ibcon#enter wrdev, iclass 40, count 0 2006.232.07:36:30.38#ibcon#first serial, iclass 40, count 0 2006.232.07:36:30.38#ibcon#enter sib2, iclass 40, count 0 2006.232.07:36:30.38#ibcon#flushed, iclass 40, count 0 2006.232.07:36:30.38#ibcon#about to write, iclass 40, count 0 2006.232.07:36:30.38#ibcon#wrote, iclass 40, count 0 2006.232.07:36:30.38#ibcon#about to read 3, iclass 40, count 0 2006.232.07:36:30.40#ibcon#read 3, iclass 40, count 0 2006.232.07:36:30.40#ibcon#about to read 4, iclass 40, count 0 2006.232.07:36:30.40#ibcon#read 4, iclass 40, count 0 2006.232.07:36:30.40#ibcon#about to read 5, iclass 40, count 0 2006.232.07:36:30.40#ibcon#read 5, iclass 40, count 0 2006.232.07:36:30.40#ibcon#about to read 6, iclass 40, count 0 2006.232.07:36:30.40#ibcon#read 6, iclass 40, count 0 2006.232.07:36:30.40#ibcon#end of sib2, iclass 40, count 0 2006.232.07:36:30.40#ibcon#*mode == 0, iclass 40, count 0 2006.232.07:36:30.40#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.232.07:36:30.40#ibcon#[25=USB\r\n] 2006.232.07:36:30.40#ibcon#*before write, iclass 40, count 0 2006.232.07:36:30.40#ibcon#enter sib2, iclass 40, count 0 2006.232.07:36:30.40#ibcon#flushed, iclass 40, count 0 2006.232.07:36:30.40#ibcon#about to write, iclass 40, count 0 2006.232.07:36:30.41#ibcon#wrote, iclass 40, count 0 2006.232.07:36:30.41#ibcon#about to read 3, iclass 40, count 0 2006.232.07:36:30.43#ibcon#read 3, iclass 40, count 0 2006.232.07:36:30.43#ibcon#about to read 4, iclass 40, count 0 2006.232.07:36:30.43#ibcon#read 4, iclass 40, count 0 2006.232.07:36:30.43#ibcon#about to read 5, iclass 40, count 0 2006.232.07:36:30.43#ibcon#read 5, iclass 40, count 0 2006.232.07:36:30.43#ibcon#about to read 6, iclass 40, count 0 2006.232.07:36:30.43#ibcon#read 6, iclass 40, count 0 2006.232.07:36:30.43#ibcon#end of sib2, iclass 40, count 0 2006.232.07:36:30.43#ibcon#*after write, iclass 40, count 0 2006.232.07:36:30.43#ibcon#*before return 0, iclass 40, count 0 2006.232.07:36:30.43#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.232.07:36:30.43#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.232.07:36:30.43#ibcon#about to clear, iclass 40 cls_cnt 0 2006.232.07:36:30.43#ibcon#cleared, iclass 40 cls_cnt 0 2006.232.07:36:30.44$vc4f8/vblo=1,632.99 2006.232.07:36:30.44#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.232.07:36:30.44#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.232.07:36:30.44#ibcon#ireg 17 cls_cnt 0 2006.232.07:36:30.44#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.232.07:36:30.44#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.232.07:36:30.44#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.232.07:36:30.44#ibcon#enter wrdev, iclass 4, count 0 2006.232.07:36:30.44#ibcon#first serial, iclass 4, count 0 2006.232.07:36:30.44#ibcon#enter sib2, iclass 4, count 0 2006.232.07:36:30.44#ibcon#flushed, iclass 4, count 0 2006.232.07:36:30.44#ibcon#about to write, iclass 4, count 0 2006.232.07:36:30.44#ibcon#wrote, iclass 4, count 0 2006.232.07:36:30.44#ibcon#about to read 3, iclass 4, count 0 2006.232.07:36:30.45#ibcon#read 3, iclass 4, count 0 2006.232.07:36:30.45#ibcon#about to read 4, iclass 4, count 0 2006.232.07:36:30.45#ibcon#read 4, iclass 4, count 0 2006.232.07:36:30.45#ibcon#about to read 5, iclass 4, count 0 2006.232.07:36:30.45#ibcon#read 5, iclass 4, count 0 2006.232.07:36:30.45#ibcon#about to read 6, iclass 4, count 0 2006.232.07:36:30.45#ibcon#read 6, iclass 4, count 0 2006.232.07:36:30.45#ibcon#end of sib2, iclass 4, count 0 2006.232.07:36:30.45#ibcon#*mode == 0, iclass 4, count 0 2006.232.07:36:30.45#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.232.07:36:30.45#ibcon#[28=FRQ=01,632.99\r\n] 2006.232.07:36:30.45#ibcon#*before write, iclass 4, count 0 2006.232.07:36:30.45#ibcon#enter sib2, iclass 4, count 0 2006.232.07:36:30.45#ibcon#flushed, iclass 4, count 0 2006.232.07:36:30.45#ibcon#about to write, iclass 4, count 0 2006.232.07:36:30.46#ibcon#wrote, iclass 4, count 0 2006.232.07:36:30.46#ibcon#about to read 3, iclass 4, count 0 2006.232.07:36:30.49#ibcon#read 3, iclass 4, count 0 2006.232.07:36:30.49#ibcon#about to read 4, iclass 4, count 0 2006.232.07:36:30.49#ibcon#read 4, iclass 4, count 0 2006.232.07:36:30.49#ibcon#about to read 5, iclass 4, count 0 2006.232.07:36:30.49#ibcon#read 5, iclass 4, count 0 2006.232.07:36:30.49#ibcon#about to read 6, iclass 4, count 0 2006.232.07:36:30.49#ibcon#read 6, iclass 4, count 0 2006.232.07:36:30.49#ibcon#end of sib2, iclass 4, count 0 2006.232.07:36:30.49#ibcon#*after write, iclass 4, count 0 2006.232.07:36:30.49#ibcon#*before return 0, iclass 4, count 0 2006.232.07:36:30.49#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.232.07:36:30.49#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.232.07:36:30.49#ibcon#about to clear, iclass 4 cls_cnt 0 2006.232.07:36:30.49#ibcon#cleared, iclass 4 cls_cnt 0 2006.232.07:36:30.50$vc4f8/vb=1,4 2006.232.07:36:30.50#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.232.07:36:30.50#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.232.07:36:30.50#ibcon#ireg 11 cls_cnt 2 2006.232.07:36:30.50#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.232.07:36:30.50#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.232.07:36:30.50#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.232.07:36:30.50#ibcon#enter wrdev, iclass 6, count 2 2006.232.07:36:30.50#ibcon#first serial, iclass 6, count 2 2006.232.07:36:30.50#ibcon#enter sib2, iclass 6, count 2 2006.232.07:36:30.50#ibcon#flushed, iclass 6, count 2 2006.232.07:36:30.50#ibcon#about to write, iclass 6, count 2 2006.232.07:36:30.50#ibcon#wrote, iclass 6, count 2 2006.232.07:36:30.50#ibcon#about to read 3, iclass 6, count 2 2006.232.07:36:30.51#ibcon#read 3, iclass 6, count 2 2006.232.07:36:30.51#ibcon#about to read 4, iclass 6, count 2 2006.232.07:36:30.51#ibcon#read 4, iclass 6, count 2 2006.232.07:36:30.51#ibcon#about to read 5, iclass 6, count 2 2006.232.07:36:30.51#ibcon#read 5, iclass 6, count 2 2006.232.07:36:30.51#ibcon#about to read 6, iclass 6, count 2 2006.232.07:36:30.51#ibcon#read 6, iclass 6, count 2 2006.232.07:36:30.51#ibcon#end of sib2, iclass 6, count 2 2006.232.07:36:30.51#ibcon#*mode == 0, iclass 6, count 2 2006.232.07:36:30.51#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.232.07:36:30.51#ibcon#[27=AT01-04\r\n] 2006.232.07:36:30.51#ibcon#*before write, iclass 6, count 2 2006.232.07:36:30.52#ibcon#enter sib2, iclass 6, count 2 2006.232.07:36:30.52#ibcon#flushed, iclass 6, count 2 2006.232.07:36:30.52#ibcon#about to write, iclass 6, count 2 2006.232.07:36:30.52#ibcon#wrote, iclass 6, count 2 2006.232.07:36:30.52#ibcon#about to read 3, iclass 6, count 2 2006.232.07:36:30.54#ibcon#read 3, iclass 6, count 2 2006.232.07:36:30.54#ibcon#about to read 4, iclass 6, count 2 2006.232.07:36:30.54#ibcon#read 4, iclass 6, count 2 2006.232.07:36:30.54#ibcon#about to read 5, iclass 6, count 2 2006.232.07:36:30.54#ibcon#read 5, iclass 6, count 2 2006.232.07:36:30.54#ibcon#about to read 6, iclass 6, count 2 2006.232.07:36:30.54#ibcon#read 6, iclass 6, count 2 2006.232.07:36:30.54#ibcon#end of sib2, iclass 6, count 2 2006.232.07:36:30.54#ibcon#*after write, iclass 6, count 2 2006.232.07:36:30.54#ibcon#*before return 0, iclass 6, count 2 2006.232.07:36:30.54#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.232.07:36:30.54#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.232.07:36:30.54#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.232.07:36:30.54#ibcon#ireg 7 cls_cnt 0 2006.232.07:36:30.55#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.232.07:36:30.65#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.232.07:36:30.65#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.232.07:36:30.65#ibcon#enter wrdev, iclass 6, count 0 2006.232.07:36:30.65#ibcon#first serial, iclass 6, count 0 2006.232.07:36:30.65#ibcon#enter sib2, iclass 6, count 0 2006.232.07:36:30.65#ibcon#flushed, iclass 6, count 0 2006.232.07:36:30.65#ibcon#about to write, iclass 6, count 0 2006.232.07:36:30.65#ibcon#wrote, iclass 6, count 0 2006.232.07:36:30.65#ibcon#about to read 3, iclass 6, count 0 2006.232.07:36:30.67#ibcon#read 3, iclass 6, count 0 2006.232.07:36:30.67#ibcon#about to read 4, iclass 6, count 0 2006.232.07:36:30.67#ibcon#read 4, iclass 6, count 0 2006.232.07:36:30.67#ibcon#about to read 5, iclass 6, count 0 2006.232.07:36:30.67#ibcon#read 5, iclass 6, count 0 2006.232.07:36:30.67#ibcon#about to read 6, iclass 6, count 0 2006.232.07:36:30.67#ibcon#read 6, iclass 6, count 0 2006.232.07:36:30.67#ibcon#end of sib2, iclass 6, count 0 2006.232.07:36:30.67#ibcon#*mode == 0, iclass 6, count 0 2006.232.07:36:30.67#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.232.07:36:30.67#ibcon#[27=USB\r\n] 2006.232.07:36:30.67#ibcon#*before write, iclass 6, count 0 2006.232.07:36:30.67#ibcon#enter sib2, iclass 6, count 0 2006.232.07:36:30.67#ibcon#flushed, iclass 6, count 0 2006.232.07:36:30.67#ibcon#about to write, iclass 6, count 0 2006.232.07:36:30.68#ibcon#wrote, iclass 6, count 0 2006.232.07:36:30.68#ibcon#about to read 3, iclass 6, count 0 2006.232.07:36:30.70#ibcon#read 3, iclass 6, count 0 2006.232.07:36:30.70#ibcon#about to read 4, iclass 6, count 0 2006.232.07:36:30.70#ibcon#read 4, iclass 6, count 0 2006.232.07:36:30.70#ibcon#about to read 5, iclass 6, count 0 2006.232.07:36:30.70#ibcon#read 5, iclass 6, count 0 2006.232.07:36:30.70#ibcon#about to read 6, iclass 6, count 0 2006.232.07:36:30.70#ibcon#read 6, iclass 6, count 0 2006.232.07:36:30.70#ibcon#end of sib2, iclass 6, count 0 2006.232.07:36:30.70#ibcon#*after write, iclass 6, count 0 2006.232.07:36:30.70#ibcon#*before return 0, iclass 6, count 0 2006.232.07:36:30.70#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.232.07:36:30.70#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.232.07:36:30.70#ibcon#about to clear, iclass 6 cls_cnt 0 2006.232.07:36:30.71#ibcon#cleared, iclass 6 cls_cnt 0 2006.232.07:36:30.71$vc4f8/vblo=2,640.99 2006.232.07:36:30.71#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.232.07:36:30.71#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.232.07:36:30.71#ibcon#ireg 17 cls_cnt 0 2006.232.07:36:30.71#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.232.07:36:30.71#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.232.07:36:30.71#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.232.07:36:30.71#ibcon#enter wrdev, iclass 10, count 0 2006.232.07:36:30.71#ibcon#first serial, iclass 10, count 0 2006.232.07:36:30.71#ibcon#enter sib2, iclass 10, count 0 2006.232.07:36:30.71#ibcon#flushed, iclass 10, count 0 2006.232.07:36:30.71#ibcon#about to write, iclass 10, count 0 2006.232.07:36:30.71#ibcon#wrote, iclass 10, count 0 2006.232.07:36:30.71#ibcon#about to read 3, iclass 10, count 0 2006.232.07:36:30.72#ibcon#read 3, iclass 10, count 0 2006.232.07:36:30.72#ibcon#about to read 4, iclass 10, count 0 2006.232.07:36:30.72#ibcon#read 4, iclass 10, count 0 2006.232.07:36:30.72#ibcon#about to read 5, iclass 10, count 0 2006.232.07:36:30.72#ibcon#read 5, iclass 10, count 0 2006.232.07:36:30.72#ibcon#about to read 6, iclass 10, count 0 2006.232.07:36:30.72#ibcon#read 6, iclass 10, count 0 2006.232.07:36:30.72#ibcon#end of sib2, iclass 10, count 0 2006.232.07:36:30.72#ibcon#*mode == 0, iclass 10, count 0 2006.232.07:36:30.72#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.232.07:36:30.72#ibcon#[28=FRQ=02,640.99\r\n] 2006.232.07:36:30.72#ibcon#*before write, iclass 10, count 0 2006.232.07:36:30.72#ibcon#enter sib2, iclass 10, count 0 2006.232.07:36:30.72#ibcon#flushed, iclass 10, count 0 2006.232.07:36:30.72#ibcon#about to write, iclass 10, count 0 2006.232.07:36:30.73#ibcon#wrote, iclass 10, count 0 2006.232.07:36:30.73#ibcon#about to read 3, iclass 10, count 0 2006.232.07:36:30.76#ibcon#read 3, iclass 10, count 0 2006.232.07:36:30.76#ibcon#about to read 4, iclass 10, count 0 2006.232.07:36:30.76#ibcon#read 4, iclass 10, count 0 2006.232.07:36:30.76#ibcon#about to read 5, iclass 10, count 0 2006.232.07:36:30.76#ibcon#read 5, iclass 10, count 0 2006.232.07:36:30.76#ibcon#about to read 6, iclass 10, count 0 2006.232.07:36:30.76#ibcon#read 6, iclass 10, count 0 2006.232.07:36:30.76#ibcon#end of sib2, iclass 10, count 0 2006.232.07:36:30.76#ibcon#*after write, iclass 10, count 0 2006.232.07:36:30.76#ibcon#*before return 0, iclass 10, count 0 2006.232.07:36:30.76#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.232.07:36:30.76#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.232.07:36:30.76#ibcon#about to clear, iclass 10 cls_cnt 0 2006.232.07:36:30.76#ibcon#cleared, iclass 10 cls_cnt 0 2006.232.07:36:30.77$vc4f8/vb=2,4 2006.232.07:36:30.77#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.232.07:36:30.77#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.232.07:36:30.77#ibcon#ireg 11 cls_cnt 2 2006.232.07:36:30.77#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.232.07:36:30.81#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.232.07:36:30.81#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.232.07:36:30.81#ibcon#enter wrdev, iclass 12, count 2 2006.232.07:36:30.81#ibcon#first serial, iclass 12, count 2 2006.232.07:36:30.81#ibcon#enter sib2, iclass 12, count 2 2006.232.07:36:30.81#ibcon#flushed, iclass 12, count 2 2006.232.07:36:30.81#ibcon#about to write, iclass 12, count 2 2006.232.07:36:30.81#ibcon#wrote, iclass 12, count 2 2006.232.07:36:30.81#ibcon#about to read 3, iclass 12, count 2 2006.232.07:36:30.83#ibcon#read 3, iclass 12, count 2 2006.232.07:36:30.83#ibcon#about to read 4, iclass 12, count 2 2006.232.07:36:30.83#ibcon#read 4, iclass 12, count 2 2006.232.07:36:30.83#ibcon#about to read 5, iclass 12, count 2 2006.232.07:36:30.83#ibcon#read 5, iclass 12, count 2 2006.232.07:36:30.83#ibcon#about to read 6, iclass 12, count 2 2006.232.07:36:30.83#ibcon#read 6, iclass 12, count 2 2006.232.07:36:30.83#ibcon#end of sib2, iclass 12, count 2 2006.232.07:36:30.83#ibcon#*mode == 0, iclass 12, count 2 2006.232.07:36:30.83#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.232.07:36:30.83#ibcon#[27=AT02-04\r\n] 2006.232.07:36:30.83#ibcon#*before write, iclass 12, count 2 2006.232.07:36:30.83#ibcon#enter sib2, iclass 12, count 2 2006.232.07:36:30.83#ibcon#flushed, iclass 12, count 2 2006.232.07:36:30.83#ibcon#about to write, iclass 12, count 2 2006.232.07:36:30.84#ibcon#wrote, iclass 12, count 2 2006.232.07:36:30.84#ibcon#about to read 3, iclass 12, count 2 2006.232.07:36:30.86#ibcon#read 3, iclass 12, count 2 2006.232.07:36:30.86#ibcon#about to read 4, iclass 12, count 2 2006.232.07:36:30.86#ibcon#read 4, iclass 12, count 2 2006.232.07:36:30.86#ibcon#about to read 5, iclass 12, count 2 2006.232.07:36:30.86#ibcon#read 5, iclass 12, count 2 2006.232.07:36:30.86#ibcon#about to read 6, iclass 12, count 2 2006.232.07:36:30.86#ibcon#read 6, iclass 12, count 2 2006.232.07:36:30.86#ibcon#end of sib2, iclass 12, count 2 2006.232.07:36:30.86#ibcon#*after write, iclass 12, count 2 2006.232.07:36:30.86#ibcon#*before return 0, iclass 12, count 2 2006.232.07:36:30.86#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.232.07:36:30.86#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.232.07:36:30.86#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.232.07:36:30.86#ibcon#ireg 7 cls_cnt 0 2006.232.07:36:30.87#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.232.07:36:31.00#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.232.07:36:31.00#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.232.07:36:31.00#ibcon#enter wrdev, iclass 12, count 0 2006.232.07:36:31.00#ibcon#first serial, iclass 12, count 0 2006.232.07:36:31.00#ibcon#enter sib2, iclass 12, count 0 2006.232.07:36:31.00#ibcon#flushed, iclass 12, count 0 2006.232.07:36:31.00#ibcon#about to write, iclass 12, count 0 2006.232.07:36:31.00#ibcon#wrote, iclass 12, count 0 2006.232.07:36:31.00#ibcon#about to read 3, iclass 12, count 0 2006.232.07:36:31.02#ibcon#read 3, iclass 12, count 0 2006.232.07:36:31.02#ibcon#about to read 4, iclass 12, count 0 2006.232.07:36:31.02#ibcon#read 4, iclass 12, count 0 2006.232.07:36:31.02#ibcon#about to read 5, iclass 12, count 0 2006.232.07:36:31.02#ibcon#read 5, iclass 12, count 0 2006.232.07:36:31.02#ibcon#about to read 6, iclass 12, count 0 2006.232.07:36:31.02#ibcon#read 6, iclass 12, count 0 2006.232.07:36:31.02#ibcon#end of sib2, iclass 12, count 0 2006.232.07:36:31.02#ibcon#*mode == 0, iclass 12, count 0 2006.232.07:36:31.02#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.232.07:36:31.02#ibcon#[27=USB\r\n] 2006.232.07:36:31.02#ibcon#*before write, iclass 12, count 0 2006.232.07:36:31.02#ibcon#enter sib2, iclass 12, count 0 2006.232.07:36:31.02#ibcon#flushed, iclass 12, count 0 2006.232.07:36:31.02#ibcon#about to write, iclass 12, count 0 2006.232.07:36:31.02#ibcon#wrote, iclass 12, count 0 2006.232.07:36:31.02#ibcon#about to read 3, iclass 12, count 0 2006.232.07:36:31.04#ibcon#read 3, iclass 12, count 0 2006.232.07:36:31.04#ibcon#about to read 4, iclass 12, count 0 2006.232.07:36:31.04#ibcon#read 4, iclass 12, count 0 2006.232.07:36:31.04#ibcon#about to read 5, iclass 12, count 0 2006.232.07:36:31.04#ibcon#read 5, iclass 12, count 0 2006.232.07:36:31.04#ibcon#about to read 6, iclass 12, count 0 2006.232.07:36:31.04#ibcon#read 6, iclass 12, count 0 2006.232.07:36:31.04#ibcon#end of sib2, iclass 12, count 0 2006.232.07:36:31.04#ibcon#*after write, iclass 12, count 0 2006.232.07:36:31.04#ibcon#*before return 0, iclass 12, count 0 2006.232.07:36:31.04#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.232.07:36:31.05#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.232.07:36:31.05#ibcon#about to clear, iclass 12 cls_cnt 0 2006.232.07:36:31.05#ibcon#cleared, iclass 12 cls_cnt 0 2006.232.07:36:31.05$vc4f8/vblo=3,656.99 2006.232.07:36:31.05#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.232.07:36:31.05#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.232.07:36:31.05#ibcon#ireg 17 cls_cnt 0 2006.232.07:36:31.05#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.232.07:36:31.05#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.232.07:36:31.05#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.232.07:36:31.05#ibcon#enter wrdev, iclass 14, count 0 2006.232.07:36:31.05#ibcon#first serial, iclass 14, count 0 2006.232.07:36:31.05#ibcon#enter sib2, iclass 14, count 0 2006.232.07:36:31.05#ibcon#flushed, iclass 14, count 0 2006.232.07:36:31.05#ibcon#about to write, iclass 14, count 0 2006.232.07:36:31.05#ibcon#wrote, iclass 14, count 0 2006.232.07:36:31.05#ibcon#about to read 3, iclass 14, count 0 2006.232.07:36:31.06#ibcon#read 3, iclass 14, count 0 2006.232.07:36:31.06#ibcon#about to read 4, iclass 14, count 0 2006.232.07:36:31.06#ibcon#read 4, iclass 14, count 0 2006.232.07:36:31.06#ibcon#about to read 5, iclass 14, count 0 2006.232.07:36:31.06#ibcon#read 5, iclass 14, count 0 2006.232.07:36:31.06#ibcon#about to read 6, iclass 14, count 0 2006.232.07:36:31.06#ibcon#read 6, iclass 14, count 0 2006.232.07:36:31.06#ibcon#end of sib2, iclass 14, count 0 2006.232.07:36:31.06#ibcon#*mode == 0, iclass 14, count 0 2006.232.07:36:31.06#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.232.07:36:31.06#ibcon#[28=FRQ=03,656.99\r\n] 2006.232.07:36:31.06#ibcon#*before write, iclass 14, count 0 2006.232.07:36:31.07#ibcon#enter sib2, iclass 14, count 0 2006.232.07:36:31.07#ibcon#flushed, iclass 14, count 0 2006.232.07:36:31.07#ibcon#about to write, iclass 14, count 0 2006.232.07:36:31.07#ibcon#wrote, iclass 14, count 0 2006.232.07:36:31.07#ibcon#about to read 3, iclass 14, count 0 2006.232.07:36:31.11#ibcon#read 3, iclass 14, count 0 2006.232.07:36:31.11#ibcon#about to read 4, iclass 14, count 0 2006.232.07:36:31.11#ibcon#read 4, iclass 14, count 0 2006.232.07:36:31.11#ibcon#about to read 5, iclass 14, count 0 2006.232.07:36:31.11#ibcon#read 5, iclass 14, count 0 2006.232.07:36:31.11#ibcon#about to read 6, iclass 14, count 0 2006.232.07:36:31.11#ibcon#read 6, iclass 14, count 0 2006.232.07:36:31.11#ibcon#end of sib2, iclass 14, count 0 2006.232.07:36:31.11#ibcon#*after write, iclass 14, count 0 2006.232.07:36:31.11#ibcon#*before return 0, iclass 14, count 0 2006.232.07:36:31.11#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.232.07:36:31.11#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.232.07:36:31.11#ibcon#about to clear, iclass 14 cls_cnt 0 2006.232.07:36:31.11#ibcon#cleared, iclass 14 cls_cnt 0 2006.232.07:36:31.11$vc4f8/vb=3,4 2006.232.07:36:31.11#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.232.07:36:31.11#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.232.07:36:31.11#ibcon#ireg 11 cls_cnt 2 2006.232.07:36:31.11#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.232.07:36:31.16#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.232.07:36:31.16#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.232.07:36:31.16#ibcon#enter wrdev, iclass 16, count 2 2006.232.07:36:31.16#ibcon#first serial, iclass 16, count 2 2006.232.07:36:31.16#ibcon#enter sib2, iclass 16, count 2 2006.232.07:36:31.16#ibcon#flushed, iclass 16, count 2 2006.232.07:36:31.16#ibcon#about to write, iclass 16, count 2 2006.232.07:36:31.16#ibcon#wrote, iclass 16, count 2 2006.232.07:36:31.16#ibcon#about to read 3, iclass 16, count 2 2006.232.07:36:31.18#ibcon#read 3, iclass 16, count 2 2006.232.07:36:31.18#ibcon#about to read 4, iclass 16, count 2 2006.232.07:36:31.18#ibcon#read 4, iclass 16, count 2 2006.232.07:36:31.18#ibcon#about to read 5, iclass 16, count 2 2006.232.07:36:31.18#ibcon#read 5, iclass 16, count 2 2006.232.07:36:31.18#ibcon#about to read 6, iclass 16, count 2 2006.232.07:36:31.18#ibcon#read 6, iclass 16, count 2 2006.232.07:36:31.18#ibcon#end of sib2, iclass 16, count 2 2006.232.07:36:31.18#ibcon#*mode == 0, iclass 16, count 2 2006.232.07:36:31.18#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.232.07:36:31.18#ibcon#[27=AT03-04\r\n] 2006.232.07:36:31.18#ibcon#*before write, iclass 16, count 2 2006.232.07:36:31.18#ibcon#enter sib2, iclass 16, count 2 2006.232.07:36:31.18#ibcon#flushed, iclass 16, count 2 2006.232.07:36:31.18#ibcon#about to write, iclass 16, count 2 2006.232.07:36:31.19#ibcon#wrote, iclass 16, count 2 2006.232.07:36:31.19#ibcon#about to read 3, iclass 16, count 2 2006.232.07:36:31.21#ibcon#read 3, iclass 16, count 2 2006.232.07:36:31.21#ibcon#about to read 4, iclass 16, count 2 2006.232.07:36:31.21#ibcon#read 4, iclass 16, count 2 2006.232.07:36:31.21#ibcon#about to read 5, iclass 16, count 2 2006.232.07:36:31.21#ibcon#read 5, iclass 16, count 2 2006.232.07:36:31.21#ibcon#about to read 6, iclass 16, count 2 2006.232.07:36:31.21#ibcon#read 6, iclass 16, count 2 2006.232.07:36:31.21#ibcon#end of sib2, iclass 16, count 2 2006.232.07:36:31.21#ibcon#*after write, iclass 16, count 2 2006.232.07:36:31.21#ibcon#*before return 0, iclass 16, count 2 2006.232.07:36:31.21#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.232.07:36:31.21#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.232.07:36:31.21#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.232.07:36:31.21#ibcon#ireg 7 cls_cnt 0 2006.232.07:36:31.21#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.232.07:36:31.33#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.232.07:36:31.33#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.232.07:36:31.33#ibcon#enter wrdev, iclass 16, count 0 2006.232.07:36:31.33#ibcon#first serial, iclass 16, count 0 2006.232.07:36:31.33#ibcon#enter sib2, iclass 16, count 0 2006.232.07:36:31.33#ibcon#flushed, iclass 16, count 0 2006.232.07:36:31.33#ibcon#about to write, iclass 16, count 0 2006.232.07:36:31.33#ibcon#wrote, iclass 16, count 0 2006.232.07:36:31.33#ibcon#about to read 3, iclass 16, count 0 2006.232.07:36:31.35#ibcon#read 3, iclass 16, count 0 2006.232.07:36:31.35#ibcon#about to read 4, iclass 16, count 0 2006.232.07:36:31.35#ibcon#read 4, iclass 16, count 0 2006.232.07:36:31.35#ibcon#about to read 5, iclass 16, count 0 2006.232.07:36:31.35#ibcon#read 5, iclass 16, count 0 2006.232.07:36:31.35#ibcon#about to read 6, iclass 16, count 0 2006.232.07:36:31.35#ibcon#read 6, iclass 16, count 0 2006.232.07:36:31.35#ibcon#end of sib2, iclass 16, count 0 2006.232.07:36:31.35#ibcon#*mode == 0, iclass 16, count 0 2006.232.07:36:31.35#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.232.07:36:31.35#ibcon#[27=USB\r\n] 2006.232.07:36:31.35#ibcon#*before write, iclass 16, count 0 2006.232.07:36:31.35#ibcon#enter sib2, iclass 16, count 0 2006.232.07:36:31.35#ibcon#flushed, iclass 16, count 0 2006.232.07:36:31.35#ibcon#about to write, iclass 16, count 0 2006.232.07:36:31.36#ibcon#wrote, iclass 16, count 0 2006.232.07:36:31.36#ibcon#about to read 3, iclass 16, count 0 2006.232.07:36:31.38#ibcon#read 3, iclass 16, count 0 2006.232.07:36:31.38#ibcon#about to read 4, iclass 16, count 0 2006.232.07:36:31.38#ibcon#read 4, iclass 16, count 0 2006.232.07:36:31.38#ibcon#about to read 5, iclass 16, count 0 2006.232.07:36:31.38#ibcon#read 5, iclass 16, count 0 2006.232.07:36:31.38#ibcon#about to read 6, iclass 16, count 0 2006.232.07:36:31.38#ibcon#read 6, iclass 16, count 0 2006.232.07:36:31.38#ibcon#end of sib2, iclass 16, count 0 2006.232.07:36:31.38#ibcon#*after write, iclass 16, count 0 2006.232.07:36:31.38#ibcon#*before return 0, iclass 16, count 0 2006.232.07:36:31.38#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.232.07:36:31.38#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.232.07:36:31.38#ibcon#about to clear, iclass 16 cls_cnt 0 2006.232.07:36:31.38#ibcon#cleared, iclass 16 cls_cnt 0 2006.232.07:36:31.39$vc4f8/vblo=4,712.99 2006.232.07:36:31.39#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.232.07:36:31.39#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.232.07:36:31.39#ibcon#ireg 17 cls_cnt 0 2006.232.07:36:31.39#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.232.07:36:31.39#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.232.07:36:31.39#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.232.07:36:31.39#ibcon#enter wrdev, iclass 18, count 0 2006.232.07:36:31.39#ibcon#first serial, iclass 18, count 0 2006.232.07:36:31.39#ibcon#enter sib2, iclass 18, count 0 2006.232.07:36:31.39#ibcon#flushed, iclass 18, count 0 2006.232.07:36:31.39#ibcon#about to write, iclass 18, count 0 2006.232.07:36:31.39#ibcon#wrote, iclass 18, count 0 2006.232.07:36:31.39#ibcon#about to read 3, iclass 18, count 0 2006.232.07:36:31.40#ibcon#read 3, iclass 18, count 0 2006.232.07:36:31.40#ibcon#about to read 4, iclass 18, count 0 2006.232.07:36:31.40#ibcon#read 4, iclass 18, count 0 2006.232.07:36:31.40#ibcon#about to read 5, iclass 18, count 0 2006.232.07:36:31.40#ibcon#read 5, iclass 18, count 0 2006.232.07:36:31.40#ibcon#about to read 6, iclass 18, count 0 2006.232.07:36:31.40#ibcon#read 6, iclass 18, count 0 2006.232.07:36:31.40#ibcon#end of sib2, iclass 18, count 0 2006.232.07:36:31.40#ibcon#*mode == 0, iclass 18, count 0 2006.232.07:36:31.40#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.232.07:36:31.40#ibcon#[28=FRQ=04,712.99\r\n] 2006.232.07:36:31.40#ibcon#*before write, iclass 18, count 0 2006.232.07:36:31.40#ibcon#enter sib2, iclass 18, count 0 2006.232.07:36:31.40#ibcon#flushed, iclass 18, count 0 2006.232.07:36:31.40#ibcon#about to write, iclass 18, count 0 2006.232.07:36:31.41#ibcon#wrote, iclass 18, count 0 2006.232.07:36:31.41#ibcon#about to read 3, iclass 18, count 0 2006.232.07:36:31.44#ibcon#read 3, iclass 18, count 0 2006.232.07:36:31.44#ibcon#about to read 4, iclass 18, count 0 2006.232.07:36:31.44#ibcon#read 4, iclass 18, count 0 2006.232.07:36:31.44#ibcon#about to read 5, iclass 18, count 0 2006.232.07:36:31.44#ibcon#read 5, iclass 18, count 0 2006.232.07:36:31.44#ibcon#about to read 6, iclass 18, count 0 2006.232.07:36:31.44#ibcon#read 6, iclass 18, count 0 2006.232.07:36:31.44#ibcon#end of sib2, iclass 18, count 0 2006.232.07:36:31.44#ibcon#*after write, iclass 18, count 0 2006.232.07:36:31.44#ibcon#*before return 0, iclass 18, count 0 2006.232.07:36:31.44#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.232.07:36:31.44#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.232.07:36:31.45#ibcon#about to clear, iclass 18 cls_cnt 0 2006.232.07:36:31.45#ibcon#cleared, iclass 18 cls_cnt 0 2006.232.07:36:31.45$vc4f8/vb=4,4 2006.232.07:36:31.45#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.232.07:36:31.45#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.232.07:36:31.45#ibcon#ireg 11 cls_cnt 2 2006.232.07:36:31.45#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.232.07:36:31.49#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.232.07:36:31.49#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.232.07:36:31.49#ibcon#enter wrdev, iclass 20, count 2 2006.232.07:36:31.49#ibcon#first serial, iclass 20, count 2 2006.232.07:36:31.49#ibcon#enter sib2, iclass 20, count 2 2006.232.07:36:31.49#ibcon#flushed, iclass 20, count 2 2006.232.07:36:31.49#ibcon#about to write, iclass 20, count 2 2006.232.07:36:31.49#ibcon#wrote, iclass 20, count 2 2006.232.07:36:31.49#ibcon#about to read 3, iclass 20, count 2 2006.232.07:36:31.51#ibcon#read 3, iclass 20, count 2 2006.232.07:36:31.51#ibcon#about to read 4, iclass 20, count 2 2006.232.07:36:31.51#ibcon#read 4, iclass 20, count 2 2006.232.07:36:31.51#ibcon#about to read 5, iclass 20, count 2 2006.232.07:36:31.51#ibcon#read 5, iclass 20, count 2 2006.232.07:36:31.51#ibcon#about to read 6, iclass 20, count 2 2006.232.07:36:31.51#ibcon#read 6, iclass 20, count 2 2006.232.07:36:31.51#ibcon#end of sib2, iclass 20, count 2 2006.232.07:36:31.51#ibcon#*mode == 0, iclass 20, count 2 2006.232.07:36:31.51#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.232.07:36:31.51#ibcon#[27=AT04-04\r\n] 2006.232.07:36:31.51#ibcon#*before write, iclass 20, count 2 2006.232.07:36:31.51#ibcon#enter sib2, iclass 20, count 2 2006.232.07:36:31.51#ibcon#flushed, iclass 20, count 2 2006.232.07:36:31.51#ibcon#about to write, iclass 20, count 2 2006.232.07:36:31.52#ibcon#wrote, iclass 20, count 2 2006.232.07:36:31.52#ibcon#about to read 3, iclass 20, count 2 2006.232.07:36:31.54#ibcon#read 3, iclass 20, count 2 2006.232.07:36:31.54#ibcon#about to read 4, iclass 20, count 2 2006.232.07:36:31.54#ibcon#read 4, iclass 20, count 2 2006.232.07:36:31.54#ibcon#about to read 5, iclass 20, count 2 2006.232.07:36:31.54#ibcon#read 5, iclass 20, count 2 2006.232.07:36:31.54#ibcon#about to read 6, iclass 20, count 2 2006.232.07:36:31.54#ibcon#read 6, iclass 20, count 2 2006.232.07:36:31.54#ibcon#end of sib2, iclass 20, count 2 2006.232.07:36:31.54#ibcon#*after write, iclass 20, count 2 2006.232.07:36:31.54#ibcon#*before return 0, iclass 20, count 2 2006.232.07:36:31.54#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.232.07:36:31.54#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.232.07:36:31.54#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.232.07:36:31.54#ibcon#ireg 7 cls_cnt 0 2006.232.07:36:31.54#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.232.07:36:31.66#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.232.07:36:31.66#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.232.07:36:31.66#ibcon#enter wrdev, iclass 20, count 0 2006.232.07:36:31.66#ibcon#first serial, iclass 20, count 0 2006.232.07:36:31.66#ibcon#enter sib2, iclass 20, count 0 2006.232.07:36:31.66#ibcon#flushed, iclass 20, count 0 2006.232.07:36:31.66#ibcon#about to write, iclass 20, count 0 2006.232.07:36:31.66#ibcon#wrote, iclass 20, count 0 2006.232.07:36:31.66#ibcon#about to read 3, iclass 20, count 0 2006.232.07:36:31.68#ibcon#read 3, iclass 20, count 0 2006.232.07:36:31.68#ibcon#about to read 4, iclass 20, count 0 2006.232.07:36:31.68#ibcon#read 4, iclass 20, count 0 2006.232.07:36:31.68#ibcon#about to read 5, iclass 20, count 0 2006.232.07:36:31.68#ibcon#read 5, iclass 20, count 0 2006.232.07:36:31.68#ibcon#about to read 6, iclass 20, count 0 2006.232.07:36:31.68#ibcon#read 6, iclass 20, count 0 2006.232.07:36:31.68#ibcon#end of sib2, iclass 20, count 0 2006.232.07:36:31.68#ibcon#*mode == 0, iclass 20, count 0 2006.232.07:36:31.68#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.232.07:36:31.68#ibcon#[27=USB\r\n] 2006.232.07:36:31.68#ibcon#*before write, iclass 20, count 0 2006.232.07:36:31.68#ibcon#enter sib2, iclass 20, count 0 2006.232.07:36:31.68#ibcon#flushed, iclass 20, count 0 2006.232.07:36:31.68#ibcon#about to write, iclass 20, count 0 2006.232.07:36:31.69#ibcon#wrote, iclass 20, count 0 2006.232.07:36:31.69#ibcon#about to read 3, iclass 20, count 0 2006.232.07:36:31.71#ibcon#read 3, iclass 20, count 0 2006.232.07:36:31.71#ibcon#about to read 4, iclass 20, count 0 2006.232.07:36:31.71#ibcon#read 4, iclass 20, count 0 2006.232.07:36:31.71#ibcon#about to read 5, iclass 20, count 0 2006.232.07:36:31.71#ibcon#read 5, iclass 20, count 0 2006.232.07:36:31.71#ibcon#about to read 6, iclass 20, count 0 2006.232.07:36:31.71#ibcon#read 6, iclass 20, count 0 2006.232.07:36:31.71#ibcon#end of sib2, iclass 20, count 0 2006.232.07:36:31.71#ibcon#*after write, iclass 20, count 0 2006.232.07:36:31.71#ibcon#*before return 0, iclass 20, count 0 2006.232.07:36:31.71#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.232.07:36:31.71#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.232.07:36:31.71#ibcon#about to clear, iclass 20 cls_cnt 0 2006.232.07:36:31.71#ibcon#cleared, iclass 20 cls_cnt 0 2006.232.07:36:31.72$vc4f8/vblo=5,744.99 2006.232.07:36:31.72#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.232.07:36:31.72#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.232.07:36:31.72#ibcon#ireg 17 cls_cnt 0 2006.232.07:36:31.72#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.232.07:36:31.72#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.232.07:36:31.72#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.232.07:36:31.72#ibcon#enter wrdev, iclass 22, count 0 2006.232.07:36:31.72#ibcon#first serial, iclass 22, count 0 2006.232.07:36:31.72#ibcon#enter sib2, iclass 22, count 0 2006.232.07:36:31.72#ibcon#flushed, iclass 22, count 0 2006.232.07:36:31.72#ibcon#about to write, iclass 22, count 0 2006.232.07:36:31.72#ibcon#wrote, iclass 22, count 0 2006.232.07:36:31.72#ibcon#about to read 3, iclass 22, count 0 2006.232.07:36:31.73#ibcon#read 3, iclass 22, count 0 2006.232.07:36:31.73#ibcon#about to read 4, iclass 22, count 0 2006.232.07:36:31.73#ibcon#read 4, iclass 22, count 0 2006.232.07:36:31.73#ibcon#about to read 5, iclass 22, count 0 2006.232.07:36:31.73#ibcon#read 5, iclass 22, count 0 2006.232.07:36:31.73#ibcon#about to read 6, iclass 22, count 0 2006.232.07:36:31.73#ibcon#read 6, iclass 22, count 0 2006.232.07:36:31.73#ibcon#end of sib2, iclass 22, count 0 2006.232.07:36:31.73#ibcon#*mode == 0, iclass 22, count 0 2006.232.07:36:31.73#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.232.07:36:31.73#ibcon#[28=FRQ=05,744.99\r\n] 2006.232.07:36:31.73#ibcon#*before write, iclass 22, count 0 2006.232.07:36:31.73#ibcon#enter sib2, iclass 22, count 0 2006.232.07:36:31.73#ibcon#flushed, iclass 22, count 0 2006.232.07:36:31.73#ibcon#about to write, iclass 22, count 0 2006.232.07:36:31.74#ibcon#wrote, iclass 22, count 0 2006.232.07:36:31.74#ibcon#about to read 3, iclass 22, count 0 2006.232.07:36:31.78#ibcon#read 3, iclass 22, count 0 2006.232.07:36:31.78#ibcon#about to read 4, iclass 22, count 0 2006.232.07:36:31.78#ibcon#read 4, iclass 22, count 0 2006.232.07:36:31.78#ibcon#about to read 5, iclass 22, count 0 2006.232.07:36:31.78#ibcon#read 5, iclass 22, count 0 2006.232.07:36:31.78#ibcon#about to read 6, iclass 22, count 0 2006.232.07:36:31.78#ibcon#read 6, iclass 22, count 0 2006.232.07:36:31.78#ibcon#end of sib2, iclass 22, count 0 2006.232.07:36:31.78#ibcon#*after write, iclass 22, count 0 2006.232.07:36:31.78#ibcon#*before return 0, iclass 22, count 0 2006.232.07:36:31.78#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.232.07:36:31.78#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.232.07:36:31.78#ibcon#about to clear, iclass 22 cls_cnt 0 2006.232.07:36:31.78#ibcon#cleared, iclass 22 cls_cnt 0 2006.232.07:36:31.78$vc4f8/vb=5,3 2006.232.07:36:31.78#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.232.07:36:31.78#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.232.07:36:31.78#ibcon#ireg 11 cls_cnt 2 2006.232.07:36:31.78#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.232.07:36:31.82#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.232.07:36:31.82#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.232.07:36:31.82#ibcon#enter wrdev, iclass 24, count 2 2006.232.07:36:31.82#ibcon#first serial, iclass 24, count 2 2006.232.07:36:31.82#ibcon#enter sib2, iclass 24, count 2 2006.232.07:36:31.82#ibcon#flushed, iclass 24, count 2 2006.232.07:36:31.82#ibcon#about to write, iclass 24, count 2 2006.232.07:36:31.82#ibcon#wrote, iclass 24, count 2 2006.232.07:36:31.82#ibcon#about to read 3, iclass 24, count 2 2006.232.07:36:31.84#ibcon#read 3, iclass 24, count 2 2006.232.07:36:31.84#ibcon#about to read 4, iclass 24, count 2 2006.232.07:36:31.84#ibcon#read 4, iclass 24, count 2 2006.232.07:36:31.85#ibcon#about to read 5, iclass 24, count 2 2006.232.07:36:31.85#ibcon#read 5, iclass 24, count 2 2006.232.07:36:31.85#ibcon#about to read 6, iclass 24, count 2 2006.232.07:36:31.85#ibcon#read 6, iclass 24, count 2 2006.232.07:36:31.85#ibcon#end of sib2, iclass 24, count 2 2006.232.07:36:31.85#ibcon#*mode == 0, iclass 24, count 2 2006.232.07:36:31.85#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.232.07:36:31.85#ibcon#[27=AT05-03\r\n] 2006.232.07:36:31.85#ibcon#*before write, iclass 24, count 2 2006.232.07:36:31.85#ibcon#enter sib2, iclass 24, count 2 2006.232.07:36:31.85#ibcon#flushed, iclass 24, count 2 2006.232.07:36:31.85#ibcon#about to write, iclass 24, count 2 2006.232.07:36:31.85#ibcon#wrote, iclass 24, count 2 2006.232.07:36:31.85#ibcon#about to read 3, iclass 24, count 2 2006.232.07:36:31.87#abcon#<5=/05 2.9 5.5 29.47 861007.2\r\n> 2006.232.07:36:31.88#ibcon#read 3, iclass 24, count 2 2006.232.07:36:31.88#ibcon#about to read 4, iclass 24, count 2 2006.232.07:36:31.88#ibcon#read 4, iclass 24, count 2 2006.232.07:36:31.88#ibcon#about to read 5, iclass 24, count 2 2006.232.07:36:31.88#ibcon#read 5, iclass 24, count 2 2006.232.07:36:31.88#ibcon#about to read 6, iclass 24, count 2 2006.232.07:36:31.88#ibcon#read 6, iclass 24, count 2 2006.232.07:36:31.88#ibcon#end of sib2, iclass 24, count 2 2006.232.07:36:31.88#ibcon#*after write, iclass 24, count 2 2006.232.07:36:31.88#ibcon#*before return 0, iclass 24, count 2 2006.232.07:36:31.88#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.232.07:36:31.88#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.232.07:36:31.88#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.232.07:36:31.88#ibcon#ireg 7 cls_cnt 0 2006.232.07:36:31.88#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.232.07:36:31.89#abcon#{5=INTERFACE CLEAR} 2006.232.07:36:31.94#abcon#[5=S1D000X0/0*\r\n] 2006.232.07:36:31.99#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.232.07:36:31.99#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.232.07:36:31.99#ibcon#enter wrdev, iclass 24, count 0 2006.232.07:36:31.99#ibcon#first serial, iclass 24, count 0 2006.232.07:36:31.99#ibcon#enter sib2, iclass 24, count 0 2006.232.07:36:31.99#ibcon#flushed, iclass 24, count 0 2006.232.07:36:31.99#ibcon#about to write, iclass 24, count 0 2006.232.07:36:31.99#ibcon#wrote, iclass 24, count 0 2006.232.07:36:31.99#ibcon#about to read 3, iclass 24, count 0 2006.232.07:36:32.01#ibcon#read 3, iclass 24, count 0 2006.232.07:36:32.01#ibcon#about to read 4, iclass 24, count 0 2006.232.07:36:32.01#ibcon#read 4, iclass 24, count 0 2006.232.07:36:32.01#ibcon#about to read 5, iclass 24, count 0 2006.232.07:36:32.01#ibcon#read 5, iclass 24, count 0 2006.232.07:36:32.01#ibcon#about to read 6, iclass 24, count 0 2006.232.07:36:32.01#ibcon#read 6, iclass 24, count 0 2006.232.07:36:32.01#ibcon#end of sib2, iclass 24, count 0 2006.232.07:36:32.01#ibcon#*mode == 0, iclass 24, count 0 2006.232.07:36:32.01#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.232.07:36:32.01#ibcon#[27=USB\r\n] 2006.232.07:36:32.01#ibcon#*before write, iclass 24, count 0 2006.232.07:36:32.01#ibcon#enter sib2, iclass 24, count 0 2006.232.07:36:32.01#ibcon#flushed, iclass 24, count 0 2006.232.07:36:32.01#ibcon#about to write, iclass 24, count 0 2006.232.07:36:32.02#ibcon#wrote, iclass 24, count 0 2006.232.07:36:32.02#ibcon#about to read 3, iclass 24, count 0 2006.232.07:36:32.04#ibcon#read 3, iclass 24, count 0 2006.232.07:36:32.04#ibcon#about to read 4, iclass 24, count 0 2006.232.07:36:32.04#ibcon#read 4, iclass 24, count 0 2006.232.07:36:32.04#ibcon#about to read 5, iclass 24, count 0 2006.232.07:36:32.04#ibcon#read 5, iclass 24, count 0 2006.232.07:36:32.04#ibcon#about to read 6, iclass 24, count 0 2006.232.07:36:32.04#ibcon#read 6, iclass 24, count 0 2006.232.07:36:32.04#ibcon#end of sib2, iclass 24, count 0 2006.232.07:36:32.04#ibcon#*after write, iclass 24, count 0 2006.232.07:36:32.04#ibcon#*before return 0, iclass 24, count 0 2006.232.07:36:32.04#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.232.07:36:32.04#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.232.07:36:32.04#ibcon#about to clear, iclass 24 cls_cnt 0 2006.232.07:36:32.04#ibcon#cleared, iclass 24 cls_cnt 0 2006.232.07:36:32.05$vc4f8/vblo=6,752.99 2006.232.07:36:32.05#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.232.07:36:32.05#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.232.07:36:32.05#ibcon#ireg 17 cls_cnt 0 2006.232.07:36:32.05#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.232.07:36:32.05#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.232.07:36:32.05#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.232.07:36:32.05#ibcon#enter wrdev, iclass 30, count 0 2006.232.07:36:32.05#ibcon#first serial, iclass 30, count 0 2006.232.07:36:32.05#ibcon#enter sib2, iclass 30, count 0 2006.232.07:36:32.05#ibcon#flushed, iclass 30, count 0 2006.232.07:36:32.05#ibcon#about to write, iclass 30, count 0 2006.232.07:36:32.05#ibcon#wrote, iclass 30, count 0 2006.232.07:36:32.05#ibcon#about to read 3, iclass 30, count 0 2006.232.07:36:32.06#ibcon#read 3, iclass 30, count 0 2006.232.07:36:32.06#ibcon#about to read 4, iclass 30, count 0 2006.232.07:36:32.06#ibcon#read 4, iclass 30, count 0 2006.232.07:36:32.06#ibcon#about to read 5, iclass 30, count 0 2006.232.07:36:32.06#ibcon#read 5, iclass 30, count 0 2006.232.07:36:32.06#ibcon#about to read 6, iclass 30, count 0 2006.232.07:36:32.06#ibcon#read 6, iclass 30, count 0 2006.232.07:36:32.06#ibcon#end of sib2, iclass 30, count 0 2006.232.07:36:32.06#ibcon#*mode == 0, iclass 30, count 0 2006.232.07:36:32.06#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.232.07:36:32.06#ibcon#[28=FRQ=06,752.99\r\n] 2006.232.07:36:32.06#ibcon#*before write, iclass 30, count 0 2006.232.07:36:32.06#ibcon#enter sib2, iclass 30, count 0 2006.232.07:36:32.06#ibcon#flushed, iclass 30, count 0 2006.232.07:36:32.06#ibcon#about to write, iclass 30, count 0 2006.232.07:36:32.07#ibcon#wrote, iclass 30, count 0 2006.232.07:36:32.07#ibcon#about to read 3, iclass 30, count 0 2006.232.07:36:32.10#ibcon#read 3, iclass 30, count 0 2006.232.07:36:32.10#ibcon#about to read 4, iclass 30, count 0 2006.232.07:36:32.10#ibcon#read 4, iclass 30, count 0 2006.232.07:36:32.10#ibcon#about to read 5, iclass 30, count 0 2006.232.07:36:32.10#ibcon#read 5, iclass 30, count 0 2006.232.07:36:32.10#ibcon#about to read 6, iclass 30, count 0 2006.232.07:36:32.10#ibcon#read 6, iclass 30, count 0 2006.232.07:36:32.10#ibcon#end of sib2, iclass 30, count 0 2006.232.07:36:32.10#ibcon#*after write, iclass 30, count 0 2006.232.07:36:32.10#ibcon#*before return 0, iclass 30, count 0 2006.232.07:36:32.10#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.232.07:36:32.10#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.232.07:36:32.10#ibcon#about to clear, iclass 30 cls_cnt 0 2006.232.07:36:32.10#ibcon#cleared, iclass 30 cls_cnt 0 2006.232.07:36:32.11$vc4f8/vb=6,4 2006.232.07:36:32.11#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.232.07:36:32.11#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.232.07:36:32.11#ibcon#ireg 11 cls_cnt 2 2006.232.07:36:32.11#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.232.07:36:32.15#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.232.07:36:32.15#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.232.07:36:32.15#ibcon#enter wrdev, iclass 32, count 2 2006.232.07:36:32.15#ibcon#first serial, iclass 32, count 2 2006.232.07:36:32.15#ibcon#enter sib2, iclass 32, count 2 2006.232.07:36:32.15#ibcon#flushed, iclass 32, count 2 2006.232.07:36:32.15#ibcon#about to write, iclass 32, count 2 2006.232.07:36:32.15#ibcon#wrote, iclass 32, count 2 2006.232.07:36:32.15#ibcon#about to read 3, iclass 32, count 2 2006.232.07:36:32.17#ibcon#read 3, iclass 32, count 2 2006.232.07:36:32.17#ibcon#about to read 4, iclass 32, count 2 2006.232.07:36:32.17#ibcon#read 4, iclass 32, count 2 2006.232.07:36:32.17#ibcon#about to read 5, iclass 32, count 2 2006.232.07:36:32.17#ibcon#read 5, iclass 32, count 2 2006.232.07:36:32.17#ibcon#about to read 6, iclass 32, count 2 2006.232.07:36:32.17#ibcon#read 6, iclass 32, count 2 2006.232.07:36:32.17#ibcon#end of sib2, iclass 32, count 2 2006.232.07:36:32.17#ibcon#*mode == 0, iclass 32, count 2 2006.232.07:36:32.17#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.232.07:36:32.17#ibcon#[27=AT06-04\r\n] 2006.232.07:36:32.17#ibcon#*before write, iclass 32, count 2 2006.232.07:36:32.17#ibcon#enter sib2, iclass 32, count 2 2006.232.07:36:32.17#ibcon#flushed, iclass 32, count 2 2006.232.07:36:32.17#ibcon#about to write, iclass 32, count 2 2006.232.07:36:32.18#ibcon#wrote, iclass 32, count 2 2006.232.07:36:32.18#ibcon#about to read 3, iclass 32, count 2 2006.232.07:36:32.20#ibcon#read 3, iclass 32, count 2 2006.232.07:36:32.20#ibcon#about to read 4, iclass 32, count 2 2006.232.07:36:32.20#ibcon#read 4, iclass 32, count 2 2006.232.07:36:32.20#ibcon#about to read 5, iclass 32, count 2 2006.232.07:36:32.20#ibcon#read 5, iclass 32, count 2 2006.232.07:36:32.20#ibcon#about to read 6, iclass 32, count 2 2006.232.07:36:32.20#ibcon#read 6, iclass 32, count 2 2006.232.07:36:32.20#ibcon#end of sib2, iclass 32, count 2 2006.232.07:36:32.20#ibcon#*after write, iclass 32, count 2 2006.232.07:36:32.20#ibcon#*before return 0, iclass 32, count 2 2006.232.07:36:32.20#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.232.07:36:32.20#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.232.07:36:32.20#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.232.07:36:32.21#ibcon#ireg 7 cls_cnt 0 2006.232.07:36:32.21#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.232.07:36:32.31#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.232.07:36:32.31#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.232.07:36:32.31#ibcon#enter wrdev, iclass 32, count 0 2006.232.07:36:32.31#ibcon#first serial, iclass 32, count 0 2006.232.07:36:32.31#ibcon#enter sib2, iclass 32, count 0 2006.232.07:36:32.31#ibcon#flushed, iclass 32, count 0 2006.232.07:36:32.31#ibcon#about to write, iclass 32, count 0 2006.232.07:36:32.31#ibcon#wrote, iclass 32, count 0 2006.232.07:36:32.31#ibcon#about to read 3, iclass 32, count 0 2006.232.07:36:32.33#ibcon#read 3, iclass 32, count 0 2006.232.07:36:32.33#ibcon#about to read 4, iclass 32, count 0 2006.232.07:36:32.33#ibcon#read 4, iclass 32, count 0 2006.232.07:36:32.33#ibcon#about to read 5, iclass 32, count 0 2006.232.07:36:32.33#ibcon#read 5, iclass 32, count 0 2006.232.07:36:32.33#ibcon#about to read 6, iclass 32, count 0 2006.232.07:36:32.33#ibcon#read 6, iclass 32, count 0 2006.232.07:36:32.33#ibcon#end of sib2, iclass 32, count 0 2006.232.07:36:32.33#ibcon#*mode == 0, iclass 32, count 0 2006.232.07:36:32.33#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.232.07:36:32.33#ibcon#[27=USB\r\n] 2006.232.07:36:32.33#ibcon#*before write, iclass 32, count 0 2006.232.07:36:32.33#ibcon#enter sib2, iclass 32, count 0 2006.232.07:36:32.33#ibcon#flushed, iclass 32, count 0 2006.232.07:36:32.33#ibcon#about to write, iclass 32, count 0 2006.232.07:36:32.34#ibcon#wrote, iclass 32, count 0 2006.232.07:36:32.34#ibcon#about to read 3, iclass 32, count 0 2006.232.07:36:32.36#ibcon#read 3, iclass 32, count 0 2006.232.07:36:32.36#ibcon#about to read 4, iclass 32, count 0 2006.232.07:36:32.36#ibcon#read 4, iclass 32, count 0 2006.232.07:36:32.36#ibcon#about to read 5, iclass 32, count 0 2006.232.07:36:32.36#ibcon#read 5, iclass 32, count 0 2006.232.07:36:32.36#ibcon#about to read 6, iclass 32, count 0 2006.232.07:36:32.36#ibcon#read 6, iclass 32, count 0 2006.232.07:36:32.36#ibcon#end of sib2, iclass 32, count 0 2006.232.07:36:32.36#ibcon#*after write, iclass 32, count 0 2006.232.07:36:32.36#ibcon#*before return 0, iclass 32, count 0 2006.232.07:36:32.36#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.232.07:36:32.36#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.232.07:36:32.37#ibcon#about to clear, iclass 32 cls_cnt 0 2006.232.07:36:32.37#ibcon#cleared, iclass 32 cls_cnt 0 2006.232.07:36:32.37$vc4f8/vabw=wide 2006.232.07:36:32.37#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.232.07:36:32.37#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.232.07:36:32.37#ibcon#ireg 8 cls_cnt 0 2006.232.07:36:32.37#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.232.07:36:32.37#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.232.07:36:32.37#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.232.07:36:32.37#ibcon#enter wrdev, iclass 34, count 0 2006.232.07:36:32.37#ibcon#first serial, iclass 34, count 0 2006.232.07:36:32.37#ibcon#enter sib2, iclass 34, count 0 2006.232.07:36:32.37#ibcon#flushed, iclass 34, count 0 2006.232.07:36:32.37#ibcon#about to write, iclass 34, count 0 2006.232.07:36:32.37#ibcon#wrote, iclass 34, count 0 2006.232.07:36:32.37#ibcon#about to read 3, iclass 34, count 0 2006.232.07:36:32.38#ibcon#read 3, iclass 34, count 0 2006.232.07:36:32.38#ibcon#about to read 4, iclass 34, count 0 2006.232.07:36:32.38#ibcon#read 4, iclass 34, count 0 2006.232.07:36:32.38#ibcon#about to read 5, iclass 34, count 0 2006.232.07:36:32.38#ibcon#read 5, iclass 34, count 0 2006.232.07:36:32.38#ibcon#about to read 6, iclass 34, count 0 2006.232.07:36:32.38#ibcon#read 6, iclass 34, count 0 2006.232.07:36:32.38#ibcon#end of sib2, iclass 34, count 0 2006.232.07:36:32.38#ibcon#*mode == 0, iclass 34, count 0 2006.232.07:36:32.38#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.232.07:36:32.38#ibcon#[25=BW32\r\n] 2006.232.07:36:32.38#ibcon#*before write, iclass 34, count 0 2006.232.07:36:32.38#ibcon#enter sib2, iclass 34, count 0 2006.232.07:36:32.38#ibcon#flushed, iclass 34, count 0 2006.232.07:36:32.38#ibcon#about to write, iclass 34, count 0 2006.232.07:36:32.39#ibcon#wrote, iclass 34, count 0 2006.232.07:36:32.39#ibcon#about to read 3, iclass 34, count 0 2006.232.07:36:32.41#ibcon#read 3, iclass 34, count 0 2006.232.07:36:32.41#ibcon#about to read 4, iclass 34, count 0 2006.232.07:36:32.41#ibcon#read 4, iclass 34, count 0 2006.232.07:36:32.41#ibcon#about to read 5, iclass 34, count 0 2006.232.07:36:32.41#ibcon#read 5, iclass 34, count 0 2006.232.07:36:32.41#ibcon#about to read 6, iclass 34, count 0 2006.232.07:36:32.41#ibcon#read 6, iclass 34, count 0 2006.232.07:36:32.41#ibcon#end of sib2, iclass 34, count 0 2006.232.07:36:32.41#ibcon#*after write, iclass 34, count 0 2006.232.07:36:32.41#ibcon#*before return 0, iclass 34, count 0 2006.232.07:36:32.41#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.232.07:36:32.41#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.232.07:36:32.41#ibcon#about to clear, iclass 34 cls_cnt 0 2006.232.07:36:32.41#ibcon#cleared, iclass 34 cls_cnt 0 2006.232.07:36:32.42$vc4f8/vbbw=wide 2006.232.07:36:32.42#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.232.07:36:32.42#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.232.07:36:32.42#ibcon#ireg 8 cls_cnt 0 2006.232.07:36:32.42#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:36:32.47#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:36:32.47#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:36:32.47#ibcon#enter wrdev, iclass 36, count 0 2006.232.07:36:32.47#ibcon#first serial, iclass 36, count 0 2006.232.07:36:32.47#ibcon#enter sib2, iclass 36, count 0 2006.232.07:36:32.47#ibcon#flushed, iclass 36, count 0 2006.232.07:36:32.47#ibcon#about to write, iclass 36, count 0 2006.232.07:36:32.47#ibcon#wrote, iclass 36, count 0 2006.232.07:36:32.47#ibcon#about to read 3, iclass 36, count 0 2006.232.07:36:32.49#ibcon#read 3, iclass 36, count 0 2006.232.07:36:32.49#ibcon#about to read 4, iclass 36, count 0 2006.232.07:36:32.49#ibcon#read 4, iclass 36, count 0 2006.232.07:36:32.49#ibcon#about to read 5, iclass 36, count 0 2006.232.07:36:32.49#ibcon#read 5, iclass 36, count 0 2006.232.07:36:32.49#ibcon#about to read 6, iclass 36, count 0 2006.232.07:36:32.49#ibcon#read 6, iclass 36, count 0 2006.232.07:36:32.49#ibcon#end of sib2, iclass 36, count 0 2006.232.07:36:32.49#ibcon#*mode == 0, iclass 36, count 0 2006.232.07:36:32.49#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.232.07:36:32.49#ibcon#[27=BW32\r\n] 2006.232.07:36:32.49#ibcon#*before write, iclass 36, count 0 2006.232.07:36:32.49#ibcon#enter sib2, iclass 36, count 0 2006.232.07:36:32.49#ibcon#flushed, iclass 36, count 0 2006.232.07:36:32.49#ibcon#about to write, iclass 36, count 0 2006.232.07:36:32.50#ibcon#wrote, iclass 36, count 0 2006.232.07:36:32.50#ibcon#about to read 3, iclass 36, count 0 2006.232.07:36:32.52#ibcon#read 3, iclass 36, count 0 2006.232.07:36:32.52#ibcon#about to read 4, iclass 36, count 0 2006.232.07:36:32.52#ibcon#read 4, iclass 36, count 0 2006.232.07:36:32.52#ibcon#about to read 5, iclass 36, count 0 2006.232.07:36:32.52#ibcon#read 5, iclass 36, count 0 2006.232.07:36:32.52#ibcon#about to read 6, iclass 36, count 0 2006.232.07:36:32.52#ibcon#read 6, iclass 36, count 0 2006.232.07:36:32.52#ibcon#end of sib2, iclass 36, count 0 2006.232.07:36:32.52#ibcon#*after write, iclass 36, count 0 2006.232.07:36:32.52#ibcon#*before return 0, iclass 36, count 0 2006.232.07:36:32.52#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:36:32.52#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:36:32.52#ibcon#about to clear, iclass 36 cls_cnt 0 2006.232.07:36:32.52#ibcon#cleared, iclass 36 cls_cnt 0 2006.232.07:36:32.53$4f8m12a/ifd4f 2006.232.07:36:32.53$ifd4f/lo= 2006.232.07:36:32.53$ifd4f/lo=lo1,7680.00,usb,rcp,1 2006.232.07:36:32.53$ifd4f/lo=lo2,1600.00,usb,rcp,1 2006.232.07:36:32.53$ifd4f/lo=lo3,8080.00,usb,rcp,1 2006.232.07:36:32.53$ifd4f/patch= 2006.232.07:36:32.53$ifd4f/patch=lo1,a1,a2,a3,a4 2006.232.07:36:32.53$ifd4f/patch=lo2,b1,b2,b3,b4,b5,b6 2006.232.07:36:32.53$ifd4f/patch=lo3,a5,a6,a7,a8 2006.232.07:36:32.53$4f8m12a/"form=m,16.000,1:2 2006.232.07:36:32.53$4f8m12a/"tpicd 2006.232.07:36:32.53$4f8m12a/echo=off 2006.232.07:36:32.53$4f8m12a/xlog=off 2006.232.07:36:32.53:!2006.232.07:37:00 2006.232.07:36:45.14#trakl#Source acquired 2006.232.07:36:45.15#flagr#flagr/antenna,acquired 2006.232.07:37:00.02:preob 2006.232.07:37:01.15/onsource/TRACKING 2006.232.07:37:01.15:!2006.232.07:37:10 2006.232.07:37:10.02:data_valid=on 2006.232.07:37:10.02:midob 2006.232.07:37:11.15/onsource/TRACKING 2006.232.07:37:11.15/wx/29.46,1007.2,87 2006.232.07:37:11.21/cable/+6.3872E-03 2006.232.07:37:12.30/va/01,08,usb,yes,30,32 2006.232.07:37:12.30/va/02,07,usb,yes,30,32 2006.232.07:37:12.30/va/03,08,usb,yes,23,23 2006.232.07:37:12.30/va/04,07,usb,yes,31,34 2006.232.07:37:12.30/va/05,07,usb,yes,35,37 2006.232.07:37:12.30/va/06,06,usb,yes,35,35 2006.232.07:37:12.30/va/07,06,usb,yes,36,35 2006.232.07:37:12.30/va/08,06,usb,yes,38,37 2006.232.07:37:12.53/valo/01,532.99,yes,locked 2006.232.07:37:12.53/valo/02,572.99,yes,locked 2006.232.07:37:12.53/valo/03,672.99,yes,locked 2006.232.07:37:12.53/valo/04,832.99,yes,locked 2006.232.07:37:12.53/valo/05,652.99,yes,locked 2006.232.07:37:12.53/valo/06,772.99,yes,locked 2006.232.07:37:12.53/valo/07,832.99,yes,locked 2006.232.07:37:12.53/valo/08,852.99,yes,locked 2006.232.07:37:13.62/vb/01,04,usb,yes,30,29 2006.232.07:37:13.62/vb/02,04,usb,yes,32,34 2006.232.07:37:13.62/vb/03,04,usb,yes,29,32 2006.232.07:37:13.62/vb/04,04,usb,yes,29,29 2006.232.07:37:13.62/vb/05,03,usb,yes,35,39 2006.232.07:37:13.62/vb/06,04,usb,yes,29,32 2006.232.07:37:13.62/vb/07,04,usb,yes,31,31 2006.232.07:37:13.62/vb/08,04,usb,yes,28,32 2006.232.07:37:13.86/vblo/01,632.99,yes,locked 2006.232.07:37:13.86/vblo/02,640.99,yes,locked 2006.232.07:37:13.86/vblo/03,656.99,yes,locked 2006.232.07:37:13.86/vblo/04,712.99,yes,locked 2006.232.07:37:13.86/vblo/05,744.99,yes,locked 2006.232.07:37:13.86/vblo/06,752.99,yes,locked 2006.232.07:37:13.86/vblo/07,734.99,yes,locked 2006.232.07:37:13.86/vblo/08,744.99,yes,locked 2006.232.07:37:14.01/vabw/8 2006.232.07:37:14.16/vbbw/8 2006.232.07:37:14.25/xfe/off,on,13.2 2006.232.07:37:14.62/ifatt/23,28,28,28 2006.232.07:37:15.07/fmout-gps/S +4.37E-07 2006.232.07:37:15.12:!2006.232.07:38:10 2006.232.07:38:10.00:data_valid=off 2006.232.07:38:10.01:postob 2006.232.07:38:10.18/cable/+6.3874E-03 2006.232.07:38:10.22/wx/29.45,1007.2,87 2006.232.07:38:11.07/fmout-gps/S +4.37E-07 2006.232.07:38:11.08:scan_name=232-0739,k06232,60 2006.232.07:38:11.08:source=1300+580,130252.47,574837.6,2000.0,ccw 2006.232.07:38:12.14#flagr#flagr/antenna,new-source 2006.232.07:38:12.14:checkk5 2006.232.07:38:12.51/chk_autoobs//k5ts1/ autoobs is running! 2006.232.07:38:12.88/chk_autoobs//k5ts2/ autoobs is running! 2006.232.07:38:13.26/chk_autoobs//k5ts3/ autoobs is running! 2006.232.07:38:13.63/chk_autoobs//k5ts4/ autoobs is running! 2006.232.07:38:14.00/chk_obsdata//k5ts1/T2320737??a.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:38:14.37/chk_obsdata//k5ts2/T2320737??b.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:38:14.73/chk_obsdata//k5ts3/T2320737??c.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:38:15.10/chk_obsdata//k5ts4/T2320737??d.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:38:15.80/k5log//k5ts1_log_newline 2006.232.07:38:16.48/k5log//k5ts2_log_newline 2006.232.07:38:17.17/k5log//k5ts3_log_newline 2006.232.07:38:17.87/k5log//k5ts4_log_newline 2006.232.07:38:17.89/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.232.07:38:17.89:4f8m12a=1 2006.232.07:38:17.89$4f8m12a/echo=on 2006.232.07:38:17.89$4f8m12a/pcalon 2006.232.07:38:17.89$pcalon/"no phase cal control is implemented here 2006.232.07:38:17.89$4f8m12a/"tpicd=stop 2006.232.07:38:17.89$4f8m12a/vc4f8 2006.232.07:38:17.89$vc4f8/valo=1,532.99 2006.232.07:38:17.90#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.232.07:38:17.90#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.232.07:38:17.90#ibcon#ireg 17 cls_cnt 0 2006.232.07:38:17.90#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.232.07:38:17.90#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.232.07:38:17.90#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.232.07:38:17.90#ibcon#enter wrdev, iclass 5, count 0 2006.232.07:38:17.90#ibcon#first serial, iclass 5, count 0 2006.232.07:38:17.90#ibcon#enter sib2, iclass 5, count 0 2006.232.07:38:17.90#ibcon#flushed, iclass 5, count 0 2006.232.07:38:17.90#ibcon#about to write, iclass 5, count 0 2006.232.07:38:17.90#ibcon#wrote, iclass 5, count 0 2006.232.07:38:17.90#ibcon#about to read 3, iclass 5, count 0 2006.232.07:38:17.94#ibcon#read 3, iclass 5, count 0 2006.232.07:38:17.94#ibcon#about to read 4, iclass 5, count 0 2006.232.07:38:17.94#ibcon#read 4, iclass 5, count 0 2006.232.07:38:17.94#ibcon#about to read 5, iclass 5, count 0 2006.232.07:38:17.94#ibcon#read 5, iclass 5, count 0 2006.232.07:38:17.94#ibcon#about to read 6, iclass 5, count 0 2006.232.07:38:17.94#ibcon#read 6, iclass 5, count 0 2006.232.07:38:17.94#ibcon#end of sib2, iclass 5, count 0 2006.232.07:38:17.94#ibcon#*mode == 0, iclass 5, count 0 2006.232.07:38:17.94#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.232.07:38:17.94#ibcon#[26=FRQ=01,532.99\r\n] 2006.232.07:38:17.94#ibcon#*before write, iclass 5, count 0 2006.232.07:38:17.94#ibcon#enter sib2, iclass 5, count 0 2006.232.07:38:17.94#ibcon#flushed, iclass 5, count 0 2006.232.07:38:17.94#ibcon#about to write, iclass 5, count 0 2006.232.07:38:17.94#ibcon#wrote, iclass 5, count 0 2006.232.07:38:17.94#ibcon#about to read 3, iclass 5, count 0 2006.232.07:38:17.98#ibcon#read 3, iclass 5, count 0 2006.232.07:38:17.98#ibcon#about to read 4, iclass 5, count 0 2006.232.07:38:17.98#ibcon#read 4, iclass 5, count 0 2006.232.07:38:17.98#ibcon#about to read 5, iclass 5, count 0 2006.232.07:38:17.98#ibcon#read 5, iclass 5, count 0 2006.232.07:38:17.98#ibcon#about to read 6, iclass 5, count 0 2006.232.07:38:17.98#ibcon#read 6, iclass 5, count 0 2006.232.07:38:17.98#ibcon#end of sib2, iclass 5, count 0 2006.232.07:38:17.98#ibcon#*after write, iclass 5, count 0 2006.232.07:38:17.98#ibcon#*before return 0, iclass 5, count 0 2006.232.07:38:17.98#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.232.07:38:17.98#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.232.07:38:17.98#ibcon#about to clear, iclass 5 cls_cnt 0 2006.232.07:38:17.98#ibcon#cleared, iclass 5 cls_cnt 0 2006.232.07:38:17.99$vc4f8/va=1,8 2006.232.07:38:17.99#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.232.07:38:17.99#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.232.07:38:17.99#ibcon#ireg 11 cls_cnt 2 2006.232.07:38:17.99#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.232.07:38:17.99#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.232.07:38:17.99#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.232.07:38:17.99#ibcon#enter wrdev, iclass 7, count 2 2006.232.07:38:17.99#ibcon#first serial, iclass 7, count 2 2006.232.07:38:17.99#ibcon#enter sib2, iclass 7, count 2 2006.232.07:38:17.99#ibcon#flushed, iclass 7, count 2 2006.232.07:38:17.99#ibcon#about to write, iclass 7, count 2 2006.232.07:38:17.99#ibcon#wrote, iclass 7, count 2 2006.232.07:38:17.99#ibcon#about to read 3, iclass 7, count 2 2006.232.07:38:18.01#ibcon#read 3, iclass 7, count 2 2006.232.07:38:18.01#ibcon#about to read 4, iclass 7, count 2 2006.232.07:38:18.01#ibcon#read 4, iclass 7, count 2 2006.232.07:38:18.01#ibcon#about to read 5, iclass 7, count 2 2006.232.07:38:18.01#ibcon#read 5, iclass 7, count 2 2006.232.07:38:18.01#ibcon#about to read 6, iclass 7, count 2 2006.232.07:38:18.01#ibcon#read 6, iclass 7, count 2 2006.232.07:38:18.01#ibcon#end of sib2, iclass 7, count 2 2006.232.07:38:18.01#ibcon#*mode == 0, iclass 7, count 2 2006.232.07:38:18.01#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.232.07:38:18.01#ibcon#[25=AT01-08\r\n] 2006.232.07:38:18.01#ibcon#*before write, iclass 7, count 2 2006.232.07:38:18.01#ibcon#enter sib2, iclass 7, count 2 2006.232.07:38:18.01#ibcon#flushed, iclass 7, count 2 2006.232.07:38:18.01#ibcon#about to write, iclass 7, count 2 2006.232.07:38:18.01#ibcon#wrote, iclass 7, count 2 2006.232.07:38:18.01#ibcon#about to read 3, iclass 7, count 2 2006.232.07:38:18.04#ibcon#read 3, iclass 7, count 2 2006.232.07:38:18.04#ibcon#about to read 4, iclass 7, count 2 2006.232.07:38:18.04#ibcon#read 4, iclass 7, count 2 2006.232.07:38:18.04#ibcon#about to read 5, iclass 7, count 2 2006.232.07:38:18.04#ibcon#read 5, iclass 7, count 2 2006.232.07:38:18.04#ibcon#about to read 6, iclass 7, count 2 2006.232.07:38:18.04#ibcon#read 6, iclass 7, count 2 2006.232.07:38:18.04#ibcon#end of sib2, iclass 7, count 2 2006.232.07:38:18.04#ibcon#*after write, iclass 7, count 2 2006.232.07:38:18.04#ibcon#*before return 0, iclass 7, count 2 2006.232.07:38:18.04#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.232.07:38:18.04#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.232.07:38:18.04#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.232.07:38:18.04#ibcon#ireg 7 cls_cnt 0 2006.232.07:38:18.04#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.232.07:38:18.15#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.232.07:38:18.15#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.232.07:38:18.15#ibcon#enter wrdev, iclass 7, count 0 2006.232.07:38:18.15#ibcon#first serial, iclass 7, count 0 2006.232.07:38:18.15#ibcon#enter sib2, iclass 7, count 0 2006.232.07:38:18.15#ibcon#flushed, iclass 7, count 0 2006.232.07:38:18.15#ibcon#about to write, iclass 7, count 0 2006.232.07:38:18.16#ibcon#wrote, iclass 7, count 0 2006.232.07:38:18.16#ibcon#about to read 3, iclass 7, count 0 2006.232.07:38:18.17#ibcon#read 3, iclass 7, count 0 2006.232.07:38:18.17#ibcon#about to read 4, iclass 7, count 0 2006.232.07:38:18.17#ibcon#read 4, iclass 7, count 0 2006.232.07:38:18.17#ibcon#about to read 5, iclass 7, count 0 2006.232.07:38:18.17#ibcon#read 5, iclass 7, count 0 2006.232.07:38:18.17#ibcon#about to read 6, iclass 7, count 0 2006.232.07:38:18.17#ibcon#read 6, iclass 7, count 0 2006.232.07:38:18.17#ibcon#end of sib2, iclass 7, count 0 2006.232.07:38:18.17#ibcon#*mode == 0, iclass 7, count 0 2006.232.07:38:18.17#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.232.07:38:18.17#ibcon#[25=USB\r\n] 2006.232.07:38:18.17#ibcon#*before write, iclass 7, count 0 2006.232.07:38:18.17#ibcon#enter sib2, iclass 7, count 0 2006.232.07:38:18.17#ibcon#flushed, iclass 7, count 0 2006.232.07:38:18.17#ibcon#about to write, iclass 7, count 0 2006.232.07:38:18.17#ibcon#wrote, iclass 7, count 0 2006.232.07:38:18.17#ibcon#about to read 3, iclass 7, count 0 2006.232.07:38:18.21#ibcon#read 3, iclass 7, count 0 2006.232.07:38:18.21#ibcon#about to read 4, iclass 7, count 0 2006.232.07:38:18.21#ibcon#read 4, iclass 7, count 0 2006.232.07:38:18.21#ibcon#about to read 5, iclass 7, count 0 2006.232.07:38:18.21#ibcon#read 5, iclass 7, count 0 2006.232.07:38:18.21#ibcon#about to read 6, iclass 7, count 0 2006.232.07:38:18.21#ibcon#read 6, iclass 7, count 0 2006.232.07:38:18.21#ibcon#end of sib2, iclass 7, count 0 2006.232.07:38:18.21#ibcon#*after write, iclass 7, count 0 2006.232.07:38:18.21#ibcon#*before return 0, iclass 7, count 0 2006.232.07:38:18.21#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.232.07:38:18.21#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.232.07:38:18.21#ibcon#about to clear, iclass 7 cls_cnt 0 2006.232.07:38:18.21#ibcon#cleared, iclass 7 cls_cnt 0 2006.232.07:38:18.21$vc4f8/valo=2,572.99 2006.232.07:38:18.21#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.232.07:38:18.21#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.232.07:38:18.21#ibcon#ireg 17 cls_cnt 0 2006.232.07:38:18.21#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.232.07:38:18.21#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.232.07:38:18.21#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.232.07:38:18.21#ibcon#enter wrdev, iclass 11, count 0 2006.232.07:38:18.21#ibcon#first serial, iclass 11, count 0 2006.232.07:38:18.21#ibcon#enter sib2, iclass 11, count 0 2006.232.07:38:18.21#ibcon#flushed, iclass 11, count 0 2006.232.07:38:18.21#ibcon#about to write, iclass 11, count 0 2006.232.07:38:18.21#ibcon#wrote, iclass 11, count 0 2006.232.07:38:18.21#ibcon#about to read 3, iclass 11, count 0 2006.232.07:38:18.23#ibcon#read 3, iclass 11, count 0 2006.232.07:38:18.23#ibcon#about to read 4, iclass 11, count 0 2006.232.07:38:18.23#ibcon#read 4, iclass 11, count 0 2006.232.07:38:18.23#ibcon#about to read 5, iclass 11, count 0 2006.232.07:38:18.23#ibcon#read 5, iclass 11, count 0 2006.232.07:38:18.23#ibcon#about to read 6, iclass 11, count 0 2006.232.07:38:18.23#ibcon#read 6, iclass 11, count 0 2006.232.07:38:18.23#ibcon#end of sib2, iclass 11, count 0 2006.232.07:38:18.23#ibcon#*mode == 0, iclass 11, count 0 2006.232.07:38:18.23#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.232.07:38:18.23#ibcon#[26=FRQ=02,572.99\r\n] 2006.232.07:38:18.23#ibcon#*before write, iclass 11, count 0 2006.232.07:38:18.23#ibcon#enter sib2, iclass 11, count 0 2006.232.07:38:18.23#ibcon#flushed, iclass 11, count 0 2006.232.07:38:18.23#ibcon#about to write, iclass 11, count 0 2006.232.07:38:18.23#ibcon#wrote, iclass 11, count 0 2006.232.07:38:18.23#ibcon#about to read 3, iclass 11, count 0 2006.232.07:38:18.26#ibcon#read 3, iclass 11, count 0 2006.232.07:38:18.26#ibcon#about to read 4, iclass 11, count 0 2006.232.07:38:18.26#ibcon#read 4, iclass 11, count 0 2006.232.07:38:18.26#ibcon#about to read 5, iclass 11, count 0 2006.232.07:38:18.26#ibcon#read 5, iclass 11, count 0 2006.232.07:38:18.26#ibcon#about to read 6, iclass 11, count 0 2006.232.07:38:18.26#ibcon#read 6, iclass 11, count 0 2006.232.07:38:18.26#ibcon#end of sib2, iclass 11, count 0 2006.232.07:38:18.26#ibcon#*after write, iclass 11, count 0 2006.232.07:38:18.26#ibcon#*before return 0, iclass 11, count 0 2006.232.07:38:18.26#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.232.07:38:18.26#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.232.07:38:18.26#ibcon#about to clear, iclass 11 cls_cnt 0 2006.232.07:38:18.26#ibcon#cleared, iclass 11 cls_cnt 0 2006.232.07:38:18.26$vc4f8/va=2,7 2006.232.07:38:18.26#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.232.07:38:18.26#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.232.07:38:18.26#ibcon#ireg 11 cls_cnt 2 2006.232.07:38:18.26#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.232.07:38:18.33#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.232.07:38:18.33#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.232.07:38:18.33#ibcon#enter wrdev, iclass 13, count 2 2006.232.07:38:18.33#ibcon#first serial, iclass 13, count 2 2006.232.07:38:18.33#ibcon#enter sib2, iclass 13, count 2 2006.232.07:38:18.33#ibcon#flushed, iclass 13, count 2 2006.232.07:38:18.33#ibcon#about to write, iclass 13, count 2 2006.232.07:38:18.33#ibcon#wrote, iclass 13, count 2 2006.232.07:38:18.33#ibcon#about to read 3, iclass 13, count 2 2006.232.07:38:18.35#ibcon#read 3, iclass 13, count 2 2006.232.07:38:18.35#ibcon#about to read 4, iclass 13, count 2 2006.232.07:38:18.35#ibcon#read 4, iclass 13, count 2 2006.232.07:38:18.35#ibcon#about to read 5, iclass 13, count 2 2006.232.07:38:18.35#ibcon#read 5, iclass 13, count 2 2006.232.07:38:18.35#ibcon#about to read 6, iclass 13, count 2 2006.232.07:38:18.35#ibcon#read 6, iclass 13, count 2 2006.232.07:38:18.35#ibcon#end of sib2, iclass 13, count 2 2006.232.07:38:18.35#ibcon#*mode == 0, iclass 13, count 2 2006.232.07:38:18.35#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.232.07:38:18.35#ibcon#[25=AT02-07\r\n] 2006.232.07:38:18.35#ibcon#*before write, iclass 13, count 2 2006.232.07:38:18.35#ibcon#enter sib2, iclass 13, count 2 2006.232.07:38:18.35#ibcon#flushed, iclass 13, count 2 2006.232.07:38:18.35#ibcon#about to write, iclass 13, count 2 2006.232.07:38:18.35#ibcon#wrote, iclass 13, count 2 2006.232.07:38:18.35#ibcon#about to read 3, iclass 13, count 2 2006.232.07:38:18.39#ibcon#read 3, iclass 13, count 2 2006.232.07:38:18.39#ibcon#about to read 4, iclass 13, count 2 2006.232.07:38:18.39#ibcon#read 4, iclass 13, count 2 2006.232.07:38:18.39#ibcon#about to read 5, iclass 13, count 2 2006.232.07:38:18.39#ibcon#read 5, iclass 13, count 2 2006.232.07:38:18.39#ibcon#about to read 6, iclass 13, count 2 2006.232.07:38:18.39#ibcon#read 6, iclass 13, count 2 2006.232.07:38:18.39#ibcon#end of sib2, iclass 13, count 2 2006.232.07:38:18.39#ibcon#*after write, iclass 13, count 2 2006.232.07:38:18.39#ibcon#*before return 0, iclass 13, count 2 2006.232.07:38:18.39#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.232.07:38:18.39#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.232.07:38:18.39#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.232.07:38:18.39#ibcon#ireg 7 cls_cnt 0 2006.232.07:38:18.39#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.232.07:38:18.50#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.232.07:38:18.50#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.232.07:38:18.50#ibcon#enter wrdev, iclass 13, count 0 2006.232.07:38:18.50#ibcon#first serial, iclass 13, count 0 2006.232.07:38:18.50#ibcon#enter sib2, iclass 13, count 0 2006.232.07:38:18.50#ibcon#flushed, iclass 13, count 0 2006.232.07:38:18.50#ibcon#about to write, iclass 13, count 0 2006.232.07:38:18.50#ibcon#wrote, iclass 13, count 0 2006.232.07:38:18.50#ibcon#about to read 3, iclass 13, count 0 2006.232.07:38:18.52#ibcon#read 3, iclass 13, count 0 2006.232.07:38:18.52#ibcon#about to read 4, iclass 13, count 0 2006.232.07:38:18.52#ibcon#read 4, iclass 13, count 0 2006.232.07:38:18.52#ibcon#about to read 5, iclass 13, count 0 2006.232.07:38:18.52#ibcon#read 5, iclass 13, count 0 2006.232.07:38:18.52#ibcon#about to read 6, iclass 13, count 0 2006.232.07:38:18.52#ibcon#read 6, iclass 13, count 0 2006.232.07:38:18.52#ibcon#end of sib2, iclass 13, count 0 2006.232.07:38:18.52#ibcon#*mode == 0, iclass 13, count 0 2006.232.07:38:18.52#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.232.07:38:18.52#ibcon#[25=USB\r\n] 2006.232.07:38:18.52#ibcon#*before write, iclass 13, count 0 2006.232.07:38:18.52#ibcon#enter sib2, iclass 13, count 0 2006.232.07:38:18.52#ibcon#flushed, iclass 13, count 0 2006.232.07:38:18.52#ibcon#about to write, iclass 13, count 0 2006.232.07:38:18.52#ibcon#wrote, iclass 13, count 0 2006.232.07:38:18.52#ibcon#about to read 3, iclass 13, count 0 2006.232.07:38:18.55#ibcon#read 3, iclass 13, count 0 2006.232.07:38:18.55#ibcon#about to read 4, iclass 13, count 0 2006.232.07:38:18.55#ibcon#read 4, iclass 13, count 0 2006.232.07:38:18.55#ibcon#about to read 5, iclass 13, count 0 2006.232.07:38:18.55#ibcon#read 5, iclass 13, count 0 2006.232.07:38:18.55#ibcon#about to read 6, iclass 13, count 0 2006.232.07:38:18.55#ibcon#read 6, iclass 13, count 0 2006.232.07:38:18.55#ibcon#end of sib2, iclass 13, count 0 2006.232.07:38:18.55#ibcon#*after write, iclass 13, count 0 2006.232.07:38:18.55#ibcon#*before return 0, iclass 13, count 0 2006.232.07:38:18.55#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.232.07:38:18.55#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.232.07:38:18.55#ibcon#about to clear, iclass 13 cls_cnt 0 2006.232.07:38:18.55#ibcon#cleared, iclass 13 cls_cnt 0 2006.232.07:38:18.55$vc4f8/valo=3,672.99 2006.232.07:38:18.55#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.232.07:38:18.55#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.232.07:38:18.55#ibcon#ireg 17 cls_cnt 0 2006.232.07:38:18.56#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.232.07:38:18.56#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.232.07:38:18.56#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.232.07:38:18.56#ibcon#enter wrdev, iclass 15, count 0 2006.232.07:38:18.56#ibcon#first serial, iclass 15, count 0 2006.232.07:38:18.56#ibcon#enter sib2, iclass 15, count 0 2006.232.07:38:18.56#ibcon#flushed, iclass 15, count 0 2006.232.07:38:18.56#ibcon#about to write, iclass 15, count 0 2006.232.07:38:18.56#ibcon#wrote, iclass 15, count 0 2006.232.07:38:18.56#ibcon#about to read 3, iclass 15, count 0 2006.232.07:38:18.57#ibcon#read 3, iclass 15, count 0 2006.232.07:38:18.57#ibcon#about to read 4, iclass 15, count 0 2006.232.07:38:18.57#ibcon#read 4, iclass 15, count 0 2006.232.07:38:18.57#ibcon#about to read 5, iclass 15, count 0 2006.232.07:38:18.57#ibcon#read 5, iclass 15, count 0 2006.232.07:38:18.57#ibcon#about to read 6, iclass 15, count 0 2006.232.07:38:18.57#ibcon#read 6, iclass 15, count 0 2006.232.07:38:18.57#ibcon#end of sib2, iclass 15, count 0 2006.232.07:38:18.57#ibcon#*mode == 0, iclass 15, count 0 2006.232.07:38:18.57#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.232.07:38:18.57#ibcon#[26=FRQ=03,672.99\r\n] 2006.232.07:38:18.57#ibcon#*before write, iclass 15, count 0 2006.232.07:38:18.57#ibcon#enter sib2, iclass 15, count 0 2006.232.07:38:18.57#ibcon#flushed, iclass 15, count 0 2006.232.07:38:18.57#ibcon#about to write, iclass 15, count 0 2006.232.07:38:18.57#ibcon#wrote, iclass 15, count 0 2006.232.07:38:18.57#ibcon#about to read 3, iclass 15, count 0 2006.232.07:38:18.61#ibcon#read 3, iclass 15, count 0 2006.232.07:38:18.61#ibcon#about to read 4, iclass 15, count 0 2006.232.07:38:18.61#ibcon#read 4, iclass 15, count 0 2006.232.07:38:18.61#ibcon#about to read 5, iclass 15, count 0 2006.232.07:38:18.61#ibcon#read 5, iclass 15, count 0 2006.232.07:38:18.61#ibcon#about to read 6, iclass 15, count 0 2006.232.07:38:18.61#ibcon#read 6, iclass 15, count 0 2006.232.07:38:18.61#ibcon#end of sib2, iclass 15, count 0 2006.232.07:38:18.61#ibcon#*after write, iclass 15, count 0 2006.232.07:38:18.61#ibcon#*before return 0, iclass 15, count 0 2006.232.07:38:18.61#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.232.07:38:18.61#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.232.07:38:18.61#ibcon#about to clear, iclass 15 cls_cnt 0 2006.232.07:38:18.61#ibcon#cleared, iclass 15 cls_cnt 0 2006.232.07:38:18.61$vc4f8/va=3,8 2006.232.07:38:18.61#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.232.07:38:18.61#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.232.07:38:18.61#ibcon#ireg 11 cls_cnt 2 2006.232.07:38:18.61#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.232.07:38:18.67#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.232.07:38:18.67#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.232.07:38:18.67#ibcon#enter wrdev, iclass 17, count 2 2006.232.07:38:18.67#ibcon#first serial, iclass 17, count 2 2006.232.07:38:18.67#ibcon#enter sib2, iclass 17, count 2 2006.232.07:38:18.67#ibcon#flushed, iclass 17, count 2 2006.232.07:38:18.67#ibcon#about to write, iclass 17, count 2 2006.232.07:38:18.67#ibcon#wrote, iclass 17, count 2 2006.232.07:38:18.67#ibcon#about to read 3, iclass 17, count 2 2006.232.07:38:18.69#ibcon#read 3, iclass 17, count 2 2006.232.07:38:18.69#ibcon#about to read 4, iclass 17, count 2 2006.232.07:38:18.69#ibcon#read 4, iclass 17, count 2 2006.232.07:38:18.69#ibcon#about to read 5, iclass 17, count 2 2006.232.07:38:18.69#ibcon#read 5, iclass 17, count 2 2006.232.07:38:18.69#ibcon#about to read 6, iclass 17, count 2 2006.232.07:38:18.69#ibcon#read 6, iclass 17, count 2 2006.232.07:38:18.69#ibcon#end of sib2, iclass 17, count 2 2006.232.07:38:18.69#ibcon#*mode == 0, iclass 17, count 2 2006.232.07:38:18.69#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.232.07:38:18.69#ibcon#[25=AT03-08\r\n] 2006.232.07:38:18.69#ibcon#*before write, iclass 17, count 2 2006.232.07:38:18.69#ibcon#enter sib2, iclass 17, count 2 2006.232.07:38:18.69#ibcon#flushed, iclass 17, count 2 2006.232.07:38:18.69#ibcon#about to write, iclass 17, count 2 2006.232.07:38:18.69#ibcon#wrote, iclass 17, count 2 2006.232.07:38:18.69#ibcon#about to read 3, iclass 17, count 2 2006.232.07:38:18.72#ibcon#read 3, iclass 17, count 2 2006.232.07:38:18.72#ibcon#about to read 4, iclass 17, count 2 2006.232.07:38:18.72#ibcon#read 4, iclass 17, count 2 2006.232.07:38:18.72#ibcon#about to read 5, iclass 17, count 2 2006.232.07:38:18.72#ibcon#read 5, iclass 17, count 2 2006.232.07:38:18.72#ibcon#about to read 6, iclass 17, count 2 2006.232.07:38:18.72#ibcon#read 6, iclass 17, count 2 2006.232.07:38:18.72#ibcon#end of sib2, iclass 17, count 2 2006.232.07:38:18.72#ibcon#*after write, iclass 17, count 2 2006.232.07:38:18.72#ibcon#*before return 0, iclass 17, count 2 2006.232.07:38:18.72#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.232.07:38:18.72#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.232.07:38:18.72#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.232.07:38:18.72#ibcon#ireg 7 cls_cnt 0 2006.232.07:38:18.72#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.232.07:38:18.84#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.232.07:38:18.84#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.232.07:38:18.84#ibcon#enter wrdev, iclass 17, count 0 2006.232.07:38:18.84#ibcon#first serial, iclass 17, count 0 2006.232.07:38:18.84#ibcon#enter sib2, iclass 17, count 0 2006.232.07:38:18.84#ibcon#flushed, iclass 17, count 0 2006.232.07:38:18.84#ibcon#about to write, iclass 17, count 0 2006.232.07:38:18.84#ibcon#wrote, iclass 17, count 0 2006.232.07:38:18.84#ibcon#about to read 3, iclass 17, count 0 2006.232.07:38:18.86#ibcon#read 3, iclass 17, count 0 2006.232.07:38:18.86#ibcon#about to read 4, iclass 17, count 0 2006.232.07:38:18.86#ibcon#read 4, iclass 17, count 0 2006.232.07:38:18.86#ibcon#about to read 5, iclass 17, count 0 2006.232.07:38:18.86#ibcon#read 5, iclass 17, count 0 2006.232.07:38:18.86#ibcon#about to read 6, iclass 17, count 0 2006.232.07:38:18.86#ibcon#read 6, iclass 17, count 0 2006.232.07:38:18.86#ibcon#end of sib2, iclass 17, count 0 2006.232.07:38:18.86#ibcon#*mode == 0, iclass 17, count 0 2006.232.07:38:18.86#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.232.07:38:18.86#ibcon#[25=USB\r\n] 2006.232.07:38:18.86#ibcon#*before write, iclass 17, count 0 2006.232.07:38:18.86#ibcon#enter sib2, iclass 17, count 0 2006.232.07:38:18.86#ibcon#flushed, iclass 17, count 0 2006.232.07:38:18.86#ibcon#about to write, iclass 17, count 0 2006.232.07:38:18.86#ibcon#wrote, iclass 17, count 0 2006.232.07:38:18.86#ibcon#about to read 3, iclass 17, count 0 2006.232.07:38:18.89#ibcon#read 3, iclass 17, count 0 2006.232.07:38:18.89#ibcon#about to read 4, iclass 17, count 0 2006.232.07:38:18.89#ibcon#read 4, iclass 17, count 0 2006.232.07:38:18.89#ibcon#about to read 5, iclass 17, count 0 2006.232.07:38:18.89#ibcon#read 5, iclass 17, count 0 2006.232.07:38:18.89#ibcon#about to read 6, iclass 17, count 0 2006.232.07:38:18.89#ibcon#read 6, iclass 17, count 0 2006.232.07:38:18.89#ibcon#end of sib2, iclass 17, count 0 2006.232.07:38:18.89#ibcon#*after write, iclass 17, count 0 2006.232.07:38:18.89#ibcon#*before return 0, iclass 17, count 0 2006.232.07:38:18.89#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.232.07:38:18.89#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.232.07:38:18.89#ibcon#about to clear, iclass 17 cls_cnt 0 2006.232.07:38:18.89#ibcon#cleared, iclass 17 cls_cnt 0 2006.232.07:38:18.89$vc4f8/valo=4,832.99 2006.232.07:38:18.89#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.232.07:38:18.89#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.232.07:38:18.90#ibcon#ireg 17 cls_cnt 0 2006.232.07:38:18.90#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.232.07:38:18.90#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.232.07:38:18.90#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.232.07:38:18.90#ibcon#enter wrdev, iclass 19, count 0 2006.232.07:38:18.90#ibcon#first serial, iclass 19, count 0 2006.232.07:38:18.90#ibcon#enter sib2, iclass 19, count 0 2006.232.07:38:18.90#ibcon#flushed, iclass 19, count 0 2006.232.07:38:18.90#ibcon#about to write, iclass 19, count 0 2006.232.07:38:18.90#ibcon#wrote, iclass 19, count 0 2006.232.07:38:18.90#ibcon#about to read 3, iclass 19, count 0 2006.232.07:38:18.91#ibcon#read 3, iclass 19, count 0 2006.232.07:38:18.91#ibcon#about to read 4, iclass 19, count 0 2006.232.07:38:18.91#ibcon#read 4, iclass 19, count 0 2006.232.07:38:18.91#ibcon#about to read 5, iclass 19, count 0 2006.232.07:38:18.91#ibcon#read 5, iclass 19, count 0 2006.232.07:38:18.91#ibcon#about to read 6, iclass 19, count 0 2006.232.07:38:18.91#ibcon#read 6, iclass 19, count 0 2006.232.07:38:18.91#ibcon#end of sib2, iclass 19, count 0 2006.232.07:38:18.91#ibcon#*mode == 0, iclass 19, count 0 2006.232.07:38:18.91#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.232.07:38:18.91#ibcon#[26=FRQ=04,832.99\r\n] 2006.232.07:38:18.91#ibcon#*before write, iclass 19, count 0 2006.232.07:38:18.91#ibcon#enter sib2, iclass 19, count 0 2006.232.07:38:18.91#ibcon#flushed, iclass 19, count 0 2006.232.07:38:18.91#ibcon#about to write, iclass 19, count 0 2006.232.07:38:18.91#ibcon#wrote, iclass 19, count 0 2006.232.07:38:18.91#ibcon#about to read 3, iclass 19, count 0 2006.232.07:38:18.95#ibcon#read 3, iclass 19, count 0 2006.232.07:38:18.95#ibcon#about to read 4, iclass 19, count 0 2006.232.07:38:18.95#ibcon#read 4, iclass 19, count 0 2006.232.07:38:18.95#ibcon#about to read 5, iclass 19, count 0 2006.232.07:38:18.95#ibcon#read 5, iclass 19, count 0 2006.232.07:38:18.95#ibcon#about to read 6, iclass 19, count 0 2006.232.07:38:18.95#ibcon#read 6, iclass 19, count 0 2006.232.07:38:18.95#ibcon#end of sib2, iclass 19, count 0 2006.232.07:38:18.95#ibcon#*after write, iclass 19, count 0 2006.232.07:38:18.95#ibcon#*before return 0, iclass 19, count 0 2006.232.07:38:18.95#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.232.07:38:18.95#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.232.07:38:18.95#ibcon#about to clear, iclass 19 cls_cnt 0 2006.232.07:38:18.95#ibcon#cleared, iclass 19 cls_cnt 0 2006.232.07:38:18.95$vc4f8/va=4,7 2006.232.07:38:18.95#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.232.07:38:18.96#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.232.07:38:18.96#ibcon#ireg 11 cls_cnt 2 2006.232.07:38:18.96#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.232.07:38:19.00#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.232.07:38:19.00#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.232.07:38:19.00#ibcon#enter wrdev, iclass 21, count 2 2006.232.07:38:19.00#ibcon#first serial, iclass 21, count 2 2006.232.07:38:19.00#ibcon#enter sib2, iclass 21, count 2 2006.232.07:38:19.00#ibcon#flushed, iclass 21, count 2 2006.232.07:38:19.00#ibcon#about to write, iclass 21, count 2 2006.232.07:38:19.00#ibcon#wrote, iclass 21, count 2 2006.232.07:38:19.00#ibcon#about to read 3, iclass 21, count 2 2006.232.07:38:19.02#ibcon#read 3, iclass 21, count 2 2006.232.07:38:19.02#ibcon#about to read 4, iclass 21, count 2 2006.232.07:38:19.02#ibcon#read 4, iclass 21, count 2 2006.232.07:38:19.02#ibcon#about to read 5, iclass 21, count 2 2006.232.07:38:19.02#ibcon#read 5, iclass 21, count 2 2006.232.07:38:19.02#ibcon#about to read 6, iclass 21, count 2 2006.232.07:38:19.02#ibcon#read 6, iclass 21, count 2 2006.232.07:38:19.02#ibcon#end of sib2, iclass 21, count 2 2006.232.07:38:19.02#ibcon#*mode == 0, iclass 21, count 2 2006.232.07:38:19.02#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.232.07:38:19.02#ibcon#[25=AT04-07\r\n] 2006.232.07:38:19.02#ibcon#*before write, iclass 21, count 2 2006.232.07:38:19.02#ibcon#enter sib2, iclass 21, count 2 2006.232.07:38:19.02#ibcon#flushed, iclass 21, count 2 2006.232.07:38:19.02#ibcon#about to write, iclass 21, count 2 2006.232.07:38:19.02#ibcon#wrote, iclass 21, count 2 2006.232.07:38:19.02#ibcon#about to read 3, iclass 21, count 2 2006.232.07:38:19.05#ibcon#read 3, iclass 21, count 2 2006.232.07:38:19.05#ibcon#about to read 4, iclass 21, count 2 2006.232.07:38:19.05#ibcon#read 4, iclass 21, count 2 2006.232.07:38:19.05#ibcon#about to read 5, iclass 21, count 2 2006.232.07:38:19.05#ibcon#read 5, iclass 21, count 2 2006.232.07:38:19.05#ibcon#about to read 6, iclass 21, count 2 2006.232.07:38:19.05#ibcon#read 6, iclass 21, count 2 2006.232.07:38:19.05#ibcon#end of sib2, iclass 21, count 2 2006.232.07:38:19.05#ibcon#*after write, iclass 21, count 2 2006.232.07:38:19.05#ibcon#*before return 0, iclass 21, count 2 2006.232.07:38:19.05#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.232.07:38:19.05#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.232.07:38:19.05#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.232.07:38:19.05#ibcon#ireg 7 cls_cnt 0 2006.232.07:38:19.05#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.232.07:38:19.17#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.232.07:38:19.17#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.232.07:38:19.17#ibcon#enter wrdev, iclass 21, count 0 2006.232.07:38:19.17#ibcon#first serial, iclass 21, count 0 2006.232.07:38:19.17#ibcon#enter sib2, iclass 21, count 0 2006.232.07:38:19.17#ibcon#flushed, iclass 21, count 0 2006.232.07:38:19.17#ibcon#about to write, iclass 21, count 0 2006.232.07:38:19.17#ibcon#wrote, iclass 21, count 0 2006.232.07:38:19.17#ibcon#about to read 3, iclass 21, count 0 2006.232.07:38:19.19#ibcon#read 3, iclass 21, count 0 2006.232.07:38:19.19#ibcon#about to read 4, iclass 21, count 0 2006.232.07:38:19.19#ibcon#read 4, iclass 21, count 0 2006.232.07:38:19.19#ibcon#about to read 5, iclass 21, count 0 2006.232.07:38:19.19#ibcon#read 5, iclass 21, count 0 2006.232.07:38:19.19#ibcon#about to read 6, iclass 21, count 0 2006.232.07:38:19.19#ibcon#read 6, iclass 21, count 0 2006.232.07:38:19.19#ibcon#end of sib2, iclass 21, count 0 2006.232.07:38:19.19#ibcon#*mode == 0, iclass 21, count 0 2006.232.07:38:19.19#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.232.07:38:19.19#ibcon#[25=USB\r\n] 2006.232.07:38:19.19#ibcon#*before write, iclass 21, count 0 2006.232.07:38:19.19#ibcon#enter sib2, iclass 21, count 0 2006.232.07:38:19.19#ibcon#flushed, iclass 21, count 0 2006.232.07:38:19.19#ibcon#about to write, iclass 21, count 0 2006.232.07:38:19.19#ibcon#wrote, iclass 21, count 0 2006.232.07:38:19.19#ibcon#about to read 3, iclass 21, count 0 2006.232.07:38:19.22#ibcon#read 3, iclass 21, count 0 2006.232.07:38:19.22#ibcon#about to read 4, iclass 21, count 0 2006.232.07:38:19.22#ibcon#read 4, iclass 21, count 0 2006.232.07:38:19.22#ibcon#about to read 5, iclass 21, count 0 2006.232.07:38:19.22#ibcon#read 5, iclass 21, count 0 2006.232.07:38:19.22#ibcon#about to read 6, iclass 21, count 0 2006.232.07:38:19.22#ibcon#read 6, iclass 21, count 0 2006.232.07:38:19.22#ibcon#end of sib2, iclass 21, count 0 2006.232.07:38:19.22#ibcon#*after write, iclass 21, count 0 2006.232.07:38:19.22#ibcon#*before return 0, iclass 21, count 0 2006.232.07:38:19.22#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.232.07:38:19.22#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.232.07:38:19.22#ibcon#about to clear, iclass 21 cls_cnt 0 2006.232.07:38:19.22#ibcon#cleared, iclass 21 cls_cnt 0 2006.232.07:38:19.22$vc4f8/valo=5,652.99 2006.232.07:38:19.22#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.232.07:38:19.23#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.232.07:38:19.23#ibcon#ireg 17 cls_cnt 0 2006.232.07:38:19.23#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.232.07:38:19.23#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.232.07:38:19.23#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.232.07:38:19.23#ibcon#enter wrdev, iclass 23, count 0 2006.232.07:38:19.23#ibcon#first serial, iclass 23, count 0 2006.232.07:38:19.23#ibcon#enter sib2, iclass 23, count 0 2006.232.07:38:19.23#ibcon#flushed, iclass 23, count 0 2006.232.07:38:19.23#ibcon#about to write, iclass 23, count 0 2006.232.07:38:19.23#ibcon#wrote, iclass 23, count 0 2006.232.07:38:19.23#ibcon#about to read 3, iclass 23, count 0 2006.232.07:38:19.24#ibcon#read 3, iclass 23, count 0 2006.232.07:38:19.24#ibcon#about to read 4, iclass 23, count 0 2006.232.07:38:19.24#ibcon#read 4, iclass 23, count 0 2006.232.07:38:19.24#ibcon#about to read 5, iclass 23, count 0 2006.232.07:38:19.24#ibcon#read 5, iclass 23, count 0 2006.232.07:38:19.24#ibcon#about to read 6, iclass 23, count 0 2006.232.07:38:19.24#ibcon#read 6, iclass 23, count 0 2006.232.07:38:19.24#ibcon#end of sib2, iclass 23, count 0 2006.232.07:38:19.24#ibcon#*mode == 0, iclass 23, count 0 2006.232.07:38:19.24#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.232.07:38:19.24#ibcon#[26=FRQ=05,652.99\r\n] 2006.232.07:38:19.24#ibcon#*before write, iclass 23, count 0 2006.232.07:38:19.24#ibcon#enter sib2, iclass 23, count 0 2006.232.07:38:19.24#ibcon#flushed, iclass 23, count 0 2006.232.07:38:19.24#ibcon#about to write, iclass 23, count 0 2006.232.07:38:19.24#ibcon#wrote, iclass 23, count 0 2006.232.07:38:19.24#ibcon#about to read 3, iclass 23, count 0 2006.232.07:38:19.28#ibcon#read 3, iclass 23, count 0 2006.232.07:38:19.28#ibcon#about to read 4, iclass 23, count 0 2006.232.07:38:19.28#ibcon#read 4, iclass 23, count 0 2006.232.07:38:19.28#ibcon#about to read 5, iclass 23, count 0 2006.232.07:38:19.28#ibcon#read 5, iclass 23, count 0 2006.232.07:38:19.28#ibcon#about to read 6, iclass 23, count 0 2006.232.07:38:19.28#ibcon#read 6, iclass 23, count 0 2006.232.07:38:19.28#ibcon#end of sib2, iclass 23, count 0 2006.232.07:38:19.28#ibcon#*after write, iclass 23, count 0 2006.232.07:38:19.28#ibcon#*before return 0, iclass 23, count 0 2006.232.07:38:19.28#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.232.07:38:19.28#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.232.07:38:19.28#ibcon#about to clear, iclass 23 cls_cnt 0 2006.232.07:38:19.28#ibcon#cleared, iclass 23 cls_cnt 0 2006.232.07:38:19.28$vc4f8/va=5,7 2006.232.07:38:19.28#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.232.07:38:19.28#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.232.07:38:19.28#ibcon#ireg 11 cls_cnt 2 2006.232.07:38:19.28#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.232.07:38:19.34#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.232.07:38:19.34#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.232.07:38:19.34#ibcon#enter wrdev, iclass 25, count 2 2006.232.07:38:19.34#ibcon#first serial, iclass 25, count 2 2006.232.07:38:19.34#ibcon#enter sib2, iclass 25, count 2 2006.232.07:38:19.34#ibcon#flushed, iclass 25, count 2 2006.232.07:38:19.34#ibcon#about to write, iclass 25, count 2 2006.232.07:38:19.34#ibcon#wrote, iclass 25, count 2 2006.232.07:38:19.34#ibcon#about to read 3, iclass 25, count 2 2006.232.07:38:19.36#ibcon#read 3, iclass 25, count 2 2006.232.07:38:19.36#ibcon#about to read 4, iclass 25, count 2 2006.232.07:38:19.36#ibcon#read 4, iclass 25, count 2 2006.232.07:38:19.36#ibcon#about to read 5, iclass 25, count 2 2006.232.07:38:19.36#ibcon#read 5, iclass 25, count 2 2006.232.07:38:19.36#ibcon#about to read 6, iclass 25, count 2 2006.232.07:38:19.36#ibcon#read 6, iclass 25, count 2 2006.232.07:38:19.36#ibcon#end of sib2, iclass 25, count 2 2006.232.07:38:19.36#ibcon#*mode == 0, iclass 25, count 2 2006.232.07:38:19.36#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.232.07:38:19.36#ibcon#[25=AT05-07\r\n] 2006.232.07:38:19.36#ibcon#*before write, iclass 25, count 2 2006.232.07:38:19.36#ibcon#enter sib2, iclass 25, count 2 2006.232.07:38:19.36#ibcon#flushed, iclass 25, count 2 2006.232.07:38:19.36#ibcon#about to write, iclass 25, count 2 2006.232.07:38:19.36#ibcon#wrote, iclass 25, count 2 2006.232.07:38:19.36#ibcon#about to read 3, iclass 25, count 2 2006.232.07:38:19.39#ibcon#read 3, iclass 25, count 2 2006.232.07:38:19.39#ibcon#about to read 4, iclass 25, count 2 2006.232.07:38:19.39#ibcon#read 4, iclass 25, count 2 2006.232.07:38:19.39#ibcon#about to read 5, iclass 25, count 2 2006.232.07:38:19.39#ibcon#read 5, iclass 25, count 2 2006.232.07:38:19.39#ibcon#about to read 6, iclass 25, count 2 2006.232.07:38:19.39#ibcon#read 6, iclass 25, count 2 2006.232.07:38:19.39#ibcon#end of sib2, iclass 25, count 2 2006.232.07:38:19.39#ibcon#*after write, iclass 25, count 2 2006.232.07:38:19.39#ibcon#*before return 0, iclass 25, count 2 2006.232.07:38:19.39#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.232.07:38:19.39#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.232.07:38:19.39#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.232.07:38:19.39#ibcon#ireg 7 cls_cnt 0 2006.232.07:38:19.39#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.232.07:38:19.51#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.232.07:38:19.51#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.232.07:38:19.51#ibcon#enter wrdev, iclass 25, count 0 2006.232.07:38:19.51#ibcon#first serial, iclass 25, count 0 2006.232.07:38:19.51#ibcon#enter sib2, iclass 25, count 0 2006.232.07:38:19.51#ibcon#flushed, iclass 25, count 0 2006.232.07:38:19.51#ibcon#about to write, iclass 25, count 0 2006.232.07:38:19.51#ibcon#wrote, iclass 25, count 0 2006.232.07:38:19.51#ibcon#about to read 3, iclass 25, count 0 2006.232.07:38:19.53#ibcon#read 3, iclass 25, count 0 2006.232.07:38:19.53#ibcon#about to read 4, iclass 25, count 0 2006.232.07:38:19.53#ibcon#read 4, iclass 25, count 0 2006.232.07:38:19.53#ibcon#about to read 5, iclass 25, count 0 2006.232.07:38:19.53#ibcon#read 5, iclass 25, count 0 2006.232.07:38:19.53#ibcon#about to read 6, iclass 25, count 0 2006.232.07:38:19.53#ibcon#read 6, iclass 25, count 0 2006.232.07:38:19.53#ibcon#end of sib2, iclass 25, count 0 2006.232.07:38:19.53#ibcon#*mode == 0, iclass 25, count 0 2006.232.07:38:19.53#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.232.07:38:19.53#ibcon#[25=USB\r\n] 2006.232.07:38:19.53#ibcon#*before write, iclass 25, count 0 2006.232.07:38:19.53#ibcon#enter sib2, iclass 25, count 0 2006.232.07:38:19.53#ibcon#flushed, iclass 25, count 0 2006.232.07:38:19.53#ibcon#about to write, iclass 25, count 0 2006.232.07:38:19.53#ibcon#wrote, iclass 25, count 0 2006.232.07:38:19.53#ibcon#about to read 3, iclass 25, count 0 2006.232.07:38:19.56#ibcon#read 3, iclass 25, count 0 2006.232.07:38:19.56#ibcon#about to read 4, iclass 25, count 0 2006.232.07:38:19.56#ibcon#read 4, iclass 25, count 0 2006.232.07:38:19.56#ibcon#about to read 5, iclass 25, count 0 2006.232.07:38:19.56#ibcon#read 5, iclass 25, count 0 2006.232.07:38:19.56#ibcon#about to read 6, iclass 25, count 0 2006.232.07:38:19.56#ibcon#read 6, iclass 25, count 0 2006.232.07:38:19.56#ibcon#end of sib2, iclass 25, count 0 2006.232.07:38:19.56#ibcon#*after write, iclass 25, count 0 2006.232.07:38:19.56#ibcon#*before return 0, iclass 25, count 0 2006.232.07:38:19.56#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.232.07:38:19.56#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.232.07:38:19.56#ibcon#about to clear, iclass 25 cls_cnt 0 2006.232.07:38:19.56#ibcon#cleared, iclass 25 cls_cnt 0 2006.232.07:38:19.56$vc4f8/valo=6,772.99 2006.232.07:38:19.56#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.232.07:38:19.56#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.232.07:38:19.57#ibcon#ireg 17 cls_cnt 0 2006.232.07:38:19.57#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.232.07:38:19.57#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.232.07:38:19.57#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.232.07:38:19.57#ibcon#enter wrdev, iclass 27, count 0 2006.232.07:38:19.57#ibcon#first serial, iclass 27, count 0 2006.232.07:38:19.57#ibcon#enter sib2, iclass 27, count 0 2006.232.07:38:19.57#ibcon#flushed, iclass 27, count 0 2006.232.07:38:19.57#ibcon#about to write, iclass 27, count 0 2006.232.07:38:19.57#ibcon#wrote, iclass 27, count 0 2006.232.07:38:19.57#ibcon#about to read 3, iclass 27, count 0 2006.232.07:38:19.58#ibcon#read 3, iclass 27, count 0 2006.232.07:38:19.58#ibcon#about to read 4, iclass 27, count 0 2006.232.07:38:19.58#ibcon#read 4, iclass 27, count 0 2006.232.07:38:19.58#ibcon#about to read 5, iclass 27, count 0 2006.232.07:38:19.58#ibcon#read 5, iclass 27, count 0 2006.232.07:38:19.58#ibcon#about to read 6, iclass 27, count 0 2006.232.07:38:19.58#ibcon#read 6, iclass 27, count 0 2006.232.07:38:19.58#ibcon#end of sib2, iclass 27, count 0 2006.232.07:38:19.58#ibcon#*mode == 0, iclass 27, count 0 2006.232.07:38:19.58#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.232.07:38:19.58#ibcon#[26=FRQ=06,772.99\r\n] 2006.232.07:38:19.58#ibcon#*before write, iclass 27, count 0 2006.232.07:38:19.58#ibcon#enter sib2, iclass 27, count 0 2006.232.07:38:19.58#ibcon#flushed, iclass 27, count 0 2006.232.07:38:19.58#ibcon#about to write, iclass 27, count 0 2006.232.07:38:19.58#ibcon#wrote, iclass 27, count 0 2006.232.07:38:19.58#ibcon#about to read 3, iclass 27, count 0 2006.232.07:38:19.63#ibcon#read 3, iclass 27, count 0 2006.232.07:38:19.63#ibcon#about to read 4, iclass 27, count 0 2006.232.07:38:19.63#ibcon#read 4, iclass 27, count 0 2006.232.07:38:19.63#ibcon#about to read 5, iclass 27, count 0 2006.232.07:38:19.63#ibcon#read 5, iclass 27, count 0 2006.232.07:38:19.63#ibcon#about to read 6, iclass 27, count 0 2006.232.07:38:19.63#ibcon#read 6, iclass 27, count 0 2006.232.07:38:19.63#ibcon#end of sib2, iclass 27, count 0 2006.232.07:38:19.63#ibcon#*after write, iclass 27, count 0 2006.232.07:38:19.63#ibcon#*before return 0, iclass 27, count 0 2006.232.07:38:19.63#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.232.07:38:19.63#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.232.07:38:19.63#ibcon#about to clear, iclass 27 cls_cnt 0 2006.232.07:38:19.63#ibcon#cleared, iclass 27 cls_cnt 0 2006.232.07:38:19.63$vc4f8/va=6,6 2006.232.07:38:19.63#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.232.07:38:19.63#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.232.07:38:19.63#ibcon#ireg 11 cls_cnt 2 2006.232.07:38:19.63#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.232.07:38:19.67#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.232.07:38:19.67#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.232.07:38:19.67#ibcon#enter wrdev, iclass 29, count 2 2006.232.07:38:19.67#ibcon#first serial, iclass 29, count 2 2006.232.07:38:19.67#ibcon#enter sib2, iclass 29, count 2 2006.232.07:38:19.67#ibcon#flushed, iclass 29, count 2 2006.232.07:38:19.67#ibcon#about to write, iclass 29, count 2 2006.232.07:38:19.67#ibcon#wrote, iclass 29, count 2 2006.232.07:38:19.67#ibcon#about to read 3, iclass 29, count 2 2006.232.07:38:19.69#ibcon#read 3, iclass 29, count 2 2006.232.07:38:19.69#ibcon#about to read 4, iclass 29, count 2 2006.232.07:38:19.69#ibcon#read 4, iclass 29, count 2 2006.232.07:38:19.69#ibcon#about to read 5, iclass 29, count 2 2006.232.07:38:19.69#ibcon#read 5, iclass 29, count 2 2006.232.07:38:19.69#ibcon#about to read 6, iclass 29, count 2 2006.232.07:38:19.69#ibcon#read 6, iclass 29, count 2 2006.232.07:38:19.69#ibcon#end of sib2, iclass 29, count 2 2006.232.07:38:19.69#ibcon#*mode == 0, iclass 29, count 2 2006.232.07:38:19.69#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.232.07:38:19.69#ibcon#[25=AT06-06\r\n] 2006.232.07:38:19.69#ibcon#*before write, iclass 29, count 2 2006.232.07:38:19.69#ibcon#enter sib2, iclass 29, count 2 2006.232.07:38:19.69#ibcon#flushed, iclass 29, count 2 2006.232.07:38:19.69#ibcon#about to write, iclass 29, count 2 2006.232.07:38:19.69#ibcon#wrote, iclass 29, count 2 2006.232.07:38:19.69#ibcon#about to read 3, iclass 29, count 2 2006.232.07:38:19.72#ibcon#read 3, iclass 29, count 2 2006.232.07:38:19.72#ibcon#about to read 4, iclass 29, count 2 2006.232.07:38:19.72#ibcon#read 4, iclass 29, count 2 2006.232.07:38:19.72#ibcon#about to read 5, iclass 29, count 2 2006.232.07:38:19.72#ibcon#read 5, iclass 29, count 2 2006.232.07:38:19.72#ibcon#about to read 6, iclass 29, count 2 2006.232.07:38:19.72#ibcon#read 6, iclass 29, count 2 2006.232.07:38:19.72#ibcon#end of sib2, iclass 29, count 2 2006.232.07:38:19.72#ibcon#*after write, iclass 29, count 2 2006.232.07:38:19.72#ibcon#*before return 0, iclass 29, count 2 2006.232.07:38:19.72#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.232.07:38:19.72#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.232.07:38:19.72#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.232.07:38:19.72#ibcon#ireg 7 cls_cnt 0 2006.232.07:38:19.72#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.232.07:38:19.84#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.232.07:38:19.84#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.232.07:38:19.84#ibcon#enter wrdev, iclass 29, count 0 2006.232.07:38:19.84#ibcon#first serial, iclass 29, count 0 2006.232.07:38:19.84#ibcon#enter sib2, iclass 29, count 0 2006.232.07:38:19.84#ibcon#flushed, iclass 29, count 0 2006.232.07:38:19.84#ibcon#about to write, iclass 29, count 0 2006.232.07:38:19.84#ibcon#wrote, iclass 29, count 0 2006.232.07:38:19.84#ibcon#about to read 3, iclass 29, count 0 2006.232.07:38:19.86#ibcon#read 3, iclass 29, count 0 2006.232.07:38:19.86#ibcon#about to read 4, iclass 29, count 0 2006.232.07:38:19.86#ibcon#read 4, iclass 29, count 0 2006.232.07:38:19.86#ibcon#about to read 5, iclass 29, count 0 2006.232.07:38:19.86#ibcon#read 5, iclass 29, count 0 2006.232.07:38:19.86#ibcon#about to read 6, iclass 29, count 0 2006.232.07:38:19.86#ibcon#read 6, iclass 29, count 0 2006.232.07:38:19.86#ibcon#end of sib2, iclass 29, count 0 2006.232.07:38:19.86#ibcon#*mode == 0, iclass 29, count 0 2006.232.07:38:19.86#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.232.07:38:19.86#ibcon#[25=USB\r\n] 2006.232.07:38:19.86#ibcon#*before write, iclass 29, count 0 2006.232.07:38:19.86#ibcon#enter sib2, iclass 29, count 0 2006.232.07:38:19.86#ibcon#flushed, iclass 29, count 0 2006.232.07:38:19.86#ibcon#about to write, iclass 29, count 0 2006.232.07:38:19.86#ibcon#wrote, iclass 29, count 0 2006.232.07:38:19.86#ibcon#about to read 3, iclass 29, count 0 2006.232.07:38:19.89#ibcon#read 3, iclass 29, count 0 2006.232.07:38:19.89#ibcon#about to read 4, iclass 29, count 0 2006.232.07:38:19.89#ibcon#read 4, iclass 29, count 0 2006.232.07:38:19.89#ibcon#about to read 5, iclass 29, count 0 2006.232.07:38:19.89#ibcon#read 5, iclass 29, count 0 2006.232.07:38:19.89#ibcon#about to read 6, iclass 29, count 0 2006.232.07:38:19.89#ibcon#read 6, iclass 29, count 0 2006.232.07:38:19.89#ibcon#end of sib2, iclass 29, count 0 2006.232.07:38:19.89#ibcon#*after write, iclass 29, count 0 2006.232.07:38:19.89#ibcon#*before return 0, iclass 29, count 0 2006.232.07:38:19.89#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.232.07:38:19.89#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.232.07:38:19.89#ibcon#about to clear, iclass 29 cls_cnt 0 2006.232.07:38:19.89#ibcon#cleared, iclass 29 cls_cnt 0 2006.232.07:38:19.89$vc4f8/valo=7,832.99 2006.232.07:38:19.89#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.232.07:38:19.89#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.232.07:38:19.89#ibcon#ireg 17 cls_cnt 0 2006.232.07:38:19.89#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.232.07:38:19.89#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.232.07:38:19.89#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.232.07:38:19.89#ibcon#enter wrdev, iclass 31, count 0 2006.232.07:38:19.89#ibcon#first serial, iclass 31, count 0 2006.232.07:38:19.90#ibcon#enter sib2, iclass 31, count 0 2006.232.07:38:19.90#ibcon#flushed, iclass 31, count 0 2006.232.07:38:19.90#ibcon#about to write, iclass 31, count 0 2006.232.07:38:19.90#ibcon#wrote, iclass 31, count 0 2006.232.07:38:19.90#ibcon#about to read 3, iclass 31, count 0 2006.232.07:38:19.91#ibcon#read 3, iclass 31, count 0 2006.232.07:38:19.91#ibcon#about to read 4, iclass 31, count 0 2006.232.07:38:19.91#ibcon#read 4, iclass 31, count 0 2006.232.07:38:19.91#ibcon#about to read 5, iclass 31, count 0 2006.232.07:38:19.91#ibcon#read 5, iclass 31, count 0 2006.232.07:38:19.91#ibcon#about to read 6, iclass 31, count 0 2006.232.07:38:19.91#ibcon#read 6, iclass 31, count 0 2006.232.07:38:19.91#ibcon#end of sib2, iclass 31, count 0 2006.232.07:38:19.91#ibcon#*mode == 0, iclass 31, count 0 2006.232.07:38:19.91#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.232.07:38:19.91#ibcon#[26=FRQ=07,832.99\r\n] 2006.232.07:38:19.91#ibcon#*before write, iclass 31, count 0 2006.232.07:38:19.91#ibcon#enter sib2, iclass 31, count 0 2006.232.07:38:19.91#ibcon#flushed, iclass 31, count 0 2006.232.07:38:19.91#ibcon#about to write, iclass 31, count 0 2006.232.07:38:19.91#ibcon#wrote, iclass 31, count 0 2006.232.07:38:19.91#ibcon#about to read 3, iclass 31, count 0 2006.232.07:38:19.95#ibcon#read 3, iclass 31, count 0 2006.232.07:38:19.95#ibcon#about to read 4, iclass 31, count 0 2006.232.07:38:19.95#ibcon#read 4, iclass 31, count 0 2006.232.07:38:19.95#ibcon#about to read 5, iclass 31, count 0 2006.232.07:38:19.95#ibcon#read 5, iclass 31, count 0 2006.232.07:38:19.95#ibcon#about to read 6, iclass 31, count 0 2006.232.07:38:19.95#ibcon#read 6, iclass 31, count 0 2006.232.07:38:19.95#ibcon#end of sib2, iclass 31, count 0 2006.232.07:38:19.95#ibcon#*after write, iclass 31, count 0 2006.232.07:38:19.95#ibcon#*before return 0, iclass 31, count 0 2006.232.07:38:19.95#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.232.07:38:19.95#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.232.07:38:19.95#ibcon#about to clear, iclass 31 cls_cnt 0 2006.232.07:38:19.95#ibcon#cleared, iclass 31 cls_cnt 0 2006.232.07:38:19.95$vc4f8/va=7,6 2006.232.07:38:19.95#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.232.07:38:19.95#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.232.07:38:19.95#ibcon#ireg 11 cls_cnt 2 2006.232.07:38:19.95#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.232.07:38:20.01#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.232.07:38:20.01#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.232.07:38:20.01#ibcon#enter wrdev, iclass 33, count 2 2006.232.07:38:20.01#ibcon#first serial, iclass 33, count 2 2006.232.07:38:20.01#ibcon#enter sib2, iclass 33, count 2 2006.232.07:38:20.01#ibcon#flushed, iclass 33, count 2 2006.232.07:38:20.01#ibcon#about to write, iclass 33, count 2 2006.232.07:38:20.01#ibcon#wrote, iclass 33, count 2 2006.232.07:38:20.02#ibcon#about to read 3, iclass 33, count 2 2006.232.07:38:20.03#ibcon#read 3, iclass 33, count 2 2006.232.07:38:20.03#ibcon#about to read 4, iclass 33, count 2 2006.232.07:38:20.03#ibcon#read 4, iclass 33, count 2 2006.232.07:38:20.03#ibcon#about to read 5, iclass 33, count 2 2006.232.07:38:20.03#ibcon#read 5, iclass 33, count 2 2006.232.07:38:20.03#ibcon#about to read 6, iclass 33, count 2 2006.232.07:38:20.03#ibcon#read 6, iclass 33, count 2 2006.232.07:38:20.03#ibcon#end of sib2, iclass 33, count 2 2006.232.07:38:20.03#ibcon#*mode == 0, iclass 33, count 2 2006.232.07:38:20.03#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.232.07:38:20.03#ibcon#[25=AT07-06\r\n] 2006.232.07:38:20.03#ibcon#*before write, iclass 33, count 2 2006.232.07:38:20.03#ibcon#enter sib2, iclass 33, count 2 2006.232.07:38:20.03#ibcon#flushed, iclass 33, count 2 2006.232.07:38:20.03#ibcon#about to write, iclass 33, count 2 2006.232.07:38:20.03#ibcon#wrote, iclass 33, count 2 2006.232.07:38:20.03#ibcon#about to read 3, iclass 33, count 2 2006.232.07:38:20.06#ibcon#read 3, iclass 33, count 2 2006.232.07:38:20.06#ibcon#about to read 4, iclass 33, count 2 2006.232.07:38:20.06#ibcon#read 4, iclass 33, count 2 2006.232.07:38:20.06#ibcon#about to read 5, iclass 33, count 2 2006.232.07:38:20.06#ibcon#read 5, iclass 33, count 2 2006.232.07:38:20.06#ibcon#about to read 6, iclass 33, count 2 2006.232.07:38:20.06#ibcon#read 6, iclass 33, count 2 2006.232.07:38:20.06#ibcon#end of sib2, iclass 33, count 2 2006.232.07:38:20.06#ibcon#*after write, iclass 33, count 2 2006.232.07:38:20.06#ibcon#*before return 0, iclass 33, count 2 2006.232.07:38:20.06#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.232.07:38:20.06#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.232.07:38:20.06#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.232.07:38:20.06#ibcon#ireg 7 cls_cnt 0 2006.232.07:38:20.06#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.232.07:38:20.18#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.232.07:38:20.18#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.232.07:38:20.18#ibcon#enter wrdev, iclass 33, count 0 2006.232.07:38:20.18#ibcon#first serial, iclass 33, count 0 2006.232.07:38:20.18#ibcon#enter sib2, iclass 33, count 0 2006.232.07:38:20.18#ibcon#flushed, iclass 33, count 0 2006.232.07:38:20.18#ibcon#about to write, iclass 33, count 0 2006.232.07:38:20.18#ibcon#wrote, iclass 33, count 0 2006.232.07:38:20.18#ibcon#about to read 3, iclass 33, count 0 2006.232.07:38:20.20#ibcon#read 3, iclass 33, count 0 2006.232.07:38:20.20#ibcon#about to read 4, iclass 33, count 0 2006.232.07:38:20.20#ibcon#read 4, iclass 33, count 0 2006.232.07:38:20.20#ibcon#about to read 5, iclass 33, count 0 2006.232.07:38:20.20#ibcon#read 5, iclass 33, count 0 2006.232.07:38:20.20#ibcon#about to read 6, iclass 33, count 0 2006.232.07:38:20.20#ibcon#read 6, iclass 33, count 0 2006.232.07:38:20.20#ibcon#end of sib2, iclass 33, count 0 2006.232.07:38:20.20#ibcon#*mode == 0, iclass 33, count 0 2006.232.07:38:20.20#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.232.07:38:20.20#ibcon#[25=USB\r\n] 2006.232.07:38:20.20#ibcon#*before write, iclass 33, count 0 2006.232.07:38:20.20#ibcon#enter sib2, iclass 33, count 0 2006.232.07:38:20.20#ibcon#flushed, iclass 33, count 0 2006.232.07:38:20.20#ibcon#about to write, iclass 33, count 0 2006.232.07:38:20.20#ibcon#wrote, iclass 33, count 0 2006.232.07:38:20.20#ibcon#about to read 3, iclass 33, count 0 2006.232.07:38:20.23#ibcon#read 3, iclass 33, count 0 2006.232.07:38:20.23#ibcon#about to read 4, iclass 33, count 0 2006.232.07:38:20.23#ibcon#read 4, iclass 33, count 0 2006.232.07:38:20.23#ibcon#about to read 5, iclass 33, count 0 2006.232.07:38:20.23#ibcon#read 5, iclass 33, count 0 2006.232.07:38:20.23#ibcon#about to read 6, iclass 33, count 0 2006.232.07:38:20.23#ibcon#read 6, iclass 33, count 0 2006.232.07:38:20.23#ibcon#end of sib2, iclass 33, count 0 2006.232.07:38:20.23#ibcon#*after write, iclass 33, count 0 2006.232.07:38:20.23#ibcon#*before return 0, iclass 33, count 0 2006.232.07:38:20.23#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.232.07:38:20.23#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.232.07:38:20.23#ibcon#about to clear, iclass 33 cls_cnt 0 2006.232.07:38:20.23#ibcon#cleared, iclass 33 cls_cnt 0 2006.232.07:38:20.23$vc4f8/valo=8,852.99 2006.232.07:38:20.23#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.232.07:38:20.23#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.232.07:38:20.23#ibcon#ireg 17 cls_cnt 0 2006.232.07:38:20.23#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.232.07:38:20.23#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.232.07:38:20.23#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.232.07:38:20.23#ibcon#enter wrdev, iclass 35, count 0 2006.232.07:38:20.24#ibcon#first serial, iclass 35, count 0 2006.232.07:38:20.24#ibcon#enter sib2, iclass 35, count 0 2006.232.07:38:20.24#ibcon#flushed, iclass 35, count 0 2006.232.07:38:20.24#ibcon#about to write, iclass 35, count 0 2006.232.07:38:20.24#ibcon#wrote, iclass 35, count 0 2006.232.07:38:20.24#ibcon#about to read 3, iclass 35, count 0 2006.232.07:38:20.25#ibcon#read 3, iclass 35, count 0 2006.232.07:38:20.25#ibcon#about to read 4, iclass 35, count 0 2006.232.07:38:20.25#ibcon#read 4, iclass 35, count 0 2006.232.07:38:20.25#ibcon#about to read 5, iclass 35, count 0 2006.232.07:38:20.25#ibcon#read 5, iclass 35, count 0 2006.232.07:38:20.25#ibcon#about to read 6, iclass 35, count 0 2006.232.07:38:20.25#ibcon#read 6, iclass 35, count 0 2006.232.07:38:20.25#ibcon#end of sib2, iclass 35, count 0 2006.232.07:38:20.25#ibcon#*mode == 0, iclass 35, count 0 2006.232.07:38:20.25#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.232.07:38:20.25#ibcon#[26=FRQ=08,852.99\r\n] 2006.232.07:38:20.25#ibcon#*before write, iclass 35, count 0 2006.232.07:38:20.25#ibcon#enter sib2, iclass 35, count 0 2006.232.07:38:20.25#ibcon#flushed, iclass 35, count 0 2006.232.07:38:20.25#ibcon#about to write, iclass 35, count 0 2006.232.07:38:20.25#ibcon#wrote, iclass 35, count 0 2006.232.07:38:20.25#ibcon#about to read 3, iclass 35, count 0 2006.232.07:38:20.29#ibcon#read 3, iclass 35, count 0 2006.232.07:38:20.29#ibcon#about to read 4, iclass 35, count 0 2006.232.07:38:20.29#ibcon#read 4, iclass 35, count 0 2006.232.07:38:20.29#ibcon#about to read 5, iclass 35, count 0 2006.232.07:38:20.29#ibcon#read 5, iclass 35, count 0 2006.232.07:38:20.29#ibcon#about to read 6, iclass 35, count 0 2006.232.07:38:20.29#ibcon#read 6, iclass 35, count 0 2006.232.07:38:20.29#ibcon#end of sib2, iclass 35, count 0 2006.232.07:38:20.29#ibcon#*after write, iclass 35, count 0 2006.232.07:38:20.29#ibcon#*before return 0, iclass 35, count 0 2006.232.07:38:20.29#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.232.07:38:20.29#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.232.07:38:20.29#ibcon#about to clear, iclass 35 cls_cnt 0 2006.232.07:38:20.29#ibcon#cleared, iclass 35 cls_cnt 0 2006.232.07:38:20.29$vc4f8/va=8,6 2006.232.07:38:20.29#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.232.07:38:20.29#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.232.07:38:20.29#ibcon#ireg 11 cls_cnt 2 2006.232.07:38:20.29#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.232.07:38:20.35#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.232.07:38:20.35#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.232.07:38:20.35#ibcon#enter wrdev, iclass 37, count 2 2006.232.07:38:20.35#ibcon#first serial, iclass 37, count 2 2006.232.07:38:20.35#ibcon#enter sib2, iclass 37, count 2 2006.232.07:38:20.35#ibcon#flushed, iclass 37, count 2 2006.232.07:38:20.35#ibcon#about to write, iclass 37, count 2 2006.232.07:38:20.35#ibcon#wrote, iclass 37, count 2 2006.232.07:38:20.35#ibcon#about to read 3, iclass 37, count 2 2006.232.07:38:20.38#ibcon#read 3, iclass 37, count 2 2006.232.07:38:20.38#ibcon#about to read 4, iclass 37, count 2 2006.232.07:38:20.38#ibcon#read 4, iclass 37, count 2 2006.232.07:38:20.38#ibcon#about to read 5, iclass 37, count 2 2006.232.07:38:20.38#ibcon#read 5, iclass 37, count 2 2006.232.07:38:20.38#ibcon#about to read 6, iclass 37, count 2 2006.232.07:38:20.38#ibcon#read 6, iclass 37, count 2 2006.232.07:38:20.38#ibcon#end of sib2, iclass 37, count 2 2006.232.07:38:20.38#ibcon#*mode == 0, iclass 37, count 2 2006.232.07:38:20.38#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.232.07:38:20.38#ibcon#[25=AT08-06\r\n] 2006.232.07:38:20.38#ibcon#*before write, iclass 37, count 2 2006.232.07:38:20.38#ibcon#enter sib2, iclass 37, count 2 2006.232.07:38:20.38#ibcon#flushed, iclass 37, count 2 2006.232.07:38:20.38#ibcon#about to write, iclass 37, count 2 2006.232.07:38:20.38#ibcon#wrote, iclass 37, count 2 2006.232.07:38:20.38#ibcon#about to read 3, iclass 37, count 2 2006.232.07:38:20.41#ibcon#read 3, iclass 37, count 2 2006.232.07:38:20.41#ibcon#about to read 4, iclass 37, count 2 2006.232.07:38:20.41#ibcon#read 4, iclass 37, count 2 2006.232.07:38:20.41#ibcon#about to read 5, iclass 37, count 2 2006.232.07:38:20.41#ibcon#read 5, iclass 37, count 2 2006.232.07:38:20.41#ibcon#about to read 6, iclass 37, count 2 2006.232.07:38:20.41#ibcon#read 6, iclass 37, count 2 2006.232.07:38:20.41#ibcon#end of sib2, iclass 37, count 2 2006.232.07:38:20.41#ibcon#*after write, iclass 37, count 2 2006.232.07:38:20.41#ibcon#*before return 0, iclass 37, count 2 2006.232.07:38:20.41#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.232.07:38:20.41#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.232.07:38:20.41#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.232.07:38:20.41#ibcon#ireg 7 cls_cnt 0 2006.232.07:38:20.41#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.232.07:38:20.53#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.232.07:38:20.53#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.232.07:38:20.53#ibcon#enter wrdev, iclass 37, count 0 2006.232.07:38:20.53#ibcon#first serial, iclass 37, count 0 2006.232.07:38:20.53#ibcon#enter sib2, iclass 37, count 0 2006.232.07:38:20.53#ibcon#flushed, iclass 37, count 0 2006.232.07:38:20.53#ibcon#about to write, iclass 37, count 0 2006.232.07:38:20.53#ibcon#wrote, iclass 37, count 0 2006.232.07:38:20.53#ibcon#about to read 3, iclass 37, count 0 2006.232.07:38:20.55#ibcon#read 3, iclass 37, count 0 2006.232.07:38:20.55#ibcon#about to read 4, iclass 37, count 0 2006.232.07:38:20.55#ibcon#read 4, iclass 37, count 0 2006.232.07:38:20.55#ibcon#about to read 5, iclass 37, count 0 2006.232.07:38:20.55#ibcon#read 5, iclass 37, count 0 2006.232.07:38:20.55#ibcon#about to read 6, iclass 37, count 0 2006.232.07:38:20.55#ibcon#read 6, iclass 37, count 0 2006.232.07:38:20.55#ibcon#end of sib2, iclass 37, count 0 2006.232.07:38:20.55#ibcon#*mode == 0, iclass 37, count 0 2006.232.07:38:20.55#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.232.07:38:20.55#ibcon#[25=USB\r\n] 2006.232.07:38:20.55#ibcon#*before write, iclass 37, count 0 2006.232.07:38:20.55#ibcon#enter sib2, iclass 37, count 0 2006.232.07:38:20.55#ibcon#flushed, iclass 37, count 0 2006.232.07:38:20.55#ibcon#about to write, iclass 37, count 0 2006.232.07:38:20.55#ibcon#wrote, iclass 37, count 0 2006.232.07:38:20.55#ibcon#about to read 3, iclass 37, count 0 2006.232.07:38:20.58#ibcon#read 3, iclass 37, count 0 2006.232.07:38:20.58#ibcon#about to read 4, iclass 37, count 0 2006.232.07:38:20.58#ibcon#read 4, iclass 37, count 0 2006.232.07:38:20.58#ibcon#about to read 5, iclass 37, count 0 2006.232.07:38:20.58#ibcon#read 5, iclass 37, count 0 2006.232.07:38:20.58#ibcon#about to read 6, iclass 37, count 0 2006.232.07:38:20.58#ibcon#read 6, iclass 37, count 0 2006.232.07:38:20.58#ibcon#end of sib2, iclass 37, count 0 2006.232.07:38:20.58#ibcon#*after write, iclass 37, count 0 2006.232.07:38:20.58#ibcon#*before return 0, iclass 37, count 0 2006.232.07:38:20.58#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.232.07:38:20.58#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.232.07:38:20.58#ibcon#about to clear, iclass 37 cls_cnt 0 2006.232.07:38:20.58#ibcon#cleared, iclass 37 cls_cnt 0 2006.232.07:38:20.58$vc4f8/vblo=1,632.99 2006.232.07:38:20.58#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.232.07:38:20.58#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.232.07:38:20.58#ibcon#ireg 17 cls_cnt 0 2006.232.07:38:20.58#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.232.07:38:20.58#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.232.07:38:20.58#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.232.07:38:20.58#ibcon#enter wrdev, iclass 39, count 0 2006.232.07:38:20.58#ibcon#first serial, iclass 39, count 0 2006.232.07:38:20.58#ibcon#enter sib2, iclass 39, count 0 2006.232.07:38:20.59#ibcon#flushed, iclass 39, count 0 2006.232.07:38:20.59#ibcon#about to write, iclass 39, count 0 2006.232.07:38:20.59#ibcon#wrote, iclass 39, count 0 2006.232.07:38:20.59#ibcon#about to read 3, iclass 39, count 0 2006.232.07:38:20.60#ibcon#read 3, iclass 39, count 0 2006.232.07:38:20.60#ibcon#about to read 4, iclass 39, count 0 2006.232.07:38:20.60#ibcon#read 4, iclass 39, count 0 2006.232.07:38:20.60#ibcon#about to read 5, iclass 39, count 0 2006.232.07:38:20.60#ibcon#read 5, iclass 39, count 0 2006.232.07:38:20.60#ibcon#about to read 6, iclass 39, count 0 2006.232.07:38:20.60#ibcon#read 6, iclass 39, count 0 2006.232.07:38:20.60#ibcon#end of sib2, iclass 39, count 0 2006.232.07:38:20.60#ibcon#*mode == 0, iclass 39, count 0 2006.232.07:38:20.60#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.232.07:38:20.60#ibcon#[28=FRQ=01,632.99\r\n] 2006.232.07:38:20.60#ibcon#*before write, iclass 39, count 0 2006.232.07:38:20.60#ibcon#enter sib2, iclass 39, count 0 2006.232.07:38:20.60#ibcon#flushed, iclass 39, count 0 2006.232.07:38:20.60#ibcon#about to write, iclass 39, count 0 2006.232.07:38:20.60#ibcon#wrote, iclass 39, count 0 2006.232.07:38:20.60#ibcon#about to read 3, iclass 39, count 0 2006.232.07:38:20.64#ibcon#read 3, iclass 39, count 0 2006.232.07:38:20.64#ibcon#about to read 4, iclass 39, count 0 2006.232.07:38:20.64#ibcon#read 4, iclass 39, count 0 2006.232.07:38:20.64#ibcon#about to read 5, iclass 39, count 0 2006.232.07:38:20.64#ibcon#read 5, iclass 39, count 0 2006.232.07:38:20.64#ibcon#about to read 6, iclass 39, count 0 2006.232.07:38:20.64#ibcon#read 6, iclass 39, count 0 2006.232.07:38:20.64#ibcon#end of sib2, iclass 39, count 0 2006.232.07:38:20.64#ibcon#*after write, iclass 39, count 0 2006.232.07:38:20.64#ibcon#*before return 0, iclass 39, count 0 2006.232.07:38:20.64#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.232.07:38:20.64#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.232.07:38:20.64#ibcon#about to clear, iclass 39 cls_cnt 0 2006.232.07:38:20.64#ibcon#cleared, iclass 39 cls_cnt 0 2006.232.07:38:20.64$vc4f8/vb=1,4 2006.232.07:38:20.64#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.232.07:38:20.64#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.232.07:38:20.64#ibcon#ireg 11 cls_cnt 2 2006.232.07:38:20.64#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.232.07:38:20.64#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.232.07:38:20.64#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.232.07:38:20.64#ibcon#enter wrdev, iclass 3, count 2 2006.232.07:38:20.64#ibcon#first serial, iclass 3, count 2 2006.232.07:38:20.64#ibcon#enter sib2, iclass 3, count 2 2006.232.07:38:20.64#ibcon#flushed, iclass 3, count 2 2006.232.07:38:20.64#ibcon#about to write, iclass 3, count 2 2006.232.07:38:20.65#ibcon#wrote, iclass 3, count 2 2006.232.07:38:20.65#ibcon#about to read 3, iclass 3, count 2 2006.232.07:38:20.66#ibcon#read 3, iclass 3, count 2 2006.232.07:38:20.66#ibcon#about to read 4, iclass 3, count 2 2006.232.07:38:20.66#ibcon#read 4, iclass 3, count 2 2006.232.07:38:20.66#ibcon#about to read 5, iclass 3, count 2 2006.232.07:38:20.66#ibcon#read 5, iclass 3, count 2 2006.232.07:38:20.66#ibcon#about to read 6, iclass 3, count 2 2006.232.07:38:20.66#ibcon#read 6, iclass 3, count 2 2006.232.07:38:20.66#ibcon#end of sib2, iclass 3, count 2 2006.232.07:38:20.66#ibcon#*mode == 0, iclass 3, count 2 2006.232.07:38:20.66#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.232.07:38:20.66#ibcon#[27=AT01-04\r\n] 2006.232.07:38:20.66#ibcon#*before write, iclass 3, count 2 2006.232.07:38:20.66#ibcon#enter sib2, iclass 3, count 2 2006.232.07:38:20.66#ibcon#flushed, iclass 3, count 2 2006.232.07:38:20.66#ibcon#about to write, iclass 3, count 2 2006.232.07:38:20.66#ibcon#wrote, iclass 3, count 2 2006.232.07:38:20.66#ibcon#about to read 3, iclass 3, count 2 2006.232.07:38:20.69#ibcon#read 3, iclass 3, count 2 2006.232.07:38:20.69#ibcon#about to read 4, iclass 3, count 2 2006.232.07:38:20.69#ibcon#read 4, iclass 3, count 2 2006.232.07:38:20.69#ibcon#about to read 5, iclass 3, count 2 2006.232.07:38:20.69#ibcon#read 5, iclass 3, count 2 2006.232.07:38:20.69#ibcon#about to read 6, iclass 3, count 2 2006.232.07:38:20.69#ibcon#read 6, iclass 3, count 2 2006.232.07:38:20.69#ibcon#end of sib2, iclass 3, count 2 2006.232.07:38:20.69#ibcon#*after write, iclass 3, count 2 2006.232.07:38:20.69#ibcon#*before return 0, iclass 3, count 2 2006.232.07:38:20.69#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.232.07:38:20.69#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.232.07:38:20.69#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.232.07:38:20.69#ibcon#ireg 7 cls_cnt 0 2006.232.07:38:20.69#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.232.07:38:20.81#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.232.07:38:20.81#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.232.07:38:20.81#ibcon#enter wrdev, iclass 3, count 0 2006.232.07:38:20.81#ibcon#first serial, iclass 3, count 0 2006.232.07:38:20.81#ibcon#enter sib2, iclass 3, count 0 2006.232.07:38:20.81#ibcon#flushed, iclass 3, count 0 2006.232.07:38:20.81#ibcon#about to write, iclass 3, count 0 2006.232.07:38:20.81#ibcon#wrote, iclass 3, count 0 2006.232.07:38:20.81#ibcon#about to read 3, iclass 3, count 0 2006.232.07:38:20.83#ibcon#read 3, iclass 3, count 0 2006.232.07:38:20.83#ibcon#about to read 4, iclass 3, count 0 2006.232.07:38:20.83#ibcon#read 4, iclass 3, count 0 2006.232.07:38:20.83#ibcon#about to read 5, iclass 3, count 0 2006.232.07:38:20.83#ibcon#read 5, iclass 3, count 0 2006.232.07:38:20.83#ibcon#about to read 6, iclass 3, count 0 2006.232.07:38:20.83#ibcon#read 6, iclass 3, count 0 2006.232.07:38:20.83#ibcon#end of sib2, iclass 3, count 0 2006.232.07:38:20.83#ibcon#*mode == 0, iclass 3, count 0 2006.232.07:38:20.83#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.232.07:38:20.83#ibcon#[27=USB\r\n] 2006.232.07:38:20.83#ibcon#*before write, iclass 3, count 0 2006.232.07:38:20.83#ibcon#enter sib2, iclass 3, count 0 2006.232.07:38:20.83#ibcon#flushed, iclass 3, count 0 2006.232.07:38:20.83#ibcon#about to write, iclass 3, count 0 2006.232.07:38:20.83#ibcon#wrote, iclass 3, count 0 2006.232.07:38:20.83#ibcon#about to read 3, iclass 3, count 0 2006.232.07:38:20.86#ibcon#read 3, iclass 3, count 0 2006.232.07:38:20.86#ibcon#about to read 4, iclass 3, count 0 2006.232.07:38:20.86#ibcon#read 4, iclass 3, count 0 2006.232.07:38:20.86#ibcon#about to read 5, iclass 3, count 0 2006.232.07:38:20.86#ibcon#read 5, iclass 3, count 0 2006.232.07:38:20.86#ibcon#about to read 6, iclass 3, count 0 2006.232.07:38:20.86#ibcon#read 6, iclass 3, count 0 2006.232.07:38:20.86#ibcon#end of sib2, iclass 3, count 0 2006.232.07:38:20.86#ibcon#*after write, iclass 3, count 0 2006.232.07:38:20.86#ibcon#*before return 0, iclass 3, count 0 2006.232.07:38:20.86#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.232.07:38:20.86#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.232.07:38:20.86#ibcon#about to clear, iclass 3 cls_cnt 0 2006.232.07:38:20.86#ibcon#cleared, iclass 3 cls_cnt 0 2006.232.07:38:20.86$vc4f8/vblo=2,640.99 2006.232.07:38:20.86#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.232.07:38:20.86#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.232.07:38:20.86#ibcon#ireg 17 cls_cnt 0 2006.232.07:38:20.86#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.232.07:38:20.86#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.232.07:38:20.86#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.232.07:38:20.86#ibcon#enter wrdev, iclass 5, count 0 2006.232.07:38:20.86#ibcon#first serial, iclass 5, count 0 2006.232.07:38:20.87#ibcon#enter sib2, iclass 5, count 0 2006.232.07:38:20.87#ibcon#flushed, iclass 5, count 0 2006.232.07:38:20.87#ibcon#about to write, iclass 5, count 0 2006.232.07:38:20.87#ibcon#wrote, iclass 5, count 0 2006.232.07:38:20.87#ibcon#about to read 3, iclass 5, count 0 2006.232.07:38:20.88#ibcon#read 3, iclass 5, count 0 2006.232.07:38:20.88#ibcon#about to read 4, iclass 5, count 0 2006.232.07:38:20.88#ibcon#read 4, iclass 5, count 0 2006.232.07:38:20.88#ibcon#about to read 5, iclass 5, count 0 2006.232.07:38:20.88#ibcon#read 5, iclass 5, count 0 2006.232.07:38:20.88#ibcon#about to read 6, iclass 5, count 0 2006.232.07:38:20.88#ibcon#read 6, iclass 5, count 0 2006.232.07:38:20.88#ibcon#end of sib2, iclass 5, count 0 2006.232.07:38:20.88#ibcon#*mode == 0, iclass 5, count 0 2006.232.07:38:20.88#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.232.07:38:20.88#ibcon#[28=FRQ=02,640.99\r\n] 2006.232.07:38:20.88#ibcon#*before write, iclass 5, count 0 2006.232.07:38:20.88#ibcon#enter sib2, iclass 5, count 0 2006.232.07:38:20.88#ibcon#flushed, iclass 5, count 0 2006.232.07:38:20.88#ibcon#about to write, iclass 5, count 0 2006.232.07:38:20.88#ibcon#wrote, iclass 5, count 0 2006.232.07:38:20.88#ibcon#about to read 3, iclass 5, count 0 2006.232.07:38:20.92#ibcon#read 3, iclass 5, count 0 2006.232.07:38:20.92#ibcon#about to read 4, iclass 5, count 0 2006.232.07:38:20.92#ibcon#read 4, iclass 5, count 0 2006.232.07:38:20.92#ibcon#about to read 5, iclass 5, count 0 2006.232.07:38:20.92#ibcon#read 5, iclass 5, count 0 2006.232.07:38:20.92#ibcon#about to read 6, iclass 5, count 0 2006.232.07:38:20.92#ibcon#read 6, iclass 5, count 0 2006.232.07:38:20.92#ibcon#end of sib2, iclass 5, count 0 2006.232.07:38:20.92#ibcon#*after write, iclass 5, count 0 2006.232.07:38:20.92#ibcon#*before return 0, iclass 5, count 0 2006.232.07:38:20.92#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.232.07:38:20.92#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.232.07:38:20.92#ibcon#about to clear, iclass 5 cls_cnt 0 2006.232.07:38:20.92#ibcon#cleared, iclass 5 cls_cnt 0 2006.232.07:38:20.92$vc4f8/vb=2,4 2006.232.07:38:20.92#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.232.07:38:20.92#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.232.07:38:20.92#ibcon#ireg 11 cls_cnt 2 2006.232.07:38:20.92#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.232.07:38:20.98#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.232.07:38:20.98#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.232.07:38:20.98#ibcon#enter wrdev, iclass 7, count 2 2006.232.07:38:20.98#ibcon#first serial, iclass 7, count 2 2006.232.07:38:20.98#ibcon#enter sib2, iclass 7, count 2 2006.232.07:38:20.98#ibcon#flushed, iclass 7, count 2 2006.232.07:38:20.98#ibcon#about to write, iclass 7, count 2 2006.232.07:38:20.98#ibcon#wrote, iclass 7, count 2 2006.232.07:38:20.98#ibcon#about to read 3, iclass 7, count 2 2006.232.07:38:21.00#ibcon#read 3, iclass 7, count 2 2006.232.07:38:21.00#ibcon#about to read 4, iclass 7, count 2 2006.232.07:38:21.00#ibcon#read 4, iclass 7, count 2 2006.232.07:38:21.00#ibcon#about to read 5, iclass 7, count 2 2006.232.07:38:21.00#ibcon#read 5, iclass 7, count 2 2006.232.07:38:21.00#ibcon#about to read 6, iclass 7, count 2 2006.232.07:38:21.00#ibcon#read 6, iclass 7, count 2 2006.232.07:38:21.00#ibcon#end of sib2, iclass 7, count 2 2006.232.07:38:21.00#ibcon#*mode == 0, iclass 7, count 2 2006.232.07:38:21.00#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.232.07:38:21.00#ibcon#[27=AT02-04\r\n] 2006.232.07:38:21.00#ibcon#*before write, iclass 7, count 2 2006.232.07:38:21.00#ibcon#enter sib2, iclass 7, count 2 2006.232.07:38:21.00#ibcon#flushed, iclass 7, count 2 2006.232.07:38:21.00#ibcon#about to write, iclass 7, count 2 2006.232.07:38:21.00#ibcon#wrote, iclass 7, count 2 2006.232.07:38:21.00#ibcon#about to read 3, iclass 7, count 2 2006.232.07:38:21.03#ibcon#read 3, iclass 7, count 2 2006.232.07:38:21.03#ibcon#about to read 4, iclass 7, count 2 2006.232.07:38:21.03#ibcon#read 4, iclass 7, count 2 2006.232.07:38:21.03#ibcon#about to read 5, iclass 7, count 2 2006.232.07:38:21.03#ibcon#read 5, iclass 7, count 2 2006.232.07:38:21.03#ibcon#about to read 6, iclass 7, count 2 2006.232.07:38:21.03#ibcon#read 6, iclass 7, count 2 2006.232.07:38:21.03#ibcon#end of sib2, iclass 7, count 2 2006.232.07:38:21.03#ibcon#*after write, iclass 7, count 2 2006.232.07:38:21.03#ibcon#*before return 0, iclass 7, count 2 2006.232.07:38:21.03#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.232.07:38:21.03#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.232.07:38:21.03#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.232.07:38:21.03#ibcon#ireg 7 cls_cnt 0 2006.232.07:38:21.03#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.232.07:38:21.15#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.232.07:38:21.15#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.232.07:38:21.15#ibcon#enter wrdev, iclass 7, count 0 2006.232.07:38:21.15#ibcon#first serial, iclass 7, count 0 2006.232.07:38:21.15#ibcon#enter sib2, iclass 7, count 0 2006.232.07:38:21.15#ibcon#flushed, iclass 7, count 0 2006.232.07:38:21.15#ibcon#about to write, iclass 7, count 0 2006.232.07:38:21.15#ibcon#wrote, iclass 7, count 0 2006.232.07:38:21.15#ibcon#about to read 3, iclass 7, count 0 2006.232.07:38:21.17#ibcon#read 3, iclass 7, count 0 2006.232.07:38:21.17#ibcon#about to read 4, iclass 7, count 0 2006.232.07:38:21.17#ibcon#read 4, iclass 7, count 0 2006.232.07:38:21.17#ibcon#about to read 5, iclass 7, count 0 2006.232.07:38:21.17#ibcon#read 5, iclass 7, count 0 2006.232.07:38:21.17#ibcon#about to read 6, iclass 7, count 0 2006.232.07:38:21.17#ibcon#read 6, iclass 7, count 0 2006.232.07:38:21.17#ibcon#end of sib2, iclass 7, count 0 2006.232.07:38:21.17#ibcon#*mode == 0, iclass 7, count 0 2006.232.07:38:21.17#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.232.07:38:21.17#ibcon#[27=USB\r\n] 2006.232.07:38:21.17#ibcon#*before write, iclass 7, count 0 2006.232.07:38:21.17#ibcon#enter sib2, iclass 7, count 0 2006.232.07:38:21.17#ibcon#flushed, iclass 7, count 0 2006.232.07:38:21.17#ibcon#about to write, iclass 7, count 0 2006.232.07:38:21.17#ibcon#wrote, iclass 7, count 0 2006.232.07:38:21.17#ibcon#about to read 3, iclass 7, count 0 2006.232.07:38:21.20#ibcon#read 3, iclass 7, count 0 2006.232.07:38:21.20#ibcon#about to read 4, iclass 7, count 0 2006.232.07:38:21.20#ibcon#read 4, iclass 7, count 0 2006.232.07:38:21.20#ibcon#about to read 5, iclass 7, count 0 2006.232.07:38:21.20#ibcon#read 5, iclass 7, count 0 2006.232.07:38:21.20#ibcon#about to read 6, iclass 7, count 0 2006.232.07:38:21.20#ibcon#read 6, iclass 7, count 0 2006.232.07:38:21.20#ibcon#end of sib2, iclass 7, count 0 2006.232.07:38:21.20#ibcon#*after write, iclass 7, count 0 2006.232.07:38:21.20#ibcon#*before return 0, iclass 7, count 0 2006.232.07:38:21.20#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.232.07:38:21.20#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.232.07:38:21.20#ibcon#about to clear, iclass 7 cls_cnt 0 2006.232.07:38:21.20#ibcon#cleared, iclass 7 cls_cnt 0 2006.232.07:38:21.20$vc4f8/vblo=3,656.99 2006.232.07:38:21.20#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.232.07:38:21.20#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.232.07:38:21.20#ibcon#ireg 17 cls_cnt 0 2006.232.07:38:21.20#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.232.07:38:21.20#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.232.07:38:21.20#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.232.07:38:21.21#ibcon#enter wrdev, iclass 11, count 0 2006.232.07:38:21.21#ibcon#first serial, iclass 11, count 0 2006.232.07:38:21.21#ibcon#enter sib2, iclass 11, count 0 2006.232.07:38:21.21#ibcon#flushed, iclass 11, count 0 2006.232.07:38:21.21#ibcon#about to write, iclass 11, count 0 2006.232.07:38:21.21#ibcon#wrote, iclass 11, count 0 2006.232.07:38:21.21#ibcon#about to read 3, iclass 11, count 0 2006.232.07:38:21.22#ibcon#read 3, iclass 11, count 0 2006.232.07:38:21.22#ibcon#about to read 4, iclass 11, count 0 2006.232.07:38:21.22#ibcon#read 4, iclass 11, count 0 2006.232.07:38:21.22#ibcon#about to read 5, iclass 11, count 0 2006.232.07:38:21.22#ibcon#read 5, iclass 11, count 0 2006.232.07:38:21.22#ibcon#about to read 6, iclass 11, count 0 2006.232.07:38:21.22#ibcon#read 6, iclass 11, count 0 2006.232.07:38:21.22#ibcon#end of sib2, iclass 11, count 0 2006.232.07:38:21.22#ibcon#*mode == 0, iclass 11, count 0 2006.232.07:38:21.22#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.232.07:38:21.22#ibcon#[28=FRQ=03,656.99\r\n] 2006.232.07:38:21.22#ibcon#*before write, iclass 11, count 0 2006.232.07:38:21.22#ibcon#enter sib2, iclass 11, count 0 2006.232.07:38:21.22#ibcon#flushed, iclass 11, count 0 2006.232.07:38:21.22#ibcon#about to write, iclass 11, count 0 2006.232.07:38:21.22#ibcon#wrote, iclass 11, count 0 2006.232.07:38:21.22#ibcon#about to read 3, iclass 11, count 0 2006.232.07:38:21.26#ibcon#read 3, iclass 11, count 0 2006.232.07:38:21.26#ibcon#about to read 4, iclass 11, count 0 2006.232.07:38:21.26#ibcon#read 4, iclass 11, count 0 2006.232.07:38:21.26#ibcon#about to read 5, iclass 11, count 0 2006.232.07:38:21.26#ibcon#read 5, iclass 11, count 0 2006.232.07:38:21.26#ibcon#about to read 6, iclass 11, count 0 2006.232.07:38:21.26#ibcon#read 6, iclass 11, count 0 2006.232.07:38:21.26#ibcon#end of sib2, iclass 11, count 0 2006.232.07:38:21.26#ibcon#*after write, iclass 11, count 0 2006.232.07:38:21.26#ibcon#*before return 0, iclass 11, count 0 2006.232.07:38:21.26#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.232.07:38:21.26#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.232.07:38:21.26#ibcon#about to clear, iclass 11 cls_cnt 0 2006.232.07:38:21.26#ibcon#cleared, iclass 11 cls_cnt 0 2006.232.07:38:21.26$vc4f8/vb=3,4 2006.232.07:38:21.26#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.232.07:38:21.26#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.232.07:38:21.26#ibcon#ireg 11 cls_cnt 2 2006.232.07:38:21.26#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.232.07:38:21.32#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.232.07:38:21.32#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.232.07:38:21.32#ibcon#enter wrdev, iclass 13, count 2 2006.232.07:38:21.32#ibcon#first serial, iclass 13, count 2 2006.232.07:38:21.32#ibcon#enter sib2, iclass 13, count 2 2006.232.07:38:21.32#ibcon#flushed, iclass 13, count 2 2006.232.07:38:21.32#ibcon#about to write, iclass 13, count 2 2006.232.07:38:21.32#ibcon#wrote, iclass 13, count 2 2006.232.07:38:21.32#ibcon#about to read 3, iclass 13, count 2 2006.232.07:38:21.34#ibcon#read 3, iclass 13, count 2 2006.232.07:38:21.34#ibcon#about to read 4, iclass 13, count 2 2006.232.07:38:21.34#ibcon#read 4, iclass 13, count 2 2006.232.07:38:21.34#ibcon#about to read 5, iclass 13, count 2 2006.232.07:38:21.34#ibcon#read 5, iclass 13, count 2 2006.232.07:38:21.34#ibcon#about to read 6, iclass 13, count 2 2006.232.07:38:21.34#ibcon#read 6, iclass 13, count 2 2006.232.07:38:21.34#ibcon#end of sib2, iclass 13, count 2 2006.232.07:38:21.34#ibcon#*mode == 0, iclass 13, count 2 2006.232.07:38:21.34#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.232.07:38:21.34#ibcon#[27=AT03-04\r\n] 2006.232.07:38:21.34#ibcon#*before write, iclass 13, count 2 2006.232.07:38:21.34#ibcon#enter sib2, iclass 13, count 2 2006.232.07:38:21.34#ibcon#flushed, iclass 13, count 2 2006.232.07:38:21.34#ibcon#about to write, iclass 13, count 2 2006.232.07:38:21.34#ibcon#wrote, iclass 13, count 2 2006.232.07:38:21.34#ibcon#about to read 3, iclass 13, count 2 2006.232.07:38:21.37#ibcon#read 3, iclass 13, count 2 2006.232.07:38:21.37#ibcon#about to read 4, iclass 13, count 2 2006.232.07:38:21.37#ibcon#read 4, iclass 13, count 2 2006.232.07:38:21.37#ibcon#about to read 5, iclass 13, count 2 2006.232.07:38:21.37#ibcon#read 5, iclass 13, count 2 2006.232.07:38:21.37#ibcon#about to read 6, iclass 13, count 2 2006.232.07:38:21.37#ibcon#read 6, iclass 13, count 2 2006.232.07:38:21.37#ibcon#end of sib2, iclass 13, count 2 2006.232.07:38:21.37#ibcon#*after write, iclass 13, count 2 2006.232.07:38:21.37#ibcon#*before return 0, iclass 13, count 2 2006.232.07:38:21.37#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.232.07:38:21.37#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.232.07:38:21.37#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.232.07:38:21.37#ibcon#ireg 7 cls_cnt 0 2006.232.07:38:21.37#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.232.07:38:21.49#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.232.07:38:21.49#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.232.07:38:21.49#ibcon#enter wrdev, iclass 13, count 0 2006.232.07:38:21.49#ibcon#first serial, iclass 13, count 0 2006.232.07:38:21.49#ibcon#enter sib2, iclass 13, count 0 2006.232.07:38:21.49#ibcon#flushed, iclass 13, count 0 2006.232.07:38:21.49#ibcon#about to write, iclass 13, count 0 2006.232.07:38:21.49#ibcon#wrote, iclass 13, count 0 2006.232.07:38:21.49#ibcon#about to read 3, iclass 13, count 0 2006.232.07:38:21.51#ibcon#read 3, iclass 13, count 0 2006.232.07:38:21.51#ibcon#about to read 4, iclass 13, count 0 2006.232.07:38:21.51#ibcon#read 4, iclass 13, count 0 2006.232.07:38:21.51#ibcon#about to read 5, iclass 13, count 0 2006.232.07:38:21.51#ibcon#read 5, iclass 13, count 0 2006.232.07:38:21.51#ibcon#about to read 6, iclass 13, count 0 2006.232.07:38:21.51#ibcon#read 6, iclass 13, count 0 2006.232.07:38:21.51#ibcon#end of sib2, iclass 13, count 0 2006.232.07:38:21.51#ibcon#*mode == 0, iclass 13, count 0 2006.232.07:38:21.51#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.232.07:38:21.51#ibcon#[27=USB\r\n] 2006.232.07:38:21.51#ibcon#*before write, iclass 13, count 0 2006.232.07:38:21.51#ibcon#enter sib2, iclass 13, count 0 2006.232.07:38:21.51#ibcon#flushed, iclass 13, count 0 2006.232.07:38:21.51#ibcon#about to write, iclass 13, count 0 2006.232.07:38:21.51#ibcon#wrote, iclass 13, count 0 2006.232.07:38:21.51#ibcon#about to read 3, iclass 13, count 0 2006.232.07:38:21.54#ibcon#read 3, iclass 13, count 0 2006.232.07:38:21.54#ibcon#about to read 4, iclass 13, count 0 2006.232.07:38:21.54#ibcon#read 4, iclass 13, count 0 2006.232.07:38:21.54#ibcon#about to read 5, iclass 13, count 0 2006.232.07:38:21.54#ibcon#read 5, iclass 13, count 0 2006.232.07:38:21.54#ibcon#about to read 6, iclass 13, count 0 2006.232.07:38:21.54#ibcon#read 6, iclass 13, count 0 2006.232.07:38:21.54#ibcon#end of sib2, iclass 13, count 0 2006.232.07:38:21.54#ibcon#*after write, iclass 13, count 0 2006.232.07:38:21.54#ibcon#*before return 0, iclass 13, count 0 2006.232.07:38:21.54#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.232.07:38:21.54#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.232.07:38:21.54#ibcon#about to clear, iclass 13 cls_cnt 0 2006.232.07:38:21.54#ibcon#cleared, iclass 13 cls_cnt 0 2006.232.07:38:21.54$vc4f8/vblo=4,712.99 2006.232.07:38:21.54#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.232.07:38:21.54#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.232.07:38:21.54#ibcon#ireg 17 cls_cnt 0 2006.232.07:38:21.54#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.232.07:38:21.54#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.232.07:38:21.54#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.232.07:38:21.54#ibcon#enter wrdev, iclass 15, count 0 2006.232.07:38:21.54#ibcon#first serial, iclass 15, count 0 2006.232.07:38:21.54#ibcon#enter sib2, iclass 15, count 0 2006.232.07:38:21.54#ibcon#flushed, iclass 15, count 0 2006.232.07:38:21.54#ibcon#about to write, iclass 15, count 0 2006.232.07:38:21.55#ibcon#wrote, iclass 15, count 0 2006.232.07:38:21.55#ibcon#about to read 3, iclass 15, count 0 2006.232.07:38:21.56#ibcon#read 3, iclass 15, count 0 2006.232.07:38:21.56#ibcon#about to read 4, iclass 15, count 0 2006.232.07:38:21.56#ibcon#read 4, iclass 15, count 0 2006.232.07:38:21.56#ibcon#about to read 5, iclass 15, count 0 2006.232.07:38:21.56#ibcon#read 5, iclass 15, count 0 2006.232.07:38:21.56#ibcon#about to read 6, iclass 15, count 0 2006.232.07:38:21.56#ibcon#read 6, iclass 15, count 0 2006.232.07:38:21.56#ibcon#end of sib2, iclass 15, count 0 2006.232.07:38:21.56#ibcon#*mode == 0, iclass 15, count 0 2006.232.07:38:21.56#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.232.07:38:21.56#ibcon#[28=FRQ=04,712.99\r\n] 2006.232.07:38:21.56#ibcon#*before write, iclass 15, count 0 2006.232.07:38:21.56#ibcon#enter sib2, iclass 15, count 0 2006.232.07:38:21.56#ibcon#flushed, iclass 15, count 0 2006.232.07:38:21.56#ibcon#about to write, iclass 15, count 0 2006.232.07:38:21.56#ibcon#wrote, iclass 15, count 0 2006.232.07:38:21.56#ibcon#about to read 3, iclass 15, count 0 2006.232.07:38:21.60#ibcon#read 3, iclass 15, count 0 2006.232.07:38:21.60#ibcon#about to read 4, iclass 15, count 0 2006.232.07:38:21.60#ibcon#read 4, iclass 15, count 0 2006.232.07:38:21.60#ibcon#about to read 5, iclass 15, count 0 2006.232.07:38:21.60#ibcon#read 5, iclass 15, count 0 2006.232.07:38:21.60#ibcon#about to read 6, iclass 15, count 0 2006.232.07:38:21.60#ibcon#read 6, iclass 15, count 0 2006.232.07:38:21.60#ibcon#end of sib2, iclass 15, count 0 2006.232.07:38:21.60#ibcon#*after write, iclass 15, count 0 2006.232.07:38:21.60#ibcon#*before return 0, iclass 15, count 0 2006.232.07:38:21.60#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.232.07:38:21.60#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.232.07:38:21.60#ibcon#about to clear, iclass 15 cls_cnt 0 2006.232.07:38:21.60#ibcon#cleared, iclass 15 cls_cnt 0 2006.232.07:38:21.60$vc4f8/vb=4,4 2006.232.07:38:21.60#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.232.07:38:21.60#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.232.07:38:21.60#ibcon#ireg 11 cls_cnt 2 2006.232.07:38:21.60#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.232.07:38:21.66#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.232.07:38:21.66#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.232.07:38:21.66#ibcon#enter wrdev, iclass 17, count 2 2006.232.07:38:21.66#ibcon#first serial, iclass 17, count 2 2006.232.07:38:21.66#ibcon#enter sib2, iclass 17, count 2 2006.232.07:38:21.66#ibcon#flushed, iclass 17, count 2 2006.232.07:38:21.66#ibcon#about to write, iclass 17, count 2 2006.232.07:38:21.66#ibcon#wrote, iclass 17, count 2 2006.232.07:38:21.66#ibcon#about to read 3, iclass 17, count 2 2006.232.07:38:21.68#ibcon#read 3, iclass 17, count 2 2006.232.07:38:21.68#ibcon#about to read 4, iclass 17, count 2 2006.232.07:38:21.68#ibcon#read 4, iclass 17, count 2 2006.232.07:38:21.68#ibcon#about to read 5, iclass 17, count 2 2006.232.07:38:21.68#ibcon#read 5, iclass 17, count 2 2006.232.07:38:21.68#ibcon#about to read 6, iclass 17, count 2 2006.232.07:38:21.68#ibcon#read 6, iclass 17, count 2 2006.232.07:38:21.68#ibcon#end of sib2, iclass 17, count 2 2006.232.07:38:21.68#ibcon#*mode == 0, iclass 17, count 2 2006.232.07:38:21.68#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.232.07:38:21.68#ibcon#[27=AT04-04\r\n] 2006.232.07:38:21.68#ibcon#*before write, iclass 17, count 2 2006.232.07:38:21.68#ibcon#enter sib2, iclass 17, count 2 2006.232.07:38:21.68#ibcon#flushed, iclass 17, count 2 2006.232.07:38:21.68#ibcon#about to write, iclass 17, count 2 2006.232.07:38:21.68#ibcon#wrote, iclass 17, count 2 2006.232.07:38:21.68#ibcon#about to read 3, iclass 17, count 2 2006.232.07:38:21.71#ibcon#read 3, iclass 17, count 2 2006.232.07:38:21.71#ibcon#about to read 4, iclass 17, count 2 2006.232.07:38:21.71#ibcon#read 4, iclass 17, count 2 2006.232.07:38:21.71#ibcon#about to read 5, iclass 17, count 2 2006.232.07:38:21.71#ibcon#read 5, iclass 17, count 2 2006.232.07:38:21.71#ibcon#about to read 6, iclass 17, count 2 2006.232.07:38:21.71#ibcon#read 6, iclass 17, count 2 2006.232.07:38:21.71#ibcon#end of sib2, iclass 17, count 2 2006.232.07:38:21.71#ibcon#*after write, iclass 17, count 2 2006.232.07:38:21.71#ibcon#*before return 0, iclass 17, count 2 2006.232.07:38:21.71#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.232.07:38:21.71#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.232.07:38:21.71#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.232.07:38:21.71#ibcon#ireg 7 cls_cnt 0 2006.232.07:38:21.71#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.232.07:38:21.83#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.232.07:38:21.83#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.232.07:38:21.83#ibcon#enter wrdev, iclass 17, count 0 2006.232.07:38:21.83#ibcon#first serial, iclass 17, count 0 2006.232.07:38:21.83#ibcon#enter sib2, iclass 17, count 0 2006.232.07:38:21.83#ibcon#flushed, iclass 17, count 0 2006.232.07:38:21.83#ibcon#about to write, iclass 17, count 0 2006.232.07:38:21.83#ibcon#wrote, iclass 17, count 0 2006.232.07:38:21.83#ibcon#about to read 3, iclass 17, count 0 2006.232.07:38:21.85#ibcon#read 3, iclass 17, count 0 2006.232.07:38:21.85#ibcon#about to read 4, iclass 17, count 0 2006.232.07:38:21.85#ibcon#read 4, iclass 17, count 0 2006.232.07:38:21.85#ibcon#about to read 5, iclass 17, count 0 2006.232.07:38:21.85#ibcon#read 5, iclass 17, count 0 2006.232.07:38:21.85#ibcon#about to read 6, iclass 17, count 0 2006.232.07:38:21.85#ibcon#read 6, iclass 17, count 0 2006.232.07:38:21.85#ibcon#end of sib2, iclass 17, count 0 2006.232.07:38:21.85#ibcon#*mode == 0, iclass 17, count 0 2006.232.07:38:21.85#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.232.07:38:21.85#ibcon#[27=USB\r\n] 2006.232.07:38:21.85#ibcon#*before write, iclass 17, count 0 2006.232.07:38:21.85#ibcon#enter sib2, iclass 17, count 0 2006.232.07:38:21.85#ibcon#flushed, iclass 17, count 0 2006.232.07:38:21.85#ibcon#about to write, iclass 17, count 0 2006.232.07:38:21.85#ibcon#wrote, iclass 17, count 0 2006.232.07:38:21.85#ibcon#about to read 3, iclass 17, count 0 2006.232.07:38:21.88#ibcon#read 3, iclass 17, count 0 2006.232.07:38:21.88#ibcon#about to read 4, iclass 17, count 0 2006.232.07:38:21.88#ibcon#read 4, iclass 17, count 0 2006.232.07:38:21.88#ibcon#about to read 5, iclass 17, count 0 2006.232.07:38:21.88#ibcon#read 5, iclass 17, count 0 2006.232.07:38:21.88#ibcon#about to read 6, iclass 17, count 0 2006.232.07:38:21.88#ibcon#read 6, iclass 17, count 0 2006.232.07:38:21.88#ibcon#end of sib2, iclass 17, count 0 2006.232.07:38:21.88#ibcon#*after write, iclass 17, count 0 2006.232.07:38:21.88#ibcon#*before return 0, iclass 17, count 0 2006.232.07:38:21.88#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.232.07:38:21.88#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.232.07:38:21.88#ibcon#about to clear, iclass 17 cls_cnt 0 2006.232.07:38:21.88#ibcon#cleared, iclass 17 cls_cnt 0 2006.232.07:38:21.88$vc4f8/vblo=5,744.99 2006.232.07:38:21.88#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.232.07:38:21.88#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.232.07:38:21.88#ibcon#ireg 17 cls_cnt 0 2006.232.07:38:21.88#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.232.07:38:21.88#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.232.07:38:21.88#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.232.07:38:21.88#ibcon#enter wrdev, iclass 19, count 0 2006.232.07:38:21.89#ibcon#first serial, iclass 19, count 0 2006.232.07:38:21.89#ibcon#enter sib2, iclass 19, count 0 2006.232.07:38:21.89#ibcon#flushed, iclass 19, count 0 2006.232.07:38:21.89#ibcon#about to write, iclass 19, count 0 2006.232.07:38:21.89#ibcon#wrote, iclass 19, count 0 2006.232.07:38:21.89#ibcon#about to read 3, iclass 19, count 0 2006.232.07:38:21.90#ibcon#read 3, iclass 19, count 0 2006.232.07:38:21.90#ibcon#about to read 4, iclass 19, count 0 2006.232.07:38:21.90#ibcon#read 4, iclass 19, count 0 2006.232.07:38:21.90#ibcon#about to read 5, iclass 19, count 0 2006.232.07:38:21.90#ibcon#read 5, iclass 19, count 0 2006.232.07:38:21.90#ibcon#about to read 6, iclass 19, count 0 2006.232.07:38:21.90#ibcon#read 6, iclass 19, count 0 2006.232.07:38:21.90#ibcon#end of sib2, iclass 19, count 0 2006.232.07:38:21.90#ibcon#*mode == 0, iclass 19, count 0 2006.232.07:38:21.90#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.232.07:38:21.90#ibcon#[28=FRQ=05,744.99\r\n] 2006.232.07:38:21.90#ibcon#*before write, iclass 19, count 0 2006.232.07:38:21.90#ibcon#enter sib2, iclass 19, count 0 2006.232.07:38:21.90#ibcon#flushed, iclass 19, count 0 2006.232.07:38:21.90#ibcon#about to write, iclass 19, count 0 2006.232.07:38:21.90#ibcon#wrote, iclass 19, count 0 2006.232.07:38:21.90#ibcon#about to read 3, iclass 19, count 0 2006.232.07:38:21.94#ibcon#read 3, iclass 19, count 0 2006.232.07:38:21.94#ibcon#about to read 4, iclass 19, count 0 2006.232.07:38:21.94#ibcon#read 4, iclass 19, count 0 2006.232.07:38:21.94#ibcon#about to read 5, iclass 19, count 0 2006.232.07:38:21.94#ibcon#read 5, iclass 19, count 0 2006.232.07:38:21.94#ibcon#about to read 6, iclass 19, count 0 2006.232.07:38:21.94#ibcon#read 6, iclass 19, count 0 2006.232.07:38:21.94#ibcon#end of sib2, iclass 19, count 0 2006.232.07:38:21.94#ibcon#*after write, iclass 19, count 0 2006.232.07:38:21.94#ibcon#*before return 0, iclass 19, count 0 2006.232.07:38:21.94#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.232.07:38:21.94#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.232.07:38:21.94#ibcon#about to clear, iclass 19 cls_cnt 0 2006.232.07:38:21.94#ibcon#cleared, iclass 19 cls_cnt 0 2006.232.07:38:21.94$vc4f8/vb=5,3 2006.232.07:38:21.94#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.232.07:38:21.94#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.232.07:38:21.94#ibcon#ireg 11 cls_cnt 2 2006.232.07:38:21.94#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.232.07:38:22.00#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.232.07:38:22.00#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.232.07:38:22.00#ibcon#enter wrdev, iclass 21, count 2 2006.232.07:38:22.00#ibcon#first serial, iclass 21, count 2 2006.232.07:38:22.00#ibcon#enter sib2, iclass 21, count 2 2006.232.07:38:22.00#ibcon#flushed, iclass 21, count 2 2006.232.07:38:22.00#ibcon#about to write, iclass 21, count 2 2006.232.07:38:22.00#ibcon#wrote, iclass 21, count 2 2006.232.07:38:22.00#ibcon#about to read 3, iclass 21, count 2 2006.232.07:38:22.02#ibcon#read 3, iclass 21, count 2 2006.232.07:38:22.02#ibcon#about to read 4, iclass 21, count 2 2006.232.07:38:22.02#ibcon#read 4, iclass 21, count 2 2006.232.07:38:22.02#ibcon#about to read 5, iclass 21, count 2 2006.232.07:38:22.02#ibcon#read 5, iclass 21, count 2 2006.232.07:38:22.02#ibcon#about to read 6, iclass 21, count 2 2006.232.07:38:22.02#ibcon#read 6, iclass 21, count 2 2006.232.07:38:22.02#ibcon#end of sib2, iclass 21, count 2 2006.232.07:38:22.02#ibcon#*mode == 0, iclass 21, count 2 2006.232.07:38:22.02#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.232.07:38:22.02#ibcon#[27=AT05-03\r\n] 2006.232.07:38:22.02#ibcon#*before write, iclass 21, count 2 2006.232.07:38:22.03#ibcon#enter sib2, iclass 21, count 2 2006.232.07:38:22.03#ibcon#flushed, iclass 21, count 2 2006.232.07:38:22.03#ibcon#about to write, iclass 21, count 2 2006.232.07:38:22.03#ibcon#wrote, iclass 21, count 2 2006.232.07:38:22.03#ibcon#about to read 3, iclass 21, count 2 2006.232.07:38:22.05#ibcon#read 3, iclass 21, count 2 2006.232.07:38:22.05#ibcon#about to read 4, iclass 21, count 2 2006.232.07:38:22.05#ibcon#read 4, iclass 21, count 2 2006.232.07:38:22.05#ibcon#about to read 5, iclass 21, count 2 2006.232.07:38:22.05#ibcon#read 5, iclass 21, count 2 2006.232.07:38:22.05#ibcon#about to read 6, iclass 21, count 2 2006.232.07:38:22.05#ibcon#read 6, iclass 21, count 2 2006.232.07:38:22.05#ibcon#end of sib2, iclass 21, count 2 2006.232.07:38:22.05#ibcon#*after write, iclass 21, count 2 2006.232.07:38:22.05#ibcon#*before return 0, iclass 21, count 2 2006.232.07:38:22.05#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.232.07:38:22.05#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.232.07:38:22.05#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.232.07:38:22.05#ibcon#ireg 7 cls_cnt 0 2006.232.07:38:22.05#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.232.07:38:22.17#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.232.07:38:22.17#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.232.07:38:22.17#ibcon#enter wrdev, iclass 21, count 0 2006.232.07:38:22.17#ibcon#first serial, iclass 21, count 0 2006.232.07:38:22.17#ibcon#enter sib2, iclass 21, count 0 2006.232.07:38:22.17#ibcon#flushed, iclass 21, count 0 2006.232.07:38:22.17#ibcon#about to write, iclass 21, count 0 2006.232.07:38:22.17#ibcon#wrote, iclass 21, count 0 2006.232.07:38:22.17#ibcon#about to read 3, iclass 21, count 0 2006.232.07:38:22.19#ibcon#read 3, iclass 21, count 0 2006.232.07:38:22.19#ibcon#about to read 4, iclass 21, count 0 2006.232.07:38:22.19#ibcon#read 4, iclass 21, count 0 2006.232.07:38:22.19#ibcon#about to read 5, iclass 21, count 0 2006.232.07:38:22.19#ibcon#read 5, iclass 21, count 0 2006.232.07:38:22.19#ibcon#about to read 6, iclass 21, count 0 2006.232.07:38:22.19#ibcon#read 6, iclass 21, count 0 2006.232.07:38:22.19#ibcon#end of sib2, iclass 21, count 0 2006.232.07:38:22.19#ibcon#*mode == 0, iclass 21, count 0 2006.232.07:38:22.19#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.232.07:38:22.19#ibcon#[27=USB\r\n] 2006.232.07:38:22.19#ibcon#*before write, iclass 21, count 0 2006.232.07:38:22.19#ibcon#enter sib2, iclass 21, count 0 2006.232.07:38:22.19#ibcon#flushed, iclass 21, count 0 2006.232.07:38:22.19#ibcon#about to write, iclass 21, count 0 2006.232.07:38:22.19#ibcon#wrote, iclass 21, count 0 2006.232.07:38:22.19#ibcon#about to read 3, iclass 21, count 0 2006.232.07:38:22.22#ibcon#read 3, iclass 21, count 0 2006.232.07:38:22.22#ibcon#about to read 4, iclass 21, count 0 2006.232.07:38:22.22#ibcon#read 4, iclass 21, count 0 2006.232.07:38:22.22#ibcon#about to read 5, iclass 21, count 0 2006.232.07:38:22.22#ibcon#read 5, iclass 21, count 0 2006.232.07:38:22.22#ibcon#about to read 6, iclass 21, count 0 2006.232.07:38:22.22#ibcon#read 6, iclass 21, count 0 2006.232.07:38:22.22#ibcon#end of sib2, iclass 21, count 0 2006.232.07:38:22.22#ibcon#*after write, iclass 21, count 0 2006.232.07:38:22.22#ibcon#*before return 0, iclass 21, count 0 2006.232.07:38:22.22#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.232.07:38:22.22#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.232.07:38:22.22#ibcon#about to clear, iclass 21 cls_cnt 0 2006.232.07:38:22.22#ibcon#cleared, iclass 21 cls_cnt 0 2006.232.07:38:22.22$vc4f8/vblo=6,752.99 2006.232.07:38:22.22#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.232.07:38:22.22#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.232.07:38:22.22#ibcon#ireg 17 cls_cnt 0 2006.232.07:38:22.22#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.232.07:38:22.22#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.232.07:38:22.22#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.232.07:38:22.23#ibcon#enter wrdev, iclass 23, count 0 2006.232.07:38:22.23#ibcon#first serial, iclass 23, count 0 2006.232.07:38:22.23#ibcon#enter sib2, iclass 23, count 0 2006.232.07:38:22.23#ibcon#flushed, iclass 23, count 0 2006.232.07:38:22.23#ibcon#about to write, iclass 23, count 0 2006.232.07:38:22.23#ibcon#wrote, iclass 23, count 0 2006.232.07:38:22.23#ibcon#about to read 3, iclass 23, count 0 2006.232.07:38:22.24#ibcon#read 3, iclass 23, count 0 2006.232.07:38:22.24#ibcon#about to read 4, iclass 23, count 0 2006.232.07:38:22.24#ibcon#read 4, iclass 23, count 0 2006.232.07:38:22.24#ibcon#about to read 5, iclass 23, count 0 2006.232.07:38:22.24#ibcon#read 5, iclass 23, count 0 2006.232.07:38:22.24#ibcon#about to read 6, iclass 23, count 0 2006.232.07:38:22.24#ibcon#read 6, iclass 23, count 0 2006.232.07:38:22.24#ibcon#end of sib2, iclass 23, count 0 2006.232.07:38:22.24#ibcon#*mode == 0, iclass 23, count 0 2006.232.07:38:22.24#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.232.07:38:22.24#ibcon#[28=FRQ=06,752.99\r\n] 2006.232.07:38:22.24#ibcon#*before write, iclass 23, count 0 2006.232.07:38:22.24#ibcon#enter sib2, iclass 23, count 0 2006.232.07:38:22.24#ibcon#flushed, iclass 23, count 0 2006.232.07:38:22.24#ibcon#about to write, iclass 23, count 0 2006.232.07:38:22.24#ibcon#wrote, iclass 23, count 0 2006.232.07:38:22.24#ibcon#about to read 3, iclass 23, count 0 2006.232.07:38:22.28#ibcon#read 3, iclass 23, count 0 2006.232.07:38:22.28#ibcon#about to read 4, iclass 23, count 0 2006.232.07:38:22.28#ibcon#read 4, iclass 23, count 0 2006.232.07:38:22.28#ibcon#about to read 5, iclass 23, count 0 2006.232.07:38:22.28#ibcon#read 5, iclass 23, count 0 2006.232.07:38:22.28#ibcon#about to read 6, iclass 23, count 0 2006.232.07:38:22.28#ibcon#read 6, iclass 23, count 0 2006.232.07:38:22.28#ibcon#end of sib2, iclass 23, count 0 2006.232.07:38:22.28#ibcon#*after write, iclass 23, count 0 2006.232.07:38:22.28#ibcon#*before return 0, iclass 23, count 0 2006.232.07:38:22.28#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.232.07:38:22.28#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.232.07:38:22.28#ibcon#about to clear, iclass 23 cls_cnt 0 2006.232.07:38:22.28#ibcon#cleared, iclass 23 cls_cnt 0 2006.232.07:38:22.28$vc4f8/vb=6,4 2006.232.07:38:22.28#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.232.07:38:22.28#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.232.07:38:22.28#ibcon#ireg 11 cls_cnt 2 2006.232.07:38:22.28#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.232.07:38:22.34#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.232.07:38:22.34#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.232.07:38:22.34#ibcon#enter wrdev, iclass 25, count 2 2006.232.07:38:22.34#ibcon#first serial, iclass 25, count 2 2006.232.07:38:22.34#ibcon#enter sib2, iclass 25, count 2 2006.232.07:38:22.34#ibcon#flushed, iclass 25, count 2 2006.232.07:38:22.34#ibcon#about to write, iclass 25, count 2 2006.232.07:38:22.34#ibcon#wrote, iclass 25, count 2 2006.232.07:38:22.34#ibcon#about to read 3, iclass 25, count 2 2006.232.07:38:22.36#ibcon#read 3, iclass 25, count 2 2006.232.07:38:22.36#ibcon#about to read 4, iclass 25, count 2 2006.232.07:38:22.36#ibcon#read 4, iclass 25, count 2 2006.232.07:38:22.36#ibcon#about to read 5, iclass 25, count 2 2006.232.07:38:22.36#ibcon#read 5, iclass 25, count 2 2006.232.07:38:22.36#ibcon#about to read 6, iclass 25, count 2 2006.232.07:38:22.36#ibcon#read 6, iclass 25, count 2 2006.232.07:38:22.36#ibcon#end of sib2, iclass 25, count 2 2006.232.07:38:22.36#ibcon#*mode == 0, iclass 25, count 2 2006.232.07:38:22.36#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.232.07:38:22.36#ibcon#[27=AT06-04\r\n] 2006.232.07:38:22.36#ibcon#*before write, iclass 25, count 2 2006.232.07:38:22.36#ibcon#enter sib2, iclass 25, count 2 2006.232.07:38:22.36#ibcon#flushed, iclass 25, count 2 2006.232.07:38:22.36#ibcon#about to write, iclass 25, count 2 2006.232.07:38:22.36#ibcon#wrote, iclass 25, count 2 2006.232.07:38:22.36#ibcon#about to read 3, iclass 25, count 2 2006.232.07:38:22.39#ibcon#read 3, iclass 25, count 2 2006.232.07:38:22.39#ibcon#about to read 4, iclass 25, count 2 2006.232.07:38:22.39#ibcon#read 4, iclass 25, count 2 2006.232.07:38:22.39#ibcon#about to read 5, iclass 25, count 2 2006.232.07:38:22.39#ibcon#read 5, iclass 25, count 2 2006.232.07:38:22.39#ibcon#about to read 6, iclass 25, count 2 2006.232.07:38:22.39#ibcon#read 6, iclass 25, count 2 2006.232.07:38:22.39#ibcon#end of sib2, iclass 25, count 2 2006.232.07:38:22.39#ibcon#*after write, iclass 25, count 2 2006.232.07:38:22.39#ibcon#*before return 0, iclass 25, count 2 2006.232.07:38:22.39#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.232.07:38:22.39#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.232.07:38:22.39#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.232.07:38:22.39#ibcon#ireg 7 cls_cnt 0 2006.232.07:38:22.39#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.232.07:38:22.51#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.232.07:38:22.51#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.232.07:38:22.51#ibcon#enter wrdev, iclass 25, count 0 2006.232.07:38:22.51#ibcon#first serial, iclass 25, count 0 2006.232.07:38:22.51#ibcon#enter sib2, iclass 25, count 0 2006.232.07:38:22.51#ibcon#flushed, iclass 25, count 0 2006.232.07:38:22.51#ibcon#about to write, iclass 25, count 0 2006.232.07:38:22.51#ibcon#wrote, iclass 25, count 0 2006.232.07:38:22.51#ibcon#about to read 3, iclass 25, count 0 2006.232.07:38:22.53#ibcon#read 3, iclass 25, count 0 2006.232.07:38:22.53#ibcon#about to read 4, iclass 25, count 0 2006.232.07:38:22.53#ibcon#read 4, iclass 25, count 0 2006.232.07:38:22.53#ibcon#about to read 5, iclass 25, count 0 2006.232.07:38:22.53#ibcon#read 5, iclass 25, count 0 2006.232.07:38:22.53#ibcon#about to read 6, iclass 25, count 0 2006.232.07:38:22.53#ibcon#read 6, iclass 25, count 0 2006.232.07:38:22.53#ibcon#end of sib2, iclass 25, count 0 2006.232.07:38:22.53#ibcon#*mode == 0, iclass 25, count 0 2006.232.07:38:22.53#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.232.07:38:22.53#ibcon#[27=USB\r\n] 2006.232.07:38:22.53#ibcon#*before write, iclass 25, count 0 2006.232.07:38:22.53#ibcon#enter sib2, iclass 25, count 0 2006.232.07:38:22.53#ibcon#flushed, iclass 25, count 0 2006.232.07:38:22.53#ibcon#about to write, iclass 25, count 0 2006.232.07:38:22.53#ibcon#wrote, iclass 25, count 0 2006.232.07:38:22.53#ibcon#about to read 3, iclass 25, count 0 2006.232.07:38:22.56#ibcon#read 3, iclass 25, count 0 2006.232.07:38:22.56#ibcon#about to read 4, iclass 25, count 0 2006.232.07:38:22.56#ibcon#read 4, iclass 25, count 0 2006.232.07:38:22.56#ibcon#about to read 5, iclass 25, count 0 2006.232.07:38:22.56#ibcon#read 5, iclass 25, count 0 2006.232.07:38:22.56#ibcon#about to read 6, iclass 25, count 0 2006.232.07:38:22.56#ibcon#read 6, iclass 25, count 0 2006.232.07:38:22.56#ibcon#end of sib2, iclass 25, count 0 2006.232.07:38:22.56#ibcon#*after write, iclass 25, count 0 2006.232.07:38:22.56#ibcon#*before return 0, iclass 25, count 0 2006.232.07:38:22.56#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.232.07:38:22.56#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.232.07:38:22.56#ibcon#about to clear, iclass 25 cls_cnt 0 2006.232.07:38:22.56#ibcon#cleared, iclass 25 cls_cnt 0 2006.232.07:38:22.56$vc4f8/vabw=wide 2006.232.07:38:22.56#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.232.07:38:22.56#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.232.07:38:22.56#ibcon#ireg 8 cls_cnt 0 2006.232.07:38:22.56#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.232.07:38:22.56#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.232.07:38:22.56#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.232.07:38:22.56#ibcon#enter wrdev, iclass 27, count 0 2006.232.07:38:22.56#ibcon#first serial, iclass 27, count 0 2006.232.07:38:22.56#ibcon#enter sib2, iclass 27, count 0 2006.232.07:38:22.56#ibcon#flushed, iclass 27, count 0 2006.232.07:38:22.56#ibcon#about to write, iclass 27, count 0 2006.232.07:38:22.57#ibcon#wrote, iclass 27, count 0 2006.232.07:38:22.57#ibcon#about to read 3, iclass 27, count 0 2006.232.07:38:22.58#ibcon#read 3, iclass 27, count 0 2006.232.07:38:22.58#ibcon#about to read 4, iclass 27, count 0 2006.232.07:38:22.58#ibcon#read 4, iclass 27, count 0 2006.232.07:38:22.58#ibcon#about to read 5, iclass 27, count 0 2006.232.07:38:22.58#ibcon#read 5, iclass 27, count 0 2006.232.07:38:22.58#ibcon#about to read 6, iclass 27, count 0 2006.232.07:38:22.58#ibcon#read 6, iclass 27, count 0 2006.232.07:38:22.58#ibcon#end of sib2, iclass 27, count 0 2006.232.07:38:22.58#ibcon#*mode == 0, iclass 27, count 0 2006.232.07:38:22.58#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.232.07:38:22.58#ibcon#[25=BW32\r\n] 2006.232.07:38:22.58#ibcon#*before write, iclass 27, count 0 2006.232.07:38:22.58#ibcon#enter sib2, iclass 27, count 0 2006.232.07:38:22.58#ibcon#flushed, iclass 27, count 0 2006.232.07:38:22.58#ibcon#about to write, iclass 27, count 0 2006.232.07:38:22.58#ibcon#wrote, iclass 27, count 0 2006.232.07:38:22.58#ibcon#about to read 3, iclass 27, count 0 2006.232.07:38:22.61#ibcon#read 3, iclass 27, count 0 2006.232.07:38:22.61#ibcon#about to read 4, iclass 27, count 0 2006.232.07:38:22.61#ibcon#read 4, iclass 27, count 0 2006.232.07:38:22.61#ibcon#about to read 5, iclass 27, count 0 2006.232.07:38:22.61#ibcon#read 5, iclass 27, count 0 2006.232.07:38:22.61#ibcon#about to read 6, iclass 27, count 0 2006.232.07:38:22.61#ibcon#read 6, iclass 27, count 0 2006.232.07:38:22.61#ibcon#end of sib2, iclass 27, count 0 2006.232.07:38:22.61#ibcon#*after write, iclass 27, count 0 2006.232.07:38:22.61#ibcon#*before return 0, iclass 27, count 0 2006.232.07:38:22.61#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.232.07:38:22.61#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.232.07:38:22.61#ibcon#about to clear, iclass 27 cls_cnt 0 2006.232.07:38:22.61#ibcon#cleared, iclass 27 cls_cnt 0 2006.232.07:38:22.61$vc4f8/vbbw=wide 2006.232.07:38:22.61#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.232.07:38:22.61#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.232.07:38:22.61#ibcon#ireg 8 cls_cnt 0 2006.232.07:38:22.61#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:38:22.68#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:38:22.68#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:38:22.68#ibcon#enter wrdev, iclass 29, count 0 2006.232.07:38:22.68#ibcon#first serial, iclass 29, count 0 2006.232.07:38:22.68#ibcon#enter sib2, iclass 29, count 0 2006.232.07:38:22.68#ibcon#flushed, iclass 29, count 0 2006.232.07:38:22.68#ibcon#about to write, iclass 29, count 0 2006.232.07:38:22.68#ibcon#wrote, iclass 29, count 0 2006.232.07:38:22.68#ibcon#about to read 3, iclass 29, count 0 2006.232.07:38:22.70#ibcon#read 3, iclass 29, count 0 2006.232.07:38:22.70#ibcon#about to read 4, iclass 29, count 0 2006.232.07:38:22.70#ibcon#read 4, iclass 29, count 0 2006.232.07:38:22.70#ibcon#about to read 5, iclass 29, count 0 2006.232.07:38:22.70#ibcon#read 5, iclass 29, count 0 2006.232.07:38:22.70#ibcon#about to read 6, iclass 29, count 0 2006.232.07:38:22.70#ibcon#read 6, iclass 29, count 0 2006.232.07:38:22.70#ibcon#end of sib2, iclass 29, count 0 2006.232.07:38:22.70#ibcon#*mode == 0, iclass 29, count 0 2006.232.07:38:22.70#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.232.07:38:22.70#ibcon#[27=BW32\r\n] 2006.232.07:38:22.70#ibcon#*before write, iclass 29, count 0 2006.232.07:38:22.70#ibcon#enter sib2, iclass 29, count 0 2006.232.07:38:22.70#ibcon#flushed, iclass 29, count 0 2006.232.07:38:22.70#ibcon#about to write, iclass 29, count 0 2006.232.07:38:22.70#ibcon#wrote, iclass 29, count 0 2006.232.07:38:22.70#ibcon#about to read 3, iclass 29, count 0 2006.232.07:38:22.73#ibcon#read 3, iclass 29, count 0 2006.232.07:38:22.73#ibcon#about to read 4, iclass 29, count 0 2006.232.07:38:22.73#ibcon#read 4, iclass 29, count 0 2006.232.07:38:22.73#ibcon#about to read 5, iclass 29, count 0 2006.232.07:38:22.73#ibcon#read 5, iclass 29, count 0 2006.232.07:38:22.73#ibcon#about to read 6, iclass 29, count 0 2006.232.07:38:22.73#ibcon#read 6, iclass 29, count 0 2006.232.07:38:22.73#ibcon#end of sib2, iclass 29, count 0 2006.232.07:38:22.73#ibcon#*after write, iclass 29, count 0 2006.232.07:38:22.73#ibcon#*before return 0, iclass 29, count 0 2006.232.07:38:22.73#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:38:22.73#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:38:22.73#ibcon#about to clear, iclass 29 cls_cnt 0 2006.232.07:38:22.73#ibcon#cleared, iclass 29 cls_cnt 0 2006.232.07:38:22.73$4f8m12a/ifd4f 2006.232.07:38:22.73$ifd4f/lo= 2006.232.07:38:22.74$ifd4f/lo=lo1,7680.00,usb,rcp,1 2006.232.07:38:22.74$ifd4f/lo=lo2,1600.00,usb,rcp,1 2006.232.07:38:22.74$ifd4f/lo=lo3,8080.00,usb,rcp,1 2006.232.07:38:22.74$ifd4f/patch= 2006.232.07:38:22.74$ifd4f/patch=lo1,a1,a2,a3,a4 2006.232.07:38:22.74$ifd4f/patch=lo2,b1,b2,b3,b4,b5,b6 2006.232.07:38:22.74$ifd4f/patch=lo3,a5,a6,a7,a8 2006.232.07:38:22.74$4f8m12a/"form=m,16.000,1:2 2006.232.07:38:22.74$4f8m12a/"tpicd 2006.232.07:38:22.74$4f8m12a/echo=off 2006.232.07:38:22.74$4f8m12a/xlog=off 2006.232.07:38:22.74:!2006.232.07:38:50 2006.232.07:38:33.14#trakl#Source acquired 2006.232.07:38:34.14#flagr#flagr/antenna,acquired 2006.232.07:38:50.01:preob 2006.232.07:38:51.14/onsource/TRACKING 2006.232.07:38:51.14:!2006.232.07:39:00 2006.232.07:39:00.00:data_valid=on 2006.232.07:39:00.00:midob 2006.232.07:39:00.14/onsource/TRACKING 2006.232.07:39:00.15/wx/29.44,1007.2,87 2006.232.07:39:00.30/cable/+6.3873E-03 2006.232.07:39:01.39/va/01,08,usb,yes,30,32 2006.232.07:39:01.39/va/02,07,usb,yes,30,32 2006.232.07:39:01.39/va/03,08,usb,yes,23,23 2006.232.07:39:01.39/va/04,07,usb,yes,31,34 2006.232.07:39:01.39/va/05,07,usb,yes,35,37 2006.232.07:39:01.39/va/06,06,usb,yes,35,34 2006.232.07:39:01.39/va/07,06,usb,yes,36,35 2006.232.07:39:01.39/va/08,06,usb,yes,38,37 2006.232.07:39:01.62/valo/01,532.99,yes,locked 2006.232.07:39:01.62/valo/02,572.99,yes,locked 2006.232.07:39:01.62/valo/03,672.99,yes,locked 2006.232.07:39:01.62/valo/04,832.99,yes,locked 2006.232.07:39:01.62/valo/05,652.99,yes,locked 2006.232.07:39:01.62/valo/06,772.99,yes,locked 2006.232.07:39:01.62/valo/07,832.99,yes,locked 2006.232.07:39:01.62/valo/08,852.99,yes,locked 2006.232.07:39:02.71/vb/01,04,usb,yes,30,29 2006.232.07:39:02.71/vb/02,04,usb,yes,32,33 2006.232.07:39:02.71/vb/03,04,usb,yes,28,32 2006.232.07:39:02.71/vb/04,04,usb,yes,29,29 2006.232.07:39:02.71/vb/05,03,usb,yes,34,39 2006.232.07:39:02.71/vb/06,04,usb,yes,28,31 2006.232.07:39:02.71/vb/07,04,usb,yes,31,30 2006.232.07:39:02.71/vb/08,04,usb,yes,28,32 2006.232.07:39:02.95/vblo/01,632.99,yes,locked 2006.232.07:39:02.95/vblo/02,640.99,yes,locked 2006.232.07:39:02.95/vblo/03,656.99,yes,locked 2006.232.07:39:02.95/vblo/04,712.99,yes,locked 2006.232.07:39:02.95/vblo/05,744.99,yes,locked 2006.232.07:39:02.95/vblo/06,752.99,yes,locked 2006.232.07:39:02.95/vblo/07,734.99,yes,locked 2006.232.07:39:02.95/vblo/08,744.99,yes,locked 2006.232.07:39:03.10/vabw/8 2006.232.07:39:03.25/vbbw/8 2006.232.07:39:03.35/xfe/off,on,13.2 2006.232.07:39:03.72/ifatt/23,28,28,28 2006.232.07:39:04.07/fmout-gps/S +4.38E-07 2006.232.07:39:04.15:!2006.232.07:40:00 2006.232.07:40:00.01:data_valid=off 2006.232.07:40:00.02:postob 2006.232.07:40:00.10/cable/+6.3877E-03 2006.232.07:40:00.10/wx/29.44,1007.2,87 2006.232.07:40:01.07/fmout-gps/S +4.38E-07 2006.232.07:40:01.08:scan_name=232-0740,k06232,60 2006.232.07:40:01.08:source=0804+499,080839.67,495036.5,2000.0,ccw 2006.232.07:40:02.14#flagr#flagr/antenna,new-source 2006.232.07:40:02.15:checkk5 2006.232.07:40:02.54/chk_autoobs//k5ts1/ autoobs is running! 2006.232.07:40:02.91/chk_autoobs//k5ts2/ autoobs is running! 2006.232.07:40:03.29/chk_autoobs//k5ts3/ autoobs is running! 2006.232.07:40:03.67/chk_autoobs//k5ts4/ autoobs is running! 2006.232.07:40:04.03/chk_obsdata//k5ts1/T2320739??a.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:40:04.41/chk_obsdata//k5ts2/T2320739??b.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:40:04.77/chk_obsdata//k5ts3/T2320739??c.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:40:05.13/chk_obsdata//k5ts4/T2320739??d.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:40:05.82/k5log//k5ts1_log_newline 2006.232.07:40:06.50/k5log//k5ts2_log_newline 2006.232.07:40:07.19/k5log//k5ts3_log_newline 2006.232.07:40:07.88/k5log//k5ts4_log_newline 2006.232.07:40:07.90/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.232.07:40:07.90:4f8m12a=1 2006.232.07:40:07.90$4f8m12a/echo=on 2006.232.07:40:07.90$4f8m12a/pcalon 2006.232.07:40:07.90$pcalon/"no phase cal control is implemented here 2006.232.07:40:07.90$4f8m12a/"tpicd=stop 2006.232.07:40:07.90$4f8m12a/vc4f8 2006.232.07:40:07.90$vc4f8/valo=1,532.99 2006.232.07:40:07.91#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.232.07:40:07.91#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.232.07:40:07.91#ibcon#ireg 17 cls_cnt 0 2006.232.07:40:07.91#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:40:07.91#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:40:07.91#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:40:07.91#ibcon#enter wrdev, iclass 40, count 0 2006.232.07:40:07.91#ibcon#first serial, iclass 40, count 0 2006.232.07:40:07.91#ibcon#enter sib2, iclass 40, count 0 2006.232.07:40:07.91#ibcon#flushed, iclass 40, count 0 2006.232.07:40:07.91#ibcon#about to write, iclass 40, count 0 2006.232.07:40:07.91#ibcon#wrote, iclass 40, count 0 2006.232.07:40:07.91#ibcon#about to read 3, iclass 40, count 0 2006.232.07:40:07.95#ibcon#read 3, iclass 40, count 0 2006.232.07:40:07.95#ibcon#about to read 4, iclass 40, count 0 2006.232.07:40:07.95#ibcon#read 4, iclass 40, count 0 2006.232.07:40:07.95#ibcon#about to read 5, iclass 40, count 0 2006.232.07:40:07.95#ibcon#read 5, iclass 40, count 0 2006.232.07:40:07.95#ibcon#about to read 6, iclass 40, count 0 2006.232.07:40:07.95#ibcon#read 6, iclass 40, count 0 2006.232.07:40:07.95#ibcon#end of sib2, iclass 40, count 0 2006.232.07:40:07.95#ibcon#*mode == 0, iclass 40, count 0 2006.232.07:40:07.95#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.232.07:40:07.95#ibcon#[26=FRQ=01,532.99\r\n] 2006.232.07:40:07.95#ibcon#*before write, iclass 40, count 0 2006.232.07:40:07.95#ibcon#enter sib2, iclass 40, count 0 2006.232.07:40:07.95#ibcon#flushed, iclass 40, count 0 2006.232.07:40:07.95#ibcon#about to write, iclass 40, count 0 2006.232.07:40:07.95#ibcon#wrote, iclass 40, count 0 2006.232.07:40:07.95#ibcon#about to read 3, iclass 40, count 0 2006.232.07:40:07.99#ibcon#read 3, iclass 40, count 0 2006.232.07:40:07.99#ibcon#about to read 4, iclass 40, count 0 2006.232.07:40:07.99#ibcon#read 4, iclass 40, count 0 2006.232.07:40:07.99#ibcon#about to read 5, iclass 40, count 0 2006.232.07:40:07.99#ibcon#read 5, iclass 40, count 0 2006.232.07:40:07.99#ibcon#about to read 6, iclass 40, count 0 2006.232.07:40:07.99#ibcon#read 6, iclass 40, count 0 2006.232.07:40:07.99#ibcon#end of sib2, iclass 40, count 0 2006.232.07:40:07.99#ibcon#*after write, iclass 40, count 0 2006.232.07:40:07.99#ibcon#*before return 0, iclass 40, count 0 2006.232.07:40:07.99#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:40:07.99#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:40:07.99#ibcon#about to clear, iclass 40 cls_cnt 0 2006.232.07:40:07.99#ibcon#cleared, iclass 40 cls_cnt 0 2006.232.07:40:07.99$vc4f8/va=1,8 2006.232.07:40:07.99#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.232.07:40:07.99#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.232.07:40:07.99#ibcon#ireg 11 cls_cnt 2 2006.232.07:40:07.99#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:40:07.99#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:40:07.99#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:40:07.99#ibcon#enter wrdev, iclass 4, count 2 2006.232.07:40:07.99#ibcon#first serial, iclass 4, count 2 2006.232.07:40:07.99#ibcon#enter sib2, iclass 4, count 2 2006.232.07:40:07.99#ibcon#flushed, iclass 4, count 2 2006.232.07:40:07.99#ibcon#about to write, iclass 4, count 2 2006.232.07:40:07.99#ibcon#wrote, iclass 4, count 2 2006.232.07:40:07.99#ibcon#about to read 3, iclass 4, count 2 2006.232.07:40:08.01#ibcon#read 3, iclass 4, count 2 2006.232.07:40:08.01#ibcon#about to read 4, iclass 4, count 2 2006.232.07:40:08.01#ibcon#read 4, iclass 4, count 2 2006.232.07:40:08.01#ibcon#about to read 5, iclass 4, count 2 2006.232.07:40:08.01#ibcon#read 5, iclass 4, count 2 2006.232.07:40:08.01#ibcon#about to read 6, iclass 4, count 2 2006.232.07:40:08.01#ibcon#read 6, iclass 4, count 2 2006.232.07:40:08.01#ibcon#end of sib2, iclass 4, count 2 2006.232.07:40:08.01#ibcon#*mode == 0, iclass 4, count 2 2006.232.07:40:08.01#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.232.07:40:08.01#ibcon#[25=AT01-08\r\n] 2006.232.07:40:08.01#ibcon#*before write, iclass 4, count 2 2006.232.07:40:08.01#ibcon#enter sib2, iclass 4, count 2 2006.232.07:40:08.01#ibcon#flushed, iclass 4, count 2 2006.232.07:40:08.01#ibcon#about to write, iclass 4, count 2 2006.232.07:40:08.01#ibcon#wrote, iclass 4, count 2 2006.232.07:40:08.01#ibcon#about to read 3, iclass 4, count 2 2006.232.07:40:08.05#ibcon#read 3, iclass 4, count 2 2006.232.07:40:08.05#ibcon#about to read 4, iclass 4, count 2 2006.232.07:40:08.05#ibcon#read 4, iclass 4, count 2 2006.232.07:40:08.05#ibcon#about to read 5, iclass 4, count 2 2006.232.07:40:08.05#ibcon#read 5, iclass 4, count 2 2006.232.07:40:08.05#ibcon#about to read 6, iclass 4, count 2 2006.232.07:40:08.05#ibcon#read 6, iclass 4, count 2 2006.232.07:40:08.05#ibcon#end of sib2, iclass 4, count 2 2006.232.07:40:08.05#ibcon#*after write, iclass 4, count 2 2006.232.07:40:08.05#ibcon#*before return 0, iclass 4, count 2 2006.232.07:40:08.05#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:40:08.05#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:40:08.05#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.232.07:40:08.05#ibcon#ireg 7 cls_cnt 0 2006.232.07:40:08.05#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:40:08.16#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:40:08.16#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:40:08.16#ibcon#enter wrdev, iclass 4, count 0 2006.232.07:40:08.16#ibcon#first serial, iclass 4, count 0 2006.232.07:40:08.16#ibcon#enter sib2, iclass 4, count 0 2006.232.07:40:08.16#ibcon#flushed, iclass 4, count 0 2006.232.07:40:08.16#ibcon#about to write, iclass 4, count 0 2006.232.07:40:08.16#ibcon#wrote, iclass 4, count 0 2006.232.07:40:08.16#ibcon#about to read 3, iclass 4, count 0 2006.232.07:40:08.18#ibcon#read 3, iclass 4, count 0 2006.232.07:40:08.18#ibcon#about to read 4, iclass 4, count 0 2006.232.07:40:08.18#ibcon#read 4, iclass 4, count 0 2006.232.07:40:08.18#ibcon#about to read 5, iclass 4, count 0 2006.232.07:40:08.18#ibcon#read 5, iclass 4, count 0 2006.232.07:40:08.18#ibcon#about to read 6, iclass 4, count 0 2006.232.07:40:08.18#ibcon#read 6, iclass 4, count 0 2006.232.07:40:08.18#ibcon#end of sib2, iclass 4, count 0 2006.232.07:40:08.18#ibcon#*mode == 0, iclass 4, count 0 2006.232.07:40:08.18#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.232.07:40:08.18#ibcon#[25=USB\r\n] 2006.232.07:40:08.18#ibcon#*before write, iclass 4, count 0 2006.232.07:40:08.18#ibcon#enter sib2, iclass 4, count 0 2006.232.07:40:08.18#ibcon#flushed, iclass 4, count 0 2006.232.07:40:08.18#ibcon#about to write, iclass 4, count 0 2006.232.07:40:08.18#ibcon#wrote, iclass 4, count 0 2006.232.07:40:08.18#ibcon#about to read 3, iclass 4, count 0 2006.232.07:40:08.21#ibcon#read 3, iclass 4, count 0 2006.232.07:40:08.21#ibcon#about to read 4, iclass 4, count 0 2006.232.07:40:08.21#ibcon#read 4, iclass 4, count 0 2006.232.07:40:08.21#ibcon#about to read 5, iclass 4, count 0 2006.232.07:40:08.21#ibcon#read 5, iclass 4, count 0 2006.232.07:40:08.21#ibcon#about to read 6, iclass 4, count 0 2006.232.07:40:08.21#ibcon#read 6, iclass 4, count 0 2006.232.07:40:08.21#ibcon#end of sib2, iclass 4, count 0 2006.232.07:40:08.21#ibcon#*after write, iclass 4, count 0 2006.232.07:40:08.21#ibcon#*before return 0, iclass 4, count 0 2006.232.07:40:08.21#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:40:08.21#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:40:08.21#ibcon#about to clear, iclass 4 cls_cnt 0 2006.232.07:40:08.21#ibcon#cleared, iclass 4 cls_cnt 0 2006.232.07:40:08.22$vc4f8/valo=2,572.99 2006.232.07:40:08.22#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.232.07:40:08.22#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.232.07:40:08.22#ibcon#ireg 17 cls_cnt 0 2006.232.07:40:08.22#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:40:08.22#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:40:08.22#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:40:08.22#ibcon#enter wrdev, iclass 6, count 0 2006.232.07:40:08.22#ibcon#first serial, iclass 6, count 0 2006.232.07:40:08.22#ibcon#enter sib2, iclass 6, count 0 2006.232.07:40:08.22#ibcon#flushed, iclass 6, count 0 2006.232.07:40:08.22#ibcon#about to write, iclass 6, count 0 2006.232.07:40:08.22#ibcon#wrote, iclass 6, count 0 2006.232.07:40:08.22#ibcon#about to read 3, iclass 6, count 0 2006.232.07:40:08.23#ibcon#read 3, iclass 6, count 0 2006.232.07:40:08.23#ibcon#about to read 4, iclass 6, count 0 2006.232.07:40:08.23#ibcon#read 4, iclass 6, count 0 2006.232.07:40:08.23#ibcon#about to read 5, iclass 6, count 0 2006.232.07:40:08.23#ibcon#read 5, iclass 6, count 0 2006.232.07:40:08.23#ibcon#about to read 6, iclass 6, count 0 2006.232.07:40:08.23#ibcon#read 6, iclass 6, count 0 2006.232.07:40:08.23#ibcon#end of sib2, iclass 6, count 0 2006.232.07:40:08.23#ibcon#*mode == 0, iclass 6, count 0 2006.232.07:40:08.23#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.232.07:40:08.23#ibcon#[26=FRQ=02,572.99\r\n] 2006.232.07:40:08.23#ibcon#*before write, iclass 6, count 0 2006.232.07:40:08.23#ibcon#enter sib2, iclass 6, count 0 2006.232.07:40:08.23#ibcon#flushed, iclass 6, count 0 2006.232.07:40:08.23#ibcon#about to write, iclass 6, count 0 2006.232.07:40:08.23#ibcon#wrote, iclass 6, count 0 2006.232.07:40:08.23#ibcon#about to read 3, iclass 6, count 0 2006.232.07:40:08.27#ibcon#read 3, iclass 6, count 0 2006.232.07:40:08.27#ibcon#about to read 4, iclass 6, count 0 2006.232.07:40:08.27#ibcon#read 4, iclass 6, count 0 2006.232.07:40:08.27#ibcon#about to read 5, iclass 6, count 0 2006.232.07:40:08.27#ibcon#read 5, iclass 6, count 0 2006.232.07:40:08.27#ibcon#about to read 6, iclass 6, count 0 2006.232.07:40:08.27#ibcon#read 6, iclass 6, count 0 2006.232.07:40:08.27#ibcon#end of sib2, iclass 6, count 0 2006.232.07:40:08.27#ibcon#*after write, iclass 6, count 0 2006.232.07:40:08.27#ibcon#*before return 0, iclass 6, count 0 2006.232.07:40:08.27#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:40:08.27#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:40:08.27#ibcon#about to clear, iclass 6 cls_cnt 0 2006.232.07:40:08.27#ibcon#cleared, iclass 6 cls_cnt 0 2006.232.07:40:08.27$vc4f8/va=2,7 2006.232.07:40:08.27#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.232.07:40:08.28#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.232.07:40:08.28#ibcon#ireg 11 cls_cnt 2 2006.232.07:40:08.28#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.232.07:40:08.32#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.232.07:40:08.32#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.232.07:40:08.32#ibcon#enter wrdev, iclass 10, count 2 2006.232.07:40:08.32#ibcon#first serial, iclass 10, count 2 2006.232.07:40:08.32#ibcon#enter sib2, iclass 10, count 2 2006.232.07:40:08.32#ibcon#flushed, iclass 10, count 2 2006.232.07:40:08.32#ibcon#about to write, iclass 10, count 2 2006.232.07:40:08.32#ibcon#wrote, iclass 10, count 2 2006.232.07:40:08.32#ibcon#about to read 3, iclass 10, count 2 2006.232.07:40:08.34#ibcon#read 3, iclass 10, count 2 2006.232.07:40:08.34#ibcon#about to read 4, iclass 10, count 2 2006.232.07:40:08.34#ibcon#read 4, iclass 10, count 2 2006.232.07:40:08.34#ibcon#about to read 5, iclass 10, count 2 2006.232.07:40:08.34#ibcon#read 5, iclass 10, count 2 2006.232.07:40:08.34#ibcon#about to read 6, iclass 10, count 2 2006.232.07:40:08.34#ibcon#read 6, iclass 10, count 2 2006.232.07:40:08.34#ibcon#end of sib2, iclass 10, count 2 2006.232.07:40:08.34#ibcon#*mode == 0, iclass 10, count 2 2006.232.07:40:08.34#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.232.07:40:08.34#ibcon#[25=AT02-07\r\n] 2006.232.07:40:08.34#ibcon#*before write, iclass 10, count 2 2006.232.07:40:08.34#ibcon#enter sib2, iclass 10, count 2 2006.232.07:40:08.34#ibcon#flushed, iclass 10, count 2 2006.232.07:40:08.34#ibcon#about to write, iclass 10, count 2 2006.232.07:40:08.34#ibcon#wrote, iclass 10, count 2 2006.232.07:40:08.34#ibcon#about to read 3, iclass 10, count 2 2006.232.07:40:08.37#ibcon#read 3, iclass 10, count 2 2006.232.07:40:08.37#ibcon#about to read 4, iclass 10, count 2 2006.232.07:40:08.37#ibcon#read 4, iclass 10, count 2 2006.232.07:40:08.37#ibcon#about to read 5, iclass 10, count 2 2006.232.07:40:08.37#ibcon#read 5, iclass 10, count 2 2006.232.07:40:08.37#ibcon#about to read 6, iclass 10, count 2 2006.232.07:40:08.37#ibcon#read 6, iclass 10, count 2 2006.232.07:40:08.37#ibcon#end of sib2, iclass 10, count 2 2006.232.07:40:08.37#ibcon#*after write, iclass 10, count 2 2006.232.07:40:08.37#ibcon#*before return 0, iclass 10, count 2 2006.232.07:40:08.37#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.232.07:40:08.37#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.232.07:40:08.37#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.232.07:40:08.37#ibcon#ireg 7 cls_cnt 0 2006.232.07:40:08.37#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.232.07:40:08.50#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.232.07:40:08.50#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.232.07:40:08.50#ibcon#enter wrdev, iclass 10, count 0 2006.232.07:40:08.50#ibcon#first serial, iclass 10, count 0 2006.232.07:40:08.50#ibcon#enter sib2, iclass 10, count 0 2006.232.07:40:08.50#ibcon#flushed, iclass 10, count 0 2006.232.07:40:08.50#ibcon#about to write, iclass 10, count 0 2006.232.07:40:08.50#ibcon#wrote, iclass 10, count 0 2006.232.07:40:08.50#ibcon#about to read 3, iclass 10, count 0 2006.232.07:40:08.52#ibcon#read 3, iclass 10, count 0 2006.232.07:40:08.52#ibcon#about to read 4, iclass 10, count 0 2006.232.07:40:08.52#ibcon#read 4, iclass 10, count 0 2006.232.07:40:08.52#ibcon#about to read 5, iclass 10, count 0 2006.232.07:40:08.52#ibcon#read 5, iclass 10, count 0 2006.232.07:40:08.52#ibcon#about to read 6, iclass 10, count 0 2006.232.07:40:08.52#ibcon#read 6, iclass 10, count 0 2006.232.07:40:08.52#ibcon#end of sib2, iclass 10, count 0 2006.232.07:40:08.52#ibcon#*mode == 0, iclass 10, count 0 2006.232.07:40:08.52#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.232.07:40:08.52#ibcon#[25=USB\r\n] 2006.232.07:40:08.52#ibcon#*before write, iclass 10, count 0 2006.232.07:40:08.52#ibcon#enter sib2, iclass 10, count 0 2006.232.07:40:08.52#ibcon#flushed, iclass 10, count 0 2006.232.07:40:08.52#ibcon#about to write, iclass 10, count 0 2006.232.07:40:08.52#ibcon#wrote, iclass 10, count 0 2006.232.07:40:08.52#ibcon#about to read 3, iclass 10, count 0 2006.232.07:40:08.54#ibcon#read 3, iclass 10, count 0 2006.232.07:40:08.54#ibcon#about to read 4, iclass 10, count 0 2006.232.07:40:08.54#ibcon#read 4, iclass 10, count 0 2006.232.07:40:08.54#ibcon#about to read 5, iclass 10, count 0 2006.232.07:40:08.54#ibcon#read 5, iclass 10, count 0 2006.232.07:40:08.54#ibcon#about to read 6, iclass 10, count 0 2006.232.07:40:08.54#ibcon#read 6, iclass 10, count 0 2006.232.07:40:08.54#ibcon#end of sib2, iclass 10, count 0 2006.232.07:40:08.54#ibcon#*after write, iclass 10, count 0 2006.232.07:40:08.54#ibcon#*before return 0, iclass 10, count 0 2006.232.07:40:08.54#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.232.07:40:08.54#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.232.07:40:08.54#ibcon#about to clear, iclass 10 cls_cnt 0 2006.232.07:40:08.54#ibcon#cleared, iclass 10 cls_cnt 0 2006.232.07:40:08.54$vc4f8/valo=3,672.99 2006.232.07:40:08.54#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.232.07:40:08.54#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.232.07:40:08.54#ibcon#ireg 17 cls_cnt 0 2006.232.07:40:08.54#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.232.07:40:08.54#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.232.07:40:08.54#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.232.07:40:08.54#ibcon#enter wrdev, iclass 12, count 0 2006.232.07:40:08.54#ibcon#first serial, iclass 12, count 0 2006.232.07:40:08.54#ibcon#enter sib2, iclass 12, count 0 2006.232.07:40:08.55#ibcon#flushed, iclass 12, count 0 2006.232.07:40:08.55#ibcon#about to write, iclass 12, count 0 2006.232.07:40:08.55#ibcon#wrote, iclass 12, count 0 2006.232.07:40:08.55#ibcon#about to read 3, iclass 12, count 0 2006.232.07:40:08.56#ibcon#read 3, iclass 12, count 0 2006.232.07:40:08.56#ibcon#about to read 4, iclass 12, count 0 2006.232.07:40:08.56#ibcon#read 4, iclass 12, count 0 2006.232.07:40:08.56#ibcon#about to read 5, iclass 12, count 0 2006.232.07:40:08.56#ibcon#read 5, iclass 12, count 0 2006.232.07:40:08.56#ibcon#about to read 6, iclass 12, count 0 2006.232.07:40:08.56#ibcon#read 6, iclass 12, count 0 2006.232.07:40:08.56#ibcon#end of sib2, iclass 12, count 0 2006.232.07:40:08.56#ibcon#*mode == 0, iclass 12, count 0 2006.232.07:40:08.56#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.232.07:40:08.56#ibcon#[26=FRQ=03,672.99\r\n] 2006.232.07:40:08.56#ibcon#*before write, iclass 12, count 0 2006.232.07:40:08.56#ibcon#enter sib2, iclass 12, count 0 2006.232.07:40:08.56#ibcon#flushed, iclass 12, count 0 2006.232.07:40:08.56#ibcon#about to write, iclass 12, count 0 2006.232.07:40:08.56#ibcon#wrote, iclass 12, count 0 2006.232.07:40:08.56#ibcon#about to read 3, iclass 12, count 0 2006.232.07:40:08.61#ibcon#read 3, iclass 12, count 0 2006.232.07:40:08.61#ibcon#about to read 4, iclass 12, count 0 2006.232.07:40:08.61#ibcon#read 4, iclass 12, count 0 2006.232.07:40:08.61#ibcon#about to read 5, iclass 12, count 0 2006.232.07:40:08.61#ibcon#read 5, iclass 12, count 0 2006.232.07:40:08.61#ibcon#about to read 6, iclass 12, count 0 2006.232.07:40:08.61#ibcon#read 6, iclass 12, count 0 2006.232.07:40:08.61#ibcon#end of sib2, iclass 12, count 0 2006.232.07:40:08.61#ibcon#*after write, iclass 12, count 0 2006.232.07:40:08.61#ibcon#*before return 0, iclass 12, count 0 2006.232.07:40:08.61#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.232.07:40:08.61#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.232.07:40:08.61#ibcon#about to clear, iclass 12 cls_cnt 0 2006.232.07:40:08.61#ibcon#cleared, iclass 12 cls_cnt 0 2006.232.07:40:08.61$vc4f8/va=3,8 2006.232.07:40:08.61#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.232.07:40:08.61#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.232.07:40:08.61#ibcon#ireg 11 cls_cnt 2 2006.232.07:40:08.61#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.232.07:40:08.65#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.232.07:40:08.65#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.232.07:40:08.65#ibcon#enter wrdev, iclass 14, count 2 2006.232.07:40:08.65#ibcon#first serial, iclass 14, count 2 2006.232.07:40:08.65#ibcon#enter sib2, iclass 14, count 2 2006.232.07:40:08.65#ibcon#flushed, iclass 14, count 2 2006.232.07:40:08.65#ibcon#about to write, iclass 14, count 2 2006.232.07:40:08.65#ibcon#wrote, iclass 14, count 2 2006.232.07:40:08.65#ibcon#about to read 3, iclass 14, count 2 2006.232.07:40:08.67#ibcon#read 3, iclass 14, count 2 2006.232.07:40:08.67#ibcon#about to read 4, iclass 14, count 2 2006.232.07:40:08.67#ibcon#read 4, iclass 14, count 2 2006.232.07:40:08.67#ibcon#about to read 5, iclass 14, count 2 2006.232.07:40:08.67#ibcon#read 5, iclass 14, count 2 2006.232.07:40:08.67#ibcon#about to read 6, iclass 14, count 2 2006.232.07:40:08.67#ibcon#read 6, iclass 14, count 2 2006.232.07:40:08.67#ibcon#end of sib2, iclass 14, count 2 2006.232.07:40:08.67#ibcon#*mode == 0, iclass 14, count 2 2006.232.07:40:08.67#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.232.07:40:08.67#ibcon#[25=AT03-08\r\n] 2006.232.07:40:08.67#ibcon#*before write, iclass 14, count 2 2006.232.07:40:08.67#ibcon#enter sib2, iclass 14, count 2 2006.232.07:40:08.67#ibcon#flushed, iclass 14, count 2 2006.232.07:40:08.67#ibcon#about to write, iclass 14, count 2 2006.232.07:40:08.67#ibcon#wrote, iclass 14, count 2 2006.232.07:40:08.67#ibcon#about to read 3, iclass 14, count 2 2006.232.07:40:08.70#ibcon#read 3, iclass 14, count 2 2006.232.07:40:08.70#ibcon#about to read 4, iclass 14, count 2 2006.232.07:40:08.70#ibcon#read 4, iclass 14, count 2 2006.232.07:40:08.70#ibcon#about to read 5, iclass 14, count 2 2006.232.07:40:08.70#ibcon#read 5, iclass 14, count 2 2006.232.07:40:08.70#ibcon#about to read 6, iclass 14, count 2 2006.232.07:40:08.70#ibcon#read 6, iclass 14, count 2 2006.232.07:40:08.70#ibcon#end of sib2, iclass 14, count 2 2006.232.07:40:08.70#ibcon#*after write, iclass 14, count 2 2006.232.07:40:08.70#ibcon#*before return 0, iclass 14, count 2 2006.232.07:40:08.70#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.232.07:40:08.70#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.232.07:40:08.70#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.232.07:40:08.70#ibcon#ireg 7 cls_cnt 0 2006.232.07:40:08.70#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.232.07:40:08.82#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.232.07:40:08.82#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.232.07:40:08.82#ibcon#enter wrdev, iclass 14, count 0 2006.232.07:40:08.82#ibcon#first serial, iclass 14, count 0 2006.232.07:40:08.82#ibcon#enter sib2, iclass 14, count 0 2006.232.07:40:08.82#ibcon#flushed, iclass 14, count 0 2006.232.07:40:08.82#ibcon#about to write, iclass 14, count 0 2006.232.07:40:08.82#ibcon#wrote, iclass 14, count 0 2006.232.07:40:08.82#ibcon#about to read 3, iclass 14, count 0 2006.232.07:40:08.84#ibcon#read 3, iclass 14, count 0 2006.232.07:40:08.84#ibcon#about to read 4, iclass 14, count 0 2006.232.07:40:08.84#ibcon#read 4, iclass 14, count 0 2006.232.07:40:08.84#ibcon#about to read 5, iclass 14, count 0 2006.232.07:40:08.84#ibcon#read 5, iclass 14, count 0 2006.232.07:40:08.84#ibcon#about to read 6, iclass 14, count 0 2006.232.07:40:08.84#ibcon#read 6, iclass 14, count 0 2006.232.07:40:08.84#ibcon#end of sib2, iclass 14, count 0 2006.232.07:40:08.84#ibcon#*mode == 0, iclass 14, count 0 2006.232.07:40:08.84#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.232.07:40:08.84#ibcon#[25=USB\r\n] 2006.232.07:40:08.84#ibcon#*before write, iclass 14, count 0 2006.232.07:40:08.84#ibcon#enter sib2, iclass 14, count 0 2006.232.07:40:08.84#ibcon#flushed, iclass 14, count 0 2006.232.07:40:08.84#ibcon#about to write, iclass 14, count 0 2006.232.07:40:08.84#ibcon#wrote, iclass 14, count 0 2006.232.07:40:08.84#ibcon#about to read 3, iclass 14, count 0 2006.232.07:40:08.87#ibcon#read 3, iclass 14, count 0 2006.232.07:40:08.87#ibcon#about to read 4, iclass 14, count 0 2006.232.07:40:08.87#ibcon#read 4, iclass 14, count 0 2006.232.07:40:08.87#ibcon#about to read 5, iclass 14, count 0 2006.232.07:40:08.87#ibcon#read 5, iclass 14, count 0 2006.232.07:40:08.87#ibcon#about to read 6, iclass 14, count 0 2006.232.07:40:08.87#ibcon#read 6, iclass 14, count 0 2006.232.07:40:08.87#ibcon#end of sib2, iclass 14, count 0 2006.232.07:40:08.87#ibcon#*after write, iclass 14, count 0 2006.232.07:40:08.87#ibcon#*before return 0, iclass 14, count 0 2006.232.07:40:08.87#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.232.07:40:08.87#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.232.07:40:08.87#ibcon#about to clear, iclass 14 cls_cnt 0 2006.232.07:40:08.87#ibcon#cleared, iclass 14 cls_cnt 0 2006.232.07:40:08.87$vc4f8/valo=4,832.99 2006.232.07:40:08.87#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.232.07:40:08.87#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.232.07:40:08.87#ibcon#ireg 17 cls_cnt 0 2006.232.07:40:08.87#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:40:08.87#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:40:08.87#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:40:08.87#ibcon#enter wrdev, iclass 16, count 0 2006.232.07:40:08.87#ibcon#first serial, iclass 16, count 0 2006.232.07:40:08.87#ibcon#enter sib2, iclass 16, count 0 2006.232.07:40:08.87#ibcon#flushed, iclass 16, count 0 2006.232.07:40:08.87#ibcon#about to write, iclass 16, count 0 2006.232.07:40:08.87#ibcon#wrote, iclass 16, count 0 2006.232.07:40:08.87#ibcon#about to read 3, iclass 16, count 0 2006.232.07:40:08.89#ibcon#read 3, iclass 16, count 0 2006.232.07:40:08.89#ibcon#about to read 4, iclass 16, count 0 2006.232.07:40:08.89#ibcon#read 4, iclass 16, count 0 2006.232.07:40:08.89#ibcon#about to read 5, iclass 16, count 0 2006.232.07:40:08.89#ibcon#read 5, iclass 16, count 0 2006.232.07:40:08.89#ibcon#about to read 6, iclass 16, count 0 2006.232.07:40:08.89#ibcon#read 6, iclass 16, count 0 2006.232.07:40:08.89#ibcon#end of sib2, iclass 16, count 0 2006.232.07:40:08.89#ibcon#*mode == 0, iclass 16, count 0 2006.232.07:40:08.89#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.232.07:40:08.89#ibcon#[26=FRQ=04,832.99\r\n] 2006.232.07:40:08.89#ibcon#*before write, iclass 16, count 0 2006.232.07:40:08.89#ibcon#enter sib2, iclass 16, count 0 2006.232.07:40:08.89#ibcon#flushed, iclass 16, count 0 2006.232.07:40:08.89#ibcon#about to write, iclass 16, count 0 2006.232.07:40:08.89#ibcon#wrote, iclass 16, count 0 2006.232.07:40:08.89#ibcon#about to read 3, iclass 16, count 0 2006.232.07:40:08.93#ibcon#read 3, iclass 16, count 0 2006.232.07:40:08.93#ibcon#about to read 4, iclass 16, count 0 2006.232.07:40:08.93#ibcon#read 4, iclass 16, count 0 2006.232.07:40:08.93#ibcon#about to read 5, iclass 16, count 0 2006.232.07:40:08.93#ibcon#read 5, iclass 16, count 0 2006.232.07:40:08.93#ibcon#about to read 6, iclass 16, count 0 2006.232.07:40:08.93#ibcon#read 6, iclass 16, count 0 2006.232.07:40:08.93#ibcon#end of sib2, iclass 16, count 0 2006.232.07:40:08.93#ibcon#*after write, iclass 16, count 0 2006.232.07:40:08.93#ibcon#*before return 0, iclass 16, count 0 2006.232.07:40:08.93#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:40:08.93#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:40:08.93#ibcon#about to clear, iclass 16 cls_cnt 0 2006.232.07:40:08.93#ibcon#cleared, iclass 16 cls_cnt 0 2006.232.07:40:08.93$vc4f8/va=4,7 2006.232.07:40:08.93#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.232.07:40:08.93#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.232.07:40:08.93#ibcon#ireg 11 cls_cnt 2 2006.232.07:40:08.93#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:40:08.99#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:40:08.99#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:40:08.99#ibcon#enter wrdev, iclass 18, count 2 2006.232.07:40:08.99#ibcon#first serial, iclass 18, count 2 2006.232.07:40:08.99#ibcon#enter sib2, iclass 18, count 2 2006.232.07:40:08.99#ibcon#flushed, iclass 18, count 2 2006.232.07:40:08.99#ibcon#about to write, iclass 18, count 2 2006.232.07:40:08.99#ibcon#wrote, iclass 18, count 2 2006.232.07:40:08.99#ibcon#about to read 3, iclass 18, count 2 2006.232.07:40:09.01#ibcon#read 3, iclass 18, count 2 2006.232.07:40:09.01#ibcon#about to read 4, iclass 18, count 2 2006.232.07:40:09.01#ibcon#read 4, iclass 18, count 2 2006.232.07:40:09.01#ibcon#about to read 5, iclass 18, count 2 2006.232.07:40:09.01#ibcon#read 5, iclass 18, count 2 2006.232.07:40:09.01#ibcon#about to read 6, iclass 18, count 2 2006.232.07:40:09.01#ibcon#read 6, iclass 18, count 2 2006.232.07:40:09.01#ibcon#end of sib2, iclass 18, count 2 2006.232.07:40:09.01#ibcon#*mode == 0, iclass 18, count 2 2006.232.07:40:09.01#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.232.07:40:09.01#ibcon#[25=AT04-07\r\n] 2006.232.07:40:09.01#ibcon#*before write, iclass 18, count 2 2006.232.07:40:09.01#ibcon#enter sib2, iclass 18, count 2 2006.232.07:40:09.01#ibcon#flushed, iclass 18, count 2 2006.232.07:40:09.01#ibcon#about to write, iclass 18, count 2 2006.232.07:40:09.01#ibcon#wrote, iclass 18, count 2 2006.232.07:40:09.01#ibcon#about to read 3, iclass 18, count 2 2006.232.07:40:09.04#ibcon#read 3, iclass 18, count 2 2006.232.07:40:09.04#ibcon#about to read 4, iclass 18, count 2 2006.232.07:40:09.04#ibcon#read 4, iclass 18, count 2 2006.232.07:40:09.04#ibcon#about to read 5, iclass 18, count 2 2006.232.07:40:09.04#ibcon#read 5, iclass 18, count 2 2006.232.07:40:09.04#ibcon#about to read 6, iclass 18, count 2 2006.232.07:40:09.04#ibcon#read 6, iclass 18, count 2 2006.232.07:40:09.04#ibcon#end of sib2, iclass 18, count 2 2006.232.07:40:09.04#ibcon#*after write, iclass 18, count 2 2006.232.07:40:09.04#ibcon#*before return 0, iclass 18, count 2 2006.232.07:40:09.04#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:40:09.04#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:40:09.04#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.232.07:40:09.04#ibcon#ireg 7 cls_cnt 0 2006.232.07:40:09.04#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:40:09.16#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:40:09.16#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:40:09.16#ibcon#enter wrdev, iclass 18, count 0 2006.232.07:40:09.16#ibcon#first serial, iclass 18, count 0 2006.232.07:40:09.16#ibcon#enter sib2, iclass 18, count 0 2006.232.07:40:09.16#ibcon#flushed, iclass 18, count 0 2006.232.07:40:09.16#ibcon#about to write, iclass 18, count 0 2006.232.07:40:09.16#ibcon#wrote, iclass 18, count 0 2006.232.07:40:09.16#ibcon#about to read 3, iclass 18, count 0 2006.232.07:40:09.18#ibcon#read 3, iclass 18, count 0 2006.232.07:40:09.18#ibcon#about to read 4, iclass 18, count 0 2006.232.07:40:09.18#ibcon#read 4, iclass 18, count 0 2006.232.07:40:09.18#ibcon#about to read 5, iclass 18, count 0 2006.232.07:40:09.18#ibcon#read 5, iclass 18, count 0 2006.232.07:40:09.18#ibcon#about to read 6, iclass 18, count 0 2006.232.07:40:09.18#ibcon#read 6, iclass 18, count 0 2006.232.07:40:09.18#ibcon#end of sib2, iclass 18, count 0 2006.232.07:40:09.18#ibcon#*mode == 0, iclass 18, count 0 2006.232.07:40:09.18#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.232.07:40:09.18#ibcon#[25=USB\r\n] 2006.232.07:40:09.18#ibcon#*before write, iclass 18, count 0 2006.232.07:40:09.18#ibcon#enter sib2, iclass 18, count 0 2006.232.07:40:09.18#ibcon#flushed, iclass 18, count 0 2006.232.07:40:09.18#ibcon#about to write, iclass 18, count 0 2006.232.07:40:09.18#ibcon#wrote, iclass 18, count 0 2006.232.07:40:09.18#ibcon#about to read 3, iclass 18, count 0 2006.232.07:40:09.21#ibcon#read 3, iclass 18, count 0 2006.232.07:40:09.21#ibcon#about to read 4, iclass 18, count 0 2006.232.07:40:09.21#ibcon#read 4, iclass 18, count 0 2006.232.07:40:09.21#ibcon#about to read 5, iclass 18, count 0 2006.232.07:40:09.21#ibcon#read 5, iclass 18, count 0 2006.232.07:40:09.21#ibcon#about to read 6, iclass 18, count 0 2006.232.07:40:09.21#ibcon#read 6, iclass 18, count 0 2006.232.07:40:09.21#ibcon#end of sib2, iclass 18, count 0 2006.232.07:40:09.21#ibcon#*after write, iclass 18, count 0 2006.232.07:40:09.21#ibcon#*before return 0, iclass 18, count 0 2006.232.07:40:09.21#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:40:09.21#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:40:09.21#ibcon#about to clear, iclass 18 cls_cnt 0 2006.232.07:40:09.21#ibcon#cleared, iclass 18 cls_cnt 0 2006.232.07:40:09.21$vc4f8/valo=5,652.99 2006.232.07:40:09.21#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.232.07:40:09.21#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.232.07:40:09.21#ibcon#ireg 17 cls_cnt 0 2006.232.07:40:09.21#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:40:09.21#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:40:09.21#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:40:09.21#ibcon#enter wrdev, iclass 20, count 0 2006.232.07:40:09.21#ibcon#first serial, iclass 20, count 0 2006.232.07:40:09.21#ibcon#enter sib2, iclass 20, count 0 2006.232.07:40:09.21#ibcon#flushed, iclass 20, count 0 2006.232.07:40:09.21#ibcon#about to write, iclass 20, count 0 2006.232.07:40:09.21#ibcon#wrote, iclass 20, count 0 2006.232.07:40:09.21#ibcon#about to read 3, iclass 20, count 0 2006.232.07:40:09.23#ibcon#read 3, iclass 20, count 0 2006.232.07:40:09.23#ibcon#about to read 4, iclass 20, count 0 2006.232.07:40:09.23#ibcon#read 4, iclass 20, count 0 2006.232.07:40:09.23#ibcon#about to read 5, iclass 20, count 0 2006.232.07:40:09.23#ibcon#read 5, iclass 20, count 0 2006.232.07:40:09.23#ibcon#about to read 6, iclass 20, count 0 2006.232.07:40:09.23#ibcon#read 6, iclass 20, count 0 2006.232.07:40:09.23#ibcon#end of sib2, iclass 20, count 0 2006.232.07:40:09.23#ibcon#*mode == 0, iclass 20, count 0 2006.232.07:40:09.23#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.232.07:40:09.23#ibcon#[26=FRQ=05,652.99\r\n] 2006.232.07:40:09.23#ibcon#*before write, iclass 20, count 0 2006.232.07:40:09.23#ibcon#enter sib2, iclass 20, count 0 2006.232.07:40:09.23#ibcon#flushed, iclass 20, count 0 2006.232.07:40:09.23#ibcon#about to write, iclass 20, count 0 2006.232.07:40:09.23#ibcon#wrote, iclass 20, count 0 2006.232.07:40:09.23#ibcon#about to read 3, iclass 20, count 0 2006.232.07:40:09.27#ibcon#read 3, iclass 20, count 0 2006.232.07:40:09.27#ibcon#about to read 4, iclass 20, count 0 2006.232.07:40:09.27#ibcon#read 4, iclass 20, count 0 2006.232.07:40:09.27#ibcon#about to read 5, iclass 20, count 0 2006.232.07:40:09.27#ibcon#read 5, iclass 20, count 0 2006.232.07:40:09.27#ibcon#about to read 6, iclass 20, count 0 2006.232.07:40:09.27#ibcon#read 6, iclass 20, count 0 2006.232.07:40:09.27#ibcon#end of sib2, iclass 20, count 0 2006.232.07:40:09.27#ibcon#*after write, iclass 20, count 0 2006.232.07:40:09.27#ibcon#*before return 0, iclass 20, count 0 2006.232.07:40:09.27#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:40:09.27#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:40:09.27#ibcon#about to clear, iclass 20 cls_cnt 0 2006.232.07:40:09.27#ibcon#cleared, iclass 20 cls_cnt 0 2006.232.07:40:09.27$vc4f8/va=5,7 2006.232.07:40:09.27#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.232.07:40:09.27#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.232.07:40:09.27#ibcon#ireg 11 cls_cnt 2 2006.232.07:40:09.27#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:40:09.33#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:40:09.33#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:40:09.33#ibcon#enter wrdev, iclass 22, count 2 2006.232.07:40:09.33#ibcon#first serial, iclass 22, count 2 2006.232.07:40:09.33#ibcon#enter sib2, iclass 22, count 2 2006.232.07:40:09.33#ibcon#flushed, iclass 22, count 2 2006.232.07:40:09.33#ibcon#about to write, iclass 22, count 2 2006.232.07:40:09.33#ibcon#wrote, iclass 22, count 2 2006.232.07:40:09.33#ibcon#about to read 3, iclass 22, count 2 2006.232.07:40:09.35#ibcon#read 3, iclass 22, count 2 2006.232.07:40:09.35#ibcon#about to read 4, iclass 22, count 2 2006.232.07:40:09.35#ibcon#read 4, iclass 22, count 2 2006.232.07:40:09.35#ibcon#about to read 5, iclass 22, count 2 2006.232.07:40:09.35#ibcon#read 5, iclass 22, count 2 2006.232.07:40:09.35#ibcon#about to read 6, iclass 22, count 2 2006.232.07:40:09.35#ibcon#read 6, iclass 22, count 2 2006.232.07:40:09.35#ibcon#end of sib2, iclass 22, count 2 2006.232.07:40:09.35#ibcon#*mode == 0, iclass 22, count 2 2006.232.07:40:09.35#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.232.07:40:09.35#ibcon#[25=AT05-07\r\n] 2006.232.07:40:09.35#ibcon#*before write, iclass 22, count 2 2006.232.07:40:09.35#ibcon#enter sib2, iclass 22, count 2 2006.232.07:40:09.35#ibcon#flushed, iclass 22, count 2 2006.232.07:40:09.35#ibcon#about to write, iclass 22, count 2 2006.232.07:40:09.35#ibcon#wrote, iclass 22, count 2 2006.232.07:40:09.35#ibcon#about to read 3, iclass 22, count 2 2006.232.07:40:09.38#ibcon#read 3, iclass 22, count 2 2006.232.07:40:09.38#ibcon#about to read 4, iclass 22, count 2 2006.232.07:40:09.38#ibcon#read 4, iclass 22, count 2 2006.232.07:40:09.38#ibcon#about to read 5, iclass 22, count 2 2006.232.07:40:09.38#ibcon#read 5, iclass 22, count 2 2006.232.07:40:09.38#ibcon#about to read 6, iclass 22, count 2 2006.232.07:40:09.38#ibcon#read 6, iclass 22, count 2 2006.232.07:40:09.38#ibcon#end of sib2, iclass 22, count 2 2006.232.07:40:09.38#ibcon#*after write, iclass 22, count 2 2006.232.07:40:09.38#ibcon#*before return 0, iclass 22, count 2 2006.232.07:40:09.38#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:40:09.38#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:40:09.38#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.232.07:40:09.38#ibcon#ireg 7 cls_cnt 0 2006.232.07:40:09.38#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:40:09.50#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:40:09.50#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:40:09.50#ibcon#enter wrdev, iclass 22, count 0 2006.232.07:40:09.50#ibcon#first serial, iclass 22, count 0 2006.232.07:40:09.50#ibcon#enter sib2, iclass 22, count 0 2006.232.07:40:09.50#ibcon#flushed, iclass 22, count 0 2006.232.07:40:09.50#ibcon#about to write, iclass 22, count 0 2006.232.07:40:09.50#ibcon#wrote, iclass 22, count 0 2006.232.07:40:09.50#ibcon#about to read 3, iclass 22, count 0 2006.232.07:40:09.52#ibcon#read 3, iclass 22, count 0 2006.232.07:40:09.52#ibcon#about to read 4, iclass 22, count 0 2006.232.07:40:09.52#ibcon#read 4, iclass 22, count 0 2006.232.07:40:09.52#ibcon#about to read 5, iclass 22, count 0 2006.232.07:40:09.52#ibcon#read 5, iclass 22, count 0 2006.232.07:40:09.52#ibcon#about to read 6, iclass 22, count 0 2006.232.07:40:09.52#ibcon#read 6, iclass 22, count 0 2006.232.07:40:09.52#ibcon#end of sib2, iclass 22, count 0 2006.232.07:40:09.52#ibcon#*mode == 0, iclass 22, count 0 2006.232.07:40:09.52#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.232.07:40:09.52#ibcon#[25=USB\r\n] 2006.232.07:40:09.52#ibcon#*before write, iclass 22, count 0 2006.232.07:40:09.52#ibcon#enter sib2, iclass 22, count 0 2006.232.07:40:09.52#ibcon#flushed, iclass 22, count 0 2006.232.07:40:09.52#ibcon#about to write, iclass 22, count 0 2006.232.07:40:09.52#ibcon#wrote, iclass 22, count 0 2006.232.07:40:09.52#ibcon#about to read 3, iclass 22, count 0 2006.232.07:40:09.55#ibcon#read 3, iclass 22, count 0 2006.232.07:40:09.55#ibcon#about to read 4, iclass 22, count 0 2006.232.07:40:09.55#ibcon#read 4, iclass 22, count 0 2006.232.07:40:09.55#ibcon#about to read 5, iclass 22, count 0 2006.232.07:40:09.55#ibcon#read 5, iclass 22, count 0 2006.232.07:40:09.55#ibcon#about to read 6, iclass 22, count 0 2006.232.07:40:09.55#ibcon#read 6, iclass 22, count 0 2006.232.07:40:09.55#ibcon#end of sib2, iclass 22, count 0 2006.232.07:40:09.55#ibcon#*after write, iclass 22, count 0 2006.232.07:40:09.55#ibcon#*before return 0, iclass 22, count 0 2006.232.07:40:09.55#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:40:09.55#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:40:09.55#ibcon#about to clear, iclass 22 cls_cnt 0 2006.232.07:40:09.55#ibcon#cleared, iclass 22 cls_cnt 0 2006.232.07:40:09.55$vc4f8/valo=6,772.99 2006.232.07:40:09.55#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.232.07:40:09.55#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.232.07:40:09.55#ibcon#ireg 17 cls_cnt 0 2006.232.07:40:09.55#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:40:09.55#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:40:09.55#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:40:09.55#ibcon#enter wrdev, iclass 24, count 0 2006.232.07:40:09.55#ibcon#first serial, iclass 24, count 0 2006.232.07:40:09.55#ibcon#enter sib2, iclass 24, count 0 2006.232.07:40:09.55#ibcon#flushed, iclass 24, count 0 2006.232.07:40:09.55#ibcon#about to write, iclass 24, count 0 2006.232.07:40:09.55#ibcon#wrote, iclass 24, count 0 2006.232.07:40:09.55#ibcon#about to read 3, iclass 24, count 0 2006.232.07:40:09.57#ibcon#read 3, iclass 24, count 0 2006.232.07:40:09.57#ibcon#about to read 4, iclass 24, count 0 2006.232.07:40:09.57#ibcon#read 4, iclass 24, count 0 2006.232.07:40:09.57#ibcon#about to read 5, iclass 24, count 0 2006.232.07:40:09.57#ibcon#read 5, iclass 24, count 0 2006.232.07:40:09.57#ibcon#about to read 6, iclass 24, count 0 2006.232.07:40:09.57#ibcon#read 6, iclass 24, count 0 2006.232.07:40:09.57#ibcon#end of sib2, iclass 24, count 0 2006.232.07:40:09.57#ibcon#*mode == 0, iclass 24, count 0 2006.232.07:40:09.57#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.232.07:40:09.57#ibcon#[26=FRQ=06,772.99\r\n] 2006.232.07:40:09.57#ibcon#*before write, iclass 24, count 0 2006.232.07:40:09.57#ibcon#enter sib2, iclass 24, count 0 2006.232.07:40:09.57#ibcon#flushed, iclass 24, count 0 2006.232.07:40:09.57#ibcon#about to write, iclass 24, count 0 2006.232.07:40:09.57#ibcon#wrote, iclass 24, count 0 2006.232.07:40:09.57#ibcon#about to read 3, iclass 24, count 0 2006.232.07:40:09.62#ibcon#read 3, iclass 24, count 0 2006.232.07:40:09.62#ibcon#about to read 4, iclass 24, count 0 2006.232.07:40:09.62#ibcon#read 4, iclass 24, count 0 2006.232.07:40:09.62#ibcon#about to read 5, iclass 24, count 0 2006.232.07:40:09.62#ibcon#read 5, iclass 24, count 0 2006.232.07:40:09.62#ibcon#about to read 6, iclass 24, count 0 2006.232.07:40:09.62#ibcon#read 6, iclass 24, count 0 2006.232.07:40:09.62#ibcon#end of sib2, iclass 24, count 0 2006.232.07:40:09.62#ibcon#*after write, iclass 24, count 0 2006.232.07:40:09.62#ibcon#*before return 0, iclass 24, count 0 2006.232.07:40:09.62#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:40:09.62#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:40:09.62#ibcon#about to clear, iclass 24 cls_cnt 0 2006.232.07:40:09.62#ibcon#cleared, iclass 24 cls_cnt 0 2006.232.07:40:09.62$vc4f8/va=6,6 2006.232.07:40:09.62#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.232.07:40:09.62#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.232.07:40:09.62#ibcon#ireg 11 cls_cnt 2 2006.232.07:40:09.62#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:40:09.66#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:40:09.66#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:40:09.66#ibcon#enter wrdev, iclass 26, count 2 2006.232.07:40:09.66#ibcon#first serial, iclass 26, count 2 2006.232.07:40:09.66#ibcon#enter sib2, iclass 26, count 2 2006.232.07:40:09.66#ibcon#flushed, iclass 26, count 2 2006.232.07:40:09.66#ibcon#about to write, iclass 26, count 2 2006.232.07:40:09.66#ibcon#wrote, iclass 26, count 2 2006.232.07:40:09.66#ibcon#about to read 3, iclass 26, count 2 2006.232.07:40:09.68#ibcon#read 3, iclass 26, count 2 2006.232.07:40:09.68#ibcon#about to read 4, iclass 26, count 2 2006.232.07:40:09.68#ibcon#read 4, iclass 26, count 2 2006.232.07:40:09.68#ibcon#about to read 5, iclass 26, count 2 2006.232.07:40:09.68#ibcon#read 5, iclass 26, count 2 2006.232.07:40:09.68#ibcon#about to read 6, iclass 26, count 2 2006.232.07:40:09.68#ibcon#read 6, iclass 26, count 2 2006.232.07:40:09.68#ibcon#end of sib2, iclass 26, count 2 2006.232.07:40:09.68#ibcon#*mode == 0, iclass 26, count 2 2006.232.07:40:09.68#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.232.07:40:09.68#ibcon#[25=AT06-06\r\n] 2006.232.07:40:09.68#ibcon#*before write, iclass 26, count 2 2006.232.07:40:09.68#ibcon#enter sib2, iclass 26, count 2 2006.232.07:40:09.68#ibcon#flushed, iclass 26, count 2 2006.232.07:40:09.68#ibcon#about to write, iclass 26, count 2 2006.232.07:40:09.68#ibcon#wrote, iclass 26, count 2 2006.232.07:40:09.68#ibcon#about to read 3, iclass 26, count 2 2006.232.07:40:09.71#ibcon#read 3, iclass 26, count 2 2006.232.07:40:09.71#ibcon#about to read 4, iclass 26, count 2 2006.232.07:40:09.71#ibcon#read 4, iclass 26, count 2 2006.232.07:40:09.71#ibcon#about to read 5, iclass 26, count 2 2006.232.07:40:09.71#ibcon#read 5, iclass 26, count 2 2006.232.07:40:09.71#ibcon#about to read 6, iclass 26, count 2 2006.232.07:40:09.71#ibcon#read 6, iclass 26, count 2 2006.232.07:40:09.71#ibcon#end of sib2, iclass 26, count 2 2006.232.07:40:09.71#ibcon#*after write, iclass 26, count 2 2006.232.07:40:09.71#ibcon#*before return 0, iclass 26, count 2 2006.232.07:40:09.71#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:40:09.71#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:40:09.71#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.232.07:40:09.71#ibcon#ireg 7 cls_cnt 0 2006.232.07:40:09.71#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:40:09.83#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:40:09.83#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:40:09.83#ibcon#enter wrdev, iclass 26, count 0 2006.232.07:40:09.83#ibcon#first serial, iclass 26, count 0 2006.232.07:40:09.83#ibcon#enter sib2, iclass 26, count 0 2006.232.07:40:09.83#ibcon#flushed, iclass 26, count 0 2006.232.07:40:09.83#ibcon#about to write, iclass 26, count 0 2006.232.07:40:09.83#ibcon#wrote, iclass 26, count 0 2006.232.07:40:09.83#ibcon#about to read 3, iclass 26, count 0 2006.232.07:40:09.85#ibcon#read 3, iclass 26, count 0 2006.232.07:40:09.85#ibcon#about to read 4, iclass 26, count 0 2006.232.07:40:09.85#ibcon#read 4, iclass 26, count 0 2006.232.07:40:09.85#ibcon#about to read 5, iclass 26, count 0 2006.232.07:40:09.85#ibcon#read 5, iclass 26, count 0 2006.232.07:40:09.85#ibcon#about to read 6, iclass 26, count 0 2006.232.07:40:09.85#ibcon#read 6, iclass 26, count 0 2006.232.07:40:09.85#ibcon#end of sib2, iclass 26, count 0 2006.232.07:40:09.85#ibcon#*mode == 0, iclass 26, count 0 2006.232.07:40:09.85#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.232.07:40:09.85#ibcon#[25=USB\r\n] 2006.232.07:40:09.85#ibcon#*before write, iclass 26, count 0 2006.232.07:40:09.85#ibcon#enter sib2, iclass 26, count 0 2006.232.07:40:09.85#ibcon#flushed, iclass 26, count 0 2006.232.07:40:09.85#ibcon#about to write, iclass 26, count 0 2006.232.07:40:09.85#ibcon#wrote, iclass 26, count 0 2006.232.07:40:09.85#ibcon#about to read 3, iclass 26, count 0 2006.232.07:40:09.88#ibcon#read 3, iclass 26, count 0 2006.232.07:40:09.88#ibcon#about to read 4, iclass 26, count 0 2006.232.07:40:09.88#ibcon#read 4, iclass 26, count 0 2006.232.07:40:09.88#ibcon#about to read 5, iclass 26, count 0 2006.232.07:40:09.88#ibcon#read 5, iclass 26, count 0 2006.232.07:40:09.88#ibcon#about to read 6, iclass 26, count 0 2006.232.07:40:09.88#ibcon#read 6, iclass 26, count 0 2006.232.07:40:09.88#ibcon#end of sib2, iclass 26, count 0 2006.232.07:40:09.88#ibcon#*after write, iclass 26, count 0 2006.232.07:40:09.88#ibcon#*before return 0, iclass 26, count 0 2006.232.07:40:09.88#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:40:09.88#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:40:09.88#ibcon#about to clear, iclass 26 cls_cnt 0 2006.232.07:40:09.88#ibcon#cleared, iclass 26 cls_cnt 0 2006.232.07:40:09.88$vc4f8/valo=7,832.99 2006.232.07:40:09.88#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.232.07:40:09.88#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.232.07:40:09.88#ibcon#ireg 17 cls_cnt 0 2006.232.07:40:09.88#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:40:09.88#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:40:09.88#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:40:09.88#ibcon#enter wrdev, iclass 28, count 0 2006.232.07:40:09.88#ibcon#first serial, iclass 28, count 0 2006.232.07:40:09.88#ibcon#enter sib2, iclass 28, count 0 2006.232.07:40:09.88#ibcon#flushed, iclass 28, count 0 2006.232.07:40:09.88#ibcon#about to write, iclass 28, count 0 2006.232.07:40:09.88#ibcon#wrote, iclass 28, count 0 2006.232.07:40:09.88#ibcon#about to read 3, iclass 28, count 0 2006.232.07:40:09.90#ibcon#read 3, iclass 28, count 0 2006.232.07:40:09.90#ibcon#about to read 4, iclass 28, count 0 2006.232.07:40:09.90#ibcon#read 4, iclass 28, count 0 2006.232.07:40:09.90#ibcon#about to read 5, iclass 28, count 0 2006.232.07:40:09.90#ibcon#read 5, iclass 28, count 0 2006.232.07:40:09.90#ibcon#about to read 6, iclass 28, count 0 2006.232.07:40:09.90#ibcon#read 6, iclass 28, count 0 2006.232.07:40:09.90#ibcon#end of sib2, iclass 28, count 0 2006.232.07:40:09.90#ibcon#*mode == 0, iclass 28, count 0 2006.232.07:40:09.90#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.232.07:40:09.90#ibcon#[26=FRQ=07,832.99\r\n] 2006.232.07:40:09.90#ibcon#*before write, iclass 28, count 0 2006.232.07:40:09.90#ibcon#enter sib2, iclass 28, count 0 2006.232.07:40:09.90#ibcon#flushed, iclass 28, count 0 2006.232.07:40:09.90#ibcon#about to write, iclass 28, count 0 2006.232.07:40:09.90#ibcon#wrote, iclass 28, count 0 2006.232.07:40:09.90#ibcon#about to read 3, iclass 28, count 0 2006.232.07:40:09.94#ibcon#read 3, iclass 28, count 0 2006.232.07:40:09.94#ibcon#about to read 4, iclass 28, count 0 2006.232.07:40:09.94#ibcon#read 4, iclass 28, count 0 2006.232.07:40:09.94#ibcon#about to read 5, iclass 28, count 0 2006.232.07:40:09.94#ibcon#read 5, iclass 28, count 0 2006.232.07:40:09.94#ibcon#about to read 6, iclass 28, count 0 2006.232.07:40:09.94#ibcon#read 6, iclass 28, count 0 2006.232.07:40:09.94#ibcon#end of sib2, iclass 28, count 0 2006.232.07:40:09.94#ibcon#*after write, iclass 28, count 0 2006.232.07:40:09.94#ibcon#*before return 0, iclass 28, count 0 2006.232.07:40:09.94#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:40:09.94#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:40:09.94#ibcon#about to clear, iclass 28 cls_cnt 0 2006.232.07:40:09.94#ibcon#cleared, iclass 28 cls_cnt 0 2006.232.07:40:09.94$vc4f8/va=7,6 2006.232.07:40:09.94#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.232.07:40:09.94#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.232.07:40:09.94#ibcon#ireg 11 cls_cnt 2 2006.232.07:40:09.94#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:40:10.00#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:40:10.00#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:40:10.00#ibcon#enter wrdev, iclass 30, count 2 2006.232.07:40:10.00#ibcon#first serial, iclass 30, count 2 2006.232.07:40:10.00#ibcon#enter sib2, iclass 30, count 2 2006.232.07:40:10.00#ibcon#flushed, iclass 30, count 2 2006.232.07:40:10.00#ibcon#about to write, iclass 30, count 2 2006.232.07:40:10.00#ibcon#wrote, iclass 30, count 2 2006.232.07:40:10.00#ibcon#about to read 3, iclass 30, count 2 2006.232.07:40:10.02#ibcon#read 3, iclass 30, count 2 2006.232.07:40:10.02#ibcon#about to read 4, iclass 30, count 2 2006.232.07:40:10.02#ibcon#read 4, iclass 30, count 2 2006.232.07:40:10.02#ibcon#about to read 5, iclass 30, count 2 2006.232.07:40:10.02#ibcon#read 5, iclass 30, count 2 2006.232.07:40:10.02#ibcon#about to read 6, iclass 30, count 2 2006.232.07:40:10.02#ibcon#read 6, iclass 30, count 2 2006.232.07:40:10.02#ibcon#end of sib2, iclass 30, count 2 2006.232.07:40:10.02#ibcon#*mode == 0, iclass 30, count 2 2006.232.07:40:10.02#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.232.07:40:10.02#ibcon#[25=AT07-06\r\n] 2006.232.07:40:10.02#ibcon#*before write, iclass 30, count 2 2006.232.07:40:10.02#ibcon#enter sib2, iclass 30, count 2 2006.232.07:40:10.02#ibcon#flushed, iclass 30, count 2 2006.232.07:40:10.02#ibcon#about to write, iclass 30, count 2 2006.232.07:40:10.02#ibcon#wrote, iclass 30, count 2 2006.232.07:40:10.02#ibcon#about to read 3, iclass 30, count 2 2006.232.07:40:10.05#ibcon#read 3, iclass 30, count 2 2006.232.07:40:10.05#ibcon#about to read 4, iclass 30, count 2 2006.232.07:40:10.05#ibcon#read 4, iclass 30, count 2 2006.232.07:40:10.05#ibcon#about to read 5, iclass 30, count 2 2006.232.07:40:10.05#ibcon#read 5, iclass 30, count 2 2006.232.07:40:10.05#ibcon#about to read 6, iclass 30, count 2 2006.232.07:40:10.05#ibcon#read 6, iclass 30, count 2 2006.232.07:40:10.05#ibcon#end of sib2, iclass 30, count 2 2006.232.07:40:10.05#ibcon#*after write, iclass 30, count 2 2006.232.07:40:10.05#ibcon#*before return 0, iclass 30, count 2 2006.232.07:40:10.05#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:40:10.05#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:40:10.05#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.232.07:40:10.05#ibcon#ireg 7 cls_cnt 0 2006.232.07:40:10.05#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:40:10.17#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:40:10.17#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:40:10.17#ibcon#enter wrdev, iclass 30, count 0 2006.232.07:40:10.17#ibcon#first serial, iclass 30, count 0 2006.232.07:40:10.17#ibcon#enter sib2, iclass 30, count 0 2006.232.07:40:10.17#ibcon#flushed, iclass 30, count 0 2006.232.07:40:10.17#ibcon#about to write, iclass 30, count 0 2006.232.07:40:10.17#ibcon#wrote, iclass 30, count 0 2006.232.07:40:10.17#ibcon#about to read 3, iclass 30, count 0 2006.232.07:40:10.19#ibcon#read 3, iclass 30, count 0 2006.232.07:40:10.19#ibcon#about to read 4, iclass 30, count 0 2006.232.07:40:10.19#ibcon#read 4, iclass 30, count 0 2006.232.07:40:10.19#ibcon#about to read 5, iclass 30, count 0 2006.232.07:40:10.19#ibcon#read 5, iclass 30, count 0 2006.232.07:40:10.19#ibcon#about to read 6, iclass 30, count 0 2006.232.07:40:10.19#ibcon#read 6, iclass 30, count 0 2006.232.07:40:10.19#ibcon#end of sib2, iclass 30, count 0 2006.232.07:40:10.19#ibcon#*mode == 0, iclass 30, count 0 2006.232.07:40:10.19#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.232.07:40:10.19#ibcon#[25=USB\r\n] 2006.232.07:40:10.19#ibcon#*before write, iclass 30, count 0 2006.232.07:40:10.19#ibcon#enter sib2, iclass 30, count 0 2006.232.07:40:10.19#ibcon#flushed, iclass 30, count 0 2006.232.07:40:10.19#ibcon#about to write, iclass 30, count 0 2006.232.07:40:10.19#ibcon#wrote, iclass 30, count 0 2006.232.07:40:10.19#ibcon#about to read 3, iclass 30, count 0 2006.232.07:40:10.22#ibcon#read 3, iclass 30, count 0 2006.232.07:40:10.22#ibcon#about to read 4, iclass 30, count 0 2006.232.07:40:10.22#ibcon#read 4, iclass 30, count 0 2006.232.07:40:10.22#ibcon#about to read 5, iclass 30, count 0 2006.232.07:40:10.22#ibcon#read 5, iclass 30, count 0 2006.232.07:40:10.22#ibcon#about to read 6, iclass 30, count 0 2006.232.07:40:10.22#ibcon#read 6, iclass 30, count 0 2006.232.07:40:10.22#ibcon#end of sib2, iclass 30, count 0 2006.232.07:40:10.22#ibcon#*after write, iclass 30, count 0 2006.232.07:40:10.22#ibcon#*before return 0, iclass 30, count 0 2006.232.07:40:10.22#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:40:10.22#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:40:10.22#ibcon#about to clear, iclass 30 cls_cnt 0 2006.232.07:40:10.22#ibcon#cleared, iclass 30 cls_cnt 0 2006.232.07:40:10.22$vc4f8/valo=8,852.99 2006.232.07:40:10.22#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.232.07:40:10.22#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.232.07:40:10.22#ibcon#ireg 17 cls_cnt 0 2006.232.07:40:10.22#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:40:10.22#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:40:10.22#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:40:10.22#ibcon#enter wrdev, iclass 32, count 0 2006.232.07:40:10.22#ibcon#first serial, iclass 32, count 0 2006.232.07:40:10.22#ibcon#enter sib2, iclass 32, count 0 2006.232.07:40:10.22#ibcon#flushed, iclass 32, count 0 2006.232.07:40:10.22#ibcon#about to write, iclass 32, count 0 2006.232.07:40:10.22#ibcon#wrote, iclass 32, count 0 2006.232.07:40:10.22#ibcon#about to read 3, iclass 32, count 0 2006.232.07:40:10.24#ibcon#read 3, iclass 32, count 0 2006.232.07:40:10.24#ibcon#about to read 4, iclass 32, count 0 2006.232.07:40:10.24#ibcon#read 4, iclass 32, count 0 2006.232.07:40:10.24#ibcon#about to read 5, iclass 32, count 0 2006.232.07:40:10.24#ibcon#read 5, iclass 32, count 0 2006.232.07:40:10.24#ibcon#about to read 6, iclass 32, count 0 2006.232.07:40:10.24#ibcon#read 6, iclass 32, count 0 2006.232.07:40:10.24#ibcon#end of sib2, iclass 32, count 0 2006.232.07:40:10.24#ibcon#*mode == 0, iclass 32, count 0 2006.232.07:40:10.24#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.232.07:40:10.24#ibcon#[26=FRQ=08,852.99\r\n] 2006.232.07:40:10.24#ibcon#*before write, iclass 32, count 0 2006.232.07:40:10.24#ibcon#enter sib2, iclass 32, count 0 2006.232.07:40:10.24#ibcon#flushed, iclass 32, count 0 2006.232.07:40:10.24#ibcon#about to write, iclass 32, count 0 2006.232.07:40:10.24#ibcon#wrote, iclass 32, count 0 2006.232.07:40:10.24#ibcon#about to read 3, iclass 32, count 0 2006.232.07:40:10.28#ibcon#read 3, iclass 32, count 0 2006.232.07:40:10.28#ibcon#about to read 4, iclass 32, count 0 2006.232.07:40:10.28#ibcon#read 4, iclass 32, count 0 2006.232.07:40:10.28#ibcon#about to read 5, iclass 32, count 0 2006.232.07:40:10.28#ibcon#read 5, iclass 32, count 0 2006.232.07:40:10.28#ibcon#about to read 6, iclass 32, count 0 2006.232.07:40:10.28#ibcon#read 6, iclass 32, count 0 2006.232.07:40:10.28#ibcon#end of sib2, iclass 32, count 0 2006.232.07:40:10.28#ibcon#*after write, iclass 32, count 0 2006.232.07:40:10.28#ibcon#*before return 0, iclass 32, count 0 2006.232.07:40:10.28#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:40:10.28#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:40:10.28#ibcon#about to clear, iclass 32 cls_cnt 0 2006.232.07:40:10.28#ibcon#cleared, iclass 32 cls_cnt 0 2006.232.07:40:10.28$vc4f8/va=8,6 2006.232.07:40:10.28#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.232.07:40:10.28#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.232.07:40:10.28#ibcon#ireg 11 cls_cnt 2 2006.232.07:40:10.28#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:40:10.34#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:40:10.34#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:40:10.34#ibcon#enter wrdev, iclass 34, count 2 2006.232.07:40:10.34#ibcon#first serial, iclass 34, count 2 2006.232.07:40:10.34#ibcon#enter sib2, iclass 34, count 2 2006.232.07:40:10.34#ibcon#flushed, iclass 34, count 2 2006.232.07:40:10.34#ibcon#about to write, iclass 34, count 2 2006.232.07:40:10.34#ibcon#wrote, iclass 34, count 2 2006.232.07:40:10.34#ibcon#about to read 3, iclass 34, count 2 2006.232.07:40:10.37#ibcon#read 3, iclass 34, count 2 2006.232.07:40:10.37#ibcon#about to read 4, iclass 34, count 2 2006.232.07:40:10.37#ibcon#read 4, iclass 34, count 2 2006.232.07:40:10.37#ibcon#about to read 5, iclass 34, count 2 2006.232.07:40:10.37#ibcon#read 5, iclass 34, count 2 2006.232.07:40:10.37#ibcon#about to read 6, iclass 34, count 2 2006.232.07:40:10.37#ibcon#read 6, iclass 34, count 2 2006.232.07:40:10.37#ibcon#end of sib2, iclass 34, count 2 2006.232.07:40:10.37#ibcon#*mode == 0, iclass 34, count 2 2006.232.07:40:10.37#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.232.07:40:10.37#ibcon#[25=AT08-06\r\n] 2006.232.07:40:10.37#ibcon#*before write, iclass 34, count 2 2006.232.07:40:10.37#ibcon#enter sib2, iclass 34, count 2 2006.232.07:40:10.37#ibcon#flushed, iclass 34, count 2 2006.232.07:40:10.37#ibcon#about to write, iclass 34, count 2 2006.232.07:40:10.37#ibcon#wrote, iclass 34, count 2 2006.232.07:40:10.37#ibcon#about to read 3, iclass 34, count 2 2006.232.07:40:10.40#ibcon#read 3, iclass 34, count 2 2006.232.07:40:10.40#ibcon#about to read 4, iclass 34, count 2 2006.232.07:40:10.40#ibcon#read 4, iclass 34, count 2 2006.232.07:40:10.40#ibcon#about to read 5, iclass 34, count 2 2006.232.07:40:10.40#ibcon#read 5, iclass 34, count 2 2006.232.07:40:10.40#ibcon#about to read 6, iclass 34, count 2 2006.232.07:40:10.40#ibcon#read 6, iclass 34, count 2 2006.232.07:40:10.40#ibcon#end of sib2, iclass 34, count 2 2006.232.07:40:10.40#ibcon#*after write, iclass 34, count 2 2006.232.07:40:10.40#ibcon#*before return 0, iclass 34, count 2 2006.232.07:40:10.40#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:40:10.40#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:40:10.40#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.232.07:40:10.40#ibcon#ireg 7 cls_cnt 0 2006.232.07:40:10.40#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:40:10.52#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:40:10.52#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:40:10.52#ibcon#enter wrdev, iclass 34, count 0 2006.232.07:40:10.52#ibcon#first serial, iclass 34, count 0 2006.232.07:40:10.52#ibcon#enter sib2, iclass 34, count 0 2006.232.07:40:10.52#ibcon#flushed, iclass 34, count 0 2006.232.07:40:10.52#ibcon#about to write, iclass 34, count 0 2006.232.07:40:10.52#ibcon#wrote, iclass 34, count 0 2006.232.07:40:10.52#ibcon#about to read 3, iclass 34, count 0 2006.232.07:40:10.54#ibcon#read 3, iclass 34, count 0 2006.232.07:40:10.54#ibcon#about to read 4, iclass 34, count 0 2006.232.07:40:10.54#ibcon#read 4, iclass 34, count 0 2006.232.07:40:10.54#ibcon#about to read 5, iclass 34, count 0 2006.232.07:40:10.54#ibcon#read 5, iclass 34, count 0 2006.232.07:40:10.54#ibcon#about to read 6, iclass 34, count 0 2006.232.07:40:10.54#ibcon#read 6, iclass 34, count 0 2006.232.07:40:10.54#ibcon#end of sib2, iclass 34, count 0 2006.232.07:40:10.54#ibcon#*mode == 0, iclass 34, count 0 2006.232.07:40:10.54#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.232.07:40:10.54#ibcon#[25=USB\r\n] 2006.232.07:40:10.54#ibcon#*before write, iclass 34, count 0 2006.232.07:40:10.54#ibcon#enter sib2, iclass 34, count 0 2006.232.07:40:10.54#ibcon#flushed, iclass 34, count 0 2006.232.07:40:10.54#ibcon#about to write, iclass 34, count 0 2006.232.07:40:10.54#ibcon#wrote, iclass 34, count 0 2006.232.07:40:10.54#ibcon#about to read 3, iclass 34, count 0 2006.232.07:40:10.57#ibcon#read 3, iclass 34, count 0 2006.232.07:40:10.57#ibcon#about to read 4, iclass 34, count 0 2006.232.07:40:10.57#ibcon#read 4, iclass 34, count 0 2006.232.07:40:10.57#ibcon#about to read 5, iclass 34, count 0 2006.232.07:40:10.57#ibcon#read 5, iclass 34, count 0 2006.232.07:40:10.57#ibcon#about to read 6, iclass 34, count 0 2006.232.07:40:10.57#ibcon#read 6, iclass 34, count 0 2006.232.07:40:10.57#ibcon#end of sib2, iclass 34, count 0 2006.232.07:40:10.57#ibcon#*after write, iclass 34, count 0 2006.232.07:40:10.57#ibcon#*before return 0, iclass 34, count 0 2006.232.07:40:10.57#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:40:10.57#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:40:10.57#ibcon#about to clear, iclass 34 cls_cnt 0 2006.232.07:40:10.57#ibcon#cleared, iclass 34 cls_cnt 0 2006.232.07:40:10.57$vc4f8/vblo=1,632.99 2006.232.07:40:10.57#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.232.07:40:10.57#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.232.07:40:10.57#ibcon#ireg 17 cls_cnt 0 2006.232.07:40:10.57#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:40:10.57#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:40:10.57#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:40:10.57#ibcon#enter wrdev, iclass 36, count 0 2006.232.07:40:10.57#ibcon#first serial, iclass 36, count 0 2006.232.07:40:10.57#ibcon#enter sib2, iclass 36, count 0 2006.232.07:40:10.57#ibcon#flushed, iclass 36, count 0 2006.232.07:40:10.57#ibcon#about to write, iclass 36, count 0 2006.232.07:40:10.57#ibcon#wrote, iclass 36, count 0 2006.232.07:40:10.57#ibcon#about to read 3, iclass 36, count 0 2006.232.07:40:10.59#ibcon#read 3, iclass 36, count 0 2006.232.07:40:10.59#ibcon#about to read 4, iclass 36, count 0 2006.232.07:40:10.59#ibcon#read 4, iclass 36, count 0 2006.232.07:40:10.59#ibcon#about to read 5, iclass 36, count 0 2006.232.07:40:10.59#ibcon#read 5, iclass 36, count 0 2006.232.07:40:10.59#ibcon#about to read 6, iclass 36, count 0 2006.232.07:40:10.59#ibcon#read 6, iclass 36, count 0 2006.232.07:40:10.59#ibcon#end of sib2, iclass 36, count 0 2006.232.07:40:10.59#ibcon#*mode == 0, iclass 36, count 0 2006.232.07:40:10.59#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.232.07:40:10.59#ibcon#[28=FRQ=01,632.99\r\n] 2006.232.07:40:10.59#ibcon#*before write, iclass 36, count 0 2006.232.07:40:10.59#ibcon#enter sib2, iclass 36, count 0 2006.232.07:40:10.59#ibcon#flushed, iclass 36, count 0 2006.232.07:40:10.59#ibcon#about to write, iclass 36, count 0 2006.232.07:40:10.59#ibcon#wrote, iclass 36, count 0 2006.232.07:40:10.59#ibcon#about to read 3, iclass 36, count 0 2006.232.07:40:10.63#ibcon#read 3, iclass 36, count 0 2006.232.07:40:10.63#ibcon#about to read 4, iclass 36, count 0 2006.232.07:40:10.63#ibcon#read 4, iclass 36, count 0 2006.232.07:40:10.63#ibcon#about to read 5, iclass 36, count 0 2006.232.07:40:10.63#ibcon#read 5, iclass 36, count 0 2006.232.07:40:10.63#ibcon#about to read 6, iclass 36, count 0 2006.232.07:40:10.63#ibcon#read 6, iclass 36, count 0 2006.232.07:40:10.63#ibcon#end of sib2, iclass 36, count 0 2006.232.07:40:10.63#ibcon#*after write, iclass 36, count 0 2006.232.07:40:10.63#ibcon#*before return 0, iclass 36, count 0 2006.232.07:40:10.63#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:40:10.63#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:40:10.63#ibcon#about to clear, iclass 36 cls_cnt 0 2006.232.07:40:10.63#ibcon#cleared, iclass 36 cls_cnt 0 2006.232.07:40:10.63$vc4f8/vb=1,4 2006.232.07:40:10.63#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.232.07:40:10.63#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.232.07:40:10.63#ibcon#ireg 11 cls_cnt 2 2006.232.07:40:10.63#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.232.07:40:10.63#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.232.07:40:10.63#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.232.07:40:10.63#ibcon#enter wrdev, iclass 38, count 2 2006.232.07:40:10.63#ibcon#first serial, iclass 38, count 2 2006.232.07:40:10.63#ibcon#enter sib2, iclass 38, count 2 2006.232.07:40:10.63#ibcon#flushed, iclass 38, count 2 2006.232.07:40:10.63#ibcon#about to write, iclass 38, count 2 2006.232.07:40:10.63#ibcon#wrote, iclass 38, count 2 2006.232.07:40:10.63#ibcon#about to read 3, iclass 38, count 2 2006.232.07:40:10.65#ibcon#read 3, iclass 38, count 2 2006.232.07:40:10.65#ibcon#about to read 4, iclass 38, count 2 2006.232.07:40:10.65#ibcon#read 4, iclass 38, count 2 2006.232.07:40:10.65#ibcon#about to read 5, iclass 38, count 2 2006.232.07:40:10.65#ibcon#read 5, iclass 38, count 2 2006.232.07:40:10.65#ibcon#about to read 6, iclass 38, count 2 2006.232.07:40:10.65#ibcon#read 6, iclass 38, count 2 2006.232.07:40:10.65#ibcon#end of sib2, iclass 38, count 2 2006.232.07:40:10.65#ibcon#*mode == 0, iclass 38, count 2 2006.232.07:40:10.65#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.232.07:40:10.65#ibcon#[27=AT01-04\r\n] 2006.232.07:40:10.65#ibcon#*before write, iclass 38, count 2 2006.232.07:40:10.65#ibcon#enter sib2, iclass 38, count 2 2006.232.07:40:10.65#ibcon#flushed, iclass 38, count 2 2006.232.07:40:10.65#ibcon#about to write, iclass 38, count 2 2006.232.07:40:10.65#ibcon#wrote, iclass 38, count 2 2006.232.07:40:10.65#ibcon#about to read 3, iclass 38, count 2 2006.232.07:40:10.68#ibcon#read 3, iclass 38, count 2 2006.232.07:40:10.68#ibcon#about to read 4, iclass 38, count 2 2006.232.07:40:10.68#ibcon#read 4, iclass 38, count 2 2006.232.07:40:10.68#ibcon#about to read 5, iclass 38, count 2 2006.232.07:40:10.68#ibcon#read 5, iclass 38, count 2 2006.232.07:40:10.68#ibcon#about to read 6, iclass 38, count 2 2006.232.07:40:10.68#ibcon#read 6, iclass 38, count 2 2006.232.07:40:10.68#ibcon#end of sib2, iclass 38, count 2 2006.232.07:40:10.68#ibcon#*after write, iclass 38, count 2 2006.232.07:40:10.68#ibcon#*before return 0, iclass 38, count 2 2006.232.07:40:10.68#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.232.07:40:10.68#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.232.07:40:10.68#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.232.07:40:10.68#ibcon#ireg 7 cls_cnt 0 2006.232.07:40:10.68#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.232.07:40:10.80#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.232.07:40:10.80#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.232.07:40:10.80#ibcon#enter wrdev, iclass 38, count 0 2006.232.07:40:10.80#ibcon#first serial, iclass 38, count 0 2006.232.07:40:10.80#ibcon#enter sib2, iclass 38, count 0 2006.232.07:40:10.80#ibcon#flushed, iclass 38, count 0 2006.232.07:40:10.80#ibcon#about to write, iclass 38, count 0 2006.232.07:40:10.80#ibcon#wrote, iclass 38, count 0 2006.232.07:40:10.80#ibcon#about to read 3, iclass 38, count 0 2006.232.07:40:10.82#ibcon#read 3, iclass 38, count 0 2006.232.07:40:10.82#ibcon#about to read 4, iclass 38, count 0 2006.232.07:40:10.82#ibcon#read 4, iclass 38, count 0 2006.232.07:40:10.82#ibcon#about to read 5, iclass 38, count 0 2006.232.07:40:10.82#ibcon#read 5, iclass 38, count 0 2006.232.07:40:10.82#ibcon#about to read 6, iclass 38, count 0 2006.232.07:40:10.82#ibcon#read 6, iclass 38, count 0 2006.232.07:40:10.82#ibcon#end of sib2, iclass 38, count 0 2006.232.07:40:10.82#ibcon#*mode == 0, iclass 38, count 0 2006.232.07:40:10.82#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.232.07:40:10.82#ibcon#[27=USB\r\n] 2006.232.07:40:10.82#ibcon#*before write, iclass 38, count 0 2006.232.07:40:10.82#ibcon#enter sib2, iclass 38, count 0 2006.232.07:40:10.82#ibcon#flushed, iclass 38, count 0 2006.232.07:40:10.82#ibcon#about to write, iclass 38, count 0 2006.232.07:40:10.82#ibcon#wrote, iclass 38, count 0 2006.232.07:40:10.82#ibcon#about to read 3, iclass 38, count 0 2006.232.07:40:10.85#ibcon#read 3, iclass 38, count 0 2006.232.07:40:10.85#ibcon#about to read 4, iclass 38, count 0 2006.232.07:40:10.85#ibcon#read 4, iclass 38, count 0 2006.232.07:40:10.85#ibcon#about to read 5, iclass 38, count 0 2006.232.07:40:10.85#ibcon#read 5, iclass 38, count 0 2006.232.07:40:10.85#ibcon#about to read 6, iclass 38, count 0 2006.232.07:40:10.85#ibcon#read 6, iclass 38, count 0 2006.232.07:40:10.85#ibcon#end of sib2, iclass 38, count 0 2006.232.07:40:10.85#ibcon#*after write, iclass 38, count 0 2006.232.07:40:10.85#ibcon#*before return 0, iclass 38, count 0 2006.232.07:40:10.85#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.232.07:40:10.85#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.232.07:40:10.85#ibcon#about to clear, iclass 38 cls_cnt 0 2006.232.07:40:10.85#ibcon#cleared, iclass 38 cls_cnt 0 2006.232.07:40:10.85$vc4f8/vblo=2,640.99 2006.232.07:40:10.85#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.232.07:40:10.85#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.232.07:40:10.85#ibcon#ireg 17 cls_cnt 0 2006.232.07:40:10.85#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:40:10.85#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:40:10.85#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:40:10.85#ibcon#enter wrdev, iclass 40, count 0 2006.232.07:40:10.85#ibcon#first serial, iclass 40, count 0 2006.232.07:40:10.85#ibcon#enter sib2, iclass 40, count 0 2006.232.07:40:10.85#ibcon#flushed, iclass 40, count 0 2006.232.07:40:10.85#ibcon#about to write, iclass 40, count 0 2006.232.07:40:10.85#ibcon#wrote, iclass 40, count 0 2006.232.07:40:10.85#ibcon#about to read 3, iclass 40, count 0 2006.232.07:40:10.87#ibcon#read 3, iclass 40, count 0 2006.232.07:40:10.87#ibcon#about to read 4, iclass 40, count 0 2006.232.07:40:10.87#ibcon#read 4, iclass 40, count 0 2006.232.07:40:10.87#ibcon#about to read 5, iclass 40, count 0 2006.232.07:40:10.87#ibcon#read 5, iclass 40, count 0 2006.232.07:40:10.87#ibcon#about to read 6, iclass 40, count 0 2006.232.07:40:10.87#ibcon#read 6, iclass 40, count 0 2006.232.07:40:10.87#ibcon#end of sib2, iclass 40, count 0 2006.232.07:40:10.87#ibcon#*mode == 0, iclass 40, count 0 2006.232.07:40:10.87#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.232.07:40:10.87#ibcon#[28=FRQ=02,640.99\r\n] 2006.232.07:40:10.87#ibcon#*before write, iclass 40, count 0 2006.232.07:40:10.87#ibcon#enter sib2, iclass 40, count 0 2006.232.07:40:10.87#ibcon#flushed, iclass 40, count 0 2006.232.07:40:10.87#ibcon#about to write, iclass 40, count 0 2006.232.07:40:10.87#ibcon#wrote, iclass 40, count 0 2006.232.07:40:10.87#ibcon#about to read 3, iclass 40, count 0 2006.232.07:40:10.91#ibcon#read 3, iclass 40, count 0 2006.232.07:40:10.91#ibcon#about to read 4, iclass 40, count 0 2006.232.07:40:10.91#ibcon#read 4, iclass 40, count 0 2006.232.07:40:10.91#ibcon#about to read 5, iclass 40, count 0 2006.232.07:40:10.91#ibcon#read 5, iclass 40, count 0 2006.232.07:40:10.91#ibcon#about to read 6, iclass 40, count 0 2006.232.07:40:10.91#ibcon#read 6, iclass 40, count 0 2006.232.07:40:10.91#ibcon#end of sib2, iclass 40, count 0 2006.232.07:40:10.91#ibcon#*after write, iclass 40, count 0 2006.232.07:40:10.91#ibcon#*before return 0, iclass 40, count 0 2006.232.07:40:10.91#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:40:10.91#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:40:10.91#ibcon#about to clear, iclass 40 cls_cnt 0 2006.232.07:40:10.91#ibcon#cleared, iclass 40 cls_cnt 0 2006.232.07:40:10.91$vc4f8/vb=2,4 2006.232.07:40:10.91#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.232.07:40:10.91#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.232.07:40:10.91#ibcon#ireg 11 cls_cnt 2 2006.232.07:40:10.91#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:40:10.97#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:40:10.97#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:40:10.97#ibcon#enter wrdev, iclass 4, count 2 2006.232.07:40:10.97#ibcon#first serial, iclass 4, count 2 2006.232.07:40:10.97#ibcon#enter sib2, iclass 4, count 2 2006.232.07:40:10.97#ibcon#flushed, iclass 4, count 2 2006.232.07:40:10.97#ibcon#about to write, iclass 4, count 2 2006.232.07:40:10.97#ibcon#wrote, iclass 4, count 2 2006.232.07:40:10.97#ibcon#about to read 3, iclass 4, count 2 2006.232.07:40:10.99#ibcon#read 3, iclass 4, count 2 2006.232.07:40:10.99#ibcon#about to read 4, iclass 4, count 2 2006.232.07:40:10.99#ibcon#read 4, iclass 4, count 2 2006.232.07:40:10.99#ibcon#about to read 5, iclass 4, count 2 2006.232.07:40:10.99#ibcon#read 5, iclass 4, count 2 2006.232.07:40:10.99#ibcon#about to read 6, iclass 4, count 2 2006.232.07:40:10.99#ibcon#read 6, iclass 4, count 2 2006.232.07:40:10.99#ibcon#end of sib2, iclass 4, count 2 2006.232.07:40:10.99#ibcon#*mode == 0, iclass 4, count 2 2006.232.07:40:10.99#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.232.07:40:10.99#ibcon#[27=AT02-04\r\n] 2006.232.07:40:10.99#ibcon#*before write, iclass 4, count 2 2006.232.07:40:10.99#ibcon#enter sib2, iclass 4, count 2 2006.232.07:40:10.99#ibcon#flushed, iclass 4, count 2 2006.232.07:40:10.99#ibcon#about to write, iclass 4, count 2 2006.232.07:40:10.99#ibcon#wrote, iclass 4, count 2 2006.232.07:40:10.99#ibcon#about to read 3, iclass 4, count 2 2006.232.07:40:11.02#ibcon#read 3, iclass 4, count 2 2006.232.07:40:11.02#ibcon#about to read 4, iclass 4, count 2 2006.232.07:40:11.02#ibcon#read 4, iclass 4, count 2 2006.232.07:40:11.02#ibcon#about to read 5, iclass 4, count 2 2006.232.07:40:11.02#ibcon#read 5, iclass 4, count 2 2006.232.07:40:11.02#ibcon#about to read 6, iclass 4, count 2 2006.232.07:40:11.02#ibcon#read 6, iclass 4, count 2 2006.232.07:40:11.02#ibcon#end of sib2, iclass 4, count 2 2006.232.07:40:11.02#ibcon#*after write, iclass 4, count 2 2006.232.07:40:11.02#ibcon#*before return 0, iclass 4, count 2 2006.232.07:40:11.02#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:40:11.02#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:40:11.02#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.232.07:40:11.02#ibcon#ireg 7 cls_cnt 0 2006.232.07:40:11.02#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:40:11.14#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:40:11.14#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:40:11.14#ibcon#enter wrdev, iclass 4, count 0 2006.232.07:40:11.14#ibcon#first serial, iclass 4, count 0 2006.232.07:40:11.14#ibcon#enter sib2, iclass 4, count 0 2006.232.07:40:11.14#ibcon#flushed, iclass 4, count 0 2006.232.07:40:11.14#ibcon#about to write, iclass 4, count 0 2006.232.07:40:11.14#ibcon#wrote, iclass 4, count 0 2006.232.07:40:11.14#ibcon#about to read 3, iclass 4, count 0 2006.232.07:40:11.16#ibcon#read 3, iclass 4, count 0 2006.232.07:40:11.16#ibcon#about to read 4, iclass 4, count 0 2006.232.07:40:11.16#ibcon#read 4, iclass 4, count 0 2006.232.07:40:11.16#ibcon#about to read 5, iclass 4, count 0 2006.232.07:40:11.16#ibcon#read 5, iclass 4, count 0 2006.232.07:40:11.16#ibcon#about to read 6, iclass 4, count 0 2006.232.07:40:11.16#ibcon#read 6, iclass 4, count 0 2006.232.07:40:11.16#ibcon#end of sib2, iclass 4, count 0 2006.232.07:40:11.16#ibcon#*mode == 0, iclass 4, count 0 2006.232.07:40:11.16#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.232.07:40:11.16#ibcon#[27=USB\r\n] 2006.232.07:40:11.16#ibcon#*before write, iclass 4, count 0 2006.232.07:40:11.16#ibcon#enter sib2, iclass 4, count 0 2006.232.07:40:11.16#ibcon#flushed, iclass 4, count 0 2006.232.07:40:11.16#ibcon#about to write, iclass 4, count 0 2006.232.07:40:11.16#ibcon#wrote, iclass 4, count 0 2006.232.07:40:11.16#ibcon#about to read 3, iclass 4, count 0 2006.232.07:40:11.19#ibcon#read 3, iclass 4, count 0 2006.232.07:40:11.19#ibcon#about to read 4, iclass 4, count 0 2006.232.07:40:11.19#ibcon#read 4, iclass 4, count 0 2006.232.07:40:11.19#ibcon#about to read 5, iclass 4, count 0 2006.232.07:40:11.19#ibcon#read 5, iclass 4, count 0 2006.232.07:40:11.19#ibcon#about to read 6, iclass 4, count 0 2006.232.07:40:11.19#ibcon#read 6, iclass 4, count 0 2006.232.07:40:11.19#ibcon#end of sib2, iclass 4, count 0 2006.232.07:40:11.19#ibcon#*after write, iclass 4, count 0 2006.232.07:40:11.19#ibcon#*before return 0, iclass 4, count 0 2006.232.07:40:11.19#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:40:11.19#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:40:11.19#ibcon#about to clear, iclass 4 cls_cnt 0 2006.232.07:40:11.19#ibcon#cleared, iclass 4 cls_cnt 0 2006.232.07:40:11.19$vc4f8/vblo=3,656.99 2006.232.07:40:11.19#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.232.07:40:11.19#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.232.07:40:11.19#ibcon#ireg 17 cls_cnt 0 2006.232.07:40:11.19#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:40:11.19#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:40:11.19#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:40:11.19#ibcon#enter wrdev, iclass 6, count 0 2006.232.07:40:11.19#ibcon#first serial, iclass 6, count 0 2006.232.07:40:11.19#ibcon#enter sib2, iclass 6, count 0 2006.232.07:40:11.19#ibcon#flushed, iclass 6, count 0 2006.232.07:40:11.19#ibcon#about to write, iclass 6, count 0 2006.232.07:40:11.19#ibcon#wrote, iclass 6, count 0 2006.232.07:40:11.19#ibcon#about to read 3, iclass 6, count 0 2006.232.07:40:11.22#ibcon#read 3, iclass 6, count 0 2006.232.07:40:11.22#ibcon#about to read 4, iclass 6, count 0 2006.232.07:40:11.22#ibcon#read 4, iclass 6, count 0 2006.232.07:40:11.22#ibcon#about to read 5, iclass 6, count 0 2006.232.07:40:11.22#ibcon#read 5, iclass 6, count 0 2006.232.07:40:11.22#ibcon#about to read 6, iclass 6, count 0 2006.232.07:40:11.22#ibcon#read 6, iclass 6, count 0 2006.232.07:40:11.22#ibcon#end of sib2, iclass 6, count 0 2006.232.07:40:11.22#ibcon#*mode == 0, iclass 6, count 0 2006.232.07:40:11.22#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.232.07:40:11.22#ibcon#[28=FRQ=03,656.99\r\n] 2006.232.07:40:11.22#ibcon#*before write, iclass 6, count 0 2006.232.07:40:11.22#ibcon#enter sib2, iclass 6, count 0 2006.232.07:40:11.22#ibcon#flushed, iclass 6, count 0 2006.232.07:40:11.22#ibcon#about to write, iclass 6, count 0 2006.232.07:40:11.22#ibcon#wrote, iclass 6, count 0 2006.232.07:40:11.22#ibcon#about to read 3, iclass 6, count 0 2006.232.07:40:11.26#ibcon#read 3, iclass 6, count 0 2006.232.07:40:11.26#ibcon#about to read 4, iclass 6, count 0 2006.232.07:40:11.26#ibcon#read 4, iclass 6, count 0 2006.232.07:40:11.26#ibcon#about to read 5, iclass 6, count 0 2006.232.07:40:11.26#ibcon#read 5, iclass 6, count 0 2006.232.07:40:11.26#ibcon#about to read 6, iclass 6, count 0 2006.232.07:40:11.26#ibcon#read 6, iclass 6, count 0 2006.232.07:40:11.26#ibcon#end of sib2, iclass 6, count 0 2006.232.07:40:11.26#ibcon#*after write, iclass 6, count 0 2006.232.07:40:11.26#ibcon#*before return 0, iclass 6, count 0 2006.232.07:40:11.26#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:40:11.26#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:40:11.26#ibcon#about to clear, iclass 6 cls_cnt 0 2006.232.07:40:11.26#ibcon#cleared, iclass 6 cls_cnt 0 2006.232.07:40:11.26$vc4f8/vb=3,4 2006.232.07:40:11.26#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.232.07:40:11.26#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.232.07:40:11.26#ibcon#ireg 11 cls_cnt 2 2006.232.07:40:11.26#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.232.07:40:11.31#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.232.07:40:11.31#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.232.07:40:11.31#ibcon#enter wrdev, iclass 10, count 2 2006.232.07:40:11.31#ibcon#first serial, iclass 10, count 2 2006.232.07:40:11.31#ibcon#enter sib2, iclass 10, count 2 2006.232.07:40:11.32#ibcon#flushed, iclass 10, count 2 2006.232.07:40:11.32#ibcon#about to write, iclass 10, count 2 2006.232.07:40:11.32#ibcon#wrote, iclass 10, count 2 2006.232.07:40:11.32#ibcon#about to read 3, iclass 10, count 2 2006.232.07:40:11.33#ibcon#read 3, iclass 10, count 2 2006.232.07:40:11.33#ibcon#about to read 4, iclass 10, count 2 2006.232.07:40:11.33#ibcon#read 4, iclass 10, count 2 2006.232.07:40:11.33#ibcon#about to read 5, iclass 10, count 2 2006.232.07:40:11.33#ibcon#read 5, iclass 10, count 2 2006.232.07:40:11.33#ibcon#about to read 6, iclass 10, count 2 2006.232.07:40:11.33#ibcon#read 6, iclass 10, count 2 2006.232.07:40:11.33#ibcon#end of sib2, iclass 10, count 2 2006.232.07:40:11.33#ibcon#*mode == 0, iclass 10, count 2 2006.232.07:40:11.33#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.232.07:40:11.33#ibcon#[27=AT03-04\r\n] 2006.232.07:40:11.33#ibcon#*before write, iclass 10, count 2 2006.232.07:40:11.33#ibcon#enter sib2, iclass 10, count 2 2006.232.07:40:11.33#ibcon#flushed, iclass 10, count 2 2006.232.07:40:11.33#ibcon#about to write, iclass 10, count 2 2006.232.07:40:11.33#ibcon#wrote, iclass 10, count 2 2006.232.07:40:11.33#ibcon#about to read 3, iclass 10, count 2 2006.232.07:40:11.36#ibcon#read 3, iclass 10, count 2 2006.232.07:40:11.36#ibcon#about to read 4, iclass 10, count 2 2006.232.07:40:11.36#ibcon#read 4, iclass 10, count 2 2006.232.07:40:11.36#ibcon#about to read 5, iclass 10, count 2 2006.232.07:40:11.36#ibcon#read 5, iclass 10, count 2 2006.232.07:40:11.36#ibcon#about to read 6, iclass 10, count 2 2006.232.07:40:11.36#ibcon#read 6, iclass 10, count 2 2006.232.07:40:11.36#ibcon#end of sib2, iclass 10, count 2 2006.232.07:40:11.36#ibcon#*after write, iclass 10, count 2 2006.232.07:40:11.36#ibcon#*before return 0, iclass 10, count 2 2006.232.07:40:11.36#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.232.07:40:11.36#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.232.07:40:11.36#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.232.07:40:11.36#ibcon#ireg 7 cls_cnt 0 2006.232.07:40:11.36#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.232.07:40:11.48#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.232.07:40:11.48#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.232.07:40:11.48#ibcon#enter wrdev, iclass 10, count 0 2006.232.07:40:11.48#ibcon#first serial, iclass 10, count 0 2006.232.07:40:11.48#ibcon#enter sib2, iclass 10, count 0 2006.232.07:40:11.48#ibcon#flushed, iclass 10, count 0 2006.232.07:40:11.48#ibcon#about to write, iclass 10, count 0 2006.232.07:40:11.48#ibcon#wrote, iclass 10, count 0 2006.232.07:40:11.48#ibcon#about to read 3, iclass 10, count 0 2006.232.07:40:11.50#ibcon#read 3, iclass 10, count 0 2006.232.07:40:11.50#ibcon#about to read 4, iclass 10, count 0 2006.232.07:40:11.50#ibcon#read 4, iclass 10, count 0 2006.232.07:40:11.50#ibcon#about to read 5, iclass 10, count 0 2006.232.07:40:11.50#ibcon#read 5, iclass 10, count 0 2006.232.07:40:11.50#ibcon#about to read 6, iclass 10, count 0 2006.232.07:40:11.50#ibcon#read 6, iclass 10, count 0 2006.232.07:40:11.50#ibcon#end of sib2, iclass 10, count 0 2006.232.07:40:11.50#ibcon#*mode == 0, iclass 10, count 0 2006.232.07:40:11.50#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.232.07:40:11.50#ibcon#[27=USB\r\n] 2006.232.07:40:11.50#ibcon#*before write, iclass 10, count 0 2006.232.07:40:11.50#ibcon#enter sib2, iclass 10, count 0 2006.232.07:40:11.50#ibcon#flushed, iclass 10, count 0 2006.232.07:40:11.50#ibcon#about to write, iclass 10, count 0 2006.232.07:40:11.50#ibcon#wrote, iclass 10, count 0 2006.232.07:40:11.50#ibcon#about to read 3, iclass 10, count 0 2006.232.07:40:11.53#ibcon#read 3, iclass 10, count 0 2006.232.07:40:11.53#ibcon#about to read 4, iclass 10, count 0 2006.232.07:40:11.53#ibcon#read 4, iclass 10, count 0 2006.232.07:40:11.53#ibcon#about to read 5, iclass 10, count 0 2006.232.07:40:11.53#ibcon#read 5, iclass 10, count 0 2006.232.07:40:11.53#ibcon#about to read 6, iclass 10, count 0 2006.232.07:40:11.53#ibcon#read 6, iclass 10, count 0 2006.232.07:40:11.53#ibcon#end of sib2, iclass 10, count 0 2006.232.07:40:11.53#ibcon#*after write, iclass 10, count 0 2006.232.07:40:11.53#ibcon#*before return 0, iclass 10, count 0 2006.232.07:40:11.53#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.232.07:40:11.53#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.232.07:40:11.53#ibcon#about to clear, iclass 10 cls_cnt 0 2006.232.07:40:11.53#ibcon#cleared, iclass 10 cls_cnt 0 2006.232.07:40:11.53$vc4f8/vblo=4,712.99 2006.232.07:40:11.53#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.232.07:40:11.53#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.232.07:40:11.53#ibcon#ireg 17 cls_cnt 0 2006.232.07:40:11.53#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.232.07:40:11.53#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.232.07:40:11.53#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.232.07:40:11.53#ibcon#enter wrdev, iclass 12, count 0 2006.232.07:40:11.53#ibcon#first serial, iclass 12, count 0 2006.232.07:40:11.53#ibcon#enter sib2, iclass 12, count 0 2006.232.07:40:11.53#ibcon#flushed, iclass 12, count 0 2006.232.07:40:11.53#ibcon#about to write, iclass 12, count 0 2006.232.07:40:11.53#ibcon#wrote, iclass 12, count 0 2006.232.07:40:11.53#ibcon#about to read 3, iclass 12, count 0 2006.232.07:40:11.55#ibcon#read 3, iclass 12, count 0 2006.232.07:40:11.55#ibcon#about to read 4, iclass 12, count 0 2006.232.07:40:11.55#ibcon#read 4, iclass 12, count 0 2006.232.07:40:11.55#ibcon#about to read 5, iclass 12, count 0 2006.232.07:40:11.55#ibcon#read 5, iclass 12, count 0 2006.232.07:40:11.55#ibcon#about to read 6, iclass 12, count 0 2006.232.07:40:11.55#ibcon#read 6, iclass 12, count 0 2006.232.07:40:11.55#ibcon#end of sib2, iclass 12, count 0 2006.232.07:40:11.55#ibcon#*mode == 0, iclass 12, count 0 2006.232.07:40:11.55#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.232.07:40:11.55#ibcon#[28=FRQ=04,712.99\r\n] 2006.232.07:40:11.55#ibcon#*before write, iclass 12, count 0 2006.232.07:40:11.55#ibcon#enter sib2, iclass 12, count 0 2006.232.07:40:11.55#ibcon#flushed, iclass 12, count 0 2006.232.07:40:11.55#ibcon#about to write, iclass 12, count 0 2006.232.07:40:11.55#ibcon#wrote, iclass 12, count 0 2006.232.07:40:11.55#ibcon#about to read 3, iclass 12, count 0 2006.232.07:40:11.59#ibcon#read 3, iclass 12, count 0 2006.232.07:40:11.59#ibcon#about to read 4, iclass 12, count 0 2006.232.07:40:11.59#ibcon#read 4, iclass 12, count 0 2006.232.07:40:11.59#ibcon#about to read 5, iclass 12, count 0 2006.232.07:40:11.59#ibcon#read 5, iclass 12, count 0 2006.232.07:40:11.59#ibcon#about to read 6, iclass 12, count 0 2006.232.07:40:11.59#ibcon#read 6, iclass 12, count 0 2006.232.07:40:11.59#ibcon#end of sib2, iclass 12, count 0 2006.232.07:40:11.59#ibcon#*after write, iclass 12, count 0 2006.232.07:40:11.59#ibcon#*before return 0, iclass 12, count 0 2006.232.07:40:11.59#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.232.07:40:11.59#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.232.07:40:11.59#ibcon#about to clear, iclass 12 cls_cnt 0 2006.232.07:40:11.59#ibcon#cleared, iclass 12 cls_cnt 0 2006.232.07:40:11.59$vc4f8/vb=4,4 2006.232.07:40:11.59#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.232.07:40:11.59#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.232.07:40:11.59#ibcon#ireg 11 cls_cnt 2 2006.232.07:40:11.59#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.232.07:40:11.65#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.232.07:40:11.65#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.232.07:40:11.65#ibcon#enter wrdev, iclass 14, count 2 2006.232.07:40:11.65#ibcon#first serial, iclass 14, count 2 2006.232.07:40:11.65#ibcon#enter sib2, iclass 14, count 2 2006.232.07:40:11.65#ibcon#flushed, iclass 14, count 2 2006.232.07:40:11.65#ibcon#about to write, iclass 14, count 2 2006.232.07:40:11.65#ibcon#wrote, iclass 14, count 2 2006.232.07:40:11.65#ibcon#about to read 3, iclass 14, count 2 2006.232.07:40:11.67#ibcon#read 3, iclass 14, count 2 2006.232.07:40:11.67#ibcon#about to read 4, iclass 14, count 2 2006.232.07:40:11.67#ibcon#read 4, iclass 14, count 2 2006.232.07:40:11.67#ibcon#about to read 5, iclass 14, count 2 2006.232.07:40:11.67#ibcon#read 5, iclass 14, count 2 2006.232.07:40:11.67#ibcon#about to read 6, iclass 14, count 2 2006.232.07:40:11.67#ibcon#read 6, iclass 14, count 2 2006.232.07:40:11.67#ibcon#end of sib2, iclass 14, count 2 2006.232.07:40:11.67#ibcon#*mode == 0, iclass 14, count 2 2006.232.07:40:11.67#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.232.07:40:11.67#ibcon#[27=AT04-04\r\n] 2006.232.07:40:11.67#ibcon#*before write, iclass 14, count 2 2006.232.07:40:11.67#ibcon#enter sib2, iclass 14, count 2 2006.232.07:40:11.67#ibcon#flushed, iclass 14, count 2 2006.232.07:40:11.67#ibcon#about to write, iclass 14, count 2 2006.232.07:40:11.67#ibcon#wrote, iclass 14, count 2 2006.232.07:40:11.67#ibcon#about to read 3, iclass 14, count 2 2006.232.07:40:11.70#ibcon#read 3, iclass 14, count 2 2006.232.07:40:11.70#ibcon#about to read 4, iclass 14, count 2 2006.232.07:40:11.70#ibcon#read 4, iclass 14, count 2 2006.232.07:40:11.70#ibcon#about to read 5, iclass 14, count 2 2006.232.07:40:11.70#ibcon#read 5, iclass 14, count 2 2006.232.07:40:11.70#ibcon#about to read 6, iclass 14, count 2 2006.232.07:40:11.70#ibcon#read 6, iclass 14, count 2 2006.232.07:40:11.70#ibcon#end of sib2, iclass 14, count 2 2006.232.07:40:11.70#ibcon#*after write, iclass 14, count 2 2006.232.07:40:11.70#ibcon#*before return 0, iclass 14, count 2 2006.232.07:40:11.70#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.232.07:40:11.70#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.232.07:40:11.70#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.232.07:40:11.70#ibcon#ireg 7 cls_cnt 0 2006.232.07:40:11.70#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.232.07:40:11.82#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.232.07:40:11.82#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.232.07:40:11.82#ibcon#enter wrdev, iclass 14, count 0 2006.232.07:40:11.82#ibcon#first serial, iclass 14, count 0 2006.232.07:40:11.82#ibcon#enter sib2, iclass 14, count 0 2006.232.07:40:11.82#ibcon#flushed, iclass 14, count 0 2006.232.07:40:11.82#ibcon#about to write, iclass 14, count 0 2006.232.07:40:11.82#ibcon#wrote, iclass 14, count 0 2006.232.07:40:11.82#ibcon#about to read 3, iclass 14, count 0 2006.232.07:40:11.84#ibcon#read 3, iclass 14, count 0 2006.232.07:40:11.84#ibcon#about to read 4, iclass 14, count 0 2006.232.07:40:11.84#ibcon#read 4, iclass 14, count 0 2006.232.07:40:11.84#ibcon#about to read 5, iclass 14, count 0 2006.232.07:40:11.84#ibcon#read 5, iclass 14, count 0 2006.232.07:40:11.84#ibcon#about to read 6, iclass 14, count 0 2006.232.07:40:11.84#ibcon#read 6, iclass 14, count 0 2006.232.07:40:11.84#ibcon#end of sib2, iclass 14, count 0 2006.232.07:40:11.84#ibcon#*mode == 0, iclass 14, count 0 2006.232.07:40:11.84#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.232.07:40:11.84#ibcon#[27=USB\r\n] 2006.232.07:40:11.84#ibcon#*before write, iclass 14, count 0 2006.232.07:40:11.84#ibcon#enter sib2, iclass 14, count 0 2006.232.07:40:11.84#ibcon#flushed, iclass 14, count 0 2006.232.07:40:11.84#ibcon#about to write, iclass 14, count 0 2006.232.07:40:11.84#ibcon#wrote, iclass 14, count 0 2006.232.07:40:11.84#ibcon#about to read 3, iclass 14, count 0 2006.232.07:40:11.87#ibcon#read 3, iclass 14, count 0 2006.232.07:40:11.87#ibcon#about to read 4, iclass 14, count 0 2006.232.07:40:11.87#ibcon#read 4, iclass 14, count 0 2006.232.07:40:11.87#ibcon#about to read 5, iclass 14, count 0 2006.232.07:40:11.87#ibcon#read 5, iclass 14, count 0 2006.232.07:40:11.87#ibcon#about to read 6, iclass 14, count 0 2006.232.07:40:11.87#ibcon#read 6, iclass 14, count 0 2006.232.07:40:11.87#ibcon#end of sib2, iclass 14, count 0 2006.232.07:40:11.87#ibcon#*after write, iclass 14, count 0 2006.232.07:40:11.87#ibcon#*before return 0, iclass 14, count 0 2006.232.07:40:11.87#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.232.07:40:11.87#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.232.07:40:11.87#ibcon#about to clear, iclass 14 cls_cnt 0 2006.232.07:40:11.87#ibcon#cleared, iclass 14 cls_cnt 0 2006.232.07:40:11.87$vc4f8/vblo=5,744.99 2006.232.07:40:11.87#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.232.07:40:11.87#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.232.07:40:11.87#ibcon#ireg 17 cls_cnt 0 2006.232.07:40:11.87#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:40:11.87#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:40:11.87#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:40:11.87#ibcon#enter wrdev, iclass 16, count 0 2006.232.07:40:11.87#ibcon#first serial, iclass 16, count 0 2006.232.07:40:11.87#ibcon#enter sib2, iclass 16, count 0 2006.232.07:40:11.87#ibcon#flushed, iclass 16, count 0 2006.232.07:40:11.87#ibcon#about to write, iclass 16, count 0 2006.232.07:40:11.87#ibcon#wrote, iclass 16, count 0 2006.232.07:40:11.87#ibcon#about to read 3, iclass 16, count 0 2006.232.07:40:11.89#ibcon#read 3, iclass 16, count 0 2006.232.07:40:11.89#ibcon#about to read 4, iclass 16, count 0 2006.232.07:40:11.89#ibcon#read 4, iclass 16, count 0 2006.232.07:40:11.89#ibcon#about to read 5, iclass 16, count 0 2006.232.07:40:11.89#ibcon#read 5, iclass 16, count 0 2006.232.07:40:11.89#ibcon#about to read 6, iclass 16, count 0 2006.232.07:40:11.89#ibcon#read 6, iclass 16, count 0 2006.232.07:40:11.89#ibcon#end of sib2, iclass 16, count 0 2006.232.07:40:11.89#ibcon#*mode == 0, iclass 16, count 0 2006.232.07:40:11.89#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.232.07:40:11.89#ibcon#[28=FRQ=05,744.99\r\n] 2006.232.07:40:11.89#ibcon#*before write, iclass 16, count 0 2006.232.07:40:11.89#ibcon#enter sib2, iclass 16, count 0 2006.232.07:40:11.89#ibcon#flushed, iclass 16, count 0 2006.232.07:40:11.89#ibcon#about to write, iclass 16, count 0 2006.232.07:40:11.89#ibcon#wrote, iclass 16, count 0 2006.232.07:40:11.89#ibcon#about to read 3, iclass 16, count 0 2006.232.07:40:11.93#ibcon#read 3, iclass 16, count 0 2006.232.07:40:11.93#ibcon#about to read 4, iclass 16, count 0 2006.232.07:40:11.93#ibcon#read 4, iclass 16, count 0 2006.232.07:40:11.93#ibcon#about to read 5, iclass 16, count 0 2006.232.07:40:11.93#ibcon#read 5, iclass 16, count 0 2006.232.07:40:11.93#ibcon#about to read 6, iclass 16, count 0 2006.232.07:40:11.93#ibcon#read 6, iclass 16, count 0 2006.232.07:40:11.93#ibcon#end of sib2, iclass 16, count 0 2006.232.07:40:11.93#ibcon#*after write, iclass 16, count 0 2006.232.07:40:11.93#ibcon#*before return 0, iclass 16, count 0 2006.232.07:40:11.93#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:40:11.93#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:40:11.93#ibcon#about to clear, iclass 16 cls_cnt 0 2006.232.07:40:11.93#ibcon#cleared, iclass 16 cls_cnt 0 2006.232.07:40:11.93$vc4f8/vb=5,3 2006.232.07:40:11.93#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.232.07:40:11.93#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.232.07:40:11.93#ibcon#ireg 11 cls_cnt 2 2006.232.07:40:11.93#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:40:12.00#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:40:12.00#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:40:12.00#ibcon#enter wrdev, iclass 18, count 2 2006.232.07:40:12.00#ibcon#first serial, iclass 18, count 2 2006.232.07:40:12.00#ibcon#enter sib2, iclass 18, count 2 2006.232.07:40:12.00#ibcon#flushed, iclass 18, count 2 2006.232.07:40:12.00#ibcon#about to write, iclass 18, count 2 2006.232.07:40:12.00#ibcon#wrote, iclass 18, count 2 2006.232.07:40:12.00#ibcon#about to read 3, iclass 18, count 2 2006.232.07:40:12.01#ibcon#read 3, iclass 18, count 2 2006.232.07:40:12.01#ibcon#about to read 4, iclass 18, count 2 2006.232.07:40:12.01#ibcon#read 4, iclass 18, count 2 2006.232.07:40:12.01#ibcon#about to read 5, iclass 18, count 2 2006.232.07:40:12.01#ibcon#read 5, iclass 18, count 2 2006.232.07:40:12.01#ibcon#about to read 6, iclass 18, count 2 2006.232.07:40:12.01#ibcon#read 6, iclass 18, count 2 2006.232.07:40:12.01#ibcon#end of sib2, iclass 18, count 2 2006.232.07:40:12.01#ibcon#*mode == 0, iclass 18, count 2 2006.232.07:40:12.01#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.232.07:40:12.01#ibcon#[27=AT05-03\r\n] 2006.232.07:40:12.01#ibcon#*before write, iclass 18, count 2 2006.232.07:40:12.01#ibcon#enter sib2, iclass 18, count 2 2006.232.07:40:12.01#ibcon#flushed, iclass 18, count 2 2006.232.07:40:12.01#ibcon#about to write, iclass 18, count 2 2006.232.07:40:12.01#ibcon#wrote, iclass 18, count 2 2006.232.07:40:12.01#ibcon#about to read 3, iclass 18, count 2 2006.232.07:40:12.04#ibcon#read 3, iclass 18, count 2 2006.232.07:40:12.04#ibcon#about to read 4, iclass 18, count 2 2006.232.07:40:12.04#ibcon#read 4, iclass 18, count 2 2006.232.07:40:12.04#ibcon#about to read 5, iclass 18, count 2 2006.232.07:40:12.04#ibcon#read 5, iclass 18, count 2 2006.232.07:40:12.04#ibcon#about to read 6, iclass 18, count 2 2006.232.07:40:12.04#ibcon#read 6, iclass 18, count 2 2006.232.07:40:12.04#ibcon#end of sib2, iclass 18, count 2 2006.232.07:40:12.04#ibcon#*after write, iclass 18, count 2 2006.232.07:40:12.04#ibcon#*before return 0, iclass 18, count 2 2006.232.07:40:12.04#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:40:12.04#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:40:12.04#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.232.07:40:12.04#ibcon#ireg 7 cls_cnt 0 2006.232.07:40:12.04#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:40:12.16#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:40:12.16#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:40:12.16#ibcon#enter wrdev, iclass 18, count 0 2006.232.07:40:12.16#ibcon#first serial, iclass 18, count 0 2006.232.07:40:12.16#ibcon#enter sib2, iclass 18, count 0 2006.232.07:40:12.16#ibcon#flushed, iclass 18, count 0 2006.232.07:40:12.16#ibcon#about to write, iclass 18, count 0 2006.232.07:40:12.16#ibcon#wrote, iclass 18, count 0 2006.232.07:40:12.16#ibcon#about to read 3, iclass 18, count 0 2006.232.07:40:12.18#ibcon#read 3, iclass 18, count 0 2006.232.07:40:12.18#ibcon#about to read 4, iclass 18, count 0 2006.232.07:40:12.18#ibcon#read 4, iclass 18, count 0 2006.232.07:40:12.18#ibcon#about to read 5, iclass 18, count 0 2006.232.07:40:12.18#ibcon#read 5, iclass 18, count 0 2006.232.07:40:12.18#ibcon#about to read 6, iclass 18, count 0 2006.232.07:40:12.18#ibcon#read 6, iclass 18, count 0 2006.232.07:40:12.18#ibcon#end of sib2, iclass 18, count 0 2006.232.07:40:12.18#ibcon#*mode == 0, iclass 18, count 0 2006.232.07:40:12.18#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.232.07:40:12.18#ibcon#[27=USB\r\n] 2006.232.07:40:12.18#ibcon#*before write, iclass 18, count 0 2006.232.07:40:12.18#ibcon#enter sib2, iclass 18, count 0 2006.232.07:40:12.18#ibcon#flushed, iclass 18, count 0 2006.232.07:40:12.18#ibcon#about to write, iclass 18, count 0 2006.232.07:40:12.18#ibcon#wrote, iclass 18, count 0 2006.232.07:40:12.18#ibcon#about to read 3, iclass 18, count 0 2006.232.07:40:12.21#ibcon#read 3, iclass 18, count 0 2006.232.07:40:12.21#ibcon#about to read 4, iclass 18, count 0 2006.232.07:40:12.21#ibcon#read 4, iclass 18, count 0 2006.232.07:40:12.21#ibcon#about to read 5, iclass 18, count 0 2006.232.07:40:12.21#ibcon#read 5, iclass 18, count 0 2006.232.07:40:12.21#ibcon#about to read 6, iclass 18, count 0 2006.232.07:40:12.21#ibcon#read 6, iclass 18, count 0 2006.232.07:40:12.21#ibcon#end of sib2, iclass 18, count 0 2006.232.07:40:12.21#ibcon#*after write, iclass 18, count 0 2006.232.07:40:12.21#ibcon#*before return 0, iclass 18, count 0 2006.232.07:40:12.21#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:40:12.21#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:40:12.21#ibcon#about to clear, iclass 18 cls_cnt 0 2006.232.07:40:12.21#ibcon#cleared, iclass 18 cls_cnt 0 2006.232.07:40:12.21$vc4f8/vblo=6,752.99 2006.232.07:40:12.21#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.232.07:40:12.21#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.232.07:40:12.21#ibcon#ireg 17 cls_cnt 0 2006.232.07:40:12.21#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:40:12.21#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:40:12.21#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:40:12.21#ibcon#enter wrdev, iclass 20, count 0 2006.232.07:40:12.21#ibcon#first serial, iclass 20, count 0 2006.232.07:40:12.21#ibcon#enter sib2, iclass 20, count 0 2006.232.07:40:12.21#ibcon#flushed, iclass 20, count 0 2006.232.07:40:12.21#ibcon#about to write, iclass 20, count 0 2006.232.07:40:12.21#ibcon#wrote, iclass 20, count 0 2006.232.07:40:12.21#ibcon#about to read 3, iclass 20, count 0 2006.232.07:40:12.23#ibcon#read 3, iclass 20, count 0 2006.232.07:40:12.23#ibcon#about to read 4, iclass 20, count 0 2006.232.07:40:12.23#ibcon#read 4, iclass 20, count 0 2006.232.07:40:12.23#ibcon#about to read 5, iclass 20, count 0 2006.232.07:40:12.23#ibcon#read 5, iclass 20, count 0 2006.232.07:40:12.23#ibcon#about to read 6, iclass 20, count 0 2006.232.07:40:12.23#ibcon#read 6, iclass 20, count 0 2006.232.07:40:12.23#ibcon#end of sib2, iclass 20, count 0 2006.232.07:40:12.23#ibcon#*mode == 0, iclass 20, count 0 2006.232.07:40:12.23#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.232.07:40:12.23#ibcon#[28=FRQ=06,752.99\r\n] 2006.232.07:40:12.23#ibcon#*before write, iclass 20, count 0 2006.232.07:40:12.23#ibcon#enter sib2, iclass 20, count 0 2006.232.07:40:12.23#ibcon#flushed, iclass 20, count 0 2006.232.07:40:12.23#ibcon#about to write, iclass 20, count 0 2006.232.07:40:12.23#ibcon#wrote, iclass 20, count 0 2006.232.07:40:12.23#ibcon#about to read 3, iclass 20, count 0 2006.232.07:40:12.27#ibcon#read 3, iclass 20, count 0 2006.232.07:40:12.27#ibcon#about to read 4, iclass 20, count 0 2006.232.07:40:12.27#ibcon#read 4, iclass 20, count 0 2006.232.07:40:12.27#ibcon#about to read 5, iclass 20, count 0 2006.232.07:40:12.27#ibcon#read 5, iclass 20, count 0 2006.232.07:40:12.27#ibcon#about to read 6, iclass 20, count 0 2006.232.07:40:12.27#ibcon#read 6, iclass 20, count 0 2006.232.07:40:12.27#ibcon#end of sib2, iclass 20, count 0 2006.232.07:40:12.27#ibcon#*after write, iclass 20, count 0 2006.232.07:40:12.27#ibcon#*before return 0, iclass 20, count 0 2006.232.07:40:12.27#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:40:12.27#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:40:12.27#ibcon#about to clear, iclass 20 cls_cnt 0 2006.232.07:40:12.27#ibcon#cleared, iclass 20 cls_cnt 0 2006.232.07:40:12.27$vc4f8/vb=6,4 2006.232.07:40:12.27#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.232.07:40:12.27#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.232.07:40:12.27#ibcon#ireg 11 cls_cnt 2 2006.232.07:40:12.27#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:40:12.33#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:40:12.33#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:40:12.33#ibcon#enter wrdev, iclass 22, count 2 2006.232.07:40:12.33#ibcon#first serial, iclass 22, count 2 2006.232.07:40:12.33#ibcon#enter sib2, iclass 22, count 2 2006.232.07:40:12.33#ibcon#flushed, iclass 22, count 2 2006.232.07:40:12.33#ibcon#about to write, iclass 22, count 2 2006.232.07:40:12.33#ibcon#wrote, iclass 22, count 2 2006.232.07:40:12.33#ibcon#about to read 3, iclass 22, count 2 2006.232.07:40:12.35#ibcon#read 3, iclass 22, count 2 2006.232.07:40:12.35#ibcon#about to read 4, iclass 22, count 2 2006.232.07:40:12.35#ibcon#read 4, iclass 22, count 2 2006.232.07:40:12.35#ibcon#about to read 5, iclass 22, count 2 2006.232.07:40:12.35#ibcon#read 5, iclass 22, count 2 2006.232.07:40:12.35#ibcon#about to read 6, iclass 22, count 2 2006.232.07:40:12.35#ibcon#read 6, iclass 22, count 2 2006.232.07:40:12.35#ibcon#end of sib2, iclass 22, count 2 2006.232.07:40:12.35#ibcon#*mode == 0, iclass 22, count 2 2006.232.07:40:12.35#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.232.07:40:12.35#ibcon#[27=AT06-04\r\n] 2006.232.07:40:12.35#ibcon#*before write, iclass 22, count 2 2006.232.07:40:12.35#ibcon#enter sib2, iclass 22, count 2 2006.232.07:40:12.35#ibcon#flushed, iclass 22, count 2 2006.232.07:40:12.35#ibcon#about to write, iclass 22, count 2 2006.232.07:40:12.35#ibcon#wrote, iclass 22, count 2 2006.232.07:40:12.35#ibcon#about to read 3, iclass 22, count 2 2006.232.07:40:12.38#ibcon#read 3, iclass 22, count 2 2006.232.07:40:12.38#ibcon#about to read 4, iclass 22, count 2 2006.232.07:40:12.38#ibcon#read 4, iclass 22, count 2 2006.232.07:40:12.38#ibcon#about to read 5, iclass 22, count 2 2006.232.07:40:12.38#ibcon#read 5, iclass 22, count 2 2006.232.07:40:12.38#ibcon#about to read 6, iclass 22, count 2 2006.232.07:40:12.38#ibcon#read 6, iclass 22, count 2 2006.232.07:40:12.38#ibcon#end of sib2, iclass 22, count 2 2006.232.07:40:12.38#ibcon#*after write, iclass 22, count 2 2006.232.07:40:12.38#ibcon#*before return 0, iclass 22, count 2 2006.232.07:40:12.38#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:40:12.38#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:40:12.38#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.232.07:40:12.38#ibcon#ireg 7 cls_cnt 0 2006.232.07:40:12.38#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:40:12.50#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:40:12.50#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:40:12.50#ibcon#enter wrdev, iclass 22, count 0 2006.232.07:40:12.50#ibcon#first serial, iclass 22, count 0 2006.232.07:40:12.50#ibcon#enter sib2, iclass 22, count 0 2006.232.07:40:12.50#ibcon#flushed, iclass 22, count 0 2006.232.07:40:12.50#ibcon#about to write, iclass 22, count 0 2006.232.07:40:12.50#ibcon#wrote, iclass 22, count 0 2006.232.07:40:12.50#ibcon#about to read 3, iclass 22, count 0 2006.232.07:40:12.52#ibcon#read 3, iclass 22, count 0 2006.232.07:40:12.52#ibcon#about to read 4, iclass 22, count 0 2006.232.07:40:12.52#ibcon#read 4, iclass 22, count 0 2006.232.07:40:12.52#ibcon#about to read 5, iclass 22, count 0 2006.232.07:40:12.52#ibcon#read 5, iclass 22, count 0 2006.232.07:40:12.52#ibcon#about to read 6, iclass 22, count 0 2006.232.07:40:12.52#ibcon#read 6, iclass 22, count 0 2006.232.07:40:12.52#ibcon#end of sib2, iclass 22, count 0 2006.232.07:40:12.52#ibcon#*mode == 0, iclass 22, count 0 2006.232.07:40:12.52#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.232.07:40:12.52#ibcon#[27=USB\r\n] 2006.232.07:40:12.52#ibcon#*before write, iclass 22, count 0 2006.232.07:40:12.52#ibcon#enter sib2, iclass 22, count 0 2006.232.07:40:12.52#ibcon#flushed, iclass 22, count 0 2006.232.07:40:12.52#ibcon#about to write, iclass 22, count 0 2006.232.07:40:12.52#ibcon#wrote, iclass 22, count 0 2006.232.07:40:12.52#ibcon#about to read 3, iclass 22, count 0 2006.232.07:40:12.55#ibcon#read 3, iclass 22, count 0 2006.232.07:40:12.55#ibcon#about to read 4, iclass 22, count 0 2006.232.07:40:12.55#ibcon#read 4, iclass 22, count 0 2006.232.07:40:12.55#ibcon#about to read 5, iclass 22, count 0 2006.232.07:40:12.55#ibcon#read 5, iclass 22, count 0 2006.232.07:40:12.55#ibcon#about to read 6, iclass 22, count 0 2006.232.07:40:12.55#ibcon#read 6, iclass 22, count 0 2006.232.07:40:12.55#ibcon#end of sib2, iclass 22, count 0 2006.232.07:40:12.55#ibcon#*after write, iclass 22, count 0 2006.232.07:40:12.55#ibcon#*before return 0, iclass 22, count 0 2006.232.07:40:12.55#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:40:12.55#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:40:12.55#ibcon#about to clear, iclass 22 cls_cnt 0 2006.232.07:40:12.55#ibcon#cleared, iclass 22 cls_cnt 0 2006.232.07:40:12.55$vc4f8/vabw=wide 2006.232.07:40:12.55#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.232.07:40:12.55#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.232.07:40:12.55#ibcon#ireg 8 cls_cnt 0 2006.232.07:40:12.55#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:40:12.55#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:40:12.55#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:40:12.55#ibcon#enter wrdev, iclass 24, count 0 2006.232.07:40:12.55#ibcon#first serial, iclass 24, count 0 2006.232.07:40:12.55#ibcon#enter sib2, iclass 24, count 0 2006.232.07:40:12.55#ibcon#flushed, iclass 24, count 0 2006.232.07:40:12.55#ibcon#about to write, iclass 24, count 0 2006.232.07:40:12.55#ibcon#wrote, iclass 24, count 0 2006.232.07:40:12.55#ibcon#about to read 3, iclass 24, count 0 2006.232.07:40:12.57#ibcon#read 3, iclass 24, count 0 2006.232.07:40:12.57#ibcon#about to read 4, iclass 24, count 0 2006.232.07:40:12.57#ibcon#read 4, iclass 24, count 0 2006.232.07:40:12.57#ibcon#about to read 5, iclass 24, count 0 2006.232.07:40:12.57#ibcon#read 5, iclass 24, count 0 2006.232.07:40:12.57#ibcon#about to read 6, iclass 24, count 0 2006.232.07:40:12.57#ibcon#read 6, iclass 24, count 0 2006.232.07:40:12.57#ibcon#end of sib2, iclass 24, count 0 2006.232.07:40:12.57#ibcon#*mode == 0, iclass 24, count 0 2006.232.07:40:12.57#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.232.07:40:12.57#ibcon#[25=BW32\r\n] 2006.232.07:40:12.57#ibcon#*before write, iclass 24, count 0 2006.232.07:40:12.57#ibcon#enter sib2, iclass 24, count 0 2006.232.07:40:12.57#ibcon#flushed, iclass 24, count 0 2006.232.07:40:12.57#ibcon#about to write, iclass 24, count 0 2006.232.07:40:12.57#ibcon#wrote, iclass 24, count 0 2006.232.07:40:12.57#ibcon#about to read 3, iclass 24, count 0 2006.232.07:40:12.60#ibcon#read 3, iclass 24, count 0 2006.232.07:40:12.60#ibcon#about to read 4, iclass 24, count 0 2006.232.07:40:12.60#ibcon#read 4, iclass 24, count 0 2006.232.07:40:12.60#ibcon#about to read 5, iclass 24, count 0 2006.232.07:40:12.60#ibcon#read 5, iclass 24, count 0 2006.232.07:40:12.60#ibcon#about to read 6, iclass 24, count 0 2006.232.07:40:12.60#ibcon#read 6, iclass 24, count 0 2006.232.07:40:12.60#ibcon#end of sib2, iclass 24, count 0 2006.232.07:40:12.60#ibcon#*after write, iclass 24, count 0 2006.232.07:40:12.60#ibcon#*before return 0, iclass 24, count 0 2006.232.07:40:12.60#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:40:12.60#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:40:12.60#ibcon#about to clear, iclass 24 cls_cnt 0 2006.232.07:40:12.60#ibcon#cleared, iclass 24 cls_cnt 0 2006.232.07:40:12.60$vc4f8/vbbw=wide 2006.232.07:40:12.60#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.232.07:40:12.60#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.232.07:40:12.60#ibcon#ireg 8 cls_cnt 0 2006.232.07:40:12.60#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.232.07:40:12.67#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.232.07:40:12.67#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.232.07:40:12.67#ibcon#enter wrdev, iclass 26, count 0 2006.232.07:40:12.67#ibcon#first serial, iclass 26, count 0 2006.232.07:40:12.67#ibcon#enter sib2, iclass 26, count 0 2006.232.07:40:12.67#ibcon#flushed, iclass 26, count 0 2006.232.07:40:12.67#ibcon#about to write, iclass 26, count 0 2006.232.07:40:12.67#ibcon#wrote, iclass 26, count 0 2006.232.07:40:12.67#ibcon#about to read 3, iclass 26, count 0 2006.232.07:40:12.69#ibcon#read 3, iclass 26, count 0 2006.232.07:40:12.69#ibcon#about to read 4, iclass 26, count 0 2006.232.07:40:12.69#ibcon#read 4, iclass 26, count 0 2006.232.07:40:12.69#ibcon#about to read 5, iclass 26, count 0 2006.232.07:40:12.69#ibcon#read 5, iclass 26, count 0 2006.232.07:40:12.69#ibcon#about to read 6, iclass 26, count 0 2006.232.07:40:12.69#ibcon#read 6, iclass 26, count 0 2006.232.07:40:12.69#ibcon#end of sib2, iclass 26, count 0 2006.232.07:40:12.69#ibcon#*mode == 0, iclass 26, count 0 2006.232.07:40:12.69#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.232.07:40:12.69#ibcon#[27=BW32\r\n] 2006.232.07:40:12.69#ibcon#*before write, iclass 26, count 0 2006.232.07:40:12.69#ibcon#enter sib2, iclass 26, count 0 2006.232.07:40:12.69#ibcon#flushed, iclass 26, count 0 2006.232.07:40:12.69#ibcon#about to write, iclass 26, count 0 2006.232.07:40:12.69#ibcon#wrote, iclass 26, count 0 2006.232.07:40:12.69#ibcon#about to read 3, iclass 26, count 0 2006.232.07:40:12.72#ibcon#read 3, iclass 26, count 0 2006.232.07:40:12.72#ibcon#about to read 4, iclass 26, count 0 2006.232.07:40:12.72#ibcon#read 4, iclass 26, count 0 2006.232.07:40:12.72#ibcon#about to read 5, iclass 26, count 0 2006.232.07:40:12.72#ibcon#read 5, iclass 26, count 0 2006.232.07:40:12.72#ibcon#about to read 6, iclass 26, count 0 2006.232.07:40:12.72#ibcon#read 6, iclass 26, count 0 2006.232.07:40:12.72#ibcon#end of sib2, iclass 26, count 0 2006.232.07:40:12.72#ibcon#*after write, iclass 26, count 0 2006.232.07:40:12.72#ibcon#*before return 0, iclass 26, count 0 2006.232.07:40:12.72#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.232.07:40:12.72#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.232.07:40:12.72#ibcon#about to clear, iclass 26 cls_cnt 0 2006.232.07:40:12.72#ibcon#cleared, iclass 26 cls_cnt 0 2006.232.07:40:12.72$4f8m12a/ifd4f 2006.232.07:40:12.72$ifd4f/lo= 2006.232.07:40:12.72$ifd4f/lo=lo1,7680.00,usb,rcp,1 2006.232.07:40:12.72$ifd4f/lo=lo2,1600.00,usb,rcp,1 2006.232.07:40:12.72$ifd4f/lo=lo3,8080.00,usb,rcp,1 2006.232.07:40:12.73$ifd4f/patch= 2006.232.07:40:12.73$ifd4f/patch=lo1,a1,a2,a3,a4 2006.232.07:40:12.73$ifd4f/patch=lo2,b1,b2,b3,b4,b5,b6 2006.232.07:40:12.73$ifd4f/patch=lo3,a5,a6,a7,a8 2006.232.07:40:12.73$4f8m12a/"form=m,16.000,1:2 2006.232.07:40:12.73$4f8m12a/"tpicd 2006.232.07:40:12.73$4f8m12a/echo=off 2006.232.07:40:12.73$4f8m12a/xlog=off 2006.232.07:40:12.73:!2006.232.07:40:40 2006.232.07:40:28.14#trakl#Source acquired 2006.232.07:40:30.14#flagr#flagr/antenna,acquired 2006.232.07:40:40.01:preob 2006.232.07:40:41.14/onsource/TRACKING 2006.232.07:40:41.14:!2006.232.07:40:50 2006.232.07:40:50.00:data_valid=on 2006.232.07:40:50.00:midob 2006.232.07:40:50.14/onsource/TRACKING 2006.232.07:40:50.14/wx/29.43,1007.2,87 2006.232.07:40:50.22/cable/+6.3873E-03 2006.232.07:40:51.31/va/01,08,usb,yes,33,34 2006.232.07:40:51.31/va/02,07,usb,yes,33,34 2006.232.07:40:51.31/va/03,08,usb,yes,25,25 2006.232.07:40:51.31/va/04,07,usb,yes,34,37 2006.232.07:40:51.31/va/05,07,usb,yes,39,41 2006.232.07:40:51.31/va/06,06,usb,yes,38,38 2006.232.07:40:51.31/va/07,06,usb,yes,39,38 2006.232.07:40:51.31/va/08,06,usb,yes,41,41 2006.232.07:40:51.54/valo/01,532.99,yes,locked 2006.232.07:40:51.54/valo/02,572.99,yes,locked 2006.232.07:40:51.54/valo/03,672.99,yes,locked 2006.232.07:40:51.54/valo/04,832.99,yes,locked 2006.232.07:40:51.54/valo/05,652.99,yes,locked 2006.232.07:40:51.54/valo/06,772.99,yes,locked 2006.232.07:40:51.54/valo/07,832.99,yes,locked 2006.232.07:40:51.54/valo/08,852.99,yes,locked 2006.232.07:40:52.63/vb/01,04,usb,yes,32,30 2006.232.07:40:52.63/vb/02,04,usb,yes,33,35 2006.232.07:40:52.63/vb/03,04,usb,yes,30,34 2006.232.07:40:52.63/vb/04,04,usb,yes,31,31 2006.232.07:40:52.63/vb/05,03,usb,yes,36,41 2006.232.07:40:52.63/vb/06,04,usb,yes,30,33 2006.232.07:40:52.63/vb/07,04,usb,yes,32,32 2006.232.07:40:52.63/vb/08,04,usb,yes,30,33 2006.232.07:40:52.86/vblo/01,632.99,yes,locked 2006.232.07:40:52.86/vblo/02,640.99,yes,locked 2006.232.07:40:52.86/vblo/03,656.99,yes,locked 2006.232.07:40:52.86/vblo/04,712.99,yes,locked 2006.232.07:40:52.86/vblo/05,744.99,yes,locked 2006.232.07:40:52.86/vblo/06,752.99,yes,locked 2006.232.07:40:52.86/vblo/07,734.99,yes,locked 2006.232.07:40:52.86/vblo/08,744.99,yes,locked 2006.232.07:40:53.01/vabw/8 2006.232.07:40:53.16/vbbw/8 2006.232.07:40:53.25/xfe/off,on,13.2 2006.232.07:40:53.63/ifatt/23,28,28,28 2006.232.07:40:54.07/fmout-gps/S +4.38E-07 2006.232.07:40:54.12:!2006.232.07:41:50 2006.232.07:41:50.00:data_valid=off 2006.232.07:41:50.01:postob 2006.232.07:41:50.23/cable/+6.3869E-03 2006.232.07:41:50.24/wx/29.43,1007.3,87 2006.232.07:41:51.08/fmout-gps/S +4.39E-07 2006.232.07:41:51.09:scan_name=232-0742,k06232,60 2006.232.07:41:51.09:source=1044+719,104827.62,714335.9,2000.0,ccw 2006.232.07:41:52.13#flagr#flagr/antenna,new-source 2006.232.07:41:52.14:checkk5 2006.232.07:41:52.53/chk_autoobs//k5ts1/ autoobs is running! 2006.232.07:41:52.90/chk_autoobs//k5ts2/ autoobs is running! 2006.232.07:41:53.28/chk_autoobs//k5ts3/ autoobs is running! 2006.232.07:41:53.66/chk_autoobs//k5ts4/ autoobs is running! 2006.232.07:41:54.02/chk_obsdata//k5ts1/T2320740??a.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:41:54.42/chk_obsdata//k5ts2/T2320740??b.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:41:54.79/chk_obsdata//k5ts3/T2320740??c.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:41:55.16/chk_obsdata//k5ts4/T2320740??d.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:41:55.85/k5log//k5ts1_log_newline 2006.232.07:41:56.54/k5log//k5ts2_log_newline 2006.232.07:41:57.22/k5log//k5ts3_log_newline 2006.232.07:41:57.91/k5log//k5ts4_log_newline 2006.232.07:41:57.93/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.232.07:41:57.93:4f8m12a=1 2006.232.07:41:57.93$4f8m12a/echo=on 2006.232.07:41:57.93$4f8m12a/pcalon 2006.232.07:41:57.93$pcalon/"no phase cal control is implemented here 2006.232.07:41:57.93$4f8m12a/"tpicd=stop 2006.232.07:41:57.93$4f8m12a/vc4f8 2006.232.07:41:57.93$vc4f8/valo=1,532.99 2006.232.07:41:57.94#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.232.07:41:57.94#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.232.07:41:57.94#ibcon#ireg 17 cls_cnt 0 2006.232.07:41:57.94#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.232.07:41:57.94#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.232.07:41:57.94#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.232.07:41:57.94#ibcon#enter wrdev, iclass 37, count 0 2006.232.07:41:57.94#ibcon#first serial, iclass 37, count 0 2006.232.07:41:57.94#ibcon#enter sib2, iclass 37, count 0 2006.232.07:41:57.94#ibcon#flushed, iclass 37, count 0 2006.232.07:41:57.94#ibcon#about to write, iclass 37, count 0 2006.232.07:41:57.94#ibcon#wrote, iclass 37, count 0 2006.232.07:41:57.94#ibcon#about to read 3, iclass 37, count 0 2006.232.07:41:57.97#ibcon#read 3, iclass 37, count 0 2006.232.07:41:57.97#ibcon#about to read 4, iclass 37, count 0 2006.232.07:41:57.97#ibcon#read 4, iclass 37, count 0 2006.232.07:41:57.97#ibcon#about to read 5, iclass 37, count 0 2006.232.07:41:57.97#ibcon#read 5, iclass 37, count 0 2006.232.07:41:57.97#ibcon#about to read 6, iclass 37, count 0 2006.232.07:41:57.97#ibcon#read 6, iclass 37, count 0 2006.232.07:41:57.97#ibcon#end of sib2, iclass 37, count 0 2006.232.07:41:57.97#ibcon#*mode == 0, iclass 37, count 0 2006.232.07:41:57.97#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.232.07:41:57.97#ibcon#[26=FRQ=01,532.99\r\n] 2006.232.07:41:57.97#ibcon#*before write, iclass 37, count 0 2006.232.07:41:57.97#ibcon#enter sib2, iclass 37, count 0 2006.232.07:41:57.97#ibcon#flushed, iclass 37, count 0 2006.232.07:41:57.97#ibcon#about to write, iclass 37, count 0 2006.232.07:41:57.97#ibcon#wrote, iclass 37, count 0 2006.232.07:41:57.97#ibcon#about to read 3, iclass 37, count 0 2006.232.07:41:58.02#ibcon#read 3, iclass 37, count 0 2006.232.07:41:58.02#ibcon#about to read 4, iclass 37, count 0 2006.232.07:41:58.02#ibcon#read 4, iclass 37, count 0 2006.232.07:41:58.02#ibcon#about to read 5, iclass 37, count 0 2006.232.07:41:58.02#ibcon#read 5, iclass 37, count 0 2006.232.07:41:58.02#ibcon#about to read 6, iclass 37, count 0 2006.232.07:41:58.02#ibcon#read 6, iclass 37, count 0 2006.232.07:41:58.02#ibcon#end of sib2, iclass 37, count 0 2006.232.07:41:58.02#ibcon#*after write, iclass 37, count 0 2006.232.07:41:58.02#ibcon#*before return 0, iclass 37, count 0 2006.232.07:41:58.02#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.232.07:41:58.02#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.232.07:41:58.02#ibcon#about to clear, iclass 37 cls_cnt 0 2006.232.07:41:58.02#ibcon#cleared, iclass 37 cls_cnt 0 2006.232.07:41:58.02$vc4f8/va=1,8 2006.232.07:41:58.02#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.232.07:41:58.02#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.232.07:41:58.02#ibcon#ireg 11 cls_cnt 2 2006.232.07:41:58.02#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.232.07:41:58.02#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.232.07:41:58.02#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.232.07:41:58.02#ibcon#enter wrdev, iclass 39, count 2 2006.232.07:41:58.02#ibcon#first serial, iclass 39, count 2 2006.232.07:41:58.02#ibcon#enter sib2, iclass 39, count 2 2006.232.07:41:58.02#ibcon#flushed, iclass 39, count 2 2006.232.07:41:58.02#ibcon#about to write, iclass 39, count 2 2006.232.07:41:58.02#ibcon#wrote, iclass 39, count 2 2006.232.07:41:58.02#ibcon#about to read 3, iclass 39, count 2 2006.232.07:41:58.05#ibcon#read 3, iclass 39, count 2 2006.232.07:41:58.05#ibcon#about to read 4, iclass 39, count 2 2006.232.07:41:58.05#ibcon#read 4, iclass 39, count 2 2006.232.07:41:58.05#ibcon#about to read 5, iclass 39, count 2 2006.232.07:41:58.05#ibcon#read 5, iclass 39, count 2 2006.232.07:41:58.05#ibcon#about to read 6, iclass 39, count 2 2006.232.07:41:58.05#ibcon#read 6, iclass 39, count 2 2006.232.07:41:58.05#ibcon#end of sib2, iclass 39, count 2 2006.232.07:41:58.05#ibcon#*mode == 0, iclass 39, count 2 2006.232.07:41:58.05#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.232.07:41:58.05#ibcon#[25=AT01-08\r\n] 2006.232.07:41:58.05#ibcon#*before write, iclass 39, count 2 2006.232.07:41:58.05#ibcon#enter sib2, iclass 39, count 2 2006.232.07:41:58.05#ibcon#flushed, iclass 39, count 2 2006.232.07:41:58.05#ibcon#about to write, iclass 39, count 2 2006.232.07:41:58.05#ibcon#wrote, iclass 39, count 2 2006.232.07:41:58.05#ibcon#about to read 3, iclass 39, count 2 2006.232.07:41:58.08#ibcon#read 3, iclass 39, count 2 2006.232.07:41:58.08#ibcon#about to read 4, iclass 39, count 2 2006.232.07:41:58.08#ibcon#read 4, iclass 39, count 2 2006.232.07:41:58.08#ibcon#about to read 5, iclass 39, count 2 2006.232.07:41:58.08#ibcon#read 5, iclass 39, count 2 2006.232.07:41:58.08#ibcon#about to read 6, iclass 39, count 2 2006.232.07:41:58.08#ibcon#read 6, iclass 39, count 2 2006.232.07:41:58.08#ibcon#end of sib2, iclass 39, count 2 2006.232.07:41:58.08#ibcon#*after write, iclass 39, count 2 2006.232.07:41:58.08#ibcon#*before return 0, iclass 39, count 2 2006.232.07:41:58.08#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.232.07:41:58.08#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.232.07:41:58.08#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.232.07:41:58.08#ibcon#ireg 7 cls_cnt 0 2006.232.07:41:58.08#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.232.07:41:58.19#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.232.07:41:58.19#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.232.07:41:58.19#ibcon#enter wrdev, iclass 39, count 0 2006.232.07:41:58.19#ibcon#first serial, iclass 39, count 0 2006.232.07:41:58.19#ibcon#enter sib2, iclass 39, count 0 2006.232.07:41:58.19#ibcon#flushed, iclass 39, count 0 2006.232.07:41:58.19#ibcon#about to write, iclass 39, count 0 2006.232.07:41:58.19#ibcon#wrote, iclass 39, count 0 2006.232.07:41:58.19#ibcon#about to read 3, iclass 39, count 0 2006.232.07:41:58.21#ibcon#read 3, iclass 39, count 0 2006.232.07:41:58.21#ibcon#about to read 4, iclass 39, count 0 2006.232.07:41:58.21#ibcon#read 4, iclass 39, count 0 2006.232.07:41:58.21#ibcon#about to read 5, iclass 39, count 0 2006.232.07:41:58.21#ibcon#read 5, iclass 39, count 0 2006.232.07:41:58.21#ibcon#about to read 6, iclass 39, count 0 2006.232.07:41:58.21#ibcon#read 6, iclass 39, count 0 2006.232.07:41:58.21#ibcon#end of sib2, iclass 39, count 0 2006.232.07:41:58.21#ibcon#*mode == 0, iclass 39, count 0 2006.232.07:41:58.21#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.232.07:41:58.21#ibcon#[25=USB\r\n] 2006.232.07:41:58.21#ibcon#*before write, iclass 39, count 0 2006.232.07:41:58.21#ibcon#enter sib2, iclass 39, count 0 2006.232.07:41:58.21#ibcon#flushed, iclass 39, count 0 2006.232.07:41:58.21#ibcon#about to write, iclass 39, count 0 2006.232.07:41:58.21#ibcon#wrote, iclass 39, count 0 2006.232.07:41:58.21#ibcon#about to read 3, iclass 39, count 0 2006.232.07:41:58.24#ibcon#read 3, iclass 39, count 0 2006.232.07:41:58.24#ibcon#about to read 4, iclass 39, count 0 2006.232.07:41:58.24#ibcon#read 4, iclass 39, count 0 2006.232.07:41:58.24#ibcon#about to read 5, iclass 39, count 0 2006.232.07:41:58.24#ibcon#read 5, iclass 39, count 0 2006.232.07:41:58.24#ibcon#about to read 6, iclass 39, count 0 2006.232.07:41:58.24#ibcon#read 6, iclass 39, count 0 2006.232.07:41:58.24#ibcon#end of sib2, iclass 39, count 0 2006.232.07:41:58.24#ibcon#*after write, iclass 39, count 0 2006.232.07:41:58.24#ibcon#*before return 0, iclass 39, count 0 2006.232.07:41:58.24#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.232.07:41:58.24#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.232.07:41:58.24#ibcon#about to clear, iclass 39 cls_cnt 0 2006.232.07:41:58.24#ibcon#cleared, iclass 39 cls_cnt 0 2006.232.07:41:58.24$vc4f8/valo=2,572.99 2006.232.07:41:58.24#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.232.07:41:58.24#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.232.07:41:58.24#ibcon#ireg 17 cls_cnt 0 2006.232.07:41:58.24#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.232.07:41:58.24#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.232.07:41:58.24#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.232.07:41:58.24#ibcon#enter wrdev, iclass 3, count 0 2006.232.07:41:58.24#ibcon#first serial, iclass 3, count 0 2006.232.07:41:58.24#ibcon#enter sib2, iclass 3, count 0 2006.232.07:41:58.24#ibcon#flushed, iclass 3, count 0 2006.232.07:41:58.24#ibcon#about to write, iclass 3, count 0 2006.232.07:41:58.24#ibcon#wrote, iclass 3, count 0 2006.232.07:41:58.24#ibcon#about to read 3, iclass 3, count 0 2006.232.07:41:58.26#ibcon#read 3, iclass 3, count 0 2006.232.07:41:58.26#ibcon#about to read 4, iclass 3, count 0 2006.232.07:41:58.26#ibcon#read 4, iclass 3, count 0 2006.232.07:41:58.26#ibcon#about to read 5, iclass 3, count 0 2006.232.07:41:58.26#ibcon#read 5, iclass 3, count 0 2006.232.07:41:58.26#ibcon#about to read 6, iclass 3, count 0 2006.232.07:41:58.26#ibcon#read 6, iclass 3, count 0 2006.232.07:41:58.26#ibcon#end of sib2, iclass 3, count 0 2006.232.07:41:58.26#ibcon#*mode == 0, iclass 3, count 0 2006.232.07:41:58.26#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.232.07:41:58.26#ibcon#[26=FRQ=02,572.99\r\n] 2006.232.07:41:58.26#ibcon#*before write, iclass 3, count 0 2006.232.07:41:58.26#ibcon#enter sib2, iclass 3, count 0 2006.232.07:41:58.26#ibcon#flushed, iclass 3, count 0 2006.232.07:41:58.26#ibcon#about to write, iclass 3, count 0 2006.232.07:41:58.26#ibcon#wrote, iclass 3, count 0 2006.232.07:41:58.26#ibcon#about to read 3, iclass 3, count 0 2006.232.07:41:58.30#ibcon#read 3, iclass 3, count 0 2006.232.07:41:58.30#ibcon#about to read 4, iclass 3, count 0 2006.232.07:41:58.30#ibcon#read 4, iclass 3, count 0 2006.232.07:41:58.30#ibcon#about to read 5, iclass 3, count 0 2006.232.07:41:58.30#ibcon#read 5, iclass 3, count 0 2006.232.07:41:58.30#ibcon#about to read 6, iclass 3, count 0 2006.232.07:41:58.30#ibcon#read 6, iclass 3, count 0 2006.232.07:41:58.30#ibcon#end of sib2, iclass 3, count 0 2006.232.07:41:58.30#ibcon#*after write, iclass 3, count 0 2006.232.07:41:58.30#ibcon#*before return 0, iclass 3, count 0 2006.232.07:41:58.30#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.232.07:41:58.30#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.232.07:41:58.30#ibcon#about to clear, iclass 3 cls_cnt 0 2006.232.07:41:58.30#ibcon#cleared, iclass 3 cls_cnt 0 2006.232.07:41:58.30$vc4f8/va=2,7 2006.232.07:41:58.30#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.232.07:41:58.30#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.232.07:41:58.30#ibcon#ireg 11 cls_cnt 2 2006.232.07:41:58.30#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.232.07:41:58.36#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.232.07:41:58.36#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.232.07:41:58.36#ibcon#enter wrdev, iclass 5, count 2 2006.232.07:41:58.36#ibcon#first serial, iclass 5, count 2 2006.232.07:41:58.36#ibcon#enter sib2, iclass 5, count 2 2006.232.07:41:58.36#ibcon#flushed, iclass 5, count 2 2006.232.07:41:58.36#ibcon#about to write, iclass 5, count 2 2006.232.07:41:58.36#ibcon#wrote, iclass 5, count 2 2006.232.07:41:58.36#ibcon#about to read 3, iclass 5, count 2 2006.232.07:41:58.38#ibcon#read 3, iclass 5, count 2 2006.232.07:41:58.38#ibcon#about to read 4, iclass 5, count 2 2006.232.07:41:58.38#ibcon#read 4, iclass 5, count 2 2006.232.07:41:58.38#ibcon#about to read 5, iclass 5, count 2 2006.232.07:41:58.38#ibcon#read 5, iclass 5, count 2 2006.232.07:41:58.38#ibcon#about to read 6, iclass 5, count 2 2006.232.07:41:58.38#ibcon#read 6, iclass 5, count 2 2006.232.07:41:58.38#ibcon#end of sib2, iclass 5, count 2 2006.232.07:41:58.38#ibcon#*mode == 0, iclass 5, count 2 2006.232.07:41:58.38#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.232.07:41:58.38#ibcon#[25=AT02-07\r\n] 2006.232.07:41:58.38#ibcon#*before write, iclass 5, count 2 2006.232.07:41:58.38#ibcon#enter sib2, iclass 5, count 2 2006.232.07:41:58.38#ibcon#flushed, iclass 5, count 2 2006.232.07:41:58.38#ibcon#about to write, iclass 5, count 2 2006.232.07:41:58.38#ibcon#wrote, iclass 5, count 2 2006.232.07:41:58.38#ibcon#about to read 3, iclass 5, count 2 2006.232.07:41:58.41#ibcon#read 3, iclass 5, count 2 2006.232.07:41:58.41#ibcon#about to read 4, iclass 5, count 2 2006.232.07:41:58.41#ibcon#read 4, iclass 5, count 2 2006.232.07:41:58.41#ibcon#about to read 5, iclass 5, count 2 2006.232.07:41:58.41#ibcon#read 5, iclass 5, count 2 2006.232.07:41:58.41#ibcon#about to read 6, iclass 5, count 2 2006.232.07:41:58.41#ibcon#read 6, iclass 5, count 2 2006.232.07:41:58.41#ibcon#end of sib2, iclass 5, count 2 2006.232.07:41:58.41#ibcon#*after write, iclass 5, count 2 2006.232.07:41:58.41#ibcon#*before return 0, iclass 5, count 2 2006.232.07:41:58.41#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.232.07:41:58.41#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.232.07:41:58.41#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.232.07:41:58.41#ibcon#ireg 7 cls_cnt 0 2006.232.07:41:58.41#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.232.07:41:58.53#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.232.07:41:58.53#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.232.07:41:58.53#ibcon#enter wrdev, iclass 5, count 0 2006.232.07:41:58.53#ibcon#first serial, iclass 5, count 0 2006.232.07:41:58.53#ibcon#enter sib2, iclass 5, count 0 2006.232.07:41:58.53#ibcon#flushed, iclass 5, count 0 2006.232.07:41:58.53#ibcon#about to write, iclass 5, count 0 2006.232.07:41:58.53#ibcon#wrote, iclass 5, count 0 2006.232.07:41:58.53#ibcon#about to read 3, iclass 5, count 0 2006.232.07:41:58.56#ibcon#read 3, iclass 5, count 0 2006.232.07:41:58.56#ibcon#about to read 4, iclass 5, count 0 2006.232.07:41:58.56#ibcon#read 4, iclass 5, count 0 2006.232.07:41:58.56#ibcon#about to read 5, iclass 5, count 0 2006.232.07:41:58.56#ibcon#read 5, iclass 5, count 0 2006.232.07:41:58.56#ibcon#about to read 6, iclass 5, count 0 2006.232.07:41:58.56#ibcon#read 6, iclass 5, count 0 2006.232.07:41:58.56#ibcon#end of sib2, iclass 5, count 0 2006.232.07:41:58.56#ibcon#*mode == 0, iclass 5, count 0 2006.232.07:41:58.56#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.232.07:41:58.56#ibcon#[25=USB\r\n] 2006.232.07:41:58.56#ibcon#*before write, iclass 5, count 0 2006.232.07:41:58.56#ibcon#enter sib2, iclass 5, count 0 2006.232.07:41:58.56#ibcon#flushed, iclass 5, count 0 2006.232.07:41:58.56#ibcon#about to write, iclass 5, count 0 2006.232.07:41:58.56#ibcon#wrote, iclass 5, count 0 2006.232.07:41:58.56#ibcon#about to read 3, iclass 5, count 0 2006.232.07:41:58.58#ibcon#read 3, iclass 5, count 0 2006.232.07:41:58.58#ibcon#about to read 4, iclass 5, count 0 2006.232.07:41:58.58#ibcon#read 4, iclass 5, count 0 2006.232.07:41:58.58#ibcon#about to read 5, iclass 5, count 0 2006.232.07:41:58.58#ibcon#read 5, iclass 5, count 0 2006.232.07:41:58.58#ibcon#about to read 6, iclass 5, count 0 2006.232.07:41:58.58#ibcon#read 6, iclass 5, count 0 2006.232.07:41:58.58#ibcon#end of sib2, iclass 5, count 0 2006.232.07:41:58.58#ibcon#*after write, iclass 5, count 0 2006.232.07:41:58.58#ibcon#*before return 0, iclass 5, count 0 2006.232.07:41:58.58#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.232.07:41:58.58#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.232.07:41:58.58#ibcon#about to clear, iclass 5 cls_cnt 0 2006.232.07:41:58.58#ibcon#cleared, iclass 5 cls_cnt 0 2006.232.07:41:58.58$vc4f8/valo=3,672.99 2006.232.07:41:58.58#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.232.07:41:58.58#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.232.07:41:58.58#ibcon#ireg 17 cls_cnt 0 2006.232.07:41:58.58#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.232.07:41:58.58#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.232.07:41:58.58#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.232.07:41:58.58#ibcon#enter wrdev, iclass 7, count 0 2006.232.07:41:58.58#ibcon#first serial, iclass 7, count 0 2006.232.07:41:58.58#ibcon#enter sib2, iclass 7, count 0 2006.232.07:41:58.58#ibcon#flushed, iclass 7, count 0 2006.232.07:41:58.58#ibcon#about to write, iclass 7, count 0 2006.232.07:41:58.58#ibcon#wrote, iclass 7, count 0 2006.232.07:41:58.58#ibcon#about to read 3, iclass 7, count 0 2006.232.07:41:58.61#ibcon#read 3, iclass 7, count 0 2006.232.07:41:58.61#ibcon#about to read 4, iclass 7, count 0 2006.232.07:41:58.61#ibcon#read 4, iclass 7, count 0 2006.232.07:41:58.61#ibcon#about to read 5, iclass 7, count 0 2006.232.07:41:58.61#ibcon#read 5, iclass 7, count 0 2006.232.07:41:58.61#ibcon#about to read 6, iclass 7, count 0 2006.232.07:41:58.61#ibcon#read 6, iclass 7, count 0 2006.232.07:41:58.61#ibcon#end of sib2, iclass 7, count 0 2006.232.07:41:58.61#ibcon#*mode == 0, iclass 7, count 0 2006.232.07:41:58.61#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.232.07:41:58.61#ibcon#[26=FRQ=03,672.99\r\n] 2006.232.07:41:58.61#ibcon#*before write, iclass 7, count 0 2006.232.07:41:58.61#ibcon#enter sib2, iclass 7, count 0 2006.232.07:41:58.61#ibcon#flushed, iclass 7, count 0 2006.232.07:41:58.61#ibcon#about to write, iclass 7, count 0 2006.232.07:41:58.61#ibcon#wrote, iclass 7, count 0 2006.232.07:41:58.61#ibcon#about to read 3, iclass 7, count 0 2006.232.07:41:58.65#ibcon#read 3, iclass 7, count 0 2006.232.07:41:58.65#ibcon#about to read 4, iclass 7, count 0 2006.232.07:41:58.65#ibcon#read 4, iclass 7, count 0 2006.232.07:41:58.65#ibcon#about to read 5, iclass 7, count 0 2006.232.07:41:58.65#ibcon#read 5, iclass 7, count 0 2006.232.07:41:58.65#ibcon#about to read 6, iclass 7, count 0 2006.232.07:41:58.65#ibcon#read 6, iclass 7, count 0 2006.232.07:41:58.65#ibcon#end of sib2, iclass 7, count 0 2006.232.07:41:58.65#ibcon#*after write, iclass 7, count 0 2006.232.07:41:58.65#ibcon#*before return 0, iclass 7, count 0 2006.232.07:41:58.65#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.232.07:41:58.65#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.232.07:41:58.65#ibcon#about to clear, iclass 7 cls_cnt 0 2006.232.07:41:58.65#ibcon#cleared, iclass 7 cls_cnt 0 2006.232.07:41:58.65$vc4f8/va=3,8 2006.232.07:41:58.65#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.232.07:41:58.65#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.232.07:41:58.65#ibcon#ireg 11 cls_cnt 2 2006.232.07:41:58.65#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.232.07:41:58.71#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.232.07:41:58.71#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.232.07:41:58.71#ibcon#enter wrdev, iclass 11, count 2 2006.232.07:41:58.71#ibcon#first serial, iclass 11, count 2 2006.232.07:41:58.71#ibcon#enter sib2, iclass 11, count 2 2006.232.07:41:58.71#ibcon#flushed, iclass 11, count 2 2006.232.07:41:58.71#ibcon#about to write, iclass 11, count 2 2006.232.07:41:58.71#ibcon#wrote, iclass 11, count 2 2006.232.07:41:58.71#ibcon#about to read 3, iclass 11, count 2 2006.232.07:41:58.72#ibcon#read 3, iclass 11, count 2 2006.232.07:41:58.72#ibcon#about to read 4, iclass 11, count 2 2006.232.07:41:58.72#ibcon#read 4, iclass 11, count 2 2006.232.07:41:58.72#ibcon#about to read 5, iclass 11, count 2 2006.232.07:41:58.72#ibcon#read 5, iclass 11, count 2 2006.232.07:41:58.72#ibcon#about to read 6, iclass 11, count 2 2006.232.07:41:58.72#ibcon#read 6, iclass 11, count 2 2006.232.07:41:58.72#ibcon#end of sib2, iclass 11, count 2 2006.232.07:41:58.72#ibcon#*mode == 0, iclass 11, count 2 2006.232.07:41:58.72#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.232.07:41:58.72#ibcon#[25=AT03-08\r\n] 2006.232.07:41:58.72#ibcon#*before write, iclass 11, count 2 2006.232.07:41:58.72#ibcon#enter sib2, iclass 11, count 2 2006.232.07:41:58.72#ibcon#flushed, iclass 11, count 2 2006.232.07:41:58.72#ibcon#about to write, iclass 11, count 2 2006.232.07:41:58.72#ibcon#wrote, iclass 11, count 2 2006.232.07:41:58.72#ibcon#about to read 3, iclass 11, count 2 2006.232.07:41:58.75#ibcon#read 3, iclass 11, count 2 2006.232.07:41:58.75#ibcon#about to read 4, iclass 11, count 2 2006.232.07:41:58.75#ibcon#read 4, iclass 11, count 2 2006.232.07:41:58.75#ibcon#about to read 5, iclass 11, count 2 2006.232.07:41:58.75#ibcon#read 5, iclass 11, count 2 2006.232.07:41:58.75#ibcon#about to read 6, iclass 11, count 2 2006.232.07:41:58.75#ibcon#read 6, iclass 11, count 2 2006.232.07:41:58.75#ibcon#end of sib2, iclass 11, count 2 2006.232.07:41:58.75#ibcon#*after write, iclass 11, count 2 2006.232.07:41:58.75#ibcon#*before return 0, iclass 11, count 2 2006.232.07:41:58.75#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.232.07:41:58.75#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.232.07:41:58.75#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.232.07:41:58.75#ibcon#ireg 7 cls_cnt 0 2006.232.07:41:58.75#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.232.07:41:58.87#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.232.07:41:58.87#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.232.07:41:58.87#ibcon#enter wrdev, iclass 11, count 0 2006.232.07:41:58.87#ibcon#first serial, iclass 11, count 0 2006.232.07:41:58.87#ibcon#enter sib2, iclass 11, count 0 2006.232.07:41:58.87#ibcon#flushed, iclass 11, count 0 2006.232.07:41:58.87#ibcon#about to write, iclass 11, count 0 2006.232.07:41:58.87#ibcon#wrote, iclass 11, count 0 2006.232.07:41:58.87#ibcon#about to read 3, iclass 11, count 0 2006.232.07:41:58.89#ibcon#read 3, iclass 11, count 0 2006.232.07:41:58.89#ibcon#about to read 4, iclass 11, count 0 2006.232.07:41:58.89#ibcon#read 4, iclass 11, count 0 2006.232.07:41:58.89#ibcon#about to read 5, iclass 11, count 0 2006.232.07:41:58.89#ibcon#read 5, iclass 11, count 0 2006.232.07:41:58.89#ibcon#about to read 6, iclass 11, count 0 2006.232.07:41:58.89#ibcon#read 6, iclass 11, count 0 2006.232.07:41:58.89#ibcon#end of sib2, iclass 11, count 0 2006.232.07:41:58.89#ibcon#*mode == 0, iclass 11, count 0 2006.232.07:41:58.89#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.232.07:41:58.89#ibcon#[25=USB\r\n] 2006.232.07:41:58.89#ibcon#*before write, iclass 11, count 0 2006.232.07:41:58.89#ibcon#enter sib2, iclass 11, count 0 2006.232.07:41:58.89#ibcon#flushed, iclass 11, count 0 2006.232.07:41:58.89#ibcon#about to write, iclass 11, count 0 2006.232.07:41:58.89#ibcon#wrote, iclass 11, count 0 2006.232.07:41:58.89#ibcon#about to read 3, iclass 11, count 0 2006.232.07:41:58.92#ibcon#read 3, iclass 11, count 0 2006.232.07:41:58.92#ibcon#about to read 4, iclass 11, count 0 2006.232.07:41:58.92#ibcon#read 4, iclass 11, count 0 2006.232.07:41:58.92#ibcon#about to read 5, iclass 11, count 0 2006.232.07:41:58.92#ibcon#read 5, iclass 11, count 0 2006.232.07:41:58.92#ibcon#about to read 6, iclass 11, count 0 2006.232.07:41:58.92#ibcon#read 6, iclass 11, count 0 2006.232.07:41:58.92#ibcon#end of sib2, iclass 11, count 0 2006.232.07:41:58.92#ibcon#*after write, iclass 11, count 0 2006.232.07:41:58.92#ibcon#*before return 0, iclass 11, count 0 2006.232.07:41:58.92#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.232.07:41:58.92#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.232.07:41:58.92#ibcon#about to clear, iclass 11 cls_cnt 0 2006.232.07:41:58.92#ibcon#cleared, iclass 11 cls_cnt 0 2006.232.07:41:58.92$vc4f8/valo=4,832.99 2006.232.07:41:58.92#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.232.07:41:58.92#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.232.07:41:58.92#ibcon#ireg 17 cls_cnt 0 2006.232.07:41:58.92#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.232.07:41:58.92#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.232.07:41:58.92#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.232.07:41:58.92#ibcon#enter wrdev, iclass 13, count 0 2006.232.07:41:58.92#ibcon#first serial, iclass 13, count 0 2006.232.07:41:58.92#ibcon#enter sib2, iclass 13, count 0 2006.232.07:41:58.92#ibcon#flushed, iclass 13, count 0 2006.232.07:41:58.92#ibcon#about to write, iclass 13, count 0 2006.232.07:41:58.92#ibcon#wrote, iclass 13, count 0 2006.232.07:41:58.92#ibcon#about to read 3, iclass 13, count 0 2006.232.07:41:58.94#ibcon#read 3, iclass 13, count 0 2006.232.07:41:58.94#ibcon#about to read 4, iclass 13, count 0 2006.232.07:41:58.94#ibcon#read 4, iclass 13, count 0 2006.232.07:41:58.94#ibcon#about to read 5, iclass 13, count 0 2006.232.07:41:58.94#ibcon#read 5, iclass 13, count 0 2006.232.07:41:58.94#ibcon#about to read 6, iclass 13, count 0 2006.232.07:41:58.94#ibcon#read 6, iclass 13, count 0 2006.232.07:41:58.94#ibcon#end of sib2, iclass 13, count 0 2006.232.07:41:58.94#ibcon#*mode == 0, iclass 13, count 0 2006.232.07:41:58.94#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.232.07:41:58.94#ibcon#[26=FRQ=04,832.99\r\n] 2006.232.07:41:58.94#ibcon#*before write, iclass 13, count 0 2006.232.07:41:58.94#ibcon#enter sib2, iclass 13, count 0 2006.232.07:41:58.94#ibcon#flushed, iclass 13, count 0 2006.232.07:41:58.94#ibcon#about to write, iclass 13, count 0 2006.232.07:41:58.94#ibcon#wrote, iclass 13, count 0 2006.232.07:41:58.94#ibcon#about to read 3, iclass 13, count 0 2006.232.07:41:58.98#ibcon#read 3, iclass 13, count 0 2006.232.07:41:58.98#ibcon#about to read 4, iclass 13, count 0 2006.232.07:41:58.98#ibcon#read 4, iclass 13, count 0 2006.232.07:41:58.98#ibcon#about to read 5, iclass 13, count 0 2006.232.07:41:58.98#ibcon#read 5, iclass 13, count 0 2006.232.07:41:58.98#ibcon#about to read 6, iclass 13, count 0 2006.232.07:41:58.98#ibcon#read 6, iclass 13, count 0 2006.232.07:41:58.98#ibcon#end of sib2, iclass 13, count 0 2006.232.07:41:58.98#ibcon#*after write, iclass 13, count 0 2006.232.07:41:58.98#ibcon#*before return 0, iclass 13, count 0 2006.232.07:41:58.98#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.232.07:41:58.98#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.232.07:41:58.98#ibcon#about to clear, iclass 13 cls_cnt 0 2006.232.07:41:58.98#ibcon#cleared, iclass 13 cls_cnt 0 2006.232.07:41:58.98$vc4f8/va=4,7 2006.232.07:41:58.98#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.232.07:41:58.98#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.232.07:41:58.98#ibcon#ireg 11 cls_cnt 2 2006.232.07:41:58.98#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.232.07:41:59.04#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.232.07:41:59.04#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.232.07:41:59.04#ibcon#enter wrdev, iclass 15, count 2 2006.232.07:41:59.04#ibcon#first serial, iclass 15, count 2 2006.232.07:41:59.04#ibcon#enter sib2, iclass 15, count 2 2006.232.07:41:59.04#ibcon#flushed, iclass 15, count 2 2006.232.07:41:59.04#ibcon#about to write, iclass 15, count 2 2006.232.07:41:59.04#ibcon#wrote, iclass 15, count 2 2006.232.07:41:59.04#ibcon#about to read 3, iclass 15, count 2 2006.232.07:41:59.06#ibcon#read 3, iclass 15, count 2 2006.232.07:41:59.06#ibcon#about to read 4, iclass 15, count 2 2006.232.07:41:59.06#ibcon#read 4, iclass 15, count 2 2006.232.07:41:59.06#ibcon#about to read 5, iclass 15, count 2 2006.232.07:41:59.06#ibcon#read 5, iclass 15, count 2 2006.232.07:41:59.06#ibcon#about to read 6, iclass 15, count 2 2006.232.07:41:59.06#ibcon#read 6, iclass 15, count 2 2006.232.07:41:59.06#ibcon#end of sib2, iclass 15, count 2 2006.232.07:41:59.06#ibcon#*mode == 0, iclass 15, count 2 2006.232.07:41:59.06#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.232.07:41:59.06#ibcon#[25=AT04-07\r\n] 2006.232.07:41:59.06#ibcon#*before write, iclass 15, count 2 2006.232.07:41:59.06#ibcon#enter sib2, iclass 15, count 2 2006.232.07:41:59.06#ibcon#flushed, iclass 15, count 2 2006.232.07:41:59.06#ibcon#about to write, iclass 15, count 2 2006.232.07:41:59.06#ibcon#wrote, iclass 15, count 2 2006.232.07:41:59.06#ibcon#about to read 3, iclass 15, count 2 2006.232.07:41:59.09#ibcon#read 3, iclass 15, count 2 2006.232.07:41:59.09#ibcon#about to read 4, iclass 15, count 2 2006.232.07:41:59.09#ibcon#read 4, iclass 15, count 2 2006.232.07:41:59.09#ibcon#about to read 5, iclass 15, count 2 2006.232.07:41:59.09#ibcon#read 5, iclass 15, count 2 2006.232.07:41:59.09#ibcon#about to read 6, iclass 15, count 2 2006.232.07:41:59.09#ibcon#read 6, iclass 15, count 2 2006.232.07:41:59.09#ibcon#end of sib2, iclass 15, count 2 2006.232.07:41:59.09#ibcon#*after write, iclass 15, count 2 2006.232.07:41:59.09#ibcon#*before return 0, iclass 15, count 2 2006.232.07:41:59.09#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.232.07:41:59.09#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.232.07:41:59.09#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.232.07:41:59.09#ibcon#ireg 7 cls_cnt 0 2006.232.07:41:59.09#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.232.07:41:59.21#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.232.07:41:59.21#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.232.07:41:59.21#ibcon#enter wrdev, iclass 15, count 0 2006.232.07:41:59.21#ibcon#first serial, iclass 15, count 0 2006.232.07:41:59.21#ibcon#enter sib2, iclass 15, count 0 2006.232.07:41:59.21#ibcon#flushed, iclass 15, count 0 2006.232.07:41:59.21#ibcon#about to write, iclass 15, count 0 2006.232.07:41:59.21#ibcon#wrote, iclass 15, count 0 2006.232.07:41:59.21#ibcon#about to read 3, iclass 15, count 0 2006.232.07:41:59.23#ibcon#read 3, iclass 15, count 0 2006.232.07:41:59.23#ibcon#about to read 4, iclass 15, count 0 2006.232.07:41:59.23#ibcon#read 4, iclass 15, count 0 2006.232.07:41:59.23#ibcon#about to read 5, iclass 15, count 0 2006.232.07:41:59.23#ibcon#read 5, iclass 15, count 0 2006.232.07:41:59.23#ibcon#about to read 6, iclass 15, count 0 2006.232.07:41:59.23#ibcon#read 6, iclass 15, count 0 2006.232.07:41:59.23#ibcon#end of sib2, iclass 15, count 0 2006.232.07:41:59.23#ibcon#*mode == 0, iclass 15, count 0 2006.232.07:41:59.23#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.232.07:41:59.23#ibcon#[25=USB\r\n] 2006.232.07:41:59.23#ibcon#*before write, iclass 15, count 0 2006.232.07:41:59.23#ibcon#enter sib2, iclass 15, count 0 2006.232.07:41:59.23#ibcon#flushed, iclass 15, count 0 2006.232.07:41:59.23#ibcon#about to write, iclass 15, count 0 2006.232.07:41:59.23#ibcon#wrote, iclass 15, count 0 2006.232.07:41:59.23#ibcon#about to read 3, iclass 15, count 0 2006.232.07:41:59.26#ibcon#read 3, iclass 15, count 0 2006.232.07:41:59.26#ibcon#about to read 4, iclass 15, count 0 2006.232.07:41:59.26#ibcon#read 4, iclass 15, count 0 2006.232.07:41:59.26#ibcon#about to read 5, iclass 15, count 0 2006.232.07:41:59.26#ibcon#read 5, iclass 15, count 0 2006.232.07:41:59.26#ibcon#about to read 6, iclass 15, count 0 2006.232.07:41:59.26#ibcon#read 6, iclass 15, count 0 2006.232.07:41:59.26#ibcon#end of sib2, iclass 15, count 0 2006.232.07:41:59.26#ibcon#*after write, iclass 15, count 0 2006.232.07:41:59.26#ibcon#*before return 0, iclass 15, count 0 2006.232.07:41:59.26#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.232.07:41:59.26#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.232.07:41:59.26#ibcon#about to clear, iclass 15 cls_cnt 0 2006.232.07:41:59.26#ibcon#cleared, iclass 15 cls_cnt 0 2006.232.07:41:59.26$vc4f8/valo=5,652.99 2006.232.07:41:59.26#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.232.07:41:59.26#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.232.07:41:59.26#ibcon#ireg 17 cls_cnt 0 2006.232.07:41:59.26#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.232.07:41:59.26#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.232.07:41:59.26#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.232.07:41:59.26#ibcon#enter wrdev, iclass 17, count 0 2006.232.07:41:59.26#ibcon#first serial, iclass 17, count 0 2006.232.07:41:59.26#ibcon#enter sib2, iclass 17, count 0 2006.232.07:41:59.26#ibcon#flushed, iclass 17, count 0 2006.232.07:41:59.26#ibcon#about to write, iclass 17, count 0 2006.232.07:41:59.26#ibcon#wrote, iclass 17, count 0 2006.232.07:41:59.26#ibcon#about to read 3, iclass 17, count 0 2006.232.07:41:59.28#ibcon#read 3, iclass 17, count 0 2006.232.07:41:59.28#ibcon#about to read 4, iclass 17, count 0 2006.232.07:41:59.28#ibcon#read 4, iclass 17, count 0 2006.232.07:41:59.28#ibcon#about to read 5, iclass 17, count 0 2006.232.07:41:59.28#ibcon#read 5, iclass 17, count 0 2006.232.07:41:59.28#ibcon#about to read 6, iclass 17, count 0 2006.232.07:41:59.28#ibcon#read 6, iclass 17, count 0 2006.232.07:41:59.28#ibcon#end of sib2, iclass 17, count 0 2006.232.07:41:59.28#ibcon#*mode == 0, iclass 17, count 0 2006.232.07:41:59.28#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.232.07:41:59.28#ibcon#[26=FRQ=05,652.99\r\n] 2006.232.07:41:59.28#ibcon#*before write, iclass 17, count 0 2006.232.07:41:59.28#ibcon#enter sib2, iclass 17, count 0 2006.232.07:41:59.28#ibcon#flushed, iclass 17, count 0 2006.232.07:41:59.28#ibcon#about to write, iclass 17, count 0 2006.232.07:41:59.28#ibcon#wrote, iclass 17, count 0 2006.232.07:41:59.28#ibcon#about to read 3, iclass 17, count 0 2006.232.07:41:59.32#ibcon#read 3, iclass 17, count 0 2006.232.07:41:59.32#ibcon#about to read 4, iclass 17, count 0 2006.232.07:41:59.32#ibcon#read 4, iclass 17, count 0 2006.232.07:41:59.32#ibcon#about to read 5, iclass 17, count 0 2006.232.07:41:59.32#ibcon#read 5, iclass 17, count 0 2006.232.07:41:59.32#ibcon#about to read 6, iclass 17, count 0 2006.232.07:41:59.32#ibcon#read 6, iclass 17, count 0 2006.232.07:41:59.32#ibcon#end of sib2, iclass 17, count 0 2006.232.07:41:59.32#ibcon#*after write, iclass 17, count 0 2006.232.07:41:59.32#ibcon#*before return 0, iclass 17, count 0 2006.232.07:41:59.32#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.232.07:41:59.32#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.232.07:41:59.32#ibcon#about to clear, iclass 17 cls_cnt 0 2006.232.07:41:59.32#ibcon#cleared, iclass 17 cls_cnt 0 2006.232.07:41:59.32$vc4f8/va=5,7 2006.232.07:41:59.32#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.232.07:41:59.32#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.232.07:41:59.32#ibcon#ireg 11 cls_cnt 2 2006.232.07:41:59.32#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.232.07:41:59.38#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.232.07:41:59.38#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.232.07:41:59.38#ibcon#enter wrdev, iclass 19, count 2 2006.232.07:41:59.38#ibcon#first serial, iclass 19, count 2 2006.232.07:41:59.38#ibcon#enter sib2, iclass 19, count 2 2006.232.07:41:59.38#ibcon#flushed, iclass 19, count 2 2006.232.07:41:59.38#ibcon#about to write, iclass 19, count 2 2006.232.07:41:59.38#ibcon#wrote, iclass 19, count 2 2006.232.07:41:59.38#ibcon#about to read 3, iclass 19, count 2 2006.232.07:41:59.40#ibcon#read 3, iclass 19, count 2 2006.232.07:41:59.40#ibcon#about to read 4, iclass 19, count 2 2006.232.07:41:59.40#ibcon#read 4, iclass 19, count 2 2006.232.07:41:59.40#ibcon#about to read 5, iclass 19, count 2 2006.232.07:41:59.40#ibcon#read 5, iclass 19, count 2 2006.232.07:41:59.40#ibcon#about to read 6, iclass 19, count 2 2006.232.07:41:59.40#ibcon#read 6, iclass 19, count 2 2006.232.07:41:59.40#ibcon#end of sib2, iclass 19, count 2 2006.232.07:41:59.40#ibcon#*mode == 0, iclass 19, count 2 2006.232.07:41:59.40#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.232.07:41:59.40#ibcon#[25=AT05-07\r\n] 2006.232.07:41:59.40#ibcon#*before write, iclass 19, count 2 2006.232.07:41:59.40#ibcon#enter sib2, iclass 19, count 2 2006.232.07:41:59.40#ibcon#flushed, iclass 19, count 2 2006.232.07:41:59.40#ibcon#about to write, iclass 19, count 2 2006.232.07:41:59.40#ibcon#wrote, iclass 19, count 2 2006.232.07:41:59.40#ibcon#about to read 3, iclass 19, count 2 2006.232.07:41:59.43#ibcon#read 3, iclass 19, count 2 2006.232.07:41:59.43#ibcon#about to read 4, iclass 19, count 2 2006.232.07:41:59.43#ibcon#read 4, iclass 19, count 2 2006.232.07:41:59.43#ibcon#about to read 5, iclass 19, count 2 2006.232.07:41:59.43#ibcon#read 5, iclass 19, count 2 2006.232.07:41:59.43#ibcon#about to read 6, iclass 19, count 2 2006.232.07:41:59.43#ibcon#read 6, iclass 19, count 2 2006.232.07:41:59.43#ibcon#end of sib2, iclass 19, count 2 2006.232.07:41:59.43#ibcon#*after write, iclass 19, count 2 2006.232.07:41:59.43#ibcon#*before return 0, iclass 19, count 2 2006.232.07:41:59.43#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.232.07:41:59.43#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.232.07:41:59.43#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.232.07:41:59.43#ibcon#ireg 7 cls_cnt 0 2006.232.07:41:59.43#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.232.07:41:59.55#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.232.07:41:59.55#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.232.07:41:59.55#ibcon#enter wrdev, iclass 19, count 0 2006.232.07:41:59.55#ibcon#first serial, iclass 19, count 0 2006.232.07:41:59.55#ibcon#enter sib2, iclass 19, count 0 2006.232.07:41:59.55#ibcon#flushed, iclass 19, count 0 2006.232.07:41:59.55#ibcon#about to write, iclass 19, count 0 2006.232.07:41:59.55#ibcon#wrote, iclass 19, count 0 2006.232.07:41:59.55#ibcon#about to read 3, iclass 19, count 0 2006.232.07:41:59.58#ibcon#read 3, iclass 19, count 0 2006.232.07:41:59.58#ibcon#about to read 4, iclass 19, count 0 2006.232.07:41:59.58#ibcon#read 4, iclass 19, count 0 2006.232.07:41:59.58#ibcon#about to read 5, iclass 19, count 0 2006.232.07:41:59.58#ibcon#read 5, iclass 19, count 0 2006.232.07:41:59.58#ibcon#about to read 6, iclass 19, count 0 2006.232.07:41:59.58#ibcon#read 6, iclass 19, count 0 2006.232.07:41:59.58#ibcon#end of sib2, iclass 19, count 0 2006.232.07:41:59.58#ibcon#*mode == 0, iclass 19, count 0 2006.232.07:41:59.58#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.232.07:41:59.58#ibcon#[25=USB\r\n] 2006.232.07:41:59.58#ibcon#*before write, iclass 19, count 0 2006.232.07:41:59.58#ibcon#enter sib2, iclass 19, count 0 2006.232.07:41:59.58#ibcon#flushed, iclass 19, count 0 2006.232.07:41:59.58#ibcon#about to write, iclass 19, count 0 2006.232.07:41:59.58#ibcon#wrote, iclass 19, count 0 2006.232.07:41:59.58#ibcon#about to read 3, iclass 19, count 0 2006.232.07:41:59.60#ibcon#read 3, iclass 19, count 0 2006.232.07:41:59.60#ibcon#about to read 4, iclass 19, count 0 2006.232.07:41:59.60#ibcon#read 4, iclass 19, count 0 2006.232.07:41:59.60#ibcon#about to read 5, iclass 19, count 0 2006.232.07:41:59.60#ibcon#read 5, iclass 19, count 0 2006.232.07:41:59.60#ibcon#about to read 6, iclass 19, count 0 2006.232.07:41:59.60#ibcon#read 6, iclass 19, count 0 2006.232.07:41:59.60#ibcon#end of sib2, iclass 19, count 0 2006.232.07:41:59.60#ibcon#*after write, iclass 19, count 0 2006.232.07:41:59.60#ibcon#*before return 0, iclass 19, count 0 2006.232.07:41:59.60#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.232.07:41:59.60#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.232.07:41:59.60#ibcon#about to clear, iclass 19 cls_cnt 0 2006.232.07:41:59.60#ibcon#cleared, iclass 19 cls_cnt 0 2006.232.07:41:59.60$vc4f8/valo=6,772.99 2006.232.07:41:59.60#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.232.07:41:59.60#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.232.07:41:59.60#ibcon#ireg 17 cls_cnt 0 2006.232.07:41:59.60#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.232.07:41:59.60#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.232.07:41:59.60#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.232.07:41:59.60#ibcon#enter wrdev, iclass 21, count 0 2006.232.07:41:59.60#ibcon#first serial, iclass 21, count 0 2006.232.07:41:59.60#ibcon#enter sib2, iclass 21, count 0 2006.232.07:41:59.60#ibcon#flushed, iclass 21, count 0 2006.232.07:41:59.60#ibcon#about to write, iclass 21, count 0 2006.232.07:41:59.60#ibcon#wrote, iclass 21, count 0 2006.232.07:41:59.60#ibcon#about to read 3, iclass 21, count 0 2006.232.07:41:59.62#ibcon#read 3, iclass 21, count 0 2006.232.07:41:59.62#ibcon#about to read 4, iclass 21, count 0 2006.232.07:41:59.62#ibcon#read 4, iclass 21, count 0 2006.232.07:41:59.62#ibcon#about to read 5, iclass 21, count 0 2006.232.07:41:59.62#ibcon#read 5, iclass 21, count 0 2006.232.07:41:59.62#ibcon#about to read 6, iclass 21, count 0 2006.232.07:41:59.62#ibcon#read 6, iclass 21, count 0 2006.232.07:41:59.62#ibcon#end of sib2, iclass 21, count 0 2006.232.07:41:59.62#ibcon#*mode == 0, iclass 21, count 0 2006.232.07:41:59.62#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.232.07:41:59.62#ibcon#[26=FRQ=06,772.99\r\n] 2006.232.07:41:59.62#ibcon#*before write, iclass 21, count 0 2006.232.07:41:59.62#ibcon#enter sib2, iclass 21, count 0 2006.232.07:41:59.62#ibcon#flushed, iclass 21, count 0 2006.232.07:41:59.62#ibcon#about to write, iclass 21, count 0 2006.232.07:41:59.62#ibcon#wrote, iclass 21, count 0 2006.232.07:41:59.62#ibcon#about to read 3, iclass 21, count 0 2006.232.07:41:59.66#ibcon#read 3, iclass 21, count 0 2006.232.07:41:59.66#ibcon#about to read 4, iclass 21, count 0 2006.232.07:41:59.66#ibcon#read 4, iclass 21, count 0 2006.232.07:41:59.66#ibcon#about to read 5, iclass 21, count 0 2006.232.07:41:59.66#ibcon#read 5, iclass 21, count 0 2006.232.07:41:59.66#ibcon#about to read 6, iclass 21, count 0 2006.232.07:41:59.66#ibcon#read 6, iclass 21, count 0 2006.232.07:41:59.66#ibcon#end of sib2, iclass 21, count 0 2006.232.07:41:59.66#ibcon#*after write, iclass 21, count 0 2006.232.07:41:59.66#ibcon#*before return 0, iclass 21, count 0 2006.232.07:41:59.66#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.232.07:41:59.66#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.232.07:41:59.66#ibcon#about to clear, iclass 21 cls_cnt 0 2006.232.07:41:59.66#ibcon#cleared, iclass 21 cls_cnt 0 2006.232.07:41:59.66$vc4f8/va=6,6 2006.232.07:41:59.66#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.232.07:41:59.66#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.232.07:41:59.66#ibcon#ireg 11 cls_cnt 2 2006.232.07:41:59.66#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.232.07:41:59.72#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.232.07:41:59.72#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.232.07:41:59.72#ibcon#enter wrdev, iclass 23, count 2 2006.232.07:41:59.72#ibcon#first serial, iclass 23, count 2 2006.232.07:41:59.72#ibcon#enter sib2, iclass 23, count 2 2006.232.07:41:59.72#ibcon#flushed, iclass 23, count 2 2006.232.07:41:59.72#ibcon#about to write, iclass 23, count 2 2006.232.07:41:59.72#ibcon#wrote, iclass 23, count 2 2006.232.07:41:59.72#ibcon#about to read 3, iclass 23, count 2 2006.232.07:41:59.74#ibcon#read 3, iclass 23, count 2 2006.232.07:41:59.74#ibcon#about to read 4, iclass 23, count 2 2006.232.07:41:59.74#ibcon#read 4, iclass 23, count 2 2006.232.07:41:59.74#ibcon#about to read 5, iclass 23, count 2 2006.232.07:41:59.74#ibcon#read 5, iclass 23, count 2 2006.232.07:41:59.74#ibcon#about to read 6, iclass 23, count 2 2006.232.07:41:59.74#ibcon#read 6, iclass 23, count 2 2006.232.07:41:59.74#ibcon#end of sib2, iclass 23, count 2 2006.232.07:41:59.74#ibcon#*mode == 0, iclass 23, count 2 2006.232.07:41:59.74#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.232.07:41:59.74#ibcon#[25=AT06-06\r\n] 2006.232.07:41:59.74#ibcon#*before write, iclass 23, count 2 2006.232.07:41:59.74#ibcon#enter sib2, iclass 23, count 2 2006.232.07:41:59.74#ibcon#flushed, iclass 23, count 2 2006.232.07:41:59.74#ibcon#about to write, iclass 23, count 2 2006.232.07:41:59.74#ibcon#wrote, iclass 23, count 2 2006.232.07:41:59.74#ibcon#about to read 3, iclass 23, count 2 2006.232.07:41:59.77#ibcon#read 3, iclass 23, count 2 2006.232.07:41:59.77#ibcon#about to read 4, iclass 23, count 2 2006.232.07:41:59.77#ibcon#read 4, iclass 23, count 2 2006.232.07:41:59.77#ibcon#about to read 5, iclass 23, count 2 2006.232.07:41:59.77#ibcon#read 5, iclass 23, count 2 2006.232.07:41:59.77#ibcon#about to read 6, iclass 23, count 2 2006.232.07:41:59.77#ibcon#read 6, iclass 23, count 2 2006.232.07:41:59.77#ibcon#end of sib2, iclass 23, count 2 2006.232.07:41:59.77#ibcon#*after write, iclass 23, count 2 2006.232.07:41:59.77#ibcon#*before return 0, iclass 23, count 2 2006.232.07:41:59.77#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.232.07:41:59.77#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.232.07:41:59.77#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.232.07:41:59.77#ibcon#ireg 7 cls_cnt 0 2006.232.07:41:59.77#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.232.07:41:59.89#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.232.07:41:59.89#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.232.07:41:59.89#ibcon#enter wrdev, iclass 23, count 0 2006.232.07:41:59.89#ibcon#first serial, iclass 23, count 0 2006.232.07:41:59.89#ibcon#enter sib2, iclass 23, count 0 2006.232.07:41:59.89#ibcon#flushed, iclass 23, count 0 2006.232.07:41:59.89#ibcon#about to write, iclass 23, count 0 2006.232.07:41:59.89#ibcon#wrote, iclass 23, count 0 2006.232.07:41:59.89#ibcon#about to read 3, iclass 23, count 0 2006.232.07:41:59.91#ibcon#read 3, iclass 23, count 0 2006.232.07:41:59.91#ibcon#about to read 4, iclass 23, count 0 2006.232.07:41:59.91#ibcon#read 4, iclass 23, count 0 2006.232.07:41:59.91#ibcon#about to read 5, iclass 23, count 0 2006.232.07:41:59.91#ibcon#read 5, iclass 23, count 0 2006.232.07:41:59.91#ibcon#about to read 6, iclass 23, count 0 2006.232.07:41:59.91#ibcon#read 6, iclass 23, count 0 2006.232.07:41:59.91#ibcon#end of sib2, iclass 23, count 0 2006.232.07:41:59.91#ibcon#*mode == 0, iclass 23, count 0 2006.232.07:41:59.91#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.232.07:41:59.91#ibcon#[25=USB\r\n] 2006.232.07:41:59.91#ibcon#*before write, iclass 23, count 0 2006.232.07:41:59.91#ibcon#enter sib2, iclass 23, count 0 2006.232.07:41:59.91#ibcon#flushed, iclass 23, count 0 2006.232.07:41:59.91#ibcon#about to write, iclass 23, count 0 2006.232.07:41:59.91#ibcon#wrote, iclass 23, count 0 2006.232.07:41:59.91#ibcon#about to read 3, iclass 23, count 0 2006.232.07:41:59.94#ibcon#read 3, iclass 23, count 0 2006.232.07:41:59.94#ibcon#about to read 4, iclass 23, count 0 2006.232.07:41:59.94#ibcon#read 4, iclass 23, count 0 2006.232.07:41:59.94#ibcon#about to read 5, iclass 23, count 0 2006.232.07:41:59.94#ibcon#read 5, iclass 23, count 0 2006.232.07:41:59.94#ibcon#about to read 6, iclass 23, count 0 2006.232.07:41:59.94#ibcon#read 6, iclass 23, count 0 2006.232.07:41:59.94#ibcon#end of sib2, iclass 23, count 0 2006.232.07:41:59.94#ibcon#*after write, iclass 23, count 0 2006.232.07:41:59.94#ibcon#*before return 0, iclass 23, count 0 2006.232.07:41:59.94#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.232.07:41:59.94#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.232.07:41:59.94#ibcon#about to clear, iclass 23 cls_cnt 0 2006.232.07:41:59.94#ibcon#cleared, iclass 23 cls_cnt 0 2006.232.07:41:59.94$vc4f8/valo=7,832.99 2006.232.07:41:59.94#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.232.07:41:59.94#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.232.07:41:59.94#ibcon#ireg 17 cls_cnt 0 2006.232.07:41:59.94#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.232.07:41:59.94#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.232.07:41:59.94#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.232.07:41:59.94#ibcon#enter wrdev, iclass 25, count 0 2006.232.07:41:59.94#ibcon#first serial, iclass 25, count 0 2006.232.07:41:59.94#ibcon#enter sib2, iclass 25, count 0 2006.232.07:41:59.94#ibcon#flushed, iclass 25, count 0 2006.232.07:41:59.94#ibcon#about to write, iclass 25, count 0 2006.232.07:41:59.94#ibcon#wrote, iclass 25, count 0 2006.232.07:41:59.94#ibcon#about to read 3, iclass 25, count 0 2006.232.07:41:59.96#ibcon#read 3, iclass 25, count 0 2006.232.07:41:59.96#ibcon#about to read 4, iclass 25, count 0 2006.232.07:41:59.96#ibcon#read 4, iclass 25, count 0 2006.232.07:41:59.96#ibcon#about to read 5, iclass 25, count 0 2006.232.07:41:59.96#ibcon#read 5, iclass 25, count 0 2006.232.07:41:59.96#ibcon#about to read 6, iclass 25, count 0 2006.232.07:41:59.96#ibcon#read 6, iclass 25, count 0 2006.232.07:41:59.96#ibcon#end of sib2, iclass 25, count 0 2006.232.07:41:59.96#ibcon#*mode == 0, iclass 25, count 0 2006.232.07:41:59.96#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.232.07:41:59.96#ibcon#[26=FRQ=07,832.99\r\n] 2006.232.07:41:59.96#ibcon#*before write, iclass 25, count 0 2006.232.07:41:59.96#ibcon#enter sib2, iclass 25, count 0 2006.232.07:41:59.96#ibcon#flushed, iclass 25, count 0 2006.232.07:41:59.96#ibcon#about to write, iclass 25, count 0 2006.232.07:41:59.96#ibcon#wrote, iclass 25, count 0 2006.232.07:41:59.96#ibcon#about to read 3, iclass 25, count 0 2006.232.07:42:00.00#ibcon#read 3, iclass 25, count 0 2006.232.07:42:00.00#ibcon#about to read 4, iclass 25, count 0 2006.232.07:42:00.00#ibcon#read 4, iclass 25, count 0 2006.232.07:42:00.00#ibcon#about to read 5, iclass 25, count 0 2006.232.07:42:00.00#ibcon#read 5, iclass 25, count 0 2006.232.07:42:00.00#ibcon#about to read 6, iclass 25, count 0 2006.232.07:42:00.00#ibcon#read 6, iclass 25, count 0 2006.232.07:42:00.00#ibcon#end of sib2, iclass 25, count 0 2006.232.07:42:00.00#ibcon#*after write, iclass 25, count 0 2006.232.07:42:00.00#ibcon#*before return 0, iclass 25, count 0 2006.232.07:42:00.00#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.232.07:42:00.00#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.232.07:42:00.00#ibcon#about to clear, iclass 25 cls_cnt 0 2006.232.07:42:00.00#ibcon#cleared, iclass 25 cls_cnt 0 2006.232.07:42:00.00$vc4f8/va=7,6 2006.232.07:42:00.00#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.232.07:42:00.00#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.232.07:42:00.00#ibcon#ireg 11 cls_cnt 2 2006.232.07:42:00.00#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.232.07:42:00.06#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.232.07:42:00.06#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.232.07:42:00.06#ibcon#enter wrdev, iclass 27, count 2 2006.232.07:42:00.06#ibcon#first serial, iclass 27, count 2 2006.232.07:42:00.06#ibcon#enter sib2, iclass 27, count 2 2006.232.07:42:00.06#ibcon#flushed, iclass 27, count 2 2006.232.07:42:00.06#ibcon#about to write, iclass 27, count 2 2006.232.07:42:00.06#ibcon#wrote, iclass 27, count 2 2006.232.07:42:00.06#ibcon#about to read 3, iclass 27, count 2 2006.232.07:42:00.08#ibcon#read 3, iclass 27, count 2 2006.232.07:42:00.08#ibcon#about to read 4, iclass 27, count 2 2006.232.07:42:00.08#ibcon#read 4, iclass 27, count 2 2006.232.07:42:00.08#ibcon#about to read 5, iclass 27, count 2 2006.232.07:42:00.08#ibcon#read 5, iclass 27, count 2 2006.232.07:42:00.08#ibcon#about to read 6, iclass 27, count 2 2006.232.07:42:00.08#ibcon#read 6, iclass 27, count 2 2006.232.07:42:00.08#ibcon#end of sib2, iclass 27, count 2 2006.232.07:42:00.08#ibcon#*mode == 0, iclass 27, count 2 2006.232.07:42:00.08#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.232.07:42:00.08#ibcon#[25=AT07-06\r\n] 2006.232.07:42:00.08#ibcon#*before write, iclass 27, count 2 2006.232.07:42:00.08#ibcon#enter sib2, iclass 27, count 2 2006.232.07:42:00.08#ibcon#flushed, iclass 27, count 2 2006.232.07:42:00.08#ibcon#about to write, iclass 27, count 2 2006.232.07:42:00.08#ibcon#wrote, iclass 27, count 2 2006.232.07:42:00.08#ibcon#about to read 3, iclass 27, count 2 2006.232.07:42:00.11#ibcon#read 3, iclass 27, count 2 2006.232.07:42:00.11#ibcon#about to read 4, iclass 27, count 2 2006.232.07:42:00.11#ibcon#read 4, iclass 27, count 2 2006.232.07:42:00.11#ibcon#about to read 5, iclass 27, count 2 2006.232.07:42:00.11#ibcon#read 5, iclass 27, count 2 2006.232.07:42:00.11#ibcon#about to read 6, iclass 27, count 2 2006.232.07:42:00.11#ibcon#read 6, iclass 27, count 2 2006.232.07:42:00.11#ibcon#end of sib2, iclass 27, count 2 2006.232.07:42:00.11#ibcon#*after write, iclass 27, count 2 2006.232.07:42:00.11#ibcon#*before return 0, iclass 27, count 2 2006.232.07:42:00.11#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.232.07:42:00.11#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.232.07:42:00.11#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.232.07:42:00.11#ibcon#ireg 7 cls_cnt 0 2006.232.07:42:00.11#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.232.07:42:00.23#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.232.07:42:00.23#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.232.07:42:00.23#ibcon#enter wrdev, iclass 27, count 0 2006.232.07:42:00.23#ibcon#first serial, iclass 27, count 0 2006.232.07:42:00.23#ibcon#enter sib2, iclass 27, count 0 2006.232.07:42:00.23#ibcon#flushed, iclass 27, count 0 2006.232.07:42:00.23#ibcon#about to write, iclass 27, count 0 2006.232.07:42:00.23#ibcon#wrote, iclass 27, count 0 2006.232.07:42:00.23#ibcon#about to read 3, iclass 27, count 0 2006.232.07:42:00.25#ibcon#read 3, iclass 27, count 0 2006.232.07:42:00.25#ibcon#about to read 4, iclass 27, count 0 2006.232.07:42:00.25#ibcon#read 4, iclass 27, count 0 2006.232.07:42:00.25#ibcon#about to read 5, iclass 27, count 0 2006.232.07:42:00.25#ibcon#read 5, iclass 27, count 0 2006.232.07:42:00.25#ibcon#about to read 6, iclass 27, count 0 2006.232.07:42:00.25#ibcon#read 6, iclass 27, count 0 2006.232.07:42:00.25#ibcon#end of sib2, iclass 27, count 0 2006.232.07:42:00.25#ibcon#*mode == 0, iclass 27, count 0 2006.232.07:42:00.25#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.232.07:42:00.25#ibcon#[25=USB\r\n] 2006.232.07:42:00.25#ibcon#*before write, iclass 27, count 0 2006.232.07:42:00.25#ibcon#enter sib2, iclass 27, count 0 2006.232.07:42:00.25#ibcon#flushed, iclass 27, count 0 2006.232.07:42:00.25#ibcon#about to write, iclass 27, count 0 2006.232.07:42:00.25#ibcon#wrote, iclass 27, count 0 2006.232.07:42:00.25#ibcon#about to read 3, iclass 27, count 0 2006.232.07:42:00.28#ibcon#read 3, iclass 27, count 0 2006.232.07:42:00.28#ibcon#about to read 4, iclass 27, count 0 2006.232.07:42:00.28#ibcon#read 4, iclass 27, count 0 2006.232.07:42:00.28#ibcon#about to read 5, iclass 27, count 0 2006.232.07:42:00.28#ibcon#read 5, iclass 27, count 0 2006.232.07:42:00.28#ibcon#about to read 6, iclass 27, count 0 2006.232.07:42:00.28#ibcon#read 6, iclass 27, count 0 2006.232.07:42:00.28#ibcon#end of sib2, iclass 27, count 0 2006.232.07:42:00.28#ibcon#*after write, iclass 27, count 0 2006.232.07:42:00.28#ibcon#*before return 0, iclass 27, count 0 2006.232.07:42:00.28#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.232.07:42:00.28#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.232.07:42:00.28#ibcon#about to clear, iclass 27 cls_cnt 0 2006.232.07:42:00.28#ibcon#cleared, iclass 27 cls_cnt 0 2006.232.07:42:00.28$vc4f8/valo=8,852.99 2006.232.07:42:00.28#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.232.07:42:00.28#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.232.07:42:00.28#ibcon#ireg 17 cls_cnt 0 2006.232.07:42:00.28#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:42:00.28#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:42:00.28#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:42:00.28#ibcon#enter wrdev, iclass 29, count 0 2006.232.07:42:00.28#ibcon#first serial, iclass 29, count 0 2006.232.07:42:00.28#ibcon#enter sib2, iclass 29, count 0 2006.232.07:42:00.28#ibcon#flushed, iclass 29, count 0 2006.232.07:42:00.28#ibcon#about to write, iclass 29, count 0 2006.232.07:42:00.28#ibcon#wrote, iclass 29, count 0 2006.232.07:42:00.28#ibcon#about to read 3, iclass 29, count 0 2006.232.07:42:00.31#ibcon#read 3, iclass 29, count 0 2006.232.07:42:00.31#ibcon#about to read 4, iclass 29, count 0 2006.232.07:42:00.31#ibcon#read 4, iclass 29, count 0 2006.232.07:42:00.31#ibcon#about to read 5, iclass 29, count 0 2006.232.07:42:00.31#ibcon#read 5, iclass 29, count 0 2006.232.07:42:00.31#ibcon#about to read 6, iclass 29, count 0 2006.232.07:42:00.31#ibcon#read 6, iclass 29, count 0 2006.232.07:42:00.31#ibcon#end of sib2, iclass 29, count 0 2006.232.07:42:00.31#ibcon#*mode == 0, iclass 29, count 0 2006.232.07:42:00.31#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.232.07:42:00.31#ibcon#[26=FRQ=08,852.99\r\n] 2006.232.07:42:00.31#ibcon#*before write, iclass 29, count 0 2006.232.07:42:00.31#ibcon#enter sib2, iclass 29, count 0 2006.232.07:42:00.31#ibcon#flushed, iclass 29, count 0 2006.232.07:42:00.31#ibcon#about to write, iclass 29, count 0 2006.232.07:42:00.31#ibcon#wrote, iclass 29, count 0 2006.232.07:42:00.31#ibcon#about to read 3, iclass 29, count 0 2006.232.07:42:00.35#ibcon#read 3, iclass 29, count 0 2006.232.07:42:00.35#ibcon#about to read 4, iclass 29, count 0 2006.232.07:42:00.35#ibcon#read 4, iclass 29, count 0 2006.232.07:42:00.35#ibcon#about to read 5, iclass 29, count 0 2006.232.07:42:00.35#ibcon#read 5, iclass 29, count 0 2006.232.07:42:00.35#ibcon#about to read 6, iclass 29, count 0 2006.232.07:42:00.35#ibcon#read 6, iclass 29, count 0 2006.232.07:42:00.35#ibcon#end of sib2, iclass 29, count 0 2006.232.07:42:00.35#ibcon#*after write, iclass 29, count 0 2006.232.07:42:00.35#ibcon#*before return 0, iclass 29, count 0 2006.232.07:42:00.35#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:42:00.35#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:42:00.35#ibcon#about to clear, iclass 29 cls_cnt 0 2006.232.07:42:00.35#ibcon#cleared, iclass 29 cls_cnt 0 2006.232.07:42:00.35$vc4f8/va=8,6 2006.232.07:42:00.35#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.232.07:42:00.35#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.232.07:42:00.35#ibcon#ireg 11 cls_cnt 2 2006.232.07:42:00.35#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.232.07:42:00.40#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.232.07:42:00.40#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.232.07:42:00.40#ibcon#enter wrdev, iclass 31, count 2 2006.232.07:42:00.40#ibcon#first serial, iclass 31, count 2 2006.232.07:42:00.40#ibcon#enter sib2, iclass 31, count 2 2006.232.07:42:00.40#ibcon#flushed, iclass 31, count 2 2006.232.07:42:00.40#ibcon#about to write, iclass 31, count 2 2006.232.07:42:00.40#ibcon#wrote, iclass 31, count 2 2006.232.07:42:00.40#ibcon#about to read 3, iclass 31, count 2 2006.232.07:42:00.42#ibcon#read 3, iclass 31, count 2 2006.232.07:42:00.42#ibcon#about to read 4, iclass 31, count 2 2006.232.07:42:00.42#ibcon#read 4, iclass 31, count 2 2006.232.07:42:00.42#ibcon#about to read 5, iclass 31, count 2 2006.232.07:42:00.42#ibcon#read 5, iclass 31, count 2 2006.232.07:42:00.42#ibcon#about to read 6, iclass 31, count 2 2006.232.07:42:00.42#ibcon#read 6, iclass 31, count 2 2006.232.07:42:00.42#ibcon#end of sib2, iclass 31, count 2 2006.232.07:42:00.42#ibcon#*mode == 0, iclass 31, count 2 2006.232.07:42:00.42#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.232.07:42:00.42#ibcon#[25=AT08-06\r\n] 2006.232.07:42:00.42#ibcon#*before write, iclass 31, count 2 2006.232.07:42:00.42#ibcon#enter sib2, iclass 31, count 2 2006.232.07:42:00.42#ibcon#flushed, iclass 31, count 2 2006.232.07:42:00.42#ibcon#about to write, iclass 31, count 2 2006.232.07:42:00.42#ibcon#wrote, iclass 31, count 2 2006.232.07:42:00.42#ibcon#about to read 3, iclass 31, count 2 2006.232.07:42:00.45#ibcon#read 3, iclass 31, count 2 2006.232.07:42:00.45#ibcon#about to read 4, iclass 31, count 2 2006.232.07:42:00.45#ibcon#read 4, iclass 31, count 2 2006.232.07:42:00.45#ibcon#about to read 5, iclass 31, count 2 2006.232.07:42:00.45#ibcon#read 5, iclass 31, count 2 2006.232.07:42:00.45#ibcon#about to read 6, iclass 31, count 2 2006.232.07:42:00.45#ibcon#read 6, iclass 31, count 2 2006.232.07:42:00.45#ibcon#end of sib2, iclass 31, count 2 2006.232.07:42:00.45#ibcon#*after write, iclass 31, count 2 2006.232.07:42:00.45#ibcon#*before return 0, iclass 31, count 2 2006.232.07:42:00.45#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.232.07:42:00.45#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.232.07:42:00.45#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.232.07:42:00.45#ibcon#ireg 7 cls_cnt 0 2006.232.07:42:00.45#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.232.07:42:00.57#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.232.07:42:00.57#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.232.07:42:00.57#ibcon#enter wrdev, iclass 31, count 0 2006.232.07:42:00.57#ibcon#first serial, iclass 31, count 0 2006.232.07:42:00.57#ibcon#enter sib2, iclass 31, count 0 2006.232.07:42:00.57#ibcon#flushed, iclass 31, count 0 2006.232.07:42:00.57#ibcon#about to write, iclass 31, count 0 2006.232.07:42:00.57#ibcon#wrote, iclass 31, count 0 2006.232.07:42:00.57#ibcon#about to read 3, iclass 31, count 0 2006.232.07:42:00.59#ibcon#read 3, iclass 31, count 0 2006.232.07:42:00.59#ibcon#about to read 4, iclass 31, count 0 2006.232.07:42:00.59#ibcon#read 4, iclass 31, count 0 2006.232.07:42:00.59#ibcon#about to read 5, iclass 31, count 0 2006.232.07:42:00.59#ibcon#read 5, iclass 31, count 0 2006.232.07:42:00.59#ibcon#about to read 6, iclass 31, count 0 2006.232.07:42:00.59#ibcon#read 6, iclass 31, count 0 2006.232.07:42:00.59#ibcon#end of sib2, iclass 31, count 0 2006.232.07:42:00.59#ibcon#*mode == 0, iclass 31, count 0 2006.232.07:42:00.59#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.232.07:42:00.59#ibcon#[25=USB\r\n] 2006.232.07:42:00.59#ibcon#*before write, iclass 31, count 0 2006.232.07:42:00.59#ibcon#enter sib2, iclass 31, count 0 2006.232.07:42:00.59#ibcon#flushed, iclass 31, count 0 2006.232.07:42:00.59#ibcon#about to write, iclass 31, count 0 2006.232.07:42:00.59#ibcon#wrote, iclass 31, count 0 2006.232.07:42:00.59#ibcon#about to read 3, iclass 31, count 0 2006.232.07:42:00.62#ibcon#read 3, iclass 31, count 0 2006.232.07:42:00.62#ibcon#about to read 4, iclass 31, count 0 2006.232.07:42:00.62#ibcon#read 4, iclass 31, count 0 2006.232.07:42:00.62#ibcon#about to read 5, iclass 31, count 0 2006.232.07:42:00.62#ibcon#read 5, iclass 31, count 0 2006.232.07:42:00.62#ibcon#about to read 6, iclass 31, count 0 2006.232.07:42:00.62#ibcon#read 6, iclass 31, count 0 2006.232.07:42:00.62#ibcon#end of sib2, iclass 31, count 0 2006.232.07:42:00.62#ibcon#*after write, iclass 31, count 0 2006.232.07:42:00.62#ibcon#*before return 0, iclass 31, count 0 2006.232.07:42:00.62#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.232.07:42:00.62#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.232.07:42:00.62#ibcon#about to clear, iclass 31 cls_cnt 0 2006.232.07:42:00.62#ibcon#cleared, iclass 31 cls_cnt 0 2006.232.07:42:00.62$vc4f8/vblo=1,632.99 2006.232.07:42:00.62#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.232.07:42:00.62#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.232.07:42:00.62#ibcon#ireg 17 cls_cnt 0 2006.232.07:42:00.62#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.232.07:42:00.62#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.232.07:42:00.62#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.232.07:42:00.62#ibcon#enter wrdev, iclass 33, count 0 2006.232.07:42:00.62#ibcon#first serial, iclass 33, count 0 2006.232.07:42:00.62#ibcon#enter sib2, iclass 33, count 0 2006.232.07:42:00.62#ibcon#flushed, iclass 33, count 0 2006.232.07:42:00.62#ibcon#about to write, iclass 33, count 0 2006.232.07:42:00.62#ibcon#wrote, iclass 33, count 0 2006.232.07:42:00.62#ibcon#about to read 3, iclass 33, count 0 2006.232.07:42:00.64#ibcon#read 3, iclass 33, count 0 2006.232.07:42:00.64#ibcon#about to read 4, iclass 33, count 0 2006.232.07:42:00.64#ibcon#read 4, iclass 33, count 0 2006.232.07:42:00.64#ibcon#about to read 5, iclass 33, count 0 2006.232.07:42:00.64#ibcon#read 5, iclass 33, count 0 2006.232.07:42:00.64#ibcon#about to read 6, iclass 33, count 0 2006.232.07:42:00.64#ibcon#read 6, iclass 33, count 0 2006.232.07:42:00.64#ibcon#end of sib2, iclass 33, count 0 2006.232.07:42:00.64#ibcon#*mode == 0, iclass 33, count 0 2006.232.07:42:00.64#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.232.07:42:00.64#ibcon#[28=FRQ=01,632.99\r\n] 2006.232.07:42:00.64#ibcon#*before write, iclass 33, count 0 2006.232.07:42:00.64#ibcon#enter sib2, iclass 33, count 0 2006.232.07:42:00.64#ibcon#flushed, iclass 33, count 0 2006.232.07:42:00.64#ibcon#about to write, iclass 33, count 0 2006.232.07:42:00.64#ibcon#wrote, iclass 33, count 0 2006.232.07:42:00.64#ibcon#about to read 3, iclass 33, count 0 2006.232.07:42:00.68#ibcon#read 3, iclass 33, count 0 2006.232.07:42:00.68#ibcon#about to read 4, iclass 33, count 0 2006.232.07:42:00.68#ibcon#read 4, iclass 33, count 0 2006.232.07:42:00.68#ibcon#about to read 5, iclass 33, count 0 2006.232.07:42:00.68#ibcon#read 5, iclass 33, count 0 2006.232.07:42:00.68#ibcon#about to read 6, iclass 33, count 0 2006.232.07:42:00.68#ibcon#read 6, iclass 33, count 0 2006.232.07:42:00.68#ibcon#end of sib2, iclass 33, count 0 2006.232.07:42:00.68#ibcon#*after write, iclass 33, count 0 2006.232.07:42:00.68#ibcon#*before return 0, iclass 33, count 0 2006.232.07:42:00.68#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.232.07:42:00.68#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.232.07:42:00.68#ibcon#about to clear, iclass 33 cls_cnt 0 2006.232.07:42:00.68#ibcon#cleared, iclass 33 cls_cnt 0 2006.232.07:42:00.68$vc4f8/vb=1,4 2006.232.07:42:00.68#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.232.07:42:00.68#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.232.07:42:00.68#ibcon#ireg 11 cls_cnt 2 2006.232.07:42:00.68#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.232.07:42:00.68#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.232.07:42:00.68#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.232.07:42:00.68#ibcon#enter wrdev, iclass 35, count 2 2006.232.07:42:00.68#ibcon#first serial, iclass 35, count 2 2006.232.07:42:00.68#ibcon#enter sib2, iclass 35, count 2 2006.232.07:42:00.68#ibcon#flushed, iclass 35, count 2 2006.232.07:42:00.68#ibcon#about to write, iclass 35, count 2 2006.232.07:42:00.68#ibcon#wrote, iclass 35, count 2 2006.232.07:42:00.68#ibcon#about to read 3, iclass 35, count 2 2006.232.07:42:00.70#ibcon#read 3, iclass 35, count 2 2006.232.07:42:00.70#ibcon#about to read 4, iclass 35, count 2 2006.232.07:42:00.70#ibcon#read 4, iclass 35, count 2 2006.232.07:42:00.70#ibcon#about to read 5, iclass 35, count 2 2006.232.07:42:00.70#ibcon#read 5, iclass 35, count 2 2006.232.07:42:00.70#ibcon#about to read 6, iclass 35, count 2 2006.232.07:42:00.70#ibcon#read 6, iclass 35, count 2 2006.232.07:42:00.70#ibcon#end of sib2, iclass 35, count 2 2006.232.07:42:00.70#ibcon#*mode == 0, iclass 35, count 2 2006.232.07:42:00.70#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.232.07:42:00.70#ibcon#[27=AT01-04\r\n] 2006.232.07:42:00.70#ibcon#*before write, iclass 35, count 2 2006.232.07:42:00.70#ibcon#enter sib2, iclass 35, count 2 2006.232.07:42:00.70#ibcon#flushed, iclass 35, count 2 2006.232.07:42:00.70#ibcon#about to write, iclass 35, count 2 2006.232.07:42:00.70#ibcon#wrote, iclass 35, count 2 2006.232.07:42:00.70#ibcon#about to read 3, iclass 35, count 2 2006.232.07:42:00.73#ibcon#read 3, iclass 35, count 2 2006.232.07:42:00.73#ibcon#about to read 4, iclass 35, count 2 2006.232.07:42:00.73#ibcon#read 4, iclass 35, count 2 2006.232.07:42:00.73#ibcon#about to read 5, iclass 35, count 2 2006.232.07:42:00.73#ibcon#read 5, iclass 35, count 2 2006.232.07:42:00.73#ibcon#about to read 6, iclass 35, count 2 2006.232.07:42:00.73#ibcon#read 6, iclass 35, count 2 2006.232.07:42:00.73#ibcon#end of sib2, iclass 35, count 2 2006.232.07:42:00.73#ibcon#*after write, iclass 35, count 2 2006.232.07:42:00.73#ibcon#*before return 0, iclass 35, count 2 2006.232.07:42:00.73#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.232.07:42:00.73#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.232.07:42:00.73#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.232.07:42:00.73#ibcon#ireg 7 cls_cnt 0 2006.232.07:42:00.73#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.232.07:42:00.85#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.232.07:42:00.85#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.232.07:42:00.85#ibcon#enter wrdev, iclass 35, count 0 2006.232.07:42:00.85#ibcon#first serial, iclass 35, count 0 2006.232.07:42:00.85#ibcon#enter sib2, iclass 35, count 0 2006.232.07:42:00.85#ibcon#flushed, iclass 35, count 0 2006.232.07:42:00.85#ibcon#about to write, iclass 35, count 0 2006.232.07:42:00.85#ibcon#wrote, iclass 35, count 0 2006.232.07:42:00.85#ibcon#about to read 3, iclass 35, count 0 2006.232.07:42:00.87#ibcon#read 3, iclass 35, count 0 2006.232.07:42:00.87#ibcon#about to read 4, iclass 35, count 0 2006.232.07:42:00.87#ibcon#read 4, iclass 35, count 0 2006.232.07:42:00.87#ibcon#about to read 5, iclass 35, count 0 2006.232.07:42:00.87#ibcon#read 5, iclass 35, count 0 2006.232.07:42:00.87#ibcon#about to read 6, iclass 35, count 0 2006.232.07:42:00.87#ibcon#read 6, iclass 35, count 0 2006.232.07:42:00.87#ibcon#end of sib2, iclass 35, count 0 2006.232.07:42:00.87#ibcon#*mode == 0, iclass 35, count 0 2006.232.07:42:00.87#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.232.07:42:00.87#ibcon#[27=USB\r\n] 2006.232.07:42:00.87#ibcon#*before write, iclass 35, count 0 2006.232.07:42:00.87#ibcon#enter sib2, iclass 35, count 0 2006.232.07:42:00.87#ibcon#flushed, iclass 35, count 0 2006.232.07:42:00.87#ibcon#about to write, iclass 35, count 0 2006.232.07:42:00.87#ibcon#wrote, iclass 35, count 0 2006.232.07:42:00.87#ibcon#about to read 3, iclass 35, count 0 2006.232.07:42:00.91#ibcon#read 3, iclass 35, count 0 2006.232.07:42:00.91#ibcon#about to read 4, iclass 35, count 0 2006.232.07:42:00.91#ibcon#read 4, iclass 35, count 0 2006.232.07:42:00.91#ibcon#about to read 5, iclass 35, count 0 2006.232.07:42:00.91#ibcon#read 5, iclass 35, count 0 2006.232.07:42:00.91#ibcon#about to read 6, iclass 35, count 0 2006.232.07:42:00.91#ibcon#read 6, iclass 35, count 0 2006.232.07:42:00.91#ibcon#end of sib2, iclass 35, count 0 2006.232.07:42:00.91#ibcon#*after write, iclass 35, count 0 2006.232.07:42:00.91#ibcon#*before return 0, iclass 35, count 0 2006.232.07:42:00.91#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.232.07:42:00.91#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.232.07:42:00.91#ibcon#about to clear, iclass 35 cls_cnt 0 2006.232.07:42:00.91#ibcon#cleared, iclass 35 cls_cnt 0 2006.232.07:42:00.91$vc4f8/vblo=2,640.99 2006.232.07:42:00.91#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.232.07:42:00.91#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.232.07:42:00.91#ibcon#ireg 17 cls_cnt 0 2006.232.07:42:00.91#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.232.07:42:00.91#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.232.07:42:00.91#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.232.07:42:00.91#ibcon#enter wrdev, iclass 37, count 0 2006.232.07:42:00.91#ibcon#first serial, iclass 37, count 0 2006.232.07:42:00.91#ibcon#enter sib2, iclass 37, count 0 2006.232.07:42:00.91#ibcon#flushed, iclass 37, count 0 2006.232.07:42:00.91#ibcon#about to write, iclass 37, count 0 2006.232.07:42:00.91#ibcon#wrote, iclass 37, count 0 2006.232.07:42:00.91#ibcon#about to read 3, iclass 37, count 0 2006.232.07:42:00.92#ibcon#read 3, iclass 37, count 0 2006.232.07:42:00.92#ibcon#about to read 4, iclass 37, count 0 2006.232.07:42:00.92#ibcon#read 4, iclass 37, count 0 2006.232.07:42:00.92#ibcon#about to read 5, iclass 37, count 0 2006.232.07:42:00.92#ibcon#read 5, iclass 37, count 0 2006.232.07:42:00.92#ibcon#about to read 6, iclass 37, count 0 2006.232.07:42:00.92#ibcon#read 6, iclass 37, count 0 2006.232.07:42:00.92#ibcon#end of sib2, iclass 37, count 0 2006.232.07:42:00.92#ibcon#*mode == 0, iclass 37, count 0 2006.232.07:42:00.92#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.232.07:42:00.92#ibcon#[28=FRQ=02,640.99\r\n] 2006.232.07:42:00.92#ibcon#*before write, iclass 37, count 0 2006.232.07:42:00.92#ibcon#enter sib2, iclass 37, count 0 2006.232.07:42:00.92#ibcon#flushed, iclass 37, count 0 2006.232.07:42:00.92#ibcon#about to write, iclass 37, count 0 2006.232.07:42:00.92#ibcon#wrote, iclass 37, count 0 2006.232.07:42:00.92#ibcon#about to read 3, iclass 37, count 0 2006.232.07:42:00.96#ibcon#read 3, iclass 37, count 0 2006.232.07:42:00.96#ibcon#about to read 4, iclass 37, count 0 2006.232.07:42:00.96#ibcon#read 4, iclass 37, count 0 2006.232.07:42:00.96#ibcon#about to read 5, iclass 37, count 0 2006.232.07:42:00.96#ibcon#read 5, iclass 37, count 0 2006.232.07:42:00.96#ibcon#about to read 6, iclass 37, count 0 2006.232.07:42:00.96#ibcon#read 6, iclass 37, count 0 2006.232.07:42:00.96#ibcon#end of sib2, iclass 37, count 0 2006.232.07:42:00.96#ibcon#*after write, iclass 37, count 0 2006.232.07:42:00.96#ibcon#*before return 0, iclass 37, count 0 2006.232.07:42:00.96#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.232.07:42:00.96#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.232.07:42:00.96#ibcon#about to clear, iclass 37 cls_cnt 0 2006.232.07:42:00.96#ibcon#cleared, iclass 37 cls_cnt 0 2006.232.07:42:00.96$vc4f8/vb=2,4 2006.232.07:42:00.96#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.232.07:42:00.96#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.232.07:42:00.96#ibcon#ireg 11 cls_cnt 2 2006.232.07:42:00.96#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.232.07:42:01.03#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.232.07:42:01.03#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.232.07:42:01.03#ibcon#enter wrdev, iclass 39, count 2 2006.232.07:42:01.03#ibcon#first serial, iclass 39, count 2 2006.232.07:42:01.03#ibcon#enter sib2, iclass 39, count 2 2006.232.07:42:01.03#ibcon#flushed, iclass 39, count 2 2006.232.07:42:01.03#ibcon#about to write, iclass 39, count 2 2006.232.07:42:01.03#ibcon#wrote, iclass 39, count 2 2006.232.07:42:01.03#ibcon#about to read 3, iclass 39, count 2 2006.232.07:42:01.05#ibcon#read 3, iclass 39, count 2 2006.232.07:42:01.05#ibcon#about to read 4, iclass 39, count 2 2006.232.07:42:01.05#ibcon#read 4, iclass 39, count 2 2006.232.07:42:01.05#ibcon#about to read 5, iclass 39, count 2 2006.232.07:42:01.05#ibcon#read 5, iclass 39, count 2 2006.232.07:42:01.05#ibcon#about to read 6, iclass 39, count 2 2006.232.07:42:01.05#ibcon#read 6, iclass 39, count 2 2006.232.07:42:01.05#ibcon#end of sib2, iclass 39, count 2 2006.232.07:42:01.05#ibcon#*mode == 0, iclass 39, count 2 2006.232.07:42:01.05#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.232.07:42:01.05#ibcon#[27=AT02-04\r\n] 2006.232.07:42:01.05#ibcon#*before write, iclass 39, count 2 2006.232.07:42:01.05#ibcon#enter sib2, iclass 39, count 2 2006.232.07:42:01.05#ibcon#flushed, iclass 39, count 2 2006.232.07:42:01.05#ibcon#about to write, iclass 39, count 2 2006.232.07:42:01.05#ibcon#wrote, iclass 39, count 2 2006.232.07:42:01.05#ibcon#about to read 3, iclass 39, count 2 2006.232.07:42:01.08#ibcon#read 3, iclass 39, count 2 2006.232.07:42:01.08#ibcon#about to read 4, iclass 39, count 2 2006.232.07:42:01.08#ibcon#read 4, iclass 39, count 2 2006.232.07:42:01.08#ibcon#about to read 5, iclass 39, count 2 2006.232.07:42:01.08#ibcon#read 5, iclass 39, count 2 2006.232.07:42:01.08#ibcon#about to read 6, iclass 39, count 2 2006.232.07:42:01.08#ibcon#read 6, iclass 39, count 2 2006.232.07:42:01.08#ibcon#end of sib2, iclass 39, count 2 2006.232.07:42:01.08#ibcon#*after write, iclass 39, count 2 2006.232.07:42:01.08#ibcon#*before return 0, iclass 39, count 2 2006.232.07:42:01.08#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.232.07:42:01.08#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.232.07:42:01.08#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.232.07:42:01.08#ibcon#ireg 7 cls_cnt 0 2006.232.07:42:01.08#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.232.07:42:01.20#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.232.07:42:01.20#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.232.07:42:01.20#ibcon#enter wrdev, iclass 39, count 0 2006.232.07:42:01.20#ibcon#first serial, iclass 39, count 0 2006.232.07:42:01.20#ibcon#enter sib2, iclass 39, count 0 2006.232.07:42:01.20#ibcon#flushed, iclass 39, count 0 2006.232.07:42:01.20#ibcon#about to write, iclass 39, count 0 2006.232.07:42:01.20#ibcon#wrote, iclass 39, count 0 2006.232.07:42:01.20#ibcon#about to read 3, iclass 39, count 0 2006.232.07:42:01.22#ibcon#read 3, iclass 39, count 0 2006.232.07:42:01.22#ibcon#about to read 4, iclass 39, count 0 2006.232.07:42:01.22#ibcon#read 4, iclass 39, count 0 2006.232.07:42:01.22#ibcon#about to read 5, iclass 39, count 0 2006.232.07:42:01.22#ibcon#read 5, iclass 39, count 0 2006.232.07:42:01.22#ibcon#about to read 6, iclass 39, count 0 2006.232.07:42:01.22#ibcon#read 6, iclass 39, count 0 2006.232.07:42:01.22#ibcon#end of sib2, iclass 39, count 0 2006.232.07:42:01.22#ibcon#*mode == 0, iclass 39, count 0 2006.232.07:42:01.22#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.232.07:42:01.22#ibcon#[27=USB\r\n] 2006.232.07:42:01.22#ibcon#*before write, iclass 39, count 0 2006.232.07:42:01.22#ibcon#enter sib2, iclass 39, count 0 2006.232.07:42:01.22#ibcon#flushed, iclass 39, count 0 2006.232.07:42:01.22#ibcon#about to write, iclass 39, count 0 2006.232.07:42:01.22#ibcon#wrote, iclass 39, count 0 2006.232.07:42:01.22#ibcon#about to read 3, iclass 39, count 0 2006.232.07:42:01.25#ibcon#read 3, iclass 39, count 0 2006.232.07:42:01.25#ibcon#about to read 4, iclass 39, count 0 2006.232.07:42:01.25#ibcon#read 4, iclass 39, count 0 2006.232.07:42:01.25#ibcon#about to read 5, iclass 39, count 0 2006.232.07:42:01.25#ibcon#read 5, iclass 39, count 0 2006.232.07:42:01.25#ibcon#about to read 6, iclass 39, count 0 2006.232.07:42:01.25#ibcon#read 6, iclass 39, count 0 2006.232.07:42:01.25#ibcon#end of sib2, iclass 39, count 0 2006.232.07:42:01.25#ibcon#*after write, iclass 39, count 0 2006.232.07:42:01.25#ibcon#*before return 0, iclass 39, count 0 2006.232.07:42:01.25#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.232.07:42:01.25#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.232.07:42:01.25#ibcon#about to clear, iclass 39 cls_cnt 0 2006.232.07:42:01.25#ibcon#cleared, iclass 39 cls_cnt 0 2006.232.07:42:01.25$vc4f8/vblo=3,656.99 2006.232.07:42:01.25#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.232.07:42:01.25#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.232.07:42:01.25#ibcon#ireg 17 cls_cnt 0 2006.232.07:42:01.25#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.232.07:42:01.25#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.232.07:42:01.25#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.232.07:42:01.25#ibcon#enter wrdev, iclass 3, count 0 2006.232.07:42:01.25#ibcon#first serial, iclass 3, count 0 2006.232.07:42:01.25#ibcon#enter sib2, iclass 3, count 0 2006.232.07:42:01.25#ibcon#flushed, iclass 3, count 0 2006.232.07:42:01.25#ibcon#about to write, iclass 3, count 0 2006.232.07:42:01.25#ibcon#wrote, iclass 3, count 0 2006.232.07:42:01.25#ibcon#about to read 3, iclass 3, count 0 2006.232.07:42:01.27#ibcon#read 3, iclass 3, count 0 2006.232.07:42:01.27#ibcon#about to read 4, iclass 3, count 0 2006.232.07:42:01.27#ibcon#read 4, iclass 3, count 0 2006.232.07:42:01.27#ibcon#about to read 5, iclass 3, count 0 2006.232.07:42:01.27#ibcon#read 5, iclass 3, count 0 2006.232.07:42:01.27#ibcon#about to read 6, iclass 3, count 0 2006.232.07:42:01.27#ibcon#read 6, iclass 3, count 0 2006.232.07:42:01.27#ibcon#end of sib2, iclass 3, count 0 2006.232.07:42:01.27#ibcon#*mode == 0, iclass 3, count 0 2006.232.07:42:01.27#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.232.07:42:01.27#ibcon#[28=FRQ=03,656.99\r\n] 2006.232.07:42:01.27#ibcon#*before write, iclass 3, count 0 2006.232.07:42:01.27#ibcon#enter sib2, iclass 3, count 0 2006.232.07:42:01.27#ibcon#flushed, iclass 3, count 0 2006.232.07:42:01.27#ibcon#about to write, iclass 3, count 0 2006.232.07:42:01.27#ibcon#wrote, iclass 3, count 0 2006.232.07:42:01.27#ibcon#about to read 3, iclass 3, count 0 2006.232.07:42:01.31#ibcon#read 3, iclass 3, count 0 2006.232.07:42:01.31#ibcon#about to read 4, iclass 3, count 0 2006.232.07:42:01.31#ibcon#read 4, iclass 3, count 0 2006.232.07:42:01.31#ibcon#about to read 5, iclass 3, count 0 2006.232.07:42:01.31#ibcon#read 5, iclass 3, count 0 2006.232.07:42:01.31#ibcon#about to read 6, iclass 3, count 0 2006.232.07:42:01.31#ibcon#read 6, iclass 3, count 0 2006.232.07:42:01.31#ibcon#end of sib2, iclass 3, count 0 2006.232.07:42:01.31#ibcon#*after write, iclass 3, count 0 2006.232.07:42:01.31#ibcon#*before return 0, iclass 3, count 0 2006.232.07:42:01.31#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.232.07:42:01.31#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.232.07:42:01.31#ibcon#about to clear, iclass 3 cls_cnt 0 2006.232.07:42:01.31#ibcon#cleared, iclass 3 cls_cnt 0 2006.232.07:42:01.31$vc4f8/vb=3,4 2006.232.07:42:01.31#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.232.07:42:01.31#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.232.07:42:01.31#ibcon#ireg 11 cls_cnt 2 2006.232.07:42:01.31#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.232.07:42:01.37#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.232.07:42:01.37#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.232.07:42:01.37#ibcon#enter wrdev, iclass 5, count 2 2006.232.07:42:01.37#ibcon#first serial, iclass 5, count 2 2006.232.07:42:01.37#ibcon#enter sib2, iclass 5, count 2 2006.232.07:42:01.37#ibcon#flushed, iclass 5, count 2 2006.232.07:42:01.37#ibcon#about to write, iclass 5, count 2 2006.232.07:42:01.37#ibcon#wrote, iclass 5, count 2 2006.232.07:42:01.37#ibcon#about to read 3, iclass 5, count 2 2006.232.07:42:01.39#ibcon#read 3, iclass 5, count 2 2006.232.07:42:01.39#ibcon#about to read 4, iclass 5, count 2 2006.232.07:42:01.39#ibcon#read 4, iclass 5, count 2 2006.232.07:42:01.39#ibcon#about to read 5, iclass 5, count 2 2006.232.07:42:01.39#ibcon#read 5, iclass 5, count 2 2006.232.07:42:01.39#ibcon#about to read 6, iclass 5, count 2 2006.232.07:42:01.39#ibcon#read 6, iclass 5, count 2 2006.232.07:42:01.39#ibcon#end of sib2, iclass 5, count 2 2006.232.07:42:01.39#ibcon#*mode == 0, iclass 5, count 2 2006.232.07:42:01.39#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.232.07:42:01.39#ibcon#[27=AT03-04\r\n] 2006.232.07:42:01.39#ibcon#*before write, iclass 5, count 2 2006.232.07:42:01.39#ibcon#enter sib2, iclass 5, count 2 2006.232.07:42:01.39#ibcon#flushed, iclass 5, count 2 2006.232.07:42:01.39#ibcon#about to write, iclass 5, count 2 2006.232.07:42:01.39#ibcon#wrote, iclass 5, count 2 2006.232.07:42:01.39#ibcon#about to read 3, iclass 5, count 2 2006.232.07:42:01.42#ibcon#read 3, iclass 5, count 2 2006.232.07:42:01.42#ibcon#about to read 4, iclass 5, count 2 2006.232.07:42:01.42#ibcon#read 4, iclass 5, count 2 2006.232.07:42:01.42#ibcon#about to read 5, iclass 5, count 2 2006.232.07:42:01.42#ibcon#read 5, iclass 5, count 2 2006.232.07:42:01.42#ibcon#about to read 6, iclass 5, count 2 2006.232.07:42:01.42#ibcon#read 6, iclass 5, count 2 2006.232.07:42:01.42#ibcon#end of sib2, iclass 5, count 2 2006.232.07:42:01.42#ibcon#*after write, iclass 5, count 2 2006.232.07:42:01.42#ibcon#*before return 0, iclass 5, count 2 2006.232.07:42:01.42#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.232.07:42:01.42#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.232.07:42:01.42#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.232.07:42:01.42#ibcon#ireg 7 cls_cnt 0 2006.232.07:42:01.42#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.232.07:42:01.54#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.232.07:42:01.54#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.232.07:42:01.54#ibcon#enter wrdev, iclass 5, count 0 2006.232.07:42:01.54#ibcon#first serial, iclass 5, count 0 2006.232.07:42:01.54#ibcon#enter sib2, iclass 5, count 0 2006.232.07:42:01.54#ibcon#flushed, iclass 5, count 0 2006.232.07:42:01.54#ibcon#about to write, iclass 5, count 0 2006.232.07:42:01.54#ibcon#wrote, iclass 5, count 0 2006.232.07:42:01.54#ibcon#about to read 3, iclass 5, count 0 2006.232.07:42:01.56#ibcon#read 3, iclass 5, count 0 2006.232.07:42:01.56#ibcon#about to read 4, iclass 5, count 0 2006.232.07:42:01.56#ibcon#read 4, iclass 5, count 0 2006.232.07:42:01.56#ibcon#about to read 5, iclass 5, count 0 2006.232.07:42:01.56#ibcon#read 5, iclass 5, count 0 2006.232.07:42:01.56#ibcon#about to read 6, iclass 5, count 0 2006.232.07:42:01.56#ibcon#read 6, iclass 5, count 0 2006.232.07:42:01.56#ibcon#end of sib2, iclass 5, count 0 2006.232.07:42:01.56#ibcon#*mode == 0, iclass 5, count 0 2006.232.07:42:01.56#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.232.07:42:01.56#ibcon#[27=USB\r\n] 2006.232.07:42:01.56#ibcon#*before write, iclass 5, count 0 2006.232.07:42:01.56#ibcon#enter sib2, iclass 5, count 0 2006.232.07:42:01.56#ibcon#flushed, iclass 5, count 0 2006.232.07:42:01.56#ibcon#about to write, iclass 5, count 0 2006.232.07:42:01.56#ibcon#wrote, iclass 5, count 0 2006.232.07:42:01.56#ibcon#about to read 3, iclass 5, count 0 2006.232.07:42:01.59#ibcon#read 3, iclass 5, count 0 2006.232.07:42:01.59#ibcon#about to read 4, iclass 5, count 0 2006.232.07:42:01.59#ibcon#read 4, iclass 5, count 0 2006.232.07:42:01.59#ibcon#about to read 5, iclass 5, count 0 2006.232.07:42:01.59#ibcon#read 5, iclass 5, count 0 2006.232.07:42:01.59#ibcon#about to read 6, iclass 5, count 0 2006.232.07:42:01.59#ibcon#read 6, iclass 5, count 0 2006.232.07:42:01.59#ibcon#end of sib2, iclass 5, count 0 2006.232.07:42:01.59#ibcon#*after write, iclass 5, count 0 2006.232.07:42:01.59#ibcon#*before return 0, iclass 5, count 0 2006.232.07:42:01.59#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.232.07:42:01.59#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.232.07:42:01.59#ibcon#about to clear, iclass 5 cls_cnt 0 2006.232.07:42:01.59#ibcon#cleared, iclass 5 cls_cnt 0 2006.232.07:42:01.59$vc4f8/vblo=4,712.99 2006.232.07:42:01.59#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.232.07:42:01.59#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.232.07:42:01.59#ibcon#ireg 17 cls_cnt 0 2006.232.07:42:01.59#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.232.07:42:01.59#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.232.07:42:01.59#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.232.07:42:01.59#ibcon#enter wrdev, iclass 7, count 0 2006.232.07:42:01.59#ibcon#first serial, iclass 7, count 0 2006.232.07:42:01.59#ibcon#enter sib2, iclass 7, count 0 2006.232.07:42:01.59#ibcon#flushed, iclass 7, count 0 2006.232.07:42:01.59#ibcon#about to write, iclass 7, count 0 2006.232.07:42:01.59#ibcon#wrote, iclass 7, count 0 2006.232.07:42:01.59#ibcon#about to read 3, iclass 7, count 0 2006.232.07:42:01.61#ibcon#read 3, iclass 7, count 0 2006.232.07:42:01.61#ibcon#about to read 4, iclass 7, count 0 2006.232.07:42:01.61#ibcon#read 4, iclass 7, count 0 2006.232.07:42:01.61#ibcon#about to read 5, iclass 7, count 0 2006.232.07:42:01.61#ibcon#read 5, iclass 7, count 0 2006.232.07:42:01.61#ibcon#about to read 6, iclass 7, count 0 2006.232.07:42:01.61#ibcon#read 6, iclass 7, count 0 2006.232.07:42:01.61#ibcon#end of sib2, iclass 7, count 0 2006.232.07:42:01.61#ibcon#*mode == 0, iclass 7, count 0 2006.232.07:42:01.61#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.232.07:42:01.61#ibcon#[28=FRQ=04,712.99\r\n] 2006.232.07:42:01.61#ibcon#*before write, iclass 7, count 0 2006.232.07:42:01.61#ibcon#enter sib2, iclass 7, count 0 2006.232.07:42:01.61#ibcon#flushed, iclass 7, count 0 2006.232.07:42:01.61#ibcon#about to write, iclass 7, count 0 2006.232.07:42:01.61#ibcon#wrote, iclass 7, count 0 2006.232.07:42:01.61#ibcon#about to read 3, iclass 7, count 0 2006.232.07:42:01.65#ibcon#read 3, iclass 7, count 0 2006.232.07:42:01.65#ibcon#about to read 4, iclass 7, count 0 2006.232.07:42:01.65#ibcon#read 4, iclass 7, count 0 2006.232.07:42:01.65#ibcon#about to read 5, iclass 7, count 0 2006.232.07:42:01.65#ibcon#read 5, iclass 7, count 0 2006.232.07:42:01.65#ibcon#about to read 6, iclass 7, count 0 2006.232.07:42:01.65#ibcon#read 6, iclass 7, count 0 2006.232.07:42:01.65#ibcon#end of sib2, iclass 7, count 0 2006.232.07:42:01.65#ibcon#*after write, iclass 7, count 0 2006.232.07:42:01.65#ibcon#*before return 0, iclass 7, count 0 2006.232.07:42:01.65#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.232.07:42:01.65#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.232.07:42:01.65#ibcon#about to clear, iclass 7 cls_cnt 0 2006.232.07:42:01.65#ibcon#cleared, iclass 7 cls_cnt 0 2006.232.07:42:01.65$vc4f8/vb=4,4 2006.232.07:42:01.65#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.232.07:42:01.65#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.232.07:42:01.65#ibcon#ireg 11 cls_cnt 2 2006.232.07:42:01.65#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.232.07:42:01.71#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.232.07:42:01.71#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.232.07:42:01.71#ibcon#enter wrdev, iclass 11, count 2 2006.232.07:42:01.71#ibcon#first serial, iclass 11, count 2 2006.232.07:42:01.71#ibcon#enter sib2, iclass 11, count 2 2006.232.07:42:01.71#ibcon#flushed, iclass 11, count 2 2006.232.07:42:01.71#ibcon#about to write, iclass 11, count 2 2006.232.07:42:01.71#ibcon#wrote, iclass 11, count 2 2006.232.07:42:01.71#ibcon#about to read 3, iclass 11, count 2 2006.232.07:42:01.73#ibcon#read 3, iclass 11, count 2 2006.232.07:42:01.73#ibcon#about to read 4, iclass 11, count 2 2006.232.07:42:01.73#ibcon#read 4, iclass 11, count 2 2006.232.07:42:01.73#ibcon#about to read 5, iclass 11, count 2 2006.232.07:42:01.73#ibcon#read 5, iclass 11, count 2 2006.232.07:42:01.73#ibcon#about to read 6, iclass 11, count 2 2006.232.07:42:01.73#ibcon#read 6, iclass 11, count 2 2006.232.07:42:01.73#ibcon#end of sib2, iclass 11, count 2 2006.232.07:42:01.73#ibcon#*mode == 0, iclass 11, count 2 2006.232.07:42:01.73#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.232.07:42:01.73#ibcon#[27=AT04-04\r\n] 2006.232.07:42:01.73#ibcon#*before write, iclass 11, count 2 2006.232.07:42:01.73#ibcon#enter sib2, iclass 11, count 2 2006.232.07:42:01.73#ibcon#flushed, iclass 11, count 2 2006.232.07:42:01.73#ibcon#about to write, iclass 11, count 2 2006.232.07:42:01.73#ibcon#wrote, iclass 11, count 2 2006.232.07:42:01.73#ibcon#about to read 3, iclass 11, count 2 2006.232.07:42:01.76#ibcon#read 3, iclass 11, count 2 2006.232.07:42:01.76#ibcon#about to read 4, iclass 11, count 2 2006.232.07:42:01.76#ibcon#read 4, iclass 11, count 2 2006.232.07:42:01.76#ibcon#about to read 5, iclass 11, count 2 2006.232.07:42:01.76#ibcon#read 5, iclass 11, count 2 2006.232.07:42:01.76#ibcon#about to read 6, iclass 11, count 2 2006.232.07:42:01.76#ibcon#read 6, iclass 11, count 2 2006.232.07:42:01.76#ibcon#end of sib2, iclass 11, count 2 2006.232.07:42:01.76#ibcon#*after write, iclass 11, count 2 2006.232.07:42:01.76#ibcon#*before return 0, iclass 11, count 2 2006.232.07:42:01.76#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.232.07:42:01.76#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.232.07:42:01.76#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.232.07:42:01.76#ibcon#ireg 7 cls_cnt 0 2006.232.07:42:01.76#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.232.07:42:01.88#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.232.07:42:01.88#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.232.07:42:01.88#ibcon#enter wrdev, iclass 11, count 0 2006.232.07:42:01.88#ibcon#first serial, iclass 11, count 0 2006.232.07:42:01.88#ibcon#enter sib2, iclass 11, count 0 2006.232.07:42:01.88#ibcon#flushed, iclass 11, count 0 2006.232.07:42:01.88#ibcon#about to write, iclass 11, count 0 2006.232.07:42:01.88#ibcon#wrote, iclass 11, count 0 2006.232.07:42:01.88#ibcon#about to read 3, iclass 11, count 0 2006.232.07:42:01.90#ibcon#read 3, iclass 11, count 0 2006.232.07:42:01.90#ibcon#about to read 4, iclass 11, count 0 2006.232.07:42:01.90#ibcon#read 4, iclass 11, count 0 2006.232.07:42:01.90#ibcon#about to read 5, iclass 11, count 0 2006.232.07:42:01.90#ibcon#read 5, iclass 11, count 0 2006.232.07:42:01.90#ibcon#about to read 6, iclass 11, count 0 2006.232.07:42:01.90#ibcon#read 6, iclass 11, count 0 2006.232.07:42:01.90#ibcon#end of sib2, iclass 11, count 0 2006.232.07:42:01.90#ibcon#*mode == 0, iclass 11, count 0 2006.232.07:42:01.90#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.232.07:42:01.90#ibcon#[27=USB\r\n] 2006.232.07:42:01.90#ibcon#*before write, iclass 11, count 0 2006.232.07:42:01.90#ibcon#enter sib2, iclass 11, count 0 2006.232.07:42:01.90#ibcon#flushed, iclass 11, count 0 2006.232.07:42:01.90#ibcon#about to write, iclass 11, count 0 2006.232.07:42:01.90#ibcon#wrote, iclass 11, count 0 2006.232.07:42:01.90#ibcon#about to read 3, iclass 11, count 0 2006.232.07:42:01.93#ibcon#read 3, iclass 11, count 0 2006.232.07:42:01.93#ibcon#about to read 4, iclass 11, count 0 2006.232.07:42:01.93#ibcon#read 4, iclass 11, count 0 2006.232.07:42:01.93#ibcon#about to read 5, iclass 11, count 0 2006.232.07:42:01.93#ibcon#read 5, iclass 11, count 0 2006.232.07:42:01.93#ibcon#about to read 6, iclass 11, count 0 2006.232.07:42:01.93#ibcon#read 6, iclass 11, count 0 2006.232.07:42:01.93#ibcon#end of sib2, iclass 11, count 0 2006.232.07:42:01.93#ibcon#*after write, iclass 11, count 0 2006.232.07:42:01.93#ibcon#*before return 0, iclass 11, count 0 2006.232.07:42:01.93#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.232.07:42:01.93#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.232.07:42:01.93#ibcon#about to clear, iclass 11 cls_cnt 0 2006.232.07:42:01.93#ibcon#cleared, iclass 11 cls_cnt 0 2006.232.07:42:01.93$vc4f8/vblo=5,744.99 2006.232.07:42:01.93#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.232.07:42:01.93#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.232.07:42:01.93#ibcon#ireg 17 cls_cnt 0 2006.232.07:42:01.93#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.232.07:42:01.93#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.232.07:42:01.93#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.232.07:42:01.93#ibcon#enter wrdev, iclass 13, count 0 2006.232.07:42:01.93#ibcon#first serial, iclass 13, count 0 2006.232.07:42:01.93#ibcon#enter sib2, iclass 13, count 0 2006.232.07:42:01.93#ibcon#flushed, iclass 13, count 0 2006.232.07:42:01.93#ibcon#about to write, iclass 13, count 0 2006.232.07:42:01.93#ibcon#wrote, iclass 13, count 0 2006.232.07:42:01.93#ibcon#about to read 3, iclass 13, count 0 2006.232.07:42:01.95#ibcon#read 3, iclass 13, count 0 2006.232.07:42:01.95#ibcon#about to read 4, iclass 13, count 0 2006.232.07:42:01.95#ibcon#read 4, iclass 13, count 0 2006.232.07:42:01.95#ibcon#about to read 5, iclass 13, count 0 2006.232.07:42:01.95#ibcon#read 5, iclass 13, count 0 2006.232.07:42:01.95#ibcon#about to read 6, iclass 13, count 0 2006.232.07:42:01.95#ibcon#read 6, iclass 13, count 0 2006.232.07:42:01.95#ibcon#end of sib2, iclass 13, count 0 2006.232.07:42:01.95#ibcon#*mode == 0, iclass 13, count 0 2006.232.07:42:01.95#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.232.07:42:01.95#ibcon#[28=FRQ=05,744.99\r\n] 2006.232.07:42:01.95#ibcon#*before write, iclass 13, count 0 2006.232.07:42:01.95#ibcon#enter sib2, iclass 13, count 0 2006.232.07:42:01.95#ibcon#flushed, iclass 13, count 0 2006.232.07:42:01.95#ibcon#about to write, iclass 13, count 0 2006.232.07:42:01.95#ibcon#wrote, iclass 13, count 0 2006.232.07:42:01.95#ibcon#about to read 3, iclass 13, count 0 2006.232.07:42:01.99#ibcon#read 3, iclass 13, count 0 2006.232.07:42:01.99#ibcon#about to read 4, iclass 13, count 0 2006.232.07:42:01.99#ibcon#read 4, iclass 13, count 0 2006.232.07:42:01.99#ibcon#about to read 5, iclass 13, count 0 2006.232.07:42:01.99#ibcon#read 5, iclass 13, count 0 2006.232.07:42:01.99#ibcon#about to read 6, iclass 13, count 0 2006.232.07:42:01.99#ibcon#read 6, iclass 13, count 0 2006.232.07:42:01.99#ibcon#end of sib2, iclass 13, count 0 2006.232.07:42:01.99#ibcon#*after write, iclass 13, count 0 2006.232.07:42:01.99#ibcon#*before return 0, iclass 13, count 0 2006.232.07:42:01.99#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.232.07:42:01.99#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.232.07:42:01.99#ibcon#about to clear, iclass 13 cls_cnt 0 2006.232.07:42:01.99#ibcon#cleared, iclass 13 cls_cnt 0 2006.232.07:42:01.99$vc4f8/vb=5,3 2006.232.07:42:01.99#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.232.07:42:01.99#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.232.07:42:01.99#ibcon#ireg 11 cls_cnt 2 2006.232.07:42:01.99#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.232.07:42:02.05#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.232.07:42:02.05#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.232.07:42:02.05#ibcon#enter wrdev, iclass 15, count 2 2006.232.07:42:02.05#ibcon#first serial, iclass 15, count 2 2006.232.07:42:02.05#ibcon#enter sib2, iclass 15, count 2 2006.232.07:42:02.05#ibcon#flushed, iclass 15, count 2 2006.232.07:42:02.05#ibcon#about to write, iclass 15, count 2 2006.232.07:42:02.05#ibcon#wrote, iclass 15, count 2 2006.232.07:42:02.05#ibcon#about to read 3, iclass 15, count 2 2006.232.07:42:02.07#ibcon#read 3, iclass 15, count 2 2006.232.07:42:02.07#ibcon#about to read 4, iclass 15, count 2 2006.232.07:42:02.07#ibcon#read 4, iclass 15, count 2 2006.232.07:42:02.07#ibcon#about to read 5, iclass 15, count 2 2006.232.07:42:02.07#ibcon#read 5, iclass 15, count 2 2006.232.07:42:02.07#ibcon#about to read 6, iclass 15, count 2 2006.232.07:42:02.07#ibcon#read 6, iclass 15, count 2 2006.232.07:42:02.07#ibcon#end of sib2, iclass 15, count 2 2006.232.07:42:02.07#ibcon#*mode == 0, iclass 15, count 2 2006.232.07:42:02.07#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.232.07:42:02.07#ibcon#[27=AT05-03\r\n] 2006.232.07:42:02.07#ibcon#*before write, iclass 15, count 2 2006.232.07:42:02.07#ibcon#enter sib2, iclass 15, count 2 2006.232.07:42:02.07#ibcon#flushed, iclass 15, count 2 2006.232.07:42:02.07#ibcon#about to write, iclass 15, count 2 2006.232.07:42:02.07#ibcon#wrote, iclass 15, count 2 2006.232.07:42:02.07#ibcon#about to read 3, iclass 15, count 2 2006.232.07:42:02.10#ibcon#read 3, iclass 15, count 2 2006.232.07:42:02.10#ibcon#about to read 4, iclass 15, count 2 2006.232.07:42:02.10#ibcon#read 4, iclass 15, count 2 2006.232.07:42:02.10#ibcon#about to read 5, iclass 15, count 2 2006.232.07:42:02.10#ibcon#read 5, iclass 15, count 2 2006.232.07:42:02.10#ibcon#about to read 6, iclass 15, count 2 2006.232.07:42:02.10#ibcon#read 6, iclass 15, count 2 2006.232.07:42:02.10#ibcon#end of sib2, iclass 15, count 2 2006.232.07:42:02.10#ibcon#*after write, iclass 15, count 2 2006.232.07:42:02.10#ibcon#*before return 0, iclass 15, count 2 2006.232.07:42:02.10#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.232.07:42:02.10#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.232.07:42:02.10#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.232.07:42:02.10#ibcon#ireg 7 cls_cnt 0 2006.232.07:42:02.10#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.232.07:42:02.22#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.232.07:42:02.22#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.232.07:42:02.22#ibcon#enter wrdev, iclass 15, count 0 2006.232.07:42:02.22#ibcon#first serial, iclass 15, count 0 2006.232.07:42:02.22#ibcon#enter sib2, iclass 15, count 0 2006.232.07:42:02.22#ibcon#flushed, iclass 15, count 0 2006.232.07:42:02.22#ibcon#about to write, iclass 15, count 0 2006.232.07:42:02.22#ibcon#wrote, iclass 15, count 0 2006.232.07:42:02.22#ibcon#about to read 3, iclass 15, count 0 2006.232.07:42:02.24#ibcon#read 3, iclass 15, count 0 2006.232.07:42:02.24#ibcon#about to read 4, iclass 15, count 0 2006.232.07:42:02.24#ibcon#read 4, iclass 15, count 0 2006.232.07:42:02.24#ibcon#about to read 5, iclass 15, count 0 2006.232.07:42:02.24#ibcon#read 5, iclass 15, count 0 2006.232.07:42:02.24#ibcon#about to read 6, iclass 15, count 0 2006.232.07:42:02.24#ibcon#read 6, iclass 15, count 0 2006.232.07:42:02.24#ibcon#end of sib2, iclass 15, count 0 2006.232.07:42:02.24#ibcon#*mode == 0, iclass 15, count 0 2006.232.07:42:02.24#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.232.07:42:02.24#ibcon#[27=USB\r\n] 2006.232.07:42:02.24#ibcon#*before write, iclass 15, count 0 2006.232.07:42:02.24#ibcon#enter sib2, iclass 15, count 0 2006.232.07:42:02.24#ibcon#flushed, iclass 15, count 0 2006.232.07:42:02.24#ibcon#about to write, iclass 15, count 0 2006.232.07:42:02.24#ibcon#wrote, iclass 15, count 0 2006.232.07:42:02.24#ibcon#about to read 3, iclass 15, count 0 2006.232.07:42:02.27#ibcon#read 3, iclass 15, count 0 2006.232.07:42:02.27#ibcon#about to read 4, iclass 15, count 0 2006.232.07:42:02.27#ibcon#read 4, iclass 15, count 0 2006.232.07:42:02.27#ibcon#about to read 5, iclass 15, count 0 2006.232.07:42:02.27#ibcon#read 5, iclass 15, count 0 2006.232.07:42:02.27#ibcon#about to read 6, iclass 15, count 0 2006.232.07:42:02.27#ibcon#read 6, iclass 15, count 0 2006.232.07:42:02.27#ibcon#end of sib2, iclass 15, count 0 2006.232.07:42:02.27#ibcon#*after write, iclass 15, count 0 2006.232.07:42:02.27#ibcon#*before return 0, iclass 15, count 0 2006.232.07:42:02.27#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.232.07:42:02.27#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.232.07:42:02.27#ibcon#about to clear, iclass 15 cls_cnt 0 2006.232.07:42:02.27#ibcon#cleared, iclass 15 cls_cnt 0 2006.232.07:42:02.27$vc4f8/vblo=6,752.99 2006.232.07:42:02.27#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.232.07:42:02.27#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.232.07:42:02.27#ibcon#ireg 17 cls_cnt 0 2006.232.07:42:02.27#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.232.07:42:02.27#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.232.07:42:02.27#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.232.07:42:02.27#ibcon#enter wrdev, iclass 17, count 0 2006.232.07:42:02.27#ibcon#first serial, iclass 17, count 0 2006.232.07:42:02.27#ibcon#enter sib2, iclass 17, count 0 2006.232.07:42:02.27#ibcon#flushed, iclass 17, count 0 2006.232.07:42:02.27#ibcon#about to write, iclass 17, count 0 2006.232.07:42:02.27#ibcon#wrote, iclass 17, count 0 2006.232.07:42:02.27#ibcon#about to read 3, iclass 17, count 0 2006.232.07:42:02.29#ibcon#read 3, iclass 17, count 0 2006.232.07:42:02.29#ibcon#about to read 4, iclass 17, count 0 2006.232.07:42:02.29#ibcon#read 4, iclass 17, count 0 2006.232.07:42:02.29#ibcon#about to read 5, iclass 17, count 0 2006.232.07:42:02.29#ibcon#read 5, iclass 17, count 0 2006.232.07:42:02.29#ibcon#about to read 6, iclass 17, count 0 2006.232.07:42:02.29#ibcon#read 6, iclass 17, count 0 2006.232.07:42:02.29#ibcon#end of sib2, iclass 17, count 0 2006.232.07:42:02.29#ibcon#*mode == 0, iclass 17, count 0 2006.232.07:42:02.29#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.232.07:42:02.29#ibcon#[28=FRQ=06,752.99\r\n] 2006.232.07:42:02.29#ibcon#*before write, iclass 17, count 0 2006.232.07:42:02.29#ibcon#enter sib2, iclass 17, count 0 2006.232.07:42:02.29#ibcon#flushed, iclass 17, count 0 2006.232.07:42:02.29#ibcon#about to write, iclass 17, count 0 2006.232.07:42:02.29#ibcon#wrote, iclass 17, count 0 2006.232.07:42:02.29#ibcon#about to read 3, iclass 17, count 0 2006.232.07:42:02.33#ibcon#read 3, iclass 17, count 0 2006.232.07:42:02.33#ibcon#about to read 4, iclass 17, count 0 2006.232.07:42:02.33#ibcon#read 4, iclass 17, count 0 2006.232.07:42:02.33#ibcon#about to read 5, iclass 17, count 0 2006.232.07:42:02.33#ibcon#read 5, iclass 17, count 0 2006.232.07:42:02.33#ibcon#about to read 6, iclass 17, count 0 2006.232.07:42:02.33#ibcon#read 6, iclass 17, count 0 2006.232.07:42:02.33#ibcon#end of sib2, iclass 17, count 0 2006.232.07:42:02.33#ibcon#*after write, iclass 17, count 0 2006.232.07:42:02.33#ibcon#*before return 0, iclass 17, count 0 2006.232.07:42:02.33#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.232.07:42:02.33#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.232.07:42:02.33#ibcon#about to clear, iclass 17 cls_cnt 0 2006.232.07:42:02.33#ibcon#cleared, iclass 17 cls_cnt 0 2006.232.07:42:02.33$vc4f8/vb=6,4 2006.232.07:42:02.33#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.232.07:42:02.33#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.232.07:42:02.33#ibcon#ireg 11 cls_cnt 2 2006.232.07:42:02.33#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.232.07:42:02.39#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.232.07:42:02.39#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.232.07:42:02.39#ibcon#enter wrdev, iclass 19, count 2 2006.232.07:42:02.39#ibcon#first serial, iclass 19, count 2 2006.232.07:42:02.39#ibcon#enter sib2, iclass 19, count 2 2006.232.07:42:02.39#ibcon#flushed, iclass 19, count 2 2006.232.07:42:02.39#ibcon#about to write, iclass 19, count 2 2006.232.07:42:02.39#ibcon#wrote, iclass 19, count 2 2006.232.07:42:02.39#ibcon#about to read 3, iclass 19, count 2 2006.232.07:42:02.41#ibcon#read 3, iclass 19, count 2 2006.232.07:42:02.41#ibcon#about to read 4, iclass 19, count 2 2006.232.07:42:02.41#ibcon#read 4, iclass 19, count 2 2006.232.07:42:02.41#ibcon#about to read 5, iclass 19, count 2 2006.232.07:42:02.41#ibcon#read 5, iclass 19, count 2 2006.232.07:42:02.41#ibcon#about to read 6, iclass 19, count 2 2006.232.07:42:02.41#ibcon#read 6, iclass 19, count 2 2006.232.07:42:02.41#ibcon#end of sib2, iclass 19, count 2 2006.232.07:42:02.41#ibcon#*mode == 0, iclass 19, count 2 2006.232.07:42:02.41#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.232.07:42:02.41#ibcon#[27=AT06-04\r\n] 2006.232.07:42:02.41#ibcon#*before write, iclass 19, count 2 2006.232.07:42:02.41#ibcon#enter sib2, iclass 19, count 2 2006.232.07:42:02.41#ibcon#flushed, iclass 19, count 2 2006.232.07:42:02.41#ibcon#about to write, iclass 19, count 2 2006.232.07:42:02.41#ibcon#wrote, iclass 19, count 2 2006.232.07:42:02.41#ibcon#about to read 3, iclass 19, count 2 2006.232.07:42:02.44#ibcon#read 3, iclass 19, count 2 2006.232.07:42:02.44#ibcon#about to read 4, iclass 19, count 2 2006.232.07:42:02.44#ibcon#read 4, iclass 19, count 2 2006.232.07:42:02.44#ibcon#about to read 5, iclass 19, count 2 2006.232.07:42:02.44#ibcon#read 5, iclass 19, count 2 2006.232.07:42:02.44#ibcon#about to read 6, iclass 19, count 2 2006.232.07:42:02.44#ibcon#read 6, iclass 19, count 2 2006.232.07:42:02.44#ibcon#end of sib2, iclass 19, count 2 2006.232.07:42:02.44#ibcon#*after write, iclass 19, count 2 2006.232.07:42:02.44#ibcon#*before return 0, iclass 19, count 2 2006.232.07:42:02.44#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.232.07:42:02.44#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.232.07:42:02.44#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.232.07:42:02.44#ibcon#ireg 7 cls_cnt 0 2006.232.07:42:02.44#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.232.07:42:02.56#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.232.07:42:02.56#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.232.07:42:02.56#ibcon#enter wrdev, iclass 19, count 0 2006.232.07:42:02.56#ibcon#first serial, iclass 19, count 0 2006.232.07:42:02.56#ibcon#enter sib2, iclass 19, count 0 2006.232.07:42:02.56#ibcon#flushed, iclass 19, count 0 2006.232.07:42:02.56#ibcon#about to write, iclass 19, count 0 2006.232.07:42:02.56#ibcon#wrote, iclass 19, count 0 2006.232.07:42:02.56#ibcon#about to read 3, iclass 19, count 0 2006.232.07:42:02.58#ibcon#read 3, iclass 19, count 0 2006.232.07:42:02.58#ibcon#about to read 4, iclass 19, count 0 2006.232.07:42:02.58#ibcon#read 4, iclass 19, count 0 2006.232.07:42:02.58#ibcon#about to read 5, iclass 19, count 0 2006.232.07:42:02.58#ibcon#read 5, iclass 19, count 0 2006.232.07:42:02.58#ibcon#about to read 6, iclass 19, count 0 2006.232.07:42:02.58#ibcon#read 6, iclass 19, count 0 2006.232.07:42:02.58#ibcon#end of sib2, iclass 19, count 0 2006.232.07:42:02.58#ibcon#*mode == 0, iclass 19, count 0 2006.232.07:42:02.58#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.232.07:42:02.58#ibcon#[27=USB\r\n] 2006.232.07:42:02.58#ibcon#*before write, iclass 19, count 0 2006.232.07:42:02.58#ibcon#enter sib2, iclass 19, count 0 2006.232.07:42:02.58#ibcon#flushed, iclass 19, count 0 2006.232.07:42:02.58#ibcon#about to write, iclass 19, count 0 2006.232.07:42:02.58#ibcon#wrote, iclass 19, count 0 2006.232.07:42:02.58#ibcon#about to read 3, iclass 19, count 0 2006.232.07:42:02.61#ibcon#read 3, iclass 19, count 0 2006.232.07:42:02.61#ibcon#about to read 4, iclass 19, count 0 2006.232.07:42:02.61#ibcon#read 4, iclass 19, count 0 2006.232.07:42:02.61#ibcon#about to read 5, iclass 19, count 0 2006.232.07:42:02.61#ibcon#read 5, iclass 19, count 0 2006.232.07:42:02.61#ibcon#about to read 6, iclass 19, count 0 2006.232.07:42:02.61#ibcon#read 6, iclass 19, count 0 2006.232.07:42:02.61#ibcon#end of sib2, iclass 19, count 0 2006.232.07:42:02.61#ibcon#*after write, iclass 19, count 0 2006.232.07:42:02.61#ibcon#*before return 0, iclass 19, count 0 2006.232.07:42:02.61#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.232.07:42:02.61#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.232.07:42:02.61#ibcon#about to clear, iclass 19 cls_cnt 0 2006.232.07:42:02.61#ibcon#cleared, iclass 19 cls_cnt 0 2006.232.07:42:02.61$vc4f8/vabw=wide 2006.232.07:42:02.61#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.232.07:42:02.61#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.232.07:42:02.61#ibcon#ireg 8 cls_cnt 0 2006.232.07:42:02.61#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.232.07:42:02.61#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.232.07:42:02.61#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.232.07:42:02.61#ibcon#enter wrdev, iclass 21, count 0 2006.232.07:42:02.61#ibcon#first serial, iclass 21, count 0 2006.232.07:42:02.61#ibcon#enter sib2, iclass 21, count 0 2006.232.07:42:02.61#ibcon#flushed, iclass 21, count 0 2006.232.07:42:02.61#ibcon#about to write, iclass 21, count 0 2006.232.07:42:02.61#ibcon#wrote, iclass 21, count 0 2006.232.07:42:02.61#ibcon#about to read 3, iclass 21, count 0 2006.232.07:42:02.63#ibcon#read 3, iclass 21, count 0 2006.232.07:42:02.63#ibcon#about to read 4, iclass 21, count 0 2006.232.07:42:02.63#ibcon#read 4, iclass 21, count 0 2006.232.07:42:02.63#ibcon#about to read 5, iclass 21, count 0 2006.232.07:42:02.63#ibcon#read 5, iclass 21, count 0 2006.232.07:42:02.63#ibcon#about to read 6, iclass 21, count 0 2006.232.07:42:02.63#ibcon#read 6, iclass 21, count 0 2006.232.07:42:02.63#ibcon#end of sib2, iclass 21, count 0 2006.232.07:42:02.63#ibcon#*mode == 0, iclass 21, count 0 2006.232.07:42:02.63#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.232.07:42:02.63#ibcon#[25=BW32\r\n] 2006.232.07:42:02.63#ibcon#*before write, iclass 21, count 0 2006.232.07:42:02.63#ibcon#enter sib2, iclass 21, count 0 2006.232.07:42:02.63#ibcon#flushed, iclass 21, count 0 2006.232.07:42:02.63#ibcon#about to write, iclass 21, count 0 2006.232.07:42:02.63#ibcon#wrote, iclass 21, count 0 2006.232.07:42:02.63#ibcon#about to read 3, iclass 21, count 0 2006.232.07:42:02.66#ibcon#read 3, iclass 21, count 0 2006.232.07:42:02.66#ibcon#about to read 4, iclass 21, count 0 2006.232.07:42:02.66#ibcon#read 4, iclass 21, count 0 2006.232.07:42:02.66#ibcon#about to read 5, iclass 21, count 0 2006.232.07:42:02.66#ibcon#read 5, iclass 21, count 0 2006.232.07:42:02.66#ibcon#about to read 6, iclass 21, count 0 2006.232.07:42:02.66#ibcon#read 6, iclass 21, count 0 2006.232.07:42:02.66#ibcon#end of sib2, iclass 21, count 0 2006.232.07:42:02.66#ibcon#*after write, iclass 21, count 0 2006.232.07:42:02.66#ibcon#*before return 0, iclass 21, count 0 2006.232.07:42:02.66#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.232.07:42:02.66#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.232.07:42:02.66#ibcon#about to clear, iclass 21 cls_cnt 0 2006.232.07:42:02.66#ibcon#cleared, iclass 21 cls_cnt 0 2006.232.07:42:02.66$vc4f8/vbbw=wide 2006.232.07:42:02.66#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.232.07:42:02.66#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.232.07:42:02.66#ibcon#ireg 8 cls_cnt 0 2006.232.07:42:02.66#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.232.07:42:02.73#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.232.07:42:02.73#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.232.07:42:02.73#ibcon#enter wrdev, iclass 23, count 0 2006.232.07:42:02.73#ibcon#first serial, iclass 23, count 0 2006.232.07:42:02.73#ibcon#enter sib2, iclass 23, count 0 2006.232.07:42:02.73#ibcon#flushed, iclass 23, count 0 2006.232.07:42:02.73#ibcon#about to write, iclass 23, count 0 2006.232.07:42:02.73#ibcon#wrote, iclass 23, count 0 2006.232.07:42:02.73#ibcon#about to read 3, iclass 23, count 0 2006.232.07:42:02.76#ibcon#read 3, iclass 23, count 0 2006.232.07:42:02.76#ibcon#about to read 4, iclass 23, count 0 2006.232.07:42:02.76#ibcon#read 4, iclass 23, count 0 2006.232.07:42:02.76#ibcon#about to read 5, iclass 23, count 0 2006.232.07:42:02.76#ibcon#read 5, iclass 23, count 0 2006.232.07:42:02.76#ibcon#about to read 6, iclass 23, count 0 2006.232.07:42:02.76#ibcon#read 6, iclass 23, count 0 2006.232.07:42:02.76#ibcon#end of sib2, iclass 23, count 0 2006.232.07:42:02.76#ibcon#*mode == 0, iclass 23, count 0 2006.232.07:42:02.76#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.232.07:42:02.76#ibcon#[27=BW32\r\n] 2006.232.07:42:02.76#ibcon#*before write, iclass 23, count 0 2006.232.07:42:02.76#ibcon#enter sib2, iclass 23, count 0 2006.232.07:42:02.76#ibcon#flushed, iclass 23, count 0 2006.232.07:42:02.76#ibcon#about to write, iclass 23, count 0 2006.232.07:42:02.76#ibcon#wrote, iclass 23, count 0 2006.232.07:42:02.76#ibcon#about to read 3, iclass 23, count 0 2006.232.07:42:02.78#ibcon#read 3, iclass 23, count 0 2006.232.07:42:02.78#ibcon#about to read 4, iclass 23, count 0 2006.232.07:42:02.78#ibcon#read 4, iclass 23, count 0 2006.232.07:42:02.78#ibcon#about to read 5, iclass 23, count 0 2006.232.07:42:02.78#ibcon#read 5, iclass 23, count 0 2006.232.07:42:02.78#ibcon#about to read 6, iclass 23, count 0 2006.232.07:42:02.78#ibcon#read 6, iclass 23, count 0 2006.232.07:42:02.78#ibcon#end of sib2, iclass 23, count 0 2006.232.07:42:02.78#ibcon#*after write, iclass 23, count 0 2006.232.07:42:02.78#ibcon#*before return 0, iclass 23, count 0 2006.232.07:42:02.78#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.232.07:42:02.78#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.232.07:42:02.78#ibcon#about to clear, iclass 23 cls_cnt 0 2006.232.07:42:02.78#ibcon#cleared, iclass 23 cls_cnt 0 2006.232.07:42:02.78$4f8m12a/ifd4f 2006.232.07:42:02.78$ifd4f/lo= 2006.232.07:42:02.78$ifd4f/lo=lo1,7680.00,usb,rcp,1 2006.232.07:42:02.78$ifd4f/lo=lo2,1600.00,usb,rcp,1 2006.232.07:42:02.78$ifd4f/lo=lo3,8080.00,usb,rcp,1 2006.232.07:42:02.78$ifd4f/patch= 2006.232.07:42:02.78$ifd4f/patch=lo1,a1,a2,a3,a4 2006.232.07:42:02.79$ifd4f/patch=lo2,b1,b2,b3,b4,b5,b6 2006.232.07:42:02.79$ifd4f/patch=lo3,a5,a6,a7,a8 2006.232.07:42:02.79$4f8m12a/"form=m,16.000,1:2 2006.232.07:42:02.79$4f8m12a/"tpicd 2006.232.07:42:02.79$4f8m12a/echo=off 2006.232.07:42:02.79$4f8m12a/xlog=off 2006.232.07:42:02.79:!2006.232.07:42:30 2006.232.07:42:12.13#trakl#Source acquired 2006.232.07:42:14.13#flagr#flagr/antenna,acquired 2006.232.07:42:30.01:preob 2006.232.07:42:31.13/onsource/TRACKING 2006.232.07:42:31.13:!2006.232.07:42:40 2006.232.07:42:40.00:data_valid=on 2006.232.07:42:40.00:midob 2006.232.07:42:40.13/onsource/TRACKING 2006.232.07:42:40.13/wx/29.43,1007.2,87 2006.232.07:42:40.29/cable/+6.3875E-03 2006.232.07:42:41.38/va/01,08,usb,yes,31,32 2006.232.07:42:41.38/va/02,07,usb,yes,31,32 2006.232.07:42:41.38/va/03,08,usb,yes,23,23 2006.232.07:42:41.38/va/04,07,usb,yes,32,35 2006.232.07:42:41.38/va/05,07,usb,yes,36,38 2006.232.07:42:41.38/va/06,06,usb,yes,35,35 2006.232.07:42:41.38/va/07,06,usb,yes,36,36 2006.232.07:42:41.38/va/08,06,usb,yes,38,38 2006.232.07:42:41.61/valo/01,532.99,yes,locked 2006.232.07:42:41.61/valo/02,572.99,yes,locked 2006.232.07:42:41.61/valo/03,672.99,yes,locked 2006.232.07:42:41.61/valo/04,832.99,yes,locked 2006.232.07:42:41.61/valo/05,652.99,yes,locked 2006.232.07:42:41.61/valo/06,772.99,yes,locked 2006.232.07:42:41.61/valo/07,832.99,yes,locked 2006.232.07:42:41.61/valo/08,852.99,yes,locked 2006.232.07:42:42.70/vb/01,04,usb,yes,30,29 2006.232.07:42:42.70/vb/02,04,usb,yes,32,34 2006.232.07:42:42.70/vb/03,04,usb,yes,29,32 2006.232.07:42:42.70/vb/04,04,usb,yes,29,30 2006.232.07:42:42.70/vb/05,03,usb,yes,35,39 2006.232.07:42:42.70/vb/06,04,usb,yes,29,32 2006.232.07:42:42.70/vb/07,04,usb,yes,31,31 2006.232.07:42:42.70/vb/08,04,usb,yes,29,32 2006.232.07:42:42.94/vblo/01,632.99,yes,locked 2006.232.07:42:42.94/vblo/02,640.99,yes,locked 2006.232.07:42:42.94/vblo/03,656.99,yes,locked 2006.232.07:42:42.94/vblo/04,712.99,yes,locked 2006.232.07:42:42.94/vblo/05,744.99,yes,locked 2006.232.07:42:42.94/vblo/06,752.99,yes,locked 2006.232.07:42:42.94/vblo/07,734.99,yes,locked 2006.232.07:42:42.94/vblo/08,744.99,yes,locked 2006.232.07:42:43.09/vabw/8 2006.232.07:42:43.24/vbbw/8 2006.232.07:42:43.33/xfe/off,on,13.2 2006.232.07:42:43.70/ifatt/23,28,28,28 2006.232.07:42:44.07/fmout-gps/S +4.39E-07 2006.232.07:42:44.15:!2006.232.07:43:40 2006.232.07:43:40.01:data_valid=off 2006.232.07:43:40.02:postob 2006.232.07:43:40.25/cable/+6.3858E-03 2006.232.07:43:40.26/wx/29.43,1007.2,87 2006.232.07:43:41.07/fmout-gps/S +4.40E-07 2006.232.07:43:41.08:scan_name=232-0744,k06232,70 2006.232.07:43:41.08:source=1116+128,111857.30,123441.7,2000.0,ccw 2006.232.07:43:42.14#flagr#flagr/antenna,new-source 2006.232.07:43:42.14:checkk5 2006.232.07:43:42.53/chk_autoobs//k5ts1/ autoobs is running! 2006.232.07:43:42.92/chk_autoobs//k5ts2/ autoobs is running! 2006.232.07:43:43.30/chk_autoobs//k5ts3/ autoobs is running! 2006.232.07:43:43.68/chk_autoobs//k5ts4/ autoobs is running! 2006.232.07:43:44.04/chk_obsdata//k5ts1/T2320742??a.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:43:44.41/chk_obsdata//k5ts2/T2320742??b.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:43:44.77/chk_obsdata//k5ts3/T2320742??c.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:43:45.15/chk_obsdata//k5ts4/T2320742??d.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:43:45.83/k5log//k5ts1_log_newline 2006.232.07:43:46.52/k5log//k5ts2_log_newline 2006.232.07:43:47.20/k5log//k5ts3_log_newline 2006.232.07:43:47.89/k5log//k5ts4_log_newline 2006.232.07:43:47.91/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.232.07:43:47.91:4f8m12a=1 2006.232.07:43:47.91$4f8m12a/echo=on 2006.232.07:43:47.91$4f8m12a/pcalon 2006.232.07:43:47.91$pcalon/"no phase cal control is implemented here 2006.232.07:43:47.91$4f8m12a/"tpicd=stop 2006.232.07:43:47.91$4f8m12a/vc4f8 2006.232.07:43:47.91$vc4f8/valo=1,532.99 2006.232.07:43:47.91#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.232.07:43:47.91#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.232.07:43:47.91#ibcon#ireg 17 cls_cnt 0 2006.232.07:43:47.91#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.232.07:43:47.91#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.232.07:43:47.91#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.232.07:43:47.91#ibcon#enter wrdev, iclass 30, count 0 2006.232.07:43:47.91#ibcon#first serial, iclass 30, count 0 2006.232.07:43:47.91#ibcon#enter sib2, iclass 30, count 0 2006.232.07:43:47.91#ibcon#flushed, iclass 30, count 0 2006.232.07:43:47.91#ibcon#about to write, iclass 30, count 0 2006.232.07:43:47.91#ibcon#wrote, iclass 30, count 0 2006.232.07:43:47.91#ibcon#about to read 3, iclass 30, count 0 2006.232.07:43:47.96#ibcon#read 3, iclass 30, count 0 2006.232.07:43:47.96#ibcon#about to read 4, iclass 30, count 0 2006.232.07:43:47.96#ibcon#read 4, iclass 30, count 0 2006.232.07:43:47.96#ibcon#about to read 5, iclass 30, count 0 2006.232.07:43:47.96#ibcon#read 5, iclass 30, count 0 2006.232.07:43:47.96#ibcon#about to read 6, iclass 30, count 0 2006.232.07:43:47.96#ibcon#read 6, iclass 30, count 0 2006.232.07:43:47.96#ibcon#end of sib2, iclass 30, count 0 2006.232.07:43:47.96#ibcon#*mode == 0, iclass 30, count 0 2006.232.07:43:47.96#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.232.07:43:47.96#ibcon#[26=FRQ=01,532.99\r\n] 2006.232.07:43:47.96#ibcon#*before write, iclass 30, count 0 2006.232.07:43:47.96#ibcon#enter sib2, iclass 30, count 0 2006.232.07:43:47.96#ibcon#flushed, iclass 30, count 0 2006.232.07:43:47.96#ibcon#about to write, iclass 30, count 0 2006.232.07:43:47.96#ibcon#wrote, iclass 30, count 0 2006.232.07:43:47.96#ibcon#about to read 3, iclass 30, count 0 2006.232.07:43:48.00#ibcon#read 3, iclass 30, count 0 2006.232.07:43:48.00#ibcon#about to read 4, iclass 30, count 0 2006.232.07:43:48.00#ibcon#read 4, iclass 30, count 0 2006.232.07:43:48.00#ibcon#about to read 5, iclass 30, count 0 2006.232.07:43:48.00#ibcon#read 5, iclass 30, count 0 2006.232.07:43:48.00#ibcon#about to read 6, iclass 30, count 0 2006.232.07:43:48.00#ibcon#read 6, iclass 30, count 0 2006.232.07:43:48.00#ibcon#end of sib2, iclass 30, count 0 2006.232.07:43:48.00#ibcon#*after write, iclass 30, count 0 2006.232.07:43:48.00#ibcon#*before return 0, iclass 30, count 0 2006.232.07:43:48.00#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.232.07:43:48.00#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.232.07:43:48.00#ibcon#about to clear, iclass 30 cls_cnt 0 2006.232.07:43:48.00#ibcon#cleared, iclass 30 cls_cnt 0 2006.232.07:43:48.00$vc4f8/va=1,8 2006.232.07:43:48.00#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.232.07:43:48.00#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.232.07:43:48.00#ibcon#ireg 11 cls_cnt 2 2006.232.07:43:48.00#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.232.07:43:48.00#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.232.07:43:48.00#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.232.07:43:48.00#ibcon#enter wrdev, iclass 32, count 2 2006.232.07:43:48.00#ibcon#first serial, iclass 32, count 2 2006.232.07:43:48.00#ibcon#enter sib2, iclass 32, count 2 2006.232.07:43:48.00#ibcon#flushed, iclass 32, count 2 2006.232.07:43:48.00#ibcon#about to write, iclass 32, count 2 2006.232.07:43:48.00#ibcon#wrote, iclass 32, count 2 2006.232.07:43:48.00#ibcon#about to read 3, iclass 32, count 2 2006.232.07:43:48.03#ibcon#read 3, iclass 32, count 2 2006.232.07:43:48.03#ibcon#about to read 4, iclass 32, count 2 2006.232.07:43:48.03#ibcon#read 4, iclass 32, count 2 2006.232.07:43:48.03#ibcon#about to read 5, iclass 32, count 2 2006.232.07:43:48.03#ibcon#read 5, iclass 32, count 2 2006.232.07:43:48.03#ibcon#about to read 6, iclass 32, count 2 2006.232.07:43:48.03#ibcon#read 6, iclass 32, count 2 2006.232.07:43:48.03#ibcon#end of sib2, iclass 32, count 2 2006.232.07:43:48.03#ibcon#*mode == 0, iclass 32, count 2 2006.232.07:43:48.03#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.232.07:43:48.03#ibcon#[25=AT01-08\r\n] 2006.232.07:43:48.03#ibcon#*before write, iclass 32, count 2 2006.232.07:43:48.03#ibcon#enter sib2, iclass 32, count 2 2006.232.07:43:48.03#ibcon#flushed, iclass 32, count 2 2006.232.07:43:48.03#ibcon#about to write, iclass 32, count 2 2006.232.07:43:48.03#ibcon#wrote, iclass 32, count 2 2006.232.07:43:48.03#ibcon#about to read 3, iclass 32, count 2 2006.232.07:43:48.06#ibcon#read 3, iclass 32, count 2 2006.232.07:43:48.06#ibcon#about to read 4, iclass 32, count 2 2006.232.07:43:48.06#ibcon#read 4, iclass 32, count 2 2006.232.07:43:48.06#ibcon#about to read 5, iclass 32, count 2 2006.232.07:43:48.06#ibcon#read 5, iclass 32, count 2 2006.232.07:43:48.06#ibcon#about to read 6, iclass 32, count 2 2006.232.07:43:48.06#ibcon#read 6, iclass 32, count 2 2006.232.07:43:48.06#ibcon#end of sib2, iclass 32, count 2 2006.232.07:43:48.06#ibcon#*after write, iclass 32, count 2 2006.232.07:43:48.06#ibcon#*before return 0, iclass 32, count 2 2006.232.07:43:48.06#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.232.07:43:48.06#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.232.07:43:48.06#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.232.07:43:48.06#ibcon#ireg 7 cls_cnt 0 2006.232.07:43:48.06#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.232.07:43:48.18#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.232.07:43:48.18#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.232.07:43:48.18#ibcon#enter wrdev, iclass 32, count 0 2006.232.07:43:48.18#ibcon#first serial, iclass 32, count 0 2006.232.07:43:48.18#ibcon#enter sib2, iclass 32, count 0 2006.232.07:43:48.18#ibcon#flushed, iclass 32, count 0 2006.232.07:43:48.18#ibcon#about to write, iclass 32, count 0 2006.232.07:43:48.18#ibcon#wrote, iclass 32, count 0 2006.232.07:43:48.18#ibcon#about to read 3, iclass 32, count 0 2006.232.07:43:48.20#ibcon#read 3, iclass 32, count 0 2006.232.07:43:48.20#ibcon#about to read 4, iclass 32, count 0 2006.232.07:43:48.20#ibcon#read 4, iclass 32, count 0 2006.232.07:43:48.20#ibcon#about to read 5, iclass 32, count 0 2006.232.07:43:48.20#ibcon#read 5, iclass 32, count 0 2006.232.07:43:48.20#ibcon#about to read 6, iclass 32, count 0 2006.232.07:43:48.20#ibcon#read 6, iclass 32, count 0 2006.232.07:43:48.20#ibcon#end of sib2, iclass 32, count 0 2006.232.07:43:48.20#ibcon#*mode == 0, iclass 32, count 0 2006.232.07:43:48.20#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.232.07:43:48.20#ibcon#[25=USB\r\n] 2006.232.07:43:48.20#ibcon#*before write, iclass 32, count 0 2006.232.07:43:48.20#ibcon#enter sib2, iclass 32, count 0 2006.232.07:43:48.20#ibcon#flushed, iclass 32, count 0 2006.232.07:43:48.20#ibcon#about to write, iclass 32, count 0 2006.232.07:43:48.20#ibcon#wrote, iclass 32, count 0 2006.232.07:43:48.20#ibcon#about to read 3, iclass 32, count 0 2006.232.07:43:48.24#ibcon#read 3, iclass 32, count 0 2006.232.07:43:48.24#ibcon#about to read 4, iclass 32, count 0 2006.232.07:43:48.24#ibcon#read 4, iclass 32, count 0 2006.232.07:43:48.24#ibcon#about to read 5, iclass 32, count 0 2006.232.07:43:48.24#ibcon#read 5, iclass 32, count 0 2006.232.07:43:48.24#ibcon#about to read 6, iclass 32, count 0 2006.232.07:43:48.24#ibcon#read 6, iclass 32, count 0 2006.232.07:43:48.24#ibcon#end of sib2, iclass 32, count 0 2006.232.07:43:48.24#ibcon#*after write, iclass 32, count 0 2006.232.07:43:48.24#ibcon#*before return 0, iclass 32, count 0 2006.232.07:43:48.24#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.232.07:43:48.24#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.232.07:43:48.24#ibcon#about to clear, iclass 32 cls_cnt 0 2006.232.07:43:48.24#ibcon#cleared, iclass 32 cls_cnt 0 2006.232.07:43:48.24$vc4f8/valo=2,572.99 2006.232.07:43:48.24#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.232.07:43:48.24#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.232.07:43:48.24#ibcon#ireg 17 cls_cnt 0 2006.232.07:43:48.24#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.232.07:43:48.24#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.232.07:43:48.24#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.232.07:43:48.24#ibcon#enter wrdev, iclass 34, count 0 2006.232.07:43:48.24#ibcon#first serial, iclass 34, count 0 2006.232.07:43:48.24#ibcon#enter sib2, iclass 34, count 0 2006.232.07:43:48.24#ibcon#flushed, iclass 34, count 0 2006.232.07:43:48.24#ibcon#about to write, iclass 34, count 0 2006.232.07:43:48.24#ibcon#wrote, iclass 34, count 0 2006.232.07:43:48.24#ibcon#about to read 3, iclass 34, count 0 2006.232.07:43:48.25#ibcon#read 3, iclass 34, count 0 2006.232.07:43:48.25#ibcon#about to read 4, iclass 34, count 0 2006.232.07:43:48.25#ibcon#read 4, iclass 34, count 0 2006.232.07:43:48.25#ibcon#about to read 5, iclass 34, count 0 2006.232.07:43:48.25#ibcon#read 5, iclass 34, count 0 2006.232.07:43:48.25#ibcon#about to read 6, iclass 34, count 0 2006.232.07:43:48.25#ibcon#read 6, iclass 34, count 0 2006.232.07:43:48.25#ibcon#end of sib2, iclass 34, count 0 2006.232.07:43:48.25#ibcon#*mode == 0, iclass 34, count 0 2006.232.07:43:48.25#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.232.07:43:48.25#ibcon#[26=FRQ=02,572.99\r\n] 2006.232.07:43:48.25#ibcon#*before write, iclass 34, count 0 2006.232.07:43:48.25#ibcon#enter sib2, iclass 34, count 0 2006.232.07:43:48.25#ibcon#flushed, iclass 34, count 0 2006.232.07:43:48.25#ibcon#about to write, iclass 34, count 0 2006.232.07:43:48.25#ibcon#wrote, iclass 34, count 0 2006.232.07:43:48.25#ibcon#about to read 3, iclass 34, count 0 2006.232.07:43:48.29#ibcon#read 3, iclass 34, count 0 2006.232.07:43:48.29#ibcon#about to read 4, iclass 34, count 0 2006.232.07:43:48.29#ibcon#read 4, iclass 34, count 0 2006.232.07:43:48.29#ibcon#about to read 5, iclass 34, count 0 2006.232.07:43:48.29#ibcon#read 5, iclass 34, count 0 2006.232.07:43:48.29#ibcon#about to read 6, iclass 34, count 0 2006.232.07:43:48.29#ibcon#read 6, iclass 34, count 0 2006.232.07:43:48.29#ibcon#end of sib2, iclass 34, count 0 2006.232.07:43:48.29#ibcon#*after write, iclass 34, count 0 2006.232.07:43:48.29#ibcon#*before return 0, iclass 34, count 0 2006.232.07:43:48.29#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.232.07:43:48.29#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.232.07:43:48.29#ibcon#about to clear, iclass 34 cls_cnt 0 2006.232.07:43:48.29#ibcon#cleared, iclass 34 cls_cnt 0 2006.232.07:43:48.29$vc4f8/va=2,7 2006.232.07:43:48.29#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.232.07:43:48.29#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.232.07:43:48.29#ibcon#ireg 11 cls_cnt 2 2006.232.07:43:48.29#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.232.07:43:48.37#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.232.07:43:48.37#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.232.07:43:48.37#ibcon#enter wrdev, iclass 36, count 2 2006.232.07:43:48.37#ibcon#first serial, iclass 36, count 2 2006.232.07:43:48.37#ibcon#enter sib2, iclass 36, count 2 2006.232.07:43:48.37#ibcon#flushed, iclass 36, count 2 2006.232.07:43:48.37#ibcon#about to write, iclass 36, count 2 2006.232.07:43:48.37#ibcon#wrote, iclass 36, count 2 2006.232.07:43:48.37#ibcon#about to read 3, iclass 36, count 2 2006.232.07:43:48.38#ibcon#read 3, iclass 36, count 2 2006.232.07:43:48.38#ibcon#about to read 4, iclass 36, count 2 2006.232.07:43:48.38#ibcon#read 4, iclass 36, count 2 2006.232.07:43:48.38#ibcon#about to read 5, iclass 36, count 2 2006.232.07:43:48.38#ibcon#read 5, iclass 36, count 2 2006.232.07:43:48.38#ibcon#about to read 6, iclass 36, count 2 2006.232.07:43:48.38#ibcon#read 6, iclass 36, count 2 2006.232.07:43:48.38#ibcon#end of sib2, iclass 36, count 2 2006.232.07:43:48.38#ibcon#*mode == 0, iclass 36, count 2 2006.232.07:43:48.38#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.232.07:43:48.38#ibcon#[25=AT02-07\r\n] 2006.232.07:43:48.38#ibcon#*before write, iclass 36, count 2 2006.232.07:43:48.38#ibcon#enter sib2, iclass 36, count 2 2006.232.07:43:48.38#ibcon#flushed, iclass 36, count 2 2006.232.07:43:48.38#ibcon#about to write, iclass 36, count 2 2006.232.07:43:48.38#ibcon#wrote, iclass 36, count 2 2006.232.07:43:48.38#ibcon#about to read 3, iclass 36, count 2 2006.232.07:43:48.41#ibcon#read 3, iclass 36, count 2 2006.232.07:43:48.41#ibcon#about to read 4, iclass 36, count 2 2006.232.07:43:48.41#ibcon#read 4, iclass 36, count 2 2006.232.07:43:48.41#ibcon#about to read 5, iclass 36, count 2 2006.232.07:43:48.41#ibcon#read 5, iclass 36, count 2 2006.232.07:43:48.41#ibcon#about to read 6, iclass 36, count 2 2006.232.07:43:48.41#ibcon#read 6, iclass 36, count 2 2006.232.07:43:48.41#ibcon#end of sib2, iclass 36, count 2 2006.232.07:43:48.41#ibcon#*after write, iclass 36, count 2 2006.232.07:43:48.41#ibcon#*before return 0, iclass 36, count 2 2006.232.07:43:48.41#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.232.07:43:48.41#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.232.07:43:48.41#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.232.07:43:48.41#ibcon#ireg 7 cls_cnt 0 2006.232.07:43:48.41#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.232.07:43:48.54#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.232.07:43:48.54#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.232.07:43:48.54#ibcon#enter wrdev, iclass 36, count 0 2006.232.07:43:48.54#ibcon#first serial, iclass 36, count 0 2006.232.07:43:48.54#ibcon#enter sib2, iclass 36, count 0 2006.232.07:43:48.54#ibcon#flushed, iclass 36, count 0 2006.232.07:43:48.54#ibcon#about to write, iclass 36, count 0 2006.232.07:43:48.54#ibcon#wrote, iclass 36, count 0 2006.232.07:43:48.54#ibcon#about to read 3, iclass 36, count 0 2006.232.07:43:48.56#ibcon#read 3, iclass 36, count 0 2006.232.07:43:48.56#ibcon#about to read 4, iclass 36, count 0 2006.232.07:43:48.56#ibcon#read 4, iclass 36, count 0 2006.232.07:43:48.56#ibcon#about to read 5, iclass 36, count 0 2006.232.07:43:48.56#ibcon#read 5, iclass 36, count 0 2006.232.07:43:48.56#ibcon#about to read 6, iclass 36, count 0 2006.232.07:43:48.56#ibcon#read 6, iclass 36, count 0 2006.232.07:43:48.56#ibcon#end of sib2, iclass 36, count 0 2006.232.07:43:48.56#ibcon#*mode == 0, iclass 36, count 0 2006.232.07:43:48.56#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.232.07:43:48.56#ibcon#[25=USB\r\n] 2006.232.07:43:48.56#ibcon#*before write, iclass 36, count 0 2006.232.07:43:48.56#ibcon#enter sib2, iclass 36, count 0 2006.232.07:43:48.56#ibcon#flushed, iclass 36, count 0 2006.232.07:43:48.56#ibcon#about to write, iclass 36, count 0 2006.232.07:43:48.56#ibcon#wrote, iclass 36, count 0 2006.232.07:43:48.56#ibcon#about to read 3, iclass 36, count 0 2006.232.07:43:48.58#ibcon#read 3, iclass 36, count 0 2006.232.07:43:48.58#ibcon#about to read 4, iclass 36, count 0 2006.232.07:43:48.58#ibcon#read 4, iclass 36, count 0 2006.232.07:43:48.58#ibcon#about to read 5, iclass 36, count 0 2006.232.07:43:48.58#ibcon#read 5, iclass 36, count 0 2006.232.07:43:48.58#ibcon#about to read 6, iclass 36, count 0 2006.232.07:43:48.58#ibcon#read 6, iclass 36, count 0 2006.232.07:43:48.58#ibcon#end of sib2, iclass 36, count 0 2006.232.07:43:48.58#ibcon#*after write, iclass 36, count 0 2006.232.07:43:48.58#ibcon#*before return 0, iclass 36, count 0 2006.232.07:43:48.58#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.232.07:43:48.58#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.232.07:43:48.58#ibcon#about to clear, iclass 36 cls_cnt 0 2006.232.07:43:48.58#ibcon#cleared, iclass 36 cls_cnt 0 2006.232.07:43:48.58$vc4f8/valo=3,672.99 2006.232.07:43:48.58#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.232.07:43:48.58#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.232.07:43:48.58#ibcon#ireg 17 cls_cnt 0 2006.232.07:43:48.58#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.232.07:43:48.58#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.232.07:43:48.58#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.232.07:43:48.58#ibcon#enter wrdev, iclass 38, count 0 2006.232.07:43:48.58#ibcon#first serial, iclass 38, count 0 2006.232.07:43:48.58#ibcon#enter sib2, iclass 38, count 0 2006.232.07:43:48.58#ibcon#flushed, iclass 38, count 0 2006.232.07:43:48.58#ibcon#about to write, iclass 38, count 0 2006.232.07:43:48.58#ibcon#wrote, iclass 38, count 0 2006.232.07:43:48.58#ibcon#about to read 3, iclass 38, count 0 2006.232.07:43:48.60#ibcon#read 3, iclass 38, count 0 2006.232.07:43:48.60#ibcon#about to read 4, iclass 38, count 0 2006.232.07:43:48.60#ibcon#read 4, iclass 38, count 0 2006.232.07:43:48.60#ibcon#about to read 5, iclass 38, count 0 2006.232.07:43:48.60#ibcon#read 5, iclass 38, count 0 2006.232.07:43:48.60#ibcon#about to read 6, iclass 38, count 0 2006.232.07:43:48.60#ibcon#read 6, iclass 38, count 0 2006.232.07:43:48.60#ibcon#end of sib2, iclass 38, count 0 2006.232.07:43:48.60#ibcon#*mode == 0, iclass 38, count 0 2006.232.07:43:48.60#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.232.07:43:48.60#ibcon#[26=FRQ=03,672.99\r\n] 2006.232.07:43:48.60#ibcon#*before write, iclass 38, count 0 2006.232.07:43:48.60#ibcon#enter sib2, iclass 38, count 0 2006.232.07:43:48.60#ibcon#flushed, iclass 38, count 0 2006.232.07:43:48.60#ibcon#about to write, iclass 38, count 0 2006.232.07:43:48.60#ibcon#wrote, iclass 38, count 0 2006.232.07:43:48.60#ibcon#about to read 3, iclass 38, count 0 2006.232.07:43:48.64#ibcon#read 3, iclass 38, count 0 2006.232.07:43:48.64#ibcon#about to read 4, iclass 38, count 0 2006.232.07:43:48.64#ibcon#read 4, iclass 38, count 0 2006.232.07:43:48.64#ibcon#about to read 5, iclass 38, count 0 2006.232.07:43:48.64#ibcon#read 5, iclass 38, count 0 2006.232.07:43:48.64#ibcon#about to read 6, iclass 38, count 0 2006.232.07:43:48.64#ibcon#read 6, iclass 38, count 0 2006.232.07:43:48.64#ibcon#end of sib2, iclass 38, count 0 2006.232.07:43:48.64#ibcon#*after write, iclass 38, count 0 2006.232.07:43:48.64#ibcon#*before return 0, iclass 38, count 0 2006.232.07:43:48.64#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.232.07:43:48.64#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.232.07:43:48.64#ibcon#about to clear, iclass 38 cls_cnt 0 2006.232.07:43:48.64#ibcon#cleared, iclass 38 cls_cnt 0 2006.232.07:43:48.64$vc4f8/va=3,8 2006.232.07:43:48.64#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.232.07:43:48.64#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.232.07:43:48.64#ibcon#ireg 11 cls_cnt 2 2006.232.07:43:48.64#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.232.07:43:48.70#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.232.07:43:48.70#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.232.07:43:48.70#ibcon#enter wrdev, iclass 40, count 2 2006.232.07:43:48.70#ibcon#first serial, iclass 40, count 2 2006.232.07:43:48.70#ibcon#enter sib2, iclass 40, count 2 2006.232.07:43:48.70#ibcon#flushed, iclass 40, count 2 2006.232.07:43:48.70#ibcon#about to write, iclass 40, count 2 2006.232.07:43:48.70#ibcon#wrote, iclass 40, count 2 2006.232.07:43:48.70#ibcon#about to read 3, iclass 40, count 2 2006.232.07:43:48.72#ibcon#read 3, iclass 40, count 2 2006.232.07:43:48.72#ibcon#about to read 4, iclass 40, count 2 2006.232.07:43:48.72#ibcon#read 4, iclass 40, count 2 2006.232.07:43:48.72#ibcon#about to read 5, iclass 40, count 2 2006.232.07:43:48.72#ibcon#read 5, iclass 40, count 2 2006.232.07:43:48.72#ibcon#about to read 6, iclass 40, count 2 2006.232.07:43:48.72#ibcon#read 6, iclass 40, count 2 2006.232.07:43:48.72#ibcon#end of sib2, iclass 40, count 2 2006.232.07:43:48.72#ibcon#*mode == 0, iclass 40, count 2 2006.232.07:43:48.72#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.232.07:43:48.72#ibcon#[25=AT03-08\r\n] 2006.232.07:43:48.72#ibcon#*before write, iclass 40, count 2 2006.232.07:43:48.72#ibcon#enter sib2, iclass 40, count 2 2006.232.07:43:48.72#ibcon#flushed, iclass 40, count 2 2006.232.07:43:48.72#ibcon#about to write, iclass 40, count 2 2006.232.07:43:48.72#ibcon#wrote, iclass 40, count 2 2006.232.07:43:48.72#ibcon#about to read 3, iclass 40, count 2 2006.232.07:43:48.75#ibcon#read 3, iclass 40, count 2 2006.232.07:43:48.75#ibcon#about to read 4, iclass 40, count 2 2006.232.07:43:48.75#ibcon#read 4, iclass 40, count 2 2006.232.07:43:48.75#ibcon#about to read 5, iclass 40, count 2 2006.232.07:43:48.75#ibcon#read 5, iclass 40, count 2 2006.232.07:43:48.75#ibcon#about to read 6, iclass 40, count 2 2006.232.07:43:48.75#ibcon#read 6, iclass 40, count 2 2006.232.07:43:48.75#ibcon#end of sib2, iclass 40, count 2 2006.232.07:43:48.75#ibcon#*after write, iclass 40, count 2 2006.232.07:43:48.75#ibcon#*before return 0, iclass 40, count 2 2006.232.07:43:48.75#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.232.07:43:48.75#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.232.07:43:48.75#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.232.07:43:48.75#ibcon#ireg 7 cls_cnt 0 2006.232.07:43:48.75#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.232.07:43:48.87#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.232.07:43:48.87#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.232.07:43:48.87#ibcon#enter wrdev, iclass 40, count 0 2006.232.07:43:48.87#ibcon#first serial, iclass 40, count 0 2006.232.07:43:48.87#ibcon#enter sib2, iclass 40, count 0 2006.232.07:43:48.87#ibcon#flushed, iclass 40, count 0 2006.232.07:43:48.87#ibcon#about to write, iclass 40, count 0 2006.232.07:43:48.87#ibcon#wrote, iclass 40, count 0 2006.232.07:43:48.87#ibcon#about to read 3, iclass 40, count 0 2006.232.07:43:48.89#ibcon#read 3, iclass 40, count 0 2006.232.07:43:48.89#ibcon#about to read 4, iclass 40, count 0 2006.232.07:43:48.89#ibcon#read 4, iclass 40, count 0 2006.232.07:43:48.89#ibcon#about to read 5, iclass 40, count 0 2006.232.07:43:48.89#ibcon#read 5, iclass 40, count 0 2006.232.07:43:48.89#ibcon#about to read 6, iclass 40, count 0 2006.232.07:43:48.89#ibcon#read 6, iclass 40, count 0 2006.232.07:43:48.89#ibcon#end of sib2, iclass 40, count 0 2006.232.07:43:48.89#ibcon#*mode == 0, iclass 40, count 0 2006.232.07:43:48.89#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.232.07:43:48.89#ibcon#[25=USB\r\n] 2006.232.07:43:48.89#ibcon#*before write, iclass 40, count 0 2006.232.07:43:48.89#ibcon#enter sib2, iclass 40, count 0 2006.232.07:43:48.89#ibcon#flushed, iclass 40, count 0 2006.232.07:43:48.89#ibcon#about to write, iclass 40, count 0 2006.232.07:43:48.89#ibcon#wrote, iclass 40, count 0 2006.232.07:43:48.89#ibcon#about to read 3, iclass 40, count 0 2006.232.07:43:48.92#ibcon#read 3, iclass 40, count 0 2006.232.07:43:48.92#ibcon#about to read 4, iclass 40, count 0 2006.232.07:43:48.92#ibcon#read 4, iclass 40, count 0 2006.232.07:43:48.92#ibcon#about to read 5, iclass 40, count 0 2006.232.07:43:48.92#ibcon#read 5, iclass 40, count 0 2006.232.07:43:48.92#ibcon#about to read 6, iclass 40, count 0 2006.232.07:43:48.92#ibcon#read 6, iclass 40, count 0 2006.232.07:43:48.92#ibcon#end of sib2, iclass 40, count 0 2006.232.07:43:48.92#ibcon#*after write, iclass 40, count 0 2006.232.07:43:48.92#ibcon#*before return 0, iclass 40, count 0 2006.232.07:43:48.92#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.232.07:43:48.92#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.232.07:43:48.92#ibcon#about to clear, iclass 40 cls_cnt 0 2006.232.07:43:48.92#ibcon#cleared, iclass 40 cls_cnt 0 2006.232.07:43:48.92$vc4f8/valo=4,832.99 2006.232.07:43:48.92#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.232.07:43:48.92#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.232.07:43:48.92#ibcon#ireg 17 cls_cnt 0 2006.232.07:43:48.92#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.232.07:43:48.92#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.232.07:43:48.92#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.232.07:43:48.92#ibcon#enter wrdev, iclass 4, count 0 2006.232.07:43:48.92#ibcon#first serial, iclass 4, count 0 2006.232.07:43:48.92#ibcon#enter sib2, iclass 4, count 0 2006.232.07:43:48.92#ibcon#flushed, iclass 4, count 0 2006.232.07:43:48.92#ibcon#about to write, iclass 4, count 0 2006.232.07:43:48.92#ibcon#wrote, iclass 4, count 0 2006.232.07:43:48.92#ibcon#about to read 3, iclass 4, count 0 2006.232.07:43:48.94#ibcon#read 3, iclass 4, count 0 2006.232.07:43:48.94#ibcon#about to read 4, iclass 4, count 0 2006.232.07:43:48.94#ibcon#read 4, iclass 4, count 0 2006.232.07:43:48.94#ibcon#about to read 5, iclass 4, count 0 2006.232.07:43:48.94#ibcon#read 5, iclass 4, count 0 2006.232.07:43:48.94#ibcon#about to read 6, iclass 4, count 0 2006.232.07:43:48.94#ibcon#read 6, iclass 4, count 0 2006.232.07:43:48.94#ibcon#end of sib2, iclass 4, count 0 2006.232.07:43:48.94#ibcon#*mode == 0, iclass 4, count 0 2006.232.07:43:48.94#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.232.07:43:48.94#ibcon#[26=FRQ=04,832.99\r\n] 2006.232.07:43:48.94#ibcon#*before write, iclass 4, count 0 2006.232.07:43:48.94#ibcon#enter sib2, iclass 4, count 0 2006.232.07:43:48.94#ibcon#flushed, iclass 4, count 0 2006.232.07:43:48.94#ibcon#about to write, iclass 4, count 0 2006.232.07:43:48.94#ibcon#wrote, iclass 4, count 0 2006.232.07:43:48.94#ibcon#about to read 3, iclass 4, count 0 2006.232.07:43:48.98#ibcon#read 3, iclass 4, count 0 2006.232.07:43:48.98#ibcon#about to read 4, iclass 4, count 0 2006.232.07:43:48.98#ibcon#read 4, iclass 4, count 0 2006.232.07:43:48.98#ibcon#about to read 5, iclass 4, count 0 2006.232.07:43:48.98#ibcon#read 5, iclass 4, count 0 2006.232.07:43:48.98#ibcon#about to read 6, iclass 4, count 0 2006.232.07:43:48.98#ibcon#read 6, iclass 4, count 0 2006.232.07:43:48.98#ibcon#end of sib2, iclass 4, count 0 2006.232.07:43:48.98#ibcon#*after write, iclass 4, count 0 2006.232.07:43:48.98#ibcon#*before return 0, iclass 4, count 0 2006.232.07:43:48.98#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.232.07:43:48.98#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.232.07:43:48.98#ibcon#about to clear, iclass 4 cls_cnt 0 2006.232.07:43:48.98#ibcon#cleared, iclass 4 cls_cnt 0 2006.232.07:43:48.98$vc4f8/va=4,7 2006.232.07:43:48.98#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.232.07:43:48.98#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.232.07:43:48.98#ibcon#ireg 11 cls_cnt 2 2006.232.07:43:48.98#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.232.07:43:49.04#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.232.07:43:49.04#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.232.07:43:49.04#ibcon#enter wrdev, iclass 6, count 2 2006.232.07:43:49.04#ibcon#first serial, iclass 6, count 2 2006.232.07:43:49.04#ibcon#enter sib2, iclass 6, count 2 2006.232.07:43:49.04#ibcon#flushed, iclass 6, count 2 2006.232.07:43:49.04#ibcon#about to write, iclass 6, count 2 2006.232.07:43:49.04#ibcon#wrote, iclass 6, count 2 2006.232.07:43:49.04#ibcon#about to read 3, iclass 6, count 2 2006.232.07:43:49.06#ibcon#read 3, iclass 6, count 2 2006.232.07:43:49.06#ibcon#about to read 4, iclass 6, count 2 2006.232.07:43:49.06#ibcon#read 4, iclass 6, count 2 2006.232.07:43:49.06#ibcon#about to read 5, iclass 6, count 2 2006.232.07:43:49.06#ibcon#read 5, iclass 6, count 2 2006.232.07:43:49.06#ibcon#about to read 6, iclass 6, count 2 2006.232.07:43:49.06#ibcon#read 6, iclass 6, count 2 2006.232.07:43:49.06#ibcon#end of sib2, iclass 6, count 2 2006.232.07:43:49.06#ibcon#*mode == 0, iclass 6, count 2 2006.232.07:43:49.06#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.232.07:43:49.06#ibcon#[25=AT04-07\r\n] 2006.232.07:43:49.06#ibcon#*before write, iclass 6, count 2 2006.232.07:43:49.06#ibcon#enter sib2, iclass 6, count 2 2006.232.07:43:49.06#ibcon#flushed, iclass 6, count 2 2006.232.07:43:49.06#ibcon#about to write, iclass 6, count 2 2006.232.07:43:49.06#ibcon#wrote, iclass 6, count 2 2006.232.07:43:49.06#ibcon#about to read 3, iclass 6, count 2 2006.232.07:43:49.09#ibcon#read 3, iclass 6, count 2 2006.232.07:43:49.09#ibcon#about to read 4, iclass 6, count 2 2006.232.07:43:49.09#ibcon#read 4, iclass 6, count 2 2006.232.07:43:49.09#ibcon#about to read 5, iclass 6, count 2 2006.232.07:43:49.09#ibcon#read 5, iclass 6, count 2 2006.232.07:43:49.09#ibcon#about to read 6, iclass 6, count 2 2006.232.07:43:49.09#ibcon#read 6, iclass 6, count 2 2006.232.07:43:49.09#ibcon#end of sib2, iclass 6, count 2 2006.232.07:43:49.09#ibcon#*after write, iclass 6, count 2 2006.232.07:43:49.09#ibcon#*before return 0, iclass 6, count 2 2006.232.07:43:49.09#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.232.07:43:49.09#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.232.07:43:49.09#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.232.07:43:49.09#ibcon#ireg 7 cls_cnt 0 2006.232.07:43:49.09#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.232.07:43:49.21#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.232.07:43:49.21#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.232.07:43:49.21#ibcon#enter wrdev, iclass 6, count 0 2006.232.07:43:49.21#ibcon#first serial, iclass 6, count 0 2006.232.07:43:49.21#ibcon#enter sib2, iclass 6, count 0 2006.232.07:43:49.21#ibcon#flushed, iclass 6, count 0 2006.232.07:43:49.21#ibcon#about to write, iclass 6, count 0 2006.232.07:43:49.21#ibcon#wrote, iclass 6, count 0 2006.232.07:43:49.21#ibcon#about to read 3, iclass 6, count 0 2006.232.07:43:49.23#ibcon#read 3, iclass 6, count 0 2006.232.07:43:49.23#ibcon#about to read 4, iclass 6, count 0 2006.232.07:43:49.23#ibcon#read 4, iclass 6, count 0 2006.232.07:43:49.23#ibcon#about to read 5, iclass 6, count 0 2006.232.07:43:49.23#ibcon#read 5, iclass 6, count 0 2006.232.07:43:49.23#ibcon#about to read 6, iclass 6, count 0 2006.232.07:43:49.23#ibcon#read 6, iclass 6, count 0 2006.232.07:43:49.23#ibcon#end of sib2, iclass 6, count 0 2006.232.07:43:49.23#ibcon#*mode == 0, iclass 6, count 0 2006.232.07:43:49.23#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.232.07:43:49.23#ibcon#[25=USB\r\n] 2006.232.07:43:49.23#ibcon#*before write, iclass 6, count 0 2006.232.07:43:49.23#ibcon#enter sib2, iclass 6, count 0 2006.232.07:43:49.23#ibcon#flushed, iclass 6, count 0 2006.232.07:43:49.23#ibcon#about to write, iclass 6, count 0 2006.232.07:43:49.23#ibcon#wrote, iclass 6, count 0 2006.232.07:43:49.23#ibcon#about to read 3, iclass 6, count 0 2006.232.07:43:49.25#abcon#<5=/05 3.2 5.5 29.43 861007.3\r\n> 2006.232.07:43:49.26#ibcon#read 3, iclass 6, count 0 2006.232.07:43:49.26#ibcon#about to read 4, iclass 6, count 0 2006.232.07:43:49.26#ibcon#read 4, iclass 6, count 0 2006.232.07:43:49.26#ibcon#about to read 5, iclass 6, count 0 2006.232.07:43:49.26#ibcon#read 5, iclass 6, count 0 2006.232.07:43:49.26#ibcon#about to read 6, iclass 6, count 0 2006.232.07:43:49.26#ibcon#read 6, iclass 6, count 0 2006.232.07:43:49.26#ibcon#end of sib2, iclass 6, count 0 2006.232.07:43:49.26#ibcon#*after write, iclass 6, count 0 2006.232.07:43:49.26#ibcon#*before return 0, iclass 6, count 0 2006.232.07:43:49.26#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.232.07:43:49.26#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.232.07:43:49.26#ibcon#about to clear, iclass 6 cls_cnt 0 2006.232.07:43:49.26#ibcon#cleared, iclass 6 cls_cnt 0 2006.232.07:43:49.26$vc4f8/valo=5,652.99 2006.232.07:43:49.26#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.232.07:43:49.26#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.232.07:43:49.26#ibcon#ireg 17 cls_cnt 0 2006.232.07:43:49.26#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.232.07:43:49.26#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.232.07:43:49.26#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.232.07:43:49.26#ibcon#enter wrdev, iclass 13, count 0 2006.232.07:43:49.26#ibcon#first serial, iclass 13, count 0 2006.232.07:43:49.26#ibcon#enter sib2, iclass 13, count 0 2006.232.07:43:49.26#ibcon#flushed, iclass 13, count 0 2006.232.07:43:49.26#ibcon#about to write, iclass 13, count 0 2006.232.07:43:49.26#ibcon#wrote, iclass 13, count 0 2006.232.07:43:49.26#ibcon#about to read 3, iclass 13, count 0 2006.232.07:43:49.27#abcon#{5=INTERFACE CLEAR} 2006.232.07:43:49.28#ibcon#read 3, iclass 13, count 0 2006.232.07:43:49.28#ibcon#about to read 4, iclass 13, count 0 2006.232.07:43:49.28#ibcon#read 4, iclass 13, count 0 2006.232.07:43:49.28#ibcon#about to read 5, iclass 13, count 0 2006.232.07:43:49.28#ibcon#read 5, iclass 13, count 0 2006.232.07:43:49.28#ibcon#about to read 6, iclass 13, count 0 2006.232.07:43:49.28#ibcon#read 6, iclass 13, count 0 2006.232.07:43:49.28#ibcon#end of sib2, iclass 13, count 0 2006.232.07:43:49.28#ibcon#*mode == 0, iclass 13, count 0 2006.232.07:43:49.28#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.232.07:43:49.28#ibcon#[26=FRQ=05,652.99\r\n] 2006.232.07:43:49.28#ibcon#*before write, iclass 13, count 0 2006.232.07:43:49.28#ibcon#enter sib2, iclass 13, count 0 2006.232.07:43:49.28#ibcon#flushed, iclass 13, count 0 2006.232.07:43:49.28#ibcon#about to write, iclass 13, count 0 2006.232.07:43:49.28#ibcon#wrote, iclass 13, count 0 2006.232.07:43:49.28#ibcon#about to read 3, iclass 13, count 0 2006.232.07:43:49.32#ibcon#read 3, iclass 13, count 0 2006.232.07:43:49.32#ibcon#about to read 4, iclass 13, count 0 2006.232.07:43:49.32#ibcon#read 4, iclass 13, count 0 2006.232.07:43:49.32#ibcon#about to read 5, iclass 13, count 0 2006.232.07:43:49.32#ibcon#read 5, iclass 13, count 0 2006.232.07:43:49.32#ibcon#about to read 6, iclass 13, count 0 2006.232.07:43:49.32#ibcon#read 6, iclass 13, count 0 2006.232.07:43:49.32#ibcon#end of sib2, iclass 13, count 0 2006.232.07:43:49.32#ibcon#*after write, iclass 13, count 0 2006.232.07:43:49.32#ibcon#*before return 0, iclass 13, count 0 2006.232.07:43:49.32#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.232.07:43:49.32#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.232.07:43:49.32#ibcon#about to clear, iclass 13 cls_cnt 0 2006.232.07:43:49.32#ibcon#cleared, iclass 13 cls_cnt 0 2006.232.07:43:49.32$vc4f8/va=5,7 2006.232.07:43:49.32#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.232.07:43:49.32#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.232.07:43:49.32#ibcon#ireg 11 cls_cnt 2 2006.232.07:43:49.32#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.232.07:43:49.33#abcon#[5=S1D000X0/0*\r\n] 2006.232.07:43:49.38#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.232.07:43:49.38#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.232.07:43:49.38#ibcon#enter wrdev, iclass 16, count 2 2006.232.07:43:49.38#ibcon#first serial, iclass 16, count 2 2006.232.07:43:49.38#ibcon#enter sib2, iclass 16, count 2 2006.232.07:43:49.38#ibcon#flushed, iclass 16, count 2 2006.232.07:43:49.38#ibcon#about to write, iclass 16, count 2 2006.232.07:43:49.38#ibcon#wrote, iclass 16, count 2 2006.232.07:43:49.38#ibcon#about to read 3, iclass 16, count 2 2006.232.07:43:49.41#ibcon#read 3, iclass 16, count 2 2006.232.07:43:49.41#ibcon#about to read 4, iclass 16, count 2 2006.232.07:43:49.41#ibcon#read 4, iclass 16, count 2 2006.232.07:43:49.41#ibcon#about to read 5, iclass 16, count 2 2006.232.07:43:49.41#ibcon#read 5, iclass 16, count 2 2006.232.07:43:49.41#ibcon#about to read 6, iclass 16, count 2 2006.232.07:43:49.41#ibcon#read 6, iclass 16, count 2 2006.232.07:43:49.41#ibcon#end of sib2, iclass 16, count 2 2006.232.07:43:49.41#ibcon#*mode == 0, iclass 16, count 2 2006.232.07:43:49.41#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.232.07:43:49.41#ibcon#[25=AT05-07\r\n] 2006.232.07:43:49.41#ibcon#*before write, iclass 16, count 2 2006.232.07:43:49.41#ibcon#enter sib2, iclass 16, count 2 2006.232.07:43:49.41#ibcon#flushed, iclass 16, count 2 2006.232.07:43:49.41#ibcon#about to write, iclass 16, count 2 2006.232.07:43:49.41#ibcon#wrote, iclass 16, count 2 2006.232.07:43:49.41#ibcon#about to read 3, iclass 16, count 2 2006.232.07:43:49.43#ibcon#read 3, iclass 16, count 2 2006.232.07:43:49.43#ibcon#about to read 4, iclass 16, count 2 2006.232.07:43:49.43#ibcon#read 4, iclass 16, count 2 2006.232.07:43:49.43#ibcon#about to read 5, iclass 16, count 2 2006.232.07:43:49.43#ibcon#read 5, iclass 16, count 2 2006.232.07:43:49.43#ibcon#about to read 6, iclass 16, count 2 2006.232.07:43:49.43#ibcon#read 6, iclass 16, count 2 2006.232.07:43:49.43#ibcon#end of sib2, iclass 16, count 2 2006.232.07:43:49.43#ibcon#*after write, iclass 16, count 2 2006.232.07:43:49.43#ibcon#*before return 0, iclass 16, count 2 2006.232.07:43:49.43#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.232.07:43:49.43#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.232.07:43:49.43#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.232.07:43:49.43#ibcon#ireg 7 cls_cnt 0 2006.232.07:43:49.43#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.232.07:43:49.55#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.232.07:43:49.55#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.232.07:43:49.55#ibcon#enter wrdev, iclass 16, count 0 2006.232.07:43:49.55#ibcon#first serial, iclass 16, count 0 2006.232.07:43:49.55#ibcon#enter sib2, iclass 16, count 0 2006.232.07:43:49.55#ibcon#flushed, iclass 16, count 0 2006.232.07:43:49.55#ibcon#about to write, iclass 16, count 0 2006.232.07:43:49.55#ibcon#wrote, iclass 16, count 0 2006.232.07:43:49.55#ibcon#about to read 3, iclass 16, count 0 2006.232.07:43:49.57#ibcon#read 3, iclass 16, count 0 2006.232.07:43:49.57#ibcon#about to read 4, iclass 16, count 0 2006.232.07:43:49.57#ibcon#read 4, iclass 16, count 0 2006.232.07:43:49.57#ibcon#about to read 5, iclass 16, count 0 2006.232.07:43:49.57#ibcon#read 5, iclass 16, count 0 2006.232.07:43:49.57#ibcon#about to read 6, iclass 16, count 0 2006.232.07:43:49.57#ibcon#read 6, iclass 16, count 0 2006.232.07:43:49.57#ibcon#end of sib2, iclass 16, count 0 2006.232.07:43:49.57#ibcon#*mode == 0, iclass 16, count 0 2006.232.07:43:49.57#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.232.07:43:49.57#ibcon#[25=USB\r\n] 2006.232.07:43:49.57#ibcon#*before write, iclass 16, count 0 2006.232.07:43:49.57#ibcon#enter sib2, iclass 16, count 0 2006.232.07:43:49.57#ibcon#flushed, iclass 16, count 0 2006.232.07:43:49.57#ibcon#about to write, iclass 16, count 0 2006.232.07:43:49.57#ibcon#wrote, iclass 16, count 0 2006.232.07:43:49.57#ibcon#about to read 3, iclass 16, count 0 2006.232.07:43:49.60#ibcon#read 3, iclass 16, count 0 2006.232.07:43:49.60#ibcon#about to read 4, iclass 16, count 0 2006.232.07:43:49.60#ibcon#read 4, iclass 16, count 0 2006.232.07:43:49.60#ibcon#about to read 5, iclass 16, count 0 2006.232.07:43:49.60#ibcon#read 5, iclass 16, count 0 2006.232.07:43:49.60#ibcon#about to read 6, iclass 16, count 0 2006.232.07:43:49.60#ibcon#read 6, iclass 16, count 0 2006.232.07:43:49.60#ibcon#end of sib2, iclass 16, count 0 2006.232.07:43:49.60#ibcon#*after write, iclass 16, count 0 2006.232.07:43:49.60#ibcon#*before return 0, iclass 16, count 0 2006.232.07:43:49.60#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.232.07:43:49.60#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.232.07:43:49.60#ibcon#about to clear, iclass 16 cls_cnt 0 2006.232.07:43:49.60#ibcon#cleared, iclass 16 cls_cnt 0 2006.232.07:43:49.60$vc4f8/valo=6,772.99 2006.232.07:43:49.60#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.232.07:43:49.60#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.232.07:43:49.60#ibcon#ireg 17 cls_cnt 0 2006.232.07:43:49.60#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.232.07:43:49.60#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.232.07:43:49.60#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.232.07:43:49.60#ibcon#enter wrdev, iclass 18, count 0 2006.232.07:43:49.60#ibcon#first serial, iclass 18, count 0 2006.232.07:43:49.60#ibcon#enter sib2, iclass 18, count 0 2006.232.07:43:49.60#ibcon#flushed, iclass 18, count 0 2006.232.07:43:49.60#ibcon#about to write, iclass 18, count 0 2006.232.07:43:49.60#ibcon#wrote, iclass 18, count 0 2006.232.07:43:49.60#ibcon#about to read 3, iclass 18, count 0 2006.232.07:43:49.62#ibcon#read 3, iclass 18, count 0 2006.232.07:43:49.62#ibcon#about to read 4, iclass 18, count 0 2006.232.07:43:49.62#ibcon#read 4, iclass 18, count 0 2006.232.07:43:49.62#ibcon#about to read 5, iclass 18, count 0 2006.232.07:43:49.62#ibcon#read 5, iclass 18, count 0 2006.232.07:43:49.62#ibcon#about to read 6, iclass 18, count 0 2006.232.07:43:49.62#ibcon#read 6, iclass 18, count 0 2006.232.07:43:49.62#ibcon#end of sib2, iclass 18, count 0 2006.232.07:43:49.62#ibcon#*mode == 0, iclass 18, count 0 2006.232.07:43:49.62#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.232.07:43:49.62#ibcon#[26=FRQ=06,772.99\r\n] 2006.232.07:43:49.62#ibcon#*before write, iclass 18, count 0 2006.232.07:43:49.62#ibcon#enter sib2, iclass 18, count 0 2006.232.07:43:49.62#ibcon#flushed, iclass 18, count 0 2006.232.07:43:49.62#ibcon#about to write, iclass 18, count 0 2006.232.07:43:49.62#ibcon#wrote, iclass 18, count 0 2006.232.07:43:49.62#ibcon#about to read 3, iclass 18, count 0 2006.232.07:43:49.66#ibcon#read 3, iclass 18, count 0 2006.232.07:43:49.66#ibcon#about to read 4, iclass 18, count 0 2006.232.07:43:49.66#ibcon#read 4, iclass 18, count 0 2006.232.07:43:49.66#ibcon#about to read 5, iclass 18, count 0 2006.232.07:43:49.66#ibcon#read 5, iclass 18, count 0 2006.232.07:43:49.66#ibcon#about to read 6, iclass 18, count 0 2006.232.07:43:49.66#ibcon#read 6, iclass 18, count 0 2006.232.07:43:49.66#ibcon#end of sib2, iclass 18, count 0 2006.232.07:43:49.66#ibcon#*after write, iclass 18, count 0 2006.232.07:43:49.66#ibcon#*before return 0, iclass 18, count 0 2006.232.07:43:49.66#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.232.07:43:49.66#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.232.07:43:49.66#ibcon#about to clear, iclass 18 cls_cnt 0 2006.232.07:43:49.66#ibcon#cleared, iclass 18 cls_cnt 0 2006.232.07:43:49.66$vc4f8/va=6,6 2006.232.07:43:49.66#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.232.07:43:49.66#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.232.07:43:49.66#ibcon#ireg 11 cls_cnt 2 2006.232.07:43:49.66#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.232.07:43:49.72#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.232.07:43:49.72#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.232.07:43:49.72#ibcon#enter wrdev, iclass 20, count 2 2006.232.07:43:49.72#ibcon#first serial, iclass 20, count 2 2006.232.07:43:49.72#ibcon#enter sib2, iclass 20, count 2 2006.232.07:43:49.72#ibcon#flushed, iclass 20, count 2 2006.232.07:43:49.72#ibcon#about to write, iclass 20, count 2 2006.232.07:43:49.72#ibcon#wrote, iclass 20, count 2 2006.232.07:43:49.72#ibcon#about to read 3, iclass 20, count 2 2006.232.07:43:49.74#ibcon#read 3, iclass 20, count 2 2006.232.07:43:49.74#ibcon#about to read 4, iclass 20, count 2 2006.232.07:43:49.74#ibcon#read 4, iclass 20, count 2 2006.232.07:43:49.74#ibcon#about to read 5, iclass 20, count 2 2006.232.07:43:49.74#ibcon#read 5, iclass 20, count 2 2006.232.07:43:49.74#ibcon#about to read 6, iclass 20, count 2 2006.232.07:43:49.74#ibcon#read 6, iclass 20, count 2 2006.232.07:43:49.74#ibcon#end of sib2, iclass 20, count 2 2006.232.07:43:49.74#ibcon#*mode == 0, iclass 20, count 2 2006.232.07:43:49.74#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.232.07:43:49.74#ibcon#[25=AT06-06\r\n] 2006.232.07:43:49.74#ibcon#*before write, iclass 20, count 2 2006.232.07:43:49.74#ibcon#enter sib2, iclass 20, count 2 2006.232.07:43:49.74#ibcon#flushed, iclass 20, count 2 2006.232.07:43:49.74#ibcon#about to write, iclass 20, count 2 2006.232.07:43:49.74#ibcon#wrote, iclass 20, count 2 2006.232.07:43:49.74#ibcon#about to read 3, iclass 20, count 2 2006.232.07:43:49.77#ibcon#read 3, iclass 20, count 2 2006.232.07:43:49.77#ibcon#about to read 4, iclass 20, count 2 2006.232.07:43:49.77#ibcon#read 4, iclass 20, count 2 2006.232.07:43:49.77#ibcon#about to read 5, iclass 20, count 2 2006.232.07:43:49.77#ibcon#read 5, iclass 20, count 2 2006.232.07:43:49.77#ibcon#about to read 6, iclass 20, count 2 2006.232.07:43:49.77#ibcon#read 6, iclass 20, count 2 2006.232.07:43:49.77#ibcon#end of sib2, iclass 20, count 2 2006.232.07:43:49.77#ibcon#*after write, iclass 20, count 2 2006.232.07:43:49.77#ibcon#*before return 0, iclass 20, count 2 2006.232.07:43:49.77#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.232.07:43:49.77#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.232.07:43:49.77#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.232.07:43:49.77#ibcon#ireg 7 cls_cnt 0 2006.232.07:43:49.77#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.232.07:43:49.89#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.232.07:43:49.89#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.232.07:43:49.89#ibcon#enter wrdev, iclass 20, count 0 2006.232.07:43:49.89#ibcon#first serial, iclass 20, count 0 2006.232.07:43:49.89#ibcon#enter sib2, iclass 20, count 0 2006.232.07:43:49.89#ibcon#flushed, iclass 20, count 0 2006.232.07:43:49.89#ibcon#about to write, iclass 20, count 0 2006.232.07:43:49.89#ibcon#wrote, iclass 20, count 0 2006.232.07:43:49.89#ibcon#about to read 3, iclass 20, count 0 2006.232.07:43:49.91#ibcon#read 3, iclass 20, count 0 2006.232.07:43:49.91#ibcon#about to read 4, iclass 20, count 0 2006.232.07:43:49.91#ibcon#read 4, iclass 20, count 0 2006.232.07:43:49.91#ibcon#about to read 5, iclass 20, count 0 2006.232.07:43:49.91#ibcon#read 5, iclass 20, count 0 2006.232.07:43:49.91#ibcon#about to read 6, iclass 20, count 0 2006.232.07:43:49.91#ibcon#read 6, iclass 20, count 0 2006.232.07:43:49.91#ibcon#end of sib2, iclass 20, count 0 2006.232.07:43:49.91#ibcon#*mode == 0, iclass 20, count 0 2006.232.07:43:49.91#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.232.07:43:49.91#ibcon#[25=USB\r\n] 2006.232.07:43:49.91#ibcon#*before write, iclass 20, count 0 2006.232.07:43:49.91#ibcon#enter sib2, iclass 20, count 0 2006.232.07:43:49.91#ibcon#flushed, iclass 20, count 0 2006.232.07:43:49.91#ibcon#about to write, iclass 20, count 0 2006.232.07:43:49.91#ibcon#wrote, iclass 20, count 0 2006.232.07:43:49.91#ibcon#about to read 3, iclass 20, count 0 2006.232.07:43:49.94#ibcon#read 3, iclass 20, count 0 2006.232.07:43:49.94#ibcon#about to read 4, iclass 20, count 0 2006.232.07:43:49.94#ibcon#read 4, iclass 20, count 0 2006.232.07:43:49.94#ibcon#about to read 5, iclass 20, count 0 2006.232.07:43:49.94#ibcon#read 5, iclass 20, count 0 2006.232.07:43:49.94#ibcon#about to read 6, iclass 20, count 0 2006.232.07:43:49.94#ibcon#read 6, iclass 20, count 0 2006.232.07:43:49.94#ibcon#end of sib2, iclass 20, count 0 2006.232.07:43:49.94#ibcon#*after write, iclass 20, count 0 2006.232.07:43:49.94#ibcon#*before return 0, iclass 20, count 0 2006.232.07:43:49.94#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.232.07:43:49.94#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.232.07:43:49.94#ibcon#about to clear, iclass 20 cls_cnt 0 2006.232.07:43:49.94#ibcon#cleared, iclass 20 cls_cnt 0 2006.232.07:43:49.94$vc4f8/valo=7,832.99 2006.232.07:43:49.94#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.232.07:43:49.94#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.232.07:43:49.94#ibcon#ireg 17 cls_cnt 0 2006.232.07:43:49.94#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.232.07:43:49.94#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.232.07:43:49.94#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.232.07:43:49.94#ibcon#enter wrdev, iclass 22, count 0 2006.232.07:43:49.94#ibcon#first serial, iclass 22, count 0 2006.232.07:43:49.94#ibcon#enter sib2, iclass 22, count 0 2006.232.07:43:49.94#ibcon#flushed, iclass 22, count 0 2006.232.07:43:49.94#ibcon#about to write, iclass 22, count 0 2006.232.07:43:49.94#ibcon#wrote, iclass 22, count 0 2006.232.07:43:49.94#ibcon#about to read 3, iclass 22, count 0 2006.232.07:43:49.96#ibcon#read 3, iclass 22, count 0 2006.232.07:43:49.96#ibcon#about to read 4, iclass 22, count 0 2006.232.07:43:49.96#ibcon#read 4, iclass 22, count 0 2006.232.07:43:49.96#ibcon#about to read 5, iclass 22, count 0 2006.232.07:43:49.96#ibcon#read 5, iclass 22, count 0 2006.232.07:43:49.96#ibcon#about to read 6, iclass 22, count 0 2006.232.07:43:49.96#ibcon#read 6, iclass 22, count 0 2006.232.07:43:49.96#ibcon#end of sib2, iclass 22, count 0 2006.232.07:43:49.96#ibcon#*mode == 0, iclass 22, count 0 2006.232.07:43:49.96#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.232.07:43:49.96#ibcon#[26=FRQ=07,832.99\r\n] 2006.232.07:43:49.96#ibcon#*before write, iclass 22, count 0 2006.232.07:43:49.96#ibcon#enter sib2, iclass 22, count 0 2006.232.07:43:49.96#ibcon#flushed, iclass 22, count 0 2006.232.07:43:49.96#ibcon#about to write, iclass 22, count 0 2006.232.07:43:49.96#ibcon#wrote, iclass 22, count 0 2006.232.07:43:49.96#ibcon#about to read 3, iclass 22, count 0 2006.232.07:43:50.00#ibcon#read 3, iclass 22, count 0 2006.232.07:43:50.00#ibcon#about to read 4, iclass 22, count 0 2006.232.07:43:50.00#ibcon#read 4, iclass 22, count 0 2006.232.07:43:50.00#ibcon#about to read 5, iclass 22, count 0 2006.232.07:43:50.00#ibcon#read 5, iclass 22, count 0 2006.232.07:43:50.00#ibcon#about to read 6, iclass 22, count 0 2006.232.07:43:50.00#ibcon#read 6, iclass 22, count 0 2006.232.07:43:50.00#ibcon#end of sib2, iclass 22, count 0 2006.232.07:43:50.00#ibcon#*after write, iclass 22, count 0 2006.232.07:43:50.00#ibcon#*before return 0, iclass 22, count 0 2006.232.07:43:50.00#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.232.07:43:50.00#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.232.07:43:50.00#ibcon#about to clear, iclass 22 cls_cnt 0 2006.232.07:43:50.00#ibcon#cleared, iclass 22 cls_cnt 0 2006.232.07:43:50.00$vc4f8/va=7,6 2006.232.07:43:50.00#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.232.07:43:50.00#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.232.07:43:50.00#ibcon#ireg 11 cls_cnt 2 2006.232.07:43:50.00#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.232.07:43:50.06#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.232.07:43:50.06#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.232.07:43:50.06#ibcon#enter wrdev, iclass 24, count 2 2006.232.07:43:50.06#ibcon#first serial, iclass 24, count 2 2006.232.07:43:50.06#ibcon#enter sib2, iclass 24, count 2 2006.232.07:43:50.06#ibcon#flushed, iclass 24, count 2 2006.232.07:43:50.06#ibcon#about to write, iclass 24, count 2 2006.232.07:43:50.06#ibcon#wrote, iclass 24, count 2 2006.232.07:43:50.06#ibcon#about to read 3, iclass 24, count 2 2006.232.07:43:50.08#ibcon#read 3, iclass 24, count 2 2006.232.07:43:50.08#ibcon#about to read 4, iclass 24, count 2 2006.232.07:43:50.08#ibcon#read 4, iclass 24, count 2 2006.232.07:43:50.08#ibcon#about to read 5, iclass 24, count 2 2006.232.07:43:50.08#ibcon#read 5, iclass 24, count 2 2006.232.07:43:50.08#ibcon#about to read 6, iclass 24, count 2 2006.232.07:43:50.08#ibcon#read 6, iclass 24, count 2 2006.232.07:43:50.08#ibcon#end of sib2, iclass 24, count 2 2006.232.07:43:50.08#ibcon#*mode == 0, iclass 24, count 2 2006.232.07:43:50.08#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.232.07:43:50.08#ibcon#[25=AT07-06\r\n] 2006.232.07:43:50.08#ibcon#*before write, iclass 24, count 2 2006.232.07:43:50.08#ibcon#enter sib2, iclass 24, count 2 2006.232.07:43:50.08#ibcon#flushed, iclass 24, count 2 2006.232.07:43:50.08#ibcon#about to write, iclass 24, count 2 2006.232.07:43:50.08#ibcon#wrote, iclass 24, count 2 2006.232.07:43:50.08#ibcon#about to read 3, iclass 24, count 2 2006.232.07:43:50.11#ibcon#read 3, iclass 24, count 2 2006.232.07:43:50.11#ibcon#about to read 4, iclass 24, count 2 2006.232.07:43:50.11#ibcon#read 4, iclass 24, count 2 2006.232.07:43:50.11#ibcon#about to read 5, iclass 24, count 2 2006.232.07:43:50.11#ibcon#read 5, iclass 24, count 2 2006.232.07:43:50.11#ibcon#about to read 6, iclass 24, count 2 2006.232.07:43:50.11#ibcon#read 6, iclass 24, count 2 2006.232.07:43:50.11#ibcon#end of sib2, iclass 24, count 2 2006.232.07:43:50.11#ibcon#*after write, iclass 24, count 2 2006.232.07:43:50.11#ibcon#*before return 0, iclass 24, count 2 2006.232.07:43:50.11#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.232.07:43:50.11#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.232.07:43:50.11#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.232.07:43:50.11#ibcon#ireg 7 cls_cnt 0 2006.232.07:43:50.11#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.232.07:43:50.23#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.232.07:43:50.23#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.232.07:43:50.23#ibcon#enter wrdev, iclass 24, count 0 2006.232.07:43:50.23#ibcon#first serial, iclass 24, count 0 2006.232.07:43:50.23#ibcon#enter sib2, iclass 24, count 0 2006.232.07:43:50.23#ibcon#flushed, iclass 24, count 0 2006.232.07:43:50.23#ibcon#about to write, iclass 24, count 0 2006.232.07:43:50.23#ibcon#wrote, iclass 24, count 0 2006.232.07:43:50.23#ibcon#about to read 3, iclass 24, count 0 2006.232.07:43:50.25#ibcon#read 3, iclass 24, count 0 2006.232.07:43:50.25#ibcon#about to read 4, iclass 24, count 0 2006.232.07:43:50.25#ibcon#read 4, iclass 24, count 0 2006.232.07:43:50.25#ibcon#about to read 5, iclass 24, count 0 2006.232.07:43:50.25#ibcon#read 5, iclass 24, count 0 2006.232.07:43:50.25#ibcon#about to read 6, iclass 24, count 0 2006.232.07:43:50.25#ibcon#read 6, iclass 24, count 0 2006.232.07:43:50.25#ibcon#end of sib2, iclass 24, count 0 2006.232.07:43:50.25#ibcon#*mode == 0, iclass 24, count 0 2006.232.07:43:50.25#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.232.07:43:50.25#ibcon#[25=USB\r\n] 2006.232.07:43:50.25#ibcon#*before write, iclass 24, count 0 2006.232.07:43:50.25#ibcon#enter sib2, iclass 24, count 0 2006.232.07:43:50.25#ibcon#flushed, iclass 24, count 0 2006.232.07:43:50.25#ibcon#about to write, iclass 24, count 0 2006.232.07:43:50.25#ibcon#wrote, iclass 24, count 0 2006.232.07:43:50.25#ibcon#about to read 3, iclass 24, count 0 2006.232.07:43:50.28#ibcon#read 3, iclass 24, count 0 2006.232.07:43:50.29#ibcon#about to read 4, iclass 24, count 0 2006.232.07:43:50.29#ibcon#read 4, iclass 24, count 0 2006.232.07:43:50.29#ibcon#about to read 5, iclass 24, count 0 2006.232.07:43:50.29#ibcon#read 5, iclass 24, count 0 2006.232.07:43:50.29#ibcon#about to read 6, iclass 24, count 0 2006.232.07:43:50.29#ibcon#read 6, iclass 24, count 0 2006.232.07:43:50.29#ibcon#end of sib2, iclass 24, count 0 2006.232.07:43:50.29#ibcon#*after write, iclass 24, count 0 2006.232.07:43:50.29#ibcon#*before return 0, iclass 24, count 0 2006.232.07:43:50.29#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.232.07:43:50.29#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.232.07:43:50.29#ibcon#about to clear, iclass 24 cls_cnt 0 2006.232.07:43:50.29#ibcon#cleared, iclass 24 cls_cnt 0 2006.232.07:43:50.29$vc4f8/valo=8,852.99 2006.232.07:43:50.29#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.232.07:43:50.29#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.232.07:43:50.29#ibcon#ireg 17 cls_cnt 0 2006.232.07:43:50.29#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.232.07:43:50.29#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.232.07:43:50.29#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.232.07:43:50.29#ibcon#enter wrdev, iclass 26, count 0 2006.232.07:43:50.29#ibcon#first serial, iclass 26, count 0 2006.232.07:43:50.29#ibcon#enter sib2, iclass 26, count 0 2006.232.07:43:50.29#ibcon#flushed, iclass 26, count 0 2006.232.07:43:50.29#ibcon#about to write, iclass 26, count 0 2006.232.07:43:50.29#ibcon#wrote, iclass 26, count 0 2006.232.07:43:50.29#ibcon#about to read 3, iclass 26, count 0 2006.232.07:43:50.30#ibcon#read 3, iclass 26, count 0 2006.232.07:43:50.30#ibcon#about to read 4, iclass 26, count 0 2006.232.07:43:50.30#ibcon#read 4, iclass 26, count 0 2006.232.07:43:50.30#ibcon#about to read 5, iclass 26, count 0 2006.232.07:43:50.30#ibcon#read 5, iclass 26, count 0 2006.232.07:43:50.30#ibcon#about to read 6, iclass 26, count 0 2006.232.07:43:50.30#ibcon#read 6, iclass 26, count 0 2006.232.07:43:50.30#ibcon#end of sib2, iclass 26, count 0 2006.232.07:43:50.30#ibcon#*mode == 0, iclass 26, count 0 2006.232.07:43:50.30#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.232.07:43:50.30#ibcon#[26=FRQ=08,852.99\r\n] 2006.232.07:43:50.30#ibcon#*before write, iclass 26, count 0 2006.232.07:43:50.30#ibcon#enter sib2, iclass 26, count 0 2006.232.07:43:50.30#ibcon#flushed, iclass 26, count 0 2006.232.07:43:50.30#ibcon#about to write, iclass 26, count 0 2006.232.07:43:50.30#ibcon#wrote, iclass 26, count 0 2006.232.07:43:50.30#ibcon#about to read 3, iclass 26, count 0 2006.232.07:43:50.34#ibcon#read 3, iclass 26, count 0 2006.232.07:43:50.34#ibcon#about to read 4, iclass 26, count 0 2006.232.07:43:50.34#ibcon#read 4, iclass 26, count 0 2006.232.07:43:50.34#ibcon#about to read 5, iclass 26, count 0 2006.232.07:43:50.34#ibcon#read 5, iclass 26, count 0 2006.232.07:43:50.34#ibcon#about to read 6, iclass 26, count 0 2006.232.07:43:50.34#ibcon#read 6, iclass 26, count 0 2006.232.07:43:50.34#ibcon#end of sib2, iclass 26, count 0 2006.232.07:43:50.34#ibcon#*after write, iclass 26, count 0 2006.232.07:43:50.34#ibcon#*before return 0, iclass 26, count 0 2006.232.07:43:50.34#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.232.07:43:50.34#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.232.07:43:50.34#ibcon#about to clear, iclass 26 cls_cnt 0 2006.232.07:43:50.34#ibcon#cleared, iclass 26 cls_cnt 0 2006.232.07:43:50.34$vc4f8/va=8,6 2006.232.07:43:50.34#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.232.07:43:50.34#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.232.07:43:50.34#ibcon#ireg 11 cls_cnt 2 2006.232.07:43:50.34#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.232.07:43:50.41#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.232.07:43:50.41#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.232.07:43:50.41#ibcon#enter wrdev, iclass 28, count 2 2006.232.07:43:50.41#ibcon#first serial, iclass 28, count 2 2006.232.07:43:50.41#ibcon#enter sib2, iclass 28, count 2 2006.232.07:43:50.41#ibcon#flushed, iclass 28, count 2 2006.232.07:43:50.41#ibcon#about to write, iclass 28, count 2 2006.232.07:43:50.41#ibcon#wrote, iclass 28, count 2 2006.232.07:43:50.41#ibcon#about to read 3, iclass 28, count 2 2006.232.07:43:50.43#ibcon#read 3, iclass 28, count 2 2006.232.07:43:50.43#ibcon#about to read 4, iclass 28, count 2 2006.232.07:43:50.43#ibcon#read 4, iclass 28, count 2 2006.232.07:43:50.43#ibcon#about to read 5, iclass 28, count 2 2006.232.07:43:50.43#ibcon#read 5, iclass 28, count 2 2006.232.07:43:50.43#ibcon#about to read 6, iclass 28, count 2 2006.232.07:43:50.43#ibcon#read 6, iclass 28, count 2 2006.232.07:43:50.43#ibcon#end of sib2, iclass 28, count 2 2006.232.07:43:50.43#ibcon#*mode == 0, iclass 28, count 2 2006.232.07:43:50.43#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.232.07:43:50.43#ibcon#[25=AT08-06\r\n] 2006.232.07:43:50.43#ibcon#*before write, iclass 28, count 2 2006.232.07:43:50.43#ibcon#enter sib2, iclass 28, count 2 2006.232.07:43:50.43#ibcon#flushed, iclass 28, count 2 2006.232.07:43:50.43#ibcon#about to write, iclass 28, count 2 2006.232.07:43:50.43#ibcon#wrote, iclass 28, count 2 2006.232.07:43:50.43#ibcon#about to read 3, iclass 28, count 2 2006.232.07:43:50.46#ibcon#read 3, iclass 28, count 2 2006.232.07:43:50.46#ibcon#about to read 4, iclass 28, count 2 2006.232.07:43:50.46#ibcon#read 4, iclass 28, count 2 2006.232.07:43:50.46#ibcon#about to read 5, iclass 28, count 2 2006.232.07:43:50.46#ibcon#read 5, iclass 28, count 2 2006.232.07:43:50.46#ibcon#about to read 6, iclass 28, count 2 2006.232.07:43:50.46#ibcon#read 6, iclass 28, count 2 2006.232.07:43:50.46#ibcon#end of sib2, iclass 28, count 2 2006.232.07:43:50.46#ibcon#*after write, iclass 28, count 2 2006.232.07:43:50.46#ibcon#*before return 0, iclass 28, count 2 2006.232.07:43:50.46#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.232.07:43:50.46#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.232.07:43:50.46#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.232.07:43:50.46#ibcon#ireg 7 cls_cnt 0 2006.232.07:43:50.46#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.232.07:43:50.58#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.232.07:43:50.58#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.232.07:43:50.58#ibcon#enter wrdev, iclass 28, count 0 2006.232.07:43:50.58#ibcon#first serial, iclass 28, count 0 2006.232.07:43:50.58#ibcon#enter sib2, iclass 28, count 0 2006.232.07:43:50.58#ibcon#flushed, iclass 28, count 0 2006.232.07:43:50.58#ibcon#about to write, iclass 28, count 0 2006.232.07:43:50.58#ibcon#wrote, iclass 28, count 0 2006.232.07:43:50.58#ibcon#about to read 3, iclass 28, count 0 2006.232.07:43:50.60#ibcon#read 3, iclass 28, count 0 2006.232.07:43:50.60#ibcon#about to read 4, iclass 28, count 0 2006.232.07:43:50.60#ibcon#read 4, iclass 28, count 0 2006.232.07:43:50.60#ibcon#about to read 5, iclass 28, count 0 2006.232.07:43:50.60#ibcon#read 5, iclass 28, count 0 2006.232.07:43:50.60#ibcon#about to read 6, iclass 28, count 0 2006.232.07:43:50.60#ibcon#read 6, iclass 28, count 0 2006.232.07:43:50.60#ibcon#end of sib2, iclass 28, count 0 2006.232.07:43:50.60#ibcon#*mode == 0, iclass 28, count 0 2006.232.07:43:50.60#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.232.07:43:50.60#ibcon#[25=USB\r\n] 2006.232.07:43:50.60#ibcon#*before write, iclass 28, count 0 2006.232.07:43:50.60#ibcon#enter sib2, iclass 28, count 0 2006.232.07:43:50.60#ibcon#flushed, iclass 28, count 0 2006.232.07:43:50.60#ibcon#about to write, iclass 28, count 0 2006.232.07:43:50.60#ibcon#wrote, iclass 28, count 0 2006.232.07:43:50.60#ibcon#about to read 3, iclass 28, count 0 2006.232.07:43:50.63#ibcon#read 3, iclass 28, count 0 2006.232.07:43:50.63#ibcon#about to read 4, iclass 28, count 0 2006.232.07:43:50.63#ibcon#read 4, iclass 28, count 0 2006.232.07:43:50.63#ibcon#about to read 5, iclass 28, count 0 2006.232.07:43:50.63#ibcon#read 5, iclass 28, count 0 2006.232.07:43:50.63#ibcon#about to read 6, iclass 28, count 0 2006.232.07:43:50.63#ibcon#read 6, iclass 28, count 0 2006.232.07:43:50.63#ibcon#end of sib2, iclass 28, count 0 2006.232.07:43:50.63#ibcon#*after write, iclass 28, count 0 2006.232.07:43:50.63#ibcon#*before return 0, iclass 28, count 0 2006.232.07:43:50.63#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.232.07:43:50.63#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.232.07:43:50.63#ibcon#about to clear, iclass 28 cls_cnt 0 2006.232.07:43:50.63#ibcon#cleared, iclass 28 cls_cnt 0 2006.232.07:43:50.63$vc4f8/vblo=1,632.99 2006.232.07:43:50.63#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.232.07:43:50.63#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.232.07:43:50.63#ibcon#ireg 17 cls_cnt 0 2006.232.07:43:50.63#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.232.07:43:50.63#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.232.07:43:50.63#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.232.07:43:50.63#ibcon#enter wrdev, iclass 30, count 0 2006.232.07:43:50.63#ibcon#first serial, iclass 30, count 0 2006.232.07:43:50.63#ibcon#enter sib2, iclass 30, count 0 2006.232.07:43:50.63#ibcon#flushed, iclass 30, count 0 2006.232.07:43:50.63#ibcon#about to write, iclass 30, count 0 2006.232.07:43:50.63#ibcon#wrote, iclass 30, count 0 2006.232.07:43:50.63#ibcon#about to read 3, iclass 30, count 0 2006.232.07:43:50.65#ibcon#read 3, iclass 30, count 0 2006.232.07:43:50.65#ibcon#about to read 4, iclass 30, count 0 2006.232.07:43:50.65#ibcon#read 4, iclass 30, count 0 2006.232.07:43:50.65#ibcon#about to read 5, iclass 30, count 0 2006.232.07:43:50.65#ibcon#read 5, iclass 30, count 0 2006.232.07:43:50.65#ibcon#about to read 6, iclass 30, count 0 2006.232.07:43:50.65#ibcon#read 6, iclass 30, count 0 2006.232.07:43:50.65#ibcon#end of sib2, iclass 30, count 0 2006.232.07:43:50.65#ibcon#*mode == 0, iclass 30, count 0 2006.232.07:43:50.65#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.232.07:43:50.65#ibcon#[28=FRQ=01,632.99\r\n] 2006.232.07:43:50.65#ibcon#*before write, iclass 30, count 0 2006.232.07:43:50.65#ibcon#enter sib2, iclass 30, count 0 2006.232.07:43:50.65#ibcon#flushed, iclass 30, count 0 2006.232.07:43:50.65#ibcon#about to write, iclass 30, count 0 2006.232.07:43:50.65#ibcon#wrote, iclass 30, count 0 2006.232.07:43:50.65#ibcon#about to read 3, iclass 30, count 0 2006.232.07:43:50.69#ibcon#read 3, iclass 30, count 0 2006.232.07:43:50.69#ibcon#about to read 4, iclass 30, count 0 2006.232.07:43:50.69#ibcon#read 4, iclass 30, count 0 2006.232.07:43:50.69#ibcon#about to read 5, iclass 30, count 0 2006.232.07:43:50.69#ibcon#read 5, iclass 30, count 0 2006.232.07:43:50.69#ibcon#about to read 6, iclass 30, count 0 2006.232.07:43:50.69#ibcon#read 6, iclass 30, count 0 2006.232.07:43:50.69#ibcon#end of sib2, iclass 30, count 0 2006.232.07:43:50.69#ibcon#*after write, iclass 30, count 0 2006.232.07:43:50.69#ibcon#*before return 0, iclass 30, count 0 2006.232.07:43:50.69#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.232.07:43:50.69#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.232.07:43:50.69#ibcon#about to clear, iclass 30 cls_cnt 0 2006.232.07:43:50.69#ibcon#cleared, iclass 30 cls_cnt 0 2006.232.07:43:50.69$vc4f8/vb=1,4 2006.232.07:43:50.69#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.232.07:43:50.69#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.232.07:43:50.69#ibcon#ireg 11 cls_cnt 2 2006.232.07:43:50.69#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.232.07:43:50.69#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.232.07:43:50.69#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.232.07:43:50.69#ibcon#enter wrdev, iclass 32, count 2 2006.232.07:43:50.69#ibcon#first serial, iclass 32, count 2 2006.232.07:43:50.69#ibcon#enter sib2, iclass 32, count 2 2006.232.07:43:50.69#ibcon#flushed, iclass 32, count 2 2006.232.07:43:50.69#ibcon#about to write, iclass 32, count 2 2006.232.07:43:50.69#ibcon#wrote, iclass 32, count 2 2006.232.07:43:50.69#ibcon#about to read 3, iclass 32, count 2 2006.232.07:43:50.71#ibcon#read 3, iclass 32, count 2 2006.232.07:43:50.71#ibcon#about to read 4, iclass 32, count 2 2006.232.07:43:50.71#ibcon#read 4, iclass 32, count 2 2006.232.07:43:50.71#ibcon#about to read 5, iclass 32, count 2 2006.232.07:43:50.71#ibcon#read 5, iclass 32, count 2 2006.232.07:43:50.71#ibcon#about to read 6, iclass 32, count 2 2006.232.07:43:50.71#ibcon#read 6, iclass 32, count 2 2006.232.07:43:50.71#ibcon#end of sib2, iclass 32, count 2 2006.232.07:43:50.71#ibcon#*mode == 0, iclass 32, count 2 2006.232.07:43:50.71#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.232.07:43:50.71#ibcon#[27=AT01-04\r\n] 2006.232.07:43:50.71#ibcon#*before write, iclass 32, count 2 2006.232.07:43:50.71#ibcon#enter sib2, iclass 32, count 2 2006.232.07:43:50.71#ibcon#flushed, iclass 32, count 2 2006.232.07:43:50.71#ibcon#about to write, iclass 32, count 2 2006.232.07:43:50.71#ibcon#wrote, iclass 32, count 2 2006.232.07:43:50.71#ibcon#about to read 3, iclass 32, count 2 2006.232.07:43:50.74#ibcon#read 3, iclass 32, count 2 2006.232.07:43:50.74#ibcon#about to read 4, iclass 32, count 2 2006.232.07:43:50.74#ibcon#read 4, iclass 32, count 2 2006.232.07:43:50.74#ibcon#about to read 5, iclass 32, count 2 2006.232.07:43:50.74#ibcon#read 5, iclass 32, count 2 2006.232.07:43:50.74#ibcon#about to read 6, iclass 32, count 2 2006.232.07:43:50.74#ibcon#read 6, iclass 32, count 2 2006.232.07:43:50.74#ibcon#end of sib2, iclass 32, count 2 2006.232.07:43:50.74#ibcon#*after write, iclass 32, count 2 2006.232.07:43:50.74#ibcon#*before return 0, iclass 32, count 2 2006.232.07:43:50.74#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.232.07:43:50.74#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.232.07:43:50.74#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.232.07:43:50.74#ibcon#ireg 7 cls_cnt 0 2006.232.07:43:50.74#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.232.07:43:50.86#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.232.07:43:50.86#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.232.07:43:50.86#ibcon#enter wrdev, iclass 32, count 0 2006.232.07:43:50.86#ibcon#first serial, iclass 32, count 0 2006.232.07:43:50.86#ibcon#enter sib2, iclass 32, count 0 2006.232.07:43:50.86#ibcon#flushed, iclass 32, count 0 2006.232.07:43:50.86#ibcon#about to write, iclass 32, count 0 2006.232.07:43:50.86#ibcon#wrote, iclass 32, count 0 2006.232.07:43:50.86#ibcon#about to read 3, iclass 32, count 0 2006.232.07:43:50.88#ibcon#read 3, iclass 32, count 0 2006.232.07:43:50.88#ibcon#about to read 4, iclass 32, count 0 2006.232.07:43:50.88#ibcon#read 4, iclass 32, count 0 2006.232.07:43:50.88#ibcon#about to read 5, iclass 32, count 0 2006.232.07:43:50.88#ibcon#read 5, iclass 32, count 0 2006.232.07:43:50.88#ibcon#about to read 6, iclass 32, count 0 2006.232.07:43:50.88#ibcon#read 6, iclass 32, count 0 2006.232.07:43:50.88#ibcon#end of sib2, iclass 32, count 0 2006.232.07:43:50.88#ibcon#*mode == 0, iclass 32, count 0 2006.232.07:43:50.88#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.232.07:43:50.88#ibcon#[27=USB\r\n] 2006.232.07:43:50.88#ibcon#*before write, iclass 32, count 0 2006.232.07:43:50.88#ibcon#enter sib2, iclass 32, count 0 2006.232.07:43:50.88#ibcon#flushed, iclass 32, count 0 2006.232.07:43:50.88#ibcon#about to write, iclass 32, count 0 2006.232.07:43:50.88#ibcon#wrote, iclass 32, count 0 2006.232.07:43:50.88#ibcon#about to read 3, iclass 32, count 0 2006.232.07:43:50.91#ibcon#read 3, iclass 32, count 0 2006.232.07:43:50.91#ibcon#about to read 4, iclass 32, count 0 2006.232.07:43:50.91#ibcon#read 4, iclass 32, count 0 2006.232.07:43:50.91#ibcon#about to read 5, iclass 32, count 0 2006.232.07:43:50.91#ibcon#read 5, iclass 32, count 0 2006.232.07:43:50.91#ibcon#about to read 6, iclass 32, count 0 2006.232.07:43:50.91#ibcon#read 6, iclass 32, count 0 2006.232.07:43:50.91#ibcon#end of sib2, iclass 32, count 0 2006.232.07:43:50.91#ibcon#*after write, iclass 32, count 0 2006.232.07:43:50.91#ibcon#*before return 0, iclass 32, count 0 2006.232.07:43:50.91#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.232.07:43:50.91#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.232.07:43:50.91#ibcon#about to clear, iclass 32 cls_cnt 0 2006.232.07:43:50.91#ibcon#cleared, iclass 32 cls_cnt 0 2006.232.07:43:50.91$vc4f8/vblo=2,640.99 2006.232.07:43:50.91#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.232.07:43:50.91#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.232.07:43:50.91#ibcon#ireg 17 cls_cnt 0 2006.232.07:43:50.91#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.232.07:43:50.91#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.232.07:43:50.91#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.232.07:43:50.91#ibcon#enter wrdev, iclass 34, count 0 2006.232.07:43:50.91#ibcon#first serial, iclass 34, count 0 2006.232.07:43:50.91#ibcon#enter sib2, iclass 34, count 0 2006.232.07:43:50.91#ibcon#flushed, iclass 34, count 0 2006.232.07:43:50.91#ibcon#about to write, iclass 34, count 0 2006.232.07:43:50.91#ibcon#wrote, iclass 34, count 0 2006.232.07:43:50.91#ibcon#about to read 3, iclass 34, count 0 2006.232.07:43:50.94#ibcon#read 3, iclass 34, count 0 2006.232.07:43:50.94#ibcon#about to read 4, iclass 34, count 0 2006.232.07:43:50.94#ibcon#read 4, iclass 34, count 0 2006.232.07:43:50.94#ibcon#about to read 5, iclass 34, count 0 2006.232.07:43:50.94#ibcon#read 5, iclass 34, count 0 2006.232.07:43:50.94#ibcon#about to read 6, iclass 34, count 0 2006.232.07:43:50.94#ibcon#read 6, iclass 34, count 0 2006.232.07:43:50.94#ibcon#end of sib2, iclass 34, count 0 2006.232.07:43:50.94#ibcon#*mode == 0, iclass 34, count 0 2006.232.07:43:50.94#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.232.07:43:50.94#ibcon#[28=FRQ=02,640.99\r\n] 2006.232.07:43:50.94#ibcon#*before write, iclass 34, count 0 2006.232.07:43:50.94#ibcon#enter sib2, iclass 34, count 0 2006.232.07:43:50.94#ibcon#flushed, iclass 34, count 0 2006.232.07:43:50.94#ibcon#about to write, iclass 34, count 0 2006.232.07:43:50.94#ibcon#wrote, iclass 34, count 0 2006.232.07:43:50.94#ibcon#about to read 3, iclass 34, count 0 2006.232.07:43:50.98#ibcon#read 3, iclass 34, count 0 2006.232.07:43:50.98#ibcon#about to read 4, iclass 34, count 0 2006.232.07:43:50.98#ibcon#read 4, iclass 34, count 0 2006.232.07:43:50.98#ibcon#about to read 5, iclass 34, count 0 2006.232.07:43:50.98#ibcon#read 5, iclass 34, count 0 2006.232.07:43:50.98#ibcon#about to read 6, iclass 34, count 0 2006.232.07:43:50.98#ibcon#read 6, iclass 34, count 0 2006.232.07:43:50.98#ibcon#end of sib2, iclass 34, count 0 2006.232.07:43:50.98#ibcon#*after write, iclass 34, count 0 2006.232.07:43:50.98#ibcon#*before return 0, iclass 34, count 0 2006.232.07:43:50.98#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.232.07:43:50.98#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.232.07:43:50.98#ibcon#about to clear, iclass 34 cls_cnt 0 2006.232.07:43:50.98#ibcon#cleared, iclass 34 cls_cnt 0 2006.232.07:43:50.98$vc4f8/vb=2,4 2006.232.07:43:50.98#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.232.07:43:50.98#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.232.07:43:50.98#ibcon#ireg 11 cls_cnt 2 2006.232.07:43:50.98#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.232.07:43:51.03#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.232.07:43:51.03#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.232.07:43:51.03#ibcon#enter wrdev, iclass 36, count 2 2006.232.07:43:51.03#ibcon#first serial, iclass 36, count 2 2006.232.07:43:51.03#ibcon#enter sib2, iclass 36, count 2 2006.232.07:43:51.03#ibcon#flushed, iclass 36, count 2 2006.232.07:43:51.03#ibcon#about to write, iclass 36, count 2 2006.232.07:43:51.03#ibcon#wrote, iclass 36, count 2 2006.232.07:43:51.03#ibcon#about to read 3, iclass 36, count 2 2006.232.07:43:51.05#ibcon#read 3, iclass 36, count 2 2006.232.07:43:51.05#ibcon#about to read 4, iclass 36, count 2 2006.232.07:43:51.05#ibcon#read 4, iclass 36, count 2 2006.232.07:43:51.05#ibcon#about to read 5, iclass 36, count 2 2006.232.07:43:51.05#ibcon#read 5, iclass 36, count 2 2006.232.07:43:51.05#ibcon#about to read 6, iclass 36, count 2 2006.232.07:43:51.05#ibcon#read 6, iclass 36, count 2 2006.232.07:43:51.05#ibcon#end of sib2, iclass 36, count 2 2006.232.07:43:51.05#ibcon#*mode == 0, iclass 36, count 2 2006.232.07:43:51.05#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.232.07:43:51.05#ibcon#[27=AT02-04\r\n] 2006.232.07:43:51.05#ibcon#*before write, iclass 36, count 2 2006.232.07:43:51.05#ibcon#enter sib2, iclass 36, count 2 2006.232.07:43:51.05#ibcon#flushed, iclass 36, count 2 2006.232.07:43:51.05#ibcon#about to write, iclass 36, count 2 2006.232.07:43:51.05#ibcon#wrote, iclass 36, count 2 2006.232.07:43:51.05#ibcon#about to read 3, iclass 36, count 2 2006.232.07:43:51.08#ibcon#read 3, iclass 36, count 2 2006.232.07:43:51.08#ibcon#about to read 4, iclass 36, count 2 2006.232.07:43:51.08#ibcon#read 4, iclass 36, count 2 2006.232.07:43:51.08#ibcon#about to read 5, iclass 36, count 2 2006.232.07:43:51.08#ibcon#read 5, iclass 36, count 2 2006.232.07:43:51.08#ibcon#about to read 6, iclass 36, count 2 2006.232.07:43:51.08#ibcon#read 6, iclass 36, count 2 2006.232.07:43:51.08#ibcon#end of sib2, iclass 36, count 2 2006.232.07:43:51.08#ibcon#*after write, iclass 36, count 2 2006.232.07:43:51.08#ibcon#*before return 0, iclass 36, count 2 2006.232.07:43:51.08#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.232.07:43:51.08#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.232.07:43:51.08#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.232.07:43:51.08#ibcon#ireg 7 cls_cnt 0 2006.232.07:43:51.08#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.232.07:43:51.20#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.232.07:43:51.20#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.232.07:43:51.20#ibcon#enter wrdev, iclass 36, count 0 2006.232.07:43:51.20#ibcon#first serial, iclass 36, count 0 2006.232.07:43:51.20#ibcon#enter sib2, iclass 36, count 0 2006.232.07:43:51.20#ibcon#flushed, iclass 36, count 0 2006.232.07:43:51.20#ibcon#about to write, iclass 36, count 0 2006.232.07:43:51.20#ibcon#wrote, iclass 36, count 0 2006.232.07:43:51.20#ibcon#about to read 3, iclass 36, count 0 2006.232.07:43:51.22#ibcon#read 3, iclass 36, count 0 2006.232.07:43:51.22#ibcon#about to read 4, iclass 36, count 0 2006.232.07:43:51.22#ibcon#read 4, iclass 36, count 0 2006.232.07:43:51.22#ibcon#about to read 5, iclass 36, count 0 2006.232.07:43:51.22#ibcon#read 5, iclass 36, count 0 2006.232.07:43:51.22#ibcon#about to read 6, iclass 36, count 0 2006.232.07:43:51.22#ibcon#read 6, iclass 36, count 0 2006.232.07:43:51.22#ibcon#end of sib2, iclass 36, count 0 2006.232.07:43:51.22#ibcon#*mode == 0, iclass 36, count 0 2006.232.07:43:51.22#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.232.07:43:51.22#ibcon#[27=USB\r\n] 2006.232.07:43:51.22#ibcon#*before write, iclass 36, count 0 2006.232.07:43:51.22#ibcon#enter sib2, iclass 36, count 0 2006.232.07:43:51.22#ibcon#flushed, iclass 36, count 0 2006.232.07:43:51.22#ibcon#about to write, iclass 36, count 0 2006.232.07:43:51.22#ibcon#wrote, iclass 36, count 0 2006.232.07:43:51.22#ibcon#about to read 3, iclass 36, count 0 2006.232.07:43:51.25#ibcon#read 3, iclass 36, count 0 2006.232.07:43:51.25#ibcon#about to read 4, iclass 36, count 0 2006.232.07:43:51.25#ibcon#read 4, iclass 36, count 0 2006.232.07:43:51.25#ibcon#about to read 5, iclass 36, count 0 2006.232.07:43:51.25#ibcon#read 5, iclass 36, count 0 2006.232.07:43:51.25#ibcon#about to read 6, iclass 36, count 0 2006.232.07:43:51.25#ibcon#read 6, iclass 36, count 0 2006.232.07:43:51.25#ibcon#end of sib2, iclass 36, count 0 2006.232.07:43:51.25#ibcon#*after write, iclass 36, count 0 2006.232.07:43:51.25#ibcon#*before return 0, iclass 36, count 0 2006.232.07:43:51.25#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.232.07:43:51.25#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.232.07:43:51.25#ibcon#about to clear, iclass 36 cls_cnt 0 2006.232.07:43:51.25#ibcon#cleared, iclass 36 cls_cnt 0 2006.232.07:43:51.25$vc4f8/vblo=3,656.99 2006.232.07:43:51.25#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.232.07:43:51.25#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.232.07:43:51.25#ibcon#ireg 17 cls_cnt 0 2006.232.07:43:51.25#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.232.07:43:51.25#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.232.07:43:51.25#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.232.07:43:51.25#ibcon#enter wrdev, iclass 38, count 0 2006.232.07:43:51.25#ibcon#first serial, iclass 38, count 0 2006.232.07:43:51.25#ibcon#enter sib2, iclass 38, count 0 2006.232.07:43:51.25#ibcon#flushed, iclass 38, count 0 2006.232.07:43:51.25#ibcon#about to write, iclass 38, count 0 2006.232.07:43:51.25#ibcon#wrote, iclass 38, count 0 2006.232.07:43:51.25#ibcon#about to read 3, iclass 38, count 0 2006.232.07:43:51.27#ibcon#read 3, iclass 38, count 0 2006.232.07:43:51.27#ibcon#about to read 4, iclass 38, count 0 2006.232.07:43:51.27#ibcon#read 4, iclass 38, count 0 2006.232.07:43:51.27#ibcon#about to read 5, iclass 38, count 0 2006.232.07:43:51.27#ibcon#read 5, iclass 38, count 0 2006.232.07:43:51.27#ibcon#about to read 6, iclass 38, count 0 2006.232.07:43:51.27#ibcon#read 6, iclass 38, count 0 2006.232.07:43:51.27#ibcon#end of sib2, iclass 38, count 0 2006.232.07:43:51.27#ibcon#*mode == 0, iclass 38, count 0 2006.232.07:43:51.27#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.232.07:43:51.27#ibcon#[28=FRQ=03,656.99\r\n] 2006.232.07:43:51.27#ibcon#*before write, iclass 38, count 0 2006.232.07:43:51.27#ibcon#enter sib2, iclass 38, count 0 2006.232.07:43:51.27#ibcon#flushed, iclass 38, count 0 2006.232.07:43:51.27#ibcon#about to write, iclass 38, count 0 2006.232.07:43:51.27#ibcon#wrote, iclass 38, count 0 2006.232.07:43:51.27#ibcon#about to read 3, iclass 38, count 0 2006.232.07:43:51.31#ibcon#read 3, iclass 38, count 0 2006.232.07:43:51.31#ibcon#about to read 4, iclass 38, count 0 2006.232.07:43:51.31#ibcon#read 4, iclass 38, count 0 2006.232.07:43:51.31#ibcon#about to read 5, iclass 38, count 0 2006.232.07:43:51.31#ibcon#read 5, iclass 38, count 0 2006.232.07:43:51.31#ibcon#about to read 6, iclass 38, count 0 2006.232.07:43:51.31#ibcon#read 6, iclass 38, count 0 2006.232.07:43:51.31#ibcon#end of sib2, iclass 38, count 0 2006.232.07:43:51.31#ibcon#*after write, iclass 38, count 0 2006.232.07:43:51.31#ibcon#*before return 0, iclass 38, count 0 2006.232.07:43:51.31#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.232.07:43:51.31#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.232.07:43:51.31#ibcon#about to clear, iclass 38 cls_cnt 0 2006.232.07:43:51.31#ibcon#cleared, iclass 38 cls_cnt 0 2006.232.07:43:51.31$vc4f8/vb=3,4 2006.232.07:43:51.31#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.232.07:43:51.31#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.232.07:43:51.31#ibcon#ireg 11 cls_cnt 2 2006.232.07:43:51.31#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.232.07:43:51.37#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.232.07:43:51.37#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.232.07:43:51.37#ibcon#enter wrdev, iclass 40, count 2 2006.232.07:43:51.37#ibcon#first serial, iclass 40, count 2 2006.232.07:43:51.37#ibcon#enter sib2, iclass 40, count 2 2006.232.07:43:51.37#ibcon#flushed, iclass 40, count 2 2006.232.07:43:51.37#ibcon#about to write, iclass 40, count 2 2006.232.07:43:51.37#ibcon#wrote, iclass 40, count 2 2006.232.07:43:51.37#ibcon#about to read 3, iclass 40, count 2 2006.232.07:43:51.39#ibcon#read 3, iclass 40, count 2 2006.232.07:43:51.39#ibcon#about to read 4, iclass 40, count 2 2006.232.07:43:51.39#ibcon#read 4, iclass 40, count 2 2006.232.07:43:51.39#ibcon#about to read 5, iclass 40, count 2 2006.232.07:43:51.39#ibcon#read 5, iclass 40, count 2 2006.232.07:43:51.39#ibcon#about to read 6, iclass 40, count 2 2006.232.07:43:51.39#ibcon#read 6, iclass 40, count 2 2006.232.07:43:51.39#ibcon#end of sib2, iclass 40, count 2 2006.232.07:43:51.39#ibcon#*mode == 0, iclass 40, count 2 2006.232.07:43:51.39#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.232.07:43:51.39#ibcon#[27=AT03-04\r\n] 2006.232.07:43:51.39#ibcon#*before write, iclass 40, count 2 2006.232.07:43:51.39#ibcon#enter sib2, iclass 40, count 2 2006.232.07:43:51.39#ibcon#flushed, iclass 40, count 2 2006.232.07:43:51.39#ibcon#about to write, iclass 40, count 2 2006.232.07:43:51.39#ibcon#wrote, iclass 40, count 2 2006.232.07:43:51.39#ibcon#about to read 3, iclass 40, count 2 2006.232.07:43:51.42#ibcon#read 3, iclass 40, count 2 2006.232.07:43:51.42#ibcon#about to read 4, iclass 40, count 2 2006.232.07:43:51.42#ibcon#read 4, iclass 40, count 2 2006.232.07:43:51.42#ibcon#about to read 5, iclass 40, count 2 2006.232.07:43:51.42#ibcon#read 5, iclass 40, count 2 2006.232.07:43:51.42#ibcon#about to read 6, iclass 40, count 2 2006.232.07:43:51.42#ibcon#read 6, iclass 40, count 2 2006.232.07:43:51.42#ibcon#end of sib2, iclass 40, count 2 2006.232.07:43:51.42#ibcon#*after write, iclass 40, count 2 2006.232.07:43:51.42#ibcon#*before return 0, iclass 40, count 2 2006.232.07:43:51.42#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.232.07:43:51.42#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.232.07:43:51.42#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.232.07:43:51.42#ibcon#ireg 7 cls_cnt 0 2006.232.07:43:51.42#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.232.07:43:51.54#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.232.07:43:51.54#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.232.07:43:51.54#ibcon#enter wrdev, iclass 40, count 0 2006.232.07:43:51.54#ibcon#first serial, iclass 40, count 0 2006.232.07:43:51.54#ibcon#enter sib2, iclass 40, count 0 2006.232.07:43:51.54#ibcon#flushed, iclass 40, count 0 2006.232.07:43:51.54#ibcon#about to write, iclass 40, count 0 2006.232.07:43:51.54#ibcon#wrote, iclass 40, count 0 2006.232.07:43:51.54#ibcon#about to read 3, iclass 40, count 0 2006.232.07:43:51.56#ibcon#read 3, iclass 40, count 0 2006.232.07:43:51.56#ibcon#about to read 4, iclass 40, count 0 2006.232.07:43:51.56#ibcon#read 4, iclass 40, count 0 2006.232.07:43:51.56#ibcon#about to read 5, iclass 40, count 0 2006.232.07:43:51.56#ibcon#read 5, iclass 40, count 0 2006.232.07:43:51.56#ibcon#about to read 6, iclass 40, count 0 2006.232.07:43:51.56#ibcon#read 6, iclass 40, count 0 2006.232.07:43:51.56#ibcon#end of sib2, iclass 40, count 0 2006.232.07:43:51.56#ibcon#*mode == 0, iclass 40, count 0 2006.232.07:43:51.56#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.232.07:43:51.56#ibcon#[27=USB\r\n] 2006.232.07:43:51.56#ibcon#*before write, iclass 40, count 0 2006.232.07:43:51.56#ibcon#enter sib2, iclass 40, count 0 2006.232.07:43:51.56#ibcon#flushed, iclass 40, count 0 2006.232.07:43:51.56#ibcon#about to write, iclass 40, count 0 2006.232.07:43:51.56#ibcon#wrote, iclass 40, count 0 2006.232.07:43:51.56#ibcon#about to read 3, iclass 40, count 0 2006.232.07:43:51.59#ibcon#read 3, iclass 40, count 0 2006.232.07:43:51.59#ibcon#about to read 4, iclass 40, count 0 2006.232.07:43:51.59#ibcon#read 4, iclass 40, count 0 2006.232.07:43:51.59#ibcon#about to read 5, iclass 40, count 0 2006.232.07:43:51.59#ibcon#read 5, iclass 40, count 0 2006.232.07:43:51.59#ibcon#about to read 6, iclass 40, count 0 2006.232.07:43:51.59#ibcon#read 6, iclass 40, count 0 2006.232.07:43:51.59#ibcon#end of sib2, iclass 40, count 0 2006.232.07:43:51.59#ibcon#*after write, iclass 40, count 0 2006.232.07:43:51.59#ibcon#*before return 0, iclass 40, count 0 2006.232.07:43:51.59#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.232.07:43:51.59#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.232.07:43:51.59#ibcon#about to clear, iclass 40 cls_cnt 0 2006.232.07:43:51.59#ibcon#cleared, iclass 40 cls_cnt 0 2006.232.07:43:51.59$vc4f8/vblo=4,712.99 2006.232.07:43:51.59#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.232.07:43:51.59#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.232.07:43:51.59#ibcon#ireg 17 cls_cnt 0 2006.232.07:43:51.59#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.232.07:43:51.59#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.232.07:43:51.59#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.232.07:43:51.59#ibcon#enter wrdev, iclass 4, count 0 2006.232.07:43:51.59#ibcon#first serial, iclass 4, count 0 2006.232.07:43:51.59#ibcon#enter sib2, iclass 4, count 0 2006.232.07:43:51.59#ibcon#flushed, iclass 4, count 0 2006.232.07:43:51.59#ibcon#about to write, iclass 4, count 0 2006.232.07:43:51.59#ibcon#wrote, iclass 4, count 0 2006.232.07:43:51.59#ibcon#about to read 3, iclass 4, count 0 2006.232.07:43:51.61#ibcon#read 3, iclass 4, count 0 2006.232.07:43:51.61#ibcon#about to read 4, iclass 4, count 0 2006.232.07:43:51.61#ibcon#read 4, iclass 4, count 0 2006.232.07:43:51.61#ibcon#about to read 5, iclass 4, count 0 2006.232.07:43:51.61#ibcon#read 5, iclass 4, count 0 2006.232.07:43:51.61#ibcon#about to read 6, iclass 4, count 0 2006.232.07:43:51.61#ibcon#read 6, iclass 4, count 0 2006.232.07:43:51.61#ibcon#end of sib2, iclass 4, count 0 2006.232.07:43:51.61#ibcon#*mode == 0, iclass 4, count 0 2006.232.07:43:51.61#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.232.07:43:51.61#ibcon#[28=FRQ=04,712.99\r\n] 2006.232.07:43:51.61#ibcon#*before write, iclass 4, count 0 2006.232.07:43:51.61#ibcon#enter sib2, iclass 4, count 0 2006.232.07:43:51.61#ibcon#flushed, iclass 4, count 0 2006.232.07:43:51.61#ibcon#about to write, iclass 4, count 0 2006.232.07:43:51.61#ibcon#wrote, iclass 4, count 0 2006.232.07:43:51.61#ibcon#about to read 3, iclass 4, count 0 2006.232.07:43:51.65#ibcon#read 3, iclass 4, count 0 2006.232.07:43:51.65#ibcon#about to read 4, iclass 4, count 0 2006.232.07:43:51.65#ibcon#read 4, iclass 4, count 0 2006.232.07:43:51.65#ibcon#about to read 5, iclass 4, count 0 2006.232.07:43:51.65#ibcon#read 5, iclass 4, count 0 2006.232.07:43:51.65#ibcon#about to read 6, iclass 4, count 0 2006.232.07:43:51.65#ibcon#read 6, iclass 4, count 0 2006.232.07:43:51.65#ibcon#end of sib2, iclass 4, count 0 2006.232.07:43:51.65#ibcon#*after write, iclass 4, count 0 2006.232.07:43:51.65#ibcon#*before return 0, iclass 4, count 0 2006.232.07:43:51.65#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.232.07:43:51.65#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.232.07:43:51.65#ibcon#about to clear, iclass 4 cls_cnt 0 2006.232.07:43:51.65#ibcon#cleared, iclass 4 cls_cnt 0 2006.232.07:43:51.65$vc4f8/vb=4,4 2006.232.07:43:51.65#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.232.07:43:51.65#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.232.07:43:51.65#ibcon#ireg 11 cls_cnt 2 2006.232.07:43:51.65#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.232.07:43:51.71#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.232.07:43:51.71#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.232.07:43:51.71#ibcon#enter wrdev, iclass 6, count 2 2006.232.07:43:51.71#ibcon#first serial, iclass 6, count 2 2006.232.07:43:51.71#ibcon#enter sib2, iclass 6, count 2 2006.232.07:43:51.71#ibcon#flushed, iclass 6, count 2 2006.232.07:43:51.71#ibcon#about to write, iclass 6, count 2 2006.232.07:43:51.71#ibcon#wrote, iclass 6, count 2 2006.232.07:43:51.71#ibcon#about to read 3, iclass 6, count 2 2006.232.07:43:51.73#ibcon#read 3, iclass 6, count 2 2006.232.07:43:51.73#ibcon#about to read 4, iclass 6, count 2 2006.232.07:43:51.73#ibcon#read 4, iclass 6, count 2 2006.232.07:43:51.73#ibcon#about to read 5, iclass 6, count 2 2006.232.07:43:51.73#ibcon#read 5, iclass 6, count 2 2006.232.07:43:51.73#ibcon#about to read 6, iclass 6, count 2 2006.232.07:43:51.73#ibcon#read 6, iclass 6, count 2 2006.232.07:43:51.73#ibcon#end of sib2, iclass 6, count 2 2006.232.07:43:51.73#ibcon#*mode == 0, iclass 6, count 2 2006.232.07:43:51.73#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.232.07:43:51.73#ibcon#[27=AT04-04\r\n] 2006.232.07:43:51.73#ibcon#*before write, iclass 6, count 2 2006.232.07:43:51.73#ibcon#enter sib2, iclass 6, count 2 2006.232.07:43:51.73#ibcon#flushed, iclass 6, count 2 2006.232.07:43:51.73#ibcon#about to write, iclass 6, count 2 2006.232.07:43:51.73#ibcon#wrote, iclass 6, count 2 2006.232.07:43:51.73#ibcon#about to read 3, iclass 6, count 2 2006.232.07:43:51.77#ibcon#read 3, iclass 6, count 2 2006.232.07:43:51.77#ibcon#about to read 4, iclass 6, count 2 2006.232.07:43:51.77#ibcon#read 4, iclass 6, count 2 2006.232.07:43:51.77#ibcon#about to read 5, iclass 6, count 2 2006.232.07:43:51.77#ibcon#read 5, iclass 6, count 2 2006.232.07:43:51.77#ibcon#about to read 6, iclass 6, count 2 2006.232.07:43:51.77#ibcon#read 6, iclass 6, count 2 2006.232.07:43:51.77#ibcon#end of sib2, iclass 6, count 2 2006.232.07:43:51.77#ibcon#*after write, iclass 6, count 2 2006.232.07:43:51.77#ibcon#*before return 0, iclass 6, count 2 2006.232.07:43:51.77#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.232.07:43:51.77#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.232.07:43:51.77#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.232.07:43:51.77#ibcon#ireg 7 cls_cnt 0 2006.232.07:43:51.77#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.232.07:43:51.88#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.232.07:43:51.88#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.232.07:43:51.88#ibcon#enter wrdev, iclass 6, count 0 2006.232.07:43:51.88#ibcon#first serial, iclass 6, count 0 2006.232.07:43:51.88#ibcon#enter sib2, iclass 6, count 0 2006.232.07:43:51.88#ibcon#flushed, iclass 6, count 0 2006.232.07:43:51.88#ibcon#about to write, iclass 6, count 0 2006.232.07:43:51.88#ibcon#wrote, iclass 6, count 0 2006.232.07:43:51.88#ibcon#about to read 3, iclass 6, count 0 2006.232.07:43:51.90#ibcon#read 3, iclass 6, count 0 2006.232.07:43:51.90#ibcon#about to read 4, iclass 6, count 0 2006.232.07:43:51.90#ibcon#read 4, iclass 6, count 0 2006.232.07:43:51.90#ibcon#about to read 5, iclass 6, count 0 2006.232.07:43:51.90#ibcon#read 5, iclass 6, count 0 2006.232.07:43:51.90#ibcon#about to read 6, iclass 6, count 0 2006.232.07:43:51.90#ibcon#read 6, iclass 6, count 0 2006.232.07:43:51.90#ibcon#end of sib2, iclass 6, count 0 2006.232.07:43:51.90#ibcon#*mode == 0, iclass 6, count 0 2006.232.07:43:51.90#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.232.07:43:51.90#ibcon#[27=USB\r\n] 2006.232.07:43:51.90#ibcon#*before write, iclass 6, count 0 2006.232.07:43:51.90#ibcon#enter sib2, iclass 6, count 0 2006.232.07:43:51.90#ibcon#flushed, iclass 6, count 0 2006.232.07:43:51.90#ibcon#about to write, iclass 6, count 0 2006.232.07:43:51.90#ibcon#wrote, iclass 6, count 0 2006.232.07:43:51.90#ibcon#about to read 3, iclass 6, count 0 2006.232.07:43:51.93#ibcon#read 3, iclass 6, count 0 2006.232.07:43:51.93#ibcon#about to read 4, iclass 6, count 0 2006.232.07:43:51.93#ibcon#read 4, iclass 6, count 0 2006.232.07:43:51.93#ibcon#about to read 5, iclass 6, count 0 2006.232.07:43:51.93#ibcon#read 5, iclass 6, count 0 2006.232.07:43:51.93#ibcon#about to read 6, iclass 6, count 0 2006.232.07:43:51.93#ibcon#read 6, iclass 6, count 0 2006.232.07:43:51.93#ibcon#end of sib2, iclass 6, count 0 2006.232.07:43:51.93#ibcon#*after write, iclass 6, count 0 2006.232.07:43:51.93#ibcon#*before return 0, iclass 6, count 0 2006.232.07:43:51.93#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.232.07:43:51.93#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.232.07:43:51.93#ibcon#about to clear, iclass 6 cls_cnt 0 2006.232.07:43:51.93#ibcon#cleared, iclass 6 cls_cnt 0 2006.232.07:43:51.93$vc4f8/vblo=5,744.99 2006.232.07:43:51.93#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.232.07:43:51.93#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.232.07:43:51.93#ibcon#ireg 17 cls_cnt 0 2006.232.07:43:51.93#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.232.07:43:51.93#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.232.07:43:51.93#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.232.07:43:51.93#ibcon#enter wrdev, iclass 10, count 0 2006.232.07:43:51.93#ibcon#first serial, iclass 10, count 0 2006.232.07:43:51.93#ibcon#enter sib2, iclass 10, count 0 2006.232.07:43:51.93#ibcon#flushed, iclass 10, count 0 2006.232.07:43:51.93#ibcon#about to write, iclass 10, count 0 2006.232.07:43:51.93#ibcon#wrote, iclass 10, count 0 2006.232.07:43:51.93#ibcon#about to read 3, iclass 10, count 0 2006.232.07:43:51.95#ibcon#read 3, iclass 10, count 0 2006.232.07:43:51.95#ibcon#about to read 4, iclass 10, count 0 2006.232.07:43:51.95#ibcon#read 4, iclass 10, count 0 2006.232.07:43:51.95#ibcon#about to read 5, iclass 10, count 0 2006.232.07:43:51.95#ibcon#read 5, iclass 10, count 0 2006.232.07:43:51.95#ibcon#about to read 6, iclass 10, count 0 2006.232.07:43:51.95#ibcon#read 6, iclass 10, count 0 2006.232.07:43:51.95#ibcon#end of sib2, iclass 10, count 0 2006.232.07:43:51.95#ibcon#*mode == 0, iclass 10, count 0 2006.232.07:43:51.95#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.232.07:43:51.95#ibcon#[28=FRQ=05,744.99\r\n] 2006.232.07:43:51.95#ibcon#*before write, iclass 10, count 0 2006.232.07:43:51.95#ibcon#enter sib2, iclass 10, count 0 2006.232.07:43:51.95#ibcon#flushed, iclass 10, count 0 2006.232.07:43:51.95#ibcon#about to write, iclass 10, count 0 2006.232.07:43:51.95#ibcon#wrote, iclass 10, count 0 2006.232.07:43:51.95#ibcon#about to read 3, iclass 10, count 0 2006.232.07:43:51.99#ibcon#read 3, iclass 10, count 0 2006.232.07:43:51.99#ibcon#about to read 4, iclass 10, count 0 2006.232.07:43:51.99#ibcon#read 4, iclass 10, count 0 2006.232.07:43:51.99#ibcon#about to read 5, iclass 10, count 0 2006.232.07:43:51.99#ibcon#read 5, iclass 10, count 0 2006.232.07:43:51.99#ibcon#about to read 6, iclass 10, count 0 2006.232.07:43:51.99#ibcon#read 6, iclass 10, count 0 2006.232.07:43:51.99#ibcon#end of sib2, iclass 10, count 0 2006.232.07:43:51.99#ibcon#*after write, iclass 10, count 0 2006.232.07:43:51.99#ibcon#*before return 0, iclass 10, count 0 2006.232.07:43:51.99#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.232.07:43:51.99#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.232.07:43:51.99#ibcon#about to clear, iclass 10 cls_cnt 0 2006.232.07:43:51.99#ibcon#cleared, iclass 10 cls_cnt 0 2006.232.07:43:51.99$vc4f8/vb=5,3 2006.232.07:43:51.99#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.232.07:43:51.99#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.232.07:43:51.99#ibcon#ireg 11 cls_cnt 2 2006.232.07:43:51.99#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.232.07:43:52.05#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.232.07:43:52.05#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.232.07:43:52.05#ibcon#enter wrdev, iclass 12, count 2 2006.232.07:43:52.05#ibcon#first serial, iclass 12, count 2 2006.232.07:43:52.05#ibcon#enter sib2, iclass 12, count 2 2006.232.07:43:52.05#ibcon#flushed, iclass 12, count 2 2006.232.07:43:52.05#ibcon#about to write, iclass 12, count 2 2006.232.07:43:52.05#ibcon#wrote, iclass 12, count 2 2006.232.07:43:52.05#ibcon#about to read 3, iclass 12, count 2 2006.232.07:43:52.07#ibcon#read 3, iclass 12, count 2 2006.232.07:43:52.07#ibcon#about to read 4, iclass 12, count 2 2006.232.07:43:52.07#ibcon#read 4, iclass 12, count 2 2006.232.07:43:52.07#ibcon#about to read 5, iclass 12, count 2 2006.232.07:43:52.07#ibcon#read 5, iclass 12, count 2 2006.232.07:43:52.07#ibcon#about to read 6, iclass 12, count 2 2006.232.07:43:52.07#ibcon#read 6, iclass 12, count 2 2006.232.07:43:52.07#ibcon#end of sib2, iclass 12, count 2 2006.232.07:43:52.07#ibcon#*mode == 0, iclass 12, count 2 2006.232.07:43:52.07#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.232.07:43:52.07#ibcon#[27=AT05-03\r\n] 2006.232.07:43:52.07#ibcon#*before write, iclass 12, count 2 2006.232.07:43:52.07#ibcon#enter sib2, iclass 12, count 2 2006.232.07:43:52.07#ibcon#flushed, iclass 12, count 2 2006.232.07:43:52.07#ibcon#about to write, iclass 12, count 2 2006.232.07:43:52.07#ibcon#wrote, iclass 12, count 2 2006.232.07:43:52.07#ibcon#about to read 3, iclass 12, count 2 2006.232.07:43:52.10#ibcon#read 3, iclass 12, count 2 2006.232.07:43:52.10#ibcon#about to read 4, iclass 12, count 2 2006.232.07:43:52.10#ibcon#read 4, iclass 12, count 2 2006.232.07:43:52.10#ibcon#about to read 5, iclass 12, count 2 2006.232.07:43:52.10#ibcon#read 5, iclass 12, count 2 2006.232.07:43:52.10#ibcon#about to read 6, iclass 12, count 2 2006.232.07:43:52.10#ibcon#read 6, iclass 12, count 2 2006.232.07:43:52.10#ibcon#end of sib2, iclass 12, count 2 2006.232.07:43:52.10#ibcon#*after write, iclass 12, count 2 2006.232.07:43:52.10#ibcon#*before return 0, iclass 12, count 2 2006.232.07:43:52.10#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.232.07:43:52.10#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.232.07:43:52.10#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.232.07:43:52.10#ibcon#ireg 7 cls_cnt 0 2006.232.07:43:52.10#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.232.07:43:52.22#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.232.07:43:52.22#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.232.07:43:52.22#ibcon#enter wrdev, iclass 12, count 0 2006.232.07:43:52.22#ibcon#first serial, iclass 12, count 0 2006.232.07:43:52.22#ibcon#enter sib2, iclass 12, count 0 2006.232.07:43:52.22#ibcon#flushed, iclass 12, count 0 2006.232.07:43:52.22#ibcon#about to write, iclass 12, count 0 2006.232.07:43:52.22#ibcon#wrote, iclass 12, count 0 2006.232.07:43:52.22#ibcon#about to read 3, iclass 12, count 0 2006.232.07:43:52.24#ibcon#read 3, iclass 12, count 0 2006.232.07:43:52.24#ibcon#about to read 4, iclass 12, count 0 2006.232.07:43:52.24#ibcon#read 4, iclass 12, count 0 2006.232.07:43:52.24#ibcon#about to read 5, iclass 12, count 0 2006.232.07:43:52.24#ibcon#read 5, iclass 12, count 0 2006.232.07:43:52.24#ibcon#about to read 6, iclass 12, count 0 2006.232.07:43:52.24#ibcon#read 6, iclass 12, count 0 2006.232.07:43:52.24#ibcon#end of sib2, iclass 12, count 0 2006.232.07:43:52.24#ibcon#*mode == 0, iclass 12, count 0 2006.232.07:43:52.24#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.232.07:43:52.24#ibcon#[27=USB\r\n] 2006.232.07:43:52.24#ibcon#*before write, iclass 12, count 0 2006.232.07:43:52.24#ibcon#enter sib2, iclass 12, count 0 2006.232.07:43:52.24#ibcon#flushed, iclass 12, count 0 2006.232.07:43:52.24#ibcon#about to write, iclass 12, count 0 2006.232.07:43:52.24#ibcon#wrote, iclass 12, count 0 2006.232.07:43:52.24#ibcon#about to read 3, iclass 12, count 0 2006.232.07:43:52.27#ibcon#read 3, iclass 12, count 0 2006.232.07:43:52.27#ibcon#about to read 4, iclass 12, count 0 2006.232.07:43:52.27#ibcon#read 4, iclass 12, count 0 2006.232.07:43:52.27#ibcon#about to read 5, iclass 12, count 0 2006.232.07:43:52.27#ibcon#read 5, iclass 12, count 0 2006.232.07:43:52.27#ibcon#about to read 6, iclass 12, count 0 2006.232.07:43:52.27#ibcon#read 6, iclass 12, count 0 2006.232.07:43:52.27#ibcon#end of sib2, iclass 12, count 0 2006.232.07:43:52.27#ibcon#*after write, iclass 12, count 0 2006.232.07:43:52.27#ibcon#*before return 0, iclass 12, count 0 2006.232.07:43:52.27#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.232.07:43:52.27#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.232.07:43:52.27#ibcon#about to clear, iclass 12 cls_cnt 0 2006.232.07:43:52.27#ibcon#cleared, iclass 12 cls_cnt 0 2006.232.07:43:52.27$vc4f8/vblo=6,752.99 2006.232.07:43:52.27#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.232.07:43:52.27#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.232.07:43:52.27#ibcon#ireg 17 cls_cnt 0 2006.232.07:43:52.27#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.232.07:43:52.27#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.232.07:43:52.27#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.232.07:43:52.27#ibcon#enter wrdev, iclass 14, count 0 2006.232.07:43:52.27#ibcon#first serial, iclass 14, count 0 2006.232.07:43:52.27#ibcon#enter sib2, iclass 14, count 0 2006.232.07:43:52.27#ibcon#flushed, iclass 14, count 0 2006.232.07:43:52.27#ibcon#about to write, iclass 14, count 0 2006.232.07:43:52.27#ibcon#wrote, iclass 14, count 0 2006.232.07:43:52.27#ibcon#about to read 3, iclass 14, count 0 2006.232.07:43:52.29#ibcon#read 3, iclass 14, count 0 2006.232.07:43:52.29#ibcon#about to read 4, iclass 14, count 0 2006.232.07:43:52.29#ibcon#read 4, iclass 14, count 0 2006.232.07:43:52.29#ibcon#about to read 5, iclass 14, count 0 2006.232.07:43:52.29#ibcon#read 5, iclass 14, count 0 2006.232.07:43:52.29#ibcon#about to read 6, iclass 14, count 0 2006.232.07:43:52.29#ibcon#read 6, iclass 14, count 0 2006.232.07:43:52.29#ibcon#end of sib2, iclass 14, count 0 2006.232.07:43:52.29#ibcon#*mode == 0, iclass 14, count 0 2006.232.07:43:52.29#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.232.07:43:52.29#ibcon#[28=FRQ=06,752.99\r\n] 2006.232.07:43:52.29#ibcon#*before write, iclass 14, count 0 2006.232.07:43:52.29#ibcon#enter sib2, iclass 14, count 0 2006.232.07:43:52.29#ibcon#flushed, iclass 14, count 0 2006.232.07:43:52.29#ibcon#about to write, iclass 14, count 0 2006.232.07:43:52.29#ibcon#wrote, iclass 14, count 0 2006.232.07:43:52.29#ibcon#about to read 3, iclass 14, count 0 2006.232.07:43:52.33#ibcon#read 3, iclass 14, count 0 2006.232.07:43:52.33#ibcon#about to read 4, iclass 14, count 0 2006.232.07:43:52.33#ibcon#read 4, iclass 14, count 0 2006.232.07:43:52.33#ibcon#about to read 5, iclass 14, count 0 2006.232.07:43:52.33#ibcon#read 5, iclass 14, count 0 2006.232.07:43:52.33#ibcon#about to read 6, iclass 14, count 0 2006.232.07:43:52.33#ibcon#read 6, iclass 14, count 0 2006.232.07:43:52.33#ibcon#end of sib2, iclass 14, count 0 2006.232.07:43:52.33#ibcon#*after write, iclass 14, count 0 2006.232.07:43:52.33#ibcon#*before return 0, iclass 14, count 0 2006.232.07:43:52.33#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.232.07:43:52.33#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.232.07:43:52.33#ibcon#about to clear, iclass 14 cls_cnt 0 2006.232.07:43:52.33#ibcon#cleared, iclass 14 cls_cnt 0 2006.232.07:43:52.33$vc4f8/vb=6,4 2006.232.07:43:52.33#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.232.07:43:52.33#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.232.07:43:52.33#ibcon#ireg 11 cls_cnt 2 2006.232.07:43:52.33#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.232.07:43:52.39#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.232.07:43:52.39#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.232.07:43:52.39#ibcon#enter wrdev, iclass 16, count 2 2006.232.07:43:52.39#ibcon#first serial, iclass 16, count 2 2006.232.07:43:52.39#ibcon#enter sib2, iclass 16, count 2 2006.232.07:43:52.39#ibcon#flushed, iclass 16, count 2 2006.232.07:43:52.39#ibcon#about to write, iclass 16, count 2 2006.232.07:43:52.39#ibcon#wrote, iclass 16, count 2 2006.232.07:43:52.39#ibcon#about to read 3, iclass 16, count 2 2006.232.07:43:52.41#ibcon#read 3, iclass 16, count 2 2006.232.07:43:52.41#ibcon#about to read 4, iclass 16, count 2 2006.232.07:43:52.41#ibcon#read 4, iclass 16, count 2 2006.232.07:43:52.41#ibcon#about to read 5, iclass 16, count 2 2006.232.07:43:52.41#ibcon#read 5, iclass 16, count 2 2006.232.07:43:52.41#ibcon#about to read 6, iclass 16, count 2 2006.232.07:43:52.41#ibcon#read 6, iclass 16, count 2 2006.232.07:43:52.41#ibcon#end of sib2, iclass 16, count 2 2006.232.07:43:52.41#ibcon#*mode == 0, iclass 16, count 2 2006.232.07:43:52.41#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.232.07:43:52.41#ibcon#[27=AT06-04\r\n] 2006.232.07:43:52.41#ibcon#*before write, iclass 16, count 2 2006.232.07:43:52.41#ibcon#enter sib2, iclass 16, count 2 2006.232.07:43:52.41#ibcon#flushed, iclass 16, count 2 2006.232.07:43:52.41#ibcon#about to write, iclass 16, count 2 2006.232.07:43:52.41#ibcon#wrote, iclass 16, count 2 2006.232.07:43:52.41#ibcon#about to read 3, iclass 16, count 2 2006.232.07:43:52.44#ibcon#read 3, iclass 16, count 2 2006.232.07:43:52.44#ibcon#about to read 4, iclass 16, count 2 2006.232.07:43:52.44#ibcon#read 4, iclass 16, count 2 2006.232.07:43:52.44#ibcon#about to read 5, iclass 16, count 2 2006.232.07:43:52.44#ibcon#read 5, iclass 16, count 2 2006.232.07:43:52.44#ibcon#about to read 6, iclass 16, count 2 2006.232.07:43:52.44#ibcon#read 6, iclass 16, count 2 2006.232.07:43:52.44#ibcon#end of sib2, iclass 16, count 2 2006.232.07:43:52.44#ibcon#*after write, iclass 16, count 2 2006.232.07:43:52.44#ibcon#*before return 0, iclass 16, count 2 2006.232.07:43:52.44#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.232.07:43:52.44#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.232.07:43:52.44#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.232.07:43:52.44#ibcon#ireg 7 cls_cnt 0 2006.232.07:43:52.44#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.232.07:43:52.56#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.232.07:43:52.56#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.232.07:43:52.56#ibcon#enter wrdev, iclass 16, count 0 2006.232.07:43:52.56#ibcon#first serial, iclass 16, count 0 2006.232.07:43:52.56#ibcon#enter sib2, iclass 16, count 0 2006.232.07:43:52.56#ibcon#flushed, iclass 16, count 0 2006.232.07:43:52.56#ibcon#about to write, iclass 16, count 0 2006.232.07:43:52.56#ibcon#wrote, iclass 16, count 0 2006.232.07:43:52.56#ibcon#about to read 3, iclass 16, count 0 2006.232.07:43:52.58#ibcon#read 3, iclass 16, count 0 2006.232.07:43:52.59#ibcon#about to read 4, iclass 16, count 0 2006.232.07:43:52.59#ibcon#read 4, iclass 16, count 0 2006.232.07:43:52.59#ibcon#about to read 5, iclass 16, count 0 2006.232.07:43:52.59#ibcon#read 5, iclass 16, count 0 2006.232.07:43:52.59#ibcon#about to read 6, iclass 16, count 0 2006.232.07:43:52.59#ibcon#read 6, iclass 16, count 0 2006.232.07:43:52.59#ibcon#end of sib2, iclass 16, count 0 2006.232.07:43:52.59#ibcon#*mode == 0, iclass 16, count 0 2006.232.07:43:52.59#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.232.07:43:52.59#ibcon#[27=USB\r\n] 2006.232.07:43:52.59#ibcon#*before write, iclass 16, count 0 2006.232.07:43:52.59#ibcon#enter sib2, iclass 16, count 0 2006.232.07:43:52.59#ibcon#flushed, iclass 16, count 0 2006.232.07:43:52.59#ibcon#about to write, iclass 16, count 0 2006.232.07:43:52.59#ibcon#wrote, iclass 16, count 0 2006.232.07:43:52.59#ibcon#about to read 3, iclass 16, count 0 2006.232.07:43:52.61#ibcon#read 3, iclass 16, count 0 2006.232.07:43:52.61#ibcon#about to read 4, iclass 16, count 0 2006.232.07:43:52.61#ibcon#read 4, iclass 16, count 0 2006.232.07:43:52.61#ibcon#about to read 5, iclass 16, count 0 2006.232.07:43:52.61#ibcon#read 5, iclass 16, count 0 2006.232.07:43:52.61#ibcon#about to read 6, iclass 16, count 0 2006.232.07:43:52.61#ibcon#read 6, iclass 16, count 0 2006.232.07:43:52.61#ibcon#end of sib2, iclass 16, count 0 2006.232.07:43:52.61#ibcon#*after write, iclass 16, count 0 2006.232.07:43:52.61#ibcon#*before return 0, iclass 16, count 0 2006.232.07:43:52.61#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.232.07:43:52.61#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.232.07:43:52.61#ibcon#about to clear, iclass 16 cls_cnt 0 2006.232.07:43:52.61#ibcon#cleared, iclass 16 cls_cnt 0 2006.232.07:43:52.61$vc4f8/vabw=wide 2006.232.07:43:52.61#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.232.07:43:52.61#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.232.07:43:52.61#ibcon#ireg 8 cls_cnt 0 2006.232.07:43:52.61#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.232.07:43:52.61#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.232.07:43:52.61#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.232.07:43:52.61#ibcon#enter wrdev, iclass 18, count 0 2006.232.07:43:52.61#ibcon#first serial, iclass 18, count 0 2006.232.07:43:52.61#ibcon#enter sib2, iclass 18, count 0 2006.232.07:43:52.61#ibcon#flushed, iclass 18, count 0 2006.232.07:43:52.61#ibcon#about to write, iclass 18, count 0 2006.232.07:43:52.61#ibcon#wrote, iclass 18, count 0 2006.232.07:43:52.61#ibcon#about to read 3, iclass 18, count 0 2006.232.07:43:52.63#ibcon#read 3, iclass 18, count 0 2006.232.07:43:52.63#ibcon#about to read 4, iclass 18, count 0 2006.232.07:43:52.63#ibcon#read 4, iclass 18, count 0 2006.232.07:43:52.63#ibcon#about to read 5, iclass 18, count 0 2006.232.07:43:52.63#ibcon#read 5, iclass 18, count 0 2006.232.07:43:52.63#ibcon#about to read 6, iclass 18, count 0 2006.232.07:43:52.63#ibcon#read 6, iclass 18, count 0 2006.232.07:43:52.63#ibcon#end of sib2, iclass 18, count 0 2006.232.07:43:52.63#ibcon#*mode == 0, iclass 18, count 0 2006.232.07:43:52.63#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.232.07:43:52.63#ibcon#[25=BW32\r\n] 2006.232.07:43:52.63#ibcon#*before write, iclass 18, count 0 2006.232.07:43:52.63#ibcon#enter sib2, iclass 18, count 0 2006.232.07:43:52.63#ibcon#flushed, iclass 18, count 0 2006.232.07:43:52.63#ibcon#about to write, iclass 18, count 0 2006.232.07:43:52.63#ibcon#wrote, iclass 18, count 0 2006.232.07:43:52.63#ibcon#about to read 3, iclass 18, count 0 2006.232.07:43:52.66#ibcon#read 3, iclass 18, count 0 2006.232.07:43:52.66#ibcon#about to read 4, iclass 18, count 0 2006.232.07:43:52.66#ibcon#read 4, iclass 18, count 0 2006.232.07:43:52.66#ibcon#about to read 5, iclass 18, count 0 2006.232.07:43:52.66#ibcon#read 5, iclass 18, count 0 2006.232.07:43:52.66#ibcon#about to read 6, iclass 18, count 0 2006.232.07:43:52.66#ibcon#read 6, iclass 18, count 0 2006.232.07:43:52.66#ibcon#end of sib2, iclass 18, count 0 2006.232.07:43:52.66#ibcon#*after write, iclass 18, count 0 2006.232.07:43:52.66#ibcon#*before return 0, iclass 18, count 0 2006.232.07:43:52.66#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.232.07:43:52.66#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.232.07:43:52.66#ibcon#about to clear, iclass 18 cls_cnt 0 2006.232.07:43:52.66#ibcon#cleared, iclass 18 cls_cnt 0 2006.232.07:43:52.66$vc4f8/vbbw=wide 2006.232.07:43:52.66#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.232.07:43:52.66#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.232.07:43:52.66#ibcon#ireg 8 cls_cnt 0 2006.232.07:43:52.66#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:43:52.73#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:43:52.73#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:43:52.73#ibcon#enter wrdev, iclass 20, count 0 2006.232.07:43:52.73#ibcon#first serial, iclass 20, count 0 2006.232.07:43:52.73#ibcon#enter sib2, iclass 20, count 0 2006.232.07:43:52.73#ibcon#flushed, iclass 20, count 0 2006.232.07:43:52.73#ibcon#about to write, iclass 20, count 0 2006.232.07:43:52.73#ibcon#wrote, iclass 20, count 0 2006.232.07:43:52.73#ibcon#about to read 3, iclass 20, count 0 2006.232.07:43:52.75#ibcon#read 3, iclass 20, count 0 2006.232.07:43:52.75#ibcon#about to read 4, iclass 20, count 0 2006.232.07:43:52.75#ibcon#read 4, iclass 20, count 0 2006.232.07:43:52.75#ibcon#about to read 5, iclass 20, count 0 2006.232.07:43:52.75#ibcon#read 5, iclass 20, count 0 2006.232.07:43:52.75#ibcon#about to read 6, iclass 20, count 0 2006.232.07:43:52.75#ibcon#read 6, iclass 20, count 0 2006.232.07:43:52.75#ibcon#end of sib2, iclass 20, count 0 2006.232.07:43:52.75#ibcon#*mode == 0, iclass 20, count 0 2006.232.07:43:52.75#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.232.07:43:52.75#ibcon#[27=BW32\r\n] 2006.232.07:43:52.75#ibcon#*before write, iclass 20, count 0 2006.232.07:43:52.75#ibcon#enter sib2, iclass 20, count 0 2006.232.07:43:52.75#ibcon#flushed, iclass 20, count 0 2006.232.07:43:52.75#ibcon#about to write, iclass 20, count 0 2006.232.07:43:52.75#ibcon#wrote, iclass 20, count 0 2006.232.07:43:52.75#ibcon#about to read 3, iclass 20, count 0 2006.232.07:43:52.78#ibcon#read 3, iclass 20, count 0 2006.232.07:43:52.78#ibcon#about to read 4, iclass 20, count 0 2006.232.07:43:52.78#ibcon#read 4, iclass 20, count 0 2006.232.07:43:52.78#ibcon#about to read 5, iclass 20, count 0 2006.232.07:43:52.78#ibcon#read 5, iclass 20, count 0 2006.232.07:43:52.78#ibcon#about to read 6, iclass 20, count 0 2006.232.07:43:52.78#ibcon#read 6, iclass 20, count 0 2006.232.07:43:52.78#ibcon#end of sib2, iclass 20, count 0 2006.232.07:43:52.78#ibcon#*after write, iclass 20, count 0 2006.232.07:43:52.78#ibcon#*before return 0, iclass 20, count 0 2006.232.07:43:52.78#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:43:52.78#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:43:52.78#ibcon#about to clear, iclass 20 cls_cnt 0 2006.232.07:43:52.78#ibcon#cleared, iclass 20 cls_cnt 0 2006.232.07:43:52.78$4f8m12a/ifd4f 2006.232.07:43:52.78$ifd4f/lo= 2006.232.07:43:52.78$ifd4f/lo=lo1,7680.00,usb,rcp,1 2006.232.07:43:52.78$ifd4f/lo=lo2,1600.00,usb,rcp,1 2006.232.07:43:52.78$ifd4f/lo=lo3,8080.00,usb,rcp,1 2006.232.07:43:52.78$ifd4f/patch= 2006.232.07:43:52.78$ifd4f/patch=lo1,a1,a2,a3,a4 2006.232.07:43:52.78$ifd4f/patch=lo2,b1,b2,b3,b4,b5,b6 2006.232.07:43:52.78$ifd4f/patch=lo3,a5,a6,a7,a8 2006.232.07:43:52.78$4f8m12a/"form=m,16.000,1:2 2006.232.07:43:52.78$4f8m12a/"tpicd 2006.232.07:43:52.79$4f8m12a/echo=off 2006.232.07:43:52.79$4f8m12a/xlog=off 2006.232.07:43:52.79:!2006.232.07:44:40 2006.232.07:44:16.14#trakl#Source acquired 2006.232.07:44:16.14#flagr#flagr/antenna,acquired 2006.232.07:44:40.01:preob 2006.232.07:44:41.14/onsource/TRACKING 2006.232.07:44:41.14:!2006.232.07:44:50 2006.232.07:44:50.00:data_valid=on 2006.232.07:44:50.00:midob 2006.232.07:44:50.14/onsource/TRACKING 2006.232.07:44:50.14/wx/29.42,1007.2,87 2006.232.07:44:50.31/cable/+6.3892E-03 2006.232.07:44:51.40/va/01,08,usb,yes,31,33 2006.232.07:44:51.40/va/02,07,usb,yes,31,33 2006.232.07:44:51.40/va/03,08,usb,yes,23,24 2006.232.07:44:51.40/va/04,07,usb,yes,32,35 2006.232.07:44:51.40/va/05,07,usb,yes,36,38 2006.232.07:44:51.40/va/06,06,usb,yes,35,35 2006.232.07:44:51.40/va/07,06,usb,yes,36,36 2006.232.07:44:51.40/va/08,06,usb,yes,38,38 2006.232.07:44:51.63/valo/01,532.99,yes,locked 2006.232.07:44:51.63/valo/02,572.99,yes,locked 2006.232.07:44:51.63/valo/03,672.99,yes,locked 2006.232.07:44:51.63/valo/04,832.99,yes,locked 2006.232.07:44:51.63/valo/05,652.99,yes,locked 2006.232.07:44:51.63/valo/06,772.99,yes,locked 2006.232.07:44:51.63/valo/07,832.99,yes,locked 2006.232.07:44:51.63/valo/08,852.99,yes,locked 2006.232.07:44:52.72/vb/01,04,usb,yes,31,29 2006.232.07:44:52.72/vb/02,04,usb,yes,32,34 2006.232.07:44:52.72/vb/03,04,usb,yes,29,33 2006.232.07:44:52.72/vb/04,04,usb,yes,30,30 2006.232.07:44:52.72/vb/05,03,usb,yes,35,40 2006.232.07:44:52.72/vb/06,04,usb,yes,29,32 2006.232.07:44:52.72/vb/07,04,usb,yes,31,31 2006.232.07:44:52.72/vb/08,04,usb,yes,29,32 2006.232.07:44:52.96/vblo/01,632.99,yes,locked 2006.232.07:44:52.96/vblo/02,640.99,yes,locked 2006.232.07:44:52.96/vblo/03,656.99,yes,locked 2006.232.07:44:52.96/vblo/04,712.99,yes,locked 2006.232.07:44:52.96/vblo/05,744.99,yes,locked 2006.232.07:44:52.96/vblo/06,752.99,yes,locked 2006.232.07:44:52.96/vblo/07,734.99,yes,locked 2006.232.07:44:52.96/vblo/08,744.99,yes,locked 2006.232.07:44:53.11/vabw/8 2006.232.07:44:53.26/vbbw/8 2006.232.07:44:53.35/xfe/off,on,13.0 2006.232.07:44:53.72/ifatt/23,28,28,28 2006.232.07:44:54.07/fmout-gps/S +4.42E-07 2006.232.07:44:54.11:!2006.232.07:46:00 2006.232.07:46:00.00:data_valid=off 2006.232.07:46:00.00:postob 2006.232.07:46:00.13/cable/+6.3870E-03 2006.232.07:46:00.13/wx/29.43,1007.2,86 2006.232.07:46:01.07/fmout-gps/S +4.43E-07 2006.232.07:46:01.07:scan_name=232-0747,k06232,60 2006.232.07:46:01.07:source=1739+522,174036.98,521143.4,2000.0,cw 2006.232.07:46:02.13#flagr#flagr/antenna,new-source 2006.232.07:46:02.13:checkk5 2006.232.07:46:02.51/chk_autoobs//k5ts1/ autoobs is running! 2006.232.07:46:02.89/chk_autoobs//k5ts2/ autoobs is running! 2006.232.07:46:03.28/chk_autoobs//k5ts3/ autoobs is running! 2006.232.07:46:03.65/chk_autoobs//k5ts4/ autoobs is running! 2006.232.07:46:04.02/chk_obsdata//k5ts1/T2320744??a.dat file size is correct (nominal:560MB, actual:552MB). 2006.232.07:46:04.39/chk_obsdata//k5ts2/T2320744??b.dat file size is correct (nominal:560MB, actual:552MB). 2006.232.07:46:04.75/chk_obsdata//k5ts3/T2320744??c.dat file size is correct (nominal:560MB, actual:552MB). 2006.232.07:46:05.12/chk_obsdata//k5ts4/T2320744??d.dat file size is correct (nominal:560MB, actual:552MB). 2006.232.07:46:05.81/k5log//k5ts1_log_newline 2006.232.07:46:06.51/k5log//k5ts2_log_newline 2006.232.07:46:07.21/k5log//k5ts3_log_newline 2006.232.07:46:07.91/k5log//k5ts4_log_newline 2006.232.07:46:07.93/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.232.07:46:07.93:4f8m12a=1 2006.232.07:46:07.93$4f8m12a/echo=on 2006.232.07:46:07.93$4f8m12a/pcalon 2006.232.07:46:07.94$pcalon/"no phase cal control is implemented here 2006.232.07:46:07.94$4f8m12a/"tpicd=stop 2006.232.07:46:07.94$4f8m12a/vc4f8 2006.232.07:46:07.94$vc4f8/valo=1,532.99 2006.232.07:46:07.94#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.232.07:46:07.94#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.232.07:46:07.94#ibcon#ireg 17 cls_cnt 0 2006.232.07:46:07.94#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.232.07:46:07.94#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.232.07:46:07.94#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.232.07:46:07.94#ibcon#enter wrdev, iclass 39, count 0 2006.232.07:46:07.94#ibcon#first serial, iclass 39, count 0 2006.232.07:46:07.94#ibcon#enter sib2, iclass 39, count 0 2006.232.07:46:07.94#ibcon#flushed, iclass 39, count 0 2006.232.07:46:07.94#ibcon#about to write, iclass 39, count 0 2006.232.07:46:07.94#ibcon#wrote, iclass 39, count 0 2006.232.07:46:07.94#ibcon#about to read 3, iclass 39, count 0 2006.232.07:46:07.98#ibcon#read 3, iclass 39, count 0 2006.232.07:46:07.98#ibcon#about to read 4, iclass 39, count 0 2006.232.07:46:07.98#ibcon#read 4, iclass 39, count 0 2006.232.07:46:07.98#ibcon#about to read 5, iclass 39, count 0 2006.232.07:46:07.98#ibcon#read 5, iclass 39, count 0 2006.232.07:46:07.98#ibcon#about to read 6, iclass 39, count 0 2006.232.07:46:07.98#ibcon#read 6, iclass 39, count 0 2006.232.07:46:07.98#ibcon#end of sib2, iclass 39, count 0 2006.232.07:46:07.98#ibcon#*mode == 0, iclass 39, count 0 2006.232.07:46:07.98#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.232.07:46:07.98#ibcon#[26=FRQ=01,532.99\r\n] 2006.232.07:46:07.98#ibcon#*before write, iclass 39, count 0 2006.232.07:46:07.98#ibcon#enter sib2, iclass 39, count 0 2006.232.07:46:07.98#ibcon#flushed, iclass 39, count 0 2006.232.07:46:07.98#ibcon#about to write, iclass 39, count 0 2006.232.07:46:07.98#ibcon#wrote, iclass 39, count 0 2006.232.07:46:07.98#ibcon#about to read 3, iclass 39, count 0 2006.232.07:46:08.02#ibcon#read 3, iclass 39, count 0 2006.232.07:46:08.02#ibcon#about to read 4, iclass 39, count 0 2006.232.07:46:08.02#ibcon#read 4, iclass 39, count 0 2006.232.07:46:08.02#ibcon#about to read 5, iclass 39, count 0 2006.232.07:46:08.02#ibcon#read 5, iclass 39, count 0 2006.232.07:46:08.02#ibcon#about to read 6, iclass 39, count 0 2006.232.07:46:08.02#ibcon#read 6, iclass 39, count 0 2006.232.07:46:08.02#ibcon#end of sib2, iclass 39, count 0 2006.232.07:46:08.02#ibcon#*after write, iclass 39, count 0 2006.232.07:46:08.02#ibcon#*before return 0, iclass 39, count 0 2006.232.07:46:08.02#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.232.07:46:08.02#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.232.07:46:08.02#ibcon#about to clear, iclass 39 cls_cnt 0 2006.232.07:46:08.02#ibcon#cleared, iclass 39 cls_cnt 0 2006.232.07:46:08.02$vc4f8/va=1,8 2006.232.07:46:08.02#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.232.07:46:08.02#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.232.07:46:08.02#ibcon#ireg 11 cls_cnt 2 2006.232.07:46:08.02#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.232.07:46:08.02#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.232.07:46:08.02#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.232.07:46:08.02#ibcon#enter wrdev, iclass 3, count 2 2006.232.07:46:08.02#ibcon#first serial, iclass 3, count 2 2006.232.07:46:08.02#ibcon#enter sib2, iclass 3, count 2 2006.232.07:46:08.02#ibcon#flushed, iclass 3, count 2 2006.232.07:46:08.02#ibcon#about to write, iclass 3, count 2 2006.232.07:46:08.02#ibcon#wrote, iclass 3, count 2 2006.232.07:46:08.02#ibcon#about to read 3, iclass 3, count 2 2006.232.07:46:08.04#ibcon#read 3, iclass 3, count 2 2006.232.07:46:08.04#ibcon#about to read 4, iclass 3, count 2 2006.232.07:46:08.04#ibcon#read 4, iclass 3, count 2 2006.232.07:46:08.04#ibcon#about to read 5, iclass 3, count 2 2006.232.07:46:08.04#ibcon#read 5, iclass 3, count 2 2006.232.07:46:08.04#ibcon#about to read 6, iclass 3, count 2 2006.232.07:46:08.04#ibcon#read 6, iclass 3, count 2 2006.232.07:46:08.04#ibcon#end of sib2, iclass 3, count 2 2006.232.07:46:08.04#ibcon#*mode == 0, iclass 3, count 2 2006.232.07:46:08.04#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.232.07:46:08.04#ibcon#[25=AT01-08\r\n] 2006.232.07:46:08.04#ibcon#*before write, iclass 3, count 2 2006.232.07:46:08.04#ibcon#enter sib2, iclass 3, count 2 2006.232.07:46:08.04#ibcon#flushed, iclass 3, count 2 2006.232.07:46:08.04#ibcon#about to write, iclass 3, count 2 2006.232.07:46:08.04#ibcon#wrote, iclass 3, count 2 2006.232.07:46:08.04#ibcon#about to read 3, iclass 3, count 2 2006.232.07:46:08.07#ibcon#read 3, iclass 3, count 2 2006.232.07:46:08.07#ibcon#about to read 4, iclass 3, count 2 2006.232.07:46:08.07#ibcon#read 4, iclass 3, count 2 2006.232.07:46:08.07#ibcon#about to read 5, iclass 3, count 2 2006.232.07:46:08.07#ibcon#read 5, iclass 3, count 2 2006.232.07:46:08.07#ibcon#about to read 6, iclass 3, count 2 2006.232.07:46:08.07#ibcon#read 6, iclass 3, count 2 2006.232.07:46:08.07#ibcon#end of sib2, iclass 3, count 2 2006.232.07:46:08.07#ibcon#*after write, iclass 3, count 2 2006.232.07:46:08.07#ibcon#*before return 0, iclass 3, count 2 2006.232.07:46:08.07#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.232.07:46:08.07#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.232.07:46:08.07#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.232.07:46:08.07#ibcon#ireg 7 cls_cnt 0 2006.232.07:46:08.07#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.232.07:46:08.19#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.232.07:46:08.19#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.232.07:46:08.19#ibcon#enter wrdev, iclass 3, count 0 2006.232.07:46:08.19#ibcon#first serial, iclass 3, count 0 2006.232.07:46:08.19#ibcon#enter sib2, iclass 3, count 0 2006.232.07:46:08.19#ibcon#flushed, iclass 3, count 0 2006.232.07:46:08.19#ibcon#about to write, iclass 3, count 0 2006.232.07:46:08.19#ibcon#wrote, iclass 3, count 0 2006.232.07:46:08.19#ibcon#about to read 3, iclass 3, count 0 2006.232.07:46:08.21#ibcon#read 3, iclass 3, count 0 2006.232.07:46:08.21#ibcon#about to read 4, iclass 3, count 0 2006.232.07:46:08.21#ibcon#read 4, iclass 3, count 0 2006.232.07:46:08.21#ibcon#about to read 5, iclass 3, count 0 2006.232.07:46:08.21#ibcon#read 5, iclass 3, count 0 2006.232.07:46:08.21#ibcon#about to read 6, iclass 3, count 0 2006.232.07:46:08.21#ibcon#read 6, iclass 3, count 0 2006.232.07:46:08.21#ibcon#end of sib2, iclass 3, count 0 2006.232.07:46:08.21#ibcon#*mode == 0, iclass 3, count 0 2006.232.07:46:08.21#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.232.07:46:08.21#ibcon#[25=USB\r\n] 2006.232.07:46:08.21#ibcon#*before write, iclass 3, count 0 2006.232.07:46:08.21#ibcon#enter sib2, iclass 3, count 0 2006.232.07:46:08.21#ibcon#flushed, iclass 3, count 0 2006.232.07:46:08.21#ibcon#about to write, iclass 3, count 0 2006.232.07:46:08.21#ibcon#wrote, iclass 3, count 0 2006.232.07:46:08.21#ibcon#about to read 3, iclass 3, count 0 2006.232.07:46:08.24#ibcon#read 3, iclass 3, count 0 2006.232.07:46:08.24#ibcon#about to read 4, iclass 3, count 0 2006.232.07:46:08.24#ibcon#read 4, iclass 3, count 0 2006.232.07:46:08.24#ibcon#about to read 5, iclass 3, count 0 2006.232.07:46:08.24#ibcon#read 5, iclass 3, count 0 2006.232.07:46:08.24#ibcon#about to read 6, iclass 3, count 0 2006.232.07:46:08.24#ibcon#read 6, iclass 3, count 0 2006.232.07:46:08.24#ibcon#end of sib2, iclass 3, count 0 2006.232.07:46:08.24#ibcon#*after write, iclass 3, count 0 2006.232.07:46:08.24#ibcon#*before return 0, iclass 3, count 0 2006.232.07:46:08.24#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.232.07:46:08.24#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.232.07:46:08.24#ibcon#about to clear, iclass 3 cls_cnt 0 2006.232.07:46:08.24#ibcon#cleared, iclass 3 cls_cnt 0 2006.232.07:46:08.24$vc4f8/valo=2,572.99 2006.232.07:46:08.24#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.232.07:46:08.24#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.232.07:46:08.24#ibcon#ireg 17 cls_cnt 0 2006.232.07:46:08.24#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.232.07:46:08.24#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.232.07:46:08.24#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.232.07:46:08.24#ibcon#enter wrdev, iclass 5, count 0 2006.232.07:46:08.24#ibcon#first serial, iclass 5, count 0 2006.232.07:46:08.24#ibcon#enter sib2, iclass 5, count 0 2006.232.07:46:08.24#ibcon#flushed, iclass 5, count 0 2006.232.07:46:08.24#ibcon#about to write, iclass 5, count 0 2006.232.07:46:08.24#ibcon#wrote, iclass 5, count 0 2006.232.07:46:08.24#ibcon#about to read 3, iclass 5, count 0 2006.232.07:46:08.26#ibcon#read 3, iclass 5, count 0 2006.232.07:46:08.26#ibcon#about to read 4, iclass 5, count 0 2006.232.07:46:08.26#ibcon#read 4, iclass 5, count 0 2006.232.07:46:08.26#ibcon#about to read 5, iclass 5, count 0 2006.232.07:46:08.26#ibcon#read 5, iclass 5, count 0 2006.232.07:46:08.26#ibcon#about to read 6, iclass 5, count 0 2006.232.07:46:08.26#ibcon#read 6, iclass 5, count 0 2006.232.07:46:08.26#ibcon#end of sib2, iclass 5, count 0 2006.232.07:46:08.26#ibcon#*mode == 0, iclass 5, count 0 2006.232.07:46:08.26#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.232.07:46:08.26#ibcon#[26=FRQ=02,572.99\r\n] 2006.232.07:46:08.26#ibcon#*before write, iclass 5, count 0 2006.232.07:46:08.26#ibcon#enter sib2, iclass 5, count 0 2006.232.07:46:08.26#ibcon#flushed, iclass 5, count 0 2006.232.07:46:08.26#ibcon#about to write, iclass 5, count 0 2006.232.07:46:08.26#ibcon#wrote, iclass 5, count 0 2006.232.07:46:08.26#ibcon#about to read 3, iclass 5, count 0 2006.232.07:46:08.30#ibcon#read 3, iclass 5, count 0 2006.232.07:46:08.30#ibcon#about to read 4, iclass 5, count 0 2006.232.07:46:08.30#ibcon#read 4, iclass 5, count 0 2006.232.07:46:08.30#ibcon#about to read 5, iclass 5, count 0 2006.232.07:46:08.30#ibcon#read 5, iclass 5, count 0 2006.232.07:46:08.30#ibcon#about to read 6, iclass 5, count 0 2006.232.07:46:08.30#ibcon#read 6, iclass 5, count 0 2006.232.07:46:08.30#ibcon#end of sib2, iclass 5, count 0 2006.232.07:46:08.30#ibcon#*after write, iclass 5, count 0 2006.232.07:46:08.30#ibcon#*before return 0, iclass 5, count 0 2006.232.07:46:08.30#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.232.07:46:08.30#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.232.07:46:08.30#ibcon#about to clear, iclass 5 cls_cnt 0 2006.232.07:46:08.30#ibcon#cleared, iclass 5 cls_cnt 0 2006.232.07:46:08.30$vc4f8/va=2,7 2006.232.07:46:08.30#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.232.07:46:08.30#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.232.07:46:08.30#ibcon#ireg 11 cls_cnt 2 2006.232.07:46:08.30#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.232.07:46:08.36#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.232.07:46:08.36#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.232.07:46:08.36#ibcon#enter wrdev, iclass 7, count 2 2006.232.07:46:08.36#ibcon#first serial, iclass 7, count 2 2006.232.07:46:08.36#ibcon#enter sib2, iclass 7, count 2 2006.232.07:46:08.36#ibcon#flushed, iclass 7, count 2 2006.232.07:46:08.36#ibcon#about to write, iclass 7, count 2 2006.232.07:46:08.36#ibcon#wrote, iclass 7, count 2 2006.232.07:46:08.36#ibcon#about to read 3, iclass 7, count 2 2006.232.07:46:08.38#ibcon#read 3, iclass 7, count 2 2006.232.07:46:08.38#ibcon#about to read 4, iclass 7, count 2 2006.232.07:46:08.38#ibcon#read 4, iclass 7, count 2 2006.232.07:46:08.38#ibcon#about to read 5, iclass 7, count 2 2006.232.07:46:08.38#ibcon#read 5, iclass 7, count 2 2006.232.07:46:08.38#ibcon#about to read 6, iclass 7, count 2 2006.232.07:46:08.38#ibcon#read 6, iclass 7, count 2 2006.232.07:46:08.38#ibcon#end of sib2, iclass 7, count 2 2006.232.07:46:08.38#ibcon#*mode == 0, iclass 7, count 2 2006.232.07:46:08.38#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.232.07:46:08.38#ibcon#[25=AT02-07\r\n] 2006.232.07:46:08.38#ibcon#*before write, iclass 7, count 2 2006.232.07:46:08.38#ibcon#enter sib2, iclass 7, count 2 2006.232.07:46:08.38#ibcon#flushed, iclass 7, count 2 2006.232.07:46:08.38#ibcon#about to write, iclass 7, count 2 2006.232.07:46:08.38#ibcon#wrote, iclass 7, count 2 2006.232.07:46:08.38#ibcon#about to read 3, iclass 7, count 2 2006.232.07:46:08.41#ibcon#read 3, iclass 7, count 2 2006.232.07:46:08.41#ibcon#about to read 4, iclass 7, count 2 2006.232.07:46:08.41#ibcon#read 4, iclass 7, count 2 2006.232.07:46:08.41#ibcon#about to read 5, iclass 7, count 2 2006.232.07:46:08.41#ibcon#read 5, iclass 7, count 2 2006.232.07:46:08.41#ibcon#about to read 6, iclass 7, count 2 2006.232.07:46:08.41#ibcon#read 6, iclass 7, count 2 2006.232.07:46:08.41#ibcon#end of sib2, iclass 7, count 2 2006.232.07:46:08.41#ibcon#*after write, iclass 7, count 2 2006.232.07:46:08.41#ibcon#*before return 0, iclass 7, count 2 2006.232.07:46:08.41#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.232.07:46:08.41#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.232.07:46:08.41#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.232.07:46:08.41#ibcon#ireg 7 cls_cnt 0 2006.232.07:46:08.41#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.232.07:46:08.53#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.232.07:46:08.53#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.232.07:46:08.53#ibcon#enter wrdev, iclass 7, count 0 2006.232.07:46:08.53#ibcon#first serial, iclass 7, count 0 2006.232.07:46:08.53#ibcon#enter sib2, iclass 7, count 0 2006.232.07:46:08.53#ibcon#flushed, iclass 7, count 0 2006.232.07:46:08.53#ibcon#about to write, iclass 7, count 0 2006.232.07:46:08.53#ibcon#wrote, iclass 7, count 0 2006.232.07:46:08.53#ibcon#about to read 3, iclass 7, count 0 2006.232.07:46:08.55#ibcon#read 3, iclass 7, count 0 2006.232.07:46:08.55#ibcon#about to read 4, iclass 7, count 0 2006.232.07:46:08.55#ibcon#read 4, iclass 7, count 0 2006.232.07:46:08.55#ibcon#about to read 5, iclass 7, count 0 2006.232.07:46:08.55#ibcon#read 5, iclass 7, count 0 2006.232.07:46:08.55#ibcon#about to read 6, iclass 7, count 0 2006.232.07:46:08.55#ibcon#read 6, iclass 7, count 0 2006.232.07:46:08.55#ibcon#end of sib2, iclass 7, count 0 2006.232.07:46:08.55#ibcon#*mode == 0, iclass 7, count 0 2006.232.07:46:08.55#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.232.07:46:08.55#ibcon#[25=USB\r\n] 2006.232.07:46:08.55#ibcon#*before write, iclass 7, count 0 2006.232.07:46:08.55#ibcon#enter sib2, iclass 7, count 0 2006.232.07:46:08.55#ibcon#flushed, iclass 7, count 0 2006.232.07:46:08.55#ibcon#about to write, iclass 7, count 0 2006.232.07:46:08.55#ibcon#wrote, iclass 7, count 0 2006.232.07:46:08.55#ibcon#about to read 3, iclass 7, count 0 2006.232.07:46:08.58#ibcon#read 3, iclass 7, count 0 2006.232.07:46:08.58#ibcon#about to read 4, iclass 7, count 0 2006.232.07:46:08.58#ibcon#read 4, iclass 7, count 0 2006.232.07:46:08.58#ibcon#about to read 5, iclass 7, count 0 2006.232.07:46:08.58#ibcon#read 5, iclass 7, count 0 2006.232.07:46:08.58#ibcon#about to read 6, iclass 7, count 0 2006.232.07:46:08.58#ibcon#read 6, iclass 7, count 0 2006.232.07:46:08.58#ibcon#end of sib2, iclass 7, count 0 2006.232.07:46:08.58#ibcon#*after write, iclass 7, count 0 2006.232.07:46:08.58#ibcon#*before return 0, iclass 7, count 0 2006.232.07:46:08.58#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.232.07:46:08.58#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.232.07:46:08.58#ibcon#about to clear, iclass 7 cls_cnt 0 2006.232.07:46:08.58#ibcon#cleared, iclass 7 cls_cnt 0 2006.232.07:46:08.58$vc4f8/valo=3,672.99 2006.232.07:46:08.58#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.232.07:46:08.58#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.232.07:46:08.58#ibcon#ireg 17 cls_cnt 0 2006.232.07:46:08.58#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.232.07:46:08.58#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.232.07:46:08.58#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.232.07:46:08.58#ibcon#enter wrdev, iclass 11, count 0 2006.232.07:46:08.58#ibcon#first serial, iclass 11, count 0 2006.232.07:46:08.58#ibcon#enter sib2, iclass 11, count 0 2006.232.07:46:08.58#ibcon#flushed, iclass 11, count 0 2006.232.07:46:08.58#ibcon#about to write, iclass 11, count 0 2006.232.07:46:08.58#ibcon#wrote, iclass 11, count 0 2006.232.07:46:08.58#ibcon#about to read 3, iclass 11, count 0 2006.232.07:46:08.60#ibcon#read 3, iclass 11, count 0 2006.232.07:46:08.60#ibcon#about to read 4, iclass 11, count 0 2006.232.07:46:08.60#ibcon#read 4, iclass 11, count 0 2006.232.07:46:08.60#ibcon#about to read 5, iclass 11, count 0 2006.232.07:46:08.60#ibcon#read 5, iclass 11, count 0 2006.232.07:46:08.60#ibcon#about to read 6, iclass 11, count 0 2006.232.07:46:08.60#ibcon#read 6, iclass 11, count 0 2006.232.07:46:08.60#ibcon#end of sib2, iclass 11, count 0 2006.232.07:46:08.60#ibcon#*mode == 0, iclass 11, count 0 2006.232.07:46:08.60#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.232.07:46:08.60#ibcon#[26=FRQ=03,672.99\r\n] 2006.232.07:46:08.60#ibcon#*before write, iclass 11, count 0 2006.232.07:46:08.60#ibcon#enter sib2, iclass 11, count 0 2006.232.07:46:08.60#ibcon#flushed, iclass 11, count 0 2006.232.07:46:08.60#ibcon#about to write, iclass 11, count 0 2006.232.07:46:08.60#ibcon#wrote, iclass 11, count 0 2006.232.07:46:08.60#ibcon#about to read 3, iclass 11, count 0 2006.232.07:46:08.64#ibcon#read 3, iclass 11, count 0 2006.232.07:46:08.64#ibcon#about to read 4, iclass 11, count 0 2006.232.07:46:08.64#ibcon#read 4, iclass 11, count 0 2006.232.07:46:08.64#ibcon#about to read 5, iclass 11, count 0 2006.232.07:46:08.64#ibcon#read 5, iclass 11, count 0 2006.232.07:46:08.64#ibcon#about to read 6, iclass 11, count 0 2006.232.07:46:08.64#ibcon#read 6, iclass 11, count 0 2006.232.07:46:08.64#ibcon#end of sib2, iclass 11, count 0 2006.232.07:46:08.64#ibcon#*after write, iclass 11, count 0 2006.232.07:46:08.64#ibcon#*before return 0, iclass 11, count 0 2006.232.07:46:08.64#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.232.07:46:08.64#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.232.07:46:08.64#ibcon#about to clear, iclass 11 cls_cnt 0 2006.232.07:46:08.64#ibcon#cleared, iclass 11 cls_cnt 0 2006.232.07:46:08.64$vc4f8/va=3,8 2006.232.07:46:08.64#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.232.07:46:08.64#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.232.07:46:08.64#ibcon#ireg 11 cls_cnt 2 2006.232.07:46:08.64#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.232.07:46:08.71#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.232.07:46:08.71#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.232.07:46:08.71#ibcon#enter wrdev, iclass 13, count 2 2006.232.07:46:08.71#ibcon#first serial, iclass 13, count 2 2006.232.07:46:08.71#ibcon#enter sib2, iclass 13, count 2 2006.232.07:46:08.71#ibcon#flushed, iclass 13, count 2 2006.232.07:46:08.71#ibcon#about to write, iclass 13, count 2 2006.232.07:46:08.71#ibcon#wrote, iclass 13, count 2 2006.232.07:46:08.71#ibcon#about to read 3, iclass 13, count 2 2006.232.07:46:08.73#ibcon#read 3, iclass 13, count 2 2006.232.07:46:08.73#ibcon#about to read 4, iclass 13, count 2 2006.232.07:46:08.73#ibcon#read 4, iclass 13, count 2 2006.232.07:46:08.73#ibcon#about to read 5, iclass 13, count 2 2006.232.07:46:08.73#ibcon#read 5, iclass 13, count 2 2006.232.07:46:08.73#ibcon#about to read 6, iclass 13, count 2 2006.232.07:46:08.73#ibcon#read 6, iclass 13, count 2 2006.232.07:46:08.73#ibcon#end of sib2, iclass 13, count 2 2006.232.07:46:08.73#ibcon#*mode == 0, iclass 13, count 2 2006.232.07:46:08.73#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.232.07:46:08.73#ibcon#[25=AT03-08\r\n] 2006.232.07:46:08.73#ibcon#*before write, iclass 13, count 2 2006.232.07:46:08.73#ibcon#enter sib2, iclass 13, count 2 2006.232.07:46:08.73#ibcon#flushed, iclass 13, count 2 2006.232.07:46:08.73#ibcon#about to write, iclass 13, count 2 2006.232.07:46:08.73#ibcon#wrote, iclass 13, count 2 2006.232.07:46:08.73#ibcon#about to read 3, iclass 13, count 2 2006.232.07:46:08.75#ibcon#read 3, iclass 13, count 2 2006.232.07:46:08.75#ibcon#about to read 4, iclass 13, count 2 2006.232.07:46:08.75#ibcon#read 4, iclass 13, count 2 2006.232.07:46:08.75#ibcon#about to read 5, iclass 13, count 2 2006.232.07:46:08.75#ibcon#read 5, iclass 13, count 2 2006.232.07:46:08.75#ibcon#about to read 6, iclass 13, count 2 2006.232.07:46:08.75#ibcon#read 6, iclass 13, count 2 2006.232.07:46:08.75#ibcon#end of sib2, iclass 13, count 2 2006.232.07:46:08.75#ibcon#*after write, iclass 13, count 2 2006.232.07:46:08.75#ibcon#*before return 0, iclass 13, count 2 2006.232.07:46:08.75#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.232.07:46:08.75#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.232.07:46:08.75#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.232.07:46:08.75#ibcon#ireg 7 cls_cnt 0 2006.232.07:46:08.75#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.232.07:46:08.87#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.232.07:46:08.87#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.232.07:46:08.87#ibcon#enter wrdev, iclass 13, count 0 2006.232.07:46:08.87#ibcon#first serial, iclass 13, count 0 2006.232.07:46:08.87#ibcon#enter sib2, iclass 13, count 0 2006.232.07:46:08.87#ibcon#flushed, iclass 13, count 0 2006.232.07:46:08.87#ibcon#about to write, iclass 13, count 0 2006.232.07:46:08.87#ibcon#wrote, iclass 13, count 0 2006.232.07:46:08.87#ibcon#about to read 3, iclass 13, count 0 2006.232.07:46:08.89#ibcon#read 3, iclass 13, count 0 2006.232.07:46:08.89#ibcon#about to read 4, iclass 13, count 0 2006.232.07:46:08.89#ibcon#read 4, iclass 13, count 0 2006.232.07:46:08.89#ibcon#about to read 5, iclass 13, count 0 2006.232.07:46:08.89#ibcon#read 5, iclass 13, count 0 2006.232.07:46:08.89#ibcon#about to read 6, iclass 13, count 0 2006.232.07:46:08.89#ibcon#read 6, iclass 13, count 0 2006.232.07:46:08.89#ibcon#end of sib2, iclass 13, count 0 2006.232.07:46:08.89#ibcon#*mode == 0, iclass 13, count 0 2006.232.07:46:08.89#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.232.07:46:08.89#ibcon#[25=USB\r\n] 2006.232.07:46:08.89#ibcon#*before write, iclass 13, count 0 2006.232.07:46:08.89#ibcon#enter sib2, iclass 13, count 0 2006.232.07:46:08.89#ibcon#flushed, iclass 13, count 0 2006.232.07:46:08.89#ibcon#about to write, iclass 13, count 0 2006.232.07:46:08.89#ibcon#wrote, iclass 13, count 0 2006.232.07:46:08.89#ibcon#about to read 3, iclass 13, count 0 2006.232.07:46:08.92#ibcon#read 3, iclass 13, count 0 2006.232.07:46:08.92#ibcon#about to read 4, iclass 13, count 0 2006.232.07:46:08.92#ibcon#read 4, iclass 13, count 0 2006.232.07:46:08.92#ibcon#about to read 5, iclass 13, count 0 2006.232.07:46:08.92#ibcon#read 5, iclass 13, count 0 2006.232.07:46:08.92#ibcon#about to read 6, iclass 13, count 0 2006.232.07:46:08.92#ibcon#read 6, iclass 13, count 0 2006.232.07:46:08.92#ibcon#end of sib2, iclass 13, count 0 2006.232.07:46:08.92#ibcon#*after write, iclass 13, count 0 2006.232.07:46:08.92#ibcon#*before return 0, iclass 13, count 0 2006.232.07:46:08.92#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.232.07:46:08.92#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.232.07:46:08.92#ibcon#about to clear, iclass 13 cls_cnt 0 2006.232.07:46:08.92#ibcon#cleared, iclass 13 cls_cnt 0 2006.232.07:46:08.92$vc4f8/valo=4,832.99 2006.232.07:46:08.92#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.232.07:46:08.92#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.232.07:46:08.92#ibcon#ireg 17 cls_cnt 0 2006.232.07:46:08.92#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.232.07:46:08.92#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.232.07:46:08.92#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.232.07:46:08.92#ibcon#enter wrdev, iclass 15, count 0 2006.232.07:46:08.92#ibcon#first serial, iclass 15, count 0 2006.232.07:46:08.92#ibcon#enter sib2, iclass 15, count 0 2006.232.07:46:08.92#ibcon#flushed, iclass 15, count 0 2006.232.07:46:08.92#ibcon#about to write, iclass 15, count 0 2006.232.07:46:08.92#ibcon#wrote, iclass 15, count 0 2006.232.07:46:08.92#ibcon#about to read 3, iclass 15, count 0 2006.232.07:46:08.94#ibcon#read 3, iclass 15, count 0 2006.232.07:46:08.94#ibcon#about to read 4, iclass 15, count 0 2006.232.07:46:08.94#ibcon#read 4, iclass 15, count 0 2006.232.07:46:08.94#ibcon#about to read 5, iclass 15, count 0 2006.232.07:46:08.94#ibcon#read 5, iclass 15, count 0 2006.232.07:46:08.94#ibcon#about to read 6, iclass 15, count 0 2006.232.07:46:08.94#ibcon#read 6, iclass 15, count 0 2006.232.07:46:08.94#ibcon#end of sib2, iclass 15, count 0 2006.232.07:46:08.94#ibcon#*mode == 0, iclass 15, count 0 2006.232.07:46:08.94#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.232.07:46:08.94#ibcon#[26=FRQ=04,832.99\r\n] 2006.232.07:46:08.94#ibcon#*before write, iclass 15, count 0 2006.232.07:46:08.94#ibcon#enter sib2, iclass 15, count 0 2006.232.07:46:08.94#ibcon#flushed, iclass 15, count 0 2006.232.07:46:08.94#ibcon#about to write, iclass 15, count 0 2006.232.07:46:08.94#ibcon#wrote, iclass 15, count 0 2006.232.07:46:08.94#ibcon#about to read 3, iclass 15, count 0 2006.232.07:46:08.98#ibcon#read 3, iclass 15, count 0 2006.232.07:46:08.98#ibcon#about to read 4, iclass 15, count 0 2006.232.07:46:08.98#ibcon#read 4, iclass 15, count 0 2006.232.07:46:08.98#ibcon#about to read 5, iclass 15, count 0 2006.232.07:46:08.98#ibcon#read 5, iclass 15, count 0 2006.232.07:46:08.98#ibcon#about to read 6, iclass 15, count 0 2006.232.07:46:08.98#ibcon#read 6, iclass 15, count 0 2006.232.07:46:08.98#ibcon#end of sib2, iclass 15, count 0 2006.232.07:46:08.98#ibcon#*after write, iclass 15, count 0 2006.232.07:46:08.98#ibcon#*before return 0, iclass 15, count 0 2006.232.07:46:08.98#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.232.07:46:08.98#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.232.07:46:08.98#ibcon#about to clear, iclass 15 cls_cnt 0 2006.232.07:46:08.98#ibcon#cleared, iclass 15 cls_cnt 0 2006.232.07:46:08.98$vc4f8/va=4,7 2006.232.07:46:08.98#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.232.07:46:08.98#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.232.07:46:08.98#ibcon#ireg 11 cls_cnt 2 2006.232.07:46:08.98#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.232.07:46:09.04#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.232.07:46:09.04#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.232.07:46:09.04#ibcon#enter wrdev, iclass 17, count 2 2006.232.07:46:09.04#ibcon#first serial, iclass 17, count 2 2006.232.07:46:09.04#ibcon#enter sib2, iclass 17, count 2 2006.232.07:46:09.04#ibcon#flushed, iclass 17, count 2 2006.232.07:46:09.04#ibcon#about to write, iclass 17, count 2 2006.232.07:46:09.04#ibcon#wrote, iclass 17, count 2 2006.232.07:46:09.04#ibcon#about to read 3, iclass 17, count 2 2006.232.07:46:09.06#ibcon#read 3, iclass 17, count 2 2006.232.07:46:09.06#ibcon#about to read 4, iclass 17, count 2 2006.232.07:46:09.06#ibcon#read 4, iclass 17, count 2 2006.232.07:46:09.06#ibcon#about to read 5, iclass 17, count 2 2006.232.07:46:09.06#ibcon#read 5, iclass 17, count 2 2006.232.07:46:09.06#ibcon#about to read 6, iclass 17, count 2 2006.232.07:46:09.06#ibcon#read 6, iclass 17, count 2 2006.232.07:46:09.06#ibcon#end of sib2, iclass 17, count 2 2006.232.07:46:09.06#ibcon#*mode == 0, iclass 17, count 2 2006.232.07:46:09.06#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.232.07:46:09.06#ibcon#[25=AT04-07\r\n] 2006.232.07:46:09.06#ibcon#*before write, iclass 17, count 2 2006.232.07:46:09.06#ibcon#enter sib2, iclass 17, count 2 2006.232.07:46:09.06#ibcon#flushed, iclass 17, count 2 2006.232.07:46:09.06#ibcon#about to write, iclass 17, count 2 2006.232.07:46:09.06#ibcon#wrote, iclass 17, count 2 2006.232.07:46:09.06#ibcon#about to read 3, iclass 17, count 2 2006.232.07:46:09.09#ibcon#read 3, iclass 17, count 2 2006.232.07:46:09.09#ibcon#about to read 4, iclass 17, count 2 2006.232.07:46:09.09#ibcon#read 4, iclass 17, count 2 2006.232.07:46:09.09#ibcon#about to read 5, iclass 17, count 2 2006.232.07:46:09.09#ibcon#read 5, iclass 17, count 2 2006.232.07:46:09.09#ibcon#about to read 6, iclass 17, count 2 2006.232.07:46:09.09#ibcon#read 6, iclass 17, count 2 2006.232.07:46:09.09#ibcon#end of sib2, iclass 17, count 2 2006.232.07:46:09.09#ibcon#*after write, iclass 17, count 2 2006.232.07:46:09.09#ibcon#*before return 0, iclass 17, count 2 2006.232.07:46:09.09#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.232.07:46:09.09#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.232.07:46:09.09#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.232.07:46:09.09#ibcon#ireg 7 cls_cnt 0 2006.232.07:46:09.09#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.232.07:46:09.21#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.232.07:46:09.21#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.232.07:46:09.21#ibcon#enter wrdev, iclass 17, count 0 2006.232.07:46:09.21#ibcon#first serial, iclass 17, count 0 2006.232.07:46:09.21#ibcon#enter sib2, iclass 17, count 0 2006.232.07:46:09.21#ibcon#flushed, iclass 17, count 0 2006.232.07:46:09.21#ibcon#about to write, iclass 17, count 0 2006.232.07:46:09.21#ibcon#wrote, iclass 17, count 0 2006.232.07:46:09.21#ibcon#about to read 3, iclass 17, count 0 2006.232.07:46:09.23#ibcon#read 3, iclass 17, count 0 2006.232.07:46:09.23#ibcon#about to read 4, iclass 17, count 0 2006.232.07:46:09.23#ibcon#read 4, iclass 17, count 0 2006.232.07:46:09.23#ibcon#about to read 5, iclass 17, count 0 2006.232.07:46:09.23#ibcon#read 5, iclass 17, count 0 2006.232.07:46:09.23#ibcon#about to read 6, iclass 17, count 0 2006.232.07:46:09.23#ibcon#read 6, iclass 17, count 0 2006.232.07:46:09.23#ibcon#end of sib2, iclass 17, count 0 2006.232.07:46:09.23#ibcon#*mode == 0, iclass 17, count 0 2006.232.07:46:09.23#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.232.07:46:09.23#ibcon#[25=USB\r\n] 2006.232.07:46:09.23#ibcon#*before write, iclass 17, count 0 2006.232.07:46:09.23#ibcon#enter sib2, iclass 17, count 0 2006.232.07:46:09.23#ibcon#flushed, iclass 17, count 0 2006.232.07:46:09.23#ibcon#about to write, iclass 17, count 0 2006.232.07:46:09.23#ibcon#wrote, iclass 17, count 0 2006.232.07:46:09.23#ibcon#about to read 3, iclass 17, count 0 2006.232.07:46:09.26#ibcon#read 3, iclass 17, count 0 2006.232.07:46:09.26#ibcon#about to read 4, iclass 17, count 0 2006.232.07:46:09.26#ibcon#read 4, iclass 17, count 0 2006.232.07:46:09.26#ibcon#about to read 5, iclass 17, count 0 2006.232.07:46:09.26#ibcon#read 5, iclass 17, count 0 2006.232.07:46:09.26#ibcon#about to read 6, iclass 17, count 0 2006.232.07:46:09.26#ibcon#read 6, iclass 17, count 0 2006.232.07:46:09.26#ibcon#end of sib2, iclass 17, count 0 2006.232.07:46:09.26#ibcon#*after write, iclass 17, count 0 2006.232.07:46:09.26#ibcon#*before return 0, iclass 17, count 0 2006.232.07:46:09.26#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.232.07:46:09.26#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.232.07:46:09.26#ibcon#about to clear, iclass 17 cls_cnt 0 2006.232.07:46:09.26#ibcon#cleared, iclass 17 cls_cnt 0 2006.232.07:46:09.26$vc4f8/valo=5,652.99 2006.232.07:46:09.26#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.232.07:46:09.26#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.232.07:46:09.26#ibcon#ireg 17 cls_cnt 0 2006.232.07:46:09.26#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.232.07:46:09.26#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.232.07:46:09.26#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.232.07:46:09.26#ibcon#enter wrdev, iclass 19, count 0 2006.232.07:46:09.26#ibcon#first serial, iclass 19, count 0 2006.232.07:46:09.26#ibcon#enter sib2, iclass 19, count 0 2006.232.07:46:09.26#ibcon#flushed, iclass 19, count 0 2006.232.07:46:09.26#ibcon#about to write, iclass 19, count 0 2006.232.07:46:09.26#ibcon#wrote, iclass 19, count 0 2006.232.07:46:09.26#ibcon#about to read 3, iclass 19, count 0 2006.232.07:46:09.28#ibcon#read 3, iclass 19, count 0 2006.232.07:46:09.28#ibcon#about to read 4, iclass 19, count 0 2006.232.07:46:09.28#ibcon#read 4, iclass 19, count 0 2006.232.07:46:09.28#ibcon#about to read 5, iclass 19, count 0 2006.232.07:46:09.28#ibcon#read 5, iclass 19, count 0 2006.232.07:46:09.28#ibcon#about to read 6, iclass 19, count 0 2006.232.07:46:09.28#ibcon#read 6, iclass 19, count 0 2006.232.07:46:09.28#ibcon#end of sib2, iclass 19, count 0 2006.232.07:46:09.28#ibcon#*mode == 0, iclass 19, count 0 2006.232.07:46:09.28#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.232.07:46:09.28#ibcon#[26=FRQ=05,652.99\r\n] 2006.232.07:46:09.28#ibcon#*before write, iclass 19, count 0 2006.232.07:46:09.28#ibcon#enter sib2, iclass 19, count 0 2006.232.07:46:09.28#ibcon#flushed, iclass 19, count 0 2006.232.07:46:09.28#ibcon#about to write, iclass 19, count 0 2006.232.07:46:09.28#ibcon#wrote, iclass 19, count 0 2006.232.07:46:09.28#ibcon#about to read 3, iclass 19, count 0 2006.232.07:46:09.32#ibcon#read 3, iclass 19, count 0 2006.232.07:46:09.32#ibcon#about to read 4, iclass 19, count 0 2006.232.07:46:09.32#ibcon#read 4, iclass 19, count 0 2006.232.07:46:09.32#ibcon#about to read 5, iclass 19, count 0 2006.232.07:46:09.32#ibcon#read 5, iclass 19, count 0 2006.232.07:46:09.32#ibcon#about to read 6, iclass 19, count 0 2006.232.07:46:09.32#ibcon#read 6, iclass 19, count 0 2006.232.07:46:09.32#ibcon#end of sib2, iclass 19, count 0 2006.232.07:46:09.32#ibcon#*after write, iclass 19, count 0 2006.232.07:46:09.32#ibcon#*before return 0, iclass 19, count 0 2006.232.07:46:09.32#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.232.07:46:09.32#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.232.07:46:09.32#ibcon#about to clear, iclass 19 cls_cnt 0 2006.232.07:46:09.32#ibcon#cleared, iclass 19 cls_cnt 0 2006.232.07:46:09.32$vc4f8/va=5,7 2006.232.07:46:09.32#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.232.07:46:09.32#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.232.07:46:09.32#ibcon#ireg 11 cls_cnt 2 2006.232.07:46:09.32#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.232.07:46:09.38#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.232.07:46:09.38#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.232.07:46:09.38#ibcon#enter wrdev, iclass 21, count 2 2006.232.07:46:09.38#ibcon#first serial, iclass 21, count 2 2006.232.07:46:09.38#ibcon#enter sib2, iclass 21, count 2 2006.232.07:46:09.38#ibcon#flushed, iclass 21, count 2 2006.232.07:46:09.38#ibcon#about to write, iclass 21, count 2 2006.232.07:46:09.38#ibcon#wrote, iclass 21, count 2 2006.232.07:46:09.38#ibcon#about to read 3, iclass 21, count 2 2006.232.07:46:09.40#ibcon#read 3, iclass 21, count 2 2006.232.07:46:09.40#ibcon#about to read 4, iclass 21, count 2 2006.232.07:46:09.40#ibcon#read 4, iclass 21, count 2 2006.232.07:46:09.40#ibcon#about to read 5, iclass 21, count 2 2006.232.07:46:09.40#ibcon#read 5, iclass 21, count 2 2006.232.07:46:09.40#ibcon#about to read 6, iclass 21, count 2 2006.232.07:46:09.40#ibcon#read 6, iclass 21, count 2 2006.232.07:46:09.40#ibcon#end of sib2, iclass 21, count 2 2006.232.07:46:09.40#ibcon#*mode == 0, iclass 21, count 2 2006.232.07:46:09.40#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.232.07:46:09.40#ibcon#[25=AT05-07\r\n] 2006.232.07:46:09.40#ibcon#*before write, iclass 21, count 2 2006.232.07:46:09.40#ibcon#enter sib2, iclass 21, count 2 2006.232.07:46:09.40#ibcon#flushed, iclass 21, count 2 2006.232.07:46:09.40#ibcon#about to write, iclass 21, count 2 2006.232.07:46:09.40#ibcon#wrote, iclass 21, count 2 2006.232.07:46:09.40#ibcon#about to read 3, iclass 21, count 2 2006.232.07:46:09.43#ibcon#read 3, iclass 21, count 2 2006.232.07:46:09.43#ibcon#about to read 4, iclass 21, count 2 2006.232.07:46:09.43#ibcon#read 4, iclass 21, count 2 2006.232.07:46:09.43#ibcon#about to read 5, iclass 21, count 2 2006.232.07:46:09.43#ibcon#read 5, iclass 21, count 2 2006.232.07:46:09.43#ibcon#about to read 6, iclass 21, count 2 2006.232.07:46:09.43#ibcon#read 6, iclass 21, count 2 2006.232.07:46:09.43#ibcon#end of sib2, iclass 21, count 2 2006.232.07:46:09.43#ibcon#*after write, iclass 21, count 2 2006.232.07:46:09.43#ibcon#*before return 0, iclass 21, count 2 2006.232.07:46:09.43#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.232.07:46:09.43#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.232.07:46:09.43#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.232.07:46:09.43#ibcon#ireg 7 cls_cnt 0 2006.232.07:46:09.43#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.232.07:46:09.55#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.232.07:46:09.55#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.232.07:46:09.55#ibcon#enter wrdev, iclass 21, count 0 2006.232.07:46:09.55#ibcon#first serial, iclass 21, count 0 2006.232.07:46:09.55#ibcon#enter sib2, iclass 21, count 0 2006.232.07:46:09.55#ibcon#flushed, iclass 21, count 0 2006.232.07:46:09.55#ibcon#about to write, iclass 21, count 0 2006.232.07:46:09.55#ibcon#wrote, iclass 21, count 0 2006.232.07:46:09.55#ibcon#about to read 3, iclass 21, count 0 2006.232.07:46:09.57#ibcon#read 3, iclass 21, count 0 2006.232.07:46:09.57#ibcon#about to read 4, iclass 21, count 0 2006.232.07:46:09.57#ibcon#read 4, iclass 21, count 0 2006.232.07:46:09.57#ibcon#about to read 5, iclass 21, count 0 2006.232.07:46:09.57#ibcon#read 5, iclass 21, count 0 2006.232.07:46:09.57#ibcon#about to read 6, iclass 21, count 0 2006.232.07:46:09.57#ibcon#read 6, iclass 21, count 0 2006.232.07:46:09.57#ibcon#end of sib2, iclass 21, count 0 2006.232.07:46:09.57#ibcon#*mode == 0, iclass 21, count 0 2006.232.07:46:09.57#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.232.07:46:09.57#ibcon#[25=USB\r\n] 2006.232.07:46:09.57#ibcon#*before write, iclass 21, count 0 2006.232.07:46:09.57#ibcon#enter sib2, iclass 21, count 0 2006.232.07:46:09.57#ibcon#flushed, iclass 21, count 0 2006.232.07:46:09.57#ibcon#about to write, iclass 21, count 0 2006.232.07:46:09.57#ibcon#wrote, iclass 21, count 0 2006.232.07:46:09.57#ibcon#about to read 3, iclass 21, count 0 2006.232.07:46:09.60#ibcon#read 3, iclass 21, count 0 2006.232.07:46:09.60#ibcon#about to read 4, iclass 21, count 0 2006.232.07:46:09.60#ibcon#read 4, iclass 21, count 0 2006.232.07:46:09.60#ibcon#about to read 5, iclass 21, count 0 2006.232.07:46:09.60#ibcon#read 5, iclass 21, count 0 2006.232.07:46:09.60#ibcon#about to read 6, iclass 21, count 0 2006.232.07:46:09.60#ibcon#read 6, iclass 21, count 0 2006.232.07:46:09.60#ibcon#end of sib2, iclass 21, count 0 2006.232.07:46:09.60#ibcon#*after write, iclass 21, count 0 2006.232.07:46:09.60#ibcon#*before return 0, iclass 21, count 0 2006.232.07:46:09.60#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.232.07:46:09.60#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.232.07:46:09.60#ibcon#about to clear, iclass 21 cls_cnt 0 2006.232.07:46:09.60#ibcon#cleared, iclass 21 cls_cnt 0 2006.232.07:46:09.60$vc4f8/valo=6,772.99 2006.232.07:46:09.60#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.232.07:46:09.60#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.232.07:46:09.60#ibcon#ireg 17 cls_cnt 0 2006.232.07:46:09.60#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.232.07:46:09.60#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.232.07:46:09.60#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.232.07:46:09.60#ibcon#enter wrdev, iclass 23, count 0 2006.232.07:46:09.60#ibcon#first serial, iclass 23, count 0 2006.232.07:46:09.60#ibcon#enter sib2, iclass 23, count 0 2006.232.07:46:09.60#ibcon#flushed, iclass 23, count 0 2006.232.07:46:09.60#ibcon#about to write, iclass 23, count 0 2006.232.07:46:09.60#ibcon#wrote, iclass 23, count 0 2006.232.07:46:09.60#ibcon#about to read 3, iclass 23, count 0 2006.232.07:46:09.63#ibcon#read 3, iclass 23, count 0 2006.232.07:46:09.63#ibcon#about to read 4, iclass 23, count 0 2006.232.07:46:09.63#ibcon#read 4, iclass 23, count 0 2006.232.07:46:09.63#ibcon#about to read 5, iclass 23, count 0 2006.232.07:46:09.63#ibcon#read 5, iclass 23, count 0 2006.232.07:46:09.63#ibcon#about to read 6, iclass 23, count 0 2006.232.07:46:09.63#ibcon#read 6, iclass 23, count 0 2006.232.07:46:09.63#ibcon#end of sib2, iclass 23, count 0 2006.232.07:46:09.63#ibcon#*mode == 0, iclass 23, count 0 2006.232.07:46:09.63#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.232.07:46:09.63#ibcon#[26=FRQ=06,772.99\r\n] 2006.232.07:46:09.63#ibcon#*before write, iclass 23, count 0 2006.232.07:46:09.63#ibcon#enter sib2, iclass 23, count 0 2006.232.07:46:09.63#ibcon#flushed, iclass 23, count 0 2006.232.07:46:09.63#ibcon#about to write, iclass 23, count 0 2006.232.07:46:09.63#ibcon#wrote, iclass 23, count 0 2006.232.07:46:09.63#ibcon#about to read 3, iclass 23, count 0 2006.232.07:46:09.67#ibcon#read 3, iclass 23, count 0 2006.232.07:46:09.67#ibcon#about to read 4, iclass 23, count 0 2006.232.07:46:09.67#ibcon#read 4, iclass 23, count 0 2006.232.07:46:09.67#ibcon#about to read 5, iclass 23, count 0 2006.232.07:46:09.67#ibcon#read 5, iclass 23, count 0 2006.232.07:46:09.67#ibcon#about to read 6, iclass 23, count 0 2006.232.07:46:09.67#ibcon#read 6, iclass 23, count 0 2006.232.07:46:09.67#ibcon#end of sib2, iclass 23, count 0 2006.232.07:46:09.67#ibcon#*after write, iclass 23, count 0 2006.232.07:46:09.67#ibcon#*before return 0, iclass 23, count 0 2006.232.07:46:09.67#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.232.07:46:09.67#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.232.07:46:09.67#ibcon#about to clear, iclass 23 cls_cnt 0 2006.232.07:46:09.67#ibcon#cleared, iclass 23 cls_cnt 0 2006.232.07:46:09.67$vc4f8/va=6,6 2006.232.07:46:09.67#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.232.07:46:09.67#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.232.07:46:09.67#ibcon#ireg 11 cls_cnt 2 2006.232.07:46:09.67#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.232.07:46:09.72#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.232.07:46:09.72#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.232.07:46:09.72#ibcon#enter wrdev, iclass 25, count 2 2006.232.07:46:09.72#ibcon#first serial, iclass 25, count 2 2006.232.07:46:09.72#ibcon#enter sib2, iclass 25, count 2 2006.232.07:46:09.72#ibcon#flushed, iclass 25, count 2 2006.232.07:46:09.72#ibcon#about to write, iclass 25, count 2 2006.232.07:46:09.72#ibcon#wrote, iclass 25, count 2 2006.232.07:46:09.72#ibcon#about to read 3, iclass 25, count 2 2006.232.07:46:09.74#ibcon#read 3, iclass 25, count 2 2006.232.07:46:09.74#ibcon#about to read 4, iclass 25, count 2 2006.232.07:46:09.74#ibcon#read 4, iclass 25, count 2 2006.232.07:46:09.74#ibcon#about to read 5, iclass 25, count 2 2006.232.07:46:09.74#ibcon#read 5, iclass 25, count 2 2006.232.07:46:09.74#ibcon#about to read 6, iclass 25, count 2 2006.232.07:46:09.74#ibcon#read 6, iclass 25, count 2 2006.232.07:46:09.74#ibcon#end of sib2, iclass 25, count 2 2006.232.07:46:09.74#ibcon#*mode == 0, iclass 25, count 2 2006.232.07:46:09.74#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.232.07:46:09.74#ibcon#[25=AT06-06\r\n] 2006.232.07:46:09.74#ibcon#*before write, iclass 25, count 2 2006.232.07:46:09.74#ibcon#enter sib2, iclass 25, count 2 2006.232.07:46:09.74#ibcon#flushed, iclass 25, count 2 2006.232.07:46:09.74#ibcon#about to write, iclass 25, count 2 2006.232.07:46:09.74#ibcon#wrote, iclass 25, count 2 2006.232.07:46:09.74#ibcon#about to read 3, iclass 25, count 2 2006.232.07:46:09.77#ibcon#read 3, iclass 25, count 2 2006.232.07:46:09.77#ibcon#about to read 4, iclass 25, count 2 2006.232.07:46:09.77#ibcon#read 4, iclass 25, count 2 2006.232.07:46:09.77#ibcon#about to read 5, iclass 25, count 2 2006.232.07:46:09.77#ibcon#read 5, iclass 25, count 2 2006.232.07:46:09.77#ibcon#about to read 6, iclass 25, count 2 2006.232.07:46:09.77#ibcon#read 6, iclass 25, count 2 2006.232.07:46:09.77#ibcon#end of sib2, iclass 25, count 2 2006.232.07:46:09.77#ibcon#*after write, iclass 25, count 2 2006.232.07:46:09.77#ibcon#*before return 0, iclass 25, count 2 2006.232.07:46:09.77#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.232.07:46:09.77#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.232.07:46:09.77#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.232.07:46:09.77#ibcon#ireg 7 cls_cnt 0 2006.232.07:46:09.77#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.232.07:46:09.89#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.232.07:46:09.89#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.232.07:46:09.89#ibcon#enter wrdev, iclass 25, count 0 2006.232.07:46:09.89#ibcon#first serial, iclass 25, count 0 2006.232.07:46:09.89#ibcon#enter sib2, iclass 25, count 0 2006.232.07:46:09.89#ibcon#flushed, iclass 25, count 0 2006.232.07:46:09.89#ibcon#about to write, iclass 25, count 0 2006.232.07:46:09.89#ibcon#wrote, iclass 25, count 0 2006.232.07:46:09.89#ibcon#about to read 3, iclass 25, count 0 2006.232.07:46:09.91#ibcon#read 3, iclass 25, count 0 2006.232.07:46:09.91#ibcon#about to read 4, iclass 25, count 0 2006.232.07:46:09.91#ibcon#read 4, iclass 25, count 0 2006.232.07:46:09.91#ibcon#about to read 5, iclass 25, count 0 2006.232.07:46:09.91#ibcon#read 5, iclass 25, count 0 2006.232.07:46:09.91#ibcon#about to read 6, iclass 25, count 0 2006.232.07:46:09.91#ibcon#read 6, iclass 25, count 0 2006.232.07:46:09.91#ibcon#end of sib2, iclass 25, count 0 2006.232.07:46:09.91#ibcon#*mode == 0, iclass 25, count 0 2006.232.07:46:09.91#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.232.07:46:09.91#ibcon#[25=USB\r\n] 2006.232.07:46:09.91#ibcon#*before write, iclass 25, count 0 2006.232.07:46:09.91#ibcon#enter sib2, iclass 25, count 0 2006.232.07:46:09.91#ibcon#flushed, iclass 25, count 0 2006.232.07:46:09.91#ibcon#about to write, iclass 25, count 0 2006.232.07:46:09.91#ibcon#wrote, iclass 25, count 0 2006.232.07:46:09.91#ibcon#about to read 3, iclass 25, count 0 2006.232.07:46:09.94#ibcon#read 3, iclass 25, count 0 2006.232.07:46:09.94#ibcon#about to read 4, iclass 25, count 0 2006.232.07:46:09.94#ibcon#read 4, iclass 25, count 0 2006.232.07:46:09.94#ibcon#about to read 5, iclass 25, count 0 2006.232.07:46:09.94#ibcon#read 5, iclass 25, count 0 2006.232.07:46:09.94#ibcon#about to read 6, iclass 25, count 0 2006.232.07:46:09.94#ibcon#read 6, iclass 25, count 0 2006.232.07:46:09.94#ibcon#end of sib2, iclass 25, count 0 2006.232.07:46:09.94#ibcon#*after write, iclass 25, count 0 2006.232.07:46:09.94#ibcon#*before return 0, iclass 25, count 0 2006.232.07:46:09.94#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.232.07:46:09.94#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.232.07:46:09.94#ibcon#about to clear, iclass 25 cls_cnt 0 2006.232.07:46:09.94#ibcon#cleared, iclass 25 cls_cnt 0 2006.232.07:46:09.94$vc4f8/valo=7,832.99 2006.232.07:46:09.94#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.232.07:46:09.94#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.232.07:46:09.94#ibcon#ireg 17 cls_cnt 0 2006.232.07:46:09.94#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.232.07:46:09.94#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.232.07:46:09.94#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.232.07:46:09.94#ibcon#enter wrdev, iclass 27, count 0 2006.232.07:46:09.94#ibcon#first serial, iclass 27, count 0 2006.232.07:46:09.94#ibcon#enter sib2, iclass 27, count 0 2006.232.07:46:09.94#ibcon#flushed, iclass 27, count 0 2006.232.07:46:09.94#ibcon#about to write, iclass 27, count 0 2006.232.07:46:09.94#ibcon#wrote, iclass 27, count 0 2006.232.07:46:09.94#ibcon#about to read 3, iclass 27, count 0 2006.232.07:46:09.96#ibcon#read 3, iclass 27, count 0 2006.232.07:46:09.96#ibcon#about to read 4, iclass 27, count 0 2006.232.07:46:09.96#ibcon#read 4, iclass 27, count 0 2006.232.07:46:09.96#ibcon#about to read 5, iclass 27, count 0 2006.232.07:46:09.96#ibcon#read 5, iclass 27, count 0 2006.232.07:46:09.96#ibcon#about to read 6, iclass 27, count 0 2006.232.07:46:09.96#ibcon#read 6, iclass 27, count 0 2006.232.07:46:09.96#ibcon#end of sib2, iclass 27, count 0 2006.232.07:46:09.96#ibcon#*mode == 0, iclass 27, count 0 2006.232.07:46:09.96#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.232.07:46:09.96#ibcon#[26=FRQ=07,832.99\r\n] 2006.232.07:46:09.96#ibcon#*before write, iclass 27, count 0 2006.232.07:46:09.96#ibcon#enter sib2, iclass 27, count 0 2006.232.07:46:09.96#ibcon#flushed, iclass 27, count 0 2006.232.07:46:09.96#ibcon#about to write, iclass 27, count 0 2006.232.07:46:09.96#ibcon#wrote, iclass 27, count 0 2006.232.07:46:09.96#ibcon#about to read 3, iclass 27, count 0 2006.232.07:46:10.00#ibcon#read 3, iclass 27, count 0 2006.232.07:46:10.00#ibcon#about to read 4, iclass 27, count 0 2006.232.07:46:10.00#ibcon#read 4, iclass 27, count 0 2006.232.07:46:10.00#ibcon#about to read 5, iclass 27, count 0 2006.232.07:46:10.00#ibcon#read 5, iclass 27, count 0 2006.232.07:46:10.00#ibcon#about to read 6, iclass 27, count 0 2006.232.07:46:10.00#ibcon#read 6, iclass 27, count 0 2006.232.07:46:10.00#ibcon#end of sib2, iclass 27, count 0 2006.232.07:46:10.00#ibcon#*after write, iclass 27, count 0 2006.232.07:46:10.00#ibcon#*before return 0, iclass 27, count 0 2006.232.07:46:10.00#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.232.07:46:10.00#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.232.07:46:10.00#ibcon#about to clear, iclass 27 cls_cnt 0 2006.232.07:46:10.00#ibcon#cleared, iclass 27 cls_cnt 0 2006.232.07:46:10.00$vc4f8/va=7,6 2006.232.07:46:10.00#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.232.07:46:10.00#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.232.07:46:10.00#ibcon#ireg 11 cls_cnt 2 2006.232.07:46:10.00#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.232.07:46:10.06#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.232.07:46:10.06#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.232.07:46:10.06#ibcon#enter wrdev, iclass 29, count 2 2006.232.07:46:10.06#ibcon#first serial, iclass 29, count 2 2006.232.07:46:10.06#ibcon#enter sib2, iclass 29, count 2 2006.232.07:46:10.06#ibcon#flushed, iclass 29, count 2 2006.232.07:46:10.06#ibcon#about to write, iclass 29, count 2 2006.232.07:46:10.06#ibcon#wrote, iclass 29, count 2 2006.232.07:46:10.06#ibcon#about to read 3, iclass 29, count 2 2006.232.07:46:10.08#ibcon#read 3, iclass 29, count 2 2006.232.07:46:10.08#ibcon#about to read 4, iclass 29, count 2 2006.232.07:46:10.08#ibcon#read 4, iclass 29, count 2 2006.232.07:46:10.08#ibcon#about to read 5, iclass 29, count 2 2006.232.07:46:10.08#ibcon#read 5, iclass 29, count 2 2006.232.07:46:10.08#ibcon#about to read 6, iclass 29, count 2 2006.232.07:46:10.08#ibcon#read 6, iclass 29, count 2 2006.232.07:46:10.08#ibcon#end of sib2, iclass 29, count 2 2006.232.07:46:10.08#ibcon#*mode == 0, iclass 29, count 2 2006.232.07:46:10.08#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.232.07:46:10.08#ibcon#[25=AT07-06\r\n] 2006.232.07:46:10.08#ibcon#*before write, iclass 29, count 2 2006.232.07:46:10.08#ibcon#enter sib2, iclass 29, count 2 2006.232.07:46:10.08#ibcon#flushed, iclass 29, count 2 2006.232.07:46:10.08#ibcon#about to write, iclass 29, count 2 2006.232.07:46:10.08#ibcon#wrote, iclass 29, count 2 2006.232.07:46:10.08#ibcon#about to read 3, iclass 29, count 2 2006.232.07:46:10.11#ibcon#read 3, iclass 29, count 2 2006.232.07:46:10.11#ibcon#about to read 4, iclass 29, count 2 2006.232.07:46:10.11#ibcon#read 4, iclass 29, count 2 2006.232.07:46:10.11#ibcon#about to read 5, iclass 29, count 2 2006.232.07:46:10.11#ibcon#read 5, iclass 29, count 2 2006.232.07:46:10.11#ibcon#about to read 6, iclass 29, count 2 2006.232.07:46:10.11#ibcon#read 6, iclass 29, count 2 2006.232.07:46:10.11#ibcon#end of sib2, iclass 29, count 2 2006.232.07:46:10.11#ibcon#*after write, iclass 29, count 2 2006.232.07:46:10.11#ibcon#*before return 0, iclass 29, count 2 2006.232.07:46:10.11#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.232.07:46:10.11#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.232.07:46:10.11#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.232.07:46:10.11#ibcon#ireg 7 cls_cnt 0 2006.232.07:46:10.11#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.232.07:46:10.23#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.232.07:46:10.23#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.232.07:46:10.23#ibcon#enter wrdev, iclass 29, count 0 2006.232.07:46:10.23#ibcon#first serial, iclass 29, count 0 2006.232.07:46:10.23#ibcon#enter sib2, iclass 29, count 0 2006.232.07:46:10.23#ibcon#flushed, iclass 29, count 0 2006.232.07:46:10.23#ibcon#about to write, iclass 29, count 0 2006.232.07:46:10.23#ibcon#wrote, iclass 29, count 0 2006.232.07:46:10.23#ibcon#about to read 3, iclass 29, count 0 2006.232.07:46:10.25#ibcon#read 3, iclass 29, count 0 2006.232.07:46:10.25#ibcon#about to read 4, iclass 29, count 0 2006.232.07:46:10.25#ibcon#read 4, iclass 29, count 0 2006.232.07:46:10.25#ibcon#about to read 5, iclass 29, count 0 2006.232.07:46:10.25#ibcon#read 5, iclass 29, count 0 2006.232.07:46:10.25#ibcon#about to read 6, iclass 29, count 0 2006.232.07:46:10.25#ibcon#read 6, iclass 29, count 0 2006.232.07:46:10.25#ibcon#end of sib2, iclass 29, count 0 2006.232.07:46:10.25#ibcon#*mode == 0, iclass 29, count 0 2006.232.07:46:10.25#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.232.07:46:10.25#ibcon#[25=USB\r\n] 2006.232.07:46:10.25#ibcon#*before write, iclass 29, count 0 2006.232.07:46:10.25#ibcon#enter sib2, iclass 29, count 0 2006.232.07:46:10.25#ibcon#flushed, iclass 29, count 0 2006.232.07:46:10.25#ibcon#about to write, iclass 29, count 0 2006.232.07:46:10.25#ibcon#wrote, iclass 29, count 0 2006.232.07:46:10.25#ibcon#about to read 3, iclass 29, count 0 2006.232.07:46:10.28#ibcon#read 3, iclass 29, count 0 2006.232.07:46:10.28#ibcon#about to read 4, iclass 29, count 0 2006.232.07:46:10.28#ibcon#read 4, iclass 29, count 0 2006.232.07:46:10.28#ibcon#about to read 5, iclass 29, count 0 2006.232.07:46:10.28#ibcon#read 5, iclass 29, count 0 2006.232.07:46:10.28#ibcon#about to read 6, iclass 29, count 0 2006.232.07:46:10.28#ibcon#read 6, iclass 29, count 0 2006.232.07:46:10.28#ibcon#end of sib2, iclass 29, count 0 2006.232.07:46:10.28#ibcon#*after write, iclass 29, count 0 2006.232.07:46:10.28#ibcon#*before return 0, iclass 29, count 0 2006.232.07:46:10.28#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.232.07:46:10.28#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.232.07:46:10.28#ibcon#about to clear, iclass 29 cls_cnt 0 2006.232.07:46:10.28#ibcon#cleared, iclass 29 cls_cnt 0 2006.232.07:46:10.28$vc4f8/valo=8,852.99 2006.232.07:46:10.28#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.232.07:46:10.28#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.232.07:46:10.28#ibcon#ireg 17 cls_cnt 0 2006.232.07:46:10.28#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.232.07:46:10.28#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.232.07:46:10.28#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.232.07:46:10.28#ibcon#enter wrdev, iclass 31, count 0 2006.232.07:46:10.28#ibcon#first serial, iclass 31, count 0 2006.232.07:46:10.28#ibcon#enter sib2, iclass 31, count 0 2006.232.07:46:10.28#ibcon#flushed, iclass 31, count 0 2006.232.07:46:10.28#ibcon#about to write, iclass 31, count 0 2006.232.07:46:10.28#ibcon#wrote, iclass 31, count 0 2006.232.07:46:10.28#ibcon#about to read 3, iclass 31, count 0 2006.232.07:46:10.30#ibcon#read 3, iclass 31, count 0 2006.232.07:46:10.30#ibcon#about to read 4, iclass 31, count 0 2006.232.07:46:10.30#ibcon#read 4, iclass 31, count 0 2006.232.07:46:10.30#ibcon#about to read 5, iclass 31, count 0 2006.232.07:46:10.30#ibcon#read 5, iclass 31, count 0 2006.232.07:46:10.30#ibcon#about to read 6, iclass 31, count 0 2006.232.07:46:10.30#ibcon#read 6, iclass 31, count 0 2006.232.07:46:10.30#ibcon#end of sib2, iclass 31, count 0 2006.232.07:46:10.30#ibcon#*mode == 0, iclass 31, count 0 2006.232.07:46:10.30#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.232.07:46:10.30#ibcon#[26=FRQ=08,852.99\r\n] 2006.232.07:46:10.30#ibcon#*before write, iclass 31, count 0 2006.232.07:46:10.30#ibcon#enter sib2, iclass 31, count 0 2006.232.07:46:10.30#ibcon#flushed, iclass 31, count 0 2006.232.07:46:10.30#ibcon#about to write, iclass 31, count 0 2006.232.07:46:10.30#ibcon#wrote, iclass 31, count 0 2006.232.07:46:10.30#ibcon#about to read 3, iclass 31, count 0 2006.232.07:46:10.34#ibcon#read 3, iclass 31, count 0 2006.232.07:46:10.34#ibcon#about to read 4, iclass 31, count 0 2006.232.07:46:10.34#ibcon#read 4, iclass 31, count 0 2006.232.07:46:10.34#ibcon#about to read 5, iclass 31, count 0 2006.232.07:46:10.34#ibcon#read 5, iclass 31, count 0 2006.232.07:46:10.34#ibcon#about to read 6, iclass 31, count 0 2006.232.07:46:10.34#ibcon#read 6, iclass 31, count 0 2006.232.07:46:10.34#ibcon#end of sib2, iclass 31, count 0 2006.232.07:46:10.34#ibcon#*after write, iclass 31, count 0 2006.232.07:46:10.34#ibcon#*before return 0, iclass 31, count 0 2006.232.07:46:10.34#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.232.07:46:10.34#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.232.07:46:10.34#ibcon#about to clear, iclass 31 cls_cnt 0 2006.232.07:46:10.34#ibcon#cleared, iclass 31 cls_cnt 0 2006.232.07:46:10.34$vc4f8/va=8,6 2006.232.07:46:10.34#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.232.07:46:10.34#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.232.07:46:10.34#ibcon#ireg 11 cls_cnt 2 2006.232.07:46:10.34#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.232.07:46:10.40#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.232.07:46:10.40#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.232.07:46:10.40#ibcon#enter wrdev, iclass 33, count 2 2006.232.07:46:10.40#ibcon#first serial, iclass 33, count 2 2006.232.07:46:10.40#ibcon#enter sib2, iclass 33, count 2 2006.232.07:46:10.40#ibcon#flushed, iclass 33, count 2 2006.232.07:46:10.40#ibcon#about to write, iclass 33, count 2 2006.232.07:46:10.40#ibcon#wrote, iclass 33, count 2 2006.232.07:46:10.40#ibcon#about to read 3, iclass 33, count 2 2006.232.07:46:10.42#ibcon#read 3, iclass 33, count 2 2006.232.07:46:10.42#ibcon#about to read 4, iclass 33, count 2 2006.232.07:46:10.42#ibcon#read 4, iclass 33, count 2 2006.232.07:46:10.42#ibcon#about to read 5, iclass 33, count 2 2006.232.07:46:10.42#ibcon#read 5, iclass 33, count 2 2006.232.07:46:10.42#ibcon#about to read 6, iclass 33, count 2 2006.232.07:46:10.42#ibcon#read 6, iclass 33, count 2 2006.232.07:46:10.42#ibcon#end of sib2, iclass 33, count 2 2006.232.07:46:10.42#ibcon#*mode == 0, iclass 33, count 2 2006.232.07:46:10.42#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.232.07:46:10.42#ibcon#[25=AT08-06\r\n] 2006.232.07:46:10.42#ibcon#*before write, iclass 33, count 2 2006.232.07:46:10.42#ibcon#enter sib2, iclass 33, count 2 2006.232.07:46:10.42#ibcon#flushed, iclass 33, count 2 2006.232.07:46:10.42#ibcon#about to write, iclass 33, count 2 2006.232.07:46:10.42#ibcon#wrote, iclass 33, count 2 2006.232.07:46:10.42#ibcon#about to read 3, iclass 33, count 2 2006.232.07:46:10.45#ibcon#read 3, iclass 33, count 2 2006.232.07:46:10.45#ibcon#about to read 4, iclass 33, count 2 2006.232.07:46:10.45#ibcon#read 4, iclass 33, count 2 2006.232.07:46:10.45#ibcon#about to read 5, iclass 33, count 2 2006.232.07:46:10.45#ibcon#read 5, iclass 33, count 2 2006.232.07:46:10.45#ibcon#about to read 6, iclass 33, count 2 2006.232.07:46:10.45#ibcon#read 6, iclass 33, count 2 2006.232.07:46:10.45#ibcon#end of sib2, iclass 33, count 2 2006.232.07:46:10.45#ibcon#*after write, iclass 33, count 2 2006.232.07:46:10.45#ibcon#*before return 0, iclass 33, count 2 2006.232.07:46:10.45#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.232.07:46:10.45#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.232.07:46:10.45#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.232.07:46:10.45#ibcon#ireg 7 cls_cnt 0 2006.232.07:46:10.45#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.232.07:46:10.57#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.232.07:46:10.57#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.232.07:46:10.57#ibcon#enter wrdev, iclass 33, count 0 2006.232.07:46:10.57#ibcon#first serial, iclass 33, count 0 2006.232.07:46:10.57#ibcon#enter sib2, iclass 33, count 0 2006.232.07:46:10.57#ibcon#flushed, iclass 33, count 0 2006.232.07:46:10.57#ibcon#about to write, iclass 33, count 0 2006.232.07:46:10.57#ibcon#wrote, iclass 33, count 0 2006.232.07:46:10.57#ibcon#about to read 3, iclass 33, count 0 2006.232.07:46:10.59#ibcon#read 3, iclass 33, count 0 2006.232.07:46:10.59#ibcon#about to read 4, iclass 33, count 0 2006.232.07:46:10.59#ibcon#read 4, iclass 33, count 0 2006.232.07:46:10.59#ibcon#about to read 5, iclass 33, count 0 2006.232.07:46:10.59#ibcon#read 5, iclass 33, count 0 2006.232.07:46:10.59#ibcon#about to read 6, iclass 33, count 0 2006.232.07:46:10.59#ibcon#read 6, iclass 33, count 0 2006.232.07:46:10.59#ibcon#end of sib2, iclass 33, count 0 2006.232.07:46:10.59#ibcon#*mode == 0, iclass 33, count 0 2006.232.07:46:10.59#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.232.07:46:10.59#ibcon#[25=USB\r\n] 2006.232.07:46:10.59#ibcon#*before write, iclass 33, count 0 2006.232.07:46:10.59#ibcon#enter sib2, iclass 33, count 0 2006.232.07:46:10.59#ibcon#flushed, iclass 33, count 0 2006.232.07:46:10.59#ibcon#about to write, iclass 33, count 0 2006.232.07:46:10.59#ibcon#wrote, iclass 33, count 0 2006.232.07:46:10.59#ibcon#about to read 3, iclass 33, count 0 2006.232.07:46:10.62#ibcon#read 3, iclass 33, count 0 2006.232.07:46:10.62#ibcon#about to read 4, iclass 33, count 0 2006.232.07:46:10.62#ibcon#read 4, iclass 33, count 0 2006.232.07:46:10.62#ibcon#about to read 5, iclass 33, count 0 2006.232.07:46:10.62#ibcon#read 5, iclass 33, count 0 2006.232.07:46:10.62#ibcon#about to read 6, iclass 33, count 0 2006.232.07:46:10.62#ibcon#read 6, iclass 33, count 0 2006.232.07:46:10.62#ibcon#end of sib2, iclass 33, count 0 2006.232.07:46:10.62#ibcon#*after write, iclass 33, count 0 2006.232.07:46:10.62#ibcon#*before return 0, iclass 33, count 0 2006.232.07:46:10.62#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.232.07:46:10.62#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.232.07:46:10.62#ibcon#about to clear, iclass 33 cls_cnt 0 2006.232.07:46:10.62#ibcon#cleared, iclass 33 cls_cnt 0 2006.232.07:46:10.62$vc4f8/vblo=1,632.99 2006.232.07:46:10.62#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.232.07:46:10.62#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.232.07:46:10.62#ibcon#ireg 17 cls_cnt 0 2006.232.07:46:10.62#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.232.07:46:10.62#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.232.07:46:10.62#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.232.07:46:10.62#ibcon#enter wrdev, iclass 35, count 0 2006.232.07:46:10.62#ibcon#first serial, iclass 35, count 0 2006.232.07:46:10.62#ibcon#enter sib2, iclass 35, count 0 2006.232.07:46:10.62#ibcon#flushed, iclass 35, count 0 2006.232.07:46:10.62#ibcon#about to write, iclass 35, count 0 2006.232.07:46:10.62#ibcon#wrote, iclass 35, count 0 2006.232.07:46:10.62#ibcon#about to read 3, iclass 35, count 0 2006.232.07:46:10.64#ibcon#read 3, iclass 35, count 0 2006.232.07:46:10.64#ibcon#about to read 4, iclass 35, count 0 2006.232.07:46:10.64#ibcon#read 4, iclass 35, count 0 2006.232.07:46:10.64#ibcon#about to read 5, iclass 35, count 0 2006.232.07:46:10.64#ibcon#read 5, iclass 35, count 0 2006.232.07:46:10.64#ibcon#about to read 6, iclass 35, count 0 2006.232.07:46:10.64#ibcon#read 6, iclass 35, count 0 2006.232.07:46:10.64#ibcon#end of sib2, iclass 35, count 0 2006.232.07:46:10.64#ibcon#*mode == 0, iclass 35, count 0 2006.232.07:46:10.64#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.232.07:46:10.64#ibcon#[28=FRQ=01,632.99\r\n] 2006.232.07:46:10.64#ibcon#*before write, iclass 35, count 0 2006.232.07:46:10.64#ibcon#enter sib2, iclass 35, count 0 2006.232.07:46:10.64#ibcon#flushed, iclass 35, count 0 2006.232.07:46:10.64#ibcon#about to write, iclass 35, count 0 2006.232.07:46:10.64#ibcon#wrote, iclass 35, count 0 2006.232.07:46:10.64#ibcon#about to read 3, iclass 35, count 0 2006.232.07:46:10.68#ibcon#read 3, iclass 35, count 0 2006.232.07:46:10.68#ibcon#about to read 4, iclass 35, count 0 2006.232.07:46:10.68#ibcon#read 4, iclass 35, count 0 2006.232.07:46:10.68#ibcon#about to read 5, iclass 35, count 0 2006.232.07:46:10.68#ibcon#read 5, iclass 35, count 0 2006.232.07:46:10.68#ibcon#about to read 6, iclass 35, count 0 2006.232.07:46:10.68#ibcon#read 6, iclass 35, count 0 2006.232.07:46:10.68#ibcon#end of sib2, iclass 35, count 0 2006.232.07:46:10.68#ibcon#*after write, iclass 35, count 0 2006.232.07:46:10.68#ibcon#*before return 0, iclass 35, count 0 2006.232.07:46:10.68#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.232.07:46:10.68#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.232.07:46:10.68#ibcon#about to clear, iclass 35 cls_cnt 0 2006.232.07:46:10.68#ibcon#cleared, iclass 35 cls_cnt 0 2006.232.07:46:10.68$vc4f8/vb=1,4 2006.232.07:46:10.68#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.232.07:46:10.68#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.232.07:46:10.68#ibcon#ireg 11 cls_cnt 2 2006.232.07:46:10.68#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.232.07:46:10.68#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.232.07:46:10.68#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.232.07:46:10.68#ibcon#enter wrdev, iclass 37, count 2 2006.232.07:46:10.68#ibcon#first serial, iclass 37, count 2 2006.232.07:46:10.68#ibcon#enter sib2, iclass 37, count 2 2006.232.07:46:10.68#ibcon#flushed, iclass 37, count 2 2006.232.07:46:10.68#ibcon#about to write, iclass 37, count 2 2006.232.07:46:10.68#ibcon#wrote, iclass 37, count 2 2006.232.07:46:10.68#ibcon#about to read 3, iclass 37, count 2 2006.232.07:46:10.70#ibcon#read 3, iclass 37, count 2 2006.232.07:46:10.70#ibcon#about to read 4, iclass 37, count 2 2006.232.07:46:10.70#ibcon#read 4, iclass 37, count 2 2006.232.07:46:10.70#ibcon#about to read 5, iclass 37, count 2 2006.232.07:46:10.70#ibcon#read 5, iclass 37, count 2 2006.232.07:46:10.70#ibcon#about to read 6, iclass 37, count 2 2006.232.07:46:10.70#ibcon#read 6, iclass 37, count 2 2006.232.07:46:10.70#ibcon#end of sib2, iclass 37, count 2 2006.232.07:46:10.70#ibcon#*mode == 0, iclass 37, count 2 2006.232.07:46:10.70#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.232.07:46:10.70#ibcon#[27=AT01-04\r\n] 2006.232.07:46:10.70#ibcon#*before write, iclass 37, count 2 2006.232.07:46:10.70#ibcon#enter sib2, iclass 37, count 2 2006.232.07:46:10.70#ibcon#flushed, iclass 37, count 2 2006.232.07:46:10.70#ibcon#about to write, iclass 37, count 2 2006.232.07:46:10.70#ibcon#wrote, iclass 37, count 2 2006.232.07:46:10.70#ibcon#about to read 3, iclass 37, count 2 2006.232.07:46:10.73#ibcon#read 3, iclass 37, count 2 2006.232.07:46:10.73#ibcon#about to read 4, iclass 37, count 2 2006.232.07:46:10.73#ibcon#read 4, iclass 37, count 2 2006.232.07:46:10.73#ibcon#about to read 5, iclass 37, count 2 2006.232.07:46:10.73#ibcon#read 5, iclass 37, count 2 2006.232.07:46:10.73#ibcon#about to read 6, iclass 37, count 2 2006.232.07:46:10.73#ibcon#read 6, iclass 37, count 2 2006.232.07:46:10.73#ibcon#end of sib2, iclass 37, count 2 2006.232.07:46:10.73#ibcon#*after write, iclass 37, count 2 2006.232.07:46:10.73#ibcon#*before return 0, iclass 37, count 2 2006.232.07:46:10.73#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.232.07:46:10.73#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.232.07:46:10.73#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.232.07:46:10.73#ibcon#ireg 7 cls_cnt 0 2006.232.07:46:10.73#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.232.07:46:10.85#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.232.07:46:10.85#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.232.07:46:10.85#ibcon#enter wrdev, iclass 37, count 0 2006.232.07:46:10.85#ibcon#first serial, iclass 37, count 0 2006.232.07:46:10.85#ibcon#enter sib2, iclass 37, count 0 2006.232.07:46:10.85#ibcon#flushed, iclass 37, count 0 2006.232.07:46:10.85#ibcon#about to write, iclass 37, count 0 2006.232.07:46:10.85#ibcon#wrote, iclass 37, count 0 2006.232.07:46:10.85#ibcon#about to read 3, iclass 37, count 0 2006.232.07:46:10.87#ibcon#read 3, iclass 37, count 0 2006.232.07:46:10.87#ibcon#about to read 4, iclass 37, count 0 2006.232.07:46:10.87#ibcon#read 4, iclass 37, count 0 2006.232.07:46:10.87#ibcon#about to read 5, iclass 37, count 0 2006.232.07:46:10.87#ibcon#read 5, iclass 37, count 0 2006.232.07:46:10.87#ibcon#about to read 6, iclass 37, count 0 2006.232.07:46:10.87#ibcon#read 6, iclass 37, count 0 2006.232.07:46:10.87#ibcon#end of sib2, iclass 37, count 0 2006.232.07:46:10.87#ibcon#*mode == 0, iclass 37, count 0 2006.232.07:46:10.87#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.232.07:46:10.87#ibcon#[27=USB\r\n] 2006.232.07:46:10.87#ibcon#*before write, iclass 37, count 0 2006.232.07:46:10.87#ibcon#enter sib2, iclass 37, count 0 2006.232.07:46:10.87#ibcon#flushed, iclass 37, count 0 2006.232.07:46:10.87#ibcon#about to write, iclass 37, count 0 2006.232.07:46:10.87#ibcon#wrote, iclass 37, count 0 2006.232.07:46:10.87#ibcon#about to read 3, iclass 37, count 0 2006.232.07:46:10.90#ibcon#read 3, iclass 37, count 0 2006.232.07:46:10.90#ibcon#about to read 4, iclass 37, count 0 2006.232.07:46:10.90#ibcon#read 4, iclass 37, count 0 2006.232.07:46:10.90#ibcon#about to read 5, iclass 37, count 0 2006.232.07:46:10.90#ibcon#read 5, iclass 37, count 0 2006.232.07:46:10.90#ibcon#about to read 6, iclass 37, count 0 2006.232.07:46:10.90#ibcon#read 6, iclass 37, count 0 2006.232.07:46:10.90#ibcon#end of sib2, iclass 37, count 0 2006.232.07:46:10.90#ibcon#*after write, iclass 37, count 0 2006.232.07:46:10.90#ibcon#*before return 0, iclass 37, count 0 2006.232.07:46:10.90#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.232.07:46:10.90#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.232.07:46:10.90#ibcon#about to clear, iclass 37 cls_cnt 0 2006.232.07:46:10.90#ibcon#cleared, iclass 37 cls_cnt 0 2006.232.07:46:10.90$vc4f8/vblo=2,640.99 2006.232.07:46:10.90#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.232.07:46:10.90#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.232.07:46:10.90#ibcon#ireg 17 cls_cnt 0 2006.232.07:46:10.90#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.232.07:46:10.90#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.232.07:46:10.90#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.232.07:46:10.90#ibcon#enter wrdev, iclass 39, count 0 2006.232.07:46:10.90#ibcon#first serial, iclass 39, count 0 2006.232.07:46:10.90#ibcon#enter sib2, iclass 39, count 0 2006.232.07:46:10.90#ibcon#flushed, iclass 39, count 0 2006.232.07:46:10.90#ibcon#about to write, iclass 39, count 0 2006.232.07:46:10.90#ibcon#wrote, iclass 39, count 0 2006.232.07:46:10.90#ibcon#about to read 3, iclass 39, count 0 2006.232.07:46:10.92#ibcon#read 3, iclass 39, count 0 2006.232.07:46:10.92#ibcon#about to read 4, iclass 39, count 0 2006.232.07:46:10.92#ibcon#read 4, iclass 39, count 0 2006.232.07:46:10.92#ibcon#about to read 5, iclass 39, count 0 2006.232.07:46:10.92#ibcon#read 5, iclass 39, count 0 2006.232.07:46:10.92#ibcon#about to read 6, iclass 39, count 0 2006.232.07:46:10.92#ibcon#read 6, iclass 39, count 0 2006.232.07:46:10.92#ibcon#end of sib2, iclass 39, count 0 2006.232.07:46:10.92#ibcon#*mode == 0, iclass 39, count 0 2006.232.07:46:10.92#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.232.07:46:10.92#ibcon#[28=FRQ=02,640.99\r\n] 2006.232.07:46:10.92#ibcon#*before write, iclass 39, count 0 2006.232.07:46:10.92#ibcon#enter sib2, iclass 39, count 0 2006.232.07:46:10.92#ibcon#flushed, iclass 39, count 0 2006.232.07:46:10.92#ibcon#about to write, iclass 39, count 0 2006.232.07:46:10.92#ibcon#wrote, iclass 39, count 0 2006.232.07:46:10.92#ibcon#about to read 3, iclass 39, count 0 2006.232.07:46:10.96#ibcon#read 3, iclass 39, count 0 2006.232.07:46:10.96#ibcon#about to read 4, iclass 39, count 0 2006.232.07:46:10.96#ibcon#read 4, iclass 39, count 0 2006.232.07:46:10.96#ibcon#about to read 5, iclass 39, count 0 2006.232.07:46:10.96#ibcon#read 5, iclass 39, count 0 2006.232.07:46:10.96#ibcon#about to read 6, iclass 39, count 0 2006.232.07:46:10.96#ibcon#read 6, iclass 39, count 0 2006.232.07:46:10.96#ibcon#end of sib2, iclass 39, count 0 2006.232.07:46:10.96#ibcon#*after write, iclass 39, count 0 2006.232.07:46:10.96#ibcon#*before return 0, iclass 39, count 0 2006.232.07:46:10.96#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.232.07:46:10.96#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.232.07:46:10.96#ibcon#about to clear, iclass 39 cls_cnt 0 2006.232.07:46:10.96#ibcon#cleared, iclass 39 cls_cnt 0 2006.232.07:46:10.96$vc4f8/vb=2,4 2006.232.07:46:10.96#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.232.07:46:10.96#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.232.07:46:10.96#ibcon#ireg 11 cls_cnt 2 2006.232.07:46:10.96#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.232.07:46:11.02#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.232.07:46:11.02#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.232.07:46:11.02#ibcon#enter wrdev, iclass 3, count 2 2006.232.07:46:11.02#ibcon#first serial, iclass 3, count 2 2006.232.07:46:11.02#ibcon#enter sib2, iclass 3, count 2 2006.232.07:46:11.02#ibcon#flushed, iclass 3, count 2 2006.232.07:46:11.02#ibcon#about to write, iclass 3, count 2 2006.232.07:46:11.02#ibcon#wrote, iclass 3, count 2 2006.232.07:46:11.02#ibcon#about to read 3, iclass 3, count 2 2006.232.07:46:11.04#ibcon#read 3, iclass 3, count 2 2006.232.07:46:11.04#ibcon#about to read 4, iclass 3, count 2 2006.232.07:46:11.04#ibcon#read 4, iclass 3, count 2 2006.232.07:46:11.04#ibcon#about to read 5, iclass 3, count 2 2006.232.07:46:11.04#ibcon#read 5, iclass 3, count 2 2006.232.07:46:11.04#ibcon#about to read 6, iclass 3, count 2 2006.232.07:46:11.04#ibcon#read 6, iclass 3, count 2 2006.232.07:46:11.04#ibcon#end of sib2, iclass 3, count 2 2006.232.07:46:11.04#ibcon#*mode == 0, iclass 3, count 2 2006.232.07:46:11.04#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.232.07:46:11.04#ibcon#[27=AT02-04\r\n] 2006.232.07:46:11.04#ibcon#*before write, iclass 3, count 2 2006.232.07:46:11.04#ibcon#enter sib2, iclass 3, count 2 2006.232.07:46:11.04#ibcon#flushed, iclass 3, count 2 2006.232.07:46:11.04#ibcon#about to write, iclass 3, count 2 2006.232.07:46:11.04#ibcon#wrote, iclass 3, count 2 2006.232.07:46:11.04#ibcon#about to read 3, iclass 3, count 2 2006.232.07:46:11.07#ibcon#read 3, iclass 3, count 2 2006.232.07:46:11.07#ibcon#about to read 4, iclass 3, count 2 2006.232.07:46:11.07#ibcon#read 4, iclass 3, count 2 2006.232.07:46:11.07#ibcon#about to read 5, iclass 3, count 2 2006.232.07:46:11.07#ibcon#read 5, iclass 3, count 2 2006.232.07:46:11.07#ibcon#about to read 6, iclass 3, count 2 2006.232.07:46:11.07#ibcon#read 6, iclass 3, count 2 2006.232.07:46:11.07#ibcon#end of sib2, iclass 3, count 2 2006.232.07:46:11.07#ibcon#*after write, iclass 3, count 2 2006.232.07:46:11.07#ibcon#*before return 0, iclass 3, count 2 2006.232.07:46:11.07#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.232.07:46:11.07#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.232.07:46:11.07#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.232.07:46:11.07#ibcon#ireg 7 cls_cnt 0 2006.232.07:46:11.07#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.232.07:46:11.19#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.232.07:46:11.19#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.232.07:46:11.19#ibcon#enter wrdev, iclass 3, count 0 2006.232.07:46:11.19#ibcon#first serial, iclass 3, count 0 2006.232.07:46:11.19#ibcon#enter sib2, iclass 3, count 0 2006.232.07:46:11.19#ibcon#flushed, iclass 3, count 0 2006.232.07:46:11.19#ibcon#about to write, iclass 3, count 0 2006.232.07:46:11.19#ibcon#wrote, iclass 3, count 0 2006.232.07:46:11.19#ibcon#about to read 3, iclass 3, count 0 2006.232.07:46:11.21#ibcon#read 3, iclass 3, count 0 2006.232.07:46:11.21#ibcon#about to read 4, iclass 3, count 0 2006.232.07:46:11.21#ibcon#read 4, iclass 3, count 0 2006.232.07:46:11.21#ibcon#about to read 5, iclass 3, count 0 2006.232.07:46:11.21#ibcon#read 5, iclass 3, count 0 2006.232.07:46:11.21#ibcon#about to read 6, iclass 3, count 0 2006.232.07:46:11.21#ibcon#read 6, iclass 3, count 0 2006.232.07:46:11.21#ibcon#end of sib2, iclass 3, count 0 2006.232.07:46:11.21#ibcon#*mode == 0, iclass 3, count 0 2006.232.07:46:11.21#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.232.07:46:11.21#ibcon#[27=USB\r\n] 2006.232.07:46:11.21#ibcon#*before write, iclass 3, count 0 2006.232.07:46:11.21#ibcon#enter sib2, iclass 3, count 0 2006.232.07:46:11.21#ibcon#flushed, iclass 3, count 0 2006.232.07:46:11.21#ibcon#about to write, iclass 3, count 0 2006.232.07:46:11.21#ibcon#wrote, iclass 3, count 0 2006.232.07:46:11.21#ibcon#about to read 3, iclass 3, count 0 2006.232.07:46:11.24#ibcon#read 3, iclass 3, count 0 2006.232.07:46:11.24#ibcon#about to read 4, iclass 3, count 0 2006.232.07:46:11.24#ibcon#read 4, iclass 3, count 0 2006.232.07:46:11.24#ibcon#about to read 5, iclass 3, count 0 2006.232.07:46:11.24#ibcon#read 5, iclass 3, count 0 2006.232.07:46:11.24#ibcon#about to read 6, iclass 3, count 0 2006.232.07:46:11.24#ibcon#read 6, iclass 3, count 0 2006.232.07:46:11.24#ibcon#end of sib2, iclass 3, count 0 2006.232.07:46:11.24#ibcon#*after write, iclass 3, count 0 2006.232.07:46:11.24#ibcon#*before return 0, iclass 3, count 0 2006.232.07:46:11.24#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.232.07:46:11.24#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.232.07:46:11.24#ibcon#about to clear, iclass 3 cls_cnt 0 2006.232.07:46:11.24#ibcon#cleared, iclass 3 cls_cnt 0 2006.232.07:46:11.24$vc4f8/vblo=3,656.99 2006.232.07:46:11.24#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.232.07:46:11.24#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.232.07:46:11.24#ibcon#ireg 17 cls_cnt 0 2006.232.07:46:11.24#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.232.07:46:11.24#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.232.07:46:11.24#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.232.07:46:11.24#ibcon#enter wrdev, iclass 5, count 0 2006.232.07:46:11.24#ibcon#first serial, iclass 5, count 0 2006.232.07:46:11.24#ibcon#enter sib2, iclass 5, count 0 2006.232.07:46:11.24#ibcon#flushed, iclass 5, count 0 2006.232.07:46:11.24#ibcon#about to write, iclass 5, count 0 2006.232.07:46:11.24#ibcon#wrote, iclass 5, count 0 2006.232.07:46:11.24#ibcon#about to read 3, iclass 5, count 0 2006.232.07:46:11.26#ibcon#read 3, iclass 5, count 0 2006.232.07:46:11.26#ibcon#about to read 4, iclass 5, count 0 2006.232.07:46:11.26#ibcon#read 4, iclass 5, count 0 2006.232.07:46:11.26#ibcon#about to read 5, iclass 5, count 0 2006.232.07:46:11.26#ibcon#read 5, iclass 5, count 0 2006.232.07:46:11.26#ibcon#about to read 6, iclass 5, count 0 2006.232.07:46:11.26#ibcon#read 6, iclass 5, count 0 2006.232.07:46:11.26#ibcon#end of sib2, iclass 5, count 0 2006.232.07:46:11.26#ibcon#*mode == 0, iclass 5, count 0 2006.232.07:46:11.26#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.232.07:46:11.26#ibcon#[28=FRQ=03,656.99\r\n] 2006.232.07:46:11.26#ibcon#*before write, iclass 5, count 0 2006.232.07:46:11.26#ibcon#enter sib2, iclass 5, count 0 2006.232.07:46:11.26#ibcon#flushed, iclass 5, count 0 2006.232.07:46:11.26#ibcon#about to write, iclass 5, count 0 2006.232.07:46:11.26#ibcon#wrote, iclass 5, count 0 2006.232.07:46:11.26#ibcon#about to read 3, iclass 5, count 0 2006.232.07:46:11.30#ibcon#read 3, iclass 5, count 0 2006.232.07:46:11.30#ibcon#about to read 4, iclass 5, count 0 2006.232.07:46:11.30#ibcon#read 4, iclass 5, count 0 2006.232.07:46:11.30#ibcon#about to read 5, iclass 5, count 0 2006.232.07:46:11.30#ibcon#read 5, iclass 5, count 0 2006.232.07:46:11.30#ibcon#about to read 6, iclass 5, count 0 2006.232.07:46:11.30#ibcon#read 6, iclass 5, count 0 2006.232.07:46:11.30#ibcon#end of sib2, iclass 5, count 0 2006.232.07:46:11.30#ibcon#*after write, iclass 5, count 0 2006.232.07:46:11.30#ibcon#*before return 0, iclass 5, count 0 2006.232.07:46:11.30#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.232.07:46:11.30#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.232.07:46:11.30#ibcon#about to clear, iclass 5 cls_cnt 0 2006.232.07:46:11.30#ibcon#cleared, iclass 5 cls_cnt 0 2006.232.07:46:11.30$vc4f8/vb=3,4 2006.232.07:46:11.30#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.232.07:46:11.30#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.232.07:46:11.30#ibcon#ireg 11 cls_cnt 2 2006.232.07:46:11.30#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.232.07:46:11.36#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.232.07:46:11.36#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.232.07:46:11.36#ibcon#enter wrdev, iclass 7, count 2 2006.232.07:46:11.36#ibcon#first serial, iclass 7, count 2 2006.232.07:46:11.36#ibcon#enter sib2, iclass 7, count 2 2006.232.07:46:11.36#ibcon#flushed, iclass 7, count 2 2006.232.07:46:11.36#ibcon#about to write, iclass 7, count 2 2006.232.07:46:11.36#ibcon#wrote, iclass 7, count 2 2006.232.07:46:11.36#ibcon#about to read 3, iclass 7, count 2 2006.232.07:46:11.38#ibcon#read 3, iclass 7, count 2 2006.232.07:46:11.38#ibcon#about to read 4, iclass 7, count 2 2006.232.07:46:11.38#ibcon#read 4, iclass 7, count 2 2006.232.07:46:11.38#ibcon#about to read 5, iclass 7, count 2 2006.232.07:46:11.38#ibcon#read 5, iclass 7, count 2 2006.232.07:46:11.38#ibcon#about to read 6, iclass 7, count 2 2006.232.07:46:11.38#ibcon#read 6, iclass 7, count 2 2006.232.07:46:11.38#ibcon#end of sib2, iclass 7, count 2 2006.232.07:46:11.38#ibcon#*mode == 0, iclass 7, count 2 2006.232.07:46:11.38#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.232.07:46:11.38#ibcon#[27=AT03-04\r\n] 2006.232.07:46:11.38#ibcon#*before write, iclass 7, count 2 2006.232.07:46:11.38#ibcon#enter sib2, iclass 7, count 2 2006.232.07:46:11.38#ibcon#flushed, iclass 7, count 2 2006.232.07:46:11.38#ibcon#about to write, iclass 7, count 2 2006.232.07:46:11.38#ibcon#wrote, iclass 7, count 2 2006.232.07:46:11.38#ibcon#about to read 3, iclass 7, count 2 2006.232.07:46:11.41#ibcon#read 3, iclass 7, count 2 2006.232.07:46:11.41#ibcon#about to read 4, iclass 7, count 2 2006.232.07:46:11.41#ibcon#read 4, iclass 7, count 2 2006.232.07:46:11.41#ibcon#about to read 5, iclass 7, count 2 2006.232.07:46:11.41#ibcon#read 5, iclass 7, count 2 2006.232.07:46:11.41#ibcon#about to read 6, iclass 7, count 2 2006.232.07:46:11.41#ibcon#read 6, iclass 7, count 2 2006.232.07:46:11.41#ibcon#end of sib2, iclass 7, count 2 2006.232.07:46:11.41#ibcon#*after write, iclass 7, count 2 2006.232.07:46:11.41#ibcon#*before return 0, iclass 7, count 2 2006.232.07:46:11.41#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.232.07:46:11.41#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.232.07:46:11.41#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.232.07:46:11.41#ibcon#ireg 7 cls_cnt 0 2006.232.07:46:11.41#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.232.07:46:11.53#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.232.07:46:11.53#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.232.07:46:11.53#ibcon#enter wrdev, iclass 7, count 0 2006.232.07:46:11.53#ibcon#first serial, iclass 7, count 0 2006.232.07:46:11.53#ibcon#enter sib2, iclass 7, count 0 2006.232.07:46:11.53#ibcon#flushed, iclass 7, count 0 2006.232.07:46:11.53#ibcon#about to write, iclass 7, count 0 2006.232.07:46:11.53#ibcon#wrote, iclass 7, count 0 2006.232.07:46:11.53#ibcon#about to read 3, iclass 7, count 0 2006.232.07:46:11.55#ibcon#read 3, iclass 7, count 0 2006.232.07:46:11.55#ibcon#about to read 4, iclass 7, count 0 2006.232.07:46:11.55#ibcon#read 4, iclass 7, count 0 2006.232.07:46:11.55#ibcon#about to read 5, iclass 7, count 0 2006.232.07:46:11.55#ibcon#read 5, iclass 7, count 0 2006.232.07:46:11.55#ibcon#about to read 6, iclass 7, count 0 2006.232.07:46:11.55#ibcon#read 6, iclass 7, count 0 2006.232.07:46:11.55#ibcon#end of sib2, iclass 7, count 0 2006.232.07:46:11.55#ibcon#*mode == 0, iclass 7, count 0 2006.232.07:46:11.55#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.232.07:46:11.55#ibcon#[27=USB\r\n] 2006.232.07:46:11.55#ibcon#*before write, iclass 7, count 0 2006.232.07:46:11.55#ibcon#enter sib2, iclass 7, count 0 2006.232.07:46:11.55#ibcon#flushed, iclass 7, count 0 2006.232.07:46:11.55#ibcon#about to write, iclass 7, count 0 2006.232.07:46:11.55#ibcon#wrote, iclass 7, count 0 2006.232.07:46:11.55#ibcon#about to read 3, iclass 7, count 0 2006.232.07:46:11.58#ibcon#read 3, iclass 7, count 0 2006.232.07:46:11.58#ibcon#about to read 4, iclass 7, count 0 2006.232.07:46:11.58#ibcon#read 4, iclass 7, count 0 2006.232.07:46:11.58#ibcon#about to read 5, iclass 7, count 0 2006.232.07:46:11.58#ibcon#read 5, iclass 7, count 0 2006.232.07:46:11.58#ibcon#about to read 6, iclass 7, count 0 2006.232.07:46:11.58#ibcon#read 6, iclass 7, count 0 2006.232.07:46:11.58#ibcon#end of sib2, iclass 7, count 0 2006.232.07:46:11.58#ibcon#*after write, iclass 7, count 0 2006.232.07:46:11.58#ibcon#*before return 0, iclass 7, count 0 2006.232.07:46:11.58#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.232.07:46:11.58#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.232.07:46:11.58#ibcon#about to clear, iclass 7 cls_cnt 0 2006.232.07:46:11.58#ibcon#cleared, iclass 7 cls_cnt 0 2006.232.07:46:11.58$vc4f8/vblo=4,712.99 2006.232.07:46:11.58#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.232.07:46:11.58#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.232.07:46:11.58#ibcon#ireg 17 cls_cnt 0 2006.232.07:46:11.58#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.232.07:46:11.58#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.232.07:46:11.58#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.232.07:46:11.58#ibcon#enter wrdev, iclass 11, count 0 2006.232.07:46:11.58#ibcon#first serial, iclass 11, count 0 2006.232.07:46:11.58#ibcon#enter sib2, iclass 11, count 0 2006.232.07:46:11.58#ibcon#flushed, iclass 11, count 0 2006.232.07:46:11.58#ibcon#about to write, iclass 11, count 0 2006.232.07:46:11.58#ibcon#wrote, iclass 11, count 0 2006.232.07:46:11.58#ibcon#about to read 3, iclass 11, count 0 2006.232.07:46:11.60#ibcon#read 3, iclass 11, count 0 2006.232.07:46:11.60#ibcon#about to read 4, iclass 11, count 0 2006.232.07:46:11.60#ibcon#read 4, iclass 11, count 0 2006.232.07:46:11.60#ibcon#about to read 5, iclass 11, count 0 2006.232.07:46:11.60#ibcon#read 5, iclass 11, count 0 2006.232.07:46:11.60#ibcon#about to read 6, iclass 11, count 0 2006.232.07:46:11.60#ibcon#read 6, iclass 11, count 0 2006.232.07:46:11.60#ibcon#end of sib2, iclass 11, count 0 2006.232.07:46:11.60#ibcon#*mode == 0, iclass 11, count 0 2006.232.07:46:11.60#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.232.07:46:11.60#ibcon#[28=FRQ=04,712.99\r\n] 2006.232.07:46:11.60#ibcon#*before write, iclass 11, count 0 2006.232.07:46:11.60#ibcon#enter sib2, iclass 11, count 0 2006.232.07:46:11.60#ibcon#flushed, iclass 11, count 0 2006.232.07:46:11.60#ibcon#about to write, iclass 11, count 0 2006.232.07:46:11.60#ibcon#wrote, iclass 11, count 0 2006.232.07:46:11.60#ibcon#about to read 3, iclass 11, count 0 2006.232.07:46:11.63#abcon#<5=/05 3.1 5.5 29.42 861007.3\r\n> 2006.232.07:46:11.64#ibcon#read 3, iclass 11, count 0 2006.232.07:46:11.64#ibcon#about to read 4, iclass 11, count 0 2006.232.07:46:11.64#ibcon#read 4, iclass 11, count 0 2006.232.07:46:11.64#ibcon#about to read 5, iclass 11, count 0 2006.232.07:46:11.64#ibcon#read 5, iclass 11, count 0 2006.232.07:46:11.64#ibcon#about to read 6, iclass 11, count 0 2006.232.07:46:11.64#ibcon#read 6, iclass 11, count 0 2006.232.07:46:11.64#ibcon#end of sib2, iclass 11, count 0 2006.232.07:46:11.64#ibcon#*after write, iclass 11, count 0 2006.232.07:46:11.64#ibcon#*before return 0, iclass 11, count 0 2006.232.07:46:11.64#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.232.07:46:11.64#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.232.07:46:11.64#ibcon#about to clear, iclass 11 cls_cnt 0 2006.232.07:46:11.64#ibcon#cleared, iclass 11 cls_cnt 0 2006.232.07:46:11.64$vc4f8/vb=4,4 2006.232.07:46:11.64#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.232.07:46:11.64#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.232.07:46:11.64#ibcon#ireg 11 cls_cnt 2 2006.232.07:46:11.64#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.232.07:46:11.65#abcon#{5=INTERFACE CLEAR} 2006.232.07:46:11.70#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.232.07:46:11.70#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.232.07:46:11.70#ibcon#enter wrdev, iclass 16, count 2 2006.232.07:46:11.70#ibcon#first serial, iclass 16, count 2 2006.232.07:46:11.70#ibcon#enter sib2, iclass 16, count 2 2006.232.07:46:11.70#ibcon#flushed, iclass 16, count 2 2006.232.07:46:11.70#ibcon#about to write, iclass 16, count 2 2006.232.07:46:11.70#ibcon#wrote, iclass 16, count 2 2006.232.07:46:11.70#ibcon#about to read 3, iclass 16, count 2 2006.232.07:46:11.71#abcon#[5=S1D000X0/0*\r\n] 2006.232.07:46:11.72#ibcon#read 3, iclass 16, count 2 2006.232.07:46:11.72#ibcon#about to read 4, iclass 16, count 2 2006.232.07:46:11.72#ibcon#read 4, iclass 16, count 2 2006.232.07:46:11.72#ibcon#about to read 5, iclass 16, count 2 2006.232.07:46:11.72#ibcon#read 5, iclass 16, count 2 2006.232.07:46:11.72#ibcon#about to read 6, iclass 16, count 2 2006.232.07:46:11.72#ibcon#read 6, iclass 16, count 2 2006.232.07:46:11.72#ibcon#end of sib2, iclass 16, count 2 2006.232.07:46:11.72#ibcon#*mode == 0, iclass 16, count 2 2006.232.07:46:11.72#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.232.07:46:11.72#ibcon#[27=AT04-04\r\n] 2006.232.07:46:11.72#ibcon#*before write, iclass 16, count 2 2006.232.07:46:11.72#ibcon#enter sib2, iclass 16, count 2 2006.232.07:46:11.72#ibcon#flushed, iclass 16, count 2 2006.232.07:46:11.72#ibcon#about to write, iclass 16, count 2 2006.232.07:46:11.72#ibcon#wrote, iclass 16, count 2 2006.232.07:46:11.72#ibcon#about to read 3, iclass 16, count 2 2006.232.07:46:11.75#ibcon#read 3, iclass 16, count 2 2006.232.07:46:11.75#ibcon#about to read 4, iclass 16, count 2 2006.232.07:46:11.75#ibcon#read 4, iclass 16, count 2 2006.232.07:46:11.75#ibcon#about to read 5, iclass 16, count 2 2006.232.07:46:11.75#ibcon#read 5, iclass 16, count 2 2006.232.07:46:11.75#ibcon#about to read 6, iclass 16, count 2 2006.232.07:46:11.75#ibcon#read 6, iclass 16, count 2 2006.232.07:46:11.75#ibcon#end of sib2, iclass 16, count 2 2006.232.07:46:11.75#ibcon#*after write, iclass 16, count 2 2006.232.07:46:11.75#ibcon#*before return 0, iclass 16, count 2 2006.232.07:46:11.75#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.232.07:46:11.75#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.232.07:46:11.75#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.232.07:46:11.75#ibcon#ireg 7 cls_cnt 0 2006.232.07:46:11.75#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.232.07:46:11.87#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.232.07:46:11.87#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.232.07:46:11.87#ibcon#enter wrdev, iclass 16, count 0 2006.232.07:46:11.87#ibcon#first serial, iclass 16, count 0 2006.232.07:46:11.87#ibcon#enter sib2, iclass 16, count 0 2006.232.07:46:11.87#ibcon#flushed, iclass 16, count 0 2006.232.07:46:11.87#ibcon#about to write, iclass 16, count 0 2006.232.07:46:11.87#ibcon#wrote, iclass 16, count 0 2006.232.07:46:11.87#ibcon#about to read 3, iclass 16, count 0 2006.232.07:46:11.89#ibcon#read 3, iclass 16, count 0 2006.232.07:46:11.89#ibcon#about to read 4, iclass 16, count 0 2006.232.07:46:11.89#ibcon#read 4, iclass 16, count 0 2006.232.07:46:11.89#ibcon#about to read 5, iclass 16, count 0 2006.232.07:46:11.89#ibcon#read 5, iclass 16, count 0 2006.232.07:46:11.89#ibcon#about to read 6, iclass 16, count 0 2006.232.07:46:11.89#ibcon#read 6, iclass 16, count 0 2006.232.07:46:11.89#ibcon#end of sib2, iclass 16, count 0 2006.232.07:46:11.89#ibcon#*mode == 0, iclass 16, count 0 2006.232.07:46:11.89#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.232.07:46:11.89#ibcon#[27=USB\r\n] 2006.232.07:46:11.89#ibcon#*before write, iclass 16, count 0 2006.232.07:46:11.89#ibcon#enter sib2, iclass 16, count 0 2006.232.07:46:11.89#ibcon#flushed, iclass 16, count 0 2006.232.07:46:11.89#ibcon#about to write, iclass 16, count 0 2006.232.07:46:11.89#ibcon#wrote, iclass 16, count 0 2006.232.07:46:11.89#ibcon#about to read 3, iclass 16, count 0 2006.232.07:46:11.92#ibcon#read 3, iclass 16, count 0 2006.232.07:46:11.92#ibcon#about to read 4, iclass 16, count 0 2006.232.07:46:11.92#ibcon#read 4, iclass 16, count 0 2006.232.07:46:11.92#ibcon#about to read 5, iclass 16, count 0 2006.232.07:46:11.92#ibcon#read 5, iclass 16, count 0 2006.232.07:46:11.92#ibcon#about to read 6, iclass 16, count 0 2006.232.07:46:11.92#ibcon#read 6, iclass 16, count 0 2006.232.07:46:11.92#ibcon#end of sib2, iclass 16, count 0 2006.232.07:46:11.92#ibcon#*after write, iclass 16, count 0 2006.232.07:46:11.92#ibcon#*before return 0, iclass 16, count 0 2006.232.07:46:11.92#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.232.07:46:11.92#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.232.07:46:11.92#ibcon#about to clear, iclass 16 cls_cnt 0 2006.232.07:46:11.92#ibcon#cleared, iclass 16 cls_cnt 0 2006.232.07:46:11.92$vc4f8/vblo=5,744.99 2006.232.07:46:11.92#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.232.07:46:11.92#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.232.07:46:11.92#ibcon#ireg 17 cls_cnt 0 2006.232.07:46:11.92#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.232.07:46:11.92#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.232.07:46:11.92#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.232.07:46:11.92#ibcon#enter wrdev, iclass 19, count 0 2006.232.07:46:11.92#ibcon#first serial, iclass 19, count 0 2006.232.07:46:11.92#ibcon#enter sib2, iclass 19, count 0 2006.232.07:46:11.92#ibcon#flushed, iclass 19, count 0 2006.232.07:46:11.92#ibcon#about to write, iclass 19, count 0 2006.232.07:46:11.92#ibcon#wrote, iclass 19, count 0 2006.232.07:46:11.92#ibcon#about to read 3, iclass 19, count 0 2006.232.07:46:11.94#ibcon#read 3, iclass 19, count 0 2006.232.07:46:11.94#ibcon#about to read 4, iclass 19, count 0 2006.232.07:46:11.94#ibcon#read 4, iclass 19, count 0 2006.232.07:46:11.94#ibcon#about to read 5, iclass 19, count 0 2006.232.07:46:11.94#ibcon#read 5, iclass 19, count 0 2006.232.07:46:11.94#ibcon#about to read 6, iclass 19, count 0 2006.232.07:46:11.94#ibcon#read 6, iclass 19, count 0 2006.232.07:46:11.94#ibcon#end of sib2, iclass 19, count 0 2006.232.07:46:11.94#ibcon#*mode == 0, iclass 19, count 0 2006.232.07:46:11.94#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.232.07:46:11.94#ibcon#[28=FRQ=05,744.99\r\n] 2006.232.07:46:11.94#ibcon#*before write, iclass 19, count 0 2006.232.07:46:11.94#ibcon#enter sib2, iclass 19, count 0 2006.232.07:46:11.94#ibcon#flushed, iclass 19, count 0 2006.232.07:46:11.94#ibcon#about to write, iclass 19, count 0 2006.232.07:46:11.94#ibcon#wrote, iclass 19, count 0 2006.232.07:46:11.94#ibcon#about to read 3, iclass 19, count 0 2006.232.07:46:11.98#ibcon#read 3, iclass 19, count 0 2006.232.07:46:11.98#ibcon#about to read 4, iclass 19, count 0 2006.232.07:46:11.98#ibcon#read 4, iclass 19, count 0 2006.232.07:46:11.98#ibcon#about to read 5, iclass 19, count 0 2006.232.07:46:11.98#ibcon#read 5, iclass 19, count 0 2006.232.07:46:11.98#ibcon#about to read 6, iclass 19, count 0 2006.232.07:46:11.98#ibcon#read 6, iclass 19, count 0 2006.232.07:46:11.98#ibcon#end of sib2, iclass 19, count 0 2006.232.07:46:11.98#ibcon#*after write, iclass 19, count 0 2006.232.07:46:11.98#ibcon#*before return 0, iclass 19, count 0 2006.232.07:46:11.98#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.232.07:46:11.98#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.232.07:46:11.98#ibcon#about to clear, iclass 19 cls_cnt 0 2006.232.07:46:11.98#ibcon#cleared, iclass 19 cls_cnt 0 2006.232.07:46:11.98$vc4f8/vb=5,3 2006.232.07:46:11.98#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.232.07:46:11.98#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.232.07:46:11.98#ibcon#ireg 11 cls_cnt 2 2006.232.07:46:11.98#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.232.07:46:12.04#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.232.07:46:12.04#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.232.07:46:12.04#ibcon#enter wrdev, iclass 21, count 2 2006.232.07:46:12.04#ibcon#first serial, iclass 21, count 2 2006.232.07:46:12.04#ibcon#enter sib2, iclass 21, count 2 2006.232.07:46:12.04#ibcon#flushed, iclass 21, count 2 2006.232.07:46:12.04#ibcon#about to write, iclass 21, count 2 2006.232.07:46:12.04#ibcon#wrote, iclass 21, count 2 2006.232.07:46:12.04#ibcon#about to read 3, iclass 21, count 2 2006.232.07:46:12.06#ibcon#read 3, iclass 21, count 2 2006.232.07:46:12.06#ibcon#about to read 4, iclass 21, count 2 2006.232.07:46:12.06#ibcon#read 4, iclass 21, count 2 2006.232.07:46:12.06#ibcon#about to read 5, iclass 21, count 2 2006.232.07:46:12.06#ibcon#read 5, iclass 21, count 2 2006.232.07:46:12.06#ibcon#about to read 6, iclass 21, count 2 2006.232.07:46:12.06#ibcon#read 6, iclass 21, count 2 2006.232.07:46:12.06#ibcon#end of sib2, iclass 21, count 2 2006.232.07:46:12.06#ibcon#*mode == 0, iclass 21, count 2 2006.232.07:46:12.06#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.232.07:46:12.06#ibcon#[27=AT05-03\r\n] 2006.232.07:46:12.06#ibcon#*before write, iclass 21, count 2 2006.232.07:46:12.06#ibcon#enter sib2, iclass 21, count 2 2006.232.07:46:12.06#ibcon#flushed, iclass 21, count 2 2006.232.07:46:12.06#ibcon#about to write, iclass 21, count 2 2006.232.07:46:12.06#ibcon#wrote, iclass 21, count 2 2006.232.07:46:12.06#ibcon#about to read 3, iclass 21, count 2 2006.232.07:46:12.09#ibcon#read 3, iclass 21, count 2 2006.232.07:46:12.09#ibcon#about to read 4, iclass 21, count 2 2006.232.07:46:12.09#ibcon#read 4, iclass 21, count 2 2006.232.07:46:12.09#ibcon#about to read 5, iclass 21, count 2 2006.232.07:46:12.09#ibcon#read 5, iclass 21, count 2 2006.232.07:46:12.09#ibcon#about to read 6, iclass 21, count 2 2006.232.07:46:12.09#ibcon#read 6, iclass 21, count 2 2006.232.07:46:12.09#ibcon#end of sib2, iclass 21, count 2 2006.232.07:46:12.09#ibcon#*after write, iclass 21, count 2 2006.232.07:46:12.09#ibcon#*before return 0, iclass 21, count 2 2006.232.07:46:12.09#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.232.07:46:12.09#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.232.07:46:12.09#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.232.07:46:12.09#ibcon#ireg 7 cls_cnt 0 2006.232.07:46:12.09#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.232.07:46:12.21#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.232.07:46:12.21#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.232.07:46:12.21#ibcon#enter wrdev, iclass 21, count 0 2006.232.07:46:12.21#ibcon#first serial, iclass 21, count 0 2006.232.07:46:12.21#ibcon#enter sib2, iclass 21, count 0 2006.232.07:46:12.21#ibcon#flushed, iclass 21, count 0 2006.232.07:46:12.21#ibcon#about to write, iclass 21, count 0 2006.232.07:46:12.21#ibcon#wrote, iclass 21, count 0 2006.232.07:46:12.21#ibcon#about to read 3, iclass 21, count 0 2006.232.07:46:12.23#ibcon#read 3, iclass 21, count 0 2006.232.07:46:12.23#ibcon#about to read 4, iclass 21, count 0 2006.232.07:46:12.23#ibcon#read 4, iclass 21, count 0 2006.232.07:46:12.23#ibcon#about to read 5, iclass 21, count 0 2006.232.07:46:12.23#ibcon#read 5, iclass 21, count 0 2006.232.07:46:12.23#ibcon#about to read 6, iclass 21, count 0 2006.232.07:46:12.23#ibcon#read 6, iclass 21, count 0 2006.232.07:46:12.23#ibcon#end of sib2, iclass 21, count 0 2006.232.07:46:12.23#ibcon#*mode == 0, iclass 21, count 0 2006.232.07:46:12.23#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.232.07:46:12.23#ibcon#[27=USB\r\n] 2006.232.07:46:12.23#ibcon#*before write, iclass 21, count 0 2006.232.07:46:12.23#ibcon#enter sib2, iclass 21, count 0 2006.232.07:46:12.23#ibcon#flushed, iclass 21, count 0 2006.232.07:46:12.23#ibcon#about to write, iclass 21, count 0 2006.232.07:46:12.23#ibcon#wrote, iclass 21, count 0 2006.232.07:46:12.23#ibcon#about to read 3, iclass 21, count 0 2006.232.07:46:12.26#ibcon#read 3, iclass 21, count 0 2006.232.07:46:12.26#ibcon#about to read 4, iclass 21, count 0 2006.232.07:46:12.26#ibcon#read 4, iclass 21, count 0 2006.232.07:46:12.26#ibcon#about to read 5, iclass 21, count 0 2006.232.07:46:12.26#ibcon#read 5, iclass 21, count 0 2006.232.07:46:12.26#ibcon#about to read 6, iclass 21, count 0 2006.232.07:46:12.26#ibcon#read 6, iclass 21, count 0 2006.232.07:46:12.26#ibcon#end of sib2, iclass 21, count 0 2006.232.07:46:12.26#ibcon#*after write, iclass 21, count 0 2006.232.07:46:12.26#ibcon#*before return 0, iclass 21, count 0 2006.232.07:46:12.26#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.232.07:46:12.26#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.232.07:46:12.26#ibcon#about to clear, iclass 21 cls_cnt 0 2006.232.07:46:12.26#ibcon#cleared, iclass 21 cls_cnt 0 2006.232.07:46:12.26$vc4f8/vblo=6,752.99 2006.232.07:46:12.26#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.232.07:46:12.26#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.232.07:46:12.26#ibcon#ireg 17 cls_cnt 0 2006.232.07:46:12.26#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.232.07:46:12.26#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.232.07:46:12.26#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.232.07:46:12.26#ibcon#enter wrdev, iclass 23, count 0 2006.232.07:46:12.26#ibcon#first serial, iclass 23, count 0 2006.232.07:46:12.26#ibcon#enter sib2, iclass 23, count 0 2006.232.07:46:12.26#ibcon#flushed, iclass 23, count 0 2006.232.07:46:12.26#ibcon#about to write, iclass 23, count 0 2006.232.07:46:12.26#ibcon#wrote, iclass 23, count 0 2006.232.07:46:12.26#ibcon#about to read 3, iclass 23, count 0 2006.232.07:46:12.28#ibcon#read 3, iclass 23, count 0 2006.232.07:46:12.28#ibcon#about to read 4, iclass 23, count 0 2006.232.07:46:12.28#ibcon#read 4, iclass 23, count 0 2006.232.07:46:12.28#ibcon#about to read 5, iclass 23, count 0 2006.232.07:46:12.28#ibcon#read 5, iclass 23, count 0 2006.232.07:46:12.28#ibcon#about to read 6, iclass 23, count 0 2006.232.07:46:12.28#ibcon#read 6, iclass 23, count 0 2006.232.07:46:12.28#ibcon#end of sib2, iclass 23, count 0 2006.232.07:46:12.28#ibcon#*mode == 0, iclass 23, count 0 2006.232.07:46:12.28#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.232.07:46:12.28#ibcon#[28=FRQ=06,752.99\r\n] 2006.232.07:46:12.28#ibcon#*before write, iclass 23, count 0 2006.232.07:46:12.28#ibcon#enter sib2, iclass 23, count 0 2006.232.07:46:12.28#ibcon#flushed, iclass 23, count 0 2006.232.07:46:12.28#ibcon#about to write, iclass 23, count 0 2006.232.07:46:12.28#ibcon#wrote, iclass 23, count 0 2006.232.07:46:12.28#ibcon#about to read 3, iclass 23, count 0 2006.232.07:46:12.33#ibcon#read 3, iclass 23, count 0 2006.232.07:46:12.33#ibcon#about to read 4, iclass 23, count 0 2006.232.07:46:12.33#ibcon#read 4, iclass 23, count 0 2006.232.07:46:12.33#ibcon#about to read 5, iclass 23, count 0 2006.232.07:46:12.33#ibcon#read 5, iclass 23, count 0 2006.232.07:46:12.33#ibcon#about to read 6, iclass 23, count 0 2006.232.07:46:12.33#ibcon#read 6, iclass 23, count 0 2006.232.07:46:12.33#ibcon#end of sib2, iclass 23, count 0 2006.232.07:46:12.33#ibcon#*after write, iclass 23, count 0 2006.232.07:46:12.33#ibcon#*before return 0, iclass 23, count 0 2006.232.07:46:12.33#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.232.07:46:12.33#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.232.07:46:12.33#ibcon#about to clear, iclass 23 cls_cnt 0 2006.232.07:46:12.33#ibcon#cleared, iclass 23 cls_cnt 0 2006.232.07:46:12.33$vc4f8/vb=6,4 2006.232.07:46:12.33#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.232.07:46:12.33#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.232.07:46:12.33#ibcon#ireg 11 cls_cnt 2 2006.232.07:46:12.33#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.232.07:46:12.37#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.232.07:46:12.37#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.232.07:46:12.37#ibcon#enter wrdev, iclass 25, count 2 2006.232.07:46:12.37#ibcon#first serial, iclass 25, count 2 2006.232.07:46:12.37#ibcon#enter sib2, iclass 25, count 2 2006.232.07:46:12.37#ibcon#flushed, iclass 25, count 2 2006.232.07:46:12.37#ibcon#about to write, iclass 25, count 2 2006.232.07:46:12.37#ibcon#wrote, iclass 25, count 2 2006.232.07:46:12.37#ibcon#about to read 3, iclass 25, count 2 2006.232.07:46:12.39#ibcon#read 3, iclass 25, count 2 2006.232.07:46:12.39#ibcon#about to read 4, iclass 25, count 2 2006.232.07:46:12.39#ibcon#read 4, iclass 25, count 2 2006.232.07:46:12.39#ibcon#about to read 5, iclass 25, count 2 2006.232.07:46:12.39#ibcon#read 5, iclass 25, count 2 2006.232.07:46:12.39#ibcon#about to read 6, iclass 25, count 2 2006.232.07:46:12.39#ibcon#read 6, iclass 25, count 2 2006.232.07:46:12.39#ibcon#end of sib2, iclass 25, count 2 2006.232.07:46:12.39#ibcon#*mode == 0, iclass 25, count 2 2006.232.07:46:12.39#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.232.07:46:12.39#ibcon#[27=AT06-04\r\n] 2006.232.07:46:12.39#ibcon#*before write, iclass 25, count 2 2006.232.07:46:12.39#ibcon#enter sib2, iclass 25, count 2 2006.232.07:46:12.39#ibcon#flushed, iclass 25, count 2 2006.232.07:46:12.39#ibcon#about to write, iclass 25, count 2 2006.232.07:46:12.39#ibcon#wrote, iclass 25, count 2 2006.232.07:46:12.39#ibcon#about to read 3, iclass 25, count 2 2006.232.07:46:12.42#ibcon#read 3, iclass 25, count 2 2006.232.07:46:12.42#ibcon#about to read 4, iclass 25, count 2 2006.232.07:46:12.42#ibcon#read 4, iclass 25, count 2 2006.232.07:46:12.42#ibcon#about to read 5, iclass 25, count 2 2006.232.07:46:12.42#ibcon#read 5, iclass 25, count 2 2006.232.07:46:12.42#ibcon#about to read 6, iclass 25, count 2 2006.232.07:46:12.42#ibcon#read 6, iclass 25, count 2 2006.232.07:46:12.42#ibcon#end of sib2, iclass 25, count 2 2006.232.07:46:12.42#ibcon#*after write, iclass 25, count 2 2006.232.07:46:12.42#ibcon#*before return 0, iclass 25, count 2 2006.232.07:46:12.42#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.232.07:46:12.42#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.232.07:46:12.42#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.232.07:46:12.42#ibcon#ireg 7 cls_cnt 0 2006.232.07:46:12.42#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.232.07:46:12.54#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.232.07:46:12.54#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.232.07:46:12.54#ibcon#enter wrdev, iclass 25, count 0 2006.232.07:46:12.54#ibcon#first serial, iclass 25, count 0 2006.232.07:46:12.54#ibcon#enter sib2, iclass 25, count 0 2006.232.07:46:12.54#ibcon#flushed, iclass 25, count 0 2006.232.07:46:12.54#ibcon#about to write, iclass 25, count 0 2006.232.07:46:12.54#ibcon#wrote, iclass 25, count 0 2006.232.07:46:12.54#ibcon#about to read 3, iclass 25, count 0 2006.232.07:46:12.56#ibcon#read 3, iclass 25, count 0 2006.232.07:46:12.56#ibcon#about to read 4, iclass 25, count 0 2006.232.07:46:12.56#ibcon#read 4, iclass 25, count 0 2006.232.07:46:12.56#ibcon#about to read 5, iclass 25, count 0 2006.232.07:46:12.56#ibcon#read 5, iclass 25, count 0 2006.232.07:46:12.56#ibcon#about to read 6, iclass 25, count 0 2006.232.07:46:12.56#ibcon#read 6, iclass 25, count 0 2006.232.07:46:12.56#ibcon#end of sib2, iclass 25, count 0 2006.232.07:46:12.56#ibcon#*mode == 0, iclass 25, count 0 2006.232.07:46:12.56#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.232.07:46:12.56#ibcon#[27=USB\r\n] 2006.232.07:46:12.56#ibcon#*before write, iclass 25, count 0 2006.232.07:46:12.56#ibcon#enter sib2, iclass 25, count 0 2006.232.07:46:12.56#ibcon#flushed, iclass 25, count 0 2006.232.07:46:12.56#ibcon#about to write, iclass 25, count 0 2006.232.07:46:12.56#ibcon#wrote, iclass 25, count 0 2006.232.07:46:12.56#ibcon#about to read 3, iclass 25, count 0 2006.232.07:46:12.59#ibcon#read 3, iclass 25, count 0 2006.232.07:46:12.59#ibcon#about to read 4, iclass 25, count 0 2006.232.07:46:12.59#ibcon#read 4, iclass 25, count 0 2006.232.07:46:12.59#ibcon#about to read 5, iclass 25, count 0 2006.232.07:46:12.59#ibcon#read 5, iclass 25, count 0 2006.232.07:46:12.59#ibcon#about to read 6, iclass 25, count 0 2006.232.07:46:12.59#ibcon#read 6, iclass 25, count 0 2006.232.07:46:12.59#ibcon#end of sib2, iclass 25, count 0 2006.232.07:46:12.59#ibcon#*after write, iclass 25, count 0 2006.232.07:46:12.59#ibcon#*before return 0, iclass 25, count 0 2006.232.07:46:12.59#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.232.07:46:12.59#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.232.07:46:12.59#ibcon#about to clear, iclass 25 cls_cnt 0 2006.232.07:46:12.59#ibcon#cleared, iclass 25 cls_cnt 0 2006.232.07:46:12.59$vc4f8/vabw=wide 2006.232.07:46:12.59#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.232.07:46:12.59#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.232.07:46:12.59#ibcon#ireg 8 cls_cnt 0 2006.232.07:46:12.59#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.232.07:46:12.59#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.232.07:46:12.59#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.232.07:46:12.59#ibcon#enter wrdev, iclass 27, count 0 2006.232.07:46:12.59#ibcon#first serial, iclass 27, count 0 2006.232.07:46:12.59#ibcon#enter sib2, iclass 27, count 0 2006.232.07:46:12.59#ibcon#flushed, iclass 27, count 0 2006.232.07:46:12.59#ibcon#about to write, iclass 27, count 0 2006.232.07:46:12.59#ibcon#wrote, iclass 27, count 0 2006.232.07:46:12.59#ibcon#about to read 3, iclass 27, count 0 2006.232.07:46:12.61#ibcon#read 3, iclass 27, count 0 2006.232.07:46:12.61#ibcon#about to read 4, iclass 27, count 0 2006.232.07:46:12.61#ibcon#read 4, iclass 27, count 0 2006.232.07:46:12.61#ibcon#about to read 5, iclass 27, count 0 2006.232.07:46:12.61#ibcon#read 5, iclass 27, count 0 2006.232.07:46:12.61#ibcon#about to read 6, iclass 27, count 0 2006.232.07:46:12.61#ibcon#read 6, iclass 27, count 0 2006.232.07:46:12.61#ibcon#end of sib2, iclass 27, count 0 2006.232.07:46:12.61#ibcon#*mode == 0, iclass 27, count 0 2006.232.07:46:12.61#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.232.07:46:12.61#ibcon#[25=BW32\r\n] 2006.232.07:46:12.61#ibcon#*before write, iclass 27, count 0 2006.232.07:46:12.61#ibcon#enter sib2, iclass 27, count 0 2006.232.07:46:12.61#ibcon#flushed, iclass 27, count 0 2006.232.07:46:12.61#ibcon#about to write, iclass 27, count 0 2006.232.07:46:12.61#ibcon#wrote, iclass 27, count 0 2006.232.07:46:12.61#ibcon#about to read 3, iclass 27, count 0 2006.232.07:46:12.64#ibcon#read 3, iclass 27, count 0 2006.232.07:46:12.64#ibcon#about to read 4, iclass 27, count 0 2006.232.07:46:12.64#ibcon#read 4, iclass 27, count 0 2006.232.07:46:12.64#ibcon#about to read 5, iclass 27, count 0 2006.232.07:46:12.64#ibcon#read 5, iclass 27, count 0 2006.232.07:46:12.64#ibcon#about to read 6, iclass 27, count 0 2006.232.07:46:12.64#ibcon#read 6, iclass 27, count 0 2006.232.07:46:12.64#ibcon#end of sib2, iclass 27, count 0 2006.232.07:46:12.64#ibcon#*after write, iclass 27, count 0 2006.232.07:46:12.64#ibcon#*before return 0, iclass 27, count 0 2006.232.07:46:12.64#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.232.07:46:12.64#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.232.07:46:12.64#ibcon#about to clear, iclass 27 cls_cnt 0 2006.232.07:46:12.64#ibcon#cleared, iclass 27 cls_cnt 0 2006.232.07:46:12.64$vc4f8/vbbw=wide 2006.232.07:46:12.64#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.232.07:46:12.64#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.232.07:46:12.64#ibcon#ireg 8 cls_cnt 0 2006.232.07:46:12.64#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:46:12.71#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:46:12.71#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:46:12.71#ibcon#enter wrdev, iclass 29, count 0 2006.232.07:46:12.71#ibcon#first serial, iclass 29, count 0 2006.232.07:46:12.71#ibcon#enter sib2, iclass 29, count 0 2006.232.07:46:12.71#ibcon#flushed, iclass 29, count 0 2006.232.07:46:12.71#ibcon#about to write, iclass 29, count 0 2006.232.07:46:12.71#ibcon#wrote, iclass 29, count 0 2006.232.07:46:12.71#ibcon#about to read 3, iclass 29, count 0 2006.232.07:46:12.73#ibcon#read 3, iclass 29, count 0 2006.232.07:46:12.73#ibcon#about to read 4, iclass 29, count 0 2006.232.07:46:12.73#ibcon#read 4, iclass 29, count 0 2006.232.07:46:12.73#ibcon#about to read 5, iclass 29, count 0 2006.232.07:46:12.73#ibcon#read 5, iclass 29, count 0 2006.232.07:46:12.73#ibcon#about to read 6, iclass 29, count 0 2006.232.07:46:12.73#ibcon#read 6, iclass 29, count 0 2006.232.07:46:12.73#ibcon#end of sib2, iclass 29, count 0 2006.232.07:46:12.73#ibcon#*mode == 0, iclass 29, count 0 2006.232.07:46:12.73#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.232.07:46:12.73#ibcon#[27=BW32\r\n] 2006.232.07:46:12.73#ibcon#*before write, iclass 29, count 0 2006.232.07:46:12.73#ibcon#enter sib2, iclass 29, count 0 2006.232.07:46:12.73#ibcon#flushed, iclass 29, count 0 2006.232.07:46:12.73#ibcon#about to write, iclass 29, count 0 2006.232.07:46:12.73#ibcon#wrote, iclass 29, count 0 2006.232.07:46:12.73#ibcon#about to read 3, iclass 29, count 0 2006.232.07:46:12.76#ibcon#read 3, iclass 29, count 0 2006.232.07:46:12.76#ibcon#about to read 4, iclass 29, count 0 2006.232.07:46:12.76#ibcon#read 4, iclass 29, count 0 2006.232.07:46:12.76#ibcon#about to read 5, iclass 29, count 0 2006.232.07:46:12.76#ibcon#read 5, iclass 29, count 0 2006.232.07:46:12.76#ibcon#about to read 6, iclass 29, count 0 2006.232.07:46:12.76#ibcon#read 6, iclass 29, count 0 2006.232.07:46:12.76#ibcon#end of sib2, iclass 29, count 0 2006.232.07:46:12.76#ibcon#*after write, iclass 29, count 0 2006.232.07:46:12.76#ibcon#*before return 0, iclass 29, count 0 2006.232.07:46:12.76#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:46:12.76#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:46:12.76#ibcon#about to clear, iclass 29 cls_cnt 0 2006.232.07:46:12.76#ibcon#cleared, iclass 29 cls_cnt 0 2006.232.07:46:12.76$4f8m12a/ifd4f 2006.232.07:46:12.76$ifd4f/lo= 2006.232.07:46:12.76$ifd4f/lo=lo1,7680.00,usb,rcp,1 2006.232.07:46:12.76$ifd4f/lo=lo2,1600.00,usb,rcp,1 2006.232.07:46:12.76$ifd4f/lo=lo3,8080.00,usb,rcp,1 2006.232.07:46:12.76$ifd4f/patch= 2006.232.07:46:12.76$ifd4f/patch=lo1,a1,a2,a3,a4 2006.232.07:46:12.76$ifd4f/patch=lo2,b1,b2,b3,b4,b5,b6 2006.232.07:46:12.76$ifd4f/patch=lo3,a5,a6,a7,a8 2006.232.07:46:12.76$4f8m12a/"form=m,16.000,1:2 2006.232.07:46:12.76$4f8m12a/"tpicd 2006.232.07:46:12.76$4f8m12a/echo=off 2006.232.07:46:12.76$4f8m12a/xlog=off 2006.232.07:46:12.76:!2006.232.07:47:20 2006.232.07:46:57.14#trakl#Source acquired 2006.232.07:46:57.14#flagr#flagr/antenna,acquired 2006.232.07:47:20.00:preob 2006.232.07:47:20.14/onsource/TRACKING 2006.232.07:47:20.14:!2006.232.07:47:30 2006.232.07:47:30.00:data_valid=on 2006.232.07:47:30.00:midob 2006.232.07:47:30.14/onsource/TRACKING 2006.232.07:47:30.14/wx/29.42,1007.3,86 2006.232.07:47:30.33/cable/+6.3871E-03 2006.232.07:47:31.42/va/01,08,usb,yes,30,32 2006.232.07:47:31.42/va/02,07,usb,yes,30,32 2006.232.07:47:31.42/va/03,08,usb,yes,23,23 2006.232.07:47:31.42/va/04,07,usb,yes,32,34 2006.232.07:47:31.42/va/05,07,usb,yes,36,38 2006.232.07:47:31.42/va/06,06,usb,yes,35,35 2006.232.07:47:31.42/va/07,06,usb,yes,36,36 2006.232.07:47:31.42/va/08,06,usb,yes,38,38 2006.232.07:47:31.65/valo/01,532.99,yes,locked 2006.232.07:47:31.65/valo/02,572.99,yes,locked 2006.232.07:47:31.65/valo/03,672.99,yes,locked 2006.232.07:47:31.65/valo/04,832.99,yes,locked 2006.232.07:47:31.65/valo/05,652.99,yes,locked 2006.232.07:47:31.65/valo/06,772.99,yes,locked 2006.232.07:47:31.65/valo/07,832.99,yes,locked 2006.232.07:47:31.65/valo/08,852.99,yes,locked 2006.232.07:47:32.74/vb/01,04,usb,yes,30,29 2006.232.07:47:32.74/vb/02,04,usb,yes,32,34 2006.232.07:47:32.74/vb/03,04,usb,yes,29,32 2006.232.07:47:32.74/vb/04,04,usb,yes,29,29 2006.232.07:47:32.74/vb/05,03,usb,yes,35,39 2006.232.07:47:32.74/vb/06,04,usb,yes,29,32 2006.232.07:47:32.74/vb/07,04,usb,yes,31,31 2006.232.07:47:32.74/vb/08,04,usb,yes,28,32 2006.232.07:47:32.97/vblo/01,632.99,yes,locked 2006.232.07:47:32.97/vblo/02,640.99,yes,locked 2006.232.07:47:32.97/vblo/03,656.99,yes,locked 2006.232.07:47:32.97/vblo/04,712.99,yes,locked 2006.232.07:47:32.97/vblo/05,744.99,yes,locked 2006.232.07:47:32.97/vblo/06,752.99,yes,locked 2006.232.07:47:32.97/vblo/07,734.99,yes,locked 2006.232.07:47:32.97/vblo/08,744.99,yes,locked 2006.232.07:47:33.12/vabw/8 2006.232.07:47:33.27/vbbw/8 2006.232.07:47:33.36/xfe/off,on,13.0 2006.232.07:47:33.74/ifatt/23,28,28,28 2006.232.07:47:34.07/fmout-gps/S +4.44E-07 2006.232.07:47:34.11:!2006.232.07:48:30 2006.232.07:48:30.00:data_valid=off 2006.232.07:48:30.00:postob 2006.232.07:48:30.09/cable/+6.3865E-03 2006.232.07:48:30.09/wx/29.42,1007.2,87 2006.232.07:48:31.07/fmout-gps/S +4.46E-07 2006.232.07:48:31.07:scan_name=232-0749,k06232,60 2006.232.07:48:31.07:source=3c371,180650.68,694928.1,2000.0,cw 2006.232.07:48:31.14#flagr#flagr/antenna,new-source 2006.232.07:48:32.14:checkk5 2006.232.07:48:32.51/chk_autoobs//k5ts1/ autoobs is running! 2006.232.07:48:32.89/chk_autoobs//k5ts2/ autoobs is running! 2006.232.07:48:33.26/chk_autoobs//k5ts3/ autoobs is running! 2006.232.07:48:33.64/chk_autoobs//k5ts4/ autoobs is running! 2006.232.07:48:34.01/chk_obsdata//k5ts1/T2320747??a.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:48:34.38/chk_obsdata//k5ts2/T2320747??b.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:48:34.75/chk_obsdata//k5ts3/T2320747??c.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:48:35.11/chk_obsdata//k5ts4/T2320747??d.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:48:35.81/k5log//k5ts1_log_newline 2006.232.07:48:36.49/k5log//k5ts2_log_newline 2006.232.07:48:37.18/k5log//k5ts3_log_newline 2006.232.07:48:37.86/k5log//k5ts4_log_newline 2006.232.07:48:37.89/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.232.07:48:37.89:4f8m12a=1 2006.232.07:48:37.89$4f8m12a/echo=on 2006.232.07:48:37.89$4f8m12a/pcalon 2006.232.07:48:37.89$pcalon/"no phase cal control is implemented here 2006.232.07:48:37.89$4f8m12a/"tpicd=stop 2006.232.07:48:37.89$4f8m12a/vc4f8 2006.232.07:48:37.89$vc4f8/valo=1,532.99 2006.232.07:48:37.89#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.232.07:48:37.89#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.232.07:48:37.89#ibcon#ireg 17 cls_cnt 0 2006.232.07:48:37.89#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:48:37.89#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:48:37.89#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:48:37.89#ibcon#enter wrdev, iclass 16, count 0 2006.232.07:48:37.89#ibcon#first serial, iclass 16, count 0 2006.232.07:48:37.89#ibcon#enter sib2, iclass 16, count 0 2006.232.07:48:37.89#ibcon#flushed, iclass 16, count 0 2006.232.07:48:37.89#ibcon#about to write, iclass 16, count 0 2006.232.07:48:37.89#ibcon#wrote, iclass 16, count 0 2006.232.07:48:37.89#ibcon#about to read 3, iclass 16, count 0 2006.232.07:48:37.93#ibcon#read 3, iclass 16, count 0 2006.232.07:48:37.93#ibcon#about to read 4, iclass 16, count 0 2006.232.07:48:37.93#ibcon#read 4, iclass 16, count 0 2006.232.07:48:37.93#ibcon#about to read 5, iclass 16, count 0 2006.232.07:48:37.93#ibcon#read 5, iclass 16, count 0 2006.232.07:48:37.93#ibcon#about to read 6, iclass 16, count 0 2006.232.07:48:37.93#ibcon#read 6, iclass 16, count 0 2006.232.07:48:37.93#ibcon#end of sib2, iclass 16, count 0 2006.232.07:48:37.93#ibcon#*mode == 0, iclass 16, count 0 2006.232.07:48:37.93#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.232.07:48:37.93#ibcon#[26=FRQ=01,532.99\r\n] 2006.232.07:48:37.93#ibcon#*before write, iclass 16, count 0 2006.232.07:48:37.93#ibcon#enter sib2, iclass 16, count 0 2006.232.07:48:37.93#ibcon#flushed, iclass 16, count 0 2006.232.07:48:37.93#ibcon#about to write, iclass 16, count 0 2006.232.07:48:37.93#ibcon#wrote, iclass 16, count 0 2006.232.07:48:37.93#ibcon#about to read 3, iclass 16, count 0 2006.232.07:48:37.98#ibcon#read 3, iclass 16, count 0 2006.232.07:48:37.98#ibcon#about to read 4, iclass 16, count 0 2006.232.07:48:37.98#ibcon#read 4, iclass 16, count 0 2006.232.07:48:37.98#ibcon#about to read 5, iclass 16, count 0 2006.232.07:48:37.98#ibcon#read 5, iclass 16, count 0 2006.232.07:48:37.98#ibcon#about to read 6, iclass 16, count 0 2006.232.07:48:37.98#ibcon#read 6, iclass 16, count 0 2006.232.07:48:37.98#ibcon#end of sib2, iclass 16, count 0 2006.232.07:48:37.98#ibcon#*after write, iclass 16, count 0 2006.232.07:48:37.98#ibcon#*before return 0, iclass 16, count 0 2006.232.07:48:37.98#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:48:37.98#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:48:37.98#ibcon#about to clear, iclass 16 cls_cnt 0 2006.232.07:48:37.98#ibcon#cleared, iclass 16 cls_cnt 0 2006.232.07:48:37.98$vc4f8/va=1,8 2006.232.07:48:37.98#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.232.07:48:37.98#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.232.07:48:37.98#ibcon#ireg 11 cls_cnt 2 2006.232.07:48:37.98#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:48:37.98#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:48:37.98#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:48:37.98#ibcon#enter wrdev, iclass 18, count 2 2006.232.07:48:37.98#ibcon#first serial, iclass 18, count 2 2006.232.07:48:37.98#ibcon#enter sib2, iclass 18, count 2 2006.232.07:48:37.98#ibcon#flushed, iclass 18, count 2 2006.232.07:48:37.98#ibcon#about to write, iclass 18, count 2 2006.232.07:48:37.98#ibcon#wrote, iclass 18, count 2 2006.232.07:48:37.98#ibcon#about to read 3, iclass 18, count 2 2006.232.07:48:38.00#ibcon#read 3, iclass 18, count 2 2006.232.07:48:38.00#ibcon#about to read 4, iclass 18, count 2 2006.232.07:48:38.00#ibcon#read 4, iclass 18, count 2 2006.232.07:48:38.00#ibcon#about to read 5, iclass 18, count 2 2006.232.07:48:38.00#ibcon#read 5, iclass 18, count 2 2006.232.07:48:38.00#ibcon#about to read 6, iclass 18, count 2 2006.232.07:48:38.00#ibcon#read 6, iclass 18, count 2 2006.232.07:48:38.00#ibcon#end of sib2, iclass 18, count 2 2006.232.07:48:38.00#ibcon#*mode == 0, iclass 18, count 2 2006.232.07:48:38.00#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.232.07:48:38.00#ibcon#[25=AT01-08\r\n] 2006.232.07:48:38.00#ibcon#*before write, iclass 18, count 2 2006.232.07:48:38.00#ibcon#enter sib2, iclass 18, count 2 2006.232.07:48:38.00#ibcon#flushed, iclass 18, count 2 2006.232.07:48:38.00#ibcon#about to write, iclass 18, count 2 2006.232.07:48:38.00#ibcon#wrote, iclass 18, count 2 2006.232.07:48:38.00#ibcon#about to read 3, iclass 18, count 2 2006.232.07:48:38.03#ibcon#read 3, iclass 18, count 2 2006.232.07:48:38.03#ibcon#about to read 4, iclass 18, count 2 2006.232.07:48:38.03#ibcon#read 4, iclass 18, count 2 2006.232.07:48:38.03#ibcon#about to read 5, iclass 18, count 2 2006.232.07:48:38.03#ibcon#read 5, iclass 18, count 2 2006.232.07:48:38.03#ibcon#about to read 6, iclass 18, count 2 2006.232.07:48:38.03#ibcon#read 6, iclass 18, count 2 2006.232.07:48:38.03#ibcon#end of sib2, iclass 18, count 2 2006.232.07:48:38.03#ibcon#*after write, iclass 18, count 2 2006.232.07:48:38.03#ibcon#*before return 0, iclass 18, count 2 2006.232.07:48:38.03#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:48:38.03#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:48:38.03#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.232.07:48:38.03#ibcon#ireg 7 cls_cnt 0 2006.232.07:48:38.03#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:48:38.15#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:48:38.15#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:48:38.15#ibcon#enter wrdev, iclass 18, count 0 2006.232.07:48:38.15#ibcon#first serial, iclass 18, count 0 2006.232.07:48:38.15#ibcon#enter sib2, iclass 18, count 0 2006.232.07:48:38.15#ibcon#flushed, iclass 18, count 0 2006.232.07:48:38.15#ibcon#about to write, iclass 18, count 0 2006.232.07:48:38.15#ibcon#wrote, iclass 18, count 0 2006.232.07:48:38.15#ibcon#about to read 3, iclass 18, count 0 2006.232.07:48:38.17#ibcon#read 3, iclass 18, count 0 2006.232.07:48:38.17#ibcon#about to read 4, iclass 18, count 0 2006.232.07:48:38.17#ibcon#read 4, iclass 18, count 0 2006.232.07:48:38.17#ibcon#about to read 5, iclass 18, count 0 2006.232.07:48:38.17#ibcon#read 5, iclass 18, count 0 2006.232.07:48:38.17#ibcon#about to read 6, iclass 18, count 0 2006.232.07:48:38.17#ibcon#read 6, iclass 18, count 0 2006.232.07:48:38.17#ibcon#end of sib2, iclass 18, count 0 2006.232.07:48:38.17#ibcon#*mode == 0, iclass 18, count 0 2006.232.07:48:38.17#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.232.07:48:38.17#ibcon#[25=USB\r\n] 2006.232.07:48:38.17#ibcon#*before write, iclass 18, count 0 2006.232.07:48:38.17#ibcon#enter sib2, iclass 18, count 0 2006.232.07:48:38.17#ibcon#flushed, iclass 18, count 0 2006.232.07:48:38.17#ibcon#about to write, iclass 18, count 0 2006.232.07:48:38.17#ibcon#wrote, iclass 18, count 0 2006.232.07:48:38.17#ibcon#about to read 3, iclass 18, count 0 2006.232.07:48:38.20#ibcon#read 3, iclass 18, count 0 2006.232.07:48:38.20#ibcon#about to read 4, iclass 18, count 0 2006.232.07:48:38.20#ibcon#read 4, iclass 18, count 0 2006.232.07:48:38.20#ibcon#about to read 5, iclass 18, count 0 2006.232.07:48:38.20#ibcon#read 5, iclass 18, count 0 2006.232.07:48:38.20#ibcon#about to read 6, iclass 18, count 0 2006.232.07:48:38.20#ibcon#read 6, iclass 18, count 0 2006.232.07:48:38.20#ibcon#end of sib2, iclass 18, count 0 2006.232.07:48:38.20#ibcon#*after write, iclass 18, count 0 2006.232.07:48:38.20#ibcon#*before return 0, iclass 18, count 0 2006.232.07:48:38.20#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:48:38.20#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:48:38.20#ibcon#about to clear, iclass 18 cls_cnt 0 2006.232.07:48:38.20#ibcon#cleared, iclass 18 cls_cnt 0 2006.232.07:48:38.20$vc4f8/valo=2,572.99 2006.232.07:48:38.20#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.232.07:48:38.20#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.232.07:48:38.20#ibcon#ireg 17 cls_cnt 0 2006.232.07:48:38.20#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:48:38.20#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:48:38.20#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:48:38.20#ibcon#enter wrdev, iclass 20, count 0 2006.232.07:48:38.20#ibcon#first serial, iclass 20, count 0 2006.232.07:48:38.20#ibcon#enter sib2, iclass 20, count 0 2006.232.07:48:38.20#ibcon#flushed, iclass 20, count 0 2006.232.07:48:38.20#ibcon#about to write, iclass 20, count 0 2006.232.07:48:38.20#ibcon#wrote, iclass 20, count 0 2006.232.07:48:38.20#ibcon#about to read 3, iclass 20, count 0 2006.232.07:48:38.22#ibcon#read 3, iclass 20, count 0 2006.232.07:48:38.22#ibcon#about to read 4, iclass 20, count 0 2006.232.07:48:38.22#ibcon#read 4, iclass 20, count 0 2006.232.07:48:38.22#ibcon#about to read 5, iclass 20, count 0 2006.232.07:48:38.22#ibcon#read 5, iclass 20, count 0 2006.232.07:48:38.22#ibcon#about to read 6, iclass 20, count 0 2006.232.07:48:38.22#ibcon#read 6, iclass 20, count 0 2006.232.07:48:38.22#ibcon#end of sib2, iclass 20, count 0 2006.232.07:48:38.22#ibcon#*mode == 0, iclass 20, count 0 2006.232.07:48:38.22#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.232.07:48:38.22#ibcon#[26=FRQ=02,572.99\r\n] 2006.232.07:48:38.22#ibcon#*before write, iclass 20, count 0 2006.232.07:48:38.22#ibcon#enter sib2, iclass 20, count 0 2006.232.07:48:38.22#ibcon#flushed, iclass 20, count 0 2006.232.07:48:38.22#ibcon#about to write, iclass 20, count 0 2006.232.07:48:38.22#ibcon#wrote, iclass 20, count 0 2006.232.07:48:38.22#ibcon#about to read 3, iclass 20, count 0 2006.232.07:48:38.26#ibcon#read 3, iclass 20, count 0 2006.232.07:48:38.26#ibcon#about to read 4, iclass 20, count 0 2006.232.07:48:38.26#ibcon#read 4, iclass 20, count 0 2006.232.07:48:38.26#ibcon#about to read 5, iclass 20, count 0 2006.232.07:48:38.26#ibcon#read 5, iclass 20, count 0 2006.232.07:48:38.26#ibcon#about to read 6, iclass 20, count 0 2006.232.07:48:38.26#ibcon#read 6, iclass 20, count 0 2006.232.07:48:38.26#ibcon#end of sib2, iclass 20, count 0 2006.232.07:48:38.26#ibcon#*after write, iclass 20, count 0 2006.232.07:48:38.26#ibcon#*before return 0, iclass 20, count 0 2006.232.07:48:38.26#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:48:38.26#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:48:38.26#ibcon#about to clear, iclass 20 cls_cnt 0 2006.232.07:48:38.26#ibcon#cleared, iclass 20 cls_cnt 0 2006.232.07:48:38.26$vc4f8/va=2,7 2006.232.07:48:38.26#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.232.07:48:38.26#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.232.07:48:38.26#ibcon#ireg 11 cls_cnt 2 2006.232.07:48:38.26#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:48:38.33#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:48:38.33#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:48:38.33#ibcon#enter wrdev, iclass 22, count 2 2006.232.07:48:38.33#ibcon#first serial, iclass 22, count 2 2006.232.07:48:38.33#ibcon#enter sib2, iclass 22, count 2 2006.232.07:48:38.33#ibcon#flushed, iclass 22, count 2 2006.232.07:48:38.33#ibcon#about to write, iclass 22, count 2 2006.232.07:48:38.33#ibcon#wrote, iclass 22, count 2 2006.232.07:48:38.33#ibcon#about to read 3, iclass 22, count 2 2006.232.07:48:38.34#ibcon#read 3, iclass 22, count 2 2006.232.07:48:38.34#ibcon#about to read 4, iclass 22, count 2 2006.232.07:48:38.34#ibcon#read 4, iclass 22, count 2 2006.232.07:48:38.34#ibcon#about to read 5, iclass 22, count 2 2006.232.07:48:38.34#ibcon#read 5, iclass 22, count 2 2006.232.07:48:38.34#ibcon#about to read 6, iclass 22, count 2 2006.232.07:48:38.34#ibcon#read 6, iclass 22, count 2 2006.232.07:48:38.34#ibcon#end of sib2, iclass 22, count 2 2006.232.07:48:38.34#ibcon#*mode == 0, iclass 22, count 2 2006.232.07:48:38.34#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.232.07:48:38.34#ibcon#[25=AT02-07\r\n] 2006.232.07:48:38.34#ibcon#*before write, iclass 22, count 2 2006.232.07:48:38.34#ibcon#enter sib2, iclass 22, count 2 2006.232.07:48:38.34#ibcon#flushed, iclass 22, count 2 2006.232.07:48:38.34#ibcon#about to write, iclass 22, count 2 2006.232.07:48:38.34#ibcon#wrote, iclass 22, count 2 2006.232.07:48:38.34#ibcon#about to read 3, iclass 22, count 2 2006.232.07:48:38.37#ibcon#read 3, iclass 22, count 2 2006.232.07:48:38.37#ibcon#about to read 4, iclass 22, count 2 2006.232.07:48:38.37#ibcon#read 4, iclass 22, count 2 2006.232.07:48:38.37#ibcon#about to read 5, iclass 22, count 2 2006.232.07:48:38.37#ibcon#read 5, iclass 22, count 2 2006.232.07:48:38.37#ibcon#about to read 6, iclass 22, count 2 2006.232.07:48:38.37#ibcon#read 6, iclass 22, count 2 2006.232.07:48:38.37#ibcon#end of sib2, iclass 22, count 2 2006.232.07:48:38.37#ibcon#*after write, iclass 22, count 2 2006.232.07:48:38.37#ibcon#*before return 0, iclass 22, count 2 2006.232.07:48:38.37#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:48:38.37#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:48:38.37#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.232.07:48:38.37#ibcon#ireg 7 cls_cnt 0 2006.232.07:48:38.37#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:48:38.49#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:48:38.49#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:48:38.49#ibcon#enter wrdev, iclass 22, count 0 2006.232.07:48:38.49#ibcon#first serial, iclass 22, count 0 2006.232.07:48:38.49#ibcon#enter sib2, iclass 22, count 0 2006.232.07:48:38.49#ibcon#flushed, iclass 22, count 0 2006.232.07:48:38.49#ibcon#about to write, iclass 22, count 0 2006.232.07:48:38.49#ibcon#wrote, iclass 22, count 0 2006.232.07:48:38.49#ibcon#about to read 3, iclass 22, count 0 2006.232.07:48:38.51#ibcon#read 3, iclass 22, count 0 2006.232.07:48:38.51#ibcon#about to read 4, iclass 22, count 0 2006.232.07:48:38.51#ibcon#read 4, iclass 22, count 0 2006.232.07:48:38.51#ibcon#about to read 5, iclass 22, count 0 2006.232.07:48:38.51#ibcon#read 5, iclass 22, count 0 2006.232.07:48:38.51#ibcon#about to read 6, iclass 22, count 0 2006.232.07:48:38.51#ibcon#read 6, iclass 22, count 0 2006.232.07:48:38.51#ibcon#end of sib2, iclass 22, count 0 2006.232.07:48:38.51#ibcon#*mode == 0, iclass 22, count 0 2006.232.07:48:38.51#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.232.07:48:38.51#ibcon#[25=USB\r\n] 2006.232.07:48:38.51#ibcon#*before write, iclass 22, count 0 2006.232.07:48:38.51#ibcon#enter sib2, iclass 22, count 0 2006.232.07:48:38.51#ibcon#flushed, iclass 22, count 0 2006.232.07:48:38.51#ibcon#about to write, iclass 22, count 0 2006.232.07:48:38.51#ibcon#wrote, iclass 22, count 0 2006.232.07:48:38.51#ibcon#about to read 3, iclass 22, count 0 2006.232.07:48:38.54#ibcon#read 3, iclass 22, count 0 2006.232.07:48:38.54#ibcon#about to read 4, iclass 22, count 0 2006.232.07:48:38.54#ibcon#read 4, iclass 22, count 0 2006.232.07:48:38.54#ibcon#about to read 5, iclass 22, count 0 2006.232.07:48:38.54#ibcon#read 5, iclass 22, count 0 2006.232.07:48:38.54#ibcon#about to read 6, iclass 22, count 0 2006.232.07:48:38.54#ibcon#read 6, iclass 22, count 0 2006.232.07:48:38.54#ibcon#end of sib2, iclass 22, count 0 2006.232.07:48:38.54#ibcon#*after write, iclass 22, count 0 2006.232.07:48:38.54#ibcon#*before return 0, iclass 22, count 0 2006.232.07:48:38.54#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:48:38.54#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:48:38.54#ibcon#about to clear, iclass 22 cls_cnt 0 2006.232.07:48:38.54#ibcon#cleared, iclass 22 cls_cnt 0 2006.232.07:48:38.54$vc4f8/valo=3,672.99 2006.232.07:48:38.54#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.232.07:48:38.54#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.232.07:48:38.54#ibcon#ireg 17 cls_cnt 0 2006.232.07:48:38.54#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:48:38.54#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:48:38.54#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:48:38.54#ibcon#enter wrdev, iclass 24, count 0 2006.232.07:48:38.54#ibcon#first serial, iclass 24, count 0 2006.232.07:48:38.54#ibcon#enter sib2, iclass 24, count 0 2006.232.07:48:38.54#ibcon#flushed, iclass 24, count 0 2006.232.07:48:38.54#ibcon#about to write, iclass 24, count 0 2006.232.07:48:38.54#ibcon#wrote, iclass 24, count 0 2006.232.07:48:38.54#ibcon#about to read 3, iclass 24, count 0 2006.232.07:48:38.56#ibcon#read 3, iclass 24, count 0 2006.232.07:48:38.56#ibcon#about to read 4, iclass 24, count 0 2006.232.07:48:38.56#ibcon#read 4, iclass 24, count 0 2006.232.07:48:38.56#ibcon#about to read 5, iclass 24, count 0 2006.232.07:48:38.56#ibcon#read 5, iclass 24, count 0 2006.232.07:48:38.56#ibcon#about to read 6, iclass 24, count 0 2006.232.07:48:38.56#ibcon#read 6, iclass 24, count 0 2006.232.07:48:38.56#ibcon#end of sib2, iclass 24, count 0 2006.232.07:48:38.56#ibcon#*mode == 0, iclass 24, count 0 2006.232.07:48:38.56#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.232.07:48:38.56#ibcon#[26=FRQ=03,672.99\r\n] 2006.232.07:48:38.56#ibcon#*before write, iclass 24, count 0 2006.232.07:48:38.56#ibcon#enter sib2, iclass 24, count 0 2006.232.07:48:38.56#ibcon#flushed, iclass 24, count 0 2006.232.07:48:38.56#ibcon#about to write, iclass 24, count 0 2006.232.07:48:38.56#ibcon#wrote, iclass 24, count 0 2006.232.07:48:38.56#ibcon#about to read 3, iclass 24, count 0 2006.232.07:48:38.60#ibcon#read 3, iclass 24, count 0 2006.232.07:48:38.60#ibcon#about to read 4, iclass 24, count 0 2006.232.07:48:38.60#ibcon#read 4, iclass 24, count 0 2006.232.07:48:38.60#ibcon#about to read 5, iclass 24, count 0 2006.232.07:48:38.60#ibcon#read 5, iclass 24, count 0 2006.232.07:48:38.60#ibcon#about to read 6, iclass 24, count 0 2006.232.07:48:38.60#ibcon#read 6, iclass 24, count 0 2006.232.07:48:38.60#ibcon#end of sib2, iclass 24, count 0 2006.232.07:48:38.60#ibcon#*after write, iclass 24, count 0 2006.232.07:48:38.60#ibcon#*before return 0, iclass 24, count 0 2006.232.07:48:38.60#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:48:38.60#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:48:38.60#ibcon#about to clear, iclass 24 cls_cnt 0 2006.232.07:48:38.60#ibcon#cleared, iclass 24 cls_cnt 0 2006.232.07:48:38.60$vc4f8/va=3,8 2006.232.07:48:38.60#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.232.07:48:38.60#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.232.07:48:38.60#ibcon#ireg 11 cls_cnt 2 2006.232.07:48:38.60#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:48:38.66#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:48:38.66#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:48:38.66#ibcon#enter wrdev, iclass 26, count 2 2006.232.07:48:38.66#ibcon#first serial, iclass 26, count 2 2006.232.07:48:38.66#ibcon#enter sib2, iclass 26, count 2 2006.232.07:48:38.66#ibcon#flushed, iclass 26, count 2 2006.232.07:48:38.66#ibcon#about to write, iclass 26, count 2 2006.232.07:48:38.66#ibcon#wrote, iclass 26, count 2 2006.232.07:48:38.66#ibcon#about to read 3, iclass 26, count 2 2006.232.07:48:38.69#ibcon#read 3, iclass 26, count 2 2006.232.07:48:38.69#ibcon#about to read 4, iclass 26, count 2 2006.232.07:48:38.69#ibcon#read 4, iclass 26, count 2 2006.232.07:48:38.69#ibcon#about to read 5, iclass 26, count 2 2006.232.07:48:38.69#ibcon#read 5, iclass 26, count 2 2006.232.07:48:38.69#ibcon#about to read 6, iclass 26, count 2 2006.232.07:48:38.69#ibcon#read 6, iclass 26, count 2 2006.232.07:48:38.69#ibcon#end of sib2, iclass 26, count 2 2006.232.07:48:38.69#ibcon#*mode == 0, iclass 26, count 2 2006.232.07:48:38.69#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.232.07:48:38.69#ibcon#[25=AT03-08\r\n] 2006.232.07:48:38.69#ibcon#*before write, iclass 26, count 2 2006.232.07:48:38.69#ibcon#enter sib2, iclass 26, count 2 2006.232.07:48:38.69#ibcon#flushed, iclass 26, count 2 2006.232.07:48:38.69#ibcon#about to write, iclass 26, count 2 2006.232.07:48:38.69#ibcon#wrote, iclass 26, count 2 2006.232.07:48:38.69#ibcon#about to read 3, iclass 26, count 2 2006.232.07:48:38.72#ibcon#read 3, iclass 26, count 2 2006.232.07:48:38.72#ibcon#about to read 4, iclass 26, count 2 2006.232.07:48:38.72#ibcon#read 4, iclass 26, count 2 2006.232.07:48:38.72#ibcon#about to read 5, iclass 26, count 2 2006.232.07:48:38.72#ibcon#read 5, iclass 26, count 2 2006.232.07:48:38.72#ibcon#about to read 6, iclass 26, count 2 2006.232.07:48:38.72#ibcon#read 6, iclass 26, count 2 2006.232.07:48:38.72#ibcon#end of sib2, iclass 26, count 2 2006.232.07:48:38.72#ibcon#*after write, iclass 26, count 2 2006.232.07:48:38.72#ibcon#*before return 0, iclass 26, count 2 2006.232.07:48:38.72#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:48:38.72#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:48:38.72#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.232.07:48:38.72#ibcon#ireg 7 cls_cnt 0 2006.232.07:48:38.72#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:48:38.84#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:48:38.84#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:48:38.84#ibcon#enter wrdev, iclass 26, count 0 2006.232.07:48:38.84#ibcon#first serial, iclass 26, count 0 2006.232.07:48:38.84#ibcon#enter sib2, iclass 26, count 0 2006.232.07:48:38.84#ibcon#flushed, iclass 26, count 0 2006.232.07:48:38.84#ibcon#about to write, iclass 26, count 0 2006.232.07:48:38.84#ibcon#wrote, iclass 26, count 0 2006.232.07:48:38.84#ibcon#about to read 3, iclass 26, count 0 2006.232.07:48:38.86#ibcon#read 3, iclass 26, count 0 2006.232.07:48:38.86#ibcon#about to read 4, iclass 26, count 0 2006.232.07:48:38.86#ibcon#read 4, iclass 26, count 0 2006.232.07:48:38.86#ibcon#about to read 5, iclass 26, count 0 2006.232.07:48:38.86#ibcon#read 5, iclass 26, count 0 2006.232.07:48:38.86#ibcon#about to read 6, iclass 26, count 0 2006.232.07:48:38.86#ibcon#read 6, iclass 26, count 0 2006.232.07:48:38.86#ibcon#end of sib2, iclass 26, count 0 2006.232.07:48:38.86#ibcon#*mode == 0, iclass 26, count 0 2006.232.07:48:38.86#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.232.07:48:38.86#ibcon#[25=USB\r\n] 2006.232.07:48:38.86#ibcon#*before write, iclass 26, count 0 2006.232.07:48:38.86#ibcon#enter sib2, iclass 26, count 0 2006.232.07:48:38.86#ibcon#flushed, iclass 26, count 0 2006.232.07:48:38.86#ibcon#about to write, iclass 26, count 0 2006.232.07:48:38.86#ibcon#wrote, iclass 26, count 0 2006.232.07:48:38.86#ibcon#about to read 3, iclass 26, count 0 2006.232.07:48:38.89#ibcon#read 3, iclass 26, count 0 2006.232.07:48:38.89#ibcon#about to read 4, iclass 26, count 0 2006.232.07:48:38.89#ibcon#read 4, iclass 26, count 0 2006.232.07:48:38.89#ibcon#about to read 5, iclass 26, count 0 2006.232.07:48:38.89#ibcon#read 5, iclass 26, count 0 2006.232.07:48:38.89#ibcon#about to read 6, iclass 26, count 0 2006.232.07:48:38.89#ibcon#read 6, iclass 26, count 0 2006.232.07:48:38.89#ibcon#end of sib2, iclass 26, count 0 2006.232.07:48:38.89#ibcon#*after write, iclass 26, count 0 2006.232.07:48:38.89#ibcon#*before return 0, iclass 26, count 0 2006.232.07:48:38.89#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:48:38.89#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:48:38.89#ibcon#about to clear, iclass 26 cls_cnt 0 2006.232.07:48:38.89#ibcon#cleared, iclass 26 cls_cnt 0 2006.232.07:48:38.89$vc4f8/valo=4,832.99 2006.232.07:48:38.89#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.232.07:48:38.89#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.232.07:48:38.89#ibcon#ireg 17 cls_cnt 0 2006.232.07:48:38.89#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:48:38.89#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:48:38.89#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:48:38.89#ibcon#enter wrdev, iclass 28, count 0 2006.232.07:48:38.89#ibcon#first serial, iclass 28, count 0 2006.232.07:48:38.89#ibcon#enter sib2, iclass 28, count 0 2006.232.07:48:38.89#ibcon#flushed, iclass 28, count 0 2006.232.07:48:38.89#ibcon#about to write, iclass 28, count 0 2006.232.07:48:38.89#ibcon#wrote, iclass 28, count 0 2006.232.07:48:38.89#ibcon#about to read 3, iclass 28, count 0 2006.232.07:48:38.91#ibcon#read 3, iclass 28, count 0 2006.232.07:48:38.91#ibcon#about to read 4, iclass 28, count 0 2006.232.07:48:38.91#ibcon#read 4, iclass 28, count 0 2006.232.07:48:38.91#ibcon#about to read 5, iclass 28, count 0 2006.232.07:48:38.91#ibcon#read 5, iclass 28, count 0 2006.232.07:48:38.91#ibcon#about to read 6, iclass 28, count 0 2006.232.07:48:38.91#ibcon#read 6, iclass 28, count 0 2006.232.07:48:38.91#ibcon#end of sib2, iclass 28, count 0 2006.232.07:48:38.91#ibcon#*mode == 0, iclass 28, count 0 2006.232.07:48:38.91#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.232.07:48:38.91#ibcon#[26=FRQ=04,832.99\r\n] 2006.232.07:48:38.91#ibcon#*before write, iclass 28, count 0 2006.232.07:48:38.91#ibcon#enter sib2, iclass 28, count 0 2006.232.07:48:38.91#ibcon#flushed, iclass 28, count 0 2006.232.07:48:38.91#ibcon#about to write, iclass 28, count 0 2006.232.07:48:38.91#ibcon#wrote, iclass 28, count 0 2006.232.07:48:38.91#ibcon#about to read 3, iclass 28, count 0 2006.232.07:48:38.95#ibcon#read 3, iclass 28, count 0 2006.232.07:48:38.95#ibcon#about to read 4, iclass 28, count 0 2006.232.07:48:38.95#ibcon#read 4, iclass 28, count 0 2006.232.07:48:38.95#ibcon#about to read 5, iclass 28, count 0 2006.232.07:48:38.95#ibcon#read 5, iclass 28, count 0 2006.232.07:48:38.95#ibcon#about to read 6, iclass 28, count 0 2006.232.07:48:38.95#ibcon#read 6, iclass 28, count 0 2006.232.07:48:38.95#ibcon#end of sib2, iclass 28, count 0 2006.232.07:48:38.95#ibcon#*after write, iclass 28, count 0 2006.232.07:48:38.95#ibcon#*before return 0, iclass 28, count 0 2006.232.07:48:38.95#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:48:38.95#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:48:38.95#ibcon#about to clear, iclass 28 cls_cnt 0 2006.232.07:48:38.95#ibcon#cleared, iclass 28 cls_cnt 0 2006.232.07:48:38.95$vc4f8/va=4,7 2006.232.07:48:38.95#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.232.07:48:38.95#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.232.07:48:38.95#ibcon#ireg 11 cls_cnt 2 2006.232.07:48:38.95#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:48:39.01#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:48:39.01#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:48:39.01#ibcon#enter wrdev, iclass 30, count 2 2006.232.07:48:39.01#ibcon#first serial, iclass 30, count 2 2006.232.07:48:39.01#ibcon#enter sib2, iclass 30, count 2 2006.232.07:48:39.01#ibcon#flushed, iclass 30, count 2 2006.232.07:48:39.01#ibcon#about to write, iclass 30, count 2 2006.232.07:48:39.01#ibcon#wrote, iclass 30, count 2 2006.232.07:48:39.01#ibcon#about to read 3, iclass 30, count 2 2006.232.07:48:39.03#ibcon#read 3, iclass 30, count 2 2006.232.07:48:39.03#ibcon#about to read 4, iclass 30, count 2 2006.232.07:48:39.03#ibcon#read 4, iclass 30, count 2 2006.232.07:48:39.03#ibcon#about to read 5, iclass 30, count 2 2006.232.07:48:39.03#ibcon#read 5, iclass 30, count 2 2006.232.07:48:39.03#ibcon#about to read 6, iclass 30, count 2 2006.232.07:48:39.03#ibcon#read 6, iclass 30, count 2 2006.232.07:48:39.03#ibcon#end of sib2, iclass 30, count 2 2006.232.07:48:39.03#ibcon#*mode == 0, iclass 30, count 2 2006.232.07:48:39.03#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.232.07:48:39.03#ibcon#[25=AT04-07\r\n] 2006.232.07:48:39.03#ibcon#*before write, iclass 30, count 2 2006.232.07:48:39.03#ibcon#enter sib2, iclass 30, count 2 2006.232.07:48:39.03#ibcon#flushed, iclass 30, count 2 2006.232.07:48:39.03#ibcon#about to write, iclass 30, count 2 2006.232.07:48:39.03#ibcon#wrote, iclass 30, count 2 2006.232.07:48:39.03#ibcon#about to read 3, iclass 30, count 2 2006.232.07:48:39.06#ibcon#read 3, iclass 30, count 2 2006.232.07:48:39.06#ibcon#about to read 4, iclass 30, count 2 2006.232.07:48:39.06#ibcon#read 4, iclass 30, count 2 2006.232.07:48:39.06#ibcon#about to read 5, iclass 30, count 2 2006.232.07:48:39.06#ibcon#read 5, iclass 30, count 2 2006.232.07:48:39.06#ibcon#about to read 6, iclass 30, count 2 2006.232.07:48:39.06#ibcon#read 6, iclass 30, count 2 2006.232.07:48:39.06#ibcon#end of sib2, iclass 30, count 2 2006.232.07:48:39.06#ibcon#*after write, iclass 30, count 2 2006.232.07:48:39.06#ibcon#*before return 0, iclass 30, count 2 2006.232.07:48:39.06#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:48:39.06#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:48:39.06#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.232.07:48:39.06#ibcon#ireg 7 cls_cnt 0 2006.232.07:48:39.06#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:48:39.18#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:48:39.18#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:48:39.18#ibcon#enter wrdev, iclass 30, count 0 2006.232.07:48:39.18#ibcon#first serial, iclass 30, count 0 2006.232.07:48:39.18#ibcon#enter sib2, iclass 30, count 0 2006.232.07:48:39.18#ibcon#flushed, iclass 30, count 0 2006.232.07:48:39.18#ibcon#about to write, iclass 30, count 0 2006.232.07:48:39.18#ibcon#wrote, iclass 30, count 0 2006.232.07:48:39.18#ibcon#about to read 3, iclass 30, count 0 2006.232.07:48:39.20#ibcon#read 3, iclass 30, count 0 2006.232.07:48:39.20#ibcon#about to read 4, iclass 30, count 0 2006.232.07:48:39.20#ibcon#read 4, iclass 30, count 0 2006.232.07:48:39.20#ibcon#about to read 5, iclass 30, count 0 2006.232.07:48:39.20#ibcon#read 5, iclass 30, count 0 2006.232.07:48:39.20#ibcon#about to read 6, iclass 30, count 0 2006.232.07:48:39.20#ibcon#read 6, iclass 30, count 0 2006.232.07:48:39.20#ibcon#end of sib2, iclass 30, count 0 2006.232.07:48:39.20#ibcon#*mode == 0, iclass 30, count 0 2006.232.07:48:39.20#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.232.07:48:39.20#ibcon#[25=USB\r\n] 2006.232.07:48:39.20#ibcon#*before write, iclass 30, count 0 2006.232.07:48:39.20#ibcon#enter sib2, iclass 30, count 0 2006.232.07:48:39.20#ibcon#flushed, iclass 30, count 0 2006.232.07:48:39.20#ibcon#about to write, iclass 30, count 0 2006.232.07:48:39.20#ibcon#wrote, iclass 30, count 0 2006.232.07:48:39.20#ibcon#about to read 3, iclass 30, count 0 2006.232.07:48:39.23#ibcon#read 3, iclass 30, count 0 2006.232.07:48:39.23#ibcon#about to read 4, iclass 30, count 0 2006.232.07:48:39.23#ibcon#read 4, iclass 30, count 0 2006.232.07:48:39.23#ibcon#about to read 5, iclass 30, count 0 2006.232.07:48:39.23#ibcon#read 5, iclass 30, count 0 2006.232.07:48:39.23#ibcon#about to read 6, iclass 30, count 0 2006.232.07:48:39.23#ibcon#read 6, iclass 30, count 0 2006.232.07:48:39.23#ibcon#end of sib2, iclass 30, count 0 2006.232.07:48:39.23#ibcon#*after write, iclass 30, count 0 2006.232.07:48:39.23#ibcon#*before return 0, iclass 30, count 0 2006.232.07:48:39.23#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:48:39.23#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:48:39.23#ibcon#about to clear, iclass 30 cls_cnt 0 2006.232.07:48:39.23#ibcon#cleared, iclass 30 cls_cnt 0 2006.232.07:48:39.23$vc4f8/valo=5,652.99 2006.232.07:48:39.23#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.232.07:48:39.23#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.232.07:48:39.23#ibcon#ireg 17 cls_cnt 0 2006.232.07:48:39.23#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:48:39.23#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:48:39.23#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:48:39.23#ibcon#enter wrdev, iclass 32, count 0 2006.232.07:48:39.23#ibcon#first serial, iclass 32, count 0 2006.232.07:48:39.23#ibcon#enter sib2, iclass 32, count 0 2006.232.07:48:39.23#ibcon#flushed, iclass 32, count 0 2006.232.07:48:39.23#ibcon#about to write, iclass 32, count 0 2006.232.07:48:39.23#ibcon#wrote, iclass 32, count 0 2006.232.07:48:39.23#ibcon#about to read 3, iclass 32, count 0 2006.232.07:48:39.25#ibcon#read 3, iclass 32, count 0 2006.232.07:48:39.25#ibcon#about to read 4, iclass 32, count 0 2006.232.07:48:39.25#ibcon#read 4, iclass 32, count 0 2006.232.07:48:39.25#ibcon#about to read 5, iclass 32, count 0 2006.232.07:48:39.25#ibcon#read 5, iclass 32, count 0 2006.232.07:48:39.25#ibcon#about to read 6, iclass 32, count 0 2006.232.07:48:39.25#ibcon#read 6, iclass 32, count 0 2006.232.07:48:39.25#ibcon#end of sib2, iclass 32, count 0 2006.232.07:48:39.25#ibcon#*mode == 0, iclass 32, count 0 2006.232.07:48:39.25#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.232.07:48:39.25#ibcon#[26=FRQ=05,652.99\r\n] 2006.232.07:48:39.25#ibcon#*before write, iclass 32, count 0 2006.232.07:48:39.25#ibcon#enter sib2, iclass 32, count 0 2006.232.07:48:39.25#ibcon#flushed, iclass 32, count 0 2006.232.07:48:39.25#ibcon#about to write, iclass 32, count 0 2006.232.07:48:39.25#ibcon#wrote, iclass 32, count 0 2006.232.07:48:39.25#ibcon#about to read 3, iclass 32, count 0 2006.232.07:48:39.29#ibcon#read 3, iclass 32, count 0 2006.232.07:48:39.29#ibcon#about to read 4, iclass 32, count 0 2006.232.07:48:39.29#ibcon#read 4, iclass 32, count 0 2006.232.07:48:39.29#ibcon#about to read 5, iclass 32, count 0 2006.232.07:48:39.29#ibcon#read 5, iclass 32, count 0 2006.232.07:48:39.29#ibcon#about to read 6, iclass 32, count 0 2006.232.07:48:39.29#ibcon#read 6, iclass 32, count 0 2006.232.07:48:39.29#ibcon#end of sib2, iclass 32, count 0 2006.232.07:48:39.29#ibcon#*after write, iclass 32, count 0 2006.232.07:48:39.29#ibcon#*before return 0, iclass 32, count 0 2006.232.07:48:39.29#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:48:39.29#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:48:39.29#ibcon#about to clear, iclass 32 cls_cnt 0 2006.232.07:48:39.29#ibcon#cleared, iclass 32 cls_cnt 0 2006.232.07:48:39.29$vc4f8/va=5,7 2006.232.07:48:39.29#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.232.07:48:39.29#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.232.07:48:39.29#ibcon#ireg 11 cls_cnt 2 2006.232.07:48:39.29#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:48:39.35#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:48:39.35#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:48:39.35#ibcon#enter wrdev, iclass 34, count 2 2006.232.07:48:39.35#ibcon#first serial, iclass 34, count 2 2006.232.07:48:39.35#ibcon#enter sib2, iclass 34, count 2 2006.232.07:48:39.35#ibcon#flushed, iclass 34, count 2 2006.232.07:48:39.35#ibcon#about to write, iclass 34, count 2 2006.232.07:48:39.35#ibcon#wrote, iclass 34, count 2 2006.232.07:48:39.35#ibcon#about to read 3, iclass 34, count 2 2006.232.07:48:39.37#ibcon#read 3, iclass 34, count 2 2006.232.07:48:39.37#ibcon#about to read 4, iclass 34, count 2 2006.232.07:48:39.37#ibcon#read 4, iclass 34, count 2 2006.232.07:48:39.37#ibcon#about to read 5, iclass 34, count 2 2006.232.07:48:39.37#ibcon#read 5, iclass 34, count 2 2006.232.07:48:39.37#ibcon#about to read 6, iclass 34, count 2 2006.232.07:48:39.37#ibcon#read 6, iclass 34, count 2 2006.232.07:48:39.37#ibcon#end of sib2, iclass 34, count 2 2006.232.07:48:39.37#ibcon#*mode == 0, iclass 34, count 2 2006.232.07:48:39.37#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.232.07:48:39.37#ibcon#[25=AT05-07\r\n] 2006.232.07:48:39.37#ibcon#*before write, iclass 34, count 2 2006.232.07:48:39.37#ibcon#enter sib2, iclass 34, count 2 2006.232.07:48:39.37#ibcon#flushed, iclass 34, count 2 2006.232.07:48:39.37#ibcon#about to write, iclass 34, count 2 2006.232.07:48:39.37#ibcon#wrote, iclass 34, count 2 2006.232.07:48:39.37#ibcon#about to read 3, iclass 34, count 2 2006.232.07:48:39.40#ibcon#read 3, iclass 34, count 2 2006.232.07:48:39.40#ibcon#about to read 4, iclass 34, count 2 2006.232.07:48:39.40#ibcon#read 4, iclass 34, count 2 2006.232.07:48:39.40#ibcon#about to read 5, iclass 34, count 2 2006.232.07:48:39.40#ibcon#read 5, iclass 34, count 2 2006.232.07:48:39.40#ibcon#about to read 6, iclass 34, count 2 2006.232.07:48:39.40#ibcon#read 6, iclass 34, count 2 2006.232.07:48:39.40#ibcon#end of sib2, iclass 34, count 2 2006.232.07:48:39.40#ibcon#*after write, iclass 34, count 2 2006.232.07:48:39.40#ibcon#*before return 0, iclass 34, count 2 2006.232.07:48:39.40#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:48:39.40#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:48:39.40#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.232.07:48:39.40#ibcon#ireg 7 cls_cnt 0 2006.232.07:48:39.40#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:48:39.52#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:48:39.52#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:48:39.52#ibcon#enter wrdev, iclass 34, count 0 2006.232.07:48:39.52#ibcon#first serial, iclass 34, count 0 2006.232.07:48:39.52#ibcon#enter sib2, iclass 34, count 0 2006.232.07:48:39.52#ibcon#flushed, iclass 34, count 0 2006.232.07:48:39.52#ibcon#about to write, iclass 34, count 0 2006.232.07:48:39.52#ibcon#wrote, iclass 34, count 0 2006.232.07:48:39.52#ibcon#about to read 3, iclass 34, count 0 2006.232.07:48:39.54#ibcon#read 3, iclass 34, count 0 2006.232.07:48:39.54#ibcon#about to read 4, iclass 34, count 0 2006.232.07:48:39.54#ibcon#read 4, iclass 34, count 0 2006.232.07:48:39.54#ibcon#about to read 5, iclass 34, count 0 2006.232.07:48:39.54#ibcon#read 5, iclass 34, count 0 2006.232.07:48:39.54#ibcon#about to read 6, iclass 34, count 0 2006.232.07:48:39.54#ibcon#read 6, iclass 34, count 0 2006.232.07:48:39.54#ibcon#end of sib2, iclass 34, count 0 2006.232.07:48:39.54#ibcon#*mode == 0, iclass 34, count 0 2006.232.07:48:39.54#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.232.07:48:39.54#ibcon#[25=USB\r\n] 2006.232.07:48:39.54#ibcon#*before write, iclass 34, count 0 2006.232.07:48:39.54#ibcon#enter sib2, iclass 34, count 0 2006.232.07:48:39.54#ibcon#flushed, iclass 34, count 0 2006.232.07:48:39.54#ibcon#about to write, iclass 34, count 0 2006.232.07:48:39.54#ibcon#wrote, iclass 34, count 0 2006.232.07:48:39.54#ibcon#about to read 3, iclass 34, count 0 2006.232.07:48:39.57#ibcon#read 3, iclass 34, count 0 2006.232.07:48:39.57#ibcon#about to read 4, iclass 34, count 0 2006.232.07:48:39.57#ibcon#read 4, iclass 34, count 0 2006.232.07:48:39.57#ibcon#about to read 5, iclass 34, count 0 2006.232.07:48:39.57#ibcon#read 5, iclass 34, count 0 2006.232.07:48:39.57#ibcon#about to read 6, iclass 34, count 0 2006.232.07:48:39.57#ibcon#read 6, iclass 34, count 0 2006.232.07:48:39.57#ibcon#end of sib2, iclass 34, count 0 2006.232.07:48:39.57#ibcon#*after write, iclass 34, count 0 2006.232.07:48:39.57#ibcon#*before return 0, iclass 34, count 0 2006.232.07:48:39.57#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:48:39.57#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:48:39.57#ibcon#about to clear, iclass 34 cls_cnt 0 2006.232.07:48:39.57#ibcon#cleared, iclass 34 cls_cnt 0 2006.232.07:48:39.57$vc4f8/valo=6,772.99 2006.232.07:48:39.57#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.232.07:48:39.57#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.232.07:48:39.57#ibcon#ireg 17 cls_cnt 0 2006.232.07:48:39.57#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:48:39.57#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:48:39.57#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:48:39.57#ibcon#enter wrdev, iclass 36, count 0 2006.232.07:48:39.57#ibcon#first serial, iclass 36, count 0 2006.232.07:48:39.57#ibcon#enter sib2, iclass 36, count 0 2006.232.07:48:39.57#ibcon#flushed, iclass 36, count 0 2006.232.07:48:39.57#ibcon#about to write, iclass 36, count 0 2006.232.07:48:39.57#ibcon#wrote, iclass 36, count 0 2006.232.07:48:39.57#ibcon#about to read 3, iclass 36, count 0 2006.232.07:48:39.59#ibcon#read 3, iclass 36, count 0 2006.232.07:48:39.59#ibcon#about to read 4, iclass 36, count 0 2006.232.07:48:39.59#ibcon#read 4, iclass 36, count 0 2006.232.07:48:39.59#ibcon#about to read 5, iclass 36, count 0 2006.232.07:48:39.59#ibcon#read 5, iclass 36, count 0 2006.232.07:48:39.59#ibcon#about to read 6, iclass 36, count 0 2006.232.07:48:39.59#ibcon#read 6, iclass 36, count 0 2006.232.07:48:39.59#ibcon#end of sib2, iclass 36, count 0 2006.232.07:48:39.59#ibcon#*mode == 0, iclass 36, count 0 2006.232.07:48:39.59#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.232.07:48:39.59#ibcon#[26=FRQ=06,772.99\r\n] 2006.232.07:48:39.59#ibcon#*before write, iclass 36, count 0 2006.232.07:48:39.59#ibcon#enter sib2, iclass 36, count 0 2006.232.07:48:39.59#ibcon#flushed, iclass 36, count 0 2006.232.07:48:39.59#ibcon#about to write, iclass 36, count 0 2006.232.07:48:39.59#ibcon#wrote, iclass 36, count 0 2006.232.07:48:39.59#ibcon#about to read 3, iclass 36, count 0 2006.232.07:48:39.63#ibcon#read 3, iclass 36, count 0 2006.232.07:48:39.63#ibcon#about to read 4, iclass 36, count 0 2006.232.07:48:39.63#ibcon#read 4, iclass 36, count 0 2006.232.07:48:39.63#ibcon#about to read 5, iclass 36, count 0 2006.232.07:48:39.63#ibcon#read 5, iclass 36, count 0 2006.232.07:48:39.63#ibcon#about to read 6, iclass 36, count 0 2006.232.07:48:39.63#ibcon#read 6, iclass 36, count 0 2006.232.07:48:39.63#ibcon#end of sib2, iclass 36, count 0 2006.232.07:48:39.63#ibcon#*after write, iclass 36, count 0 2006.232.07:48:39.63#ibcon#*before return 0, iclass 36, count 0 2006.232.07:48:39.63#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:48:39.63#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:48:39.64#ibcon#about to clear, iclass 36 cls_cnt 0 2006.232.07:48:39.64#ibcon#cleared, iclass 36 cls_cnt 0 2006.232.07:48:39.64$vc4f8/va=6,6 2006.232.07:48:39.64#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.232.07:48:39.64#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.232.07:48:39.64#ibcon#ireg 11 cls_cnt 2 2006.232.07:48:39.64#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.232.07:48:39.68#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.232.07:48:39.68#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.232.07:48:39.68#ibcon#enter wrdev, iclass 38, count 2 2006.232.07:48:39.68#ibcon#first serial, iclass 38, count 2 2006.232.07:48:39.68#ibcon#enter sib2, iclass 38, count 2 2006.232.07:48:39.68#ibcon#flushed, iclass 38, count 2 2006.232.07:48:39.68#ibcon#about to write, iclass 38, count 2 2006.232.07:48:39.68#ibcon#wrote, iclass 38, count 2 2006.232.07:48:39.68#ibcon#about to read 3, iclass 38, count 2 2006.232.07:48:39.70#ibcon#read 3, iclass 38, count 2 2006.232.07:48:39.70#ibcon#about to read 4, iclass 38, count 2 2006.232.07:48:39.70#ibcon#read 4, iclass 38, count 2 2006.232.07:48:39.70#ibcon#about to read 5, iclass 38, count 2 2006.232.07:48:39.70#ibcon#read 5, iclass 38, count 2 2006.232.07:48:39.70#ibcon#about to read 6, iclass 38, count 2 2006.232.07:48:39.70#ibcon#read 6, iclass 38, count 2 2006.232.07:48:39.70#ibcon#end of sib2, iclass 38, count 2 2006.232.07:48:39.70#ibcon#*mode == 0, iclass 38, count 2 2006.232.07:48:39.70#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.232.07:48:39.70#ibcon#[25=AT06-06\r\n] 2006.232.07:48:39.70#ibcon#*before write, iclass 38, count 2 2006.232.07:48:39.70#ibcon#enter sib2, iclass 38, count 2 2006.232.07:48:39.70#ibcon#flushed, iclass 38, count 2 2006.232.07:48:39.70#ibcon#about to write, iclass 38, count 2 2006.232.07:48:39.70#ibcon#wrote, iclass 38, count 2 2006.232.07:48:39.70#ibcon#about to read 3, iclass 38, count 2 2006.232.07:48:39.73#ibcon#read 3, iclass 38, count 2 2006.232.07:48:39.73#ibcon#about to read 4, iclass 38, count 2 2006.232.07:48:39.73#ibcon#read 4, iclass 38, count 2 2006.232.07:48:39.73#ibcon#about to read 5, iclass 38, count 2 2006.232.07:48:39.73#ibcon#read 5, iclass 38, count 2 2006.232.07:48:39.73#ibcon#about to read 6, iclass 38, count 2 2006.232.07:48:39.73#ibcon#read 6, iclass 38, count 2 2006.232.07:48:39.73#ibcon#end of sib2, iclass 38, count 2 2006.232.07:48:39.73#ibcon#*after write, iclass 38, count 2 2006.232.07:48:39.73#ibcon#*before return 0, iclass 38, count 2 2006.232.07:48:39.73#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.232.07:48:39.73#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.232.07:48:39.73#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.232.07:48:39.73#ibcon#ireg 7 cls_cnt 0 2006.232.07:48:39.73#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.232.07:48:39.85#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.232.07:48:39.85#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.232.07:48:39.85#ibcon#enter wrdev, iclass 38, count 0 2006.232.07:48:39.85#ibcon#first serial, iclass 38, count 0 2006.232.07:48:39.85#ibcon#enter sib2, iclass 38, count 0 2006.232.07:48:39.85#ibcon#flushed, iclass 38, count 0 2006.232.07:48:39.85#ibcon#about to write, iclass 38, count 0 2006.232.07:48:39.85#ibcon#wrote, iclass 38, count 0 2006.232.07:48:39.85#ibcon#about to read 3, iclass 38, count 0 2006.232.07:48:39.87#ibcon#read 3, iclass 38, count 0 2006.232.07:48:39.87#ibcon#about to read 4, iclass 38, count 0 2006.232.07:48:39.87#ibcon#read 4, iclass 38, count 0 2006.232.07:48:39.87#ibcon#about to read 5, iclass 38, count 0 2006.232.07:48:39.87#ibcon#read 5, iclass 38, count 0 2006.232.07:48:39.87#ibcon#about to read 6, iclass 38, count 0 2006.232.07:48:39.87#ibcon#read 6, iclass 38, count 0 2006.232.07:48:39.87#ibcon#end of sib2, iclass 38, count 0 2006.232.07:48:39.87#ibcon#*mode == 0, iclass 38, count 0 2006.232.07:48:39.87#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.232.07:48:39.87#ibcon#[25=USB\r\n] 2006.232.07:48:39.87#ibcon#*before write, iclass 38, count 0 2006.232.07:48:39.87#ibcon#enter sib2, iclass 38, count 0 2006.232.07:48:39.87#ibcon#flushed, iclass 38, count 0 2006.232.07:48:39.87#ibcon#about to write, iclass 38, count 0 2006.232.07:48:39.87#ibcon#wrote, iclass 38, count 0 2006.232.07:48:39.87#ibcon#about to read 3, iclass 38, count 0 2006.232.07:48:39.90#ibcon#read 3, iclass 38, count 0 2006.232.07:48:39.90#ibcon#about to read 4, iclass 38, count 0 2006.232.07:48:39.90#ibcon#read 4, iclass 38, count 0 2006.232.07:48:39.90#ibcon#about to read 5, iclass 38, count 0 2006.232.07:48:39.90#ibcon#read 5, iclass 38, count 0 2006.232.07:48:39.90#ibcon#about to read 6, iclass 38, count 0 2006.232.07:48:39.90#ibcon#read 6, iclass 38, count 0 2006.232.07:48:39.90#ibcon#end of sib2, iclass 38, count 0 2006.232.07:48:39.90#ibcon#*after write, iclass 38, count 0 2006.232.07:48:39.90#ibcon#*before return 0, iclass 38, count 0 2006.232.07:48:39.90#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.232.07:48:39.90#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.232.07:48:39.90#ibcon#about to clear, iclass 38 cls_cnt 0 2006.232.07:48:39.90#ibcon#cleared, iclass 38 cls_cnt 0 2006.232.07:48:39.90$vc4f8/valo=7,832.99 2006.232.07:48:39.90#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.232.07:48:39.90#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.232.07:48:39.90#ibcon#ireg 17 cls_cnt 0 2006.232.07:48:39.90#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:48:39.90#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:48:39.90#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:48:39.90#ibcon#enter wrdev, iclass 40, count 0 2006.232.07:48:39.90#ibcon#first serial, iclass 40, count 0 2006.232.07:48:39.90#ibcon#enter sib2, iclass 40, count 0 2006.232.07:48:39.90#ibcon#flushed, iclass 40, count 0 2006.232.07:48:39.90#ibcon#about to write, iclass 40, count 0 2006.232.07:48:39.90#ibcon#wrote, iclass 40, count 0 2006.232.07:48:39.90#ibcon#about to read 3, iclass 40, count 0 2006.232.07:48:39.92#ibcon#read 3, iclass 40, count 0 2006.232.07:48:39.92#ibcon#about to read 4, iclass 40, count 0 2006.232.07:48:39.92#ibcon#read 4, iclass 40, count 0 2006.232.07:48:39.92#ibcon#about to read 5, iclass 40, count 0 2006.232.07:48:39.92#ibcon#read 5, iclass 40, count 0 2006.232.07:48:39.92#ibcon#about to read 6, iclass 40, count 0 2006.232.07:48:39.92#ibcon#read 6, iclass 40, count 0 2006.232.07:48:39.92#ibcon#end of sib2, iclass 40, count 0 2006.232.07:48:39.92#ibcon#*mode == 0, iclass 40, count 0 2006.232.07:48:39.92#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.232.07:48:39.92#ibcon#[26=FRQ=07,832.99\r\n] 2006.232.07:48:39.92#ibcon#*before write, iclass 40, count 0 2006.232.07:48:39.92#ibcon#enter sib2, iclass 40, count 0 2006.232.07:48:39.92#ibcon#flushed, iclass 40, count 0 2006.232.07:48:39.92#ibcon#about to write, iclass 40, count 0 2006.232.07:48:39.92#ibcon#wrote, iclass 40, count 0 2006.232.07:48:39.92#ibcon#about to read 3, iclass 40, count 0 2006.232.07:48:39.96#ibcon#read 3, iclass 40, count 0 2006.232.07:48:39.96#ibcon#about to read 4, iclass 40, count 0 2006.232.07:48:39.96#ibcon#read 4, iclass 40, count 0 2006.232.07:48:39.96#ibcon#about to read 5, iclass 40, count 0 2006.232.07:48:39.96#ibcon#read 5, iclass 40, count 0 2006.232.07:48:39.96#ibcon#about to read 6, iclass 40, count 0 2006.232.07:48:39.96#ibcon#read 6, iclass 40, count 0 2006.232.07:48:39.96#ibcon#end of sib2, iclass 40, count 0 2006.232.07:48:39.96#ibcon#*after write, iclass 40, count 0 2006.232.07:48:39.96#ibcon#*before return 0, iclass 40, count 0 2006.232.07:48:39.96#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:48:39.96#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:48:39.96#ibcon#about to clear, iclass 40 cls_cnt 0 2006.232.07:48:39.96#ibcon#cleared, iclass 40 cls_cnt 0 2006.232.07:48:39.96$vc4f8/va=7,6 2006.232.07:48:39.96#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.232.07:48:39.96#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.232.07:48:39.96#ibcon#ireg 11 cls_cnt 2 2006.232.07:48:39.96#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:48:40.02#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:48:40.02#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:48:40.02#ibcon#enter wrdev, iclass 4, count 2 2006.232.07:48:40.02#ibcon#first serial, iclass 4, count 2 2006.232.07:48:40.02#ibcon#enter sib2, iclass 4, count 2 2006.232.07:48:40.02#ibcon#flushed, iclass 4, count 2 2006.232.07:48:40.02#ibcon#about to write, iclass 4, count 2 2006.232.07:48:40.02#ibcon#wrote, iclass 4, count 2 2006.232.07:48:40.02#ibcon#about to read 3, iclass 4, count 2 2006.232.07:48:40.04#ibcon#read 3, iclass 4, count 2 2006.232.07:48:40.04#ibcon#about to read 4, iclass 4, count 2 2006.232.07:48:40.04#ibcon#read 4, iclass 4, count 2 2006.232.07:48:40.04#ibcon#about to read 5, iclass 4, count 2 2006.232.07:48:40.04#ibcon#read 5, iclass 4, count 2 2006.232.07:48:40.04#ibcon#about to read 6, iclass 4, count 2 2006.232.07:48:40.04#ibcon#read 6, iclass 4, count 2 2006.232.07:48:40.04#ibcon#end of sib2, iclass 4, count 2 2006.232.07:48:40.04#ibcon#*mode == 0, iclass 4, count 2 2006.232.07:48:40.04#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.232.07:48:40.04#ibcon#[25=AT07-06\r\n] 2006.232.07:48:40.04#ibcon#*before write, iclass 4, count 2 2006.232.07:48:40.04#ibcon#enter sib2, iclass 4, count 2 2006.232.07:48:40.04#ibcon#flushed, iclass 4, count 2 2006.232.07:48:40.04#ibcon#about to write, iclass 4, count 2 2006.232.07:48:40.04#ibcon#wrote, iclass 4, count 2 2006.232.07:48:40.04#ibcon#about to read 3, iclass 4, count 2 2006.232.07:48:40.07#ibcon#read 3, iclass 4, count 2 2006.232.07:48:40.07#ibcon#about to read 4, iclass 4, count 2 2006.232.07:48:40.07#ibcon#read 4, iclass 4, count 2 2006.232.07:48:40.07#ibcon#about to read 5, iclass 4, count 2 2006.232.07:48:40.07#ibcon#read 5, iclass 4, count 2 2006.232.07:48:40.07#ibcon#about to read 6, iclass 4, count 2 2006.232.07:48:40.07#ibcon#read 6, iclass 4, count 2 2006.232.07:48:40.07#ibcon#end of sib2, iclass 4, count 2 2006.232.07:48:40.07#ibcon#*after write, iclass 4, count 2 2006.232.07:48:40.07#ibcon#*before return 0, iclass 4, count 2 2006.232.07:48:40.07#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:48:40.07#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:48:40.07#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.232.07:48:40.07#ibcon#ireg 7 cls_cnt 0 2006.232.07:48:40.07#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:48:40.19#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:48:40.19#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:48:40.19#ibcon#enter wrdev, iclass 4, count 0 2006.232.07:48:40.19#ibcon#first serial, iclass 4, count 0 2006.232.07:48:40.19#ibcon#enter sib2, iclass 4, count 0 2006.232.07:48:40.19#ibcon#flushed, iclass 4, count 0 2006.232.07:48:40.19#ibcon#about to write, iclass 4, count 0 2006.232.07:48:40.19#ibcon#wrote, iclass 4, count 0 2006.232.07:48:40.19#ibcon#about to read 3, iclass 4, count 0 2006.232.07:48:40.21#ibcon#read 3, iclass 4, count 0 2006.232.07:48:40.21#ibcon#about to read 4, iclass 4, count 0 2006.232.07:48:40.21#ibcon#read 4, iclass 4, count 0 2006.232.07:48:40.21#ibcon#about to read 5, iclass 4, count 0 2006.232.07:48:40.21#ibcon#read 5, iclass 4, count 0 2006.232.07:48:40.21#ibcon#about to read 6, iclass 4, count 0 2006.232.07:48:40.21#ibcon#read 6, iclass 4, count 0 2006.232.07:48:40.21#ibcon#end of sib2, iclass 4, count 0 2006.232.07:48:40.21#ibcon#*mode == 0, iclass 4, count 0 2006.232.07:48:40.21#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.232.07:48:40.21#ibcon#[25=USB\r\n] 2006.232.07:48:40.21#ibcon#*before write, iclass 4, count 0 2006.232.07:48:40.21#ibcon#enter sib2, iclass 4, count 0 2006.232.07:48:40.21#ibcon#flushed, iclass 4, count 0 2006.232.07:48:40.21#ibcon#about to write, iclass 4, count 0 2006.232.07:48:40.21#ibcon#wrote, iclass 4, count 0 2006.232.07:48:40.21#ibcon#about to read 3, iclass 4, count 0 2006.232.07:48:40.24#ibcon#read 3, iclass 4, count 0 2006.232.07:48:40.24#ibcon#about to read 4, iclass 4, count 0 2006.232.07:48:40.24#ibcon#read 4, iclass 4, count 0 2006.232.07:48:40.24#ibcon#about to read 5, iclass 4, count 0 2006.232.07:48:40.24#ibcon#read 5, iclass 4, count 0 2006.232.07:48:40.24#ibcon#about to read 6, iclass 4, count 0 2006.232.07:48:40.24#ibcon#read 6, iclass 4, count 0 2006.232.07:48:40.24#ibcon#end of sib2, iclass 4, count 0 2006.232.07:48:40.24#ibcon#*after write, iclass 4, count 0 2006.232.07:48:40.24#ibcon#*before return 0, iclass 4, count 0 2006.232.07:48:40.24#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:48:40.24#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:48:40.24#ibcon#about to clear, iclass 4 cls_cnt 0 2006.232.07:48:40.24#ibcon#cleared, iclass 4 cls_cnt 0 2006.232.07:48:40.24$vc4f8/valo=8,852.99 2006.232.07:48:40.24#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.232.07:48:40.24#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.232.07:48:40.24#ibcon#ireg 17 cls_cnt 0 2006.232.07:48:40.24#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:48:40.24#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:48:40.24#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:48:40.24#ibcon#enter wrdev, iclass 6, count 0 2006.232.07:48:40.24#ibcon#first serial, iclass 6, count 0 2006.232.07:48:40.24#ibcon#enter sib2, iclass 6, count 0 2006.232.07:48:40.24#ibcon#flushed, iclass 6, count 0 2006.232.07:48:40.24#ibcon#about to write, iclass 6, count 0 2006.232.07:48:40.24#ibcon#wrote, iclass 6, count 0 2006.232.07:48:40.24#ibcon#about to read 3, iclass 6, count 0 2006.232.07:48:40.26#ibcon#read 3, iclass 6, count 0 2006.232.07:48:40.26#ibcon#about to read 4, iclass 6, count 0 2006.232.07:48:40.26#ibcon#read 4, iclass 6, count 0 2006.232.07:48:40.26#ibcon#about to read 5, iclass 6, count 0 2006.232.07:48:40.26#ibcon#read 5, iclass 6, count 0 2006.232.07:48:40.26#ibcon#about to read 6, iclass 6, count 0 2006.232.07:48:40.26#ibcon#read 6, iclass 6, count 0 2006.232.07:48:40.26#ibcon#end of sib2, iclass 6, count 0 2006.232.07:48:40.26#ibcon#*mode == 0, iclass 6, count 0 2006.232.07:48:40.26#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.232.07:48:40.26#ibcon#[26=FRQ=08,852.99\r\n] 2006.232.07:48:40.26#ibcon#*before write, iclass 6, count 0 2006.232.07:48:40.26#ibcon#enter sib2, iclass 6, count 0 2006.232.07:48:40.26#ibcon#flushed, iclass 6, count 0 2006.232.07:48:40.26#ibcon#about to write, iclass 6, count 0 2006.232.07:48:40.26#ibcon#wrote, iclass 6, count 0 2006.232.07:48:40.26#ibcon#about to read 3, iclass 6, count 0 2006.232.07:48:40.30#ibcon#read 3, iclass 6, count 0 2006.232.07:48:40.30#ibcon#about to read 4, iclass 6, count 0 2006.232.07:48:40.30#ibcon#read 4, iclass 6, count 0 2006.232.07:48:40.30#ibcon#about to read 5, iclass 6, count 0 2006.232.07:48:40.30#ibcon#read 5, iclass 6, count 0 2006.232.07:48:40.30#ibcon#about to read 6, iclass 6, count 0 2006.232.07:48:40.30#ibcon#read 6, iclass 6, count 0 2006.232.07:48:40.30#ibcon#end of sib2, iclass 6, count 0 2006.232.07:48:40.30#ibcon#*after write, iclass 6, count 0 2006.232.07:48:40.30#ibcon#*before return 0, iclass 6, count 0 2006.232.07:48:40.30#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:48:40.30#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:48:40.30#ibcon#about to clear, iclass 6 cls_cnt 0 2006.232.07:48:40.30#ibcon#cleared, iclass 6 cls_cnt 0 2006.232.07:48:40.30$vc4f8/va=8,6 2006.232.07:48:40.30#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.232.07:48:40.30#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.232.07:48:40.30#ibcon#ireg 11 cls_cnt 2 2006.232.07:48:40.30#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.232.07:48:40.36#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.232.07:48:40.36#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.232.07:48:40.36#ibcon#enter wrdev, iclass 10, count 2 2006.232.07:48:40.36#ibcon#first serial, iclass 10, count 2 2006.232.07:48:40.36#ibcon#enter sib2, iclass 10, count 2 2006.232.07:48:40.36#ibcon#flushed, iclass 10, count 2 2006.232.07:48:40.36#ibcon#about to write, iclass 10, count 2 2006.232.07:48:40.36#ibcon#wrote, iclass 10, count 2 2006.232.07:48:40.36#ibcon#about to read 3, iclass 10, count 2 2006.232.07:48:40.39#ibcon#read 3, iclass 10, count 2 2006.232.07:48:40.39#ibcon#about to read 4, iclass 10, count 2 2006.232.07:48:40.39#ibcon#read 4, iclass 10, count 2 2006.232.07:48:40.39#ibcon#about to read 5, iclass 10, count 2 2006.232.07:48:40.39#ibcon#read 5, iclass 10, count 2 2006.232.07:48:40.39#ibcon#about to read 6, iclass 10, count 2 2006.232.07:48:40.39#ibcon#read 6, iclass 10, count 2 2006.232.07:48:40.39#ibcon#end of sib2, iclass 10, count 2 2006.232.07:48:40.39#ibcon#*mode == 0, iclass 10, count 2 2006.232.07:48:40.39#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.232.07:48:40.39#ibcon#[25=AT08-06\r\n] 2006.232.07:48:40.39#ibcon#*before write, iclass 10, count 2 2006.232.07:48:40.39#ibcon#enter sib2, iclass 10, count 2 2006.232.07:48:40.39#ibcon#flushed, iclass 10, count 2 2006.232.07:48:40.39#ibcon#about to write, iclass 10, count 2 2006.232.07:48:40.39#ibcon#wrote, iclass 10, count 2 2006.232.07:48:40.39#ibcon#about to read 3, iclass 10, count 2 2006.232.07:48:40.42#ibcon#read 3, iclass 10, count 2 2006.232.07:48:40.42#ibcon#about to read 4, iclass 10, count 2 2006.232.07:48:40.42#ibcon#read 4, iclass 10, count 2 2006.232.07:48:40.42#ibcon#about to read 5, iclass 10, count 2 2006.232.07:48:40.42#ibcon#read 5, iclass 10, count 2 2006.232.07:48:40.42#ibcon#about to read 6, iclass 10, count 2 2006.232.07:48:40.42#ibcon#read 6, iclass 10, count 2 2006.232.07:48:40.42#ibcon#end of sib2, iclass 10, count 2 2006.232.07:48:40.42#ibcon#*after write, iclass 10, count 2 2006.232.07:48:40.42#ibcon#*before return 0, iclass 10, count 2 2006.232.07:48:40.42#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.232.07:48:40.42#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.232.07:48:40.42#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.232.07:48:40.42#ibcon#ireg 7 cls_cnt 0 2006.232.07:48:40.42#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.232.07:48:40.54#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.232.07:48:40.54#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.232.07:48:40.54#ibcon#enter wrdev, iclass 10, count 0 2006.232.07:48:40.54#ibcon#first serial, iclass 10, count 0 2006.232.07:48:40.54#ibcon#enter sib2, iclass 10, count 0 2006.232.07:48:40.54#ibcon#flushed, iclass 10, count 0 2006.232.07:48:40.54#ibcon#about to write, iclass 10, count 0 2006.232.07:48:40.54#ibcon#wrote, iclass 10, count 0 2006.232.07:48:40.54#ibcon#about to read 3, iclass 10, count 0 2006.232.07:48:40.56#ibcon#read 3, iclass 10, count 0 2006.232.07:48:40.56#ibcon#about to read 4, iclass 10, count 0 2006.232.07:48:40.56#ibcon#read 4, iclass 10, count 0 2006.232.07:48:40.56#ibcon#about to read 5, iclass 10, count 0 2006.232.07:48:40.56#ibcon#read 5, iclass 10, count 0 2006.232.07:48:40.56#ibcon#about to read 6, iclass 10, count 0 2006.232.07:48:40.56#ibcon#read 6, iclass 10, count 0 2006.232.07:48:40.56#ibcon#end of sib2, iclass 10, count 0 2006.232.07:48:40.56#ibcon#*mode == 0, iclass 10, count 0 2006.232.07:48:40.56#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.232.07:48:40.56#ibcon#[25=USB\r\n] 2006.232.07:48:40.56#ibcon#*before write, iclass 10, count 0 2006.232.07:48:40.56#ibcon#enter sib2, iclass 10, count 0 2006.232.07:48:40.56#ibcon#flushed, iclass 10, count 0 2006.232.07:48:40.56#ibcon#about to write, iclass 10, count 0 2006.232.07:48:40.56#ibcon#wrote, iclass 10, count 0 2006.232.07:48:40.56#ibcon#about to read 3, iclass 10, count 0 2006.232.07:48:40.59#ibcon#read 3, iclass 10, count 0 2006.232.07:48:40.59#ibcon#about to read 4, iclass 10, count 0 2006.232.07:48:40.59#ibcon#read 4, iclass 10, count 0 2006.232.07:48:40.59#ibcon#about to read 5, iclass 10, count 0 2006.232.07:48:40.59#ibcon#read 5, iclass 10, count 0 2006.232.07:48:40.59#ibcon#about to read 6, iclass 10, count 0 2006.232.07:48:40.59#ibcon#read 6, iclass 10, count 0 2006.232.07:48:40.59#ibcon#end of sib2, iclass 10, count 0 2006.232.07:48:40.59#ibcon#*after write, iclass 10, count 0 2006.232.07:48:40.59#ibcon#*before return 0, iclass 10, count 0 2006.232.07:48:40.59#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.232.07:48:40.59#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.232.07:48:40.59#ibcon#about to clear, iclass 10 cls_cnt 0 2006.232.07:48:40.59#ibcon#cleared, iclass 10 cls_cnt 0 2006.232.07:48:40.59$vc4f8/vblo=1,632.99 2006.232.07:48:40.59#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.232.07:48:40.59#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.232.07:48:40.59#ibcon#ireg 17 cls_cnt 0 2006.232.07:48:40.59#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.232.07:48:40.59#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.232.07:48:40.59#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.232.07:48:40.59#ibcon#enter wrdev, iclass 12, count 0 2006.232.07:48:40.59#ibcon#first serial, iclass 12, count 0 2006.232.07:48:40.59#ibcon#enter sib2, iclass 12, count 0 2006.232.07:48:40.59#ibcon#flushed, iclass 12, count 0 2006.232.07:48:40.59#ibcon#about to write, iclass 12, count 0 2006.232.07:48:40.59#ibcon#wrote, iclass 12, count 0 2006.232.07:48:40.59#ibcon#about to read 3, iclass 12, count 0 2006.232.07:48:40.61#ibcon#read 3, iclass 12, count 0 2006.232.07:48:40.61#ibcon#about to read 4, iclass 12, count 0 2006.232.07:48:40.61#ibcon#read 4, iclass 12, count 0 2006.232.07:48:40.61#ibcon#about to read 5, iclass 12, count 0 2006.232.07:48:40.61#ibcon#read 5, iclass 12, count 0 2006.232.07:48:40.61#ibcon#about to read 6, iclass 12, count 0 2006.232.07:48:40.61#ibcon#read 6, iclass 12, count 0 2006.232.07:48:40.61#ibcon#end of sib2, iclass 12, count 0 2006.232.07:48:40.61#ibcon#*mode == 0, iclass 12, count 0 2006.232.07:48:40.61#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.232.07:48:40.61#ibcon#[28=FRQ=01,632.99\r\n] 2006.232.07:48:40.61#ibcon#*before write, iclass 12, count 0 2006.232.07:48:40.61#ibcon#enter sib2, iclass 12, count 0 2006.232.07:48:40.61#ibcon#flushed, iclass 12, count 0 2006.232.07:48:40.61#ibcon#about to write, iclass 12, count 0 2006.232.07:48:40.61#ibcon#wrote, iclass 12, count 0 2006.232.07:48:40.61#ibcon#about to read 3, iclass 12, count 0 2006.232.07:48:40.65#ibcon#read 3, iclass 12, count 0 2006.232.07:48:40.65#ibcon#about to read 4, iclass 12, count 0 2006.232.07:48:40.65#ibcon#read 4, iclass 12, count 0 2006.232.07:48:40.65#ibcon#about to read 5, iclass 12, count 0 2006.232.07:48:40.65#ibcon#read 5, iclass 12, count 0 2006.232.07:48:40.65#ibcon#about to read 6, iclass 12, count 0 2006.232.07:48:40.65#ibcon#read 6, iclass 12, count 0 2006.232.07:48:40.65#ibcon#end of sib2, iclass 12, count 0 2006.232.07:48:40.65#ibcon#*after write, iclass 12, count 0 2006.232.07:48:40.65#ibcon#*before return 0, iclass 12, count 0 2006.232.07:48:40.65#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.232.07:48:40.65#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.232.07:48:40.65#ibcon#about to clear, iclass 12 cls_cnt 0 2006.232.07:48:40.65#ibcon#cleared, iclass 12 cls_cnt 0 2006.232.07:48:40.65$vc4f8/vb=1,4 2006.232.07:48:40.65#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.232.07:48:40.65#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.232.07:48:40.65#ibcon#ireg 11 cls_cnt 2 2006.232.07:48:40.65#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.232.07:48:40.65#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.232.07:48:40.65#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.232.07:48:40.65#ibcon#enter wrdev, iclass 14, count 2 2006.232.07:48:40.65#ibcon#first serial, iclass 14, count 2 2006.232.07:48:40.65#ibcon#enter sib2, iclass 14, count 2 2006.232.07:48:40.65#ibcon#flushed, iclass 14, count 2 2006.232.07:48:40.65#ibcon#about to write, iclass 14, count 2 2006.232.07:48:40.65#ibcon#wrote, iclass 14, count 2 2006.232.07:48:40.65#ibcon#about to read 3, iclass 14, count 2 2006.232.07:48:40.67#ibcon#read 3, iclass 14, count 2 2006.232.07:48:40.67#ibcon#about to read 4, iclass 14, count 2 2006.232.07:48:40.67#ibcon#read 4, iclass 14, count 2 2006.232.07:48:40.67#ibcon#about to read 5, iclass 14, count 2 2006.232.07:48:40.67#ibcon#read 5, iclass 14, count 2 2006.232.07:48:40.67#ibcon#about to read 6, iclass 14, count 2 2006.232.07:48:40.67#ibcon#read 6, iclass 14, count 2 2006.232.07:48:40.67#ibcon#end of sib2, iclass 14, count 2 2006.232.07:48:40.67#ibcon#*mode == 0, iclass 14, count 2 2006.232.07:48:40.67#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.232.07:48:40.67#ibcon#[27=AT01-04\r\n] 2006.232.07:48:40.67#ibcon#*before write, iclass 14, count 2 2006.232.07:48:40.67#ibcon#enter sib2, iclass 14, count 2 2006.232.07:48:40.67#ibcon#flushed, iclass 14, count 2 2006.232.07:48:40.67#ibcon#about to write, iclass 14, count 2 2006.232.07:48:40.67#ibcon#wrote, iclass 14, count 2 2006.232.07:48:40.67#ibcon#about to read 3, iclass 14, count 2 2006.232.07:48:40.70#ibcon#read 3, iclass 14, count 2 2006.232.07:48:40.70#ibcon#about to read 4, iclass 14, count 2 2006.232.07:48:40.70#ibcon#read 4, iclass 14, count 2 2006.232.07:48:40.70#ibcon#about to read 5, iclass 14, count 2 2006.232.07:48:40.70#ibcon#read 5, iclass 14, count 2 2006.232.07:48:40.70#ibcon#about to read 6, iclass 14, count 2 2006.232.07:48:40.70#ibcon#read 6, iclass 14, count 2 2006.232.07:48:40.70#ibcon#end of sib2, iclass 14, count 2 2006.232.07:48:40.70#ibcon#*after write, iclass 14, count 2 2006.232.07:48:40.70#ibcon#*before return 0, iclass 14, count 2 2006.232.07:48:40.70#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.232.07:48:40.70#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.232.07:48:40.70#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.232.07:48:40.70#ibcon#ireg 7 cls_cnt 0 2006.232.07:48:40.70#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.232.07:48:40.82#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.232.07:48:40.82#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.232.07:48:40.82#ibcon#enter wrdev, iclass 14, count 0 2006.232.07:48:40.82#ibcon#first serial, iclass 14, count 0 2006.232.07:48:40.82#ibcon#enter sib2, iclass 14, count 0 2006.232.07:48:40.82#ibcon#flushed, iclass 14, count 0 2006.232.07:48:40.82#ibcon#about to write, iclass 14, count 0 2006.232.07:48:40.82#ibcon#wrote, iclass 14, count 0 2006.232.07:48:40.82#ibcon#about to read 3, iclass 14, count 0 2006.232.07:48:40.84#ibcon#read 3, iclass 14, count 0 2006.232.07:48:40.84#ibcon#about to read 4, iclass 14, count 0 2006.232.07:48:40.84#ibcon#read 4, iclass 14, count 0 2006.232.07:48:40.84#ibcon#about to read 5, iclass 14, count 0 2006.232.07:48:40.84#ibcon#read 5, iclass 14, count 0 2006.232.07:48:40.84#ibcon#about to read 6, iclass 14, count 0 2006.232.07:48:40.84#ibcon#read 6, iclass 14, count 0 2006.232.07:48:40.84#ibcon#end of sib2, iclass 14, count 0 2006.232.07:48:40.84#ibcon#*mode == 0, iclass 14, count 0 2006.232.07:48:40.84#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.232.07:48:40.84#ibcon#[27=USB\r\n] 2006.232.07:48:40.84#ibcon#*before write, iclass 14, count 0 2006.232.07:48:40.84#ibcon#enter sib2, iclass 14, count 0 2006.232.07:48:40.84#ibcon#flushed, iclass 14, count 0 2006.232.07:48:40.84#ibcon#about to write, iclass 14, count 0 2006.232.07:48:40.84#ibcon#wrote, iclass 14, count 0 2006.232.07:48:40.84#ibcon#about to read 3, iclass 14, count 0 2006.232.07:48:40.87#ibcon#read 3, iclass 14, count 0 2006.232.07:48:40.87#ibcon#about to read 4, iclass 14, count 0 2006.232.07:48:40.87#ibcon#read 4, iclass 14, count 0 2006.232.07:48:40.87#ibcon#about to read 5, iclass 14, count 0 2006.232.07:48:40.87#ibcon#read 5, iclass 14, count 0 2006.232.07:48:40.87#ibcon#about to read 6, iclass 14, count 0 2006.232.07:48:40.87#ibcon#read 6, iclass 14, count 0 2006.232.07:48:40.87#ibcon#end of sib2, iclass 14, count 0 2006.232.07:48:40.87#ibcon#*after write, iclass 14, count 0 2006.232.07:48:40.87#ibcon#*before return 0, iclass 14, count 0 2006.232.07:48:40.87#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.232.07:48:40.87#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.232.07:48:40.87#ibcon#about to clear, iclass 14 cls_cnt 0 2006.232.07:48:40.87#ibcon#cleared, iclass 14 cls_cnt 0 2006.232.07:48:40.87$vc4f8/vblo=2,640.99 2006.232.07:48:40.87#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.232.07:48:40.87#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.232.07:48:40.87#ibcon#ireg 17 cls_cnt 0 2006.232.07:48:40.87#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:48:40.87#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:48:40.87#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:48:40.87#ibcon#enter wrdev, iclass 16, count 0 2006.232.07:48:40.87#ibcon#first serial, iclass 16, count 0 2006.232.07:48:40.87#ibcon#enter sib2, iclass 16, count 0 2006.232.07:48:40.87#ibcon#flushed, iclass 16, count 0 2006.232.07:48:40.87#ibcon#about to write, iclass 16, count 0 2006.232.07:48:40.87#ibcon#wrote, iclass 16, count 0 2006.232.07:48:40.87#ibcon#about to read 3, iclass 16, count 0 2006.232.07:48:40.89#ibcon#read 3, iclass 16, count 0 2006.232.07:48:40.89#ibcon#about to read 4, iclass 16, count 0 2006.232.07:48:40.89#ibcon#read 4, iclass 16, count 0 2006.232.07:48:40.89#ibcon#about to read 5, iclass 16, count 0 2006.232.07:48:40.89#ibcon#read 5, iclass 16, count 0 2006.232.07:48:40.89#ibcon#about to read 6, iclass 16, count 0 2006.232.07:48:40.89#ibcon#read 6, iclass 16, count 0 2006.232.07:48:40.89#ibcon#end of sib2, iclass 16, count 0 2006.232.07:48:40.89#ibcon#*mode == 0, iclass 16, count 0 2006.232.07:48:40.89#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.232.07:48:40.89#ibcon#[28=FRQ=02,640.99\r\n] 2006.232.07:48:40.89#ibcon#*before write, iclass 16, count 0 2006.232.07:48:40.89#ibcon#enter sib2, iclass 16, count 0 2006.232.07:48:40.89#ibcon#flushed, iclass 16, count 0 2006.232.07:48:40.89#ibcon#about to write, iclass 16, count 0 2006.232.07:48:40.89#ibcon#wrote, iclass 16, count 0 2006.232.07:48:40.89#ibcon#about to read 3, iclass 16, count 0 2006.232.07:48:40.93#ibcon#read 3, iclass 16, count 0 2006.232.07:48:40.93#ibcon#about to read 4, iclass 16, count 0 2006.232.07:48:40.93#ibcon#read 4, iclass 16, count 0 2006.232.07:48:40.93#ibcon#about to read 5, iclass 16, count 0 2006.232.07:48:40.93#ibcon#read 5, iclass 16, count 0 2006.232.07:48:40.93#ibcon#about to read 6, iclass 16, count 0 2006.232.07:48:40.93#ibcon#read 6, iclass 16, count 0 2006.232.07:48:40.93#ibcon#end of sib2, iclass 16, count 0 2006.232.07:48:40.93#ibcon#*after write, iclass 16, count 0 2006.232.07:48:40.93#ibcon#*before return 0, iclass 16, count 0 2006.232.07:48:40.93#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:48:40.93#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:48:40.93#ibcon#about to clear, iclass 16 cls_cnt 0 2006.232.07:48:40.93#ibcon#cleared, iclass 16 cls_cnt 0 2006.232.07:48:40.93$vc4f8/vb=2,4 2006.232.07:48:40.93#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.232.07:48:40.93#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.232.07:48:40.93#ibcon#ireg 11 cls_cnt 2 2006.232.07:48:40.93#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:48:40.99#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:48:40.99#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:48:40.99#ibcon#enter wrdev, iclass 18, count 2 2006.232.07:48:40.99#ibcon#first serial, iclass 18, count 2 2006.232.07:48:40.99#ibcon#enter sib2, iclass 18, count 2 2006.232.07:48:40.99#ibcon#flushed, iclass 18, count 2 2006.232.07:48:40.99#ibcon#about to write, iclass 18, count 2 2006.232.07:48:40.99#ibcon#wrote, iclass 18, count 2 2006.232.07:48:40.99#ibcon#about to read 3, iclass 18, count 2 2006.232.07:48:41.01#ibcon#read 3, iclass 18, count 2 2006.232.07:48:41.01#ibcon#about to read 4, iclass 18, count 2 2006.232.07:48:41.01#ibcon#read 4, iclass 18, count 2 2006.232.07:48:41.01#ibcon#about to read 5, iclass 18, count 2 2006.232.07:48:41.01#ibcon#read 5, iclass 18, count 2 2006.232.07:48:41.01#ibcon#about to read 6, iclass 18, count 2 2006.232.07:48:41.01#ibcon#read 6, iclass 18, count 2 2006.232.07:48:41.01#ibcon#end of sib2, iclass 18, count 2 2006.232.07:48:41.01#ibcon#*mode == 0, iclass 18, count 2 2006.232.07:48:41.01#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.232.07:48:41.01#ibcon#[27=AT02-04\r\n] 2006.232.07:48:41.01#ibcon#*before write, iclass 18, count 2 2006.232.07:48:41.01#ibcon#enter sib2, iclass 18, count 2 2006.232.07:48:41.01#ibcon#flushed, iclass 18, count 2 2006.232.07:48:41.01#ibcon#about to write, iclass 18, count 2 2006.232.07:48:41.01#ibcon#wrote, iclass 18, count 2 2006.232.07:48:41.01#ibcon#about to read 3, iclass 18, count 2 2006.232.07:48:41.04#ibcon#read 3, iclass 18, count 2 2006.232.07:48:41.04#ibcon#about to read 4, iclass 18, count 2 2006.232.07:48:41.04#ibcon#read 4, iclass 18, count 2 2006.232.07:48:41.04#ibcon#about to read 5, iclass 18, count 2 2006.232.07:48:41.04#ibcon#read 5, iclass 18, count 2 2006.232.07:48:41.04#ibcon#about to read 6, iclass 18, count 2 2006.232.07:48:41.04#ibcon#read 6, iclass 18, count 2 2006.232.07:48:41.04#ibcon#end of sib2, iclass 18, count 2 2006.232.07:48:41.04#ibcon#*after write, iclass 18, count 2 2006.232.07:48:41.04#ibcon#*before return 0, iclass 18, count 2 2006.232.07:48:41.04#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:48:41.04#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:48:41.04#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.232.07:48:41.04#ibcon#ireg 7 cls_cnt 0 2006.232.07:48:41.04#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:48:41.16#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:48:41.16#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:48:41.16#ibcon#enter wrdev, iclass 18, count 0 2006.232.07:48:41.16#ibcon#first serial, iclass 18, count 0 2006.232.07:48:41.16#ibcon#enter sib2, iclass 18, count 0 2006.232.07:48:41.16#ibcon#flushed, iclass 18, count 0 2006.232.07:48:41.16#ibcon#about to write, iclass 18, count 0 2006.232.07:48:41.16#ibcon#wrote, iclass 18, count 0 2006.232.07:48:41.16#ibcon#about to read 3, iclass 18, count 0 2006.232.07:48:41.18#ibcon#read 3, iclass 18, count 0 2006.232.07:48:41.18#ibcon#about to read 4, iclass 18, count 0 2006.232.07:48:41.18#ibcon#read 4, iclass 18, count 0 2006.232.07:48:41.18#ibcon#about to read 5, iclass 18, count 0 2006.232.07:48:41.18#ibcon#read 5, iclass 18, count 0 2006.232.07:48:41.18#ibcon#about to read 6, iclass 18, count 0 2006.232.07:48:41.18#ibcon#read 6, iclass 18, count 0 2006.232.07:48:41.18#ibcon#end of sib2, iclass 18, count 0 2006.232.07:48:41.18#ibcon#*mode == 0, iclass 18, count 0 2006.232.07:48:41.18#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.232.07:48:41.18#ibcon#[27=USB\r\n] 2006.232.07:48:41.18#ibcon#*before write, iclass 18, count 0 2006.232.07:48:41.18#ibcon#enter sib2, iclass 18, count 0 2006.232.07:48:41.18#ibcon#flushed, iclass 18, count 0 2006.232.07:48:41.18#ibcon#about to write, iclass 18, count 0 2006.232.07:48:41.18#ibcon#wrote, iclass 18, count 0 2006.232.07:48:41.18#ibcon#about to read 3, iclass 18, count 0 2006.232.07:48:41.21#ibcon#read 3, iclass 18, count 0 2006.232.07:48:41.21#ibcon#about to read 4, iclass 18, count 0 2006.232.07:48:41.21#ibcon#read 4, iclass 18, count 0 2006.232.07:48:41.21#ibcon#about to read 5, iclass 18, count 0 2006.232.07:48:41.21#ibcon#read 5, iclass 18, count 0 2006.232.07:48:41.21#ibcon#about to read 6, iclass 18, count 0 2006.232.07:48:41.21#ibcon#read 6, iclass 18, count 0 2006.232.07:48:41.21#ibcon#end of sib2, iclass 18, count 0 2006.232.07:48:41.21#ibcon#*after write, iclass 18, count 0 2006.232.07:48:41.21#ibcon#*before return 0, iclass 18, count 0 2006.232.07:48:41.21#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:48:41.21#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:48:41.21#ibcon#about to clear, iclass 18 cls_cnt 0 2006.232.07:48:41.21#ibcon#cleared, iclass 18 cls_cnt 0 2006.232.07:48:41.21$vc4f8/vblo=3,656.99 2006.232.07:48:41.22#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.232.07:48:41.22#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.232.07:48:41.22#ibcon#ireg 17 cls_cnt 0 2006.232.07:48:41.22#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:48:41.22#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:48:41.22#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:48:41.22#ibcon#enter wrdev, iclass 20, count 0 2006.232.07:48:41.22#ibcon#first serial, iclass 20, count 0 2006.232.07:48:41.22#ibcon#enter sib2, iclass 20, count 0 2006.232.07:48:41.22#ibcon#flushed, iclass 20, count 0 2006.232.07:48:41.22#ibcon#about to write, iclass 20, count 0 2006.232.07:48:41.22#ibcon#wrote, iclass 20, count 0 2006.232.07:48:41.22#ibcon#about to read 3, iclass 20, count 0 2006.232.07:48:41.23#ibcon#read 3, iclass 20, count 0 2006.232.07:48:41.23#ibcon#about to read 4, iclass 20, count 0 2006.232.07:48:41.23#ibcon#read 4, iclass 20, count 0 2006.232.07:48:41.23#ibcon#about to read 5, iclass 20, count 0 2006.232.07:48:41.23#ibcon#read 5, iclass 20, count 0 2006.232.07:48:41.23#ibcon#about to read 6, iclass 20, count 0 2006.232.07:48:41.23#ibcon#read 6, iclass 20, count 0 2006.232.07:48:41.23#ibcon#end of sib2, iclass 20, count 0 2006.232.07:48:41.23#ibcon#*mode == 0, iclass 20, count 0 2006.232.07:48:41.23#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.232.07:48:41.23#ibcon#[28=FRQ=03,656.99\r\n] 2006.232.07:48:41.23#ibcon#*before write, iclass 20, count 0 2006.232.07:48:41.23#ibcon#enter sib2, iclass 20, count 0 2006.232.07:48:41.23#ibcon#flushed, iclass 20, count 0 2006.232.07:48:41.23#ibcon#about to write, iclass 20, count 0 2006.232.07:48:41.23#ibcon#wrote, iclass 20, count 0 2006.232.07:48:41.23#ibcon#about to read 3, iclass 20, count 0 2006.232.07:48:41.27#ibcon#read 3, iclass 20, count 0 2006.232.07:48:41.27#ibcon#about to read 4, iclass 20, count 0 2006.232.07:48:41.27#ibcon#read 4, iclass 20, count 0 2006.232.07:48:41.27#ibcon#about to read 5, iclass 20, count 0 2006.232.07:48:41.27#ibcon#read 5, iclass 20, count 0 2006.232.07:48:41.27#ibcon#about to read 6, iclass 20, count 0 2006.232.07:48:41.27#ibcon#read 6, iclass 20, count 0 2006.232.07:48:41.27#ibcon#end of sib2, iclass 20, count 0 2006.232.07:48:41.27#ibcon#*after write, iclass 20, count 0 2006.232.07:48:41.27#ibcon#*before return 0, iclass 20, count 0 2006.232.07:48:41.27#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:48:41.27#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:48:41.27#ibcon#about to clear, iclass 20 cls_cnt 0 2006.232.07:48:41.27#ibcon#cleared, iclass 20 cls_cnt 0 2006.232.07:48:41.27$vc4f8/vb=3,4 2006.232.07:48:41.27#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.232.07:48:41.27#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.232.07:48:41.27#ibcon#ireg 11 cls_cnt 2 2006.232.07:48:41.27#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:48:41.33#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:48:41.33#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:48:41.33#ibcon#enter wrdev, iclass 22, count 2 2006.232.07:48:41.33#ibcon#first serial, iclass 22, count 2 2006.232.07:48:41.33#ibcon#enter sib2, iclass 22, count 2 2006.232.07:48:41.33#ibcon#flushed, iclass 22, count 2 2006.232.07:48:41.33#ibcon#about to write, iclass 22, count 2 2006.232.07:48:41.33#ibcon#wrote, iclass 22, count 2 2006.232.07:48:41.33#ibcon#about to read 3, iclass 22, count 2 2006.232.07:48:41.35#ibcon#read 3, iclass 22, count 2 2006.232.07:48:41.35#ibcon#about to read 4, iclass 22, count 2 2006.232.07:48:41.35#ibcon#read 4, iclass 22, count 2 2006.232.07:48:41.35#ibcon#about to read 5, iclass 22, count 2 2006.232.07:48:41.35#ibcon#read 5, iclass 22, count 2 2006.232.07:48:41.35#ibcon#about to read 6, iclass 22, count 2 2006.232.07:48:41.35#ibcon#read 6, iclass 22, count 2 2006.232.07:48:41.35#ibcon#end of sib2, iclass 22, count 2 2006.232.07:48:41.35#ibcon#*mode == 0, iclass 22, count 2 2006.232.07:48:41.35#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.232.07:48:41.35#ibcon#[27=AT03-04\r\n] 2006.232.07:48:41.35#ibcon#*before write, iclass 22, count 2 2006.232.07:48:41.35#ibcon#enter sib2, iclass 22, count 2 2006.232.07:48:41.35#ibcon#flushed, iclass 22, count 2 2006.232.07:48:41.35#ibcon#about to write, iclass 22, count 2 2006.232.07:48:41.35#ibcon#wrote, iclass 22, count 2 2006.232.07:48:41.35#ibcon#about to read 3, iclass 22, count 2 2006.232.07:48:41.38#ibcon#read 3, iclass 22, count 2 2006.232.07:48:41.38#ibcon#about to read 4, iclass 22, count 2 2006.232.07:48:41.38#ibcon#read 4, iclass 22, count 2 2006.232.07:48:41.38#ibcon#about to read 5, iclass 22, count 2 2006.232.07:48:41.38#ibcon#read 5, iclass 22, count 2 2006.232.07:48:41.38#ibcon#about to read 6, iclass 22, count 2 2006.232.07:48:41.38#ibcon#read 6, iclass 22, count 2 2006.232.07:48:41.38#ibcon#end of sib2, iclass 22, count 2 2006.232.07:48:41.38#ibcon#*after write, iclass 22, count 2 2006.232.07:48:41.38#ibcon#*before return 0, iclass 22, count 2 2006.232.07:48:41.38#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:48:41.38#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:48:41.38#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.232.07:48:41.38#ibcon#ireg 7 cls_cnt 0 2006.232.07:48:41.38#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:48:41.50#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:48:41.50#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:48:41.50#ibcon#enter wrdev, iclass 22, count 0 2006.232.07:48:41.50#ibcon#first serial, iclass 22, count 0 2006.232.07:48:41.50#ibcon#enter sib2, iclass 22, count 0 2006.232.07:48:41.50#ibcon#flushed, iclass 22, count 0 2006.232.07:48:41.50#ibcon#about to write, iclass 22, count 0 2006.232.07:48:41.50#ibcon#wrote, iclass 22, count 0 2006.232.07:48:41.50#ibcon#about to read 3, iclass 22, count 0 2006.232.07:48:41.52#ibcon#read 3, iclass 22, count 0 2006.232.07:48:41.52#ibcon#about to read 4, iclass 22, count 0 2006.232.07:48:41.52#ibcon#read 4, iclass 22, count 0 2006.232.07:48:41.52#ibcon#about to read 5, iclass 22, count 0 2006.232.07:48:41.52#ibcon#read 5, iclass 22, count 0 2006.232.07:48:41.52#ibcon#about to read 6, iclass 22, count 0 2006.232.07:48:41.52#ibcon#read 6, iclass 22, count 0 2006.232.07:48:41.52#ibcon#end of sib2, iclass 22, count 0 2006.232.07:48:41.52#ibcon#*mode == 0, iclass 22, count 0 2006.232.07:48:41.52#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.232.07:48:41.52#ibcon#[27=USB\r\n] 2006.232.07:48:41.52#ibcon#*before write, iclass 22, count 0 2006.232.07:48:41.52#ibcon#enter sib2, iclass 22, count 0 2006.232.07:48:41.52#ibcon#flushed, iclass 22, count 0 2006.232.07:48:41.52#ibcon#about to write, iclass 22, count 0 2006.232.07:48:41.52#ibcon#wrote, iclass 22, count 0 2006.232.07:48:41.52#ibcon#about to read 3, iclass 22, count 0 2006.232.07:48:41.55#ibcon#read 3, iclass 22, count 0 2006.232.07:48:41.55#ibcon#about to read 4, iclass 22, count 0 2006.232.07:48:41.55#ibcon#read 4, iclass 22, count 0 2006.232.07:48:41.55#ibcon#about to read 5, iclass 22, count 0 2006.232.07:48:41.55#ibcon#read 5, iclass 22, count 0 2006.232.07:48:41.55#ibcon#about to read 6, iclass 22, count 0 2006.232.07:48:41.55#ibcon#read 6, iclass 22, count 0 2006.232.07:48:41.55#ibcon#end of sib2, iclass 22, count 0 2006.232.07:48:41.55#ibcon#*after write, iclass 22, count 0 2006.232.07:48:41.55#ibcon#*before return 0, iclass 22, count 0 2006.232.07:48:41.55#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:48:41.55#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:48:41.55#ibcon#about to clear, iclass 22 cls_cnt 0 2006.232.07:48:41.55#ibcon#cleared, iclass 22 cls_cnt 0 2006.232.07:48:41.55$vc4f8/vblo=4,712.99 2006.232.07:48:41.55#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.232.07:48:41.55#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.232.07:48:41.55#ibcon#ireg 17 cls_cnt 0 2006.232.07:48:41.55#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:48:41.55#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:48:41.55#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:48:41.55#ibcon#enter wrdev, iclass 24, count 0 2006.232.07:48:41.55#ibcon#first serial, iclass 24, count 0 2006.232.07:48:41.55#ibcon#enter sib2, iclass 24, count 0 2006.232.07:48:41.55#ibcon#flushed, iclass 24, count 0 2006.232.07:48:41.55#ibcon#about to write, iclass 24, count 0 2006.232.07:48:41.55#ibcon#wrote, iclass 24, count 0 2006.232.07:48:41.55#ibcon#about to read 3, iclass 24, count 0 2006.232.07:48:41.57#ibcon#read 3, iclass 24, count 0 2006.232.07:48:41.57#ibcon#about to read 4, iclass 24, count 0 2006.232.07:48:41.57#ibcon#read 4, iclass 24, count 0 2006.232.07:48:41.57#ibcon#about to read 5, iclass 24, count 0 2006.232.07:48:41.57#ibcon#read 5, iclass 24, count 0 2006.232.07:48:41.57#ibcon#about to read 6, iclass 24, count 0 2006.232.07:48:41.57#ibcon#read 6, iclass 24, count 0 2006.232.07:48:41.57#ibcon#end of sib2, iclass 24, count 0 2006.232.07:48:41.57#ibcon#*mode == 0, iclass 24, count 0 2006.232.07:48:41.57#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.232.07:48:41.57#ibcon#[28=FRQ=04,712.99\r\n] 2006.232.07:48:41.57#ibcon#*before write, iclass 24, count 0 2006.232.07:48:41.57#ibcon#enter sib2, iclass 24, count 0 2006.232.07:48:41.57#ibcon#flushed, iclass 24, count 0 2006.232.07:48:41.57#ibcon#about to write, iclass 24, count 0 2006.232.07:48:41.57#ibcon#wrote, iclass 24, count 0 2006.232.07:48:41.57#ibcon#about to read 3, iclass 24, count 0 2006.232.07:48:41.61#ibcon#read 3, iclass 24, count 0 2006.232.07:48:41.61#ibcon#about to read 4, iclass 24, count 0 2006.232.07:48:41.61#ibcon#read 4, iclass 24, count 0 2006.232.07:48:41.61#ibcon#about to read 5, iclass 24, count 0 2006.232.07:48:41.61#ibcon#read 5, iclass 24, count 0 2006.232.07:48:41.61#ibcon#about to read 6, iclass 24, count 0 2006.232.07:48:41.61#ibcon#read 6, iclass 24, count 0 2006.232.07:48:41.61#ibcon#end of sib2, iclass 24, count 0 2006.232.07:48:41.61#ibcon#*after write, iclass 24, count 0 2006.232.07:48:41.61#ibcon#*before return 0, iclass 24, count 0 2006.232.07:48:41.61#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:48:41.61#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:48:41.61#ibcon#about to clear, iclass 24 cls_cnt 0 2006.232.07:48:41.61#ibcon#cleared, iclass 24 cls_cnt 0 2006.232.07:48:41.61$vc4f8/vb=4,4 2006.232.07:48:41.61#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.232.07:48:41.61#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.232.07:48:41.61#ibcon#ireg 11 cls_cnt 2 2006.232.07:48:41.61#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:48:41.67#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:48:41.67#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:48:41.67#ibcon#enter wrdev, iclass 26, count 2 2006.232.07:48:41.67#ibcon#first serial, iclass 26, count 2 2006.232.07:48:41.67#ibcon#enter sib2, iclass 26, count 2 2006.232.07:48:41.67#ibcon#flushed, iclass 26, count 2 2006.232.07:48:41.67#ibcon#about to write, iclass 26, count 2 2006.232.07:48:41.67#ibcon#wrote, iclass 26, count 2 2006.232.07:48:41.67#ibcon#about to read 3, iclass 26, count 2 2006.232.07:48:41.69#ibcon#read 3, iclass 26, count 2 2006.232.07:48:41.69#ibcon#about to read 4, iclass 26, count 2 2006.232.07:48:41.69#ibcon#read 4, iclass 26, count 2 2006.232.07:48:41.69#ibcon#about to read 5, iclass 26, count 2 2006.232.07:48:41.69#ibcon#read 5, iclass 26, count 2 2006.232.07:48:41.69#ibcon#about to read 6, iclass 26, count 2 2006.232.07:48:41.69#ibcon#read 6, iclass 26, count 2 2006.232.07:48:41.69#ibcon#end of sib2, iclass 26, count 2 2006.232.07:48:41.69#ibcon#*mode == 0, iclass 26, count 2 2006.232.07:48:41.69#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.232.07:48:41.69#ibcon#[27=AT04-04\r\n] 2006.232.07:48:41.69#ibcon#*before write, iclass 26, count 2 2006.232.07:48:41.69#ibcon#enter sib2, iclass 26, count 2 2006.232.07:48:41.69#ibcon#flushed, iclass 26, count 2 2006.232.07:48:41.69#ibcon#about to write, iclass 26, count 2 2006.232.07:48:41.69#ibcon#wrote, iclass 26, count 2 2006.232.07:48:41.69#ibcon#about to read 3, iclass 26, count 2 2006.232.07:48:41.72#ibcon#read 3, iclass 26, count 2 2006.232.07:48:41.72#ibcon#about to read 4, iclass 26, count 2 2006.232.07:48:41.72#ibcon#read 4, iclass 26, count 2 2006.232.07:48:41.72#ibcon#about to read 5, iclass 26, count 2 2006.232.07:48:41.72#ibcon#read 5, iclass 26, count 2 2006.232.07:48:41.72#ibcon#about to read 6, iclass 26, count 2 2006.232.07:48:41.72#ibcon#read 6, iclass 26, count 2 2006.232.07:48:41.72#ibcon#end of sib2, iclass 26, count 2 2006.232.07:48:41.72#ibcon#*after write, iclass 26, count 2 2006.232.07:48:41.72#ibcon#*before return 0, iclass 26, count 2 2006.232.07:48:41.72#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:48:41.72#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:48:41.72#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.232.07:48:41.72#ibcon#ireg 7 cls_cnt 0 2006.232.07:48:41.72#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:48:41.84#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:48:41.84#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:48:41.84#ibcon#enter wrdev, iclass 26, count 0 2006.232.07:48:41.84#ibcon#first serial, iclass 26, count 0 2006.232.07:48:41.84#ibcon#enter sib2, iclass 26, count 0 2006.232.07:48:41.84#ibcon#flushed, iclass 26, count 0 2006.232.07:48:41.84#ibcon#about to write, iclass 26, count 0 2006.232.07:48:41.84#ibcon#wrote, iclass 26, count 0 2006.232.07:48:41.84#ibcon#about to read 3, iclass 26, count 0 2006.232.07:48:41.86#ibcon#read 3, iclass 26, count 0 2006.232.07:48:41.86#ibcon#about to read 4, iclass 26, count 0 2006.232.07:48:41.86#ibcon#read 4, iclass 26, count 0 2006.232.07:48:41.86#ibcon#about to read 5, iclass 26, count 0 2006.232.07:48:41.86#ibcon#read 5, iclass 26, count 0 2006.232.07:48:41.86#ibcon#about to read 6, iclass 26, count 0 2006.232.07:48:41.86#ibcon#read 6, iclass 26, count 0 2006.232.07:48:41.86#ibcon#end of sib2, iclass 26, count 0 2006.232.07:48:41.86#ibcon#*mode == 0, iclass 26, count 0 2006.232.07:48:41.86#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.232.07:48:41.86#ibcon#[27=USB\r\n] 2006.232.07:48:41.86#ibcon#*before write, iclass 26, count 0 2006.232.07:48:41.86#ibcon#enter sib2, iclass 26, count 0 2006.232.07:48:41.86#ibcon#flushed, iclass 26, count 0 2006.232.07:48:41.86#ibcon#about to write, iclass 26, count 0 2006.232.07:48:41.86#ibcon#wrote, iclass 26, count 0 2006.232.07:48:41.86#ibcon#about to read 3, iclass 26, count 0 2006.232.07:48:41.89#ibcon#read 3, iclass 26, count 0 2006.232.07:48:41.89#ibcon#about to read 4, iclass 26, count 0 2006.232.07:48:41.89#ibcon#read 4, iclass 26, count 0 2006.232.07:48:41.89#ibcon#about to read 5, iclass 26, count 0 2006.232.07:48:41.89#ibcon#read 5, iclass 26, count 0 2006.232.07:48:41.89#ibcon#about to read 6, iclass 26, count 0 2006.232.07:48:41.89#ibcon#read 6, iclass 26, count 0 2006.232.07:48:41.89#ibcon#end of sib2, iclass 26, count 0 2006.232.07:48:41.89#ibcon#*after write, iclass 26, count 0 2006.232.07:48:41.89#ibcon#*before return 0, iclass 26, count 0 2006.232.07:48:41.89#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:48:41.89#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:48:41.89#ibcon#about to clear, iclass 26 cls_cnt 0 2006.232.07:48:41.89#ibcon#cleared, iclass 26 cls_cnt 0 2006.232.07:48:41.89$vc4f8/vblo=5,744.99 2006.232.07:48:41.89#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.232.07:48:41.89#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.232.07:48:41.89#ibcon#ireg 17 cls_cnt 0 2006.232.07:48:41.89#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:48:41.89#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:48:41.89#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:48:41.89#ibcon#enter wrdev, iclass 28, count 0 2006.232.07:48:41.89#ibcon#first serial, iclass 28, count 0 2006.232.07:48:41.89#ibcon#enter sib2, iclass 28, count 0 2006.232.07:48:41.89#ibcon#flushed, iclass 28, count 0 2006.232.07:48:41.89#ibcon#about to write, iclass 28, count 0 2006.232.07:48:41.89#ibcon#wrote, iclass 28, count 0 2006.232.07:48:41.89#ibcon#about to read 3, iclass 28, count 0 2006.232.07:48:41.91#ibcon#read 3, iclass 28, count 0 2006.232.07:48:41.91#ibcon#about to read 4, iclass 28, count 0 2006.232.07:48:41.91#ibcon#read 4, iclass 28, count 0 2006.232.07:48:41.91#ibcon#about to read 5, iclass 28, count 0 2006.232.07:48:41.91#ibcon#read 5, iclass 28, count 0 2006.232.07:48:41.91#ibcon#about to read 6, iclass 28, count 0 2006.232.07:48:41.91#ibcon#read 6, iclass 28, count 0 2006.232.07:48:41.91#ibcon#end of sib2, iclass 28, count 0 2006.232.07:48:41.91#ibcon#*mode == 0, iclass 28, count 0 2006.232.07:48:41.91#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.232.07:48:41.91#ibcon#[28=FRQ=05,744.99\r\n] 2006.232.07:48:41.91#ibcon#*before write, iclass 28, count 0 2006.232.07:48:41.91#ibcon#enter sib2, iclass 28, count 0 2006.232.07:48:41.91#ibcon#flushed, iclass 28, count 0 2006.232.07:48:41.91#ibcon#about to write, iclass 28, count 0 2006.232.07:48:41.91#ibcon#wrote, iclass 28, count 0 2006.232.07:48:41.91#ibcon#about to read 3, iclass 28, count 0 2006.232.07:48:41.95#ibcon#read 3, iclass 28, count 0 2006.232.07:48:41.95#ibcon#about to read 4, iclass 28, count 0 2006.232.07:48:41.95#ibcon#read 4, iclass 28, count 0 2006.232.07:48:41.95#ibcon#about to read 5, iclass 28, count 0 2006.232.07:48:41.95#ibcon#read 5, iclass 28, count 0 2006.232.07:48:41.95#ibcon#about to read 6, iclass 28, count 0 2006.232.07:48:41.95#ibcon#read 6, iclass 28, count 0 2006.232.07:48:41.95#ibcon#end of sib2, iclass 28, count 0 2006.232.07:48:41.95#ibcon#*after write, iclass 28, count 0 2006.232.07:48:41.95#ibcon#*before return 0, iclass 28, count 0 2006.232.07:48:41.95#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:48:41.95#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:48:41.95#ibcon#about to clear, iclass 28 cls_cnt 0 2006.232.07:48:41.95#ibcon#cleared, iclass 28 cls_cnt 0 2006.232.07:48:41.95$vc4f8/vb=5,3 2006.232.07:48:41.95#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.232.07:48:41.95#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.232.07:48:41.95#ibcon#ireg 11 cls_cnt 2 2006.232.07:48:41.95#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:48:42.01#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:48:42.01#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:48:42.01#ibcon#enter wrdev, iclass 30, count 2 2006.232.07:48:42.01#ibcon#first serial, iclass 30, count 2 2006.232.07:48:42.01#ibcon#enter sib2, iclass 30, count 2 2006.232.07:48:42.01#ibcon#flushed, iclass 30, count 2 2006.232.07:48:42.01#ibcon#about to write, iclass 30, count 2 2006.232.07:48:42.01#ibcon#wrote, iclass 30, count 2 2006.232.07:48:42.01#ibcon#about to read 3, iclass 30, count 2 2006.232.07:48:42.04#ibcon#read 3, iclass 30, count 2 2006.232.07:48:42.04#ibcon#about to read 4, iclass 30, count 2 2006.232.07:48:42.04#ibcon#read 4, iclass 30, count 2 2006.232.07:48:42.04#ibcon#about to read 5, iclass 30, count 2 2006.232.07:48:42.04#ibcon#read 5, iclass 30, count 2 2006.232.07:48:42.04#ibcon#about to read 6, iclass 30, count 2 2006.232.07:48:42.04#ibcon#read 6, iclass 30, count 2 2006.232.07:48:42.04#ibcon#end of sib2, iclass 30, count 2 2006.232.07:48:42.04#ibcon#*mode == 0, iclass 30, count 2 2006.232.07:48:42.04#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.232.07:48:42.04#ibcon#[27=AT05-03\r\n] 2006.232.07:48:42.04#ibcon#*before write, iclass 30, count 2 2006.232.07:48:42.04#ibcon#enter sib2, iclass 30, count 2 2006.232.07:48:42.04#ibcon#flushed, iclass 30, count 2 2006.232.07:48:42.04#ibcon#about to write, iclass 30, count 2 2006.232.07:48:42.04#ibcon#wrote, iclass 30, count 2 2006.232.07:48:42.04#ibcon#about to read 3, iclass 30, count 2 2006.232.07:48:42.07#ibcon#read 3, iclass 30, count 2 2006.232.07:48:42.07#ibcon#about to read 4, iclass 30, count 2 2006.232.07:48:42.07#ibcon#read 4, iclass 30, count 2 2006.232.07:48:42.07#ibcon#about to read 5, iclass 30, count 2 2006.232.07:48:42.07#ibcon#read 5, iclass 30, count 2 2006.232.07:48:42.07#ibcon#about to read 6, iclass 30, count 2 2006.232.07:48:42.07#ibcon#read 6, iclass 30, count 2 2006.232.07:48:42.07#ibcon#end of sib2, iclass 30, count 2 2006.232.07:48:42.07#ibcon#*after write, iclass 30, count 2 2006.232.07:48:42.07#ibcon#*before return 0, iclass 30, count 2 2006.232.07:48:42.07#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:48:42.07#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:48:42.07#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.232.07:48:42.07#ibcon#ireg 7 cls_cnt 0 2006.232.07:48:42.07#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:48:42.19#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:48:42.19#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:48:42.19#ibcon#enter wrdev, iclass 30, count 0 2006.232.07:48:42.19#ibcon#first serial, iclass 30, count 0 2006.232.07:48:42.19#ibcon#enter sib2, iclass 30, count 0 2006.232.07:48:42.19#ibcon#flushed, iclass 30, count 0 2006.232.07:48:42.19#ibcon#about to write, iclass 30, count 0 2006.232.07:48:42.19#ibcon#wrote, iclass 30, count 0 2006.232.07:48:42.19#ibcon#about to read 3, iclass 30, count 0 2006.232.07:48:42.21#ibcon#read 3, iclass 30, count 0 2006.232.07:48:42.21#ibcon#about to read 4, iclass 30, count 0 2006.232.07:48:42.21#ibcon#read 4, iclass 30, count 0 2006.232.07:48:42.21#ibcon#about to read 5, iclass 30, count 0 2006.232.07:48:42.21#ibcon#read 5, iclass 30, count 0 2006.232.07:48:42.21#ibcon#about to read 6, iclass 30, count 0 2006.232.07:48:42.21#ibcon#read 6, iclass 30, count 0 2006.232.07:48:42.21#ibcon#end of sib2, iclass 30, count 0 2006.232.07:48:42.21#ibcon#*mode == 0, iclass 30, count 0 2006.232.07:48:42.21#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.232.07:48:42.21#ibcon#[27=USB\r\n] 2006.232.07:48:42.21#ibcon#*before write, iclass 30, count 0 2006.232.07:48:42.21#ibcon#enter sib2, iclass 30, count 0 2006.232.07:48:42.21#ibcon#flushed, iclass 30, count 0 2006.232.07:48:42.21#ibcon#about to write, iclass 30, count 0 2006.232.07:48:42.21#ibcon#wrote, iclass 30, count 0 2006.232.07:48:42.21#ibcon#about to read 3, iclass 30, count 0 2006.232.07:48:42.24#ibcon#read 3, iclass 30, count 0 2006.232.07:48:42.24#ibcon#about to read 4, iclass 30, count 0 2006.232.07:48:42.24#ibcon#read 4, iclass 30, count 0 2006.232.07:48:42.24#ibcon#about to read 5, iclass 30, count 0 2006.232.07:48:42.24#ibcon#read 5, iclass 30, count 0 2006.232.07:48:42.24#ibcon#about to read 6, iclass 30, count 0 2006.232.07:48:42.24#ibcon#read 6, iclass 30, count 0 2006.232.07:48:42.24#ibcon#end of sib2, iclass 30, count 0 2006.232.07:48:42.24#ibcon#*after write, iclass 30, count 0 2006.232.07:48:42.24#ibcon#*before return 0, iclass 30, count 0 2006.232.07:48:42.24#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:48:42.24#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:48:42.24#ibcon#about to clear, iclass 30 cls_cnt 0 2006.232.07:48:42.24#ibcon#cleared, iclass 30 cls_cnt 0 2006.232.07:48:42.24$vc4f8/vblo=6,752.99 2006.232.07:48:42.24#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.232.07:48:42.24#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.232.07:48:42.24#ibcon#ireg 17 cls_cnt 0 2006.232.07:48:42.24#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:48:42.24#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:48:42.24#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:48:42.24#ibcon#enter wrdev, iclass 32, count 0 2006.232.07:48:42.24#ibcon#first serial, iclass 32, count 0 2006.232.07:48:42.24#ibcon#enter sib2, iclass 32, count 0 2006.232.07:48:42.24#ibcon#flushed, iclass 32, count 0 2006.232.07:48:42.24#ibcon#about to write, iclass 32, count 0 2006.232.07:48:42.24#ibcon#wrote, iclass 32, count 0 2006.232.07:48:42.24#ibcon#about to read 3, iclass 32, count 0 2006.232.07:48:42.26#ibcon#read 3, iclass 32, count 0 2006.232.07:48:42.26#ibcon#about to read 4, iclass 32, count 0 2006.232.07:48:42.26#ibcon#read 4, iclass 32, count 0 2006.232.07:48:42.26#ibcon#about to read 5, iclass 32, count 0 2006.232.07:48:42.26#ibcon#read 5, iclass 32, count 0 2006.232.07:48:42.26#ibcon#about to read 6, iclass 32, count 0 2006.232.07:48:42.26#ibcon#read 6, iclass 32, count 0 2006.232.07:48:42.26#ibcon#end of sib2, iclass 32, count 0 2006.232.07:48:42.26#ibcon#*mode == 0, iclass 32, count 0 2006.232.07:48:42.26#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.232.07:48:42.26#ibcon#[28=FRQ=06,752.99\r\n] 2006.232.07:48:42.26#ibcon#*before write, iclass 32, count 0 2006.232.07:48:42.26#ibcon#enter sib2, iclass 32, count 0 2006.232.07:48:42.26#ibcon#flushed, iclass 32, count 0 2006.232.07:48:42.26#ibcon#about to write, iclass 32, count 0 2006.232.07:48:42.26#ibcon#wrote, iclass 32, count 0 2006.232.07:48:42.26#ibcon#about to read 3, iclass 32, count 0 2006.232.07:48:42.30#ibcon#read 3, iclass 32, count 0 2006.232.07:48:42.30#ibcon#about to read 4, iclass 32, count 0 2006.232.07:48:42.30#ibcon#read 4, iclass 32, count 0 2006.232.07:48:42.30#ibcon#about to read 5, iclass 32, count 0 2006.232.07:48:42.30#ibcon#read 5, iclass 32, count 0 2006.232.07:48:42.30#ibcon#about to read 6, iclass 32, count 0 2006.232.07:48:42.30#ibcon#read 6, iclass 32, count 0 2006.232.07:48:42.30#ibcon#end of sib2, iclass 32, count 0 2006.232.07:48:42.30#ibcon#*after write, iclass 32, count 0 2006.232.07:48:42.30#ibcon#*before return 0, iclass 32, count 0 2006.232.07:48:42.30#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:48:42.30#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:48:42.30#ibcon#about to clear, iclass 32 cls_cnt 0 2006.232.07:48:42.30#ibcon#cleared, iclass 32 cls_cnt 0 2006.232.07:48:42.30$vc4f8/vb=6,4 2006.232.07:48:42.30#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.232.07:48:42.30#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.232.07:48:42.30#ibcon#ireg 11 cls_cnt 2 2006.232.07:48:42.30#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:48:42.36#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:48:42.36#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:48:42.36#ibcon#enter wrdev, iclass 34, count 2 2006.232.07:48:42.36#ibcon#first serial, iclass 34, count 2 2006.232.07:48:42.36#ibcon#enter sib2, iclass 34, count 2 2006.232.07:48:42.36#ibcon#flushed, iclass 34, count 2 2006.232.07:48:42.36#ibcon#about to write, iclass 34, count 2 2006.232.07:48:42.36#ibcon#wrote, iclass 34, count 2 2006.232.07:48:42.36#ibcon#about to read 3, iclass 34, count 2 2006.232.07:48:42.38#ibcon#read 3, iclass 34, count 2 2006.232.07:48:42.38#ibcon#about to read 4, iclass 34, count 2 2006.232.07:48:42.38#ibcon#read 4, iclass 34, count 2 2006.232.07:48:42.38#ibcon#about to read 5, iclass 34, count 2 2006.232.07:48:42.38#ibcon#read 5, iclass 34, count 2 2006.232.07:48:42.38#ibcon#about to read 6, iclass 34, count 2 2006.232.07:48:42.38#ibcon#read 6, iclass 34, count 2 2006.232.07:48:42.38#ibcon#end of sib2, iclass 34, count 2 2006.232.07:48:42.38#ibcon#*mode == 0, iclass 34, count 2 2006.232.07:48:42.38#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.232.07:48:42.38#ibcon#[27=AT06-04\r\n] 2006.232.07:48:42.38#ibcon#*before write, iclass 34, count 2 2006.232.07:48:42.38#ibcon#enter sib2, iclass 34, count 2 2006.232.07:48:42.38#ibcon#flushed, iclass 34, count 2 2006.232.07:48:42.38#ibcon#about to write, iclass 34, count 2 2006.232.07:48:42.38#ibcon#wrote, iclass 34, count 2 2006.232.07:48:42.38#ibcon#about to read 3, iclass 34, count 2 2006.232.07:48:42.41#ibcon#read 3, iclass 34, count 2 2006.232.07:48:42.41#ibcon#about to read 4, iclass 34, count 2 2006.232.07:48:42.41#ibcon#read 4, iclass 34, count 2 2006.232.07:48:42.41#ibcon#about to read 5, iclass 34, count 2 2006.232.07:48:42.41#ibcon#read 5, iclass 34, count 2 2006.232.07:48:42.41#ibcon#about to read 6, iclass 34, count 2 2006.232.07:48:42.41#ibcon#read 6, iclass 34, count 2 2006.232.07:48:42.41#ibcon#end of sib2, iclass 34, count 2 2006.232.07:48:42.41#ibcon#*after write, iclass 34, count 2 2006.232.07:48:42.41#ibcon#*before return 0, iclass 34, count 2 2006.232.07:48:42.41#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:48:42.41#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:48:42.41#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.232.07:48:42.41#ibcon#ireg 7 cls_cnt 0 2006.232.07:48:42.41#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:48:42.53#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:48:42.53#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:48:42.53#ibcon#enter wrdev, iclass 34, count 0 2006.232.07:48:42.53#ibcon#first serial, iclass 34, count 0 2006.232.07:48:42.53#ibcon#enter sib2, iclass 34, count 0 2006.232.07:48:42.53#ibcon#flushed, iclass 34, count 0 2006.232.07:48:42.53#ibcon#about to write, iclass 34, count 0 2006.232.07:48:42.53#ibcon#wrote, iclass 34, count 0 2006.232.07:48:42.53#ibcon#about to read 3, iclass 34, count 0 2006.232.07:48:42.55#ibcon#read 3, iclass 34, count 0 2006.232.07:48:42.55#ibcon#about to read 4, iclass 34, count 0 2006.232.07:48:42.55#ibcon#read 4, iclass 34, count 0 2006.232.07:48:42.55#ibcon#about to read 5, iclass 34, count 0 2006.232.07:48:42.55#ibcon#read 5, iclass 34, count 0 2006.232.07:48:42.55#ibcon#about to read 6, iclass 34, count 0 2006.232.07:48:42.55#ibcon#read 6, iclass 34, count 0 2006.232.07:48:42.55#ibcon#end of sib2, iclass 34, count 0 2006.232.07:48:42.55#ibcon#*mode == 0, iclass 34, count 0 2006.232.07:48:42.55#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.232.07:48:42.55#ibcon#[27=USB\r\n] 2006.232.07:48:42.55#ibcon#*before write, iclass 34, count 0 2006.232.07:48:42.55#ibcon#enter sib2, iclass 34, count 0 2006.232.07:48:42.55#ibcon#flushed, iclass 34, count 0 2006.232.07:48:42.55#ibcon#about to write, iclass 34, count 0 2006.232.07:48:42.55#ibcon#wrote, iclass 34, count 0 2006.232.07:48:42.55#ibcon#about to read 3, iclass 34, count 0 2006.232.07:48:42.58#ibcon#read 3, iclass 34, count 0 2006.232.07:48:42.58#ibcon#about to read 4, iclass 34, count 0 2006.232.07:48:42.58#ibcon#read 4, iclass 34, count 0 2006.232.07:48:42.58#ibcon#about to read 5, iclass 34, count 0 2006.232.07:48:42.58#ibcon#read 5, iclass 34, count 0 2006.232.07:48:42.58#ibcon#about to read 6, iclass 34, count 0 2006.232.07:48:42.58#ibcon#read 6, iclass 34, count 0 2006.232.07:48:42.58#ibcon#end of sib2, iclass 34, count 0 2006.232.07:48:42.58#ibcon#*after write, iclass 34, count 0 2006.232.07:48:42.58#ibcon#*before return 0, iclass 34, count 0 2006.232.07:48:42.58#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:48:42.58#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:48:42.58#ibcon#about to clear, iclass 34 cls_cnt 0 2006.232.07:48:42.58#ibcon#cleared, iclass 34 cls_cnt 0 2006.232.07:48:42.58$vc4f8/vabw=wide 2006.232.07:48:42.58#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.232.07:48:42.58#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.232.07:48:42.58#ibcon#ireg 8 cls_cnt 0 2006.232.07:48:42.58#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:48:42.58#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:48:42.58#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:48:42.58#ibcon#enter wrdev, iclass 36, count 0 2006.232.07:48:42.58#ibcon#first serial, iclass 36, count 0 2006.232.07:48:42.58#ibcon#enter sib2, iclass 36, count 0 2006.232.07:48:42.58#ibcon#flushed, iclass 36, count 0 2006.232.07:48:42.58#ibcon#about to write, iclass 36, count 0 2006.232.07:48:42.58#ibcon#wrote, iclass 36, count 0 2006.232.07:48:42.58#ibcon#about to read 3, iclass 36, count 0 2006.232.07:48:42.60#ibcon#read 3, iclass 36, count 0 2006.232.07:48:42.60#ibcon#about to read 4, iclass 36, count 0 2006.232.07:48:42.60#ibcon#read 4, iclass 36, count 0 2006.232.07:48:42.60#ibcon#about to read 5, iclass 36, count 0 2006.232.07:48:42.60#ibcon#read 5, iclass 36, count 0 2006.232.07:48:42.60#ibcon#about to read 6, iclass 36, count 0 2006.232.07:48:42.60#ibcon#read 6, iclass 36, count 0 2006.232.07:48:42.60#ibcon#end of sib2, iclass 36, count 0 2006.232.07:48:42.60#ibcon#*mode == 0, iclass 36, count 0 2006.232.07:48:42.60#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.232.07:48:42.60#ibcon#[25=BW32\r\n] 2006.232.07:48:42.60#ibcon#*before write, iclass 36, count 0 2006.232.07:48:42.60#ibcon#enter sib2, iclass 36, count 0 2006.232.07:48:42.60#ibcon#flushed, iclass 36, count 0 2006.232.07:48:42.60#ibcon#about to write, iclass 36, count 0 2006.232.07:48:42.60#ibcon#wrote, iclass 36, count 0 2006.232.07:48:42.60#ibcon#about to read 3, iclass 36, count 0 2006.232.07:48:42.63#ibcon#read 3, iclass 36, count 0 2006.232.07:48:42.63#ibcon#about to read 4, iclass 36, count 0 2006.232.07:48:42.63#ibcon#read 4, iclass 36, count 0 2006.232.07:48:42.63#ibcon#about to read 5, iclass 36, count 0 2006.232.07:48:42.63#ibcon#read 5, iclass 36, count 0 2006.232.07:48:42.63#ibcon#about to read 6, iclass 36, count 0 2006.232.07:48:42.63#ibcon#read 6, iclass 36, count 0 2006.232.07:48:42.63#ibcon#end of sib2, iclass 36, count 0 2006.232.07:48:42.63#ibcon#*after write, iclass 36, count 0 2006.232.07:48:42.63#ibcon#*before return 0, iclass 36, count 0 2006.232.07:48:42.63#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:48:42.63#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:48:42.63#ibcon#about to clear, iclass 36 cls_cnt 0 2006.232.07:48:42.63#ibcon#cleared, iclass 36 cls_cnt 0 2006.232.07:48:42.63$vc4f8/vbbw=wide 2006.232.07:48:42.63#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.232.07:48:42.63#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.232.07:48:42.63#ibcon#ireg 8 cls_cnt 0 2006.232.07:48:42.63#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.232.07:48:42.70#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.232.07:48:42.70#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.232.07:48:42.70#ibcon#enter wrdev, iclass 38, count 0 2006.232.07:48:42.70#ibcon#first serial, iclass 38, count 0 2006.232.07:48:42.70#ibcon#enter sib2, iclass 38, count 0 2006.232.07:48:42.70#ibcon#flushed, iclass 38, count 0 2006.232.07:48:42.70#ibcon#about to write, iclass 38, count 0 2006.232.07:48:42.70#ibcon#wrote, iclass 38, count 0 2006.232.07:48:42.70#ibcon#about to read 3, iclass 38, count 0 2006.232.07:48:42.72#ibcon#read 3, iclass 38, count 0 2006.232.07:48:42.72#ibcon#about to read 4, iclass 38, count 0 2006.232.07:48:42.72#ibcon#read 4, iclass 38, count 0 2006.232.07:48:42.72#ibcon#about to read 5, iclass 38, count 0 2006.232.07:48:42.72#ibcon#read 5, iclass 38, count 0 2006.232.07:48:42.72#ibcon#about to read 6, iclass 38, count 0 2006.232.07:48:42.72#ibcon#read 6, iclass 38, count 0 2006.232.07:48:42.72#ibcon#end of sib2, iclass 38, count 0 2006.232.07:48:42.72#ibcon#*mode == 0, iclass 38, count 0 2006.232.07:48:42.72#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.232.07:48:42.72#ibcon#[27=BW32\r\n] 2006.232.07:48:42.72#ibcon#*before write, iclass 38, count 0 2006.232.07:48:42.72#ibcon#enter sib2, iclass 38, count 0 2006.232.07:48:42.72#ibcon#flushed, iclass 38, count 0 2006.232.07:48:42.72#ibcon#about to write, iclass 38, count 0 2006.232.07:48:42.72#ibcon#wrote, iclass 38, count 0 2006.232.07:48:42.72#ibcon#about to read 3, iclass 38, count 0 2006.232.07:48:42.75#ibcon#read 3, iclass 38, count 0 2006.232.07:48:42.75#ibcon#about to read 4, iclass 38, count 0 2006.232.07:48:42.75#ibcon#read 4, iclass 38, count 0 2006.232.07:48:42.75#ibcon#about to read 5, iclass 38, count 0 2006.232.07:48:42.75#ibcon#read 5, iclass 38, count 0 2006.232.07:48:42.75#ibcon#about to read 6, iclass 38, count 0 2006.232.07:48:42.75#ibcon#read 6, iclass 38, count 0 2006.232.07:48:42.75#ibcon#end of sib2, iclass 38, count 0 2006.232.07:48:42.75#ibcon#*after write, iclass 38, count 0 2006.232.07:48:42.75#ibcon#*before return 0, iclass 38, count 0 2006.232.07:48:42.75#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.232.07:48:42.75#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.232.07:48:42.75#ibcon#about to clear, iclass 38 cls_cnt 0 2006.232.07:48:42.75#ibcon#cleared, iclass 38 cls_cnt 0 2006.232.07:48:42.75$4f8m12a/ifd4f 2006.232.07:48:42.75$ifd4f/lo= 2006.232.07:48:42.75$ifd4f/lo=lo1,7680.00,usb,rcp,1 2006.232.07:48:42.75$ifd4f/lo=lo2,1600.00,usb,rcp,1 2006.232.07:48:42.75$ifd4f/lo=lo3,8080.00,usb,rcp,1 2006.232.07:48:42.75$ifd4f/patch= 2006.232.07:48:42.75$ifd4f/patch=lo1,a1,a2,a3,a4 2006.232.07:48:42.75$ifd4f/patch=lo2,b1,b2,b3,b4,b5,b6 2006.232.07:48:42.75$ifd4f/patch=lo3,a5,a6,a7,a8 2006.232.07:48:42.75$4f8m12a/"form=m,16.000,1:2 2006.232.07:48:42.75$4f8m12a/"tpicd 2006.232.07:48:42.75$4f8m12a/echo=off 2006.232.07:48:42.75$4f8m12a/xlog=off 2006.232.07:48:42.75:!2006.232.07:49:10 2006.232.07:48:50.14#trakl#Source acquired 2006.232.07:48:52.14#flagr#flagr/antenna,acquired 2006.232.07:49:10.00:preob 2006.232.07:49:11.14/onsource/TRACKING 2006.232.07:49:11.14:!2006.232.07:49:20 2006.232.07:49:20.00:data_valid=on 2006.232.07:49:20.00:midob 2006.232.07:49:20.13/onsource/TRACKING 2006.232.07:49:20.13/wx/29.43,1007.2,87 2006.232.07:49:20.26/cable/+6.3875E-03 2006.232.07:49:21.35/va/01,08,usb,yes,31,32 2006.232.07:49:21.35/va/02,07,usb,yes,30,32 2006.232.07:49:21.35/va/03,08,usb,yes,23,23 2006.232.07:49:21.35/va/04,07,usb,yes,32,34 2006.232.07:49:21.35/va/05,07,usb,yes,36,38 2006.232.07:49:21.35/va/06,06,usb,yes,35,35 2006.232.07:49:21.35/va/07,06,usb,yes,36,36 2006.232.07:49:21.35/va/08,06,usb,yes,38,38 2006.232.07:49:21.58/valo/01,532.99,yes,locked 2006.232.07:49:21.58/valo/02,572.99,yes,locked 2006.232.07:49:21.58/valo/03,672.99,yes,locked 2006.232.07:49:21.58/valo/04,832.99,yes,locked 2006.232.07:49:21.58/valo/05,652.99,yes,locked 2006.232.07:49:21.58/valo/06,772.99,yes,locked 2006.232.07:49:21.58/valo/07,832.99,yes,locked 2006.232.07:49:21.58/valo/08,852.99,yes,locked 2006.232.07:49:22.67/vb/01,04,usb,yes,30,29 2006.232.07:49:22.67/vb/02,04,usb,yes,32,34 2006.232.07:49:22.67/vb/03,04,usb,yes,29,32 2006.232.07:49:22.67/vb/04,04,usb,yes,29,30 2006.232.07:49:22.67/vb/05,03,usb,yes,35,39 2006.232.07:49:22.67/vb/06,04,usb,yes,29,32 2006.232.07:49:22.67/vb/07,04,usb,yes,31,31 2006.232.07:49:22.67/vb/08,04,usb,yes,28,32 2006.232.07:49:22.91/vblo/01,632.99,yes,locked 2006.232.07:49:22.91/vblo/02,640.99,yes,locked 2006.232.07:49:22.91/vblo/03,656.99,yes,locked 2006.232.07:49:22.91/vblo/04,712.99,yes,locked 2006.232.07:49:22.91/vblo/05,744.99,yes,locked 2006.232.07:49:22.91/vblo/06,752.99,yes,locked 2006.232.07:49:22.91/vblo/07,734.99,yes,locked 2006.232.07:49:22.91/vblo/08,744.99,yes,locked 2006.232.07:49:23.06/vabw/8 2006.232.07:49:23.21/vbbw/8 2006.232.07:49:23.30/xfe/off,on,13.0 2006.232.07:49:23.68/ifatt/23,28,28,28 2006.232.07:49:24.07/fmout-gps/S +4.46E-07 2006.232.07:49:24.11:!2006.232.07:50:20 2006.232.07:50:20.00:data_valid=off 2006.232.07:50:20.01:postob 2006.232.07:50:20.22/cable/+6.3872E-03 2006.232.07:50:20.22/wx/29.43,1007.3,87 2006.232.07:50:21.06/fmout-gps/S +4.47E-07 2006.232.07:50:21.07:scan_name=232-0751,k06232,60 2006.232.07:50:21.07:source=1357+769,135755.37,764321.1,2000.0,neutral 2006.232.07:50:21.13#flagr#flagr/antenna,new-source 2006.232.07:50:22.13:checkk5 2006.232.07:50:22.52/chk_autoobs//k5ts1/ autoobs is running! 2006.232.07:50:22.91/chk_autoobs//k5ts2/ autoobs is running! 2006.232.07:50:23.29/chk_autoobs//k5ts3/ autoobs is running! 2006.232.07:50:23.66/chk_autoobs//k5ts4/ autoobs is running! 2006.232.07:50:24.02/chk_obsdata//k5ts1/T2320749??a.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:50:24.43/chk_obsdata//k5ts2/T2320749??b.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:50:24.80/chk_obsdata//k5ts3/T2320749??c.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:50:25.16/chk_obsdata//k5ts4/T2320749??d.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:50:25.85/k5log//k5ts1_log_newline 2006.232.07:50:26.55/k5log//k5ts2_log_newline 2006.232.07:50:27.24/k5log//k5ts3_log_newline 2006.232.07:50:27.92/k5log//k5ts4_log_newline 2006.232.07:50:27.95/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.232.07:50:27.95:4f8m12a=1 2006.232.07:50:27.95$4f8m12a/echo=on 2006.232.07:50:27.95$4f8m12a/pcalon 2006.232.07:50:27.95$pcalon/"no phase cal control is implemented here 2006.232.07:50:27.95$4f8m12a/"tpicd=stop 2006.232.07:50:27.95$4f8m12a/vc4f8 2006.232.07:50:27.95$vc4f8/valo=1,532.99 2006.232.07:50:27.95#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.232.07:50:27.95#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.232.07:50:27.95#ibcon#ireg 17 cls_cnt 0 2006.232.07:50:27.95#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.232.07:50:27.95#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.232.07:50:27.95#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.232.07:50:27.95#ibcon#enter wrdev, iclass 13, count 0 2006.232.07:50:27.95#ibcon#first serial, iclass 13, count 0 2006.232.07:50:27.95#ibcon#enter sib2, iclass 13, count 0 2006.232.07:50:27.95#ibcon#flushed, iclass 13, count 0 2006.232.07:50:27.95#ibcon#about to write, iclass 13, count 0 2006.232.07:50:27.95#ibcon#wrote, iclass 13, count 0 2006.232.07:50:27.95#ibcon#about to read 3, iclass 13, count 0 2006.232.07:50:27.99#ibcon#read 3, iclass 13, count 0 2006.232.07:50:27.99#ibcon#about to read 4, iclass 13, count 0 2006.232.07:50:27.99#ibcon#read 4, iclass 13, count 0 2006.232.07:50:27.99#ibcon#about to read 5, iclass 13, count 0 2006.232.07:50:27.99#ibcon#read 5, iclass 13, count 0 2006.232.07:50:27.99#ibcon#about to read 6, iclass 13, count 0 2006.232.07:50:27.99#ibcon#read 6, iclass 13, count 0 2006.232.07:50:27.99#ibcon#end of sib2, iclass 13, count 0 2006.232.07:50:27.99#ibcon#*mode == 0, iclass 13, count 0 2006.232.07:50:27.99#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.232.07:50:27.99#ibcon#[26=FRQ=01,532.99\r\n] 2006.232.07:50:27.99#ibcon#*before write, iclass 13, count 0 2006.232.07:50:27.99#ibcon#enter sib2, iclass 13, count 0 2006.232.07:50:27.99#ibcon#flushed, iclass 13, count 0 2006.232.07:50:27.99#ibcon#about to write, iclass 13, count 0 2006.232.07:50:27.99#ibcon#wrote, iclass 13, count 0 2006.232.07:50:27.99#ibcon#about to read 3, iclass 13, count 0 2006.232.07:50:28.03#ibcon#read 3, iclass 13, count 0 2006.232.07:50:28.03#ibcon#about to read 4, iclass 13, count 0 2006.232.07:50:28.03#ibcon#read 4, iclass 13, count 0 2006.232.07:50:28.03#ibcon#about to read 5, iclass 13, count 0 2006.232.07:50:28.03#ibcon#read 5, iclass 13, count 0 2006.232.07:50:28.03#ibcon#about to read 6, iclass 13, count 0 2006.232.07:50:28.03#ibcon#read 6, iclass 13, count 0 2006.232.07:50:28.03#ibcon#end of sib2, iclass 13, count 0 2006.232.07:50:28.03#ibcon#*after write, iclass 13, count 0 2006.232.07:50:28.03#ibcon#*before return 0, iclass 13, count 0 2006.232.07:50:28.03#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.232.07:50:28.03#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.232.07:50:28.03#ibcon#about to clear, iclass 13 cls_cnt 0 2006.232.07:50:28.03#ibcon#cleared, iclass 13 cls_cnt 0 2006.232.07:50:28.03$vc4f8/va=1,8 2006.232.07:50:28.03#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.232.07:50:28.03#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.232.07:50:28.03#ibcon#ireg 11 cls_cnt 2 2006.232.07:50:28.03#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.232.07:50:28.03#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.232.07:50:28.03#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.232.07:50:28.03#ibcon#enter wrdev, iclass 15, count 2 2006.232.07:50:28.03#ibcon#first serial, iclass 15, count 2 2006.232.07:50:28.03#ibcon#enter sib2, iclass 15, count 2 2006.232.07:50:28.03#ibcon#flushed, iclass 15, count 2 2006.232.07:50:28.03#ibcon#about to write, iclass 15, count 2 2006.232.07:50:28.03#ibcon#wrote, iclass 15, count 2 2006.232.07:50:28.03#ibcon#about to read 3, iclass 15, count 2 2006.232.07:50:28.05#ibcon#read 3, iclass 15, count 2 2006.232.07:50:28.05#ibcon#about to read 4, iclass 15, count 2 2006.232.07:50:28.05#ibcon#read 4, iclass 15, count 2 2006.232.07:50:28.05#ibcon#about to read 5, iclass 15, count 2 2006.232.07:50:28.05#ibcon#read 5, iclass 15, count 2 2006.232.07:50:28.05#ibcon#about to read 6, iclass 15, count 2 2006.232.07:50:28.05#ibcon#read 6, iclass 15, count 2 2006.232.07:50:28.05#ibcon#end of sib2, iclass 15, count 2 2006.232.07:50:28.05#ibcon#*mode == 0, iclass 15, count 2 2006.232.07:50:28.05#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.232.07:50:28.05#ibcon#[25=AT01-08\r\n] 2006.232.07:50:28.05#ibcon#*before write, iclass 15, count 2 2006.232.07:50:28.05#ibcon#enter sib2, iclass 15, count 2 2006.232.07:50:28.05#ibcon#flushed, iclass 15, count 2 2006.232.07:50:28.05#ibcon#about to write, iclass 15, count 2 2006.232.07:50:28.05#ibcon#wrote, iclass 15, count 2 2006.232.07:50:28.05#ibcon#about to read 3, iclass 15, count 2 2006.232.07:50:28.09#ibcon#read 3, iclass 15, count 2 2006.232.07:50:28.09#ibcon#about to read 4, iclass 15, count 2 2006.232.07:50:28.09#ibcon#read 4, iclass 15, count 2 2006.232.07:50:28.09#ibcon#about to read 5, iclass 15, count 2 2006.232.07:50:28.09#ibcon#read 5, iclass 15, count 2 2006.232.07:50:28.09#ibcon#about to read 6, iclass 15, count 2 2006.232.07:50:28.09#ibcon#read 6, iclass 15, count 2 2006.232.07:50:28.09#ibcon#end of sib2, iclass 15, count 2 2006.232.07:50:28.09#ibcon#*after write, iclass 15, count 2 2006.232.07:50:28.09#ibcon#*before return 0, iclass 15, count 2 2006.232.07:50:28.09#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.232.07:50:28.09#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.232.07:50:28.09#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.232.07:50:28.09#ibcon#ireg 7 cls_cnt 0 2006.232.07:50:28.09#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.232.07:50:28.20#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.232.07:50:28.20#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.232.07:50:28.20#ibcon#enter wrdev, iclass 15, count 0 2006.232.07:50:28.20#ibcon#first serial, iclass 15, count 0 2006.232.07:50:28.20#ibcon#enter sib2, iclass 15, count 0 2006.232.07:50:28.20#ibcon#flushed, iclass 15, count 0 2006.232.07:50:28.20#ibcon#about to write, iclass 15, count 0 2006.232.07:50:28.20#ibcon#wrote, iclass 15, count 0 2006.232.07:50:28.20#ibcon#about to read 3, iclass 15, count 0 2006.232.07:50:28.22#ibcon#read 3, iclass 15, count 0 2006.232.07:50:28.22#ibcon#about to read 4, iclass 15, count 0 2006.232.07:50:28.22#ibcon#read 4, iclass 15, count 0 2006.232.07:50:28.22#ibcon#about to read 5, iclass 15, count 0 2006.232.07:50:28.22#ibcon#read 5, iclass 15, count 0 2006.232.07:50:28.22#ibcon#about to read 6, iclass 15, count 0 2006.232.07:50:28.22#ibcon#read 6, iclass 15, count 0 2006.232.07:50:28.22#ibcon#end of sib2, iclass 15, count 0 2006.232.07:50:28.22#ibcon#*mode == 0, iclass 15, count 0 2006.232.07:50:28.22#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.232.07:50:28.22#ibcon#[25=USB\r\n] 2006.232.07:50:28.22#ibcon#*before write, iclass 15, count 0 2006.232.07:50:28.22#ibcon#enter sib2, iclass 15, count 0 2006.232.07:50:28.22#ibcon#flushed, iclass 15, count 0 2006.232.07:50:28.22#ibcon#about to write, iclass 15, count 0 2006.232.07:50:28.22#ibcon#wrote, iclass 15, count 0 2006.232.07:50:28.22#ibcon#about to read 3, iclass 15, count 0 2006.232.07:50:28.25#ibcon#read 3, iclass 15, count 0 2006.232.07:50:28.25#ibcon#about to read 4, iclass 15, count 0 2006.232.07:50:28.25#ibcon#read 4, iclass 15, count 0 2006.232.07:50:28.25#ibcon#about to read 5, iclass 15, count 0 2006.232.07:50:28.25#ibcon#read 5, iclass 15, count 0 2006.232.07:50:28.25#ibcon#about to read 6, iclass 15, count 0 2006.232.07:50:28.25#ibcon#read 6, iclass 15, count 0 2006.232.07:50:28.25#ibcon#end of sib2, iclass 15, count 0 2006.232.07:50:28.25#ibcon#*after write, iclass 15, count 0 2006.232.07:50:28.25#ibcon#*before return 0, iclass 15, count 0 2006.232.07:50:28.25#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.232.07:50:28.25#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.232.07:50:28.25#ibcon#about to clear, iclass 15 cls_cnt 0 2006.232.07:50:28.25#ibcon#cleared, iclass 15 cls_cnt 0 2006.232.07:50:28.25$vc4f8/valo=2,572.99 2006.232.07:50:28.25#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.232.07:50:28.25#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.232.07:50:28.25#ibcon#ireg 17 cls_cnt 0 2006.232.07:50:28.25#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.232.07:50:28.25#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.232.07:50:28.25#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.232.07:50:28.25#ibcon#enter wrdev, iclass 17, count 0 2006.232.07:50:28.25#ibcon#first serial, iclass 17, count 0 2006.232.07:50:28.25#ibcon#enter sib2, iclass 17, count 0 2006.232.07:50:28.25#ibcon#flushed, iclass 17, count 0 2006.232.07:50:28.25#ibcon#about to write, iclass 17, count 0 2006.232.07:50:28.25#ibcon#wrote, iclass 17, count 0 2006.232.07:50:28.25#ibcon#about to read 3, iclass 17, count 0 2006.232.07:50:28.27#ibcon#read 3, iclass 17, count 0 2006.232.07:50:28.27#ibcon#about to read 4, iclass 17, count 0 2006.232.07:50:28.27#ibcon#read 4, iclass 17, count 0 2006.232.07:50:28.27#ibcon#about to read 5, iclass 17, count 0 2006.232.07:50:28.27#ibcon#read 5, iclass 17, count 0 2006.232.07:50:28.27#ibcon#about to read 6, iclass 17, count 0 2006.232.07:50:28.27#ibcon#read 6, iclass 17, count 0 2006.232.07:50:28.27#ibcon#end of sib2, iclass 17, count 0 2006.232.07:50:28.27#ibcon#*mode == 0, iclass 17, count 0 2006.232.07:50:28.27#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.232.07:50:28.27#ibcon#[26=FRQ=02,572.99\r\n] 2006.232.07:50:28.27#ibcon#*before write, iclass 17, count 0 2006.232.07:50:28.27#ibcon#enter sib2, iclass 17, count 0 2006.232.07:50:28.27#ibcon#flushed, iclass 17, count 0 2006.232.07:50:28.27#ibcon#about to write, iclass 17, count 0 2006.232.07:50:28.27#ibcon#wrote, iclass 17, count 0 2006.232.07:50:28.27#ibcon#about to read 3, iclass 17, count 0 2006.232.07:50:28.31#ibcon#read 3, iclass 17, count 0 2006.232.07:50:28.31#ibcon#about to read 4, iclass 17, count 0 2006.232.07:50:28.31#ibcon#read 4, iclass 17, count 0 2006.232.07:50:28.31#ibcon#about to read 5, iclass 17, count 0 2006.232.07:50:28.31#ibcon#read 5, iclass 17, count 0 2006.232.07:50:28.31#ibcon#about to read 6, iclass 17, count 0 2006.232.07:50:28.31#ibcon#read 6, iclass 17, count 0 2006.232.07:50:28.31#ibcon#end of sib2, iclass 17, count 0 2006.232.07:50:28.31#ibcon#*after write, iclass 17, count 0 2006.232.07:50:28.31#ibcon#*before return 0, iclass 17, count 0 2006.232.07:50:28.31#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.232.07:50:28.31#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.232.07:50:28.31#ibcon#about to clear, iclass 17 cls_cnt 0 2006.232.07:50:28.31#ibcon#cleared, iclass 17 cls_cnt 0 2006.232.07:50:28.31$vc4f8/va=2,7 2006.232.07:50:28.31#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.232.07:50:28.31#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.232.07:50:28.31#ibcon#ireg 11 cls_cnt 2 2006.232.07:50:28.31#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.232.07:50:28.37#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.232.07:50:28.37#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.232.07:50:28.37#ibcon#enter wrdev, iclass 19, count 2 2006.232.07:50:28.37#ibcon#first serial, iclass 19, count 2 2006.232.07:50:28.37#ibcon#enter sib2, iclass 19, count 2 2006.232.07:50:28.37#ibcon#flushed, iclass 19, count 2 2006.232.07:50:28.37#ibcon#about to write, iclass 19, count 2 2006.232.07:50:28.37#ibcon#wrote, iclass 19, count 2 2006.232.07:50:28.37#ibcon#about to read 3, iclass 19, count 2 2006.232.07:50:28.39#ibcon#read 3, iclass 19, count 2 2006.232.07:50:28.39#ibcon#about to read 4, iclass 19, count 2 2006.232.07:50:28.39#ibcon#read 4, iclass 19, count 2 2006.232.07:50:28.39#ibcon#about to read 5, iclass 19, count 2 2006.232.07:50:28.39#ibcon#read 5, iclass 19, count 2 2006.232.07:50:28.39#ibcon#about to read 6, iclass 19, count 2 2006.232.07:50:28.39#ibcon#read 6, iclass 19, count 2 2006.232.07:50:28.39#ibcon#end of sib2, iclass 19, count 2 2006.232.07:50:28.39#ibcon#*mode == 0, iclass 19, count 2 2006.232.07:50:28.39#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.232.07:50:28.39#ibcon#[25=AT02-07\r\n] 2006.232.07:50:28.39#ibcon#*before write, iclass 19, count 2 2006.232.07:50:28.39#ibcon#enter sib2, iclass 19, count 2 2006.232.07:50:28.39#ibcon#flushed, iclass 19, count 2 2006.232.07:50:28.39#ibcon#about to write, iclass 19, count 2 2006.232.07:50:28.39#ibcon#wrote, iclass 19, count 2 2006.232.07:50:28.39#ibcon#about to read 3, iclass 19, count 2 2006.232.07:50:28.42#ibcon#read 3, iclass 19, count 2 2006.232.07:50:28.42#ibcon#about to read 4, iclass 19, count 2 2006.232.07:50:28.42#ibcon#read 4, iclass 19, count 2 2006.232.07:50:28.42#ibcon#about to read 5, iclass 19, count 2 2006.232.07:50:28.42#ibcon#read 5, iclass 19, count 2 2006.232.07:50:28.42#ibcon#about to read 6, iclass 19, count 2 2006.232.07:50:28.42#ibcon#read 6, iclass 19, count 2 2006.232.07:50:28.42#ibcon#end of sib2, iclass 19, count 2 2006.232.07:50:28.42#ibcon#*after write, iclass 19, count 2 2006.232.07:50:28.42#ibcon#*before return 0, iclass 19, count 2 2006.232.07:50:28.42#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.232.07:50:28.42#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.232.07:50:28.42#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.232.07:50:28.42#ibcon#ireg 7 cls_cnt 0 2006.232.07:50:28.42#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.232.07:50:28.54#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.232.07:50:28.54#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.232.07:50:28.54#ibcon#enter wrdev, iclass 19, count 0 2006.232.07:50:28.54#ibcon#first serial, iclass 19, count 0 2006.232.07:50:28.54#ibcon#enter sib2, iclass 19, count 0 2006.232.07:50:28.54#ibcon#flushed, iclass 19, count 0 2006.232.07:50:28.54#ibcon#about to write, iclass 19, count 0 2006.232.07:50:28.54#ibcon#wrote, iclass 19, count 0 2006.232.07:50:28.54#ibcon#about to read 3, iclass 19, count 0 2006.232.07:50:28.56#ibcon#read 3, iclass 19, count 0 2006.232.07:50:28.56#ibcon#about to read 4, iclass 19, count 0 2006.232.07:50:28.56#ibcon#read 4, iclass 19, count 0 2006.232.07:50:28.56#ibcon#about to read 5, iclass 19, count 0 2006.232.07:50:28.56#ibcon#read 5, iclass 19, count 0 2006.232.07:50:28.56#ibcon#about to read 6, iclass 19, count 0 2006.232.07:50:28.56#ibcon#read 6, iclass 19, count 0 2006.232.07:50:28.56#ibcon#end of sib2, iclass 19, count 0 2006.232.07:50:28.56#ibcon#*mode == 0, iclass 19, count 0 2006.232.07:50:28.56#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.232.07:50:28.56#ibcon#[25=USB\r\n] 2006.232.07:50:28.56#ibcon#*before write, iclass 19, count 0 2006.232.07:50:28.56#ibcon#enter sib2, iclass 19, count 0 2006.232.07:50:28.56#ibcon#flushed, iclass 19, count 0 2006.232.07:50:28.56#ibcon#about to write, iclass 19, count 0 2006.232.07:50:28.56#ibcon#wrote, iclass 19, count 0 2006.232.07:50:28.56#ibcon#about to read 3, iclass 19, count 0 2006.232.07:50:28.59#ibcon#read 3, iclass 19, count 0 2006.232.07:50:28.59#ibcon#about to read 4, iclass 19, count 0 2006.232.07:50:28.59#ibcon#read 4, iclass 19, count 0 2006.232.07:50:28.59#ibcon#about to read 5, iclass 19, count 0 2006.232.07:50:28.59#ibcon#read 5, iclass 19, count 0 2006.232.07:50:28.59#ibcon#about to read 6, iclass 19, count 0 2006.232.07:50:28.59#ibcon#read 6, iclass 19, count 0 2006.232.07:50:28.59#ibcon#end of sib2, iclass 19, count 0 2006.232.07:50:28.59#ibcon#*after write, iclass 19, count 0 2006.232.07:50:28.59#ibcon#*before return 0, iclass 19, count 0 2006.232.07:50:28.59#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.232.07:50:28.59#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.232.07:50:28.59#ibcon#about to clear, iclass 19 cls_cnt 0 2006.232.07:50:28.59#ibcon#cleared, iclass 19 cls_cnt 0 2006.232.07:50:28.59$vc4f8/valo=3,672.99 2006.232.07:50:28.59#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.232.07:50:28.59#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.232.07:50:28.59#ibcon#ireg 17 cls_cnt 0 2006.232.07:50:28.59#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.232.07:50:28.59#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.232.07:50:28.59#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.232.07:50:28.59#ibcon#enter wrdev, iclass 21, count 0 2006.232.07:50:28.59#ibcon#first serial, iclass 21, count 0 2006.232.07:50:28.59#ibcon#enter sib2, iclass 21, count 0 2006.232.07:50:28.59#ibcon#flushed, iclass 21, count 0 2006.232.07:50:28.59#ibcon#about to write, iclass 21, count 0 2006.232.07:50:28.59#ibcon#wrote, iclass 21, count 0 2006.232.07:50:28.59#ibcon#about to read 3, iclass 21, count 0 2006.232.07:50:28.61#ibcon#read 3, iclass 21, count 0 2006.232.07:50:28.61#ibcon#about to read 4, iclass 21, count 0 2006.232.07:50:28.61#ibcon#read 4, iclass 21, count 0 2006.232.07:50:28.61#ibcon#about to read 5, iclass 21, count 0 2006.232.07:50:28.61#ibcon#read 5, iclass 21, count 0 2006.232.07:50:28.61#ibcon#about to read 6, iclass 21, count 0 2006.232.07:50:28.61#ibcon#read 6, iclass 21, count 0 2006.232.07:50:28.61#ibcon#end of sib2, iclass 21, count 0 2006.232.07:50:28.61#ibcon#*mode == 0, iclass 21, count 0 2006.232.07:50:28.61#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.232.07:50:28.61#ibcon#[26=FRQ=03,672.99\r\n] 2006.232.07:50:28.61#ibcon#*before write, iclass 21, count 0 2006.232.07:50:28.61#ibcon#enter sib2, iclass 21, count 0 2006.232.07:50:28.61#ibcon#flushed, iclass 21, count 0 2006.232.07:50:28.61#ibcon#about to write, iclass 21, count 0 2006.232.07:50:28.61#ibcon#wrote, iclass 21, count 0 2006.232.07:50:28.61#ibcon#about to read 3, iclass 21, count 0 2006.232.07:50:28.65#ibcon#read 3, iclass 21, count 0 2006.232.07:50:28.65#ibcon#about to read 4, iclass 21, count 0 2006.232.07:50:28.65#ibcon#read 4, iclass 21, count 0 2006.232.07:50:28.65#ibcon#about to read 5, iclass 21, count 0 2006.232.07:50:28.65#ibcon#read 5, iclass 21, count 0 2006.232.07:50:28.65#ibcon#about to read 6, iclass 21, count 0 2006.232.07:50:28.65#ibcon#read 6, iclass 21, count 0 2006.232.07:50:28.65#ibcon#end of sib2, iclass 21, count 0 2006.232.07:50:28.65#ibcon#*after write, iclass 21, count 0 2006.232.07:50:28.65#ibcon#*before return 0, iclass 21, count 0 2006.232.07:50:28.65#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.232.07:50:28.65#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.232.07:50:28.65#ibcon#about to clear, iclass 21 cls_cnt 0 2006.232.07:50:28.65#ibcon#cleared, iclass 21 cls_cnt 0 2006.232.07:50:28.65$vc4f8/va=3,8 2006.232.07:50:28.65#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.232.07:50:28.65#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.232.07:50:28.65#ibcon#ireg 11 cls_cnt 2 2006.232.07:50:28.65#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.232.07:50:28.71#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.232.07:50:28.71#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.232.07:50:28.71#ibcon#enter wrdev, iclass 23, count 2 2006.232.07:50:28.71#ibcon#first serial, iclass 23, count 2 2006.232.07:50:28.71#ibcon#enter sib2, iclass 23, count 2 2006.232.07:50:28.71#ibcon#flushed, iclass 23, count 2 2006.232.07:50:28.71#ibcon#about to write, iclass 23, count 2 2006.232.07:50:28.71#ibcon#wrote, iclass 23, count 2 2006.232.07:50:28.71#ibcon#about to read 3, iclass 23, count 2 2006.232.07:50:28.73#ibcon#read 3, iclass 23, count 2 2006.232.07:50:28.73#ibcon#about to read 4, iclass 23, count 2 2006.232.07:50:28.73#ibcon#read 4, iclass 23, count 2 2006.232.07:50:28.73#ibcon#about to read 5, iclass 23, count 2 2006.232.07:50:28.73#ibcon#read 5, iclass 23, count 2 2006.232.07:50:28.73#ibcon#about to read 6, iclass 23, count 2 2006.232.07:50:28.73#ibcon#read 6, iclass 23, count 2 2006.232.07:50:28.73#ibcon#end of sib2, iclass 23, count 2 2006.232.07:50:28.73#ibcon#*mode == 0, iclass 23, count 2 2006.232.07:50:28.73#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.232.07:50:28.73#ibcon#[25=AT03-08\r\n] 2006.232.07:50:28.73#ibcon#*before write, iclass 23, count 2 2006.232.07:50:28.73#ibcon#enter sib2, iclass 23, count 2 2006.232.07:50:28.73#ibcon#flushed, iclass 23, count 2 2006.232.07:50:28.73#ibcon#about to write, iclass 23, count 2 2006.232.07:50:28.73#ibcon#wrote, iclass 23, count 2 2006.232.07:50:28.73#ibcon#about to read 3, iclass 23, count 2 2006.232.07:50:28.77#ibcon#read 3, iclass 23, count 2 2006.232.07:50:28.77#ibcon#about to read 4, iclass 23, count 2 2006.232.07:50:28.77#ibcon#read 4, iclass 23, count 2 2006.232.07:50:28.77#ibcon#about to read 5, iclass 23, count 2 2006.232.07:50:28.77#ibcon#read 5, iclass 23, count 2 2006.232.07:50:28.77#ibcon#about to read 6, iclass 23, count 2 2006.232.07:50:28.77#ibcon#read 6, iclass 23, count 2 2006.232.07:50:28.77#ibcon#end of sib2, iclass 23, count 2 2006.232.07:50:28.77#ibcon#*after write, iclass 23, count 2 2006.232.07:50:28.77#ibcon#*before return 0, iclass 23, count 2 2006.232.07:50:28.77#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.232.07:50:28.77#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.232.07:50:28.77#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.232.07:50:28.77#ibcon#ireg 7 cls_cnt 0 2006.232.07:50:28.77#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.232.07:50:28.88#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.232.07:50:28.88#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.232.07:50:28.88#ibcon#enter wrdev, iclass 23, count 0 2006.232.07:50:28.88#ibcon#first serial, iclass 23, count 0 2006.232.07:50:28.88#ibcon#enter sib2, iclass 23, count 0 2006.232.07:50:28.88#ibcon#flushed, iclass 23, count 0 2006.232.07:50:28.88#ibcon#about to write, iclass 23, count 0 2006.232.07:50:28.88#ibcon#wrote, iclass 23, count 0 2006.232.07:50:28.88#ibcon#about to read 3, iclass 23, count 0 2006.232.07:50:28.90#ibcon#read 3, iclass 23, count 0 2006.232.07:50:28.90#ibcon#about to read 4, iclass 23, count 0 2006.232.07:50:28.90#ibcon#read 4, iclass 23, count 0 2006.232.07:50:28.90#ibcon#about to read 5, iclass 23, count 0 2006.232.07:50:28.90#ibcon#read 5, iclass 23, count 0 2006.232.07:50:28.90#ibcon#about to read 6, iclass 23, count 0 2006.232.07:50:28.90#ibcon#read 6, iclass 23, count 0 2006.232.07:50:28.90#ibcon#end of sib2, iclass 23, count 0 2006.232.07:50:28.90#ibcon#*mode == 0, iclass 23, count 0 2006.232.07:50:28.90#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.232.07:50:28.90#ibcon#[25=USB\r\n] 2006.232.07:50:28.90#ibcon#*before write, iclass 23, count 0 2006.232.07:50:28.90#ibcon#enter sib2, iclass 23, count 0 2006.232.07:50:28.90#ibcon#flushed, iclass 23, count 0 2006.232.07:50:28.90#ibcon#about to write, iclass 23, count 0 2006.232.07:50:28.90#ibcon#wrote, iclass 23, count 0 2006.232.07:50:28.90#ibcon#about to read 3, iclass 23, count 0 2006.232.07:50:28.93#ibcon#read 3, iclass 23, count 0 2006.232.07:50:28.93#ibcon#about to read 4, iclass 23, count 0 2006.232.07:50:28.93#ibcon#read 4, iclass 23, count 0 2006.232.07:50:28.93#ibcon#about to read 5, iclass 23, count 0 2006.232.07:50:28.93#ibcon#read 5, iclass 23, count 0 2006.232.07:50:28.93#ibcon#about to read 6, iclass 23, count 0 2006.232.07:50:28.93#ibcon#read 6, iclass 23, count 0 2006.232.07:50:28.93#ibcon#end of sib2, iclass 23, count 0 2006.232.07:50:28.93#ibcon#*after write, iclass 23, count 0 2006.232.07:50:28.93#ibcon#*before return 0, iclass 23, count 0 2006.232.07:50:28.93#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.232.07:50:28.93#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.232.07:50:28.93#ibcon#about to clear, iclass 23 cls_cnt 0 2006.232.07:50:28.93#ibcon#cleared, iclass 23 cls_cnt 0 2006.232.07:50:28.93$vc4f8/valo=4,832.99 2006.232.07:50:28.93#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.232.07:50:28.93#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.232.07:50:28.93#ibcon#ireg 17 cls_cnt 0 2006.232.07:50:28.93#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.232.07:50:28.93#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.232.07:50:28.93#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.232.07:50:28.93#ibcon#enter wrdev, iclass 25, count 0 2006.232.07:50:28.93#ibcon#first serial, iclass 25, count 0 2006.232.07:50:28.93#ibcon#enter sib2, iclass 25, count 0 2006.232.07:50:28.93#ibcon#flushed, iclass 25, count 0 2006.232.07:50:28.93#ibcon#about to write, iclass 25, count 0 2006.232.07:50:28.93#ibcon#wrote, iclass 25, count 0 2006.232.07:50:28.93#ibcon#about to read 3, iclass 25, count 0 2006.232.07:50:28.95#ibcon#read 3, iclass 25, count 0 2006.232.07:50:28.95#ibcon#about to read 4, iclass 25, count 0 2006.232.07:50:28.95#ibcon#read 4, iclass 25, count 0 2006.232.07:50:28.95#ibcon#about to read 5, iclass 25, count 0 2006.232.07:50:28.95#ibcon#read 5, iclass 25, count 0 2006.232.07:50:28.95#ibcon#about to read 6, iclass 25, count 0 2006.232.07:50:28.95#ibcon#read 6, iclass 25, count 0 2006.232.07:50:28.95#ibcon#end of sib2, iclass 25, count 0 2006.232.07:50:28.95#ibcon#*mode == 0, iclass 25, count 0 2006.232.07:50:28.95#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.232.07:50:28.95#ibcon#[26=FRQ=04,832.99\r\n] 2006.232.07:50:28.95#ibcon#*before write, iclass 25, count 0 2006.232.07:50:28.95#ibcon#enter sib2, iclass 25, count 0 2006.232.07:50:28.95#ibcon#flushed, iclass 25, count 0 2006.232.07:50:28.95#ibcon#about to write, iclass 25, count 0 2006.232.07:50:28.95#ibcon#wrote, iclass 25, count 0 2006.232.07:50:28.95#ibcon#about to read 3, iclass 25, count 0 2006.232.07:50:28.99#ibcon#read 3, iclass 25, count 0 2006.232.07:50:28.99#ibcon#about to read 4, iclass 25, count 0 2006.232.07:50:28.99#ibcon#read 4, iclass 25, count 0 2006.232.07:50:28.99#ibcon#about to read 5, iclass 25, count 0 2006.232.07:50:28.99#ibcon#read 5, iclass 25, count 0 2006.232.07:50:28.99#ibcon#about to read 6, iclass 25, count 0 2006.232.07:50:28.99#ibcon#read 6, iclass 25, count 0 2006.232.07:50:28.99#ibcon#end of sib2, iclass 25, count 0 2006.232.07:50:28.99#ibcon#*after write, iclass 25, count 0 2006.232.07:50:28.99#ibcon#*before return 0, iclass 25, count 0 2006.232.07:50:28.99#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.232.07:50:28.99#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.232.07:50:28.99#ibcon#about to clear, iclass 25 cls_cnt 0 2006.232.07:50:28.99#ibcon#cleared, iclass 25 cls_cnt 0 2006.232.07:50:28.99$vc4f8/va=4,7 2006.232.07:50:28.99#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.232.07:50:28.99#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.232.07:50:28.99#ibcon#ireg 11 cls_cnt 2 2006.232.07:50:28.99#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.232.07:50:29.05#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.232.07:50:29.05#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.232.07:50:29.05#ibcon#enter wrdev, iclass 27, count 2 2006.232.07:50:29.05#ibcon#first serial, iclass 27, count 2 2006.232.07:50:29.05#ibcon#enter sib2, iclass 27, count 2 2006.232.07:50:29.05#ibcon#flushed, iclass 27, count 2 2006.232.07:50:29.05#ibcon#about to write, iclass 27, count 2 2006.232.07:50:29.05#ibcon#wrote, iclass 27, count 2 2006.232.07:50:29.05#ibcon#about to read 3, iclass 27, count 2 2006.232.07:50:29.07#ibcon#read 3, iclass 27, count 2 2006.232.07:50:29.07#ibcon#about to read 4, iclass 27, count 2 2006.232.07:50:29.07#ibcon#read 4, iclass 27, count 2 2006.232.07:50:29.07#ibcon#about to read 5, iclass 27, count 2 2006.232.07:50:29.07#ibcon#read 5, iclass 27, count 2 2006.232.07:50:29.07#ibcon#about to read 6, iclass 27, count 2 2006.232.07:50:29.07#ibcon#read 6, iclass 27, count 2 2006.232.07:50:29.07#ibcon#end of sib2, iclass 27, count 2 2006.232.07:50:29.07#ibcon#*mode == 0, iclass 27, count 2 2006.232.07:50:29.07#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.232.07:50:29.07#ibcon#[25=AT04-07\r\n] 2006.232.07:50:29.07#ibcon#*before write, iclass 27, count 2 2006.232.07:50:29.07#ibcon#enter sib2, iclass 27, count 2 2006.232.07:50:29.07#ibcon#flushed, iclass 27, count 2 2006.232.07:50:29.07#ibcon#about to write, iclass 27, count 2 2006.232.07:50:29.07#ibcon#wrote, iclass 27, count 2 2006.232.07:50:29.07#ibcon#about to read 3, iclass 27, count 2 2006.232.07:50:29.10#ibcon#read 3, iclass 27, count 2 2006.232.07:50:29.10#ibcon#about to read 4, iclass 27, count 2 2006.232.07:50:29.10#ibcon#read 4, iclass 27, count 2 2006.232.07:50:29.10#ibcon#about to read 5, iclass 27, count 2 2006.232.07:50:29.10#ibcon#read 5, iclass 27, count 2 2006.232.07:50:29.10#ibcon#about to read 6, iclass 27, count 2 2006.232.07:50:29.10#ibcon#read 6, iclass 27, count 2 2006.232.07:50:29.10#ibcon#end of sib2, iclass 27, count 2 2006.232.07:50:29.10#ibcon#*after write, iclass 27, count 2 2006.232.07:50:29.10#ibcon#*before return 0, iclass 27, count 2 2006.232.07:50:29.10#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.232.07:50:29.10#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.232.07:50:29.10#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.232.07:50:29.10#ibcon#ireg 7 cls_cnt 0 2006.232.07:50:29.10#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.232.07:50:29.22#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.232.07:50:29.22#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.232.07:50:29.22#ibcon#enter wrdev, iclass 27, count 0 2006.232.07:50:29.22#ibcon#first serial, iclass 27, count 0 2006.232.07:50:29.22#ibcon#enter sib2, iclass 27, count 0 2006.232.07:50:29.22#ibcon#flushed, iclass 27, count 0 2006.232.07:50:29.22#ibcon#about to write, iclass 27, count 0 2006.232.07:50:29.22#ibcon#wrote, iclass 27, count 0 2006.232.07:50:29.22#ibcon#about to read 3, iclass 27, count 0 2006.232.07:50:29.24#ibcon#read 3, iclass 27, count 0 2006.232.07:50:29.24#ibcon#about to read 4, iclass 27, count 0 2006.232.07:50:29.24#ibcon#read 4, iclass 27, count 0 2006.232.07:50:29.24#ibcon#about to read 5, iclass 27, count 0 2006.232.07:50:29.24#ibcon#read 5, iclass 27, count 0 2006.232.07:50:29.24#ibcon#about to read 6, iclass 27, count 0 2006.232.07:50:29.24#ibcon#read 6, iclass 27, count 0 2006.232.07:50:29.24#ibcon#end of sib2, iclass 27, count 0 2006.232.07:50:29.24#ibcon#*mode == 0, iclass 27, count 0 2006.232.07:50:29.24#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.232.07:50:29.24#ibcon#[25=USB\r\n] 2006.232.07:50:29.24#ibcon#*before write, iclass 27, count 0 2006.232.07:50:29.24#ibcon#enter sib2, iclass 27, count 0 2006.232.07:50:29.24#ibcon#flushed, iclass 27, count 0 2006.232.07:50:29.24#ibcon#about to write, iclass 27, count 0 2006.232.07:50:29.24#ibcon#wrote, iclass 27, count 0 2006.232.07:50:29.24#ibcon#about to read 3, iclass 27, count 0 2006.232.07:50:29.27#ibcon#read 3, iclass 27, count 0 2006.232.07:50:29.27#ibcon#about to read 4, iclass 27, count 0 2006.232.07:50:29.27#ibcon#read 4, iclass 27, count 0 2006.232.07:50:29.27#ibcon#about to read 5, iclass 27, count 0 2006.232.07:50:29.27#ibcon#read 5, iclass 27, count 0 2006.232.07:50:29.27#ibcon#about to read 6, iclass 27, count 0 2006.232.07:50:29.27#ibcon#read 6, iclass 27, count 0 2006.232.07:50:29.27#ibcon#end of sib2, iclass 27, count 0 2006.232.07:50:29.27#ibcon#*after write, iclass 27, count 0 2006.232.07:50:29.27#ibcon#*before return 0, iclass 27, count 0 2006.232.07:50:29.27#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.232.07:50:29.27#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.232.07:50:29.27#ibcon#about to clear, iclass 27 cls_cnt 0 2006.232.07:50:29.27#ibcon#cleared, iclass 27 cls_cnt 0 2006.232.07:50:29.27$vc4f8/valo=5,652.99 2006.232.07:50:29.27#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.232.07:50:29.27#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.232.07:50:29.27#ibcon#ireg 17 cls_cnt 0 2006.232.07:50:29.27#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:50:29.27#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:50:29.27#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:50:29.27#ibcon#enter wrdev, iclass 29, count 0 2006.232.07:50:29.27#ibcon#first serial, iclass 29, count 0 2006.232.07:50:29.27#ibcon#enter sib2, iclass 29, count 0 2006.232.07:50:29.27#ibcon#flushed, iclass 29, count 0 2006.232.07:50:29.27#ibcon#about to write, iclass 29, count 0 2006.232.07:50:29.27#ibcon#wrote, iclass 29, count 0 2006.232.07:50:29.27#ibcon#about to read 3, iclass 29, count 0 2006.232.07:50:29.29#ibcon#read 3, iclass 29, count 0 2006.232.07:50:29.29#ibcon#about to read 4, iclass 29, count 0 2006.232.07:50:29.29#ibcon#read 4, iclass 29, count 0 2006.232.07:50:29.29#ibcon#about to read 5, iclass 29, count 0 2006.232.07:50:29.29#ibcon#read 5, iclass 29, count 0 2006.232.07:50:29.29#ibcon#about to read 6, iclass 29, count 0 2006.232.07:50:29.29#ibcon#read 6, iclass 29, count 0 2006.232.07:50:29.29#ibcon#end of sib2, iclass 29, count 0 2006.232.07:50:29.29#ibcon#*mode == 0, iclass 29, count 0 2006.232.07:50:29.29#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.232.07:50:29.29#ibcon#[26=FRQ=05,652.99\r\n] 2006.232.07:50:29.29#ibcon#*before write, iclass 29, count 0 2006.232.07:50:29.29#ibcon#enter sib2, iclass 29, count 0 2006.232.07:50:29.29#ibcon#flushed, iclass 29, count 0 2006.232.07:50:29.29#ibcon#about to write, iclass 29, count 0 2006.232.07:50:29.29#ibcon#wrote, iclass 29, count 0 2006.232.07:50:29.29#ibcon#about to read 3, iclass 29, count 0 2006.232.07:50:29.33#ibcon#read 3, iclass 29, count 0 2006.232.07:50:29.33#ibcon#about to read 4, iclass 29, count 0 2006.232.07:50:29.33#ibcon#read 4, iclass 29, count 0 2006.232.07:50:29.33#ibcon#about to read 5, iclass 29, count 0 2006.232.07:50:29.33#ibcon#read 5, iclass 29, count 0 2006.232.07:50:29.33#ibcon#about to read 6, iclass 29, count 0 2006.232.07:50:29.33#ibcon#read 6, iclass 29, count 0 2006.232.07:50:29.33#ibcon#end of sib2, iclass 29, count 0 2006.232.07:50:29.33#ibcon#*after write, iclass 29, count 0 2006.232.07:50:29.33#ibcon#*before return 0, iclass 29, count 0 2006.232.07:50:29.33#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:50:29.33#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:50:29.33#ibcon#about to clear, iclass 29 cls_cnt 0 2006.232.07:50:29.33#ibcon#cleared, iclass 29 cls_cnt 0 2006.232.07:50:29.33$vc4f8/va=5,7 2006.232.07:50:29.33#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.232.07:50:29.33#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.232.07:50:29.33#ibcon#ireg 11 cls_cnt 2 2006.232.07:50:29.33#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.232.07:50:29.39#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.232.07:50:29.39#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.232.07:50:29.39#ibcon#enter wrdev, iclass 31, count 2 2006.232.07:50:29.39#ibcon#first serial, iclass 31, count 2 2006.232.07:50:29.39#ibcon#enter sib2, iclass 31, count 2 2006.232.07:50:29.39#ibcon#flushed, iclass 31, count 2 2006.232.07:50:29.39#ibcon#about to write, iclass 31, count 2 2006.232.07:50:29.39#ibcon#wrote, iclass 31, count 2 2006.232.07:50:29.39#ibcon#about to read 3, iclass 31, count 2 2006.232.07:50:29.41#ibcon#read 3, iclass 31, count 2 2006.232.07:50:29.41#ibcon#about to read 4, iclass 31, count 2 2006.232.07:50:29.41#ibcon#read 4, iclass 31, count 2 2006.232.07:50:29.41#ibcon#about to read 5, iclass 31, count 2 2006.232.07:50:29.41#ibcon#read 5, iclass 31, count 2 2006.232.07:50:29.41#ibcon#about to read 6, iclass 31, count 2 2006.232.07:50:29.41#ibcon#read 6, iclass 31, count 2 2006.232.07:50:29.41#ibcon#end of sib2, iclass 31, count 2 2006.232.07:50:29.41#ibcon#*mode == 0, iclass 31, count 2 2006.232.07:50:29.41#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.232.07:50:29.41#ibcon#[25=AT05-07\r\n] 2006.232.07:50:29.41#ibcon#*before write, iclass 31, count 2 2006.232.07:50:29.41#ibcon#enter sib2, iclass 31, count 2 2006.232.07:50:29.41#ibcon#flushed, iclass 31, count 2 2006.232.07:50:29.41#ibcon#about to write, iclass 31, count 2 2006.232.07:50:29.41#ibcon#wrote, iclass 31, count 2 2006.232.07:50:29.41#ibcon#about to read 3, iclass 31, count 2 2006.232.07:50:29.44#ibcon#read 3, iclass 31, count 2 2006.232.07:50:29.44#ibcon#about to read 4, iclass 31, count 2 2006.232.07:50:29.44#ibcon#read 4, iclass 31, count 2 2006.232.07:50:29.44#ibcon#about to read 5, iclass 31, count 2 2006.232.07:50:29.44#ibcon#read 5, iclass 31, count 2 2006.232.07:50:29.44#ibcon#about to read 6, iclass 31, count 2 2006.232.07:50:29.44#ibcon#read 6, iclass 31, count 2 2006.232.07:50:29.44#ibcon#end of sib2, iclass 31, count 2 2006.232.07:50:29.44#ibcon#*after write, iclass 31, count 2 2006.232.07:50:29.44#ibcon#*before return 0, iclass 31, count 2 2006.232.07:50:29.44#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.232.07:50:29.44#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.232.07:50:29.44#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.232.07:50:29.44#ibcon#ireg 7 cls_cnt 0 2006.232.07:50:29.44#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.232.07:50:29.56#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.232.07:50:29.56#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.232.07:50:29.56#ibcon#enter wrdev, iclass 31, count 0 2006.232.07:50:29.56#ibcon#first serial, iclass 31, count 0 2006.232.07:50:29.56#ibcon#enter sib2, iclass 31, count 0 2006.232.07:50:29.56#ibcon#flushed, iclass 31, count 0 2006.232.07:50:29.56#ibcon#about to write, iclass 31, count 0 2006.232.07:50:29.56#ibcon#wrote, iclass 31, count 0 2006.232.07:50:29.56#ibcon#about to read 3, iclass 31, count 0 2006.232.07:50:29.58#ibcon#read 3, iclass 31, count 0 2006.232.07:50:29.58#ibcon#about to read 4, iclass 31, count 0 2006.232.07:50:29.58#ibcon#read 4, iclass 31, count 0 2006.232.07:50:29.58#ibcon#about to read 5, iclass 31, count 0 2006.232.07:50:29.58#ibcon#read 5, iclass 31, count 0 2006.232.07:50:29.58#ibcon#about to read 6, iclass 31, count 0 2006.232.07:50:29.58#ibcon#read 6, iclass 31, count 0 2006.232.07:50:29.58#ibcon#end of sib2, iclass 31, count 0 2006.232.07:50:29.58#ibcon#*mode == 0, iclass 31, count 0 2006.232.07:50:29.58#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.232.07:50:29.58#ibcon#[25=USB\r\n] 2006.232.07:50:29.58#ibcon#*before write, iclass 31, count 0 2006.232.07:50:29.58#ibcon#enter sib2, iclass 31, count 0 2006.232.07:50:29.58#ibcon#flushed, iclass 31, count 0 2006.232.07:50:29.58#ibcon#about to write, iclass 31, count 0 2006.232.07:50:29.58#ibcon#wrote, iclass 31, count 0 2006.232.07:50:29.58#ibcon#about to read 3, iclass 31, count 0 2006.232.07:50:29.61#ibcon#read 3, iclass 31, count 0 2006.232.07:50:29.61#ibcon#about to read 4, iclass 31, count 0 2006.232.07:50:29.61#ibcon#read 4, iclass 31, count 0 2006.232.07:50:29.61#ibcon#about to read 5, iclass 31, count 0 2006.232.07:50:29.61#ibcon#read 5, iclass 31, count 0 2006.232.07:50:29.61#ibcon#about to read 6, iclass 31, count 0 2006.232.07:50:29.61#ibcon#read 6, iclass 31, count 0 2006.232.07:50:29.61#ibcon#end of sib2, iclass 31, count 0 2006.232.07:50:29.61#ibcon#*after write, iclass 31, count 0 2006.232.07:50:29.61#ibcon#*before return 0, iclass 31, count 0 2006.232.07:50:29.61#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.232.07:50:29.61#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.232.07:50:29.61#ibcon#about to clear, iclass 31 cls_cnt 0 2006.232.07:50:29.61#ibcon#cleared, iclass 31 cls_cnt 0 2006.232.07:50:29.61$vc4f8/valo=6,772.99 2006.232.07:50:29.61#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.232.07:50:29.61#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.232.07:50:29.61#ibcon#ireg 17 cls_cnt 0 2006.232.07:50:29.61#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.232.07:50:29.61#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.232.07:50:29.61#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.232.07:50:29.61#ibcon#enter wrdev, iclass 33, count 0 2006.232.07:50:29.61#ibcon#first serial, iclass 33, count 0 2006.232.07:50:29.61#ibcon#enter sib2, iclass 33, count 0 2006.232.07:50:29.61#ibcon#flushed, iclass 33, count 0 2006.232.07:50:29.61#ibcon#about to write, iclass 33, count 0 2006.232.07:50:29.61#ibcon#wrote, iclass 33, count 0 2006.232.07:50:29.61#ibcon#about to read 3, iclass 33, count 0 2006.232.07:50:29.63#ibcon#read 3, iclass 33, count 0 2006.232.07:50:29.63#ibcon#about to read 4, iclass 33, count 0 2006.232.07:50:29.63#ibcon#read 4, iclass 33, count 0 2006.232.07:50:29.63#ibcon#about to read 5, iclass 33, count 0 2006.232.07:50:29.63#ibcon#read 5, iclass 33, count 0 2006.232.07:50:29.63#ibcon#about to read 6, iclass 33, count 0 2006.232.07:50:29.63#ibcon#read 6, iclass 33, count 0 2006.232.07:50:29.63#ibcon#end of sib2, iclass 33, count 0 2006.232.07:50:29.63#ibcon#*mode == 0, iclass 33, count 0 2006.232.07:50:29.63#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.232.07:50:29.63#ibcon#[26=FRQ=06,772.99\r\n] 2006.232.07:50:29.63#ibcon#*before write, iclass 33, count 0 2006.232.07:50:29.63#ibcon#enter sib2, iclass 33, count 0 2006.232.07:50:29.63#ibcon#flushed, iclass 33, count 0 2006.232.07:50:29.63#ibcon#about to write, iclass 33, count 0 2006.232.07:50:29.63#ibcon#wrote, iclass 33, count 0 2006.232.07:50:29.63#ibcon#about to read 3, iclass 33, count 0 2006.232.07:50:29.67#ibcon#read 3, iclass 33, count 0 2006.232.07:50:29.67#ibcon#about to read 4, iclass 33, count 0 2006.232.07:50:29.67#ibcon#read 4, iclass 33, count 0 2006.232.07:50:29.67#ibcon#about to read 5, iclass 33, count 0 2006.232.07:50:29.67#ibcon#read 5, iclass 33, count 0 2006.232.07:50:29.67#ibcon#about to read 6, iclass 33, count 0 2006.232.07:50:29.67#ibcon#read 6, iclass 33, count 0 2006.232.07:50:29.67#ibcon#end of sib2, iclass 33, count 0 2006.232.07:50:29.67#ibcon#*after write, iclass 33, count 0 2006.232.07:50:29.67#ibcon#*before return 0, iclass 33, count 0 2006.232.07:50:29.67#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.232.07:50:29.67#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.232.07:50:29.67#ibcon#about to clear, iclass 33 cls_cnt 0 2006.232.07:50:29.67#ibcon#cleared, iclass 33 cls_cnt 0 2006.232.07:50:29.67$vc4f8/va=6,6 2006.232.07:50:29.67#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.232.07:50:29.67#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.232.07:50:29.67#ibcon#ireg 11 cls_cnt 2 2006.232.07:50:29.67#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.232.07:50:29.73#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.232.07:50:29.73#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.232.07:50:29.73#ibcon#enter wrdev, iclass 35, count 2 2006.232.07:50:29.73#ibcon#first serial, iclass 35, count 2 2006.232.07:50:29.73#ibcon#enter sib2, iclass 35, count 2 2006.232.07:50:29.73#ibcon#flushed, iclass 35, count 2 2006.232.07:50:29.73#ibcon#about to write, iclass 35, count 2 2006.232.07:50:29.73#ibcon#wrote, iclass 35, count 2 2006.232.07:50:29.73#ibcon#about to read 3, iclass 35, count 2 2006.232.07:50:29.75#ibcon#read 3, iclass 35, count 2 2006.232.07:50:29.75#ibcon#about to read 4, iclass 35, count 2 2006.232.07:50:29.75#ibcon#read 4, iclass 35, count 2 2006.232.07:50:29.75#ibcon#about to read 5, iclass 35, count 2 2006.232.07:50:29.75#ibcon#read 5, iclass 35, count 2 2006.232.07:50:29.75#ibcon#about to read 6, iclass 35, count 2 2006.232.07:50:29.75#ibcon#read 6, iclass 35, count 2 2006.232.07:50:29.75#ibcon#end of sib2, iclass 35, count 2 2006.232.07:50:29.75#ibcon#*mode == 0, iclass 35, count 2 2006.232.07:50:29.75#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.232.07:50:29.75#ibcon#[25=AT06-06\r\n] 2006.232.07:50:29.75#ibcon#*before write, iclass 35, count 2 2006.232.07:50:29.75#ibcon#enter sib2, iclass 35, count 2 2006.232.07:50:29.75#ibcon#flushed, iclass 35, count 2 2006.232.07:50:29.75#ibcon#about to write, iclass 35, count 2 2006.232.07:50:29.75#ibcon#wrote, iclass 35, count 2 2006.232.07:50:29.75#ibcon#about to read 3, iclass 35, count 2 2006.232.07:50:29.78#ibcon#read 3, iclass 35, count 2 2006.232.07:50:29.78#ibcon#about to read 4, iclass 35, count 2 2006.232.07:50:29.78#ibcon#read 4, iclass 35, count 2 2006.232.07:50:29.78#ibcon#about to read 5, iclass 35, count 2 2006.232.07:50:29.78#ibcon#read 5, iclass 35, count 2 2006.232.07:50:29.78#ibcon#about to read 6, iclass 35, count 2 2006.232.07:50:29.78#ibcon#read 6, iclass 35, count 2 2006.232.07:50:29.78#ibcon#end of sib2, iclass 35, count 2 2006.232.07:50:29.78#ibcon#*after write, iclass 35, count 2 2006.232.07:50:29.78#ibcon#*before return 0, iclass 35, count 2 2006.232.07:50:29.78#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.232.07:50:29.78#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.232.07:50:29.78#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.232.07:50:29.78#ibcon#ireg 7 cls_cnt 0 2006.232.07:50:29.78#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.232.07:50:29.90#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.232.07:50:29.90#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.232.07:50:29.90#ibcon#enter wrdev, iclass 35, count 0 2006.232.07:50:29.90#ibcon#first serial, iclass 35, count 0 2006.232.07:50:29.90#ibcon#enter sib2, iclass 35, count 0 2006.232.07:50:29.90#ibcon#flushed, iclass 35, count 0 2006.232.07:50:29.90#ibcon#about to write, iclass 35, count 0 2006.232.07:50:29.90#ibcon#wrote, iclass 35, count 0 2006.232.07:50:29.90#ibcon#about to read 3, iclass 35, count 0 2006.232.07:50:29.92#ibcon#read 3, iclass 35, count 0 2006.232.07:50:29.92#ibcon#about to read 4, iclass 35, count 0 2006.232.07:50:29.92#ibcon#read 4, iclass 35, count 0 2006.232.07:50:29.92#ibcon#about to read 5, iclass 35, count 0 2006.232.07:50:29.92#ibcon#read 5, iclass 35, count 0 2006.232.07:50:29.92#ibcon#about to read 6, iclass 35, count 0 2006.232.07:50:29.92#ibcon#read 6, iclass 35, count 0 2006.232.07:50:29.92#ibcon#end of sib2, iclass 35, count 0 2006.232.07:50:29.92#ibcon#*mode == 0, iclass 35, count 0 2006.232.07:50:29.92#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.232.07:50:29.92#ibcon#[25=USB\r\n] 2006.232.07:50:29.92#ibcon#*before write, iclass 35, count 0 2006.232.07:50:29.92#ibcon#enter sib2, iclass 35, count 0 2006.232.07:50:29.92#ibcon#flushed, iclass 35, count 0 2006.232.07:50:29.92#ibcon#about to write, iclass 35, count 0 2006.232.07:50:29.92#ibcon#wrote, iclass 35, count 0 2006.232.07:50:29.92#ibcon#about to read 3, iclass 35, count 0 2006.232.07:50:29.95#ibcon#read 3, iclass 35, count 0 2006.232.07:50:29.95#ibcon#about to read 4, iclass 35, count 0 2006.232.07:50:29.95#ibcon#read 4, iclass 35, count 0 2006.232.07:50:29.95#ibcon#about to read 5, iclass 35, count 0 2006.232.07:50:29.95#ibcon#read 5, iclass 35, count 0 2006.232.07:50:29.95#ibcon#about to read 6, iclass 35, count 0 2006.232.07:50:29.95#ibcon#read 6, iclass 35, count 0 2006.232.07:50:29.95#ibcon#end of sib2, iclass 35, count 0 2006.232.07:50:29.95#ibcon#*after write, iclass 35, count 0 2006.232.07:50:29.95#ibcon#*before return 0, iclass 35, count 0 2006.232.07:50:29.95#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.232.07:50:29.95#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.232.07:50:29.95#ibcon#about to clear, iclass 35 cls_cnt 0 2006.232.07:50:29.95#ibcon#cleared, iclass 35 cls_cnt 0 2006.232.07:50:29.95$vc4f8/valo=7,832.99 2006.232.07:50:29.95#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.232.07:50:29.95#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.232.07:50:29.95#ibcon#ireg 17 cls_cnt 0 2006.232.07:50:29.95#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.232.07:50:29.95#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.232.07:50:29.95#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.232.07:50:29.95#ibcon#enter wrdev, iclass 37, count 0 2006.232.07:50:29.95#ibcon#first serial, iclass 37, count 0 2006.232.07:50:29.95#ibcon#enter sib2, iclass 37, count 0 2006.232.07:50:29.95#ibcon#flushed, iclass 37, count 0 2006.232.07:50:29.95#ibcon#about to write, iclass 37, count 0 2006.232.07:50:29.95#ibcon#wrote, iclass 37, count 0 2006.232.07:50:29.95#ibcon#about to read 3, iclass 37, count 0 2006.232.07:50:29.97#ibcon#read 3, iclass 37, count 0 2006.232.07:50:29.97#ibcon#about to read 4, iclass 37, count 0 2006.232.07:50:29.97#ibcon#read 4, iclass 37, count 0 2006.232.07:50:29.97#ibcon#about to read 5, iclass 37, count 0 2006.232.07:50:29.97#ibcon#read 5, iclass 37, count 0 2006.232.07:50:29.97#ibcon#about to read 6, iclass 37, count 0 2006.232.07:50:29.97#ibcon#read 6, iclass 37, count 0 2006.232.07:50:29.97#ibcon#end of sib2, iclass 37, count 0 2006.232.07:50:29.97#ibcon#*mode == 0, iclass 37, count 0 2006.232.07:50:29.97#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.232.07:50:29.97#ibcon#[26=FRQ=07,832.99\r\n] 2006.232.07:50:29.97#ibcon#*before write, iclass 37, count 0 2006.232.07:50:29.97#ibcon#enter sib2, iclass 37, count 0 2006.232.07:50:29.97#ibcon#flushed, iclass 37, count 0 2006.232.07:50:29.97#ibcon#about to write, iclass 37, count 0 2006.232.07:50:29.97#ibcon#wrote, iclass 37, count 0 2006.232.07:50:29.97#ibcon#about to read 3, iclass 37, count 0 2006.232.07:50:30.01#ibcon#read 3, iclass 37, count 0 2006.232.07:50:30.01#ibcon#about to read 4, iclass 37, count 0 2006.232.07:50:30.01#ibcon#read 4, iclass 37, count 0 2006.232.07:50:30.01#ibcon#about to read 5, iclass 37, count 0 2006.232.07:50:30.01#ibcon#read 5, iclass 37, count 0 2006.232.07:50:30.01#ibcon#about to read 6, iclass 37, count 0 2006.232.07:50:30.01#ibcon#read 6, iclass 37, count 0 2006.232.07:50:30.01#ibcon#end of sib2, iclass 37, count 0 2006.232.07:50:30.01#ibcon#*after write, iclass 37, count 0 2006.232.07:50:30.01#ibcon#*before return 0, iclass 37, count 0 2006.232.07:50:30.01#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.232.07:50:30.01#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.232.07:50:30.01#ibcon#about to clear, iclass 37 cls_cnt 0 2006.232.07:50:30.01#ibcon#cleared, iclass 37 cls_cnt 0 2006.232.07:50:30.01$vc4f8/va=7,6 2006.232.07:50:30.01#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.232.07:50:30.01#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.232.07:50:30.01#ibcon#ireg 11 cls_cnt 2 2006.232.07:50:30.01#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.232.07:50:30.07#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.232.07:50:30.07#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.232.07:50:30.07#ibcon#enter wrdev, iclass 39, count 2 2006.232.07:50:30.07#ibcon#first serial, iclass 39, count 2 2006.232.07:50:30.07#ibcon#enter sib2, iclass 39, count 2 2006.232.07:50:30.07#ibcon#flushed, iclass 39, count 2 2006.232.07:50:30.07#ibcon#about to write, iclass 39, count 2 2006.232.07:50:30.07#ibcon#wrote, iclass 39, count 2 2006.232.07:50:30.07#ibcon#about to read 3, iclass 39, count 2 2006.232.07:50:30.09#ibcon#read 3, iclass 39, count 2 2006.232.07:50:30.09#ibcon#about to read 4, iclass 39, count 2 2006.232.07:50:30.09#ibcon#read 4, iclass 39, count 2 2006.232.07:50:30.09#ibcon#about to read 5, iclass 39, count 2 2006.232.07:50:30.09#ibcon#read 5, iclass 39, count 2 2006.232.07:50:30.09#ibcon#about to read 6, iclass 39, count 2 2006.232.07:50:30.09#ibcon#read 6, iclass 39, count 2 2006.232.07:50:30.09#ibcon#end of sib2, iclass 39, count 2 2006.232.07:50:30.09#ibcon#*mode == 0, iclass 39, count 2 2006.232.07:50:30.09#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.232.07:50:30.09#ibcon#[25=AT07-06\r\n] 2006.232.07:50:30.09#ibcon#*before write, iclass 39, count 2 2006.232.07:50:30.09#ibcon#enter sib2, iclass 39, count 2 2006.232.07:50:30.09#ibcon#flushed, iclass 39, count 2 2006.232.07:50:30.09#ibcon#about to write, iclass 39, count 2 2006.232.07:50:30.09#ibcon#wrote, iclass 39, count 2 2006.232.07:50:30.09#ibcon#about to read 3, iclass 39, count 2 2006.232.07:50:30.12#ibcon#read 3, iclass 39, count 2 2006.232.07:50:30.12#ibcon#about to read 4, iclass 39, count 2 2006.232.07:50:30.12#ibcon#read 4, iclass 39, count 2 2006.232.07:50:30.12#ibcon#about to read 5, iclass 39, count 2 2006.232.07:50:30.12#ibcon#read 5, iclass 39, count 2 2006.232.07:50:30.12#ibcon#about to read 6, iclass 39, count 2 2006.232.07:50:30.12#ibcon#read 6, iclass 39, count 2 2006.232.07:50:30.12#ibcon#end of sib2, iclass 39, count 2 2006.232.07:50:30.12#ibcon#*after write, iclass 39, count 2 2006.232.07:50:30.12#ibcon#*before return 0, iclass 39, count 2 2006.232.07:50:30.12#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.232.07:50:30.12#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.232.07:50:30.12#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.232.07:50:30.12#ibcon#ireg 7 cls_cnt 0 2006.232.07:50:30.12#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.232.07:50:30.24#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.232.07:50:30.24#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.232.07:50:30.24#ibcon#enter wrdev, iclass 39, count 0 2006.232.07:50:30.24#ibcon#first serial, iclass 39, count 0 2006.232.07:50:30.24#ibcon#enter sib2, iclass 39, count 0 2006.232.07:50:30.24#ibcon#flushed, iclass 39, count 0 2006.232.07:50:30.24#ibcon#about to write, iclass 39, count 0 2006.232.07:50:30.24#ibcon#wrote, iclass 39, count 0 2006.232.07:50:30.24#ibcon#about to read 3, iclass 39, count 0 2006.232.07:50:30.26#ibcon#read 3, iclass 39, count 0 2006.232.07:50:30.26#ibcon#about to read 4, iclass 39, count 0 2006.232.07:50:30.26#ibcon#read 4, iclass 39, count 0 2006.232.07:50:30.26#ibcon#about to read 5, iclass 39, count 0 2006.232.07:50:30.26#ibcon#read 5, iclass 39, count 0 2006.232.07:50:30.26#ibcon#about to read 6, iclass 39, count 0 2006.232.07:50:30.26#ibcon#read 6, iclass 39, count 0 2006.232.07:50:30.26#ibcon#end of sib2, iclass 39, count 0 2006.232.07:50:30.26#ibcon#*mode == 0, iclass 39, count 0 2006.232.07:50:30.26#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.232.07:50:30.26#ibcon#[25=USB\r\n] 2006.232.07:50:30.26#ibcon#*before write, iclass 39, count 0 2006.232.07:50:30.26#ibcon#enter sib2, iclass 39, count 0 2006.232.07:50:30.26#ibcon#flushed, iclass 39, count 0 2006.232.07:50:30.26#ibcon#about to write, iclass 39, count 0 2006.232.07:50:30.26#ibcon#wrote, iclass 39, count 0 2006.232.07:50:30.26#ibcon#about to read 3, iclass 39, count 0 2006.232.07:50:30.29#ibcon#read 3, iclass 39, count 0 2006.232.07:50:30.29#ibcon#about to read 4, iclass 39, count 0 2006.232.07:50:30.29#ibcon#read 4, iclass 39, count 0 2006.232.07:50:30.29#ibcon#about to read 5, iclass 39, count 0 2006.232.07:50:30.29#ibcon#read 5, iclass 39, count 0 2006.232.07:50:30.29#ibcon#about to read 6, iclass 39, count 0 2006.232.07:50:30.29#ibcon#read 6, iclass 39, count 0 2006.232.07:50:30.29#ibcon#end of sib2, iclass 39, count 0 2006.232.07:50:30.29#ibcon#*after write, iclass 39, count 0 2006.232.07:50:30.29#ibcon#*before return 0, iclass 39, count 0 2006.232.07:50:30.29#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.232.07:50:30.29#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.232.07:50:30.29#ibcon#about to clear, iclass 39 cls_cnt 0 2006.232.07:50:30.29#ibcon#cleared, iclass 39 cls_cnt 0 2006.232.07:50:30.29$vc4f8/valo=8,852.99 2006.232.07:50:30.29#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.232.07:50:30.29#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.232.07:50:30.29#ibcon#ireg 17 cls_cnt 0 2006.232.07:50:30.29#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.232.07:50:30.29#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.232.07:50:30.29#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.232.07:50:30.29#ibcon#enter wrdev, iclass 3, count 0 2006.232.07:50:30.29#ibcon#first serial, iclass 3, count 0 2006.232.07:50:30.29#ibcon#enter sib2, iclass 3, count 0 2006.232.07:50:30.29#ibcon#flushed, iclass 3, count 0 2006.232.07:50:30.29#ibcon#about to write, iclass 3, count 0 2006.232.07:50:30.29#ibcon#wrote, iclass 3, count 0 2006.232.07:50:30.29#ibcon#about to read 3, iclass 3, count 0 2006.232.07:50:30.31#ibcon#read 3, iclass 3, count 0 2006.232.07:50:30.31#ibcon#about to read 4, iclass 3, count 0 2006.232.07:50:30.31#ibcon#read 4, iclass 3, count 0 2006.232.07:50:30.31#ibcon#about to read 5, iclass 3, count 0 2006.232.07:50:30.31#ibcon#read 5, iclass 3, count 0 2006.232.07:50:30.31#ibcon#about to read 6, iclass 3, count 0 2006.232.07:50:30.31#ibcon#read 6, iclass 3, count 0 2006.232.07:50:30.31#ibcon#end of sib2, iclass 3, count 0 2006.232.07:50:30.31#ibcon#*mode == 0, iclass 3, count 0 2006.232.07:50:30.31#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.232.07:50:30.31#ibcon#[26=FRQ=08,852.99\r\n] 2006.232.07:50:30.31#ibcon#*before write, iclass 3, count 0 2006.232.07:50:30.31#ibcon#enter sib2, iclass 3, count 0 2006.232.07:50:30.31#ibcon#flushed, iclass 3, count 0 2006.232.07:50:30.31#ibcon#about to write, iclass 3, count 0 2006.232.07:50:30.31#ibcon#wrote, iclass 3, count 0 2006.232.07:50:30.31#ibcon#about to read 3, iclass 3, count 0 2006.232.07:50:30.35#ibcon#read 3, iclass 3, count 0 2006.232.07:50:30.35#ibcon#about to read 4, iclass 3, count 0 2006.232.07:50:30.35#ibcon#read 4, iclass 3, count 0 2006.232.07:50:30.35#ibcon#about to read 5, iclass 3, count 0 2006.232.07:50:30.35#ibcon#read 5, iclass 3, count 0 2006.232.07:50:30.35#ibcon#about to read 6, iclass 3, count 0 2006.232.07:50:30.35#ibcon#read 6, iclass 3, count 0 2006.232.07:50:30.35#ibcon#end of sib2, iclass 3, count 0 2006.232.07:50:30.35#ibcon#*after write, iclass 3, count 0 2006.232.07:50:30.35#ibcon#*before return 0, iclass 3, count 0 2006.232.07:50:30.35#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.232.07:50:30.35#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.232.07:50:30.35#ibcon#about to clear, iclass 3 cls_cnt 0 2006.232.07:50:30.35#ibcon#cleared, iclass 3 cls_cnt 0 2006.232.07:50:30.35$vc4f8/va=8,6 2006.232.07:50:30.35#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.232.07:50:30.35#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.232.07:50:30.35#ibcon#ireg 11 cls_cnt 2 2006.232.07:50:30.35#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.232.07:50:30.41#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.232.07:50:30.41#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.232.07:50:30.41#ibcon#enter wrdev, iclass 5, count 2 2006.232.07:50:30.41#ibcon#first serial, iclass 5, count 2 2006.232.07:50:30.41#ibcon#enter sib2, iclass 5, count 2 2006.232.07:50:30.41#ibcon#flushed, iclass 5, count 2 2006.232.07:50:30.41#ibcon#about to write, iclass 5, count 2 2006.232.07:50:30.41#ibcon#wrote, iclass 5, count 2 2006.232.07:50:30.41#ibcon#about to read 3, iclass 5, count 2 2006.232.07:50:30.43#ibcon#read 3, iclass 5, count 2 2006.232.07:50:30.43#ibcon#about to read 4, iclass 5, count 2 2006.232.07:50:30.43#ibcon#read 4, iclass 5, count 2 2006.232.07:50:30.43#ibcon#about to read 5, iclass 5, count 2 2006.232.07:50:30.43#ibcon#read 5, iclass 5, count 2 2006.232.07:50:30.43#ibcon#about to read 6, iclass 5, count 2 2006.232.07:50:30.43#ibcon#read 6, iclass 5, count 2 2006.232.07:50:30.43#ibcon#end of sib2, iclass 5, count 2 2006.232.07:50:30.43#ibcon#*mode == 0, iclass 5, count 2 2006.232.07:50:30.43#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.232.07:50:30.43#ibcon#[25=AT08-06\r\n] 2006.232.07:50:30.43#ibcon#*before write, iclass 5, count 2 2006.232.07:50:30.43#ibcon#enter sib2, iclass 5, count 2 2006.232.07:50:30.43#ibcon#flushed, iclass 5, count 2 2006.232.07:50:30.43#ibcon#about to write, iclass 5, count 2 2006.232.07:50:30.43#ibcon#wrote, iclass 5, count 2 2006.232.07:50:30.43#ibcon#about to read 3, iclass 5, count 2 2006.232.07:50:30.46#ibcon#read 3, iclass 5, count 2 2006.232.07:50:30.46#ibcon#about to read 4, iclass 5, count 2 2006.232.07:50:30.46#ibcon#read 4, iclass 5, count 2 2006.232.07:50:30.46#ibcon#about to read 5, iclass 5, count 2 2006.232.07:50:30.46#ibcon#read 5, iclass 5, count 2 2006.232.07:50:30.46#ibcon#about to read 6, iclass 5, count 2 2006.232.07:50:30.46#ibcon#read 6, iclass 5, count 2 2006.232.07:50:30.46#ibcon#end of sib2, iclass 5, count 2 2006.232.07:50:30.46#ibcon#*after write, iclass 5, count 2 2006.232.07:50:30.46#ibcon#*before return 0, iclass 5, count 2 2006.232.07:50:30.46#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.232.07:50:30.46#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.232.07:50:30.46#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.232.07:50:30.46#ibcon#ireg 7 cls_cnt 0 2006.232.07:50:30.46#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.232.07:50:30.58#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.232.07:50:30.58#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.232.07:50:30.58#ibcon#enter wrdev, iclass 5, count 0 2006.232.07:50:30.58#ibcon#first serial, iclass 5, count 0 2006.232.07:50:30.58#ibcon#enter sib2, iclass 5, count 0 2006.232.07:50:30.58#ibcon#flushed, iclass 5, count 0 2006.232.07:50:30.58#ibcon#about to write, iclass 5, count 0 2006.232.07:50:30.58#ibcon#wrote, iclass 5, count 0 2006.232.07:50:30.58#ibcon#about to read 3, iclass 5, count 0 2006.232.07:50:30.60#ibcon#read 3, iclass 5, count 0 2006.232.07:50:30.60#ibcon#about to read 4, iclass 5, count 0 2006.232.07:50:30.60#ibcon#read 4, iclass 5, count 0 2006.232.07:50:30.60#ibcon#about to read 5, iclass 5, count 0 2006.232.07:50:30.60#ibcon#read 5, iclass 5, count 0 2006.232.07:50:30.60#ibcon#about to read 6, iclass 5, count 0 2006.232.07:50:30.60#ibcon#read 6, iclass 5, count 0 2006.232.07:50:30.60#ibcon#end of sib2, iclass 5, count 0 2006.232.07:50:30.60#ibcon#*mode == 0, iclass 5, count 0 2006.232.07:50:30.60#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.232.07:50:30.60#ibcon#[25=USB\r\n] 2006.232.07:50:30.60#ibcon#*before write, iclass 5, count 0 2006.232.07:50:30.60#ibcon#enter sib2, iclass 5, count 0 2006.232.07:50:30.60#ibcon#flushed, iclass 5, count 0 2006.232.07:50:30.60#ibcon#about to write, iclass 5, count 0 2006.232.07:50:30.60#ibcon#wrote, iclass 5, count 0 2006.232.07:50:30.60#ibcon#about to read 3, iclass 5, count 0 2006.232.07:50:30.63#ibcon#read 3, iclass 5, count 0 2006.232.07:50:30.63#ibcon#about to read 4, iclass 5, count 0 2006.232.07:50:30.63#ibcon#read 4, iclass 5, count 0 2006.232.07:50:30.63#ibcon#about to read 5, iclass 5, count 0 2006.232.07:50:30.63#ibcon#read 5, iclass 5, count 0 2006.232.07:50:30.63#ibcon#about to read 6, iclass 5, count 0 2006.232.07:50:30.63#ibcon#read 6, iclass 5, count 0 2006.232.07:50:30.63#ibcon#end of sib2, iclass 5, count 0 2006.232.07:50:30.63#ibcon#*after write, iclass 5, count 0 2006.232.07:50:30.63#ibcon#*before return 0, iclass 5, count 0 2006.232.07:50:30.63#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.232.07:50:30.63#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.232.07:50:30.63#ibcon#about to clear, iclass 5 cls_cnt 0 2006.232.07:50:30.63#ibcon#cleared, iclass 5 cls_cnt 0 2006.232.07:50:30.63$vc4f8/vblo=1,632.99 2006.232.07:50:30.63#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.232.07:50:30.63#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.232.07:50:30.63#ibcon#ireg 17 cls_cnt 0 2006.232.07:50:30.63#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.232.07:50:30.63#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.232.07:50:30.63#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.232.07:50:30.63#ibcon#enter wrdev, iclass 7, count 0 2006.232.07:50:30.63#ibcon#first serial, iclass 7, count 0 2006.232.07:50:30.63#ibcon#enter sib2, iclass 7, count 0 2006.232.07:50:30.63#ibcon#flushed, iclass 7, count 0 2006.232.07:50:30.63#ibcon#about to write, iclass 7, count 0 2006.232.07:50:30.63#ibcon#wrote, iclass 7, count 0 2006.232.07:50:30.63#ibcon#about to read 3, iclass 7, count 0 2006.232.07:50:30.65#ibcon#read 3, iclass 7, count 0 2006.232.07:50:30.65#ibcon#about to read 4, iclass 7, count 0 2006.232.07:50:30.65#ibcon#read 4, iclass 7, count 0 2006.232.07:50:30.65#ibcon#about to read 5, iclass 7, count 0 2006.232.07:50:30.65#ibcon#read 5, iclass 7, count 0 2006.232.07:50:30.65#ibcon#about to read 6, iclass 7, count 0 2006.232.07:50:30.65#ibcon#read 6, iclass 7, count 0 2006.232.07:50:30.65#ibcon#end of sib2, iclass 7, count 0 2006.232.07:50:30.65#ibcon#*mode == 0, iclass 7, count 0 2006.232.07:50:30.65#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.232.07:50:30.65#ibcon#[28=FRQ=01,632.99\r\n] 2006.232.07:50:30.65#ibcon#*before write, iclass 7, count 0 2006.232.07:50:30.65#ibcon#enter sib2, iclass 7, count 0 2006.232.07:50:30.65#ibcon#flushed, iclass 7, count 0 2006.232.07:50:30.65#ibcon#about to write, iclass 7, count 0 2006.232.07:50:30.65#ibcon#wrote, iclass 7, count 0 2006.232.07:50:30.65#ibcon#about to read 3, iclass 7, count 0 2006.232.07:50:30.69#ibcon#read 3, iclass 7, count 0 2006.232.07:50:30.69#ibcon#about to read 4, iclass 7, count 0 2006.232.07:50:30.69#ibcon#read 4, iclass 7, count 0 2006.232.07:50:30.69#ibcon#about to read 5, iclass 7, count 0 2006.232.07:50:30.69#ibcon#read 5, iclass 7, count 0 2006.232.07:50:30.69#ibcon#about to read 6, iclass 7, count 0 2006.232.07:50:30.69#ibcon#read 6, iclass 7, count 0 2006.232.07:50:30.69#ibcon#end of sib2, iclass 7, count 0 2006.232.07:50:30.69#ibcon#*after write, iclass 7, count 0 2006.232.07:50:30.69#ibcon#*before return 0, iclass 7, count 0 2006.232.07:50:30.69#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.232.07:50:30.69#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.232.07:50:30.69#ibcon#about to clear, iclass 7 cls_cnt 0 2006.232.07:50:30.69#ibcon#cleared, iclass 7 cls_cnt 0 2006.232.07:50:30.69$vc4f8/vb=1,4 2006.232.07:50:30.69#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.232.07:50:30.69#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.232.07:50:30.69#ibcon#ireg 11 cls_cnt 2 2006.232.07:50:30.69#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.232.07:50:30.69#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.232.07:50:30.69#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.232.07:50:30.69#ibcon#enter wrdev, iclass 11, count 2 2006.232.07:50:30.69#ibcon#first serial, iclass 11, count 2 2006.232.07:50:30.69#ibcon#enter sib2, iclass 11, count 2 2006.232.07:50:30.69#ibcon#flushed, iclass 11, count 2 2006.232.07:50:30.69#ibcon#about to write, iclass 11, count 2 2006.232.07:50:30.69#ibcon#wrote, iclass 11, count 2 2006.232.07:50:30.69#ibcon#about to read 3, iclass 11, count 2 2006.232.07:50:30.71#ibcon#read 3, iclass 11, count 2 2006.232.07:50:30.71#ibcon#about to read 4, iclass 11, count 2 2006.232.07:50:30.71#ibcon#read 4, iclass 11, count 2 2006.232.07:50:30.71#ibcon#about to read 5, iclass 11, count 2 2006.232.07:50:30.71#ibcon#read 5, iclass 11, count 2 2006.232.07:50:30.71#ibcon#about to read 6, iclass 11, count 2 2006.232.07:50:30.71#ibcon#read 6, iclass 11, count 2 2006.232.07:50:30.71#ibcon#end of sib2, iclass 11, count 2 2006.232.07:50:30.71#ibcon#*mode == 0, iclass 11, count 2 2006.232.07:50:30.71#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.232.07:50:30.71#ibcon#[27=AT01-04\r\n] 2006.232.07:50:30.71#ibcon#*before write, iclass 11, count 2 2006.232.07:50:30.71#ibcon#enter sib2, iclass 11, count 2 2006.232.07:50:30.71#ibcon#flushed, iclass 11, count 2 2006.232.07:50:30.71#ibcon#about to write, iclass 11, count 2 2006.232.07:50:30.71#ibcon#wrote, iclass 11, count 2 2006.232.07:50:30.71#ibcon#about to read 3, iclass 11, count 2 2006.232.07:50:30.74#ibcon#read 3, iclass 11, count 2 2006.232.07:50:30.74#ibcon#about to read 4, iclass 11, count 2 2006.232.07:50:30.74#ibcon#read 4, iclass 11, count 2 2006.232.07:50:30.74#ibcon#about to read 5, iclass 11, count 2 2006.232.07:50:30.74#ibcon#read 5, iclass 11, count 2 2006.232.07:50:30.74#ibcon#about to read 6, iclass 11, count 2 2006.232.07:50:30.74#ibcon#read 6, iclass 11, count 2 2006.232.07:50:30.74#ibcon#end of sib2, iclass 11, count 2 2006.232.07:50:30.74#ibcon#*after write, iclass 11, count 2 2006.232.07:50:30.74#ibcon#*before return 0, iclass 11, count 2 2006.232.07:50:30.74#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.232.07:50:30.74#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.232.07:50:30.74#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.232.07:50:30.74#ibcon#ireg 7 cls_cnt 0 2006.232.07:50:30.74#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.232.07:50:30.86#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.232.07:50:30.86#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.232.07:50:30.86#ibcon#enter wrdev, iclass 11, count 0 2006.232.07:50:30.86#ibcon#first serial, iclass 11, count 0 2006.232.07:50:30.86#ibcon#enter sib2, iclass 11, count 0 2006.232.07:50:30.86#ibcon#flushed, iclass 11, count 0 2006.232.07:50:30.86#ibcon#about to write, iclass 11, count 0 2006.232.07:50:30.86#ibcon#wrote, iclass 11, count 0 2006.232.07:50:30.86#ibcon#about to read 3, iclass 11, count 0 2006.232.07:50:30.88#ibcon#read 3, iclass 11, count 0 2006.232.07:50:30.88#ibcon#about to read 4, iclass 11, count 0 2006.232.07:50:30.88#ibcon#read 4, iclass 11, count 0 2006.232.07:50:30.88#ibcon#about to read 5, iclass 11, count 0 2006.232.07:50:30.88#ibcon#read 5, iclass 11, count 0 2006.232.07:50:30.88#ibcon#about to read 6, iclass 11, count 0 2006.232.07:50:30.88#ibcon#read 6, iclass 11, count 0 2006.232.07:50:30.88#ibcon#end of sib2, iclass 11, count 0 2006.232.07:50:30.88#ibcon#*mode == 0, iclass 11, count 0 2006.232.07:50:30.88#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.232.07:50:30.88#ibcon#[27=USB\r\n] 2006.232.07:50:30.88#ibcon#*before write, iclass 11, count 0 2006.232.07:50:30.88#ibcon#enter sib2, iclass 11, count 0 2006.232.07:50:30.88#ibcon#flushed, iclass 11, count 0 2006.232.07:50:30.88#ibcon#about to write, iclass 11, count 0 2006.232.07:50:30.88#ibcon#wrote, iclass 11, count 0 2006.232.07:50:30.88#ibcon#about to read 3, iclass 11, count 0 2006.232.07:50:30.91#ibcon#read 3, iclass 11, count 0 2006.232.07:50:30.91#ibcon#about to read 4, iclass 11, count 0 2006.232.07:50:30.91#ibcon#read 4, iclass 11, count 0 2006.232.07:50:30.91#ibcon#about to read 5, iclass 11, count 0 2006.232.07:50:30.91#ibcon#read 5, iclass 11, count 0 2006.232.07:50:30.91#ibcon#about to read 6, iclass 11, count 0 2006.232.07:50:30.91#ibcon#read 6, iclass 11, count 0 2006.232.07:50:30.91#ibcon#end of sib2, iclass 11, count 0 2006.232.07:50:30.91#ibcon#*after write, iclass 11, count 0 2006.232.07:50:30.91#ibcon#*before return 0, iclass 11, count 0 2006.232.07:50:30.91#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.232.07:50:30.91#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.232.07:50:30.91#ibcon#about to clear, iclass 11 cls_cnt 0 2006.232.07:50:30.91#ibcon#cleared, iclass 11 cls_cnt 0 2006.232.07:50:30.91$vc4f8/vblo=2,640.99 2006.232.07:50:30.91#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.232.07:50:30.91#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.232.07:50:30.91#ibcon#ireg 17 cls_cnt 0 2006.232.07:50:30.91#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.232.07:50:30.91#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.232.07:50:30.91#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.232.07:50:30.91#ibcon#enter wrdev, iclass 13, count 0 2006.232.07:50:30.91#ibcon#first serial, iclass 13, count 0 2006.232.07:50:30.91#ibcon#enter sib2, iclass 13, count 0 2006.232.07:50:30.91#ibcon#flushed, iclass 13, count 0 2006.232.07:50:30.91#ibcon#about to write, iclass 13, count 0 2006.232.07:50:30.91#ibcon#wrote, iclass 13, count 0 2006.232.07:50:30.91#ibcon#about to read 3, iclass 13, count 0 2006.232.07:50:30.93#ibcon#read 3, iclass 13, count 0 2006.232.07:50:30.93#ibcon#about to read 4, iclass 13, count 0 2006.232.07:50:30.93#ibcon#read 4, iclass 13, count 0 2006.232.07:50:30.93#ibcon#about to read 5, iclass 13, count 0 2006.232.07:50:30.93#ibcon#read 5, iclass 13, count 0 2006.232.07:50:30.93#ibcon#about to read 6, iclass 13, count 0 2006.232.07:50:30.93#ibcon#read 6, iclass 13, count 0 2006.232.07:50:30.93#ibcon#end of sib2, iclass 13, count 0 2006.232.07:50:30.93#ibcon#*mode == 0, iclass 13, count 0 2006.232.07:50:30.93#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.232.07:50:30.93#ibcon#[28=FRQ=02,640.99\r\n] 2006.232.07:50:30.93#ibcon#*before write, iclass 13, count 0 2006.232.07:50:30.93#ibcon#enter sib2, iclass 13, count 0 2006.232.07:50:30.93#ibcon#flushed, iclass 13, count 0 2006.232.07:50:30.93#ibcon#about to write, iclass 13, count 0 2006.232.07:50:30.93#ibcon#wrote, iclass 13, count 0 2006.232.07:50:30.93#ibcon#about to read 3, iclass 13, count 0 2006.232.07:50:30.97#ibcon#read 3, iclass 13, count 0 2006.232.07:50:30.97#ibcon#about to read 4, iclass 13, count 0 2006.232.07:50:30.97#ibcon#read 4, iclass 13, count 0 2006.232.07:50:30.97#ibcon#about to read 5, iclass 13, count 0 2006.232.07:50:30.97#ibcon#read 5, iclass 13, count 0 2006.232.07:50:30.97#ibcon#about to read 6, iclass 13, count 0 2006.232.07:50:30.97#ibcon#read 6, iclass 13, count 0 2006.232.07:50:30.97#ibcon#end of sib2, iclass 13, count 0 2006.232.07:50:30.97#ibcon#*after write, iclass 13, count 0 2006.232.07:50:30.97#ibcon#*before return 0, iclass 13, count 0 2006.232.07:50:30.97#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.232.07:50:30.97#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.232.07:50:30.97#ibcon#about to clear, iclass 13 cls_cnt 0 2006.232.07:50:30.97#ibcon#cleared, iclass 13 cls_cnt 0 2006.232.07:50:30.97$vc4f8/vb=2,4 2006.232.07:50:30.97#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.232.07:50:30.97#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.232.07:50:30.97#ibcon#ireg 11 cls_cnt 2 2006.232.07:50:30.97#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.232.07:50:31.03#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.232.07:50:31.03#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.232.07:50:31.03#ibcon#enter wrdev, iclass 15, count 2 2006.232.07:50:31.03#ibcon#first serial, iclass 15, count 2 2006.232.07:50:31.03#ibcon#enter sib2, iclass 15, count 2 2006.232.07:50:31.03#ibcon#flushed, iclass 15, count 2 2006.232.07:50:31.03#ibcon#about to write, iclass 15, count 2 2006.232.07:50:31.03#ibcon#wrote, iclass 15, count 2 2006.232.07:50:31.03#ibcon#about to read 3, iclass 15, count 2 2006.232.07:50:31.05#ibcon#read 3, iclass 15, count 2 2006.232.07:50:31.05#ibcon#about to read 4, iclass 15, count 2 2006.232.07:50:31.05#ibcon#read 4, iclass 15, count 2 2006.232.07:50:31.05#ibcon#about to read 5, iclass 15, count 2 2006.232.07:50:31.05#ibcon#read 5, iclass 15, count 2 2006.232.07:50:31.05#ibcon#about to read 6, iclass 15, count 2 2006.232.07:50:31.05#ibcon#read 6, iclass 15, count 2 2006.232.07:50:31.05#ibcon#end of sib2, iclass 15, count 2 2006.232.07:50:31.05#ibcon#*mode == 0, iclass 15, count 2 2006.232.07:50:31.05#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.232.07:50:31.05#ibcon#[27=AT02-04\r\n] 2006.232.07:50:31.05#ibcon#*before write, iclass 15, count 2 2006.232.07:50:31.05#ibcon#enter sib2, iclass 15, count 2 2006.232.07:50:31.05#ibcon#flushed, iclass 15, count 2 2006.232.07:50:31.05#ibcon#about to write, iclass 15, count 2 2006.232.07:50:31.05#ibcon#wrote, iclass 15, count 2 2006.232.07:50:31.05#ibcon#about to read 3, iclass 15, count 2 2006.232.07:50:31.08#ibcon#read 3, iclass 15, count 2 2006.232.07:50:31.08#ibcon#about to read 4, iclass 15, count 2 2006.232.07:50:31.08#ibcon#read 4, iclass 15, count 2 2006.232.07:50:31.08#ibcon#about to read 5, iclass 15, count 2 2006.232.07:50:31.08#ibcon#read 5, iclass 15, count 2 2006.232.07:50:31.08#ibcon#about to read 6, iclass 15, count 2 2006.232.07:50:31.08#ibcon#read 6, iclass 15, count 2 2006.232.07:50:31.08#ibcon#end of sib2, iclass 15, count 2 2006.232.07:50:31.08#ibcon#*after write, iclass 15, count 2 2006.232.07:50:31.08#ibcon#*before return 0, iclass 15, count 2 2006.232.07:50:31.08#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.232.07:50:31.08#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.232.07:50:31.08#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.232.07:50:31.08#ibcon#ireg 7 cls_cnt 0 2006.232.07:50:31.08#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.232.07:50:31.20#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.232.07:50:31.20#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.232.07:50:31.20#ibcon#enter wrdev, iclass 15, count 0 2006.232.07:50:31.20#ibcon#first serial, iclass 15, count 0 2006.232.07:50:31.20#ibcon#enter sib2, iclass 15, count 0 2006.232.07:50:31.20#ibcon#flushed, iclass 15, count 0 2006.232.07:50:31.20#ibcon#about to write, iclass 15, count 0 2006.232.07:50:31.20#ibcon#wrote, iclass 15, count 0 2006.232.07:50:31.20#ibcon#about to read 3, iclass 15, count 0 2006.232.07:50:31.22#ibcon#read 3, iclass 15, count 0 2006.232.07:50:31.22#ibcon#about to read 4, iclass 15, count 0 2006.232.07:50:31.22#ibcon#read 4, iclass 15, count 0 2006.232.07:50:31.22#ibcon#about to read 5, iclass 15, count 0 2006.232.07:50:31.22#ibcon#read 5, iclass 15, count 0 2006.232.07:50:31.22#ibcon#about to read 6, iclass 15, count 0 2006.232.07:50:31.22#ibcon#read 6, iclass 15, count 0 2006.232.07:50:31.22#ibcon#end of sib2, iclass 15, count 0 2006.232.07:50:31.22#ibcon#*mode == 0, iclass 15, count 0 2006.232.07:50:31.22#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.232.07:50:31.22#ibcon#[27=USB\r\n] 2006.232.07:50:31.22#ibcon#*before write, iclass 15, count 0 2006.232.07:50:31.22#ibcon#enter sib2, iclass 15, count 0 2006.232.07:50:31.22#ibcon#flushed, iclass 15, count 0 2006.232.07:50:31.22#ibcon#about to write, iclass 15, count 0 2006.232.07:50:31.22#ibcon#wrote, iclass 15, count 0 2006.232.07:50:31.22#ibcon#about to read 3, iclass 15, count 0 2006.232.07:50:31.25#ibcon#read 3, iclass 15, count 0 2006.232.07:50:31.25#ibcon#about to read 4, iclass 15, count 0 2006.232.07:50:31.25#ibcon#read 4, iclass 15, count 0 2006.232.07:50:31.25#ibcon#about to read 5, iclass 15, count 0 2006.232.07:50:31.25#ibcon#read 5, iclass 15, count 0 2006.232.07:50:31.25#ibcon#about to read 6, iclass 15, count 0 2006.232.07:50:31.25#ibcon#read 6, iclass 15, count 0 2006.232.07:50:31.25#ibcon#end of sib2, iclass 15, count 0 2006.232.07:50:31.25#ibcon#*after write, iclass 15, count 0 2006.232.07:50:31.25#ibcon#*before return 0, iclass 15, count 0 2006.232.07:50:31.25#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.232.07:50:31.25#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.232.07:50:31.25#ibcon#about to clear, iclass 15 cls_cnt 0 2006.232.07:50:31.25#ibcon#cleared, iclass 15 cls_cnt 0 2006.232.07:50:31.25$vc4f8/vblo=3,656.99 2006.232.07:50:31.25#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.232.07:50:31.25#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.232.07:50:31.25#ibcon#ireg 17 cls_cnt 0 2006.232.07:50:31.25#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.232.07:50:31.25#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.232.07:50:31.25#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.232.07:50:31.25#ibcon#enter wrdev, iclass 17, count 0 2006.232.07:50:31.25#ibcon#first serial, iclass 17, count 0 2006.232.07:50:31.25#ibcon#enter sib2, iclass 17, count 0 2006.232.07:50:31.25#ibcon#flushed, iclass 17, count 0 2006.232.07:50:31.25#ibcon#about to write, iclass 17, count 0 2006.232.07:50:31.25#ibcon#wrote, iclass 17, count 0 2006.232.07:50:31.25#ibcon#about to read 3, iclass 17, count 0 2006.232.07:50:31.27#ibcon#read 3, iclass 17, count 0 2006.232.07:50:31.27#ibcon#about to read 4, iclass 17, count 0 2006.232.07:50:31.27#ibcon#read 4, iclass 17, count 0 2006.232.07:50:31.27#ibcon#about to read 5, iclass 17, count 0 2006.232.07:50:31.27#ibcon#read 5, iclass 17, count 0 2006.232.07:50:31.27#ibcon#about to read 6, iclass 17, count 0 2006.232.07:50:31.27#ibcon#read 6, iclass 17, count 0 2006.232.07:50:31.27#ibcon#end of sib2, iclass 17, count 0 2006.232.07:50:31.27#ibcon#*mode == 0, iclass 17, count 0 2006.232.07:50:31.27#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.232.07:50:31.27#ibcon#[28=FRQ=03,656.99\r\n] 2006.232.07:50:31.27#ibcon#*before write, iclass 17, count 0 2006.232.07:50:31.27#ibcon#enter sib2, iclass 17, count 0 2006.232.07:50:31.27#ibcon#flushed, iclass 17, count 0 2006.232.07:50:31.27#ibcon#about to write, iclass 17, count 0 2006.232.07:50:31.27#ibcon#wrote, iclass 17, count 0 2006.232.07:50:31.27#ibcon#about to read 3, iclass 17, count 0 2006.232.07:50:31.31#ibcon#read 3, iclass 17, count 0 2006.232.07:50:31.31#ibcon#about to read 4, iclass 17, count 0 2006.232.07:50:31.31#ibcon#read 4, iclass 17, count 0 2006.232.07:50:31.31#ibcon#about to read 5, iclass 17, count 0 2006.232.07:50:31.31#ibcon#read 5, iclass 17, count 0 2006.232.07:50:31.31#ibcon#about to read 6, iclass 17, count 0 2006.232.07:50:31.31#ibcon#read 6, iclass 17, count 0 2006.232.07:50:31.31#ibcon#end of sib2, iclass 17, count 0 2006.232.07:50:31.31#ibcon#*after write, iclass 17, count 0 2006.232.07:50:31.31#ibcon#*before return 0, iclass 17, count 0 2006.232.07:50:31.31#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.232.07:50:31.31#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.232.07:50:31.31#ibcon#about to clear, iclass 17 cls_cnt 0 2006.232.07:50:31.31#ibcon#cleared, iclass 17 cls_cnt 0 2006.232.07:50:31.31$vc4f8/vb=3,4 2006.232.07:50:31.31#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.232.07:50:31.31#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.232.07:50:31.31#ibcon#ireg 11 cls_cnt 2 2006.232.07:50:31.31#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.232.07:50:31.37#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.232.07:50:31.37#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.232.07:50:31.37#ibcon#enter wrdev, iclass 19, count 2 2006.232.07:50:31.37#ibcon#first serial, iclass 19, count 2 2006.232.07:50:31.37#ibcon#enter sib2, iclass 19, count 2 2006.232.07:50:31.37#ibcon#flushed, iclass 19, count 2 2006.232.07:50:31.37#ibcon#about to write, iclass 19, count 2 2006.232.07:50:31.37#ibcon#wrote, iclass 19, count 2 2006.232.07:50:31.37#ibcon#about to read 3, iclass 19, count 2 2006.232.07:50:31.39#ibcon#read 3, iclass 19, count 2 2006.232.07:50:31.39#ibcon#about to read 4, iclass 19, count 2 2006.232.07:50:31.39#ibcon#read 4, iclass 19, count 2 2006.232.07:50:31.39#ibcon#about to read 5, iclass 19, count 2 2006.232.07:50:31.39#ibcon#read 5, iclass 19, count 2 2006.232.07:50:31.39#ibcon#about to read 6, iclass 19, count 2 2006.232.07:50:31.39#ibcon#read 6, iclass 19, count 2 2006.232.07:50:31.39#ibcon#end of sib2, iclass 19, count 2 2006.232.07:50:31.39#ibcon#*mode == 0, iclass 19, count 2 2006.232.07:50:31.39#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.232.07:50:31.39#ibcon#[27=AT03-04\r\n] 2006.232.07:50:31.39#ibcon#*before write, iclass 19, count 2 2006.232.07:50:31.39#ibcon#enter sib2, iclass 19, count 2 2006.232.07:50:31.39#ibcon#flushed, iclass 19, count 2 2006.232.07:50:31.39#ibcon#about to write, iclass 19, count 2 2006.232.07:50:31.39#ibcon#wrote, iclass 19, count 2 2006.232.07:50:31.39#ibcon#about to read 3, iclass 19, count 2 2006.232.07:50:31.42#ibcon#read 3, iclass 19, count 2 2006.232.07:50:31.42#ibcon#about to read 4, iclass 19, count 2 2006.232.07:50:31.42#ibcon#read 4, iclass 19, count 2 2006.232.07:50:31.42#ibcon#about to read 5, iclass 19, count 2 2006.232.07:50:31.42#ibcon#read 5, iclass 19, count 2 2006.232.07:50:31.42#ibcon#about to read 6, iclass 19, count 2 2006.232.07:50:31.42#ibcon#read 6, iclass 19, count 2 2006.232.07:50:31.42#ibcon#end of sib2, iclass 19, count 2 2006.232.07:50:31.42#ibcon#*after write, iclass 19, count 2 2006.232.07:50:31.42#ibcon#*before return 0, iclass 19, count 2 2006.232.07:50:31.42#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.232.07:50:31.42#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.232.07:50:31.42#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.232.07:50:31.42#ibcon#ireg 7 cls_cnt 0 2006.232.07:50:31.42#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.232.07:50:31.54#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.232.07:50:31.54#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.232.07:50:31.54#ibcon#enter wrdev, iclass 19, count 0 2006.232.07:50:31.54#ibcon#first serial, iclass 19, count 0 2006.232.07:50:31.54#ibcon#enter sib2, iclass 19, count 0 2006.232.07:50:31.54#ibcon#flushed, iclass 19, count 0 2006.232.07:50:31.54#ibcon#about to write, iclass 19, count 0 2006.232.07:50:31.54#ibcon#wrote, iclass 19, count 0 2006.232.07:50:31.54#ibcon#about to read 3, iclass 19, count 0 2006.232.07:50:31.56#ibcon#read 3, iclass 19, count 0 2006.232.07:50:31.56#ibcon#about to read 4, iclass 19, count 0 2006.232.07:50:31.56#ibcon#read 4, iclass 19, count 0 2006.232.07:50:31.56#ibcon#about to read 5, iclass 19, count 0 2006.232.07:50:31.56#ibcon#read 5, iclass 19, count 0 2006.232.07:50:31.56#ibcon#about to read 6, iclass 19, count 0 2006.232.07:50:31.56#ibcon#read 6, iclass 19, count 0 2006.232.07:50:31.56#ibcon#end of sib2, iclass 19, count 0 2006.232.07:50:31.56#ibcon#*mode == 0, iclass 19, count 0 2006.232.07:50:31.56#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.232.07:50:31.56#ibcon#[27=USB\r\n] 2006.232.07:50:31.56#ibcon#*before write, iclass 19, count 0 2006.232.07:50:31.56#ibcon#enter sib2, iclass 19, count 0 2006.232.07:50:31.56#ibcon#flushed, iclass 19, count 0 2006.232.07:50:31.56#ibcon#about to write, iclass 19, count 0 2006.232.07:50:31.56#ibcon#wrote, iclass 19, count 0 2006.232.07:50:31.56#ibcon#about to read 3, iclass 19, count 0 2006.232.07:50:31.59#ibcon#read 3, iclass 19, count 0 2006.232.07:50:31.59#ibcon#about to read 4, iclass 19, count 0 2006.232.07:50:31.59#ibcon#read 4, iclass 19, count 0 2006.232.07:50:31.59#ibcon#about to read 5, iclass 19, count 0 2006.232.07:50:31.59#ibcon#read 5, iclass 19, count 0 2006.232.07:50:31.59#ibcon#about to read 6, iclass 19, count 0 2006.232.07:50:31.59#ibcon#read 6, iclass 19, count 0 2006.232.07:50:31.59#ibcon#end of sib2, iclass 19, count 0 2006.232.07:50:31.59#ibcon#*after write, iclass 19, count 0 2006.232.07:50:31.59#ibcon#*before return 0, iclass 19, count 0 2006.232.07:50:31.59#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.232.07:50:31.59#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.232.07:50:31.59#ibcon#about to clear, iclass 19 cls_cnt 0 2006.232.07:50:31.59#ibcon#cleared, iclass 19 cls_cnt 0 2006.232.07:50:31.59$vc4f8/vblo=4,712.99 2006.232.07:50:31.59#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.232.07:50:31.59#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.232.07:50:31.59#ibcon#ireg 17 cls_cnt 0 2006.232.07:50:31.59#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.232.07:50:31.59#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.232.07:50:31.59#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.232.07:50:31.59#ibcon#enter wrdev, iclass 21, count 0 2006.232.07:50:31.59#ibcon#first serial, iclass 21, count 0 2006.232.07:50:31.59#ibcon#enter sib2, iclass 21, count 0 2006.232.07:50:31.59#ibcon#flushed, iclass 21, count 0 2006.232.07:50:31.59#ibcon#about to write, iclass 21, count 0 2006.232.07:50:31.59#ibcon#wrote, iclass 21, count 0 2006.232.07:50:31.59#ibcon#about to read 3, iclass 21, count 0 2006.232.07:50:31.61#ibcon#read 3, iclass 21, count 0 2006.232.07:50:31.61#ibcon#about to read 4, iclass 21, count 0 2006.232.07:50:31.61#ibcon#read 4, iclass 21, count 0 2006.232.07:50:31.61#ibcon#about to read 5, iclass 21, count 0 2006.232.07:50:31.61#ibcon#read 5, iclass 21, count 0 2006.232.07:50:31.61#ibcon#about to read 6, iclass 21, count 0 2006.232.07:50:31.61#ibcon#read 6, iclass 21, count 0 2006.232.07:50:31.61#ibcon#end of sib2, iclass 21, count 0 2006.232.07:50:31.61#ibcon#*mode == 0, iclass 21, count 0 2006.232.07:50:31.61#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.232.07:50:31.61#ibcon#[28=FRQ=04,712.99\r\n] 2006.232.07:50:31.61#ibcon#*before write, iclass 21, count 0 2006.232.07:50:31.61#ibcon#enter sib2, iclass 21, count 0 2006.232.07:50:31.61#ibcon#flushed, iclass 21, count 0 2006.232.07:50:31.61#ibcon#about to write, iclass 21, count 0 2006.232.07:50:31.61#ibcon#wrote, iclass 21, count 0 2006.232.07:50:31.61#ibcon#about to read 3, iclass 21, count 0 2006.232.07:50:31.65#ibcon#read 3, iclass 21, count 0 2006.232.07:50:31.65#ibcon#about to read 4, iclass 21, count 0 2006.232.07:50:31.65#ibcon#read 4, iclass 21, count 0 2006.232.07:50:31.65#ibcon#about to read 5, iclass 21, count 0 2006.232.07:50:31.65#ibcon#read 5, iclass 21, count 0 2006.232.07:50:31.65#ibcon#about to read 6, iclass 21, count 0 2006.232.07:50:31.65#ibcon#read 6, iclass 21, count 0 2006.232.07:50:31.65#ibcon#end of sib2, iclass 21, count 0 2006.232.07:50:31.65#ibcon#*after write, iclass 21, count 0 2006.232.07:50:31.65#ibcon#*before return 0, iclass 21, count 0 2006.232.07:50:31.65#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.232.07:50:31.65#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.232.07:50:31.65#ibcon#about to clear, iclass 21 cls_cnt 0 2006.232.07:50:31.65#ibcon#cleared, iclass 21 cls_cnt 0 2006.232.07:50:31.65$vc4f8/vb=4,4 2006.232.07:50:31.65#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.232.07:50:31.65#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.232.07:50:31.65#ibcon#ireg 11 cls_cnt 2 2006.232.07:50:31.65#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.232.07:50:31.71#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.232.07:50:31.71#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.232.07:50:31.71#ibcon#enter wrdev, iclass 23, count 2 2006.232.07:50:31.71#ibcon#first serial, iclass 23, count 2 2006.232.07:50:31.71#ibcon#enter sib2, iclass 23, count 2 2006.232.07:50:31.71#ibcon#flushed, iclass 23, count 2 2006.232.07:50:31.71#ibcon#about to write, iclass 23, count 2 2006.232.07:50:31.71#ibcon#wrote, iclass 23, count 2 2006.232.07:50:31.71#ibcon#about to read 3, iclass 23, count 2 2006.232.07:50:31.73#ibcon#read 3, iclass 23, count 2 2006.232.07:50:31.73#ibcon#about to read 4, iclass 23, count 2 2006.232.07:50:31.73#ibcon#read 4, iclass 23, count 2 2006.232.07:50:31.73#ibcon#about to read 5, iclass 23, count 2 2006.232.07:50:31.73#ibcon#read 5, iclass 23, count 2 2006.232.07:50:31.73#ibcon#about to read 6, iclass 23, count 2 2006.232.07:50:31.73#ibcon#read 6, iclass 23, count 2 2006.232.07:50:31.73#ibcon#end of sib2, iclass 23, count 2 2006.232.07:50:31.73#ibcon#*mode == 0, iclass 23, count 2 2006.232.07:50:31.73#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.232.07:50:31.73#ibcon#[27=AT04-04\r\n] 2006.232.07:50:31.73#ibcon#*before write, iclass 23, count 2 2006.232.07:50:31.73#ibcon#enter sib2, iclass 23, count 2 2006.232.07:50:31.73#ibcon#flushed, iclass 23, count 2 2006.232.07:50:31.73#ibcon#about to write, iclass 23, count 2 2006.232.07:50:31.73#ibcon#wrote, iclass 23, count 2 2006.232.07:50:31.73#ibcon#about to read 3, iclass 23, count 2 2006.232.07:50:31.76#ibcon#read 3, iclass 23, count 2 2006.232.07:50:31.76#ibcon#about to read 4, iclass 23, count 2 2006.232.07:50:31.76#ibcon#read 4, iclass 23, count 2 2006.232.07:50:31.76#ibcon#about to read 5, iclass 23, count 2 2006.232.07:50:31.76#ibcon#read 5, iclass 23, count 2 2006.232.07:50:31.76#ibcon#about to read 6, iclass 23, count 2 2006.232.07:50:31.76#ibcon#read 6, iclass 23, count 2 2006.232.07:50:31.76#ibcon#end of sib2, iclass 23, count 2 2006.232.07:50:31.76#ibcon#*after write, iclass 23, count 2 2006.232.07:50:31.76#ibcon#*before return 0, iclass 23, count 2 2006.232.07:50:31.76#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.232.07:50:31.76#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.232.07:50:31.76#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.232.07:50:31.76#ibcon#ireg 7 cls_cnt 0 2006.232.07:50:31.76#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.232.07:50:31.88#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.232.07:50:31.88#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.232.07:50:31.88#ibcon#enter wrdev, iclass 23, count 0 2006.232.07:50:31.88#ibcon#first serial, iclass 23, count 0 2006.232.07:50:31.88#ibcon#enter sib2, iclass 23, count 0 2006.232.07:50:31.88#ibcon#flushed, iclass 23, count 0 2006.232.07:50:31.88#ibcon#about to write, iclass 23, count 0 2006.232.07:50:31.88#ibcon#wrote, iclass 23, count 0 2006.232.07:50:31.88#ibcon#about to read 3, iclass 23, count 0 2006.232.07:50:31.90#ibcon#read 3, iclass 23, count 0 2006.232.07:50:31.90#ibcon#about to read 4, iclass 23, count 0 2006.232.07:50:31.90#ibcon#read 4, iclass 23, count 0 2006.232.07:50:31.90#ibcon#about to read 5, iclass 23, count 0 2006.232.07:50:31.90#ibcon#read 5, iclass 23, count 0 2006.232.07:50:31.90#ibcon#about to read 6, iclass 23, count 0 2006.232.07:50:31.90#ibcon#read 6, iclass 23, count 0 2006.232.07:50:31.90#ibcon#end of sib2, iclass 23, count 0 2006.232.07:50:31.90#ibcon#*mode == 0, iclass 23, count 0 2006.232.07:50:31.90#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.232.07:50:31.90#ibcon#[27=USB\r\n] 2006.232.07:50:31.90#ibcon#*before write, iclass 23, count 0 2006.232.07:50:31.90#ibcon#enter sib2, iclass 23, count 0 2006.232.07:50:31.90#ibcon#flushed, iclass 23, count 0 2006.232.07:50:31.90#ibcon#about to write, iclass 23, count 0 2006.232.07:50:31.90#ibcon#wrote, iclass 23, count 0 2006.232.07:50:31.90#ibcon#about to read 3, iclass 23, count 0 2006.232.07:50:31.94#ibcon#read 3, iclass 23, count 0 2006.232.07:50:31.94#ibcon#about to read 4, iclass 23, count 0 2006.232.07:50:31.94#ibcon#read 4, iclass 23, count 0 2006.232.07:50:31.94#ibcon#about to read 5, iclass 23, count 0 2006.232.07:50:31.94#ibcon#read 5, iclass 23, count 0 2006.232.07:50:31.94#ibcon#about to read 6, iclass 23, count 0 2006.232.07:50:31.94#ibcon#read 6, iclass 23, count 0 2006.232.07:50:31.94#ibcon#end of sib2, iclass 23, count 0 2006.232.07:50:31.94#ibcon#*after write, iclass 23, count 0 2006.232.07:50:31.94#ibcon#*before return 0, iclass 23, count 0 2006.232.07:50:31.94#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.232.07:50:31.94#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.232.07:50:31.94#ibcon#about to clear, iclass 23 cls_cnt 0 2006.232.07:50:31.94#ibcon#cleared, iclass 23 cls_cnt 0 2006.232.07:50:31.94$vc4f8/vblo=5,744.99 2006.232.07:50:31.94#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.232.07:50:31.94#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.232.07:50:31.94#ibcon#ireg 17 cls_cnt 0 2006.232.07:50:31.94#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.232.07:50:31.94#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.232.07:50:31.94#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.232.07:50:31.94#ibcon#enter wrdev, iclass 25, count 0 2006.232.07:50:31.94#ibcon#first serial, iclass 25, count 0 2006.232.07:50:31.94#ibcon#enter sib2, iclass 25, count 0 2006.232.07:50:31.94#ibcon#flushed, iclass 25, count 0 2006.232.07:50:31.94#ibcon#about to write, iclass 25, count 0 2006.232.07:50:31.94#ibcon#wrote, iclass 25, count 0 2006.232.07:50:31.94#ibcon#about to read 3, iclass 25, count 0 2006.232.07:50:31.96#ibcon#read 3, iclass 25, count 0 2006.232.07:50:31.96#ibcon#about to read 4, iclass 25, count 0 2006.232.07:50:31.96#ibcon#read 4, iclass 25, count 0 2006.232.07:50:31.96#ibcon#about to read 5, iclass 25, count 0 2006.232.07:50:31.96#ibcon#read 5, iclass 25, count 0 2006.232.07:50:31.96#ibcon#about to read 6, iclass 25, count 0 2006.232.07:50:31.96#ibcon#read 6, iclass 25, count 0 2006.232.07:50:31.96#ibcon#end of sib2, iclass 25, count 0 2006.232.07:50:31.96#ibcon#*mode == 0, iclass 25, count 0 2006.232.07:50:31.96#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.232.07:50:31.96#ibcon#[28=FRQ=05,744.99\r\n] 2006.232.07:50:31.96#ibcon#*before write, iclass 25, count 0 2006.232.07:50:31.96#ibcon#enter sib2, iclass 25, count 0 2006.232.07:50:31.96#ibcon#flushed, iclass 25, count 0 2006.232.07:50:31.96#ibcon#about to write, iclass 25, count 0 2006.232.07:50:31.96#ibcon#wrote, iclass 25, count 0 2006.232.07:50:31.96#ibcon#about to read 3, iclass 25, count 0 2006.232.07:50:32.00#ibcon#read 3, iclass 25, count 0 2006.232.07:50:32.00#ibcon#about to read 4, iclass 25, count 0 2006.232.07:50:32.00#ibcon#read 4, iclass 25, count 0 2006.232.07:50:32.00#ibcon#about to read 5, iclass 25, count 0 2006.232.07:50:32.00#ibcon#read 5, iclass 25, count 0 2006.232.07:50:32.00#ibcon#about to read 6, iclass 25, count 0 2006.232.07:50:32.00#ibcon#read 6, iclass 25, count 0 2006.232.07:50:32.00#ibcon#end of sib2, iclass 25, count 0 2006.232.07:50:32.00#ibcon#*after write, iclass 25, count 0 2006.232.07:50:32.00#ibcon#*before return 0, iclass 25, count 0 2006.232.07:50:32.00#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.232.07:50:32.00#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.232.07:50:32.00#ibcon#about to clear, iclass 25 cls_cnt 0 2006.232.07:50:32.00#ibcon#cleared, iclass 25 cls_cnt 0 2006.232.07:50:32.00$vc4f8/vb=5,3 2006.232.07:50:32.00#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.232.07:50:32.00#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.232.07:50:32.00#ibcon#ireg 11 cls_cnt 2 2006.232.07:50:32.00#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.232.07:50:32.06#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.232.07:50:32.06#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.232.07:50:32.06#ibcon#enter wrdev, iclass 27, count 2 2006.232.07:50:32.06#ibcon#first serial, iclass 27, count 2 2006.232.07:50:32.06#ibcon#enter sib2, iclass 27, count 2 2006.232.07:50:32.06#ibcon#flushed, iclass 27, count 2 2006.232.07:50:32.06#ibcon#about to write, iclass 27, count 2 2006.232.07:50:32.06#ibcon#wrote, iclass 27, count 2 2006.232.07:50:32.06#ibcon#about to read 3, iclass 27, count 2 2006.232.07:50:32.08#ibcon#read 3, iclass 27, count 2 2006.232.07:50:32.08#ibcon#about to read 4, iclass 27, count 2 2006.232.07:50:32.08#ibcon#read 4, iclass 27, count 2 2006.232.07:50:32.08#ibcon#about to read 5, iclass 27, count 2 2006.232.07:50:32.08#ibcon#read 5, iclass 27, count 2 2006.232.07:50:32.08#ibcon#about to read 6, iclass 27, count 2 2006.232.07:50:32.08#ibcon#read 6, iclass 27, count 2 2006.232.07:50:32.08#ibcon#end of sib2, iclass 27, count 2 2006.232.07:50:32.08#ibcon#*mode == 0, iclass 27, count 2 2006.232.07:50:32.08#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.232.07:50:32.08#ibcon#[27=AT05-03\r\n] 2006.232.07:50:32.08#ibcon#*before write, iclass 27, count 2 2006.232.07:50:32.08#ibcon#enter sib2, iclass 27, count 2 2006.232.07:50:32.08#ibcon#flushed, iclass 27, count 2 2006.232.07:50:32.08#ibcon#about to write, iclass 27, count 2 2006.232.07:50:32.08#ibcon#wrote, iclass 27, count 2 2006.232.07:50:32.08#ibcon#about to read 3, iclass 27, count 2 2006.232.07:50:32.11#ibcon#read 3, iclass 27, count 2 2006.232.07:50:32.11#ibcon#about to read 4, iclass 27, count 2 2006.232.07:50:32.11#ibcon#read 4, iclass 27, count 2 2006.232.07:50:32.11#ibcon#about to read 5, iclass 27, count 2 2006.232.07:50:32.11#ibcon#read 5, iclass 27, count 2 2006.232.07:50:32.11#ibcon#about to read 6, iclass 27, count 2 2006.232.07:50:32.11#ibcon#read 6, iclass 27, count 2 2006.232.07:50:32.11#ibcon#end of sib2, iclass 27, count 2 2006.232.07:50:32.11#ibcon#*after write, iclass 27, count 2 2006.232.07:50:32.11#ibcon#*before return 0, iclass 27, count 2 2006.232.07:50:32.11#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.232.07:50:32.11#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.232.07:50:32.11#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.232.07:50:32.11#ibcon#ireg 7 cls_cnt 0 2006.232.07:50:32.11#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.232.07:50:32.23#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.232.07:50:32.23#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.232.07:50:32.23#ibcon#enter wrdev, iclass 27, count 0 2006.232.07:50:32.23#ibcon#first serial, iclass 27, count 0 2006.232.07:50:32.23#ibcon#enter sib2, iclass 27, count 0 2006.232.07:50:32.23#ibcon#flushed, iclass 27, count 0 2006.232.07:50:32.23#ibcon#about to write, iclass 27, count 0 2006.232.07:50:32.23#ibcon#wrote, iclass 27, count 0 2006.232.07:50:32.23#ibcon#about to read 3, iclass 27, count 0 2006.232.07:50:32.25#ibcon#read 3, iclass 27, count 0 2006.232.07:50:32.25#ibcon#about to read 4, iclass 27, count 0 2006.232.07:50:32.25#ibcon#read 4, iclass 27, count 0 2006.232.07:50:32.25#ibcon#about to read 5, iclass 27, count 0 2006.232.07:50:32.25#ibcon#read 5, iclass 27, count 0 2006.232.07:50:32.25#ibcon#about to read 6, iclass 27, count 0 2006.232.07:50:32.25#ibcon#read 6, iclass 27, count 0 2006.232.07:50:32.25#ibcon#end of sib2, iclass 27, count 0 2006.232.07:50:32.25#ibcon#*mode == 0, iclass 27, count 0 2006.232.07:50:32.25#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.232.07:50:32.25#ibcon#[27=USB\r\n] 2006.232.07:50:32.25#ibcon#*before write, iclass 27, count 0 2006.232.07:50:32.25#ibcon#enter sib2, iclass 27, count 0 2006.232.07:50:32.25#ibcon#flushed, iclass 27, count 0 2006.232.07:50:32.25#ibcon#about to write, iclass 27, count 0 2006.232.07:50:32.25#ibcon#wrote, iclass 27, count 0 2006.232.07:50:32.25#ibcon#about to read 3, iclass 27, count 0 2006.232.07:50:32.28#ibcon#read 3, iclass 27, count 0 2006.232.07:50:32.28#ibcon#about to read 4, iclass 27, count 0 2006.232.07:50:32.28#ibcon#read 4, iclass 27, count 0 2006.232.07:50:32.28#ibcon#about to read 5, iclass 27, count 0 2006.232.07:50:32.28#ibcon#read 5, iclass 27, count 0 2006.232.07:50:32.28#ibcon#about to read 6, iclass 27, count 0 2006.232.07:50:32.28#ibcon#read 6, iclass 27, count 0 2006.232.07:50:32.28#ibcon#end of sib2, iclass 27, count 0 2006.232.07:50:32.28#ibcon#*after write, iclass 27, count 0 2006.232.07:50:32.28#ibcon#*before return 0, iclass 27, count 0 2006.232.07:50:32.28#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.232.07:50:32.28#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.232.07:50:32.28#ibcon#about to clear, iclass 27 cls_cnt 0 2006.232.07:50:32.28#ibcon#cleared, iclass 27 cls_cnt 0 2006.232.07:50:32.28$vc4f8/vblo=6,752.99 2006.232.07:50:32.28#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.232.07:50:32.28#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.232.07:50:32.28#ibcon#ireg 17 cls_cnt 0 2006.232.07:50:32.28#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:50:32.28#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:50:32.28#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:50:32.28#ibcon#enter wrdev, iclass 29, count 0 2006.232.07:50:32.28#ibcon#first serial, iclass 29, count 0 2006.232.07:50:32.28#ibcon#enter sib2, iclass 29, count 0 2006.232.07:50:32.28#ibcon#flushed, iclass 29, count 0 2006.232.07:50:32.28#ibcon#about to write, iclass 29, count 0 2006.232.07:50:32.28#ibcon#wrote, iclass 29, count 0 2006.232.07:50:32.28#ibcon#about to read 3, iclass 29, count 0 2006.232.07:50:32.30#ibcon#read 3, iclass 29, count 0 2006.232.07:50:32.30#ibcon#about to read 4, iclass 29, count 0 2006.232.07:50:32.30#ibcon#read 4, iclass 29, count 0 2006.232.07:50:32.30#ibcon#about to read 5, iclass 29, count 0 2006.232.07:50:32.30#ibcon#read 5, iclass 29, count 0 2006.232.07:50:32.30#ibcon#about to read 6, iclass 29, count 0 2006.232.07:50:32.30#ibcon#read 6, iclass 29, count 0 2006.232.07:50:32.30#ibcon#end of sib2, iclass 29, count 0 2006.232.07:50:32.30#ibcon#*mode == 0, iclass 29, count 0 2006.232.07:50:32.30#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.232.07:50:32.30#ibcon#[28=FRQ=06,752.99\r\n] 2006.232.07:50:32.30#ibcon#*before write, iclass 29, count 0 2006.232.07:50:32.30#ibcon#enter sib2, iclass 29, count 0 2006.232.07:50:32.30#ibcon#flushed, iclass 29, count 0 2006.232.07:50:32.30#ibcon#about to write, iclass 29, count 0 2006.232.07:50:32.30#ibcon#wrote, iclass 29, count 0 2006.232.07:50:32.30#ibcon#about to read 3, iclass 29, count 0 2006.232.07:50:32.34#ibcon#read 3, iclass 29, count 0 2006.232.07:50:32.34#ibcon#about to read 4, iclass 29, count 0 2006.232.07:50:32.34#ibcon#read 4, iclass 29, count 0 2006.232.07:50:32.34#ibcon#about to read 5, iclass 29, count 0 2006.232.07:50:32.34#ibcon#read 5, iclass 29, count 0 2006.232.07:50:32.34#ibcon#about to read 6, iclass 29, count 0 2006.232.07:50:32.34#ibcon#read 6, iclass 29, count 0 2006.232.07:50:32.34#ibcon#end of sib2, iclass 29, count 0 2006.232.07:50:32.34#ibcon#*after write, iclass 29, count 0 2006.232.07:50:32.34#ibcon#*before return 0, iclass 29, count 0 2006.232.07:50:32.34#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:50:32.34#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:50:32.34#ibcon#about to clear, iclass 29 cls_cnt 0 2006.232.07:50:32.34#ibcon#cleared, iclass 29 cls_cnt 0 2006.232.07:50:32.34$vc4f8/vb=6,4 2006.232.07:50:32.34#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.232.07:50:32.34#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.232.07:50:32.34#ibcon#ireg 11 cls_cnt 2 2006.232.07:50:32.34#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.232.07:50:32.40#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.232.07:50:32.40#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.232.07:50:32.40#ibcon#enter wrdev, iclass 31, count 2 2006.232.07:50:32.40#ibcon#first serial, iclass 31, count 2 2006.232.07:50:32.40#ibcon#enter sib2, iclass 31, count 2 2006.232.07:50:32.40#ibcon#flushed, iclass 31, count 2 2006.232.07:50:32.40#ibcon#about to write, iclass 31, count 2 2006.232.07:50:32.40#ibcon#wrote, iclass 31, count 2 2006.232.07:50:32.40#ibcon#about to read 3, iclass 31, count 2 2006.232.07:50:32.42#ibcon#read 3, iclass 31, count 2 2006.232.07:50:32.42#ibcon#about to read 4, iclass 31, count 2 2006.232.07:50:32.42#ibcon#read 4, iclass 31, count 2 2006.232.07:50:32.42#ibcon#about to read 5, iclass 31, count 2 2006.232.07:50:32.42#ibcon#read 5, iclass 31, count 2 2006.232.07:50:32.42#ibcon#about to read 6, iclass 31, count 2 2006.232.07:50:32.42#ibcon#read 6, iclass 31, count 2 2006.232.07:50:32.42#ibcon#end of sib2, iclass 31, count 2 2006.232.07:50:32.42#ibcon#*mode == 0, iclass 31, count 2 2006.232.07:50:32.42#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.232.07:50:32.42#ibcon#[27=AT06-04\r\n] 2006.232.07:50:32.42#ibcon#*before write, iclass 31, count 2 2006.232.07:50:32.42#ibcon#enter sib2, iclass 31, count 2 2006.232.07:50:32.42#ibcon#flushed, iclass 31, count 2 2006.232.07:50:32.42#ibcon#about to write, iclass 31, count 2 2006.232.07:50:32.42#ibcon#wrote, iclass 31, count 2 2006.232.07:50:32.42#ibcon#about to read 3, iclass 31, count 2 2006.232.07:50:32.45#ibcon#read 3, iclass 31, count 2 2006.232.07:50:32.45#ibcon#about to read 4, iclass 31, count 2 2006.232.07:50:32.45#ibcon#read 4, iclass 31, count 2 2006.232.07:50:32.45#ibcon#about to read 5, iclass 31, count 2 2006.232.07:50:32.45#ibcon#read 5, iclass 31, count 2 2006.232.07:50:32.45#ibcon#about to read 6, iclass 31, count 2 2006.232.07:50:32.45#ibcon#read 6, iclass 31, count 2 2006.232.07:50:32.45#ibcon#end of sib2, iclass 31, count 2 2006.232.07:50:32.45#ibcon#*after write, iclass 31, count 2 2006.232.07:50:32.45#ibcon#*before return 0, iclass 31, count 2 2006.232.07:50:32.45#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.232.07:50:32.45#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.232.07:50:32.45#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.232.07:50:32.45#ibcon#ireg 7 cls_cnt 0 2006.232.07:50:32.45#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.232.07:50:32.58#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.232.07:50:32.58#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.232.07:50:32.58#ibcon#enter wrdev, iclass 31, count 0 2006.232.07:50:32.58#ibcon#first serial, iclass 31, count 0 2006.232.07:50:32.58#ibcon#enter sib2, iclass 31, count 0 2006.232.07:50:32.58#ibcon#flushed, iclass 31, count 0 2006.232.07:50:32.58#ibcon#about to write, iclass 31, count 0 2006.232.07:50:32.58#ibcon#wrote, iclass 31, count 0 2006.232.07:50:32.58#ibcon#about to read 3, iclass 31, count 0 2006.232.07:50:32.59#ibcon#read 3, iclass 31, count 0 2006.232.07:50:32.59#ibcon#about to read 4, iclass 31, count 0 2006.232.07:50:32.59#ibcon#read 4, iclass 31, count 0 2006.232.07:50:32.59#ibcon#about to read 5, iclass 31, count 0 2006.232.07:50:32.59#ibcon#read 5, iclass 31, count 0 2006.232.07:50:32.59#ibcon#about to read 6, iclass 31, count 0 2006.232.07:50:32.59#ibcon#read 6, iclass 31, count 0 2006.232.07:50:32.59#ibcon#end of sib2, iclass 31, count 0 2006.232.07:50:32.59#ibcon#*mode == 0, iclass 31, count 0 2006.232.07:50:32.59#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.232.07:50:32.59#ibcon#[27=USB\r\n] 2006.232.07:50:32.59#ibcon#*before write, iclass 31, count 0 2006.232.07:50:32.59#ibcon#enter sib2, iclass 31, count 0 2006.232.07:50:32.59#ibcon#flushed, iclass 31, count 0 2006.232.07:50:32.59#ibcon#about to write, iclass 31, count 0 2006.232.07:50:32.59#ibcon#wrote, iclass 31, count 0 2006.232.07:50:32.59#ibcon#about to read 3, iclass 31, count 0 2006.232.07:50:32.62#ibcon#read 3, iclass 31, count 0 2006.232.07:50:32.62#ibcon#about to read 4, iclass 31, count 0 2006.232.07:50:32.62#ibcon#read 4, iclass 31, count 0 2006.232.07:50:32.62#ibcon#about to read 5, iclass 31, count 0 2006.232.07:50:32.62#ibcon#read 5, iclass 31, count 0 2006.232.07:50:32.62#ibcon#about to read 6, iclass 31, count 0 2006.232.07:50:32.62#ibcon#read 6, iclass 31, count 0 2006.232.07:50:32.62#ibcon#end of sib2, iclass 31, count 0 2006.232.07:50:32.62#ibcon#*after write, iclass 31, count 0 2006.232.07:50:32.62#ibcon#*before return 0, iclass 31, count 0 2006.232.07:50:32.62#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.232.07:50:32.62#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.232.07:50:32.62#ibcon#about to clear, iclass 31 cls_cnt 0 2006.232.07:50:32.62#ibcon#cleared, iclass 31 cls_cnt 0 2006.232.07:50:32.62$vc4f8/vabw=wide 2006.232.07:50:32.62#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.232.07:50:32.62#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.232.07:50:32.62#ibcon#ireg 8 cls_cnt 0 2006.232.07:50:32.62#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.232.07:50:32.62#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.232.07:50:32.62#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.232.07:50:32.62#ibcon#enter wrdev, iclass 33, count 0 2006.232.07:50:32.62#ibcon#first serial, iclass 33, count 0 2006.232.07:50:32.62#ibcon#enter sib2, iclass 33, count 0 2006.232.07:50:32.62#ibcon#flushed, iclass 33, count 0 2006.232.07:50:32.62#ibcon#about to write, iclass 33, count 0 2006.232.07:50:32.62#ibcon#wrote, iclass 33, count 0 2006.232.07:50:32.62#ibcon#about to read 3, iclass 33, count 0 2006.232.07:50:32.64#ibcon#read 3, iclass 33, count 0 2006.232.07:50:32.64#ibcon#about to read 4, iclass 33, count 0 2006.232.07:50:32.64#ibcon#read 4, iclass 33, count 0 2006.232.07:50:32.64#ibcon#about to read 5, iclass 33, count 0 2006.232.07:50:32.64#ibcon#read 5, iclass 33, count 0 2006.232.07:50:32.64#ibcon#about to read 6, iclass 33, count 0 2006.232.07:50:32.64#ibcon#read 6, iclass 33, count 0 2006.232.07:50:32.64#ibcon#end of sib2, iclass 33, count 0 2006.232.07:50:32.64#ibcon#*mode == 0, iclass 33, count 0 2006.232.07:50:32.64#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.232.07:50:32.64#ibcon#[25=BW32\r\n] 2006.232.07:50:32.64#ibcon#*before write, iclass 33, count 0 2006.232.07:50:32.64#ibcon#enter sib2, iclass 33, count 0 2006.232.07:50:32.64#ibcon#flushed, iclass 33, count 0 2006.232.07:50:32.64#ibcon#about to write, iclass 33, count 0 2006.232.07:50:32.64#ibcon#wrote, iclass 33, count 0 2006.232.07:50:32.64#ibcon#about to read 3, iclass 33, count 0 2006.232.07:50:32.67#ibcon#read 3, iclass 33, count 0 2006.232.07:50:32.67#ibcon#about to read 4, iclass 33, count 0 2006.232.07:50:32.67#ibcon#read 4, iclass 33, count 0 2006.232.07:50:32.67#ibcon#about to read 5, iclass 33, count 0 2006.232.07:50:32.67#ibcon#read 5, iclass 33, count 0 2006.232.07:50:32.67#ibcon#about to read 6, iclass 33, count 0 2006.232.07:50:32.67#ibcon#read 6, iclass 33, count 0 2006.232.07:50:32.67#ibcon#end of sib2, iclass 33, count 0 2006.232.07:50:32.67#ibcon#*after write, iclass 33, count 0 2006.232.07:50:32.67#ibcon#*before return 0, iclass 33, count 0 2006.232.07:50:32.67#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.232.07:50:32.67#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.232.07:50:32.67#ibcon#about to clear, iclass 33 cls_cnt 0 2006.232.07:50:32.67#ibcon#cleared, iclass 33 cls_cnt 0 2006.232.07:50:32.67$vc4f8/vbbw=wide 2006.232.07:50:32.67#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.232.07:50:32.67#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.232.07:50:32.67#ibcon#ireg 8 cls_cnt 0 2006.232.07:50:32.67#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.232.07:50:32.74#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.232.07:50:32.74#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.232.07:50:32.74#ibcon#enter wrdev, iclass 35, count 0 2006.232.07:50:32.74#ibcon#first serial, iclass 35, count 0 2006.232.07:50:32.74#ibcon#enter sib2, iclass 35, count 0 2006.232.07:50:32.74#ibcon#flushed, iclass 35, count 0 2006.232.07:50:32.74#ibcon#about to write, iclass 35, count 0 2006.232.07:50:32.74#ibcon#wrote, iclass 35, count 0 2006.232.07:50:32.74#ibcon#about to read 3, iclass 35, count 0 2006.232.07:50:32.76#ibcon#read 3, iclass 35, count 0 2006.232.07:50:32.76#ibcon#about to read 4, iclass 35, count 0 2006.232.07:50:32.76#ibcon#read 4, iclass 35, count 0 2006.232.07:50:32.76#ibcon#about to read 5, iclass 35, count 0 2006.232.07:50:32.76#ibcon#read 5, iclass 35, count 0 2006.232.07:50:32.76#ibcon#about to read 6, iclass 35, count 0 2006.232.07:50:32.76#ibcon#read 6, iclass 35, count 0 2006.232.07:50:32.76#ibcon#end of sib2, iclass 35, count 0 2006.232.07:50:32.76#ibcon#*mode == 0, iclass 35, count 0 2006.232.07:50:32.76#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.232.07:50:32.76#ibcon#[27=BW32\r\n] 2006.232.07:50:32.76#ibcon#*before write, iclass 35, count 0 2006.232.07:50:32.76#ibcon#enter sib2, iclass 35, count 0 2006.232.07:50:32.76#ibcon#flushed, iclass 35, count 0 2006.232.07:50:32.76#ibcon#about to write, iclass 35, count 0 2006.232.07:50:32.76#ibcon#wrote, iclass 35, count 0 2006.232.07:50:32.76#ibcon#about to read 3, iclass 35, count 0 2006.232.07:50:32.79#ibcon#read 3, iclass 35, count 0 2006.232.07:50:32.79#ibcon#about to read 4, iclass 35, count 0 2006.232.07:50:32.79#ibcon#read 4, iclass 35, count 0 2006.232.07:50:32.79#ibcon#about to read 5, iclass 35, count 0 2006.232.07:50:32.79#ibcon#read 5, iclass 35, count 0 2006.232.07:50:32.79#ibcon#about to read 6, iclass 35, count 0 2006.232.07:50:32.79#ibcon#read 6, iclass 35, count 0 2006.232.07:50:32.79#ibcon#end of sib2, iclass 35, count 0 2006.232.07:50:32.79#ibcon#*after write, iclass 35, count 0 2006.232.07:50:32.79#ibcon#*before return 0, iclass 35, count 0 2006.232.07:50:32.79#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.232.07:50:32.79#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.232.07:50:32.79#ibcon#about to clear, iclass 35 cls_cnt 0 2006.232.07:50:32.79#ibcon#cleared, iclass 35 cls_cnt 0 2006.232.07:50:32.79$4f8m12a/ifd4f 2006.232.07:50:32.79$ifd4f/lo= 2006.232.07:50:32.79$ifd4f/lo=lo1,7680.00,usb,rcp,1 2006.232.07:50:32.79$ifd4f/lo=lo2,1600.00,usb,rcp,1 2006.232.07:50:32.79$ifd4f/lo=lo3,8080.00,usb,rcp,1 2006.232.07:50:32.79$ifd4f/patch= 2006.232.07:50:32.79$ifd4f/patch=lo1,a1,a2,a3,a4 2006.232.07:50:32.79$ifd4f/patch=lo2,b1,b2,b3,b4,b5,b6 2006.232.07:50:32.79$ifd4f/patch=lo3,a5,a6,a7,a8 2006.232.07:50:32.79$4f8m12a/"form=m,16.000,1:2 2006.232.07:50:32.79$4f8m12a/"tpicd 2006.232.07:50:32.79$4f8m12a/echo=off 2006.232.07:50:32.79$4f8m12a/xlog=off 2006.232.07:50:32.79:!2006.232.07:51:00 2006.232.07:50:40.13#trakl#Source acquired 2006.232.07:50:42.13#flagr#flagr/antenna,acquired 2006.232.07:51:00.00:preob 2006.232.07:51:01.13/onsource/TRACKING 2006.232.07:51:01.13:!2006.232.07:51:10 2006.232.07:51:10.00:data_valid=on 2006.232.07:51:10.00:midob 2006.232.07:51:10.13/onsource/TRACKING 2006.232.07:51:10.13/wx/29.44,1007.2,86 2006.232.07:51:10.19/cable/+6.3872E-03 2006.232.07:51:11.28/va/01,08,usb,yes,31,32 2006.232.07:51:11.28/va/02,07,usb,yes,30,32 2006.232.07:51:11.28/va/03,08,usb,yes,23,23 2006.232.07:51:11.28/va/04,07,usb,yes,32,35 2006.232.07:51:11.28/va/05,07,usb,yes,35,37 2006.232.07:51:11.28/va/06,06,usb,yes,35,34 2006.232.07:51:11.28/va/07,06,usb,yes,36,35 2006.232.07:51:11.28/va/08,06,usb,yes,38,37 2006.232.07:51:11.51/valo/01,532.99,yes,locked 2006.232.07:51:11.51/valo/02,572.99,yes,locked 2006.232.07:51:11.51/valo/03,672.99,yes,locked 2006.232.07:51:11.51/valo/04,832.99,yes,locked 2006.232.07:51:11.51/valo/05,652.99,yes,locked 2006.232.07:51:11.51/valo/06,772.99,yes,locked 2006.232.07:51:11.51/valo/07,832.99,yes,locked 2006.232.07:51:11.51/valo/08,852.99,yes,locked 2006.232.07:51:12.60/vb/01,04,usb,yes,30,29 2006.232.07:51:12.60/vb/02,04,usb,yes,32,34 2006.232.07:51:12.60/vb/03,04,usb,yes,28,32 2006.232.07:51:12.60/vb/04,04,usb,yes,29,29 2006.232.07:51:12.60/vb/05,03,usb,yes,35,39 2006.232.07:51:12.60/vb/06,04,usb,yes,29,31 2006.232.07:51:12.60/vb/07,04,usb,yes,31,31 2006.232.07:51:12.60/vb/08,04,usb,yes,28,32 2006.232.07:51:12.83/vblo/01,632.99,yes,locked 2006.232.07:51:12.83/vblo/02,640.99,yes,locked 2006.232.07:51:12.83/vblo/03,656.99,yes,locked 2006.232.07:51:12.83/vblo/04,712.99,yes,locked 2006.232.07:51:12.83/vblo/05,744.99,yes,locked 2006.232.07:51:12.83/vblo/06,752.99,yes,locked 2006.232.07:51:12.83/vblo/07,734.99,yes,locked 2006.232.07:51:12.83/vblo/08,744.99,yes,locked 2006.232.07:51:12.98/vabw/8 2006.232.07:51:13.13/vbbw/8 2006.232.07:51:13.22/xfe/off,on,13.0 2006.232.07:51:13.60/ifatt/23,28,28,28 2006.232.07:51:14.07/fmout-gps/S +4.47E-07 2006.232.07:51:14.11:!2006.232.07:52:10 2006.232.07:52:10.00:data_valid=off 2006.232.07:52:10.00:postob 2006.232.07:52:10.14/cable/+6.3865E-03 2006.232.07:52:10.14/wx/29.43,1007.3,87 2006.232.07:52:11.07/fmout-gps/S +4.47E-07 2006.232.07:52:11.07:scan_name=232-0753,k06232,60 2006.232.07:52:11.07:source=1300+580,130252.47,574837.6,2000.0,ccw 2006.232.07:52:11.14#flagr#flagr/antenna,new-source 2006.232.07:52:12.14:checkk5 2006.232.07:52:12.51/chk_autoobs//k5ts1/ autoobs is running! 2006.232.07:52:12.89/chk_autoobs//k5ts2/ autoobs is running! 2006.232.07:52:13.28/chk_autoobs//k5ts3/ autoobs is running! 2006.232.07:52:13.65/chk_autoobs//k5ts4/ autoobs is running! 2006.232.07:52:14.01/chk_obsdata//k5ts1/T2320751??a.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:52:14.38/chk_obsdata//k5ts2/T2320751??b.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:52:14.75/chk_obsdata//k5ts3/T2320751??c.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:52:15.11/chk_obsdata//k5ts4/T2320751??d.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:52:15.80/k5log//k5ts1_log_newline 2006.232.07:52:16.49/k5log//k5ts2_log_newline 2006.232.07:52:17.18/k5log//k5ts3_log_newline 2006.232.07:52:17.86/k5log//k5ts4_log_newline 2006.232.07:52:17.88/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.232.07:52:17.89:4f8m12a=1 2006.232.07:52:17.89$4f8m12a/echo=on 2006.232.07:52:17.89$4f8m12a/pcalon 2006.232.07:52:17.89$pcalon/"no phase cal control is implemented here 2006.232.07:52:17.89$4f8m12a/"tpicd=stop 2006.232.07:52:17.89$4f8m12a/vc4f8 2006.232.07:52:17.89$vc4f8/valo=1,532.99 2006.232.07:52:17.89#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.232.07:52:17.89#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.232.07:52:17.89#ibcon#ireg 17 cls_cnt 0 2006.232.07:52:17.89#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.232.07:52:17.89#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.232.07:52:17.89#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.232.07:52:17.89#ibcon#enter wrdev, iclass 4, count 0 2006.232.07:52:17.89#ibcon#first serial, iclass 4, count 0 2006.232.07:52:17.89#ibcon#enter sib2, iclass 4, count 0 2006.232.07:52:17.89#ibcon#flushed, iclass 4, count 0 2006.232.07:52:17.89#ibcon#about to write, iclass 4, count 0 2006.232.07:52:17.89#ibcon#wrote, iclass 4, count 0 2006.232.07:52:17.89#ibcon#about to read 3, iclass 4, count 0 2006.232.07:52:17.93#ibcon#read 3, iclass 4, count 0 2006.232.07:52:17.93#ibcon#about to read 4, iclass 4, count 0 2006.232.07:52:17.93#ibcon#read 4, iclass 4, count 0 2006.232.07:52:17.93#ibcon#about to read 5, iclass 4, count 0 2006.232.07:52:17.93#ibcon#read 5, iclass 4, count 0 2006.232.07:52:17.93#ibcon#about to read 6, iclass 4, count 0 2006.232.07:52:17.93#ibcon#read 6, iclass 4, count 0 2006.232.07:52:17.93#ibcon#end of sib2, iclass 4, count 0 2006.232.07:52:17.93#ibcon#*mode == 0, iclass 4, count 0 2006.232.07:52:17.93#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.232.07:52:17.93#ibcon#[26=FRQ=01,532.99\r\n] 2006.232.07:52:17.93#ibcon#*before write, iclass 4, count 0 2006.232.07:52:17.93#ibcon#enter sib2, iclass 4, count 0 2006.232.07:52:17.93#ibcon#flushed, iclass 4, count 0 2006.232.07:52:17.93#ibcon#about to write, iclass 4, count 0 2006.232.07:52:17.93#ibcon#wrote, iclass 4, count 0 2006.232.07:52:17.93#ibcon#about to read 3, iclass 4, count 0 2006.232.07:52:17.98#ibcon#read 3, iclass 4, count 0 2006.232.07:52:17.98#ibcon#about to read 4, iclass 4, count 0 2006.232.07:52:17.98#ibcon#read 4, iclass 4, count 0 2006.232.07:52:17.98#ibcon#about to read 5, iclass 4, count 0 2006.232.07:52:17.98#ibcon#read 5, iclass 4, count 0 2006.232.07:52:17.98#ibcon#about to read 6, iclass 4, count 0 2006.232.07:52:17.98#ibcon#read 6, iclass 4, count 0 2006.232.07:52:17.98#ibcon#end of sib2, iclass 4, count 0 2006.232.07:52:17.98#ibcon#*after write, iclass 4, count 0 2006.232.07:52:17.98#ibcon#*before return 0, iclass 4, count 0 2006.232.07:52:17.98#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.232.07:52:17.98#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.232.07:52:17.98#ibcon#about to clear, iclass 4 cls_cnt 0 2006.232.07:52:17.98#ibcon#cleared, iclass 4 cls_cnt 0 2006.232.07:52:17.98$vc4f8/va=1,8 2006.232.07:52:17.98#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.232.07:52:17.98#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.232.07:52:17.98#ibcon#ireg 11 cls_cnt 2 2006.232.07:52:17.98#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.232.07:52:17.98#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.232.07:52:17.98#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.232.07:52:17.98#ibcon#enter wrdev, iclass 7, count 2 2006.232.07:52:17.98#ibcon#first serial, iclass 7, count 2 2006.232.07:52:17.98#ibcon#enter sib2, iclass 7, count 2 2006.232.07:52:17.98#ibcon#flushed, iclass 7, count 2 2006.232.07:52:17.98#ibcon#about to write, iclass 7, count 2 2006.232.07:52:17.98#ibcon#wrote, iclass 7, count 2 2006.232.07:52:17.98#ibcon#about to read 3, iclass 7, count 2 2006.232.07:52:17.98#abcon#<5=/05 3.2 6.2 29.43 861007.3\r\n> 2006.232.07:52:18.00#ibcon#read 3, iclass 7, count 2 2006.232.07:52:18.00#ibcon#about to read 4, iclass 7, count 2 2006.232.07:52:18.00#ibcon#read 4, iclass 7, count 2 2006.232.07:52:18.00#ibcon#about to read 5, iclass 7, count 2 2006.232.07:52:18.00#ibcon#read 5, iclass 7, count 2 2006.232.07:52:18.00#ibcon#about to read 6, iclass 7, count 2 2006.232.07:52:18.00#ibcon#read 6, iclass 7, count 2 2006.232.07:52:18.00#ibcon#end of sib2, iclass 7, count 2 2006.232.07:52:18.00#ibcon#*mode == 0, iclass 7, count 2 2006.232.07:52:18.00#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.232.07:52:18.00#ibcon#[25=AT01-08\r\n] 2006.232.07:52:18.00#ibcon#*before write, iclass 7, count 2 2006.232.07:52:18.00#ibcon#enter sib2, iclass 7, count 2 2006.232.07:52:18.00#ibcon#flushed, iclass 7, count 2 2006.232.07:52:18.00#ibcon#about to write, iclass 7, count 2 2006.232.07:52:18.00#ibcon#wrote, iclass 7, count 2 2006.232.07:52:18.00#ibcon#about to read 3, iclass 7, count 2 2006.232.07:52:18.00#abcon#{5=INTERFACE CLEAR} 2006.232.07:52:18.03#ibcon#read 3, iclass 7, count 2 2006.232.07:52:18.03#ibcon#about to read 4, iclass 7, count 2 2006.232.07:52:18.03#ibcon#read 4, iclass 7, count 2 2006.232.07:52:18.03#ibcon#about to read 5, iclass 7, count 2 2006.232.07:52:18.03#ibcon#read 5, iclass 7, count 2 2006.232.07:52:18.03#ibcon#about to read 6, iclass 7, count 2 2006.232.07:52:18.03#ibcon#read 6, iclass 7, count 2 2006.232.07:52:18.03#ibcon#end of sib2, iclass 7, count 2 2006.232.07:52:18.03#ibcon#*after write, iclass 7, count 2 2006.232.07:52:18.03#ibcon#*before return 0, iclass 7, count 2 2006.232.07:52:18.03#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.232.07:52:18.03#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.232.07:52:18.03#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.232.07:52:18.03#ibcon#ireg 7 cls_cnt 0 2006.232.07:52:18.03#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.232.07:52:18.06#abcon#[5=S1D000X0/0*\r\n] 2006.232.07:52:18.15#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.232.07:52:18.15#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.232.07:52:18.15#ibcon#enter wrdev, iclass 7, count 0 2006.232.07:52:18.15#ibcon#first serial, iclass 7, count 0 2006.232.07:52:18.15#ibcon#enter sib2, iclass 7, count 0 2006.232.07:52:18.15#ibcon#flushed, iclass 7, count 0 2006.232.07:52:18.15#ibcon#about to write, iclass 7, count 0 2006.232.07:52:18.15#ibcon#wrote, iclass 7, count 0 2006.232.07:52:18.15#ibcon#about to read 3, iclass 7, count 0 2006.232.07:52:18.17#ibcon#read 3, iclass 7, count 0 2006.232.07:52:18.17#ibcon#about to read 4, iclass 7, count 0 2006.232.07:52:18.17#ibcon#read 4, iclass 7, count 0 2006.232.07:52:18.17#ibcon#about to read 5, iclass 7, count 0 2006.232.07:52:18.17#ibcon#read 5, iclass 7, count 0 2006.232.07:52:18.17#ibcon#about to read 6, iclass 7, count 0 2006.232.07:52:18.17#ibcon#read 6, iclass 7, count 0 2006.232.07:52:18.17#ibcon#end of sib2, iclass 7, count 0 2006.232.07:52:18.17#ibcon#*mode == 0, iclass 7, count 0 2006.232.07:52:18.17#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.232.07:52:18.17#ibcon#[25=USB\r\n] 2006.232.07:52:18.17#ibcon#*before write, iclass 7, count 0 2006.232.07:52:18.17#ibcon#enter sib2, iclass 7, count 0 2006.232.07:52:18.17#ibcon#flushed, iclass 7, count 0 2006.232.07:52:18.17#ibcon#about to write, iclass 7, count 0 2006.232.07:52:18.17#ibcon#wrote, iclass 7, count 0 2006.232.07:52:18.17#ibcon#about to read 3, iclass 7, count 0 2006.232.07:52:18.20#ibcon#read 3, iclass 7, count 0 2006.232.07:52:18.20#ibcon#about to read 4, iclass 7, count 0 2006.232.07:52:18.20#ibcon#read 4, iclass 7, count 0 2006.232.07:52:18.20#ibcon#about to read 5, iclass 7, count 0 2006.232.07:52:18.20#ibcon#read 5, iclass 7, count 0 2006.232.07:52:18.20#ibcon#about to read 6, iclass 7, count 0 2006.232.07:52:18.20#ibcon#read 6, iclass 7, count 0 2006.232.07:52:18.20#ibcon#end of sib2, iclass 7, count 0 2006.232.07:52:18.20#ibcon#*after write, iclass 7, count 0 2006.232.07:52:18.20#ibcon#*before return 0, iclass 7, count 0 2006.232.07:52:18.20#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.232.07:52:18.20#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.232.07:52:18.20#ibcon#about to clear, iclass 7 cls_cnt 0 2006.232.07:52:18.20#ibcon#cleared, iclass 7 cls_cnt 0 2006.232.07:52:18.20$vc4f8/valo=2,572.99 2006.232.07:52:18.20#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.232.07:52:18.20#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.232.07:52:18.20#ibcon#ireg 17 cls_cnt 0 2006.232.07:52:18.20#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.232.07:52:18.20#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.232.07:52:18.20#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.232.07:52:18.20#ibcon#enter wrdev, iclass 14, count 0 2006.232.07:52:18.20#ibcon#first serial, iclass 14, count 0 2006.232.07:52:18.20#ibcon#enter sib2, iclass 14, count 0 2006.232.07:52:18.20#ibcon#flushed, iclass 14, count 0 2006.232.07:52:18.20#ibcon#about to write, iclass 14, count 0 2006.232.07:52:18.20#ibcon#wrote, iclass 14, count 0 2006.232.07:52:18.20#ibcon#about to read 3, iclass 14, count 0 2006.232.07:52:18.22#ibcon#read 3, iclass 14, count 0 2006.232.07:52:18.22#ibcon#about to read 4, iclass 14, count 0 2006.232.07:52:18.22#ibcon#read 4, iclass 14, count 0 2006.232.07:52:18.22#ibcon#about to read 5, iclass 14, count 0 2006.232.07:52:18.22#ibcon#read 5, iclass 14, count 0 2006.232.07:52:18.22#ibcon#about to read 6, iclass 14, count 0 2006.232.07:52:18.22#ibcon#read 6, iclass 14, count 0 2006.232.07:52:18.22#ibcon#end of sib2, iclass 14, count 0 2006.232.07:52:18.22#ibcon#*mode == 0, iclass 14, count 0 2006.232.07:52:18.22#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.232.07:52:18.22#ibcon#[26=FRQ=02,572.99\r\n] 2006.232.07:52:18.22#ibcon#*before write, iclass 14, count 0 2006.232.07:52:18.22#ibcon#enter sib2, iclass 14, count 0 2006.232.07:52:18.22#ibcon#flushed, iclass 14, count 0 2006.232.07:52:18.22#ibcon#about to write, iclass 14, count 0 2006.232.07:52:18.22#ibcon#wrote, iclass 14, count 0 2006.232.07:52:18.22#ibcon#about to read 3, iclass 14, count 0 2006.232.07:52:18.26#ibcon#read 3, iclass 14, count 0 2006.232.07:52:18.26#ibcon#about to read 4, iclass 14, count 0 2006.232.07:52:18.26#ibcon#read 4, iclass 14, count 0 2006.232.07:52:18.26#ibcon#about to read 5, iclass 14, count 0 2006.232.07:52:18.26#ibcon#read 5, iclass 14, count 0 2006.232.07:52:18.26#ibcon#about to read 6, iclass 14, count 0 2006.232.07:52:18.26#ibcon#read 6, iclass 14, count 0 2006.232.07:52:18.26#ibcon#end of sib2, iclass 14, count 0 2006.232.07:52:18.26#ibcon#*after write, iclass 14, count 0 2006.232.07:52:18.26#ibcon#*before return 0, iclass 14, count 0 2006.232.07:52:18.26#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.232.07:52:18.26#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.232.07:52:18.26#ibcon#about to clear, iclass 14 cls_cnt 0 2006.232.07:52:18.26#ibcon#cleared, iclass 14 cls_cnt 0 2006.232.07:52:18.26$vc4f8/va=2,7 2006.232.07:52:18.26#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.232.07:52:18.26#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.232.07:52:18.26#ibcon#ireg 11 cls_cnt 2 2006.232.07:52:18.26#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.232.07:52:18.32#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.232.07:52:18.32#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.232.07:52:18.32#ibcon#enter wrdev, iclass 16, count 2 2006.232.07:52:18.32#ibcon#first serial, iclass 16, count 2 2006.232.07:52:18.32#ibcon#enter sib2, iclass 16, count 2 2006.232.07:52:18.32#ibcon#flushed, iclass 16, count 2 2006.232.07:52:18.32#ibcon#about to write, iclass 16, count 2 2006.232.07:52:18.32#ibcon#wrote, iclass 16, count 2 2006.232.07:52:18.32#ibcon#about to read 3, iclass 16, count 2 2006.232.07:52:18.34#ibcon#read 3, iclass 16, count 2 2006.232.07:52:18.34#ibcon#about to read 4, iclass 16, count 2 2006.232.07:52:18.34#ibcon#read 4, iclass 16, count 2 2006.232.07:52:18.34#ibcon#about to read 5, iclass 16, count 2 2006.232.07:52:18.34#ibcon#read 5, iclass 16, count 2 2006.232.07:52:18.34#ibcon#about to read 6, iclass 16, count 2 2006.232.07:52:18.34#ibcon#read 6, iclass 16, count 2 2006.232.07:52:18.34#ibcon#end of sib2, iclass 16, count 2 2006.232.07:52:18.34#ibcon#*mode == 0, iclass 16, count 2 2006.232.07:52:18.34#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.232.07:52:18.34#ibcon#[25=AT02-07\r\n] 2006.232.07:52:18.34#ibcon#*before write, iclass 16, count 2 2006.232.07:52:18.34#ibcon#enter sib2, iclass 16, count 2 2006.232.07:52:18.34#ibcon#flushed, iclass 16, count 2 2006.232.07:52:18.34#ibcon#about to write, iclass 16, count 2 2006.232.07:52:18.34#ibcon#wrote, iclass 16, count 2 2006.232.07:52:18.34#ibcon#about to read 3, iclass 16, count 2 2006.232.07:52:18.37#ibcon#read 3, iclass 16, count 2 2006.232.07:52:18.37#ibcon#about to read 4, iclass 16, count 2 2006.232.07:52:18.37#ibcon#read 4, iclass 16, count 2 2006.232.07:52:18.37#ibcon#about to read 5, iclass 16, count 2 2006.232.07:52:18.37#ibcon#read 5, iclass 16, count 2 2006.232.07:52:18.37#ibcon#about to read 6, iclass 16, count 2 2006.232.07:52:18.37#ibcon#read 6, iclass 16, count 2 2006.232.07:52:18.37#ibcon#end of sib2, iclass 16, count 2 2006.232.07:52:18.37#ibcon#*after write, iclass 16, count 2 2006.232.07:52:18.37#ibcon#*before return 0, iclass 16, count 2 2006.232.07:52:18.37#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.232.07:52:18.37#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.232.07:52:18.37#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.232.07:52:18.37#ibcon#ireg 7 cls_cnt 0 2006.232.07:52:18.37#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.232.07:52:18.49#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.232.07:52:18.49#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.232.07:52:18.49#ibcon#enter wrdev, iclass 16, count 0 2006.232.07:52:18.49#ibcon#first serial, iclass 16, count 0 2006.232.07:52:18.49#ibcon#enter sib2, iclass 16, count 0 2006.232.07:52:18.49#ibcon#flushed, iclass 16, count 0 2006.232.07:52:18.49#ibcon#about to write, iclass 16, count 0 2006.232.07:52:18.49#ibcon#wrote, iclass 16, count 0 2006.232.07:52:18.49#ibcon#about to read 3, iclass 16, count 0 2006.232.07:52:18.51#ibcon#read 3, iclass 16, count 0 2006.232.07:52:18.51#ibcon#about to read 4, iclass 16, count 0 2006.232.07:52:18.51#ibcon#read 4, iclass 16, count 0 2006.232.07:52:18.51#ibcon#about to read 5, iclass 16, count 0 2006.232.07:52:18.51#ibcon#read 5, iclass 16, count 0 2006.232.07:52:18.51#ibcon#about to read 6, iclass 16, count 0 2006.232.07:52:18.51#ibcon#read 6, iclass 16, count 0 2006.232.07:52:18.51#ibcon#end of sib2, iclass 16, count 0 2006.232.07:52:18.51#ibcon#*mode == 0, iclass 16, count 0 2006.232.07:52:18.51#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.232.07:52:18.51#ibcon#[25=USB\r\n] 2006.232.07:52:18.51#ibcon#*before write, iclass 16, count 0 2006.232.07:52:18.51#ibcon#enter sib2, iclass 16, count 0 2006.232.07:52:18.51#ibcon#flushed, iclass 16, count 0 2006.232.07:52:18.51#ibcon#about to write, iclass 16, count 0 2006.232.07:52:18.51#ibcon#wrote, iclass 16, count 0 2006.232.07:52:18.51#ibcon#about to read 3, iclass 16, count 0 2006.232.07:52:18.54#ibcon#read 3, iclass 16, count 0 2006.232.07:52:18.54#ibcon#about to read 4, iclass 16, count 0 2006.232.07:52:18.54#ibcon#read 4, iclass 16, count 0 2006.232.07:52:18.54#ibcon#about to read 5, iclass 16, count 0 2006.232.07:52:18.54#ibcon#read 5, iclass 16, count 0 2006.232.07:52:18.54#ibcon#about to read 6, iclass 16, count 0 2006.232.07:52:18.54#ibcon#read 6, iclass 16, count 0 2006.232.07:52:18.54#ibcon#end of sib2, iclass 16, count 0 2006.232.07:52:18.54#ibcon#*after write, iclass 16, count 0 2006.232.07:52:18.54#ibcon#*before return 0, iclass 16, count 0 2006.232.07:52:18.54#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.232.07:52:18.54#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.232.07:52:18.54#ibcon#about to clear, iclass 16 cls_cnt 0 2006.232.07:52:18.54#ibcon#cleared, iclass 16 cls_cnt 0 2006.232.07:52:18.54$vc4f8/valo=3,672.99 2006.232.07:52:18.54#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.232.07:52:18.54#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.232.07:52:18.54#ibcon#ireg 17 cls_cnt 0 2006.232.07:52:18.54#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.232.07:52:18.54#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.232.07:52:18.54#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.232.07:52:18.54#ibcon#enter wrdev, iclass 18, count 0 2006.232.07:52:18.54#ibcon#first serial, iclass 18, count 0 2006.232.07:52:18.54#ibcon#enter sib2, iclass 18, count 0 2006.232.07:52:18.54#ibcon#flushed, iclass 18, count 0 2006.232.07:52:18.54#ibcon#about to write, iclass 18, count 0 2006.232.07:52:18.54#ibcon#wrote, iclass 18, count 0 2006.232.07:52:18.54#ibcon#about to read 3, iclass 18, count 0 2006.232.07:52:18.56#ibcon#read 3, iclass 18, count 0 2006.232.07:52:18.56#ibcon#about to read 4, iclass 18, count 0 2006.232.07:52:18.56#ibcon#read 4, iclass 18, count 0 2006.232.07:52:18.56#ibcon#about to read 5, iclass 18, count 0 2006.232.07:52:18.56#ibcon#read 5, iclass 18, count 0 2006.232.07:52:18.56#ibcon#about to read 6, iclass 18, count 0 2006.232.07:52:18.56#ibcon#read 6, iclass 18, count 0 2006.232.07:52:18.56#ibcon#end of sib2, iclass 18, count 0 2006.232.07:52:18.56#ibcon#*mode == 0, iclass 18, count 0 2006.232.07:52:18.56#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.232.07:52:18.56#ibcon#[26=FRQ=03,672.99\r\n] 2006.232.07:52:18.56#ibcon#*before write, iclass 18, count 0 2006.232.07:52:18.56#ibcon#enter sib2, iclass 18, count 0 2006.232.07:52:18.56#ibcon#flushed, iclass 18, count 0 2006.232.07:52:18.56#ibcon#about to write, iclass 18, count 0 2006.232.07:52:18.56#ibcon#wrote, iclass 18, count 0 2006.232.07:52:18.56#ibcon#about to read 3, iclass 18, count 0 2006.232.07:52:18.60#ibcon#read 3, iclass 18, count 0 2006.232.07:52:18.60#ibcon#about to read 4, iclass 18, count 0 2006.232.07:52:18.60#ibcon#read 4, iclass 18, count 0 2006.232.07:52:18.60#ibcon#about to read 5, iclass 18, count 0 2006.232.07:52:18.60#ibcon#read 5, iclass 18, count 0 2006.232.07:52:18.60#ibcon#about to read 6, iclass 18, count 0 2006.232.07:52:18.60#ibcon#read 6, iclass 18, count 0 2006.232.07:52:18.60#ibcon#end of sib2, iclass 18, count 0 2006.232.07:52:18.60#ibcon#*after write, iclass 18, count 0 2006.232.07:52:18.60#ibcon#*before return 0, iclass 18, count 0 2006.232.07:52:18.60#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.232.07:52:18.60#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.232.07:52:18.60#ibcon#about to clear, iclass 18 cls_cnt 0 2006.232.07:52:18.60#ibcon#cleared, iclass 18 cls_cnt 0 2006.232.07:52:18.60$vc4f8/va=3,8 2006.232.07:52:18.60#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.232.07:52:18.60#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.232.07:52:18.60#ibcon#ireg 11 cls_cnt 2 2006.232.07:52:18.60#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.232.07:52:18.66#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.232.07:52:18.66#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.232.07:52:18.66#ibcon#enter wrdev, iclass 20, count 2 2006.232.07:52:18.66#ibcon#first serial, iclass 20, count 2 2006.232.07:52:18.66#ibcon#enter sib2, iclass 20, count 2 2006.232.07:52:18.66#ibcon#flushed, iclass 20, count 2 2006.232.07:52:18.66#ibcon#about to write, iclass 20, count 2 2006.232.07:52:18.66#ibcon#wrote, iclass 20, count 2 2006.232.07:52:18.66#ibcon#about to read 3, iclass 20, count 2 2006.232.07:52:18.68#ibcon#read 3, iclass 20, count 2 2006.232.07:52:18.68#ibcon#about to read 4, iclass 20, count 2 2006.232.07:52:18.68#ibcon#read 4, iclass 20, count 2 2006.232.07:52:18.68#ibcon#about to read 5, iclass 20, count 2 2006.232.07:52:18.68#ibcon#read 5, iclass 20, count 2 2006.232.07:52:18.68#ibcon#about to read 6, iclass 20, count 2 2006.232.07:52:18.68#ibcon#read 6, iclass 20, count 2 2006.232.07:52:18.68#ibcon#end of sib2, iclass 20, count 2 2006.232.07:52:18.68#ibcon#*mode == 0, iclass 20, count 2 2006.232.07:52:18.68#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.232.07:52:18.68#ibcon#[25=AT03-08\r\n] 2006.232.07:52:18.68#ibcon#*before write, iclass 20, count 2 2006.232.07:52:18.68#ibcon#enter sib2, iclass 20, count 2 2006.232.07:52:18.68#ibcon#flushed, iclass 20, count 2 2006.232.07:52:18.68#ibcon#about to write, iclass 20, count 2 2006.232.07:52:18.68#ibcon#wrote, iclass 20, count 2 2006.232.07:52:18.68#ibcon#about to read 3, iclass 20, count 2 2006.232.07:52:18.71#ibcon#read 3, iclass 20, count 2 2006.232.07:52:18.71#ibcon#about to read 4, iclass 20, count 2 2006.232.07:52:18.71#ibcon#read 4, iclass 20, count 2 2006.232.07:52:18.71#ibcon#about to read 5, iclass 20, count 2 2006.232.07:52:18.71#ibcon#read 5, iclass 20, count 2 2006.232.07:52:18.71#ibcon#about to read 6, iclass 20, count 2 2006.232.07:52:18.71#ibcon#read 6, iclass 20, count 2 2006.232.07:52:18.71#ibcon#end of sib2, iclass 20, count 2 2006.232.07:52:18.71#ibcon#*after write, iclass 20, count 2 2006.232.07:52:18.71#ibcon#*before return 0, iclass 20, count 2 2006.232.07:52:18.71#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.232.07:52:18.71#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.232.07:52:18.71#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.232.07:52:18.71#ibcon#ireg 7 cls_cnt 0 2006.232.07:52:18.71#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.232.07:52:18.83#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.232.07:52:18.83#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.232.07:52:18.83#ibcon#enter wrdev, iclass 20, count 0 2006.232.07:52:18.83#ibcon#first serial, iclass 20, count 0 2006.232.07:52:18.83#ibcon#enter sib2, iclass 20, count 0 2006.232.07:52:18.83#ibcon#flushed, iclass 20, count 0 2006.232.07:52:18.83#ibcon#about to write, iclass 20, count 0 2006.232.07:52:18.83#ibcon#wrote, iclass 20, count 0 2006.232.07:52:18.83#ibcon#about to read 3, iclass 20, count 0 2006.232.07:52:18.85#ibcon#read 3, iclass 20, count 0 2006.232.07:52:18.85#ibcon#about to read 4, iclass 20, count 0 2006.232.07:52:18.85#ibcon#read 4, iclass 20, count 0 2006.232.07:52:18.85#ibcon#about to read 5, iclass 20, count 0 2006.232.07:52:18.85#ibcon#read 5, iclass 20, count 0 2006.232.07:52:18.85#ibcon#about to read 6, iclass 20, count 0 2006.232.07:52:18.85#ibcon#read 6, iclass 20, count 0 2006.232.07:52:18.85#ibcon#end of sib2, iclass 20, count 0 2006.232.07:52:18.85#ibcon#*mode == 0, iclass 20, count 0 2006.232.07:52:18.85#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.232.07:52:18.85#ibcon#[25=USB\r\n] 2006.232.07:52:18.85#ibcon#*before write, iclass 20, count 0 2006.232.07:52:18.85#ibcon#enter sib2, iclass 20, count 0 2006.232.07:52:18.85#ibcon#flushed, iclass 20, count 0 2006.232.07:52:18.85#ibcon#about to write, iclass 20, count 0 2006.232.07:52:18.85#ibcon#wrote, iclass 20, count 0 2006.232.07:52:18.85#ibcon#about to read 3, iclass 20, count 0 2006.232.07:52:18.88#ibcon#read 3, iclass 20, count 0 2006.232.07:52:18.88#ibcon#about to read 4, iclass 20, count 0 2006.232.07:52:18.88#ibcon#read 4, iclass 20, count 0 2006.232.07:52:18.88#ibcon#about to read 5, iclass 20, count 0 2006.232.07:52:18.88#ibcon#read 5, iclass 20, count 0 2006.232.07:52:18.88#ibcon#about to read 6, iclass 20, count 0 2006.232.07:52:18.88#ibcon#read 6, iclass 20, count 0 2006.232.07:52:18.88#ibcon#end of sib2, iclass 20, count 0 2006.232.07:52:18.88#ibcon#*after write, iclass 20, count 0 2006.232.07:52:18.88#ibcon#*before return 0, iclass 20, count 0 2006.232.07:52:18.88#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.232.07:52:18.88#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.232.07:52:18.88#ibcon#about to clear, iclass 20 cls_cnt 0 2006.232.07:52:18.88#ibcon#cleared, iclass 20 cls_cnt 0 2006.232.07:52:18.88$vc4f8/valo=4,832.99 2006.232.07:52:18.88#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.232.07:52:18.88#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.232.07:52:18.88#ibcon#ireg 17 cls_cnt 0 2006.232.07:52:18.88#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.232.07:52:18.88#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.232.07:52:18.88#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.232.07:52:18.88#ibcon#enter wrdev, iclass 22, count 0 2006.232.07:52:18.88#ibcon#first serial, iclass 22, count 0 2006.232.07:52:18.88#ibcon#enter sib2, iclass 22, count 0 2006.232.07:52:18.88#ibcon#flushed, iclass 22, count 0 2006.232.07:52:18.88#ibcon#about to write, iclass 22, count 0 2006.232.07:52:18.88#ibcon#wrote, iclass 22, count 0 2006.232.07:52:18.88#ibcon#about to read 3, iclass 22, count 0 2006.232.07:52:18.90#ibcon#read 3, iclass 22, count 0 2006.232.07:52:18.90#ibcon#about to read 4, iclass 22, count 0 2006.232.07:52:18.90#ibcon#read 4, iclass 22, count 0 2006.232.07:52:18.90#ibcon#about to read 5, iclass 22, count 0 2006.232.07:52:18.90#ibcon#read 5, iclass 22, count 0 2006.232.07:52:18.90#ibcon#about to read 6, iclass 22, count 0 2006.232.07:52:18.90#ibcon#read 6, iclass 22, count 0 2006.232.07:52:18.90#ibcon#end of sib2, iclass 22, count 0 2006.232.07:52:18.90#ibcon#*mode == 0, iclass 22, count 0 2006.232.07:52:18.90#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.232.07:52:18.90#ibcon#[26=FRQ=04,832.99\r\n] 2006.232.07:52:18.90#ibcon#*before write, iclass 22, count 0 2006.232.07:52:18.90#ibcon#enter sib2, iclass 22, count 0 2006.232.07:52:18.90#ibcon#flushed, iclass 22, count 0 2006.232.07:52:18.90#ibcon#about to write, iclass 22, count 0 2006.232.07:52:18.90#ibcon#wrote, iclass 22, count 0 2006.232.07:52:18.90#ibcon#about to read 3, iclass 22, count 0 2006.232.07:52:18.94#ibcon#read 3, iclass 22, count 0 2006.232.07:52:18.94#ibcon#about to read 4, iclass 22, count 0 2006.232.07:52:18.94#ibcon#read 4, iclass 22, count 0 2006.232.07:52:18.94#ibcon#about to read 5, iclass 22, count 0 2006.232.07:52:18.94#ibcon#read 5, iclass 22, count 0 2006.232.07:52:18.94#ibcon#about to read 6, iclass 22, count 0 2006.232.07:52:18.94#ibcon#read 6, iclass 22, count 0 2006.232.07:52:18.94#ibcon#end of sib2, iclass 22, count 0 2006.232.07:52:18.94#ibcon#*after write, iclass 22, count 0 2006.232.07:52:18.94#ibcon#*before return 0, iclass 22, count 0 2006.232.07:52:18.94#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.232.07:52:18.94#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.232.07:52:18.94#ibcon#about to clear, iclass 22 cls_cnt 0 2006.232.07:52:18.94#ibcon#cleared, iclass 22 cls_cnt 0 2006.232.07:52:18.94$vc4f8/va=4,7 2006.232.07:52:18.94#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.232.07:52:18.94#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.232.07:52:18.94#ibcon#ireg 11 cls_cnt 2 2006.232.07:52:18.94#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.232.07:52:19.00#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.232.07:52:19.00#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.232.07:52:19.00#ibcon#enter wrdev, iclass 24, count 2 2006.232.07:52:19.00#ibcon#first serial, iclass 24, count 2 2006.232.07:52:19.00#ibcon#enter sib2, iclass 24, count 2 2006.232.07:52:19.00#ibcon#flushed, iclass 24, count 2 2006.232.07:52:19.00#ibcon#about to write, iclass 24, count 2 2006.232.07:52:19.00#ibcon#wrote, iclass 24, count 2 2006.232.07:52:19.00#ibcon#about to read 3, iclass 24, count 2 2006.232.07:52:19.02#ibcon#read 3, iclass 24, count 2 2006.232.07:52:19.02#ibcon#about to read 4, iclass 24, count 2 2006.232.07:52:19.02#ibcon#read 4, iclass 24, count 2 2006.232.07:52:19.02#ibcon#about to read 5, iclass 24, count 2 2006.232.07:52:19.02#ibcon#read 5, iclass 24, count 2 2006.232.07:52:19.02#ibcon#about to read 6, iclass 24, count 2 2006.232.07:52:19.02#ibcon#read 6, iclass 24, count 2 2006.232.07:52:19.02#ibcon#end of sib2, iclass 24, count 2 2006.232.07:52:19.02#ibcon#*mode == 0, iclass 24, count 2 2006.232.07:52:19.02#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.232.07:52:19.02#ibcon#[25=AT04-07\r\n] 2006.232.07:52:19.02#ibcon#*before write, iclass 24, count 2 2006.232.07:52:19.02#ibcon#enter sib2, iclass 24, count 2 2006.232.07:52:19.02#ibcon#flushed, iclass 24, count 2 2006.232.07:52:19.02#ibcon#about to write, iclass 24, count 2 2006.232.07:52:19.02#ibcon#wrote, iclass 24, count 2 2006.232.07:52:19.02#ibcon#about to read 3, iclass 24, count 2 2006.232.07:52:19.05#ibcon#read 3, iclass 24, count 2 2006.232.07:52:19.05#ibcon#about to read 4, iclass 24, count 2 2006.232.07:52:19.05#ibcon#read 4, iclass 24, count 2 2006.232.07:52:19.05#ibcon#about to read 5, iclass 24, count 2 2006.232.07:52:19.05#ibcon#read 5, iclass 24, count 2 2006.232.07:52:19.05#ibcon#about to read 6, iclass 24, count 2 2006.232.07:52:19.05#ibcon#read 6, iclass 24, count 2 2006.232.07:52:19.05#ibcon#end of sib2, iclass 24, count 2 2006.232.07:52:19.05#ibcon#*after write, iclass 24, count 2 2006.232.07:52:19.05#ibcon#*before return 0, iclass 24, count 2 2006.232.07:52:19.05#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.232.07:52:19.05#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.232.07:52:19.05#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.232.07:52:19.05#ibcon#ireg 7 cls_cnt 0 2006.232.07:52:19.05#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.232.07:52:19.17#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.232.07:52:19.17#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.232.07:52:19.17#ibcon#enter wrdev, iclass 24, count 0 2006.232.07:52:19.17#ibcon#first serial, iclass 24, count 0 2006.232.07:52:19.17#ibcon#enter sib2, iclass 24, count 0 2006.232.07:52:19.17#ibcon#flushed, iclass 24, count 0 2006.232.07:52:19.17#ibcon#about to write, iclass 24, count 0 2006.232.07:52:19.17#ibcon#wrote, iclass 24, count 0 2006.232.07:52:19.17#ibcon#about to read 3, iclass 24, count 0 2006.232.07:52:19.19#ibcon#read 3, iclass 24, count 0 2006.232.07:52:19.19#ibcon#about to read 4, iclass 24, count 0 2006.232.07:52:19.19#ibcon#read 4, iclass 24, count 0 2006.232.07:52:19.19#ibcon#about to read 5, iclass 24, count 0 2006.232.07:52:19.19#ibcon#read 5, iclass 24, count 0 2006.232.07:52:19.19#ibcon#about to read 6, iclass 24, count 0 2006.232.07:52:19.19#ibcon#read 6, iclass 24, count 0 2006.232.07:52:19.19#ibcon#end of sib2, iclass 24, count 0 2006.232.07:52:19.19#ibcon#*mode == 0, iclass 24, count 0 2006.232.07:52:19.19#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.232.07:52:19.19#ibcon#[25=USB\r\n] 2006.232.07:52:19.19#ibcon#*before write, iclass 24, count 0 2006.232.07:52:19.19#ibcon#enter sib2, iclass 24, count 0 2006.232.07:52:19.19#ibcon#flushed, iclass 24, count 0 2006.232.07:52:19.19#ibcon#about to write, iclass 24, count 0 2006.232.07:52:19.19#ibcon#wrote, iclass 24, count 0 2006.232.07:52:19.19#ibcon#about to read 3, iclass 24, count 0 2006.232.07:52:19.22#ibcon#read 3, iclass 24, count 0 2006.232.07:52:19.22#ibcon#about to read 4, iclass 24, count 0 2006.232.07:52:19.22#ibcon#read 4, iclass 24, count 0 2006.232.07:52:19.22#ibcon#about to read 5, iclass 24, count 0 2006.232.07:52:19.22#ibcon#read 5, iclass 24, count 0 2006.232.07:52:19.22#ibcon#about to read 6, iclass 24, count 0 2006.232.07:52:19.22#ibcon#read 6, iclass 24, count 0 2006.232.07:52:19.22#ibcon#end of sib2, iclass 24, count 0 2006.232.07:52:19.22#ibcon#*after write, iclass 24, count 0 2006.232.07:52:19.22#ibcon#*before return 0, iclass 24, count 0 2006.232.07:52:19.22#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.232.07:52:19.22#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.232.07:52:19.22#ibcon#about to clear, iclass 24 cls_cnt 0 2006.232.07:52:19.22#ibcon#cleared, iclass 24 cls_cnt 0 2006.232.07:52:19.22$vc4f8/valo=5,652.99 2006.232.07:52:19.22#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.232.07:52:19.22#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.232.07:52:19.22#ibcon#ireg 17 cls_cnt 0 2006.232.07:52:19.22#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.232.07:52:19.22#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.232.07:52:19.22#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.232.07:52:19.22#ibcon#enter wrdev, iclass 26, count 0 2006.232.07:52:19.22#ibcon#first serial, iclass 26, count 0 2006.232.07:52:19.22#ibcon#enter sib2, iclass 26, count 0 2006.232.07:52:19.22#ibcon#flushed, iclass 26, count 0 2006.232.07:52:19.22#ibcon#about to write, iclass 26, count 0 2006.232.07:52:19.22#ibcon#wrote, iclass 26, count 0 2006.232.07:52:19.22#ibcon#about to read 3, iclass 26, count 0 2006.232.07:52:19.24#ibcon#read 3, iclass 26, count 0 2006.232.07:52:19.24#ibcon#about to read 4, iclass 26, count 0 2006.232.07:52:19.24#ibcon#read 4, iclass 26, count 0 2006.232.07:52:19.24#ibcon#about to read 5, iclass 26, count 0 2006.232.07:52:19.24#ibcon#read 5, iclass 26, count 0 2006.232.07:52:19.24#ibcon#about to read 6, iclass 26, count 0 2006.232.07:52:19.24#ibcon#read 6, iclass 26, count 0 2006.232.07:52:19.24#ibcon#end of sib2, iclass 26, count 0 2006.232.07:52:19.24#ibcon#*mode == 0, iclass 26, count 0 2006.232.07:52:19.24#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.232.07:52:19.24#ibcon#[26=FRQ=05,652.99\r\n] 2006.232.07:52:19.24#ibcon#*before write, iclass 26, count 0 2006.232.07:52:19.24#ibcon#enter sib2, iclass 26, count 0 2006.232.07:52:19.24#ibcon#flushed, iclass 26, count 0 2006.232.07:52:19.24#ibcon#about to write, iclass 26, count 0 2006.232.07:52:19.24#ibcon#wrote, iclass 26, count 0 2006.232.07:52:19.24#ibcon#about to read 3, iclass 26, count 0 2006.232.07:52:19.28#ibcon#read 3, iclass 26, count 0 2006.232.07:52:19.28#ibcon#about to read 4, iclass 26, count 0 2006.232.07:52:19.28#ibcon#read 4, iclass 26, count 0 2006.232.07:52:19.28#ibcon#about to read 5, iclass 26, count 0 2006.232.07:52:19.28#ibcon#read 5, iclass 26, count 0 2006.232.07:52:19.28#ibcon#about to read 6, iclass 26, count 0 2006.232.07:52:19.28#ibcon#read 6, iclass 26, count 0 2006.232.07:52:19.28#ibcon#end of sib2, iclass 26, count 0 2006.232.07:52:19.28#ibcon#*after write, iclass 26, count 0 2006.232.07:52:19.28#ibcon#*before return 0, iclass 26, count 0 2006.232.07:52:19.28#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.232.07:52:19.28#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.232.07:52:19.28#ibcon#about to clear, iclass 26 cls_cnt 0 2006.232.07:52:19.28#ibcon#cleared, iclass 26 cls_cnt 0 2006.232.07:52:19.28$vc4f8/va=5,7 2006.232.07:52:19.28#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.232.07:52:19.28#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.232.07:52:19.28#ibcon#ireg 11 cls_cnt 2 2006.232.07:52:19.28#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.232.07:52:19.34#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.232.07:52:19.34#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.232.07:52:19.34#ibcon#enter wrdev, iclass 28, count 2 2006.232.07:52:19.34#ibcon#first serial, iclass 28, count 2 2006.232.07:52:19.34#ibcon#enter sib2, iclass 28, count 2 2006.232.07:52:19.34#ibcon#flushed, iclass 28, count 2 2006.232.07:52:19.34#ibcon#about to write, iclass 28, count 2 2006.232.07:52:19.34#ibcon#wrote, iclass 28, count 2 2006.232.07:52:19.34#ibcon#about to read 3, iclass 28, count 2 2006.232.07:52:19.36#ibcon#read 3, iclass 28, count 2 2006.232.07:52:19.36#ibcon#about to read 4, iclass 28, count 2 2006.232.07:52:19.36#ibcon#read 4, iclass 28, count 2 2006.232.07:52:19.36#ibcon#about to read 5, iclass 28, count 2 2006.232.07:52:19.36#ibcon#read 5, iclass 28, count 2 2006.232.07:52:19.36#ibcon#about to read 6, iclass 28, count 2 2006.232.07:52:19.36#ibcon#read 6, iclass 28, count 2 2006.232.07:52:19.36#ibcon#end of sib2, iclass 28, count 2 2006.232.07:52:19.36#ibcon#*mode == 0, iclass 28, count 2 2006.232.07:52:19.36#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.232.07:52:19.36#ibcon#[25=AT05-07\r\n] 2006.232.07:52:19.36#ibcon#*before write, iclass 28, count 2 2006.232.07:52:19.36#ibcon#enter sib2, iclass 28, count 2 2006.232.07:52:19.36#ibcon#flushed, iclass 28, count 2 2006.232.07:52:19.36#ibcon#about to write, iclass 28, count 2 2006.232.07:52:19.36#ibcon#wrote, iclass 28, count 2 2006.232.07:52:19.36#ibcon#about to read 3, iclass 28, count 2 2006.232.07:52:19.39#ibcon#read 3, iclass 28, count 2 2006.232.07:52:19.39#ibcon#about to read 4, iclass 28, count 2 2006.232.07:52:19.39#ibcon#read 4, iclass 28, count 2 2006.232.07:52:19.39#ibcon#about to read 5, iclass 28, count 2 2006.232.07:52:19.39#ibcon#read 5, iclass 28, count 2 2006.232.07:52:19.39#ibcon#about to read 6, iclass 28, count 2 2006.232.07:52:19.39#ibcon#read 6, iclass 28, count 2 2006.232.07:52:19.39#ibcon#end of sib2, iclass 28, count 2 2006.232.07:52:19.39#ibcon#*after write, iclass 28, count 2 2006.232.07:52:19.39#ibcon#*before return 0, iclass 28, count 2 2006.232.07:52:19.39#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.232.07:52:19.39#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.232.07:52:19.39#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.232.07:52:19.39#ibcon#ireg 7 cls_cnt 0 2006.232.07:52:19.39#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.232.07:52:19.51#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.232.07:52:19.51#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.232.07:52:19.51#ibcon#enter wrdev, iclass 28, count 0 2006.232.07:52:19.51#ibcon#first serial, iclass 28, count 0 2006.232.07:52:19.51#ibcon#enter sib2, iclass 28, count 0 2006.232.07:52:19.51#ibcon#flushed, iclass 28, count 0 2006.232.07:52:19.51#ibcon#about to write, iclass 28, count 0 2006.232.07:52:19.51#ibcon#wrote, iclass 28, count 0 2006.232.07:52:19.51#ibcon#about to read 3, iclass 28, count 0 2006.232.07:52:19.53#ibcon#read 3, iclass 28, count 0 2006.232.07:52:19.53#ibcon#about to read 4, iclass 28, count 0 2006.232.07:52:19.53#ibcon#read 4, iclass 28, count 0 2006.232.07:52:19.53#ibcon#about to read 5, iclass 28, count 0 2006.232.07:52:19.53#ibcon#read 5, iclass 28, count 0 2006.232.07:52:19.53#ibcon#about to read 6, iclass 28, count 0 2006.232.07:52:19.53#ibcon#read 6, iclass 28, count 0 2006.232.07:52:19.53#ibcon#end of sib2, iclass 28, count 0 2006.232.07:52:19.53#ibcon#*mode == 0, iclass 28, count 0 2006.232.07:52:19.53#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.232.07:52:19.53#ibcon#[25=USB\r\n] 2006.232.07:52:19.53#ibcon#*before write, iclass 28, count 0 2006.232.07:52:19.53#ibcon#enter sib2, iclass 28, count 0 2006.232.07:52:19.53#ibcon#flushed, iclass 28, count 0 2006.232.07:52:19.53#ibcon#about to write, iclass 28, count 0 2006.232.07:52:19.53#ibcon#wrote, iclass 28, count 0 2006.232.07:52:19.53#ibcon#about to read 3, iclass 28, count 0 2006.232.07:52:19.58#ibcon#read 3, iclass 28, count 0 2006.232.07:52:19.58#ibcon#about to read 4, iclass 28, count 0 2006.232.07:52:19.58#ibcon#read 4, iclass 28, count 0 2006.232.07:52:19.58#ibcon#about to read 5, iclass 28, count 0 2006.232.07:52:19.58#ibcon#read 5, iclass 28, count 0 2006.232.07:52:19.58#ibcon#about to read 6, iclass 28, count 0 2006.232.07:52:19.58#ibcon#read 6, iclass 28, count 0 2006.232.07:52:19.58#ibcon#end of sib2, iclass 28, count 0 2006.232.07:52:19.58#ibcon#*after write, iclass 28, count 0 2006.232.07:52:19.58#ibcon#*before return 0, iclass 28, count 0 2006.232.07:52:19.58#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.232.07:52:19.58#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.232.07:52:19.58#ibcon#about to clear, iclass 28 cls_cnt 0 2006.232.07:52:19.58#ibcon#cleared, iclass 28 cls_cnt 0 2006.232.07:52:19.58$vc4f8/valo=6,772.99 2006.232.07:52:19.58#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.232.07:52:19.58#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.232.07:52:19.58#ibcon#ireg 17 cls_cnt 0 2006.232.07:52:19.58#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.232.07:52:19.58#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.232.07:52:19.58#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.232.07:52:19.58#ibcon#enter wrdev, iclass 30, count 0 2006.232.07:52:19.58#ibcon#first serial, iclass 30, count 0 2006.232.07:52:19.58#ibcon#enter sib2, iclass 30, count 0 2006.232.07:52:19.58#ibcon#flushed, iclass 30, count 0 2006.232.07:52:19.58#ibcon#about to write, iclass 30, count 0 2006.232.07:52:19.58#ibcon#wrote, iclass 30, count 0 2006.232.07:52:19.58#ibcon#about to read 3, iclass 30, count 0 2006.232.07:52:19.59#ibcon#read 3, iclass 30, count 0 2006.232.07:52:19.59#ibcon#about to read 4, iclass 30, count 0 2006.232.07:52:19.59#ibcon#read 4, iclass 30, count 0 2006.232.07:52:19.59#ibcon#about to read 5, iclass 30, count 0 2006.232.07:52:19.59#ibcon#read 5, iclass 30, count 0 2006.232.07:52:19.59#ibcon#about to read 6, iclass 30, count 0 2006.232.07:52:19.59#ibcon#read 6, iclass 30, count 0 2006.232.07:52:19.59#ibcon#end of sib2, iclass 30, count 0 2006.232.07:52:19.59#ibcon#*mode == 0, iclass 30, count 0 2006.232.07:52:19.59#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.232.07:52:19.59#ibcon#[26=FRQ=06,772.99\r\n] 2006.232.07:52:19.59#ibcon#*before write, iclass 30, count 0 2006.232.07:52:19.59#ibcon#enter sib2, iclass 30, count 0 2006.232.07:52:19.59#ibcon#flushed, iclass 30, count 0 2006.232.07:52:19.59#ibcon#about to write, iclass 30, count 0 2006.232.07:52:19.59#ibcon#wrote, iclass 30, count 0 2006.232.07:52:19.59#ibcon#about to read 3, iclass 30, count 0 2006.232.07:52:19.63#ibcon#read 3, iclass 30, count 0 2006.232.07:52:19.63#ibcon#about to read 4, iclass 30, count 0 2006.232.07:52:19.63#ibcon#read 4, iclass 30, count 0 2006.232.07:52:19.63#ibcon#about to read 5, iclass 30, count 0 2006.232.07:52:19.63#ibcon#read 5, iclass 30, count 0 2006.232.07:52:19.63#ibcon#about to read 6, iclass 30, count 0 2006.232.07:52:19.63#ibcon#read 6, iclass 30, count 0 2006.232.07:52:19.63#ibcon#end of sib2, iclass 30, count 0 2006.232.07:52:19.63#ibcon#*after write, iclass 30, count 0 2006.232.07:52:19.63#ibcon#*before return 0, iclass 30, count 0 2006.232.07:52:19.63#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.232.07:52:19.63#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.232.07:52:19.63#ibcon#about to clear, iclass 30 cls_cnt 0 2006.232.07:52:19.63#ibcon#cleared, iclass 30 cls_cnt 0 2006.232.07:52:19.63$vc4f8/va=6,6 2006.232.07:52:19.63#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.232.07:52:19.63#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.232.07:52:19.63#ibcon#ireg 11 cls_cnt 2 2006.232.07:52:19.63#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.232.07:52:19.70#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.232.07:52:19.70#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.232.07:52:19.70#ibcon#enter wrdev, iclass 32, count 2 2006.232.07:52:19.70#ibcon#first serial, iclass 32, count 2 2006.232.07:52:19.70#ibcon#enter sib2, iclass 32, count 2 2006.232.07:52:19.70#ibcon#flushed, iclass 32, count 2 2006.232.07:52:19.70#ibcon#about to write, iclass 32, count 2 2006.232.07:52:19.70#ibcon#wrote, iclass 32, count 2 2006.232.07:52:19.70#ibcon#about to read 3, iclass 32, count 2 2006.232.07:52:19.72#ibcon#read 3, iclass 32, count 2 2006.232.07:52:19.72#ibcon#about to read 4, iclass 32, count 2 2006.232.07:52:19.72#ibcon#read 4, iclass 32, count 2 2006.232.07:52:19.72#ibcon#about to read 5, iclass 32, count 2 2006.232.07:52:19.72#ibcon#read 5, iclass 32, count 2 2006.232.07:52:19.72#ibcon#about to read 6, iclass 32, count 2 2006.232.07:52:19.72#ibcon#read 6, iclass 32, count 2 2006.232.07:52:19.72#ibcon#end of sib2, iclass 32, count 2 2006.232.07:52:19.72#ibcon#*mode == 0, iclass 32, count 2 2006.232.07:52:19.72#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.232.07:52:19.72#ibcon#[25=AT06-06\r\n] 2006.232.07:52:19.72#ibcon#*before write, iclass 32, count 2 2006.232.07:52:19.72#ibcon#enter sib2, iclass 32, count 2 2006.232.07:52:19.72#ibcon#flushed, iclass 32, count 2 2006.232.07:52:19.72#ibcon#about to write, iclass 32, count 2 2006.232.07:52:19.72#ibcon#wrote, iclass 32, count 2 2006.232.07:52:19.72#ibcon#about to read 3, iclass 32, count 2 2006.232.07:52:19.75#ibcon#read 3, iclass 32, count 2 2006.232.07:52:19.75#ibcon#about to read 4, iclass 32, count 2 2006.232.07:52:19.75#ibcon#read 4, iclass 32, count 2 2006.232.07:52:19.75#ibcon#about to read 5, iclass 32, count 2 2006.232.07:52:19.75#ibcon#read 5, iclass 32, count 2 2006.232.07:52:19.75#ibcon#about to read 6, iclass 32, count 2 2006.232.07:52:19.75#ibcon#read 6, iclass 32, count 2 2006.232.07:52:19.75#ibcon#end of sib2, iclass 32, count 2 2006.232.07:52:19.75#ibcon#*after write, iclass 32, count 2 2006.232.07:52:19.75#ibcon#*before return 0, iclass 32, count 2 2006.232.07:52:19.75#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.232.07:52:19.75#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.232.07:52:19.75#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.232.07:52:19.75#ibcon#ireg 7 cls_cnt 0 2006.232.07:52:19.75#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.232.07:52:19.87#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.232.07:52:19.87#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.232.07:52:19.87#ibcon#enter wrdev, iclass 32, count 0 2006.232.07:52:19.87#ibcon#first serial, iclass 32, count 0 2006.232.07:52:19.87#ibcon#enter sib2, iclass 32, count 0 2006.232.07:52:19.87#ibcon#flushed, iclass 32, count 0 2006.232.07:52:19.87#ibcon#about to write, iclass 32, count 0 2006.232.07:52:19.87#ibcon#wrote, iclass 32, count 0 2006.232.07:52:19.87#ibcon#about to read 3, iclass 32, count 0 2006.232.07:52:19.89#ibcon#read 3, iclass 32, count 0 2006.232.07:52:19.89#ibcon#about to read 4, iclass 32, count 0 2006.232.07:52:19.89#ibcon#read 4, iclass 32, count 0 2006.232.07:52:19.89#ibcon#about to read 5, iclass 32, count 0 2006.232.07:52:19.89#ibcon#read 5, iclass 32, count 0 2006.232.07:52:19.89#ibcon#about to read 6, iclass 32, count 0 2006.232.07:52:19.89#ibcon#read 6, iclass 32, count 0 2006.232.07:52:19.89#ibcon#end of sib2, iclass 32, count 0 2006.232.07:52:19.89#ibcon#*mode == 0, iclass 32, count 0 2006.232.07:52:19.89#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.232.07:52:19.89#ibcon#[25=USB\r\n] 2006.232.07:52:19.89#ibcon#*before write, iclass 32, count 0 2006.232.07:52:19.89#ibcon#enter sib2, iclass 32, count 0 2006.232.07:52:19.89#ibcon#flushed, iclass 32, count 0 2006.232.07:52:19.89#ibcon#about to write, iclass 32, count 0 2006.232.07:52:19.89#ibcon#wrote, iclass 32, count 0 2006.232.07:52:19.89#ibcon#about to read 3, iclass 32, count 0 2006.232.07:52:19.92#ibcon#read 3, iclass 32, count 0 2006.232.07:52:19.92#ibcon#about to read 4, iclass 32, count 0 2006.232.07:52:19.92#ibcon#read 4, iclass 32, count 0 2006.232.07:52:19.92#ibcon#about to read 5, iclass 32, count 0 2006.232.07:52:19.92#ibcon#read 5, iclass 32, count 0 2006.232.07:52:19.92#ibcon#about to read 6, iclass 32, count 0 2006.232.07:52:19.92#ibcon#read 6, iclass 32, count 0 2006.232.07:52:19.92#ibcon#end of sib2, iclass 32, count 0 2006.232.07:52:19.92#ibcon#*after write, iclass 32, count 0 2006.232.07:52:19.92#ibcon#*before return 0, iclass 32, count 0 2006.232.07:52:19.92#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.232.07:52:19.92#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.232.07:52:19.92#ibcon#about to clear, iclass 32 cls_cnt 0 2006.232.07:52:19.92#ibcon#cleared, iclass 32 cls_cnt 0 2006.232.07:52:19.92$vc4f8/valo=7,832.99 2006.232.07:52:19.92#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.232.07:52:19.92#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.232.07:52:19.92#ibcon#ireg 17 cls_cnt 0 2006.232.07:52:19.92#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.232.07:52:19.92#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.232.07:52:19.92#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.232.07:52:19.92#ibcon#enter wrdev, iclass 34, count 0 2006.232.07:52:19.92#ibcon#first serial, iclass 34, count 0 2006.232.07:52:19.92#ibcon#enter sib2, iclass 34, count 0 2006.232.07:52:19.92#ibcon#flushed, iclass 34, count 0 2006.232.07:52:19.92#ibcon#about to write, iclass 34, count 0 2006.232.07:52:19.92#ibcon#wrote, iclass 34, count 0 2006.232.07:52:19.92#ibcon#about to read 3, iclass 34, count 0 2006.232.07:52:19.94#ibcon#read 3, iclass 34, count 0 2006.232.07:52:19.94#ibcon#about to read 4, iclass 34, count 0 2006.232.07:52:19.94#ibcon#read 4, iclass 34, count 0 2006.232.07:52:19.94#ibcon#about to read 5, iclass 34, count 0 2006.232.07:52:19.94#ibcon#read 5, iclass 34, count 0 2006.232.07:52:19.94#ibcon#about to read 6, iclass 34, count 0 2006.232.07:52:19.94#ibcon#read 6, iclass 34, count 0 2006.232.07:52:19.94#ibcon#end of sib2, iclass 34, count 0 2006.232.07:52:19.94#ibcon#*mode == 0, iclass 34, count 0 2006.232.07:52:19.94#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.232.07:52:19.94#ibcon#[26=FRQ=07,832.99\r\n] 2006.232.07:52:19.94#ibcon#*before write, iclass 34, count 0 2006.232.07:52:19.94#ibcon#enter sib2, iclass 34, count 0 2006.232.07:52:19.94#ibcon#flushed, iclass 34, count 0 2006.232.07:52:19.94#ibcon#about to write, iclass 34, count 0 2006.232.07:52:19.94#ibcon#wrote, iclass 34, count 0 2006.232.07:52:19.94#ibcon#about to read 3, iclass 34, count 0 2006.232.07:52:19.98#ibcon#read 3, iclass 34, count 0 2006.232.07:52:19.98#ibcon#about to read 4, iclass 34, count 0 2006.232.07:52:19.98#ibcon#read 4, iclass 34, count 0 2006.232.07:52:19.98#ibcon#about to read 5, iclass 34, count 0 2006.232.07:52:19.98#ibcon#read 5, iclass 34, count 0 2006.232.07:52:19.98#ibcon#about to read 6, iclass 34, count 0 2006.232.07:52:19.98#ibcon#read 6, iclass 34, count 0 2006.232.07:52:19.98#ibcon#end of sib2, iclass 34, count 0 2006.232.07:52:19.98#ibcon#*after write, iclass 34, count 0 2006.232.07:52:19.98#ibcon#*before return 0, iclass 34, count 0 2006.232.07:52:19.98#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.232.07:52:19.98#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.232.07:52:19.98#ibcon#about to clear, iclass 34 cls_cnt 0 2006.232.07:52:19.98#ibcon#cleared, iclass 34 cls_cnt 0 2006.232.07:52:19.98$vc4f8/va=7,6 2006.232.07:52:19.98#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.232.07:52:19.98#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.232.07:52:19.98#ibcon#ireg 11 cls_cnt 2 2006.232.07:52:19.98#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.232.07:52:20.04#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.232.07:52:20.04#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.232.07:52:20.04#ibcon#enter wrdev, iclass 36, count 2 2006.232.07:52:20.04#ibcon#first serial, iclass 36, count 2 2006.232.07:52:20.04#ibcon#enter sib2, iclass 36, count 2 2006.232.07:52:20.04#ibcon#flushed, iclass 36, count 2 2006.232.07:52:20.04#ibcon#about to write, iclass 36, count 2 2006.232.07:52:20.04#ibcon#wrote, iclass 36, count 2 2006.232.07:52:20.04#ibcon#about to read 3, iclass 36, count 2 2006.232.07:52:20.06#ibcon#read 3, iclass 36, count 2 2006.232.07:52:20.06#ibcon#about to read 4, iclass 36, count 2 2006.232.07:52:20.06#ibcon#read 4, iclass 36, count 2 2006.232.07:52:20.06#ibcon#about to read 5, iclass 36, count 2 2006.232.07:52:20.06#ibcon#read 5, iclass 36, count 2 2006.232.07:52:20.06#ibcon#about to read 6, iclass 36, count 2 2006.232.07:52:20.06#ibcon#read 6, iclass 36, count 2 2006.232.07:52:20.06#ibcon#end of sib2, iclass 36, count 2 2006.232.07:52:20.06#ibcon#*mode == 0, iclass 36, count 2 2006.232.07:52:20.06#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.232.07:52:20.06#ibcon#[25=AT07-06\r\n] 2006.232.07:52:20.06#ibcon#*before write, iclass 36, count 2 2006.232.07:52:20.06#ibcon#enter sib2, iclass 36, count 2 2006.232.07:52:20.06#ibcon#flushed, iclass 36, count 2 2006.232.07:52:20.06#ibcon#about to write, iclass 36, count 2 2006.232.07:52:20.06#ibcon#wrote, iclass 36, count 2 2006.232.07:52:20.06#ibcon#about to read 3, iclass 36, count 2 2006.232.07:52:20.09#ibcon#read 3, iclass 36, count 2 2006.232.07:52:20.09#ibcon#about to read 4, iclass 36, count 2 2006.232.07:52:20.09#ibcon#read 4, iclass 36, count 2 2006.232.07:52:20.09#ibcon#about to read 5, iclass 36, count 2 2006.232.07:52:20.09#ibcon#read 5, iclass 36, count 2 2006.232.07:52:20.09#ibcon#about to read 6, iclass 36, count 2 2006.232.07:52:20.09#ibcon#read 6, iclass 36, count 2 2006.232.07:52:20.09#ibcon#end of sib2, iclass 36, count 2 2006.232.07:52:20.09#ibcon#*after write, iclass 36, count 2 2006.232.07:52:20.09#ibcon#*before return 0, iclass 36, count 2 2006.232.07:52:20.09#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.232.07:52:20.09#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.232.07:52:20.09#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.232.07:52:20.09#ibcon#ireg 7 cls_cnt 0 2006.232.07:52:20.09#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.232.07:52:20.21#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.232.07:52:20.21#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.232.07:52:20.21#ibcon#enter wrdev, iclass 36, count 0 2006.232.07:52:20.21#ibcon#first serial, iclass 36, count 0 2006.232.07:52:20.21#ibcon#enter sib2, iclass 36, count 0 2006.232.07:52:20.21#ibcon#flushed, iclass 36, count 0 2006.232.07:52:20.21#ibcon#about to write, iclass 36, count 0 2006.232.07:52:20.21#ibcon#wrote, iclass 36, count 0 2006.232.07:52:20.21#ibcon#about to read 3, iclass 36, count 0 2006.232.07:52:20.23#ibcon#read 3, iclass 36, count 0 2006.232.07:52:20.23#ibcon#about to read 4, iclass 36, count 0 2006.232.07:52:20.23#ibcon#read 4, iclass 36, count 0 2006.232.07:52:20.23#ibcon#about to read 5, iclass 36, count 0 2006.232.07:52:20.23#ibcon#read 5, iclass 36, count 0 2006.232.07:52:20.23#ibcon#about to read 6, iclass 36, count 0 2006.232.07:52:20.23#ibcon#read 6, iclass 36, count 0 2006.232.07:52:20.23#ibcon#end of sib2, iclass 36, count 0 2006.232.07:52:20.23#ibcon#*mode == 0, iclass 36, count 0 2006.232.07:52:20.23#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.232.07:52:20.23#ibcon#[25=USB\r\n] 2006.232.07:52:20.23#ibcon#*before write, iclass 36, count 0 2006.232.07:52:20.23#ibcon#enter sib2, iclass 36, count 0 2006.232.07:52:20.23#ibcon#flushed, iclass 36, count 0 2006.232.07:52:20.23#ibcon#about to write, iclass 36, count 0 2006.232.07:52:20.23#ibcon#wrote, iclass 36, count 0 2006.232.07:52:20.23#ibcon#about to read 3, iclass 36, count 0 2006.232.07:52:20.26#ibcon#read 3, iclass 36, count 0 2006.232.07:52:20.26#ibcon#about to read 4, iclass 36, count 0 2006.232.07:52:20.26#ibcon#read 4, iclass 36, count 0 2006.232.07:52:20.26#ibcon#about to read 5, iclass 36, count 0 2006.232.07:52:20.26#ibcon#read 5, iclass 36, count 0 2006.232.07:52:20.26#ibcon#about to read 6, iclass 36, count 0 2006.232.07:52:20.26#ibcon#read 6, iclass 36, count 0 2006.232.07:52:20.26#ibcon#end of sib2, iclass 36, count 0 2006.232.07:52:20.26#ibcon#*after write, iclass 36, count 0 2006.232.07:52:20.26#ibcon#*before return 0, iclass 36, count 0 2006.232.07:52:20.26#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.232.07:52:20.26#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.232.07:52:20.26#ibcon#about to clear, iclass 36 cls_cnt 0 2006.232.07:52:20.26#ibcon#cleared, iclass 36 cls_cnt 0 2006.232.07:52:20.26$vc4f8/valo=8,852.99 2006.232.07:52:20.26#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.232.07:52:20.26#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.232.07:52:20.26#ibcon#ireg 17 cls_cnt 0 2006.232.07:52:20.26#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.232.07:52:20.26#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.232.07:52:20.26#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.232.07:52:20.26#ibcon#enter wrdev, iclass 38, count 0 2006.232.07:52:20.26#ibcon#first serial, iclass 38, count 0 2006.232.07:52:20.26#ibcon#enter sib2, iclass 38, count 0 2006.232.07:52:20.26#ibcon#flushed, iclass 38, count 0 2006.232.07:52:20.26#ibcon#about to write, iclass 38, count 0 2006.232.07:52:20.26#ibcon#wrote, iclass 38, count 0 2006.232.07:52:20.26#ibcon#about to read 3, iclass 38, count 0 2006.232.07:52:20.28#ibcon#read 3, iclass 38, count 0 2006.232.07:52:20.28#ibcon#about to read 4, iclass 38, count 0 2006.232.07:52:20.28#ibcon#read 4, iclass 38, count 0 2006.232.07:52:20.28#ibcon#about to read 5, iclass 38, count 0 2006.232.07:52:20.28#ibcon#read 5, iclass 38, count 0 2006.232.07:52:20.28#ibcon#about to read 6, iclass 38, count 0 2006.232.07:52:20.28#ibcon#read 6, iclass 38, count 0 2006.232.07:52:20.28#ibcon#end of sib2, iclass 38, count 0 2006.232.07:52:20.28#ibcon#*mode == 0, iclass 38, count 0 2006.232.07:52:20.28#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.232.07:52:20.28#ibcon#[26=FRQ=08,852.99\r\n] 2006.232.07:52:20.28#ibcon#*before write, iclass 38, count 0 2006.232.07:52:20.28#ibcon#enter sib2, iclass 38, count 0 2006.232.07:52:20.28#ibcon#flushed, iclass 38, count 0 2006.232.07:52:20.28#ibcon#about to write, iclass 38, count 0 2006.232.07:52:20.28#ibcon#wrote, iclass 38, count 0 2006.232.07:52:20.28#ibcon#about to read 3, iclass 38, count 0 2006.232.07:52:20.32#ibcon#read 3, iclass 38, count 0 2006.232.07:52:20.32#ibcon#about to read 4, iclass 38, count 0 2006.232.07:52:20.32#ibcon#read 4, iclass 38, count 0 2006.232.07:52:20.32#ibcon#about to read 5, iclass 38, count 0 2006.232.07:52:20.32#ibcon#read 5, iclass 38, count 0 2006.232.07:52:20.32#ibcon#about to read 6, iclass 38, count 0 2006.232.07:52:20.32#ibcon#read 6, iclass 38, count 0 2006.232.07:52:20.32#ibcon#end of sib2, iclass 38, count 0 2006.232.07:52:20.32#ibcon#*after write, iclass 38, count 0 2006.232.07:52:20.32#ibcon#*before return 0, iclass 38, count 0 2006.232.07:52:20.32#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.232.07:52:20.32#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.232.07:52:20.32#ibcon#about to clear, iclass 38 cls_cnt 0 2006.232.07:52:20.32#ibcon#cleared, iclass 38 cls_cnt 0 2006.232.07:52:20.32$vc4f8/va=8,6 2006.232.07:52:20.32#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.232.07:52:20.32#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.232.07:52:20.32#ibcon#ireg 11 cls_cnt 2 2006.232.07:52:20.32#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.232.07:52:20.38#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.232.07:52:20.38#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.232.07:52:20.38#ibcon#enter wrdev, iclass 40, count 2 2006.232.07:52:20.38#ibcon#first serial, iclass 40, count 2 2006.232.07:52:20.38#ibcon#enter sib2, iclass 40, count 2 2006.232.07:52:20.38#ibcon#flushed, iclass 40, count 2 2006.232.07:52:20.38#ibcon#about to write, iclass 40, count 2 2006.232.07:52:20.38#ibcon#wrote, iclass 40, count 2 2006.232.07:52:20.38#ibcon#about to read 3, iclass 40, count 2 2006.232.07:52:20.40#ibcon#read 3, iclass 40, count 2 2006.232.07:52:20.40#ibcon#about to read 4, iclass 40, count 2 2006.232.07:52:20.40#ibcon#read 4, iclass 40, count 2 2006.232.07:52:20.40#ibcon#about to read 5, iclass 40, count 2 2006.232.07:52:20.40#ibcon#read 5, iclass 40, count 2 2006.232.07:52:20.40#ibcon#about to read 6, iclass 40, count 2 2006.232.07:52:20.40#ibcon#read 6, iclass 40, count 2 2006.232.07:52:20.40#ibcon#end of sib2, iclass 40, count 2 2006.232.07:52:20.40#ibcon#*mode == 0, iclass 40, count 2 2006.232.07:52:20.40#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.232.07:52:20.40#ibcon#[25=AT08-06\r\n] 2006.232.07:52:20.40#ibcon#*before write, iclass 40, count 2 2006.232.07:52:20.40#ibcon#enter sib2, iclass 40, count 2 2006.232.07:52:20.40#ibcon#flushed, iclass 40, count 2 2006.232.07:52:20.40#ibcon#about to write, iclass 40, count 2 2006.232.07:52:20.40#ibcon#wrote, iclass 40, count 2 2006.232.07:52:20.40#ibcon#about to read 3, iclass 40, count 2 2006.232.07:52:20.43#ibcon#read 3, iclass 40, count 2 2006.232.07:52:20.43#ibcon#about to read 4, iclass 40, count 2 2006.232.07:52:20.43#ibcon#read 4, iclass 40, count 2 2006.232.07:52:20.43#ibcon#about to read 5, iclass 40, count 2 2006.232.07:52:20.43#ibcon#read 5, iclass 40, count 2 2006.232.07:52:20.43#ibcon#about to read 6, iclass 40, count 2 2006.232.07:52:20.43#ibcon#read 6, iclass 40, count 2 2006.232.07:52:20.43#ibcon#end of sib2, iclass 40, count 2 2006.232.07:52:20.43#ibcon#*after write, iclass 40, count 2 2006.232.07:52:20.43#ibcon#*before return 0, iclass 40, count 2 2006.232.07:52:20.43#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.232.07:52:20.43#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.232.07:52:20.43#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.232.07:52:20.43#ibcon#ireg 7 cls_cnt 0 2006.232.07:52:20.43#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.232.07:52:20.55#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.232.07:52:20.55#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.232.07:52:20.55#ibcon#enter wrdev, iclass 40, count 0 2006.232.07:52:20.55#ibcon#first serial, iclass 40, count 0 2006.232.07:52:20.55#ibcon#enter sib2, iclass 40, count 0 2006.232.07:52:20.55#ibcon#flushed, iclass 40, count 0 2006.232.07:52:20.55#ibcon#about to write, iclass 40, count 0 2006.232.07:52:20.55#ibcon#wrote, iclass 40, count 0 2006.232.07:52:20.55#ibcon#about to read 3, iclass 40, count 0 2006.232.07:52:20.57#ibcon#read 3, iclass 40, count 0 2006.232.07:52:20.57#ibcon#about to read 4, iclass 40, count 0 2006.232.07:52:20.57#ibcon#read 4, iclass 40, count 0 2006.232.07:52:20.57#ibcon#about to read 5, iclass 40, count 0 2006.232.07:52:20.57#ibcon#read 5, iclass 40, count 0 2006.232.07:52:20.57#ibcon#about to read 6, iclass 40, count 0 2006.232.07:52:20.57#ibcon#read 6, iclass 40, count 0 2006.232.07:52:20.57#ibcon#end of sib2, iclass 40, count 0 2006.232.07:52:20.57#ibcon#*mode == 0, iclass 40, count 0 2006.232.07:52:20.57#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.232.07:52:20.57#ibcon#[25=USB\r\n] 2006.232.07:52:20.57#ibcon#*before write, iclass 40, count 0 2006.232.07:52:20.57#ibcon#enter sib2, iclass 40, count 0 2006.232.07:52:20.57#ibcon#flushed, iclass 40, count 0 2006.232.07:52:20.57#ibcon#about to write, iclass 40, count 0 2006.232.07:52:20.57#ibcon#wrote, iclass 40, count 0 2006.232.07:52:20.57#ibcon#about to read 3, iclass 40, count 0 2006.232.07:52:20.60#ibcon#read 3, iclass 40, count 0 2006.232.07:52:20.60#ibcon#about to read 4, iclass 40, count 0 2006.232.07:52:20.60#ibcon#read 4, iclass 40, count 0 2006.232.07:52:20.60#ibcon#about to read 5, iclass 40, count 0 2006.232.07:52:20.60#ibcon#read 5, iclass 40, count 0 2006.232.07:52:20.60#ibcon#about to read 6, iclass 40, count 0 2006.232.07:52:20.60#ibcon#read 6, iclass 40, count 0 2006.232.07:52:20.60#ibcon#end of sib2, iclass 40, count 0 2006.232.07:52:20.60#ibcon#*after write, iclass 40, count 0 2006.232.07:52:20.60#ibcon#*before return 0, iclass 40, count 0 2006.232.07:52:20.60#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.232.07:52:20.60#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.232.07:52:20.60#ibcon#about to clear, iclass 40 cls_cnt 0 2006.232.07:52:20.60#ibcon#cleared, iclass 40 cls_cnt 0 2006.232.07:52:20.60$vc4f8/vblo=1,632.99 2006.232.07:52:20.60#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.232.07:52:20.60#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.232.07:52:20.60#ibcon#ireg 17 cls_cnt 0 2006.232.07:52:20.60#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.232.07:52:20.60#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.232.07:52:20.60#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.232.07:52:20.60#ibcon#enter wrdev, iclass 4, count 0 2006.232.07:52:20.60#ibcon#first serial, iclass 4, count 0 2006.232.07:52:20.60#ibcon#enter sib2, iclass 4, count 0 2006.232.07:52:20.60#ibcon#flushed, iclass 4, count 0 2006.232.07:52:20.60#ibcon#about to write, iclass 4, count 0 2006.232.07:52:20.60#ibcon#wrote, iclass 4, count 0 2006.232.07:52:20.60#ibcon#about to read 3, iclass 4, count 0 2006.232.07:52:20.62#ibcon#read 3, iclass 4, count 0 2006.232.07:52:20.62#ibcon#about to read 4, iclass 4, count 0 2006.232.07:52:20.62#ibcon#read 4, iclass 4, count 0 2006.232.07:52:20.62#ibcon#about to read 5, iclass 4, count 0 2006.232.07:52:20.62#ibcon#read 5, iclass 4, count 0 2006.232.07:52:20.62#ibcon#about to read 6, iclass 4, count 0 2006.232.07:52:20.62#ibcon#read 6, iclass 4, count 0 2006.232.07:52:20.62#ibcon#end of sib2, iclass 4, count 0 2006.232.07:52:20.62#ibcon#*mode == 0, iclass 4, count 0 2006.232.07:52:20.62#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.232.07:52:20.62#ibcon#[28=FRQ=01,632.99\r\n] 2006.232.07:52:20.62#ibcon#*before write, iclass 4, count 0 2006.232.07:52:20.62#ibcon#enter sib2, iclass 4, count 0 2006.232.07:52:20.62#ibcon#flushed, iclass 4, count 0 2006.232.07:52:20.62#ibcon#about to write, iclass 4, count 0 2006.232.07:52:20.62#ibcon#wrote, iclass 4, count 0 2006.232.07:52:20.62#ibcon#about to read 3, iclass 4, count 0 2006.232.07:52:20.66#ibcon#read 3, iclass 4, count 0 2006.232.07:52:20.66#ibcon#about to read 4, iclass 4, count 0 2006.232.07:52:20.66#ibcon#read 4, iclass 4, count 0 2006.232.07:52:20.66#ibcon#about to read 5, iclass 4, count 0 2006.232.07:52:20.66#ibcon#read 5, iclass 4, count 0 2006.232.07:52:20.66#ibcon#about to read 6, iclass 4, count 0 2006.232.07:52:20.66#ibcon#read 6, iclass 4, count 0 2006.232.07:52:20.66#ibcon#end of sib2, iclass 4, count 0 2006.232.07:52:20.66#ibcon#*after write, iclass 4, count 0 2006.232.07:52:20.66#ibcon#*before return 0, iclass 4, count 0 2006.232.07:52:20.66#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.232.07:52:20.66#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.232.07:52:20.66#ibcon#about to clear, iclass 4 cls_cnt 0 2006.232.07:52:20.66#ibcon#cleared, iclass 4 cls_cnt 0 2006.232.07:52:20.66$vc4f8/vb=1,4 2006.232.07:52:20.66#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.232.07:52:20.66#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.232.07:52:20.66#ibcon#ireg 11 cls_cnt 2 2006.232.07:52:20.66#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.232.07:52:20.66#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.232.07:52:20.66#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.232.07:52:20.66#ibcon#enter wrdev, iclass 6, count 2 2006.232.07:52:20.66#ibcon#first serial, iclass 6, count 2 2006.232.07:52:20.66#ibcon#enter sib2, iclass 6, count 2 2006.232.07:52:20.66#ibcon#flushed, iclass 6, count 2 2006.232.07:52:20.66#ibcon#about to write, iclass 6, count 2 2006.232.07:52:20.66#ibcon#wrote, iclass 6, count 2 2006.232.07:52:20.66#ibcon#about to read 3, iclass 6, count 2 2006.232.07:52:20.68#ibcon#read 3, iclass 6, count 2 2006.232.07:52:20.68#ibcon#about to read 4, iclass 6, count 2 2006.232.07:52:20.68#ibcon#read 4, iclass 6, count 2 2006.232.07:52:20.68#ibcon#about to read 5, iclass 6, count 2 2006.232.07:52:20.68#ibcon#read 5, iclass 6, count 2 2006.232.07:52:20.68#ibcon#about to read 6, iclass 6, count 2 2006.232.07:52:20.68#ibcon#read 6, iclass 6, count 2 2006.232.07:52:20.68#ibcon#end of sib2, iclass 6, count 2 2006.232.07:52:20.68#ibcon#*mode == 0, iclass 6, count 2 2006.232.07:52:20.68#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.232.07:52:20.68#ibcon#[27=AT01-04\r\n] 2006.232.07:52:20.68#ibcon#*before write, iclass 6, count 2 2006.232.07:52:20.68#ibcon#enter sib2, iclass 6, count 2 2006.232.07:52:20.68#ibcon#flushed, iclass 6, count 2 2006.232.07:52:20.68#ibcon#about to write, iclass 6, count 2 2006.232.07:52:20.68#ibcon#wrote, iclass 6, count 2 2006.232.07:52:20.68#ibcon#about to read 3, iclass 6, count 2 2006.232.07:52:20.71#ibcon#read 3, iclass 6, count 2 2006.232.07:52:20.71#ibcon#about to read 4, iclass 6, count 2 2006.232.07:52:20.71#ibcon#read 4, iclass 6, count 2 2006.232.07:52:20.71#ibcon#about to read 5, iclass 6, count 2 2006.232.07:52:20.71#ibcon#read 5, iclass 6, count 2 2006.232.07:52:20.71#ibcon#about to read 6, iclass 6, count 2 2006.232.07:52:20.71#ibcon#read 6, iclass 6, count 2 2006.232.07:52:20.71#ibcon#end of sib2, iclass 6, count 2 2006.232.07:52:20.71#ibcon#*after write, iclass 6, count 2 2006.232.07:52:20.71#ibcon#*before return 0, iclass 6, count 2 2006.232.07:52:20.71#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.232.07:52:20.71#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.232.07:52:20.71#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.232.07:52:20.71#ibcon#ireg 7 cls_cnt 0 2006.232.07:52:20.71#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.232.07:52:20.83#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.232.07:52:20.83#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.232.07:52:20.83#ibcon#enter wrdev, iclass 6, count 0 2006.232.07:52:20.83#ibcon#first serial, iclass 6, count 0 2006.232.07:52:20.83#ibcon#enter sib2, iclass 6, count 0 2006.232.07:52:20.83#ibcon#flushed, iclass 6, count 0 2006.232.07:52:20.83#ibcon#about to write, iclass 6, count 0 2006.232.07:52:20.83#ibcon#wrote, iclass 6, count 0 2006.232.07:52:20.83#ibcon#about to read 3, iclass 6, count 0 2006.232.07:52:20.85#ibcon#read 3, iclass 6, count 0 2006.232.07:52:20.85#ibcon#about to read 4, iclass 6, count 0 2006.232.07:52:20.85#ibcon#read 4, iclass 6, count 0 2006.232.07:52:20.85#ibcon#about to read 5, iclass 6, count 0 2006.232.07:52:20.85#ibcon#read 5, iclass 6, count 0 2006.232.07:52:20.85#ibcon#about to read 6, iclass 6, count 0 2006.232.07:52:20.85#ibcon#read 6, iclass 6, count 0 2006.232.07:52:20.85#ibcon#end of sib2, iclass 6, count 0 2006.232.07:52:20.85#ibcon#*mode == 0, iclass 6, count 0 2006.232.07:52:20.85#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.232.07:52:20.85#ibcon#[27=USB\r\n] 2006.232.07:52:20.85#ibcon#*before write, iclass 6, count 0 2006.232.07:52:20.85#ibcon#enter sib2, iclass 6, count 0 2006.232.07:52:20.85#ibcon#flushed, iclass 6, count 0 2006.232.07:52:20.85#ibcon#about to write, iclass 6, count 0 2006.232.07:52:20.85#ibcon#wrote, iclass 6, count 0 2006.232.07:52:20.85#ibcon#about to read 3, iclass 6, count 0 2006.232.07:52:20.88#ibcon#read 3, iclass 6, count 0 2006.232.07:52:20.88#ibcon#about to read 4, iclass 6, count 0 2006.232.07:52:20.88#ibcon#read 4, iclass 6, count 0 2006.232.07:52:20.88#ibcon#about to read 5, iclass 6, count 0 2006.232.07:52:20.88#ibcon#read 5, iclass 6, count 0 2006.232.07:52:20.88#ibcon#about to read 6, iclass 6, count 0 2006.232.07:52:20.88#ibcon#read 6, iclass 6, count 0 2006.232.07:52:20.88#ibcon#end of sib2, iclass 6, count 0 2006.232.07:52:20.88#ibcon#*after write, iclass 6, count 0 2006.232.07:52:20.88#ibcon#*before return 0, iclass 6, count 0 2006.232.07:52:20.88#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.232.07:52:20.88#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.232.07:52:20.88#ibcon#about to clear, iclass 6 cls_cnt 0 2006.232.07:52:20.88#ibcon#cleared, iclass 6 cls_cnt 0 2006.232.07:52:20.88$vc4f8/vblo=2,640.99 2006.232.07:52:20.88#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.232.07:52:20.88#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.232.07:52:20.88#ibcon#ireg 17 cls_cnt 0 2006.232.07:52:20.88#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.232.07:52:20.88#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.232.07:52:20.88#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.232.07:52:20.88#ibcon#enter wrdev, iclass 10, count 0 2006.232.07:52:20.88#ibcon#first serial, iclass 10, count 0 2006.232.07:52:20.88#ibcon#enter sib2, iclass 10, count 0 2006.232.07:52:20.88#ibcon#flushed, iclass 10, count 0 2006.232.07:52:20.88#ibcon#about to write, iclass 10, count 0 2006.232.07:52:20.88#ibcon#wrote, iclass 10, count 0 2006.232.07:52:20.88#ibcon#about to read 3, iclass 10, count 0 2006.232.07:52:20.90#ibcon#read 3, iclass 10, count 0 2006.232.07:52:20.90#ibcon#about to read 4, iclass 10, count 0 2006.232.07:52:20.90#ibcon#read 4, iclass 10, count 0 2006.232.07:52:20.90#ibcon#about to read 5, iclass 10, count 0 2006.232.07:52:20.90#ibcon#read 5, iclass 10, count 0 2006.232.07:52:20.90#ibcon#about to read 6, iclass 10, count 0 2006.232.07:52:20.90#ibcon#read 6, iclass 10, count 0 2006.232.07:52:20.90#ibcon#end of sib2, iclass 10, count 0 2006.232.07:52:20.90#ibcon#*mode == 0, iclass 10, count 0 2006.232.07:52:20.90#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.232.07:52:20.90#ibcon#[28=FRQ=02,640.99\r\n] 2006.232.07:52:20.90#ibcon#*before write, iclass 10, count 0 2006.232.07:52:20.90#ibcon#enter sib2, iclass 10, count 0 2006.232.07:52:20.90#ibcon#flushed, iclass 10, count 0 2006.232.07:52:20.90#ibcon#about to write, iclass 10, count 0 2006.232.07:52:20.90#ibcon#wrote, iclass 10, count 0 2006.232.07:52:20.90#ibcon#about to read 3, iclass 10, count 0 2006.232.07:52:20.94#ibcon#read 3, iclass 10, count 0 2006.232.07:52:20.94#ibcon#about to read 4, iclass 10, count 0 2006.232.07:52:20.94#ibcon#read 4, iclass 10, count 0 2006.232.07:52:20.94#ibcon#about to read 5, iclass 10, count 0 2006.232.07:52:20.94#ibcon#read 5, iclass 10, count 0 2006.232.07:52:20.94#ibcon#about to read 6, iclass 10, count 0 2006.232.07:52:20.94#ibcon#read 6, iclass 10, count 0 2006.232.07:52:20.94#ibcon#end of sib2, iclass 10, count 0 2006.232.07:52:20.94#ibcon#*after write, iclass 10, count 0 2006.232.07:52:20.94#ibcon#*before return 0, iclass 10, count 0 2006.232.07:52:20.94#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.232.07:52:20.94#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.232.07:52:20.94#ibcon#about to clear, iclass 10 cls_cnt 0 2006.232.07:52:20.94#ibcon#cleared, iclass 10 cls_cnt 0 2006.232.07:52:20.94$vc4f8/vb=2,4 2006.232.07:52:20.94#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.232.07:52:20.94#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.232.07:52:20.94#ibcon#ireg 11 cls_cnt 2 2006.232.07:52:20.94#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.232.07:52:21.00#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.232.07:52:21.00#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.232.07:52:21.00#ibcon#enter wrdev, iclass 12, count 2 2006.232.07:52:21.00#ibcon#first serial, iclass 12, count 2 2006.232.07:52:21.00#ibcon#enter sib2, iclass 12, count 2 2006.232.07:52:21.00#ibcon#flushed, iclass 12, count 2 2006.232.07:52:21.00#ibcon#about to write, iclass 12, count 2 2006.232.07:52:21.00#ibcon#wrote, iclass 12, count 2 2006.232.07:52:21.00#ibcon#about to read 3, iclass 12, count 2 2006.232.07:52:21.02#ibcon#read 3, iclass 12, count 2 2006.232.07:52:21.02#ibcon#about to read 4, iclass 12, count 2 2006.232.07:52:21.02#ibcon#read 4, iclass 12, count 2 2006.232.07:52:21.02#ibcon#about to read 5, iclass 12, count 2 2006.232.07:52:21.02#ibcon#read 5, iclass 12, count 2 2006.232.07:52:21.02#ibcon#about to read 6, iclass 12, count 2 2006.232.07:52:21.02#ibcon#read 6, iclass 12, count 2 2006.232.07:52:21.02#ibcon#end of sib2, iclass 12, count 2 2006.232.07:52:21.02#ibcon#*mode == 0, iclass 12, count 2 2006.232.07:52:21.02#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.232.07:52:21.02#ibcon#[27=AT02-04\r\n] 2006.232.07:52:21.02#ibcon#*before write, iclass 12, count 2 2006.232.07:52:21.02#ibcon#enter sib2, iclass 12, count 2 2006.232.07:52:21.02#ibcon#flushed, iclass 12, count 2 2006.232.07:52:21.02#ibcon#about to write, iclass 12, count 2 2006.232.07:52:21.02#ibcon#wrote, iclass 12, count 2 2006.232.07:52:21.02#ibcon#about to read 3, iclass 12, count 2 2006.232.07:52:21.05#ibcon#read 3, iclass 12, count 2 2006.232.07:52:21.05#ibcon#about to read 4, iclass 12, count 2 2006.232.07:52:21.05#ibcon#read 4, iclass 12, count 2 2006.232.07:52:21.05#ibcon#about to read 5, iclass 12, count 2 2006.232.07:52:21.05#ibcon#read 5, iclass 12, count 2 2006.232.07:52:21.05#ibcon#about to read 6, iclass 12, count 2 2006.232.07:52:21.05#ibcon#read 6, iclass 12, count 2 2006.232.07:52:21.05#ibcon#end of sib2, iclass 12, count 2 2006.232.07:52:21.05#ibcon#*after write, iclass 12, count 2 2006.232.07:52:21.05#ibcon#*before return 0, iclass 12, count 2 2006.232.07:52:21.05#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.232.07:52:21.05#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.232.07:52:21.05#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.232.07:52:21.05#ibcon#ireg 7 cls_cnt 0 2006.232.07:52:21.05#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.232.07:52:21.17#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.232.07:52:21.17#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.232.07:52:21.17#ibcon#enter wrdev, iclass 12, count 0 2006.232.07:52:21.17#ibcon#first serial, iclass 12, count 0 2006.232.07:52:21.17#ibcon#enter sib2, iclass 12, count 0 2006.232.07:52:21.17#ibcon#flushed, iclass 12, count 0 2006.232.07:52:21.17#ibcon#about to write, iclass 12, count 0 2006.232.07:52:21.17#ibcon#wrote, iclass 12, count 0 2006.232.07:52:21.17#ibcon#about to read 3, iclass 12, count 0 2006.232.07:52:21.19#ibcon#read 3, iclass 12, count 0 2006.232.07:52:21.19#ibcon#about to read 4, iclass 12, count 0 2006.232.07:52:21.19#ibcon#read 4, iclass 12, count 0 2006.232.07:52:21.19#ibcon#about to read 5, iclass 12, count 0 2006.232.07:52:21.19#ibcon#read 5, iclass 12, count 0 2006.232.07:52:21.19#ibcon#about to read 6, iclass 12, count 0 2006.232.07:52:21.19#ibcon#read 6, iclass 12, count 0 2006.232.07:52:21.19#ibcon#end of sib2, iclass 12, count 0 2006.232.07:52:21.19#ibcon#*mode == 0, iclass 12, count 0 2006.232.07:52:21.19#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.232.07:52:21.19#ibcon#[27=USB\r\n] 2006.232.07:52:21.19#ibcon#*before write, iclass 12, count 0 2006.232.07:52:21.19#ibcon#enter sib2, iclass 12, count 0 2006.232.07:52:21.19#ibcon#flushed, iclass 12, count 0 2006.232.07:52:21.19#ibcon#about to write, iclass 12, count 0 2006.232.07:52:21.19#ibcon#wrote, iclass 12, count 0 2006.232.07:52:21.19#ibcon#about to read 3, iclass 12, count 0 2006.232.07:52:21.22#ibcon#read 3, iclass 12, count 0 2006.232.07:52:21.22#ibcon#about to read 4, iclass 12, count 0 2006.232.07:52:21.22#ibcon#read 4, iclass 12, count 0 2006.232.07:52:21.22#ibcon#about to read 5, iclass 12, count 0 2006.232.07:52:21.22#ibcon#read 5, iclass 12, count 0 2006.232.07:52:21.22#ibcon#about to read 6, iclass 12, count 0 2006.232.07:52:21.22#ibcon#read 6, iclass 12, count 0 2006.232.07:52:21.22#ibcon#end of sib2, iclass 12, count 0 2006.232.07:52:21.22#ibcon#*after write, iclass 12, count 0 2006.232.07:52:21.22#ibcon#*before return 0, iclass 12, count 0 2006.232.07:52:21.22#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.232.07:52:21.22#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.232.07:52:21.22#ibcon#about to clear, iclass 12 cls_cnt 0 2006.232.07:52:21.22#ibcon#cleared, iclass 12 cls_cnt 0 2006.232.07:52:21.22$vc4f8/vblo=3,656.99 2006.232.07:52:21.22#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.232.07:52:21.22#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.232.07:52:21.22#ibcon#ireg 17 cls_cnt 0 2006.232.07:52:21.22#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.232.07:52:21.22#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.232.07:52:21.22#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.232.07:52:21.22#ibcon#enter wrdev, iclass 14, count 0 2006.232.07:52:21.22#ibcon#first serial, iclass 14, count 0 2006.232.07:52:21.22#ibcon#enter sib2, iclass 14, count 0 2006.232.07:52:21.22#ibcon#flushed, iclass 14, count 0 2006.232.07:52:21.22#ibcon#about to write, iclass 14, count 0 2006.232.07:52:21.22#ibcon#wrote, iclass 14, count 0 2006.232.07:52:21.22#ibcon#about to read 3, iclass 14, count 0 2006.232.07:52:21.24#ibcon#read 3, iclass 14, count 0 2006.232.07:52:21.24#ibcon#about to read 4, iclass 14, count 0 2006.232.07:52:21.24#ibcon#read 4, iclass 14, count 0 2006.232.07:52:21.24#ibcon#about to read 5, iclass 14, count 0 2006.232.07:52:21.24#ibcon#read 5, iclass 14, count 0 2006.232.07:52:21.24#ibcon#about to read 6, iclass 14, count 0 2006.232.07:52:21.24#ibcon#read 6, iclass 14, count 0 2006.232.07:52:21.24#ibcon#end of sib2, iclass 14, count 0 2006.232.07:52:21.24#ibcon#*mode == 0, iclass 14, count 0 2006.232.07:52:21.24#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.232.07:52:21.24#ibcon#[28=FRQ=03,656.99\r\n] 2006.232.07:52:21.24#ibcon#*before write, iclass 14, count 0 2006.232.07:52:21.24#ibcon#enter sib2, iclass 14, count 0 2006.232.07:52:21.24#ibcon#flushed, iclass 14, count 0 2006.232.07:52:21.24#ibcon#about to write, iclass 14, count 0 2006.232.07:52:21.24#ibcon#wrote, iclass 14, count 0 2006.232.07:52:21.24#ibcon#about to read 3, iclass 14, count 0 2006.232.07:52:21.28#ibcon#read 3, iclass 14, count 0 2006.232.07:52:21.28#ibcon#about to read 4, iclass 14, count 0 2006.232.07:52:21.28#ibcon#read 4, iclass 14, count 0 2006.232.07:52:21.28#ibcon#about to read 5, iclass 14, count 0 2006.232.07:52:21.28#ibcon#read 5, iclass 14, count 0 2006.232.07:52:21.28#ibcon#about to read 6, iclass 14, count 0 2006.232.07:52:21.28#ibcon#read 6, iclass 14, count 0 2006.232.07:52:21.28#ibcon#end of sib2, iclass 14, count 0 2006.232.07:52:21.28#ibcon#*after write, iclass 14, count 0 2006.232.07:52:21.28#ibcon#*before return 0, iclass 14, count 0 2006.232.07:52:21.28#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.232.07:52:21.28#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.232.07:52:21.28#ibcon#about to clear, iclass 14 cls_cnt 0 2006.232.07:52:21.28#ibcon#cleared, iclass 14 cls_cnt 0 2006.232.07:52:21.28$vc4f8/vb=3,4 2006.232.07:52:21.28#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.232.07:52:21.28#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.232.07:52:21.28#ibcon#ireg 11 cls_cnt 2 2006.232.07:52:21.28#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.232.07:52:21.34#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.232.07:52:21.34#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.232.07:52:21.34#ibcon#enter wrdev, iclass 16, count 2 2006.232.07:52:21.34#ibcon#first serial, iclass 16, count 2 2006.232.07:52:21.34#ibcon#enter sib2, iclass 16, count 2 2006.232.07:52:21.34#ibcon#flushed, iclass 16, count 2 2006.232.07:52:21.34#ibcon#about to write, iclass 16, count 2 2006.232.07:52:21.34#ibcon#wrote, iclass 16, count 2 2006.232.07:52:21.34#ibcon#about to read 3, iclass 16, count 2 2006.232.07:52:21.36#ibcon#read 3, iclass 16, count 2 2006.232.07:52:21.36#ibcon#about to read 4, iclass 16, count 2 2006.232.07:52:21.36#ibcon#read 4, iclass 16, count 2 2006.232.07:52:21.36#ibcon#about to read 5, iclass 16, count 2 2006.232.07:52:21.36#ibcon#read 5, iclass 16, count 2 2006.232.07:52:21.36#ibcon#about to read 6, iclass 16, count 2 2006.232.07:52:21.36#ibcon#read 6, iclass 16, count 2 2006.232.07:52:21.36#ibcon#end of sib2, iclass 16, count 2 2006.232.07:52:21.36#ibcon#*mode == 0, iclass 16, count 2 2006.232.07:52:21.36#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.232.07:52:21.36#ibcon#[27=AT03-04\r\n] 2006.232.07:52:21.36#ibcon#*before write, iclass 16, count 2 2006.232.07:52:21.36#ibcon#enter sib2, iclass 16, count 2 2006.232.07:52:21.36#ibcon#flushed, iclass 16, count 2 2006.232.07:52:21.36#ibcon#about to write, iclass 16, count 2 2006.232.07:52:21.36#ibcon#wrote, iclass 16, count 2 2006.232.07:52:21.36#ibcon#about to read 3, iclass 16, count 2 2006.232.07:52:21.39#ibcon#read 3, iclass 16, count 2 2006.232.07:52:21.39#ibcon#about to read 4, iclass 16, count 2 2006.232.07:52:21.39#ibcon#read 4, iclass 16, count 2 2006.232.07:52:21.39#ibcon#about to read 5, iclass 16, count 2 2006.232.07:52:21.39#ibcon#read 5, iclass 16, count 2 2006.232.07:52:21.39#ibcon#about to read 6, iclass 16, count 2 2006.232.07:52:21.39#ibcon#read 6, iclass 16, count 2 2006.232.07:52:21.39#ibcon#end of sib2, iclass 16, count 2 2006.232.07:52:21.39#ibcon#*after write, iclass 16, count 2 2006.232.07:52:21.39#ibcon#*before return 0, iclass 16, count 2 2006.232.07:52:21.39#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.232.07:52:21.39#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.232.07:52:21.39#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.232.07:52:21.39#ibcon#ireg 7 cls_cnt 0 2006.232.07:52:21.39#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.232.07:52:21.51#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.232.07:52:21.51#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.232.07:52:21.51#ibcon#enter wrdev, iclass 16, count 0 2006.232.07:52:21.51#ibcon#first serial, iclass 16, count 0 2006.232.07:52:21.51#ibcon#enter sib2, iclass 16, count 0 2006.232.07:52:21.51#ibcon#flushed, iclass 16, count 0 2006.232.07:52:21.51#ibcon#about to write, iclass 16, count 0 2006.232.07:52:21.51#ibcon#wrote, iclass 16, count 0 2006.232.07:52:21.51#ibcon#about to read 3, iclass 16, count 0 2006.232.07:52:21.53#ibcon#read 3, iclass 16, count 0 2006.232.07:52:21.53#ibcon#about to read 4, iclass 16, count 0 2006.232.07:52:21.53#ibcon#read 4, iclass 16, count 0 2006.232.07:52:21.53#ibcon#about to read 5, iclass 16, count 0 2006.232.07:52:21.53#ibcon#read 5, iclass 16, count 0 2006.232.07:52:21.53#ibcon#about to read 6, iclass 16, count 0 2006.232.07:52:21.53#ibcon#read 6, iclass 16, count 0 2006.232.07:52:21.53#ibcon#end of sib2, iclass 16, count 0 2006.232.07:52:21.53#ibcon#*mode == 0, iclass 16, count 0 2006.232.07:52:21.53#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.232.07:52:21.53#ibcon#[27=USB\r\n] 2006.232.07:52:21.53#ibcon#*before write, iclass 16, count 0 2006.232.07:52:21.53#ibcon#enter sib2, iclass 16, count 0 2006.232.07:52:21.53#ibcon#flushed, iclass 16, count 0 2006.232.07:52:21.53#ibcon#about to write, iclass 16, count 0 2006.232.07:52:21.53#ibcon#wrote, iclass 16, count 0 2006.232.07:52:21.53#ibcon#about to read 3, iclass 16, count 0 2006.232.07:52:21.56#ibcon#read 3, iclass 16, count 0 2006.232.07:52:21.56#ibcon#about to read 4, iclass 16, count 0 2006.232.07:52:21.56#ibcon#read 4, iclass 16, count 0 2006.232.07:52:21.56#ibcon#about to read 5, iclass 16, count 0 2006.232.07:52:21.56#ibcon#read 5, iclass 16, count 0 2006.232.07:52:21.56#ibcon#about to read 6, iclass 16, count 0 2006.232.07:52:21.56#ibcon#read 6, iclass 16, count 0 2006.232.07:52:21.56#ibcon#end of sib2, iclass 16, count 0 2006.232.07:52:21.56#ibcon#*after write, iclass 16, count 0 2006.232.07:52:21.56#ibcon#*before return 0, iclass 16, count 0 2006.232.07:52:21.56#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.232.07:52:21.56#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.232.07:52:21.56#ibcon#about to clear, iclass 16 cls_cnt 0 2006.232.07:52:21.56#ibcon#cleared, iclass 16 cls_cnt 0 2006.232.07:52:21.56$vc4f8/vblo=4,712.99 2006.232.07:52:21.56#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.232.07:52:21.56#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.232.07:52:21.56#ibcon#ireg 17 cls_cnt 0 2006.232.07:52:21.56#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.232.07:52:21.56#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.232.07:52:21.56#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.232.07:52:21.56#ibcon#enter wrdev, iclass 18, count 0 2006.232.07:52:21.56#ibcon#first serial, iclass 18, count 0 2006.232.07:52:21.56#ibcon#enter sib2, iclass 18, count 0 2006.232.07:52:21.56#ibcon#flushed, iclass 18, count 0 2006.232.07:52:21.56#ibcon#about to write, iclass 18, count 0 2006.232.07:52:21.56#ibcon#wrote, iclass 18, count 0 2006.232.07:52:21.56#ibcon#about to read 3, iclass 18, count 0 2006.232.07:52:21.58#ibcon#read 3, iclass 18, count 0 2006.232.07:52:21.58#ibcon#about to read 4, iclass 18, count 0 2006.232.07:52:21.58#ibcon#read 4, iclass 18, count 0 2006.232.07:52:21.58#ibcon#about to read 5, iclass 18, count 0 2006.232.07:52:21.58#ibcon#read 5, iclass 18, count 0 2006.232.07:52:21.58#ibcon#about to read 6, iclass 18, count 0 2006.232.07:52:21.58#ibcon#read 6, iclass 18, count 0 2006.232.07:52:21.58#ibcon#end of sib2, iclass 18, count 0 2006.232.07:52:21.58#ibcon#*mode == 0, iclass 18, count 0 2006.232.07:52:21.58#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.232.07:52:21.58#ibcon#[28=FRQ=04,712.99\r\n] 2006.232.07:52:21.58#ibcon#*before write, iclass 18, count 0 2006.232.07:52:21.58#ibcon#enter sib2, iclass 18, count 0 2006.232.07:52:21.58#ibcon#flushed, iclass 18, count 0 2006.232.07:52:21.58#ibcon#about to write, iclass 18, count 0 2006.232.07:52:21.58#ibcon#wrote, iclass 18, count 0 2006.232.07:52:21.58#ibcon#about to read 3, iclass 18, count 0 2006.232.07:52:21.62#ibcon#read 3, iclass 18, count 0 2006.232.07:52:21.62#ibcon#about to read 4, iclass 18, count 0 2006.232.07:52:21.62#ibcon#read 4, iclass 18, count 0 2006.232.07:52:21.62#ibcon#about to read 5, iclass 18, count 0 2006.232.07:52:21.62#ibcon#read 5, iclass 18, count 0 2006.232.07:52:21.62#ibcon#about to read 6, iclass 18, count 0 2006.232.07:52:21.62#ibcon#read 6, iclass 18, count 0 2006.232.07:52:21.62#ibcon#end of sib2, iclass 18, count 0 2006.232.07:52:21.62#ibcon#*after write, iclass 18, count 0 2006.232.07:52:21.62#ibcon#*before return 0, iclass 18, count 0 2006.232.07:52:21.62#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.232.07:52:21.62#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.232.07:52:21.62#ibcon#about to clear, iclass 18 cls_cnt 0 2006.232.07:52:21.62#ibcon#cleared, iclass 18 cls_cnt 0 2006.232.07:52:21.62$vc4f8/vb=4,4 2006.232.07:52:21.62#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.232.07:52:21.62#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.232.07:52:21.62#ibcon#ireg 11 cls_cnt 2 2006.232.07:52:21.62#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.232.07:52:21.68#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.232.07:52:21.68#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.232.07:52:21.68#ibcon#enter wrdev, iclass 20, count 2 2006.232.07:52:21.68#ibcon#first serial, iclass 20, count 2 2006.232.07:52:21.68#ibcon#enter sib2, iclass 20, count 2 2006.232.07:52:21.68#ibcon#flushed, iclass 20, count 2 2006.232.07:52:21.68#ibcon#about to write, iclass 20, count 2 2006.232.07:52:21.68#ibcon#wrote, iclass 20, count 2 2006.232.07:52:21.68#ibcon#about to read 3, iclass 20, count 2 2006.232.07:52:21.70#ibcon#read 3, iclass 20, count 2 2006.232.07:52:21.70#ibcon#about to read 4, iclass 20, count 2 2006.232.07:52:21.70#ibcon#read 4, iclass 20, count 2 2006.232.07:52:21.70#ibcon#about to read 5, iclass 20, count 2 2006.232.07:52:21.70#ibcon#read 5, iclass 20, count 2 2006.232.07:52:21.70#ibcon#about to read 6, iclass 20, count 2 2006.232.07:52:21.70#ibcon#read 6, iclass 20, count 2 2006.232.07:52:21.70#ibcon#end of sib2, iclass 20, count 2 2006.232.07:52:21.70#ibcon#*mode == 0, iclass 20, count 2 2006.232.07:52:21.70#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.232.07:52:21.70#ibcon#[27=AT04-04\r\n] 2006.232.07:52:21.70#ibcon#*before write, iclass 20, count 2 2006.232.07:52:21.70#ibcon#enter sib2, iclass 20, count 2 2006.232.07:52:21.70#ibcon#flushed, iclass 20, count 2 2006.232.07:52:21.70#ibcon#about to write, iclass 20, count 2 2006.232.07:52:21.70#ibcon#wrote, iclass 20, count 2 2006.232.07:52:21.70#ibcon#about to read 3, iclass 20, count 2 2006.232.07:52:21.73#ibcon#read 3, iclass 20, count 2 2006.232.07:52:21.73#ibcon#about to read 4, iclass 20, count 2 2006.232.07:52:21.73#ibcon#read 4, iclass 20, count 2 2006.232.07:52:21.73#ibcon#about to read 5, iclass 20, count 2 2006.232.07:52:21.73#ibcon#read 5, iclass 20, count 2 2006.232.07:52:21.73#ibcon#about to read 6, iclass 20, count 2 2006.232.07:52:21.73#ibcon#read 6, iclass 20, count 2 2006.232.07:52:21.73#ibcon#end of sib2, iclass 20, count 2 2006.232.07:52:21.73#ibcon#*after write, iclass 20, count 2 2006.232.07:52:21.73#ibcon#*before return 0, iclass 20, count 2 2006.232.07:52:21.73#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.232.07:52:21.73#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.232.07:52:21.73#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.232.07:52:21.73#ibcon#ireg 7 cls_cnt 0 2006.232.07:52:21.73#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.232.07:52:21.85#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.232.07:52:21.85#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.232.07:52:21.85#ibcon#enter wrdev, iclass 20, count 0 2006.232.07:52:21.85#ibcon#first serial, iclass 20, count 0 2006.232.07:52:21.85#ibcon#enter sib2, iclass 20, count 0 2006.232.07:52:21.85#ibcon#flushed, iclass 20, count 0 2006.232.07:52:21.85#ibcon#about to write, iclass 20, count 0 2006.232.07:52:21.85#ibcon#wrote, iclass 20, count 0 2006.232.07:52:21.85#ibcon#about to read 3, iclass 20, count 0 2006.232.07:52:21.87#ibcon#read 3, iclass 20, count 0 2006.232.07:52:21.87#ibcon#about to read 4, iclass 20, count 0 2006.232.07:52:21.87#ibcon#read 4, iclass 20, count 0 2006.232.07:52:21.87#ibcon#about to read 5, iclass 20, count 0 2006.232.07:52:21.87#ibcon#read 5, iclass 20, count 0 2006.232.07:52:21.87#ibcon#about to read 6, iclass 20, count 0 2006.232.07:52:21.87#ibcon#read 6, iclass 20, count 0 2006.232.07:52:21.87#ibcon#end of sib2, iclass 20, count 0 2006.232.07:52:21.87#ibcon#*mode == 0, iclass 20, count 0 2006.232.07:52:21.87#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.232.07:52:21.87#ibcon#[27=USB\r\n] 2006.232.07:52:21.87#ibcon#*before write, iclass 20, count 0 2006.232.07:52:21.87#ibcon#enter sib2, iclass 20, count 0 2006.232.07:52:21.87#ibcon#flushed, iclass 20, count 0 2006.232.07:52:21.87#ibcon#about to write, iclass 20, count 0 2006.232.07:52:21.87#ibcon#wrote, iclass 20, count 0 2006.232.07:52:21.87#ibcon#about to read 3, iclass 20, count 0 2006.232.07:52:21.90#ibcon#read 3, iclass 20, count 0 2006.232.07:52:21.90#ibcon#about to read 4, iclass 20, count 0 2006.232.07:52:21.90#ibcon#read 4, iclass 20, count 0 2006.232.07:52:21.90#ibcon#about to read 5, iclass 20, count 0 2006.232.07:52:21.90#ibcon#read 5, iclass 20, count 0 2006.232.07:52:21.90#ibcon#about to read 6, iclass 20, count 0 2006.232.07:52:21.90#ibcon#read 6, iclass 20, count 0 2006.232.07:52:21.90#ibcon#end of sib2, iclass 20, count 0 2006.232.07:52:21.90#ibcon#*after write, iclass 20, count 0 2006.232.07:52:21.90#ibcon#*before return 0, iclass 20, count 0 2006.232.07:52:21.90#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.232.07:52:21.90#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.232.07:52:21.90#ibcon#about to clear, iclass 20 cls_cnt 0 2006.232.07:52:21.90#ibcon#cleared, iclass 20 cls_cnt 0 2006.232.07:52:21.90$vc4f8/vblo=5,744.99 2006.232.07:52:21.90#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.232.07:52:21.90#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.232.07:52:21.90#ibcon#ireg 17 cls_cnt 0 2006.232.07:52:21.90#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.232.07:52:21.90#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.232.07:52:21.90#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.232.07:52:21.90#ibcon#enter wrdev, iclass 22, count 0 2006.232.07:52:21.90#ibcon#first serial, iclass 22, count 0 2006.232.07:52:21.90#ibcon#enter sib2, iclass 22, count 0 2006.232.07:52:21.90#ibcon#flushed, iclass 22, count 0 2006.232.07:52:21.90#ibcon#about to write, iclass 22, count 0 2006.232.07:52:21.90#ibcon#wrote, iclass 22, count 0 2006.232.07:52:21.90#ibcon#about to read 3, iclass 22, count 0 2006.232.07:52:21.92#ibcon#read 3, iclass 22, count 0 2006.232.07:52:21.92#ibcon#about to read 4, iclass 22, count 0 2006.232.07:52:21.92#ibcon#read 4, iclass 22, count 0 2006.232.07:52:21.92#ibcon#about to read 5, iclass 22, count 0 2006.232.07:52:21.92#ibcon#read 5, iclass 22, count 0 2006.232.07:52:21.92#ibcon#about to read 6, iclass 22, count 0 2006.232.07:52:21.92#ibcon#read 6, iclass 22, count 0 2006.232.07:52:21.92#ibcon#end of sib2, iclass 22, count 0 2006.232.07:52:21.92#ibcon#*mode == 0, iclass 22, count 0 2006.232.07:52:21.92#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.232.07:52:21.92#ibcon#[28=FRQ=05,744.99\r\n] 2006.232.07:52:21.92#ibcon#*before write, iclass 22, count 0 2006.232.07:52:21.92#ibcon#enter sib2, iclass 22, count 0 2006.232.07:52:21.92#ibcon#flushed, iclass 22, count 0 2006.232.07:52:21.92#ibcon#about to write, iclass 22, count 0 2006.232.07:52:21.92#ibcon#wrote, iclass 22, count 0 2006.232.07:52:21.92#ibcon#about to read 3, iclass 22, count 0 2006.232.07:52:21.96#ibcon#read 3, iclass 22, count 0 2006.232.07:52:21.96#ibcon#about to read 4, iclass 22, count 0 2006.232.07:52:21.96#ibcon#read 4, iclass 22, count 0 2006.232.07:52:21.96#ibcon#about to read 5, iclass 22, count 0 2006.232.07:52:21.96#ibcon#read 5, iclass 22, count 0 2006.232.07:52:21.96#ibcon#about to read 6, iclass 22, count 0 2006.232.07:52:21.96#ibcon#read 6, iclass 22, count 0 2006.232.07:52:21.96#ibcon#end of sib2, iclass 22, count 0 2006.232.07:52:21.96#ibcon#*after write, iclass 22, count 0 2006.232.07:52:21.96#ibcon#*before return 0, iclass 22, count 0 2006.232.07:52:21.96#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.232.07:52:21.96#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.232.07:52:21.96#ibcon#about to clear, iclass 22 cls_cnt 0 2006.232.07:52:21.96#ibcon#cleared, iclass 22 cls_cnt 0 2006.232.07:52:21.96$vc4f8/vb=5,3 2006.232.07:52:21.96#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.232.07:52:21.96#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.232.07:52:21.96#ibcon#ireg 11 cls_cnt 2 2006.232.07:52:21.96#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.232.07:52:22.02#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.232.07:52:22.02#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.232.07:52:22.02#ibcon#enter wrdev, iclass 24, count 2 2006.232.07:52:22.02#ibcon#first serial, iclass 24, count 2 2006.232.07:52:22.02#ibcon#enter sib2, iclass 24, count 2 2006.232.07:52:22.02#ibcon#flushed, iclass 24, count 2 2006.232.07:52:22.02#ibcon#about to write, iclass 24, count 2 2006.232.07:52:22.02#ibcon#wrote, iclass 24, count 2 2006.232.07:52:22.02#ibcon#about to read 3, iclass 24, count 2 2006.232.07:52:22.04#ibcon#read 3, iclass 24, count 2 2006.232.07:52:22.04#ibcon#about to read 4, iclass 24, count 2 2006.232.07:52:22.04#ibcon#read 4, iclass 24, count 2 2006.232.07:52:22.04#ibcon#about to read 5, iclass 24, count 2 2006.232.07:52:22.04#ibcon#read 5, iclass 24, count 2 2006.232.07:52:22.04#ibcon#about to read 6, iclass 24, count 2 2006.232.07:52:22.04#ibcon#read 6, iclass 24, count 2 2006.232.07:52:22.04#ibcon#end of sib2, iclass 24, count 2 2006.232.07:52:22.04#ibcon#*mode == 0, iclass 24, count 2 2006.232.07:52:22.04#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.232.07:52:22.04#ibcon#[27=AT05-03\r\n] 2006.232.07:52:22.04#ibcon#*before write, iclass 24, count 2 2006.232.07:52:22.04#ibcon#enter sib2, iclass 24, count 2 2006.232.07:52:22.04#ibcon#flushed, iclass 24, count 2 2006.232.07:52:22.04#ibcon#about to write, iclass 24, count 2 2006.232.07:52:22.04#ibcon#wrote, iclass 24, count 2 2006.232.07:52:22.04#ibcon#about to read 3, iclass 24, count 2 2006.232.07:52:22.07#ibcon#read 3, iclass 24, count 2 2006.232.07:52:22.07#ibcon#about to read 4, iclass 24, count 2 2006.232.07:52:22.07#ibcon#read 4, iclass 24, count 2 2006.232.07:52:22.07#ibcon#about to read 5, iclass 24, count 2 2006.232.07:52:22.07#ibcon#read 5, iclass 24, count 2 2006.232.07:52:22.07#ibcon#about to read 6, iclass 24, count 2 2006.232.07:52:22.07#ibcon#read 6, iclass 24, count 2 2006.232.07:52:22.07#ibcon#end of sib2, iclass 24, count 2 2006.232.07:52:22.07#ibcon#*after write, iclass 24, count 2 2006.232.07:52:22.07#ibcon#*before return 0, iclass 24, count 2 2006.232.07:52:22.07#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.232.07:52:22.07#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.232.07:52:22.07#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.232.07:52:22.07#ibcon#ireg 7 cls_cnt 0 2006.232.07:52:22.07#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.232.07:52:22.19#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.232.07:52:22.19#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.232.07:52:22.19#ibcon#enter wrdev, iclass 24, count 0 2006.232.07:52:22.19#ibcon#first serial, iclass 24, count 0 2006.232.07:52:22.19#ibcon#enter sib2, iclass 24, count 0 2006.232.07:52:22.19#ibcon#flushed, iclass 24, count 0 2006.232.07:52:22.19#ibcon#about to write, iclass 24, count 0 2006.232.07:52:22.19#ibcon#wrote, iclass 24, count 0 2006.232.07:52:22.19#ibcon#about to read 3, iclass 24, count 0 2006.232.07:52:22.21#ibcon#read 3, iclass 24, count 0 2006.232.07:52:22.21#ibcon#about to read 4, iclass 24, count 0 2006.232.07:52:22.21#ibcon#read 4, iclass 24, count 0 2006.232.07:52:22.21#ibcon#about to read 5, iclass 24, count 0 2006.232.07:52:22.21#ibcon#read 5, iclass 24, count 0 2006.232.07:52:22.21#ibcon#about to read 6, iclass 24, count 0 2006.232.07:52:22.21#ibcon#read 6, iclass 24, count 0 2006.232.07:52:22.21#ibcon#end of sib2, iclass 24, count 0 2006.232.07:52:22.21#ibcon#*mode == 0, iclass 24, count 0 2006.232.07:52:22.21#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.232.07:52:22.21#ibcon#[27=USB\r\n] 2006.232.07:52:22.21#ibcon#*before write, iclass 24, count 0 2006.232.07:52:22.21#ibcon#enter sib2, iclass 24, count 0 2006.232.07:52:22.21#ibcon#flushed, iclass 24, count 0 2006.232.07:52:22.21#ibcon#about to write, iclass 24, count 0 2006.232.07:52:22.21#ibcon#wrote, iclass 24, count 0 2006.232.07:52:22.21#ibcon#about to read 3, iclass 24, count 0 2006.232.07:52:22.24#ibcon#read 3, iclass 24, count 0 2006.232.07:52:22.24#ibcon#about to read 4, iclass 24, count 0 2006.232.07:52:22.24#ibcon#read 4, iclass 24, count 0 2006.232.07:52:22.24#ibcon#about to read 5, iclass 24, count 0 2006.232.07:52:22.24#ibcon#read 5, iclass 24, count 0 2006.232.07:52:22.24#ibcon#about to read 6, iclass 24, count 0 2006.232.07:52:22.24#ibcon#read 6, iclass 24, count 0 2006.232.07:52:22.24#ibcon#end of sib2, iclass 24, count 0 2006.232.07:52:22.24#ibcon#*after write, iclass 24, count 0 2006.232.07:52:22.24#ibcon#*before return 0, iclass 24, count 0 2006.232.07:52:22.24#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.232.07:52:22.24#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.232.07:52:22.24#ibcon#about to clear, iclass 24 cls_cnt 0 2006.232.07:52:22.24#ibcon#cleared, iclass 24 cls_cnt 0 2006.232.07:52:22.24$vc4f8/vblo=6,752.99 2006.232.07:52:22.24#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.232.07:52:22.24#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.232.07:52:22.24#ibcon#ireg 17 cls_cnt 0 2006.232.07:52:22.24#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.232.07:52:22.24#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.232.07:52:22.24#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.232.07:52:22.24#ibcon#enter wrdev, iclass 26, count 0 2006.232.07:52:22.24#ibcon#first serial, iclass 26, count 0 2006.232.07:52:22.24#ibcon#enter sib2, iclass 26, count 0 2006.232.07:52:22.24#ibcon#flushed, iclass 26, count 0 2006.232.07:52:22.24#ibcon#about to write, iclass 26, count 0 2006.232.07:52:22.24#ibcon#wrote, iclass 26, count 0 2006.232.07:52:22.24#ibcon#about to read 3, iclass 26, count 0 2006.232.07:52:22.26#ibcon#read 3, iclass 26, count 0 2006.232.07:52:22.26#ibcon#about to read 4, iclass 26, count 0 2006.232.07:52:22.26#ibcon#read 4, iclass 26, count 0 2006.232.07:52:22.26#ibcon#about to read 5, iclass 26, count 0 2006.232.07:52:22.26#ibcon#read 5, iclass 26, count 0 2006.232.07:52:22.26#ibcon#about to read 6, iclass 26, count 0 2006.232.07:52:22.26#ibcon#read 6, iclass 26, count 0 2006.232.07:52:22.26#ibcon#end of sib2, iclass 26, count 0 2006.232.07:52:22.26#ibcon#*mode == 0, iclass 26, count 0 2006.232.07:52:22.26#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.232.07:52:22.26#ibcon#[28=FRQ=06,752.99\r\n] 2006.232.07:52:22.26#ibcon#*before write, iclass 26, count 0 2006.232.07:52:22.26#ibcon#enter sib2, iclass 26, count 0 2006.232.07:52:22.26#ibcon#flushed, iclass 26, count 0 2006.232.07:52:22.26#ibcon#about to write, iclass 26, count 0 2006.232.07:52:22.26#ibcon#wrote, iclass 26, count 0 2006.232.07:52:22.26#ibcon#about to read 3, iclass 26, count 0 2006.232.07:52:22.30#ibcon#read 3, iclass 26, count 0 2006.232.07:52:22.30#ibcon#about to read 4, iclass 26, count 0 2006.232.07:52:22.30#ibcon#read 4, iclass 26, count 0 2006.232.07:52:22.30#ibcon#about to read 5, iclass 26, count 0 2006.232.07:52:22.30#ibcon#read 5, iclass 26, count 0 2006.232.07:52:22.30#ibcon#about to read 6, iclass 26, count 0 2006.232.07:52:22.30#ibcon#read 6, iclass 26, count 0 2006.232.07:52:22.30#ibcon#end of sib2, iclass 26, count 0 2006.232.07:52:22.30#ibcon#*after write, iclass 26, count 0 2006.232.07:52:22.30#ibcon#*before return 0, iclass 26, count 0 2006.232.07:52:22.30#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.232.07:52:22.30#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.232.07:52:22.30#ibcon#about to clear, iclass 26 cls_cnt 0 2006.232.07:52:22.30#ibcon#cleared, iclass 26 cls_cnt 0 2006.232.07:52:22.30$vc4f8/vb=6,4 2006.232.07:52:22.30#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.232.07:52:22.30#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.232.07:52:22.30#ibcon#ireg 11 cls_cnt 2 2006.232.07:52:22.30#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.232.07:52:22.36#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.232.07:52:22.36#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.232.07:52:22.36#ibcon#enter wrdev, iclass 28, count 2 2006.232.07:52:22.36#ibcon#first serial, iclass 28, count 2 2006.232.07:52:22.36#ibcon#enter sib2, iclass 28, count 2 2006.232.07:52:22.36#ibcon#flushed, iclass 28, count 2 2006.232.07:52:22.36#ibcon#about to write, iclass 28, count 2 2006.232.07:52:22.36#ibcon#wrote, iclass 28, count 2 2006.232.07:52:22.36#ibcon#about to read 3, iclass 28, count 2 2006.232.07:52:22.38#ibcon#read 3, iclass 28, count 2 2006.232.07:52:22.38#ibcon#about to read 4, iclass 28, count 2 2006.232.07:52:22.38#ibcon#read 4, iclass 28, count 2 2006.232.07:52:22.38#ibcon#about to read 5, iclass 28, count 2 2006.232.07:52:22.38#ibcon#read 5, iclass 28, count 2 2006.232.07:52:22.38#ibcon#about to read 6, iclass 28, count 2 2006.232.07:52:22.38#ibcon#read 6, iclass 28, count 2 2006.232.07:52:22.38#ibcon#end of sib2, iclass 28, count 2 2006.232.07:52:22.38#ibcon#*mode == 0, iclass 28, count 2 2006.232.07:52:22.38#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.232.07:52:22.38#ibcon#[27=AT06-04\r\n] 2006.232.07:52:22.38#ibcon#*before write, iclass 28, count 2 2006.232.07:52:22.38#ibcon#enter sib2, iclass 28, count 2 2006.232.07:52:22.38#ibcon#flushed, iclass 28, count 2 2006.232.07:52:22.38#ibcon#about to write, iclass 28, count 2 2006.232.07:52:22.38#ibcon#wrote, iclass 28, count 2 2006.232.07:52:22.38#ibcon#about to read 3, iclass 28, count 2 2006.232.07:52:22.41#ibcon#read 3, iclass 28, count 2 2006.232.07:52:22.41#ibcon#about to read 4, iclass 28, count 2 2006.232.07:52:22.41#ibcon#read 4, iclass 28, count 2 2006.232.07:52:22.41#ibcon#about to read 5, iclass 28, count 2 2006.232.07:52:22.41#ibcon#read 5, iclass 28, count 2 2006.232.07:52:22.41#ibcon#about to read 6, iclass 28, count 2 2006.232.07:52:22.41#ibcon#read 6, iclass 28, count 2 2006.232.07:52:22.41#ibcon#end of sib2, iclass 28, count 2 2006.232.07:52:22.41#ibcon#*after write, iclass 28, count 2 2006.232.07:52:22.41#ibcon#*before return 0, iclass 28, count 2 2006.232.07:52:22.41#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.232.07:52:22.41#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.232.07:52:22.41#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.232.07:52:22.41#ibcon#ireg 7 cls_cnt 0 2006.232.07:52:22.41#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.232.07:52:22.53#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.232.07:52:22.53#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.232.07:52:22.53#ibcon#enter wrdev, iclass 28, count 0 2006.232.07:52:22.53#ibcon#first serial, iclass 28, count 0 2006.232.07:52:22.53#ibcon#enter sib2, iclass 28, count 0 2006.232.07:52:22.53#ibcon#flushed, iclass 28, count 0 2006.232.07:52:22.53#ibcon#about to write, iclass 28, count 0 2006.232.07:52:22.53#ibcon#wrote, iclass 28, count 0 2006.232.07:52:22.53#ibcon#about to read 3, iclass 28, count 0 2006.232.07:52:22.55#ibcon#read 3, iclass 28, count 0 2006.232.07:52:22.55#ibcon#about to read 4, iclass 28, count 0 2006.232.07:52:22.55#ibcon#read 4, iclass 28, count 0 2006.232.07:52:22.55#ibcon#about to read 5, iclass 28, count 0 2006.232.07:52:22.55#ibcon#read 5, iclass 28, count 0 2006.232.07:52:22.55#ibcon#about to read 6, iclass 28, count 0 2006.232.07:52:22.55#ibcon#read 6, iclass 28, count 0 2006.232.07:52:22.55#ibcon#end of sib2, iclass 28, count 0 2006.232.07:52:22.55#ibcon#*mode == 0, iclass 28, count 0 2006.232.07:52:22.55#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.232.07:52:22.55#ibcon#[27=USB\r\n] 2006.232.07:52:22.55#ibcon#*before write, iclass 28, count 0 2006.232.07:52:22.55#ibcon#enter sib2, iclass 28, count 0 2006.232.07:52:22.55#ibcon#flushed, iclass 28, count 0 2006.232.07:52:22.55#ibcon#about to write, iclass 28, count 0 2006.232.07:52:22.55#ibcon#wrote, iclass 28, count 0 2006.232.07:52:22.55#ibcon#about to read 3, iclass 28, count 0 2006.232.07:52:22.58#ibcon#read 3, iclass 28, count 0 2006.232.07:52:22.58#ibcon#about to read 4, iclass 28, count 0 2006.232.07:52:22.58#ibcon#read 4, iclass 28, count 0 2006.232.07:52:22.58#ibcon#about to read 5, iclass 28, count 0 2006.232.07:52:22.58#ibcon#read 5, iclass 28, count 0 2006.232.07:52:22.58#ibcon#about to read 6, iclass 28, count 0 2006.232.07:52:22.58#ibcon#read 6, iclass 28, count 0 2006.232.07:52:22.58#ibcon#end of sib2, iclass 28, count 0 2006.232.07:52:22.58#ibcon#*after write, iclass 28, count 0 2006.232.07:52:22.58#ibcon#*before return 0, iclass 28, count 0 2006.232.07:52:22.58#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.232.07:52:22.58#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.232.07:52:22.58#ibcon#about to clear, iclass 28 cls_cnt 0 2006.232.07:52:22.58#ibcon#cleared, iclass 28 cls_cnt 0 2006.232.07:52:22.58$vc4f8/vabw=wide 2006.232.07:52:22.58#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.232.07:52:22.58#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.232.07:52:22.58#ibcon#ireg 8 cls_cnt 0 2006.232.07:52:22.58#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.232.07:52:22.58#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.232.07:52:22.58#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.232.07:52:22.58#ibcon#enter wrdev, iclass 30, count 0 2006.232.07:52:22.58#ibcon#first serial, iclass 30, count 0 2006.232.07:52:22.58#ibcon#enter sib2, iclass 30, count 0 2006.232.07:52:22.58#ibcon#flushed, iclass 30, count 0 2006.232.07:52:22.58#ibcon#about to write, iclass 30, count 0 2006.232.07:52:22.58#ibcon#wrote, iclass 30, count 0 2006.232.07:52:22.58#ibcon#about to read 3, iclass 30, count 0 2006.232.07:52:22.60#ibcon#read 3, iclass 30, count 0 2006.232.07:52:22.60#ibcon#about to read 4, iclass 30, count 0 2006.232.07:52:22.60#ibcon#read 4, iclass 30, count 0 2006.232.07:52:22.60#ibcon#about to read 5, iclass 30, count 0 2006.232.07:52:22.60#ibcon#read 5, iclass 30, count 0 2006.232.07:52:22.60#ibcon#about to read 6, iclass 30, count 0 2006.232.07:52:22.60#ibcon#read 6, iclass 30, count 0 2006.232.07:52:22.60#ibcon#end of sib2, iclass 30, count 0 2006.232.07:52:22.60#ibcon#*mode == 0, iclass 30, count 0 2006.232.07:52:22.60#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.232.07:52:22.60#ibcon#[25=BW32\r\n] 2006.232.07:52:22.60#ibcon#*before write, iclass 30, count 0 2006.232.07:52:22.60#ibcon#enter sib2, iclass 30, count 0 2006.232.07:52:22.60#ibcon#flushed, iclass 30, count 0 2006.232.07:52:22.60#ibcon#about to write, iclass 30, count 0 2006.232.07:52:22.60#ibcon#wrote, iclass 30, count 0 2006.232.07:52:22.60#ibcon#about to read 3, iclass 30, count 0 2006.232.07:52:22.63#ibcon#read 3, iclass 30, count 0 2006.232.07:52:22.63#ibcon#about to read 4, iclass 30, count 0 2006.232.07:52:22.63#ibcon#read 4, iclass 30, count 0 2006.232.07:52:22.63#ibcon#about to read 5, iclass 30, count 0 2006.232.07:52:22.63#ibcon#read 5, iclass 30, count 0 2006.232.07:52:22.63#ibcon#about to read 6, iclass 30, count 0 2006.232.07:52:22.63#ibcon#read 6, iclass 30, count 0 2006.232.07:52:22.63#ibcon#end of sib2, iclass 30, count 0 2006.232.07:52:22.63#ibcon#*after write, iclass 30, count 0 2006.232.07:52:22.63#ibcon#*before return 0, iclass 30, count 0 2006.232.07:52:22.63#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.232.07:52:22.63#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.232.07:52:22.63#ibcon#about to clear, iclass 30 cls_cnt 0 2006.232.07:52:22.63#ibcon#cleared, iclass 30 cls_cnt 0 2006.232.07:52:22.63$vc4f8/vbbw=wide 2006.232.07:52:22.63#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.232.07:52:22.63#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.232.07:52:22.63#ibcon#ireg 8 cls_cnt 0 2006.232.07:52:22.63#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:52:22.70#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:52:22.70#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:52:22.70#ibcon#enter wrdev, iclass 32, count 0 2006.232.07:52:22.70#ibcon#first serial, iclass 32, count 0 2006.232.07:52:22.70#ibcon#enter sib2, iclass 32, count 0 2006.232.07:52:22.70#ibcon#flushed, iclass 32, count 0 2006.232.07:52:22.70#ibcon#about to write, iclass 32, count 0 2006.232.07:52:22.70#ibcon#wrote, iclass 32, count 0 2006.232.07:52:22.70#ibcon#about to read 3, iclass 32, count 0 2006.232.07:52:22.72#ibcon#read 3, iclass 32, count 0 2006.232.07:52:22.72#ibcon#about to read 4, iclass 32, count 0 2006.232.07:52:22.72#ibcon#read 4, iclass 32, count 0 2006.232.07:52:22.72#ibcon#about to read 5, iclass 32, count 0 2006.232.07:52:22.72#ibcon#read 5, iclass 32, count 0 2006.232.07:52:22.72#ibcon#about to read 6, iclass 32, count 0 2006.232.07:52:22.72#ibcon#read 6, iclass 32, count 0 2006.232.07:52:22.72#ibcon#end of sib2, iclass 32, count 0 2006.232.07:52:22.72#ibcon#*mode == 0, iclass 32, count 0 2006.232.07:52:22.72#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.232.07:52:22.72#ibcon#[27=BW32\r\n] 2006.232.07:52:22.72#ibcon#*before write, iclass 32, count 0 2006.232.07:52:22.72#ibcon#enter sib2, iclass 32, count 0 2006.232.07:52:22.72#ibcon#flushed, iclass 32, count 0 2006.232.07:52:22.72#ibcon#about to write, iclass 32, count 0 2006.232.07:52:22.72#ibcon#wrote, iclass 32, count 0 2006.232.07:52:22.72#ibcon#about to read 3, iclass 32, count 0 2006.232.07:52:22.75#ibcon#read 3, iclass 32, count 0 2006.232.07:52:22.75#ibcon#about to read 4, iclass 32, count 0 2006.232.07:52:22.75#ibcon#read 4, iclass 32, count 0 2006.232.07:52:22.75#ibcon#about to read 5, iclass 32, count 0 2006.232.07:52:22.75#ibcon#read 5, iclass 32, count 0 2006.232.07:52:22.75#ibcon#about to read 6, iclass 32, count 0 2006.232.07:52:22.75#ibcon#read 6, iclass 32, count 0 2006.232.07:52:22.75#ibcon#end of sib2, iclass 32, count 0 2006.232.07:52:22.75#ibcon#*after write, iclass 32, count 0 2006.232.07:52:22.75#ibcon#*before return 0, iclass 32, count 0 2006.232.07:52:22.75#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:52:22.75#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:52:22.75#ibcon#about to clear, iclass 32 cls_cnt 0 2006.232.07:52:22.75#ibcon#cleared, iclass 32 cls_cnt 0 2006.232.07:52:22.75$4f8m12a/ifd4f 2006.232.07:52:22.75$ifd4f/lo= 2006.232.07:52:22.75$ifd4f/lo=lo1,7680.00,usb,rcp,1 2006.232.07:52:22.75$ifd4f/lo=lo2,1600.00,usb,rcp,1 2006.232.07:52:22.75$ifd4f/lo=lo3,8080.00,usb,rcp,1 2006.232.07:52:22.75$ifd4f/patch= 2006.232.07:52:22.75$ifd4f/patch=lo1,a1,a2,a3,a4 2006.232.07:52:22.75$ifd4f/patch=lo2,b1,b2,b3,b4,b5,b6 2006.232.07:52:22.75$ifd4f/patch=lo3,a5,a6,a7,a8 2006.232.07:52:22.75$4f8m12a/"form=m,16.000,1:2 2006.232.07:52:22.75$4f8m12a/"tpicd 2006.232.07:52:22.75$4f8m12a/echo=off 2006.232.07:52:22.75$4f8m12a/xlog=off 2006.232.07:52:22.75:!2006.232.07:52:50 2006.232.07:52:30.14#trakl#Source acquired 2006.232.07:52:32.14#flagr#flagr/antenna,acquired 2006.232.07:52:50.00:preob 2006.232.07:52:51.14/onsource/TRACKING 2006.232.07:52:51.14:!2006.232.07:53:00 2006.232.07:53:00.00:data_valid=on 2006.232.07:53:00.00:midob 2006.232.07:53:00.14/onsource/TRACKING 2006.232.07:53:00.14/wx/29.43,1007.3,86 2006.232.07:53:00.23/cable/+6.3863E-03 2006.232.07:53:01.32/va/01,08,usb,yes,30,32 2006.232.07:53:01.32/va/02,07,usb,yes,30,32 2006.232.07:53:01.32/va/03,08,usb,yes,23,23 2006.232.07:53:01.32/va/04,07,usb,yes,31,34 2006.232.07:53:01.32/va/05,07,usb,yes,35,37 2006.232.07:53:01.32/va/06,06,usb,yes,35,35 2006.232.07:53:01.32/va/07,06,usb,yes,36,35 2006.232.07:53:01.32/va/08,06,usb,yes,38,37 2006.232.07:53:01.55/valo/01,532.99,yes,locked 2006.232.07:53:01.55/valo/02,572.99,yes,locked 2006.232.07:53:01.55/valo/03,672.99,yes,locked 2006.232.07:53:01.55/valo/04,832.99,yes,locked 2006.232.07:53:01.55/valo/05,652.99,yes,locked 2006.232.07:53:01.55/valo/06,772.99,yes,locked 2006.232.07:53:01.55/valo/07,832.99,yes,locked 2006.232.07:53:01.55/valo/08,852.99,yes,locked 2006.232.07:53:02.64/vb/01,04,usb,yes,30,29 2006.232.07:53:02.64/vb/02,04,usb,yes,32,33 2006.232.07:53:02.64/vb/03,04,usb,yes,28,32 2006.232.07:53:02.64/vb/04,04,usb,yes,29,29 2006.232.07:53:02.64/vb/05,03,usb,yes,34,39 2006.232.07:53:02.64/vb/06,04,usb,yes,28,31 2006.232.07:53:02.64/vb/07,04,usb,yes,31,30 2006.232.07:53:02.64/vb/08,04,usb,yes,28,31 2006.232.07:53:02.88/vblo/01,632.99,yes,locked 2006.232.07:53:02.88/vblo/02,640.99,yes,locked 2006.232.07:53:02.88/vblo/03,656.99,yes,locked 2006.232.07:53:02.88/vblo/04,712.99,yes,locked 2006.232.07:53:02.88/vblo/05,744.99,yes,locked 2006.232.07:53:02.88/vblo/06,752.99,yes,locked 2006.232.07:53:02.88/vblo/07,734.99,yes,locked 2006.232.07:53:02.88/vblo/08,744.99,yes,locked 2006.232.07:53:03.03/vabw/8 2006.232.07:53:03.18/vbbw/8 2006.232.07:53:03.28/xfe/off,on,12.7 2006.232.07:53:03.66/ifatt/23,28,28,28 2006.232.07:53:04.07/fmout-gps/S +4.47E-07 2006.232.07:53:04.11:!2006.232.07:54:00 2006.232.07:54:00.00:data_valid=off 2006.232.07:54:00.00:postob 2006.232.07:54:00.13/cable/+6.3873E-03 2006.232.07:54:00.13/wx/29.43,1007.2,86 2006.232.07:54:01.07/fmout-gps/S +4.47E-07 2006.232.07:54:01.07:scan_name=232-0755,k06232,60 2006.232.07:54:01.08:source=oq208,140700.39,282714.7,2000.0,ccw 2006.232.07:54:01.14#flagr#flagr/antenna,new-source 2006.232.07:54:02.14:checkk5 2006.232.07:54:02.51/chk_autoobs//k5ts1/ autoobs is running! 2006.232.07:54:02.95/chk_autoobs//k5ts2/ autoobs is running! 2006.232.07:54:03.33/chk_autoobs//k5ts3/ autoobs is running! 2006.232.07:54:03.70/chk_autoobs//k5ts4/ autoobs is running! 2006.232.07:54:04.06/chk_obsdata//k5ts1/T2320753??a.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:54:04.43/chk_obsdata//k5ts2/T2320753??b.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:54:04.80/chk_obsdata//k5ts3/T2320753??c.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:54:05.16/chk_obsdata//k5ts4/T2320753??d.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:54:05.85/k5log//k5ts1_log_newline 2006.232.07:54:06.54/k5log//k5ts2_log_newline 2006.232.07:54:07.23/k5log//k5ts3_log_newline 2006.232.07:54:07.92/k5log//k5ts4_log_newline 2006.232.07:54:07.95/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.232.07:54:07.95:4f8m12a=2 2006.232.07:54:07.95$4f8m12a/echo=on 2006.232.07:54:07.95$4f8m12a/pcalon 2006.232.07:54:07.95$pcalon/"no phase cal control is implemented here 2006.232.07:54:07.95$4f8m12a/"tpicd=stop 2006.232.07:54:07.95$4f8m12a/vc4f8 2006.232.07:54:07.95$vc4f8/valo=1,532.99 2006.232.07:54:07.95#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.232.07:54:07.95#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.232.07:54:07.95#ibcon#ireg 17 cls_cnt 0 2006.232.07:54:07.95#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.232.07:54:07.95#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.232.07:54:07.95#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.232.07:54:07.95#ibcon#enter wrdev, iclass 39, count 0 2006.232.07:54:07.95#ibcon#first serial, iclass 39, count 0 2006.232.07:54:07.95#ibcon#enter sib2, iclass 39, count 0 2006.232.07:54:07.95#ibcon#flushed, iclass 39, count 0 2006.232.07:54:07.95#ibcon#about to write, iclass 39, count 0 2006.232.07:54:07.95#ibcon#wrote, iclass 39, count 0 2006.232.07:54:07.95#ibcon#about to read 3, iclass 39, count 0 2006.232.07:54:07.99#ibcon#read 3, iclass 39, count 0 2006.232.07:54:07.99#ibcon#about to read 4, iclass 39, count 0 2006.232.07:54:07.99#ibcon#read 4, iclass 39, count 0 2006.232.07:54:07.99#ibcon#about to read 5, iclass 39, count 0 2006.232.07:54:07.99#ibcon#read 5, iclass 39, count 0 2006.232.07:54:07.99#ibcon#about to read 6, iclass 39, count 0 2006.232.07:54:07.99#ibcon#read 6, iclass 39, count 0 2006.232.07:54:07.99#ibcon#end of sib2, iclass 39, count 0 2006.232.07:54:07.99#ibcon#*mode == 0, iclass 39, count 0 2006.232.07:54:07.99#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.232.07:54:07.99#ibcon#[26=FRQ=01,532.99\r\n] 2006.232.07:54:07.99#ibcon#*before write, iclass 39, count 0 2006.232.07:54:07.99#ibcon#enter sib2, iclass 39, count 0 2006.232.07:54:07.99#ibcon#flushed, iclass 39, count 0 2006.232.07:54:07.99#ibcon#about to write, iclass 39, count 0 2006.232.07:54:07.99#ibcon#wrote, iclass 39, count 0 2006.232.07:54:07.99#ibcon#about to read 3, iclass 39, count 0 2006.232.07:54:08.03#ibcon#read 3, iclass 39, count 0 2006.232.07:54:08.03#ibcon#about to read 4, iclass 39, count 0 2006.232.07:54:08.03#ibcon#read 4, iclass 39, count 0 2006.232.07:54:08.03#ibcon#about to read 5, iclass 39, count 0 2006.232.07:54:08.03#ibcon#read 5, iclass 39, count 0 2006.232.07:54:08.03#ibcon#about to read 6, iclass 39, count 0 2006.232.07:54:08.03#ibcon#read 6, iclass 39, count 0 2006.232.07:54:08.03#ibcon#end of sib2, iclass 39, count 0 2006.232.07:54:08.03#ibcon#*after write, iclass 39, count 0 2006.232.07:54:08.03#ibcon#*before return 0, iclass 39, count 0 2006.232.07:54:08.03#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.232.07:54:08.03#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.232.07:54:08.03#ibcon#about to clear, iclass 39 cls_cnt 0 2006.232.07:54:08.03#ibcon#cleared, iclass 39 cls_cnt 0 2006.232.07:54:08.03$vc4f8/va=1,8 2006.232.07:54:08.03#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.232.07:54:08.03#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.232.07:54:08.03#ibcon#ireg 11 cls_cnt 2 2006.232.07:54:08.03#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.232.07:54:08.03#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.232.07:54:08.03#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.232.07:54:08.03#ibcon#enter wrdev, iclass 3, count 2 2006.232.07:54:08.03#ibcon#first serial, iclass 3, count 2 2006.232.07:54:08.03#ibcon#enter sib2, iclass 3, count 2 2006.232.07:54:08.03#ibcon#flushed, iclass 3, count 2 2006.232.07:54:08.03#ibcon#about to write, iclass 3, count 2 2006.232.07:54:08.03#ibcon#wrote, iclass 3, count 2 2006.232.07:54:08.03#ibcon#about to read 3, iclass 3, count 2 2006.232.07:54:08.05#ibcon#read 3, iclass 3, count 2 2006.232.07:54:08.05#ibcon#about to read 4, iclass 3, count 2 2006.232.07:54:08.05#ibcon#read 4, iclass 3, count 2 2006.232.07:54:08.05#ibcon#about to read 5, iclass 3, count 2 2006.232.07:54:08.05#ibcon#read 5, iclass 3, count 2 2006.232.07:54:08.05#ibcon#about to read 6, iclass 3, count 2 2006.232.07:54:08.05#ibcon#read 6, iclass 3, count 2 2006.232.07:54:08.05#ibcon#end of sib2, iclass 3, count 2 2006.232.07:54:08.05#ibcon#*mode == 0, iclass 3, count 2 2006.232.07:54:08.05#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.232.07:54:08.05#ibcon#[25=AT01-08\r\n] 2006.232.07:54:08.05#ibcon#*before write, iclass 3, count 2 2006.232.07:54:08.05#ibcon#enter sib2, iclass 3, count 2 2006.232.07:54:08.05#ibcon#flushed, iclass 3, count 2 2006.232.07:54:08.05#ibcon#about to write, iclass 3, count 2 2006.232.07:54:08.05#ibcon#wrote, iclass 3, count 2 2006.232.07:54:08.05#ibcon#about to read 3, iclass 3, count 2 2006.232.07:54:08.08#ibcon#read 3, iclass 3, count 2 2006.232.07:54:08.08#ibcon#about to read 4, iclass 3, count 2 2006.232.07:54:08.08#ibcon#read 4, iclass 3, count 2 2006.232.07:54:08.08#ibcon#about to read 5, iclass 3, count 2 2006.232.07:54:08.08#ibcon#read 5, iclass 3, count 2 2006.232.07:54:08.08#ibcon#about to read 6, iclass 3, count 2 2006.232.07:54:08.08#ibcon#read 6, iclass 3, count 2 2006.232.07:54:08.08#ibcon#end of sib2, iclass 3, count 2 2006.232.07:54:08.08#ibcon#*after write, iclass 3, count 2 2006.232.07:54:08.08#ibcon#*before return 0, iclass 3, count 2 2006.232.07:54:08.08#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.232.07:54:08.08#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.232.07:54:08.08#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.232.07:54:08.08#ibcon#ireg 7 cls_cnt 0 2006.232.07:54:08.08#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.232.07:54:08.20#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.232.07:54:08.20#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.232.07:54:08.20#ibcon#enter wrdev, iclass 3, count 0 2006.232.07:54:08.20#ibcon#first serial, iclass 3, count 0 2006.232.07:54:08.20#ibcon#enter sib2, iclass 3, count 0 2006.232.07:54:08.20#ibcon#flushed, iclass 3, count 0 2006.232.07:54:08.20#ibcon#about to write, iclass 3, count 0 2006.232.07:54:08.20#ibcon#wrote, iclass 3, count 0 2006.232.07:54:08.20#ibcon#about to read 3, iclass 3, count 0 2006.232.07:54:08.22#ibcon#read 3, iclass 3, count 0 2006.232.07:54:08.22#ibcon#about to read 4, iclass 3, count 0 2006.232.07:54:08.22#ibcon#read 4, iclass 3, count 0 2006.232.07:54:08.22#ibcon#about to read 5, iclass 3, count 0 2006.232.07:54:08.22#ibcon#read 5, iclass 3, count 0 2006.232.07:54:08.22#ibcon#about to read 6, iclass 3, count 0 2006.232.07:54:08.22#ibcon#read 6, iclass 3, count 0 2006.232.07:54:08.22#ibcon#end of sib2, iclass 3, count 0 2006.232.07:54:08.22#ibcon#*mode == 0, iclass 3, count 0 2006.232.07:54:08.22#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.232.07:54:08.22#ibcon#[25=USB\r\n] 2006.232.07:54:08.22#ibcon#*before write, iclass 3, count 0 2006.232.07:54:08.22#ibcon#enter sib2, iclass 3, count 0 2006.232.07:54:08.22#ibcon#flushed, iclass 3, count 0 2006.232.07:54:08.22#ibcon#about to write, iclass 3, count 0 2006.232.07:54:08.22#ibcon#wrote, iclass 3, count 0 2006.232.07:54:08.22#ibcon#about to read 3, iclass 3, count 0 2006.232.07:54:08.25#ibcon#read 3, iclass 3, count 0 2006.232.07:54:08.25#ibcon#about to read 4, iclass 3, count 0 2006.232.07:54:08.25#ibcon#read 4, iclass 3, count 0 2006.232.07:54:08.25#ibcon#about to read 5, iclass 3, count 0 2006.232.07:54:08.25#ibcon#read 5, iclass 3, count 0 2006.232.07:54:08.25#ibcon#about to read 6, iclass 3, count 0 2006.232.07:54:08.25#ibcon#read 6, iclass 3, count 0 2006.232.07:54:08.25#ibcon#end of sib2, iclass 3, count 0 2006.232.07:54:08.25#ibcon#*after write, iclass 3, count 0 2006.232.07:54:08.25#ibcon#*before return 0, iclass 3, count 0 2006.232.07:54:08.25#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.232.07:54:08.25#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.232.07:54:08.25#ibcon#about to clear, iclass 3 cls_cnt 0 2006.232.07:54:08.25#ibcon#cleared, iclass 3 cls_cnt 0 2006.232.07:54:08.25$vc4f8/valo=2,572.99 2006.232.07:54:08.25#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.232.07:54:08.25#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.232.07:54:08.25#ibcon#ireg 17 cls_cnt 0 2006.232.07:54:08.25#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.232.07:54:08.25#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.232.07:54:08.25#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.232.07:54:08.25#ibcon#enter wrdev, iclass 5, count 0 2006.232.07:54:08.25#ibcon#first serial, iclass 5, count 0 2006.232.07:54:08.25#ibcon#enter sib2, iclass 5, count 0 2006.232.07:54:08.25#ibcon#flushed, iclass 5, count 0 2006.232.07:54:08.25#ibcon#about to write, iclass 5, count 0 2006.232.07:54:08.25#ibcon#wrote, iclass 5, count 0 2006.232.07:54:08.25#ibcon#about to read 3, iclass 5, count 0 2006.232.07:54:08.27#ibcon#read 3, iclass 5, count 0 2006.232.07:54:08.27#ibcon#about to read 4, iclass 5, count 0 2006.232.07:54:08.27#ibcon#read 4, iclass 5, count 0 2006.232.07:54:08.27#ibcon#about to read 5, iclass 5, count 0 2006.232.07:54:08.27#ibcon#read 5, iclass 5, count 0 2006.232.07:54:08.27#ibcon#about to read 6, iclass 5, count 0 2006.232.07:54:08.27#ibcon#read 6, iclass 5, count 0 2006.232.07:54:08.27#ibcon#end of sib2, iclass 5, count 0 2006.232.07:54:08.27#ibcon#*mode == 0, iclass 5, count 0 2006.232.07:54:08.27#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.232.07:54:08.27#ibcon#[26=FRQ=02,572.99\r\n] 2006.232.07:54:08.27#ibcon#*before write, iclass 5, count 0 2006.232.07:54:08.27#ibcon#enter sib2, iclass 5, count 0 2006.232.07:54:08.27#ibcon#flushed, iclass 5, count 0 2006.232.07:54:08.27#ibcon#about to write, iclass 5, count 0 2006.232.07:54:08.27#ibcon#wrote, iclass 5, count 0 2006.232.07:54:08.27#ibcon#about to read 3, iclass 5, count 0 2006.232.07:54:08.31#ibcon#read 3, iclass 5, count 0 2006.232.07:54:08.31#ibcon#about to read 4, iclass 5, count 0 2006.232.07:54:08.31#ibcon#read 4, iclass 5, count 0 2006.232.07:54:08.31#ibcon#about to read 5, iclass 5, count 0 2006.232.07:54:08.31#ibcon#read 5, iclass 5, count 0 2006.232.07:54:08.31#ibcon#about to read 6, iclass 5, count 0 2006.232.07:54:08.31#ibcon#read 6, iclass 5, count 0 2006.232.07:54:08.31#ibcon#end of sib2, iclass 5, count 0 2006.232.07:54:08.31#ibcon#*after write, iclass 5, count 0 2006.232.07:54:08.31#ibcon#*before return 0, iclass 5, count 0 2006.232.07:54:08.31#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.232.07:54:08.31#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.232.07:54:08.31#ibcon#about to clear, iclass 5 cls_cnt 0 2006.232.07:54:08.31#ibcon#cleared, iclass 5 cls_cnt 0 2006.232.07:54:08.31$vc4f8/va=2,7 2006.232.07:54:08.31#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.232.07:54:08.31#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.232.07:54:08.31#ibcon#ireg 11 cls_cnt 2 2006.232.07:54:08.31#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.232.07:54:08.37#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.232.07:54:08.37#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.232.07:54:08.37#ibcon#enter wrdev, iclass 7, count 2 2006.232.07:54:08.37#ibcon#first serial, iclass 7, count 2 2006.232.07:54:08.37#ibcon#enter sib2, iclass 7, count 2 2006.232.07:54:08.37#ibcon#flushed, iclass 7, count 2 2006.232.07:54:08.37#ibcon#about to write, iclass 7, count 2 2006.232.07:54:08.37#ibcon#wrote, iclass 7, count 2 2006.232.07:54:08.37#ibcon#about to read 3, iclass 7, count 2 2006.232.07:54:08.39#ibcon#read 3, iclass 7, count 2 2006.232.07:54:08.39#ibcon#about to read 4, iclass 7, count 2 2006.232.07:54:08.39#ibcon#read 4, iclass 7, count 2 2006.232.07:54:08.39#ibcon#about to read 5, iclass 7, count 2 2006.232.07:54:08.39#ibcon#read 5, iclass 7, count 2 2006.232.07:54:08.39#ibcon#about to read 6, iclass 7, count 2 2006.232.07:54:08.39#ibcon#read 6, iclass 7, count 2 2006.232.07:54:08.39#ibcon#end of sib2, iclass 7, count 2 2006.232.07:54:08.39#ibcon#*mode == 0, iclass 7, count 2 2006.232.07:54:08.39#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.232.07:54:08.39#ibcon#[25=AT02-07\r\n] 2006.232.07:54:08.39#ibcon#*before write, iclass 7, count 2 2006.232.07:54:08.39#ibcon#enter sib2, iclass 7, count 2 2006.232.07:54:08.39#ibcon#flushed, iclass 7, count 2 2006.232.07:54:08.39#ibcon#about to write, iclass 7, count 2 2006.232.07:54:08.39#ibcon#wrote, iclass 7, count 2 2006.232.07:54:08.39#ibcon#about to read 3, iclass 7, count 2 2006.232.07:54:08.42#ibcon#read 3, iclass 7, count 2 2006.232.07:54:08.42#ibcon#about to read 4, iclass 7, count 2 2006.232.07:54:08.42#ibcon#read 4, iclass 7, count 2 2006.232.07:54:08.42#ibcon#about to read 5, iclass 7, count 2 2006.232.07:54:08.42#ibcon#read 5, iclass 7, count 2 2006.232.07:54:08.42#ibcon#about to read 6, iclass 7, count 2 2006.232.07:54:08.42#ibcon#read 6, iclass 7, count 2 2006.232.07:54:08.42#ibcon#end of sib2, iclass 7, count 2 2006.232.07:54:08.42#ibcon#*after write, iclass 7, count 2 2006.232.07:54:08.42#ibcon#*before return 0, iclass 7, count 2 2006.232.07:54:08.42#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.232.07:54:08.42#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.232.07:54:08.42#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.232.07:54:08.42#ibcon#ireg 7 cls_cnt 0 2006.232.07:54:08.42#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.232.07:54:08.54#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.232.07:54:08.54#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.232.07:54:08.54#ibcon#enter wrdev, iclass 7, count 0 2006.232.07:54:08.54#ibcon#first serial, iclass 7, count 0 2006.232.07:54:08.54#ibcon#enter sib2, iclass 7, count 0 2006.232.07:54:08.54#ibcon#flushed, iclass 7, count 0 2006.232.07:54:08.54#ibcon#about to write, iclass 7, count 0 2006.232.07:54:08.54#ibcon#wrote, iclass 7, count 0 2006.232.07:54:08.54#ibcon#about to read 3, iclass 7, count 0 2006.232.07:54:08.56#ibcon#read 3, iclass 7, count 0 2006.232.07:54:08.56#ibcon#about to read 4, iclass 7, count 0 2006.232.07:54:08.56#ibcon#read 4, iclass 7, count 0 2006.232.07:54:08.56#ibcon#about to read 5, iclass 7, count 0 2006.232.07:54:08.56#ibcon#read 5, iclass 7, count 0 2006.232.07:54:08.56#ibcon#about to read 6, iclass 7, count 0 2006.232.07:54:08.56#ibcon#read 6, iclass 7, count 0 2006.232.07:54:08.56#ibcon#end of sib2, iclass 7, count 0 2006.232.07:54:08.56#ibcon#*mode == 0, iclass 7, count 0 2006.232.07:54:08.56#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.232.07:54:08.56#ibcon#[25=USB\r\n] 2006.232.07:54:08.56#ibcon#*before write, iclass 7, count 0 2006.232.07:54:08.56#ibcon#enter sib2, iclass 7, count 0 2006.232.07:54:08.56#ibcon#flushed, iclass 7, count 0 2006.232.07:54:08.56#ibcon#about to write, iclass 7, count 0 2006.232.07:54:08.56#ibcon#wrote, iclass 7, count 0 2006.232.07:54:08.56#ibcon#about to read 3, iclass 7, count 0 2006.232.07:54:08.59#ibcon#read 3, iclass 7, count 0 2006.232.07:54:08.59#ibcon#about to read 4, iclass 7, count 0 2006.232.07:54:08.59#ibcon#read 4, iclass 7, count 0 2006.232.07:54:08.59#ibcon#about to read 5, iclass 7, count 0 2006.232.07:54:08.59#ibcon#read 5, iclass 7, count 0 2006.232.07:54:08.59#ibcon#about to read 6, iclass 7, count 0 2006.232.07:54:08.59#ibcon#read 6, iclass 7, count 0 2006.232.07:54:08.59#ibcon#end of sib2, iclass 7, count 0 2006.232.07:54:08.59#ibcon#*after write, iclass 7, count 0 2006.232.07:54:08.59#ibcon#*before return 0, iclass 7, count 0 2006.232.07:54:08.59#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.232.07:54:08.59#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.232.07:54:08.59#ibcon#about to clear, iclass 7 cls_cnt 0 2006.232.07:54:08.59#ibcon#cleared, iclass 7 cls_cnt 0 2006.232.07:54:08.59$vc4f8/valo=3,672.99 2006.232.07:54:08.59#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.232.07:54:08.59#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.232.07:54:08.59#ibcon#ireg 17 cls_cnt 0 2006.232.07:54:08.59#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.232.07:54:08.59#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.232.07:54:08.59#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.232.07:54:08.59#ibcon#enter wrdev, iclass 11, count 0 2006.232.07:54:08.59#ibcon#first serial, iclass 11, count 0 2006.232.07:54:08.59#ibcon#enter sib2, iclass 11, count 0 2006.232.07:54:08.59#ibcon#flushed, iclass 11, count 0 2006.232.07:54:08.59#ibcon#about to write, iclass 11, count 0 2006.232.07:54:08.59#ibcon#wrote, iclass 11, count 0 2006.232.07:54:08.59#ibcon#about to read 3, iclass 11, count 0 2006.232.07:54:08.61#ibcon#read 3, iclass 11, count 0 2006.232.07:54:08.61#ibcon#about to read 4, iclass 11, count 0 2006.232.07:54:08.61#ibcon#read 4, iclass 11, count 0 2006.232.07:54:08.61#ibcon#about to read 5, iclass 11, count 0 2006.232.07:54:08.61#ibcon#read 5, iclass 11, count 0 2006.232.07:54:08.61#ibcon#about to read 6, iclass 11, count 0 2006.232.07:54:08.61#ibcon#read 6, iclass 11, count 0 2006.232.07:54:08.61#ibcon#end of sib2, iclass 11, count 0 2006.232.07:54:08.61#ibcon#*mode == 0, iclass 11, count 0 2006.232.07:54:08.61#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.232.07:54:08.61#ibcon#[26=FRQ=03,672.99\r\n] 2006.232.07:54:08.61#ibcon#*before write, iclass 11, count 0 2006.232.07:54:08.61#ibcon#enter sib2, iclass 11, count 0 2006.232.07:54:08.61#ibcon#flushed, iclass 11, count 0 2006.232.07:54:08.61#ibcon#about to write, iclass 11, count 0 2006.232.07:54:08.61#ibcon#wrote, iclass 11, count 0 2006.232.07:54:08.61#ibcon#about to read 3, iclass 11, count 0 2006.232.07:54:08.65#ibcon#read 3, iclass 11, count 0 2006.232.07:54:08.65#ibcon#about to read 4, iclass 11, count 0 2006.232.07:54:08.65#ibcon#read 4, iclass 11, count 0 2006.232.07:54:08.65#ibcon#about to read 5, iclass 11, count 0 2006.232.07:54:08.65#ibcon#read 5, iclass 11, count 0 2006.232.07:54:08.65#ibcon#about to read 6, iclass 11, count 0 2006.232.07:54:08.65#ibcon#read 6, iclass 11, count 0 2006.232.07:54:08.65#ibcon#end of sib2, iclass 11, count 0 2006.232.07:54:08.65#ibcon#*after write, iclass 11, count 0 2006.232.07:54:08.65#ibcon#*before return 0, iclass 11, count 0 2006.232.07:54:08.65#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.232.07:54:08.65#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.232.07:54:08.65#ibcon#about to clear, iclass 11 cls_cnt 0 2006.232.07:54:08.65#ibcon#cleared, iclass 11 cls_cnt 0 2006.232.07:54:08.65$vc4f8/va=3,8 2006.232.07:54:08.65#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.232.07:54:08.65#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.232.07:54:08.65#ibcon#ireg 11 cls_cnt 2 2006.232.07:54:08.65#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.232.07:54:08.71#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.232.07:54:08.71#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.232.07:54:08.71#ibcon#enter wrdev, iclass 13, count 2 2006.232.07:54:08.71#ibcon#first serial, iclass 13, count 2 2006.232.07:54:08.71#ibcon#enter sib2, iclass 13, count 2 2006.232.07:54:08.71#ibcon#flushed, iclass 13, count 2 2006.232.07:54:08.71#ibcon#about to write, iclass 13, count 2 2006.232.07:54:08.71#ibcon#wrote, iclass 13, count 2 2006.232.07:54:08.71#ibcon#about to read 3, iclass 13, count 2 2006.232.07:54:08.74#ibcon#read 3, iclass 13, count 2 2006.232.07:54:08.74#ibcon#about to read 4, iclass 13, count 2 2006.232.07:54:08.74#ibcon#read 4, iclass 13, count 2 2006.232.07:54:08.74#ibcon#about to read 5, iclass 13, count 2 2006.232.07:54:08.74#ibcon#read 5, iclass 13, count 2 2006.232.07:54:08.74#ibcon#about to read 6, iclass 13, count 2 2006.232.07:54:08.74#ibcon#read 6, iclass 13, count 2 2006.232.07:54:08.74#ibcon#end of sib2, iclass 13, count 2 2006.232.07:54:08.74#ibcon#*mode == 0, iclass 13, count 2 2006.232.07:54:08.74#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.232.07:54:08.74#ibcon#[25=AT03-08\r\n] 2006.232.07:54:08.74#ibcon#*before write, iclass 13, count 2 2006.232.07:54:08.74#ibcon#enter sib2, iclass 13, count 2 2006.232.07:54:08.74#ibcon#flushed, iclass 13, count 2 2006.232.07:54:08.74#ibcon#about to write, iclass 13, count 2 2006.232.07:54:08.74#ibcon#wrote, iclass 13, count 2 2006.232.07:54:08.74#ibcon#about to read 3, iclass 13, count 2 2006.232.07:54:08.77#ibcon#read 3, iclass 13, count 2 2006.232.07:54:08.77#ibcon#about to read 4, iclass 13, count 2 2006.232.07:54:08.77#ibcon#read 4, iclass 13, count 2 2006.232.07:54:08.77#ibcon#about to read 5, iclass 13, count 2 2006.232.07:54:08.77#ibcon#read 5, iclass 13, count 2 2006.232.07:54:08.77#ibcon#about to read 6, iclass 13, count 2 2006.232.07:54:08.77#ibcon#read 6, iclass 13, count 2 2006.232.07:54:08.77#ibcon#end of sib2, iclass 13, count 2 2006.232.07:54:08.77#ibcon#*after write, iclass 13, count 2 2006.232.07:54:08.77#ibcon#*before return 0, iclass 13, count 2 2006.232.07:54:08.77#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.232.07:54:08.77#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.232.07:54:08.77#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.232.07:54:08.77#ibcon#ireg 7 cls_cnt 0 2006.232.07:54:08.77#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.232.07:54:08.89#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.232.07:54:08.89#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.232.07:54:08.89#ibcon#enter wrdev, iclass 13, count 0 2006.232.07:54:08.89#ibcon#first serial, iclass 13, count 0 2006.232.07:54:08.89#ibcon#enter sib2, iclass 13, count 0 2006.232.07:54:08.89#ibcon#flushed, iclass 13, count 0 2006.232.07:54:08.89#ibcon#about to write, iclass 13, count 0 2006.232.07:54:08.89#ibcon#wrote, iclass 13, count 0 2006.232.07:54:08.89#ibcon#about to read 3, iclass 13, count 0 2006.232.07:54:08.91#ibcon#read 3, iclass 13, count 0 2006.232.07:54:08.91#ibcon#about to read 4, iclass 13, count 0 2006.232.07:54:08.91#ibcon#read 4, iclass 13, count 0 2006.232.07:54:08.91#ibcon#about to read 5, iclass 13, count 0 2006.232.07:54:08.91#ibcon#read 5, iclass 13, count 0 2006.232.07:54:08.91#ibcon#about to read 6, iclass 13, count 0 2006.232.07:54:08.91#ibcon#read 6, iclass 13, count 0 2006.232.07:54:08.91#ibcon#end of sib2, iclass 13, count 0 2006.232.07:54:08.91#ibcon#*mode == 0, iclass 13, count 0 2006.232.07:54:08.91#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.232.07:54:08.91#ibcon#[25=USB\r\n] 2006.232.07:54:08.91#ibcon#*before write, iclass 13, count 0 2006.232.07:54:08.91#ibcon#enter sib2, iclass 13, count 0 2006.232.07:54:08.91#ibcon#flushed, iclass 13, count 0 2006.232.07:54:08.91#ibcon#about to write, iclass 13, count 0 2006.232.07:54:08.91#ibcon#wrote, iclass 13, count 0 2006.232.07:54:08.91#ibcon#about to read 3, iclass 13, count 0 2006.232.07:54:08.94#ibcon#read 3, iclass 13, count 0 2006.232.07:54:08.94#ibcon#about to read 4, iclass 13, count 0 2006.232.07:54:08.94#ibcon#read 4, iclass 13, count 0 2006.232.07:54:08.94#ibcon#about to read 5, iclass 13, count 0 2006.232.07:54:08.94#ibcon#read 5, iclass 13, count 0 2006.232.07:54:08.94#ibcon#about to read 6, iclass 13, count 0 2006.232.07:54:08.94#ibcon#read 6, iclass 13, count 0 2006.232.07:54:08.94#ibcon#end of sib2, iclass 13, count 0 2006.232.07:54:08.94#ibcon#*after write, iclass 13, count 0 2006.232.07:54:08.94#ibcon#*before return 0, iclass 13, count 0 2006.232.07:54:08.94#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.232.07:54:08.94#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.232.07:54:08.94#ibcon#about to clear, iclass 13 cls_cnt 0 2006.232.07:54:08.94#ibcon#cleared, iclass 13 cls_cnt 0 2006.232.07:54:08.94$vc4f8/valo=4,832.99 2006.232.07:54:08.94#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.232.07:54:08.94#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.232.07:54:08.94#ibcon#ireg 17 cls_cnt 0 2006.232.07:54:08.94#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.232.07:54:08.94#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.232.07:54:08.94#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.232.07:54:08.94#ibcon#enter wrdev, iclass 15, count 0 2006.232.07:54:08.94#ibcon#first serial, iclass 15, count 0 2006.232.07:54:08.94#ibcon#enter sib2, iclass 15, count 0 2006.232.07:54:08.94#ibcon#flushed, iclass 15, count 0 2006.232.07:54:08.94#ibcon#about to write, iclass 15, count 0 2006.232.07:54:08.94#ibcon#wrote, iclass 15, count 0 2006.232.07:54:08.94#ibcon#about to read 3, iclass 15, count 0 2006.232.07:54:08.96#ibcon#read 3, iclass 15, count 0 2006.232.07:54:08.96#ibcon#about to read 4, iclass 15, count 0 2006.232.07:54:08.96#ibcon#read 4, iclass 15, count 0 2006.232.07:54:08.96#ibcon#about to read 5, iclass 15, count 0 2006.232.07:54:08.96#ibcon#read 5, iclass 15, count 0 2006.232.07:54:08.96#ibcon#about to read 6, iclass 15, count 0 2006.232.07:54:08.96#ibcon#read 6, iclass 15, count 0 2006.232.07:54:08.96#ibcon#end of sib2, iclass 15, count 0 2006.232.07:54:08.96#ibcon#*mode == 0, iclass 15, count 0 2006.232.07:54:08.96#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.232.07:54:08.96#ibcon#[26=FRQ=04,832.99\r\n] 2006.232.07:54:08.96#ibcon#*before write, iclass 15, count 0 2006.232.07:54:08.96#ibcon#enter sib2, iclass 15, count 0 2006.232.07:54:08.96#ibcon#flushed, iclass 15, count 0 2006.232.07:54:08.96#ibcon#about to write, iclass 15, count 0 2006.232.07:54:08.96#ibcon#wrote, iclass 15, count 0 2006.232.07:54:08.96#ibcon#about to read 3, iclass 15, count 0 2006.232.07:54:09.00#ibcon#read 3, iclass 15, count 0 2006.232.07:54:09.00#ibcon#about to read 4, iclass 15, count 0 2006.232.07:54:09.00#ibcon#read 4, iclass 15, count 0 2006.232.07:54:09.00#ibcon#about to read 5, iclass 15, count 0 2006.232.07:54:09.00#ibcon#read 5, iclass 15, count 0 2006.232.07:54:09.00#ibcon#about to read 6, iclass 15, count 0 2006.232.07:54:09.00#ibcon#read 6, iclass 15, count 0 2006.232.07:54:09.00#ibcon#end of sib2, iclass 15, count 0 2006.232.07:54:09.00#ibcon#*after write, iclass 15, count 0 2006.232.07:54:09.00#ibcon#*before return 0, iclass 15, count 0 2006.232.07:54:09.00#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.232.07:54:09.00#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.232.07:54:09.00#ibcon#about to clear, iclass 15 cls_cnt 0 2006.232.07:54:09.00#ibcon#cleared, iclass 15 cls_cnt 0 2006.232.07:54:09.00$vc4f8/va=4,7 2006.232.07:54:09.00#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.232.07:54:09.00#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.232.07:54:09.00#ibcon#ireg 11 cls_cnt 2 2006.232.07:54:09.00#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.232.07:54:09.06#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.232.07:54:09.06#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.232.07:54:09.06#ibcon#enter wrdev, iclass 17, count 2 2006.232.07:54:09.06#ibcon#first serial, iclass 17, count 2 2006.232.07:54:09.06#ibcon#enter sib2, iclass 17, count 2 2006.232.07:54:09.06#ibcon#flushed, iclass 17, count 2 2006.232.07:54:09.06#ibcon#about to write, iclass 17, count 2 2006.232.07:54:09.06#ibcon#wrote, iclass 17, count 2 2006.232.07:54:09.06#ibcon#about to read 3, iclass 17, count 2 2006.232.07:54:09.08#ibcon#read 3, iclass 17, count 2 2006.232.07:54:09.08#ibcon#about to read 4, iclass 17, count 2 2006.232.07:54:09.08#ibcon#read 4, iclass 17, count 2 2006.232.07:54:09.08#ibcon#about to read 5, iclass 17, count 2 2006.232.07:54:09.08#ibcon#read 5, iclass 17, count 2 2006.232.07:54:09.08#ibcon#about to read 6, iclass 17, count 2 2006.232.07:54:09.08#ibcon#read 6, iclass 17, count 2 2006.232.07:54:09.08#ibcon#end of sib2, iclass 17, count 2 2006.232.07:54:09.08#ibcon#*mode == 0, iclass 17, count 2 2006.232.07:54:09.08#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.232.07:54:09.08#ibcon#[25=AT04-07\r\n] 2006.232.07:54:09.08#ibcon#*before write, iclass 17, count 2 2006.232.07:54:09.08#ibcon#enter sib2, iclass 17, count 2 2006.232.07:54:09.08#ibcon#flushed, iclass 17, count 2 2006.232.07:54:09.08#ibcon#about to write, iclass 17, count 2 2006.232.07:54:09.08#ibcon#wrote, iclass 17, count 2 2006.232.07:54:09.08#ibcon#about to read 3, iclass 17, count 2 2006.232.07:54:09.11#ibcon#read 3, iclass 17, count 2 2006.232.07:54:09.11#ibcon#about to read 4, iclass 17, count 2 2006.232.07:54:09.11#ibcon#read 4, iclass 17, count 2 2006.232.07:54:09.11#ibcon#about to read 5, iclass 17, count 2 2006.232.07:54:09.11#ibcon#read 5, iclass 17, count 2 2006.232.07:54:09.11#ibcon#about to read 6, iclass 17, count 2 2006.232.07:54:09.11#ibcon#read 6, iclass 17, count 2 2006.232.07:54:09.11#ibcon#end of sib2, iclass 17, count 2 2006.232.07:54:09.11#ibcon#*after write, iclass 17, count 2 2006.232.07:54:09.11#ibcon#*before return 0, iclass 17, count 2 2006.232.07:54:09.11#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.232.07:54:09.11#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.232.07:54:09.11#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.232.07:54:09.11#ibcon#ireg 7 cls_cnt 0 2006.232.07:54:09.11#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.232.07:54:09.23#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.232.07:54:09.23#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.232.07:54:09.23#ibcon#enter wrdev, iclass 17, count 0 2006.232.07:54:09.23#ibcon#first serial, iclass 17, count 0 2006.232.07:54:09.23#ibcon#enter sib2, iclass 17, count 0 2006.232.07:54:09.23#ibcon#flushed, iclass 17, count 0 2006.232.07:54:09.23#ibcon#about to write, iclass 17, count 0 2006.232.07:54:09.23#ibcon#wrote, iclass 17, count 0 2006.232.07:54:09.23#ibcon#about to read 3, iclass 17, count 0 2006.232.07:54:09.25#ibcon#read 3, iclass 17, count 0 2006.232.07:54:09.25#ibcon#about to read 4, iclass 17, count 0 2006.232.07:54:09.25#ibcon#read 4, iclass 17, count 0 2006.232.07:54:09.25#ibcon#about to read 5, iclass 17, count 0 2006.232.07:54:09.25#ibcon#read 5, iclass 17, count 0 2006.232.07:54:09.25#ibcon#about to read 6, iclass 17, count 0 2006.232.07:54:09.25#ibcon#read 6, iclass 17, count 0 2006.232.07:54:09.25#ibcon#end of sib2, iclass 17, count 0 2006.232.07:54:09.25#ibcon#*mode == 0, iclass 17, count 0 2006.232.07:54:09.25#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.232.07:54:09.25#ibcon#[25=USB\r\n] 2006.232.07:54:09.25#ibcon#*before write, iclass 17, count 0 2006.232.07:54:09.25#ibcon#enter sib2, iclass 17, count 0 2006.232.07:54:09.25#ibcon#flushed, iclass 17, count 0 2006.232.07:54:09.25#ibcon#about to write, iclass 17, count 0 2006.232.07:54:09.25#ibcon#wrote, iclass 17, count 0 2006.232.07:54:09.25#ibcon#about to read 3, iclass 17, count 0 2006.232.07:54:09.28#ibcon#read 3, iclass 17, count 0 2006.232.07:54:09.28#ibcon#about to read 4, iclass 17, count 0 2006.232.07:54:09.28#ibcon#read 4, iclass 17, count 0 2006.232.07:54:09.28#ibcon#about to read 5, iclass 17, count 0 2006.232.07:54:09.28#ibcon#read 5, iclass 17, count 0 2006.232.07:54:09.28#ibcon#about to read 6, iclass 17, count 0 2006.232.07:54:09.28#ibcon#read 6, iclass 17, count 0 2006.232.07:54:09.28#ibcon#end of sib2, iclass 17, count 0 2006.232.07:54:09.28#ibcon#*after write, iclass 17, count 0 2006.232.07:54:09.28#ibcon#*before return 0, iclass 17, count 0 2006.232.07:54:09.28#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.232.07:54:09.28#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.232.07:54:09.28#ibcon#about to clear, iclass 17 cls_cnt 0 2006.232.07:54:09.28#ibcon#cleared, iclass 17 cls_cnt 0 2006.232.07:54:09.28$vc4f8/valo=5,652.99 2006.232.07:54:09.28#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.232.07:54:09.28#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.232.07:54:09.28#ibcon#ireg 17 cls_cnt 0 2006.232.07:54:09.28#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.232.07:54:09.28#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.232.07:54:09.28#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.232.07:54:09.28#ibcon#enter wrdev, iclass 19, count 0 2006.232.07:54:09.28#ibcon#first serial, iclass 19, count 0 2006.232.07:54:09.28#ibcon#enter sib2, iclass 19, count 0 2006.232.07:54:09.28#ibcon#flushed, iclass 19, count 0 2006.232.07:54:09.28#ibcon#about to write, iclass 19, count 0 2006.232.07:54:09.28#ibcon#wrote, iclass 19, count 0 2006.232.07:54:09.28#ibcon#about to read 3, iclass 19, count 0 2006.232.07:54:09.30#ibcon#read 3, iclass 19, count 0 2006.232.07:54:09.30#ibcon#about to read 4, iclass 19, count 0 2006.232.07:54:09.30#ibcon#read 4, iclass 19, count 0 2006.232.07:54:09.30#ibcon#about to read 5, iclass 19, count 0 2006.232.07:54:09.30#ibcon#read 5, iclass 19, count 0 2006.232.07:54:09.30#ibcon#about to read 6, iclass 19, count 0 2006.232.07:54:09.30#ibcon#read 6, iclass 19, count 0 2006.232.07:54:09.30#ibcon#end of sib2, iclass 19, count 0 2006.232.07:54:09.30#ibcon#*mode == 0, iclass 19, count 0 2006.232.07:54:09.30#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.232.07:54:09.30#ibcon#[26=FRQ=05,652.99\r\n] 2006.232.07:54:09.30#ibcon#*before write, iclass 19, count 0 2006.232.07:54:09.30#ibcon#enter sib2, iclass 19, count 0 2006.232.07:54:09.30#ibcon#flushed, iclass 19, count 0 2006.232.07:54:09.30#ibcon#about to write, iclass 19, count 0 2006.232.07:54:09.30#ibcon#wrote, iclass 19, count 0 2006.232.07:54:09.30#ibcon#about to read 3, iclass 19, count 0 2006.232.07:54:09.34#ibcon#read 3, iclass 19, count 0 2006.232.07:54:09.34#ibcon#about to read 4, iclass 19, count 0 2006.232.07:54:09.34#ibcon#read 4, iclass 19, count 0 2006.232.07:54:09.34#ibcon#about to read 5, iclass 19, count 0 2006.232.07:54:09.34#ibcon#read 5, iclass 19, count 0 2006.232.07:54:09.34#ibcon#about to read 6, iclass 19, count 0 2006.232.07:54:09.34#ibcon#read 6, iclass 19, count 0 2006.232.07:54:09.34#ibcon#end of sib2, iclass 19, count 0 2006.232.07:54:09.34#ibcon#*after write, iclass 19, count 0 2006.232.07:54:09.34#ibcon#*before return 0, iclass 19, count 0 2006.232.07:54:09.34#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.232.07:54:09.34#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.232.07:54:09.34#ibcon#about to clear, iclass 19 cls_cnt 0 2006.232.07:54:09.34#ibcon#cleared, iclass 19 cls_cnt 0 2006.232.07:54:09.34$vc4f8/va=5,7 2006.232.07:54:09.34#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.232.07:54:09.34#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.232.07:54:09.34#ibcon#ireg 11 cls_cnt 2 2006.232.07:54:09.34#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.232.07:54:09.40#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.232.07:54:09.40#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.232.07:54:09.40#ibcon#enter wrdev, iclass 21, count 2 2006.232.07:54:09.40#ibcon#first serial, iclass 21, count 2 2006.232.07:54:09.40#ibcon#enter sib2, iclass 21, count 2 2006.232.07:54:09.40#ibcon#flushed, iclass 21, count 2 2006.232.07:54:09.40#ibcon#about to write, iclass 21, count 2 2006.232.07:54:09.40#ibcon#wrote, iclass 21, count 2 2006.232.07:54:09.40#ibcon#about to read 3, iclass 21, count 2 2006.232.07:54:09.43#ibcon#read 3, iclass 21, count 2 2006.232.07:54:09.43#ibcon#about to read 4, iclass 21, count 2 2006.232.07:54:09.43#ibcon#read 4, iclass 21, count 2 2006.232.07:54:09.43#ibcon#about to read 5, iclass 21, count 2 2006.232.07:54:09.43#ibcon#read 5, iclass 21, count 2 2006.232.07:54:09.43#ibcon#about to read 6, iclass 21, count 2 2006.232.07:54:09.43#ibcon#read 6, iclass 21, count 2 2006.232.07:54:09.43#ibcon#end of sib2, iclass 21, count 2 2006.232.07:54:09.43#ibcon#*mode == 0, iclass 21, count 2 2006.232.07:54:09.43#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.232.07:54:09.43#ibcon#[25=AT05-07\r\n] 2006.232.07:54:09.43#ibcon#*before write, iclass 21, count 2 2006.232.07:54:09.43#ibcon#enter sib2, iclass 21, count 2 2006.232.07:54:09.43#ibcon#flushed, iclass 21, count 2 2006.232.07:54:09.43#ibcon#about to write, iclass 21, count 2 2006.232.07:54:09.43#ibcon#wrote, iclass 21, count 2 2006.232.07:54:09.43#ibcon#about to read 3, iclass 21, count 2 2006.232.07:54:09.46#ibcon#read 3, iclass 21, count 2 2006.232.07:54:09.46#ibcon#about to read 4, iclass 21, count 2 2006.232.07:54:09.46#ibcon#read 4, iclass 21, count 2 2006.232.07:54:09.46#ibcon#about to read 5, iclass 21, count 2 2006.232.07:54:09.46#ibcon#read 5, iclass 21, count 2 2006.232.07:54:09.46#ibcon#about to read 6, iclass 21, count 2 2006.232.07:54:09.46#ibcon#read 6, iclass 21, count 2 2006.232.07:54:09.46#ibcon#end of sib2, iclass 21, count 2 2006.232.07:54:09.46#ibcon#*after write, iclass 21, count 2 2006.232.07:54:09.46#ibcon#*before return 0, iclass 21, count 2 2006.232.07:54:09.46#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.232.07:54:09.46#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.232.07:54:09.46#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.232.07:54:09.46#ibcon#ireg 7 cls_cnt 0 2006.232.07:54:09.46#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.232.07:54:09.58#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.232.07:54:09.58#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.232.07:54:09.58#ibcon#enter wrdev, iclass 21, count 0 2006.232.07:54:09.58#ibcon#first serial, iclass 21, count 0 2006.232.07:54:09.58#ibcon#enter sib2, iclass 21, count 0 2006.232.07:54:09.58#ibcon#flushed, iclass 21, count 0 2006.232.07:54:09.58#ibcon#about to write, iclass 21, count 0 2006.232.07:54:09.58#ibcon#wrote, iclass 21, count 0 2006.232.07:54:09.58#ibcon#about to read 3, iclass 21, count 0 2006.232.07:54:09.60#ibcon#read 3, iclass 21, count 0 2006.232.07:54:09.60#ibcon#about to read 4, iclass 21, count 0 2006.232.07:54:09.60#ibcon#read 4, iclass 21, count 0 2006.232.07:54:09.60#ibcon#about to read 5, iclass 21, count 0 2006.232.07:54:09.60#ibcon#read 5, iclass 21, count 0 2006.232.07:54:09.60#ibcon#about to read 6, iclass 21, count 0 2006.232.07:54:09.60#ibcon#read 6, iclass 21, count 0 2006.232.07:54:09.60#ibcon#end of sib2, iclass 21, count 0 2006.232.07:54:09.60#ibcon#*mode == 0, iclass 21, count 0 2006.232.07:54:09.60#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.232.07:54:09.60#ibcon#[25=USB\r\n] 2006.232.07:54:09.60#ibcon#*before write, iclass 21, count 0 2006.232.07:54:09.60#ibcon#enter sib2, iclass 21, count 0 2006.232.07:54:09.60#ibcon#flushed, iclass 21, count 0 2006.232.07:54:09.60#ibcon#about to write, iclass 21, count 0 2006.232.07:54:09.60#ibcon#wrote, iclass 21, count 0 2006.232.07:54:09.60#ibcon#about to read 3, iclass 21, count 0 2006.232.07:54:09.63#ibcon#read 3, iclass 21, count 0 2006.232.07:54:09.63#ibcon#about to read 4, iclass 21, count 0 2006.232.07:54:09.63#ibcon#read 4, iclass 21, count 0 2006.232.07:54:09.63#ibcon#about to read 5, iclass 21, count 0 2006.232.07:54:09.63#ibcon#read 5, iclass 21, count 0 2006.232.07:54:09.63#ibcon#about to read 6, iclass 21, count 0 2006.232.07:54:09.63#ibcon#read 6, iclass 21, count 0 2006.232.07:54:09.63#ibcon#end of sib2, iclass 21, count 0 2006.232.07:54:09.63#ibcon#*after write, iclass 21, count 0 2006.232.07:54:09.63#ibcon#*before return 0, iclass 21, count 0 2006.232.07:54:09.63#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.232.07:54:09.63#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.232.07:54:09.63#ibcon#about to clear, iclass 21 cls_cnt 0 2006.232.07:54:09.63#ibcon#cleared, iclass 21 cls_cnt 0 2006.232.07:54:09.63$vc4f8/valo=6,772.99 2006.232.07:54:09.63#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.232.07:54:09.63#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.232.07:54:09.63#ibcon#ireg 17 cls_cnt 0 2006.232.07:54:09.63#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.232.07:54:09.63#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.232.07:54:09.63#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.232.07:54:09.63#ibcon#enter wrdev, iclass 23, count 0 2006.232.07:54:09.63#ibcon#first serial, iclass 23, count 0 2006.232.07:54:09.63#ibcon#enter sib2, iclass 23, count 0 2006.232.07:54:09.63#ibcon#flushed, iclass 23, count 0 2006.232.07:54:09.63#ibcon#about to write, iclass 23, count 0 2006.232.07:54:09.63#ibcon#wrote, iclass 23, count 0 2006.232.07:54:09.63#ibcon#about to read 3, iclass 23, count 0 2006.232.07:54:09.65#ibcon#read 3, iclass 23, count 0 2006.232.07:54:09.65#ibcon#about to read 4, iclass 23, count 0 2006.232.07:54:09.65#ibcon#read 4, iclass 23, count 0 2006.232.07:54:09.65#ibcon#about to read 5, iclass 23, count 0 2006.232.07:54:09.65#ibcon#read 5, iclass 23, count 0 2006.232.07:54:09.65#ibcon#about to read 6, iclass 23, count 0 2006.232.07:54:09.65#ibcon#read 6, iclass 23, count 0 2006.232.07:54:09.65#ibcon#end of sib2, iclass 23, count 0 2006.232.07:54:09.65#ibcon#*mode == 0, iclass 23, count 0 2006.232.07:54:09.65#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.232.07:54:09.65#ibcon#[26=FRQ=06,772.99\r\n] 2006.232.07:54:09.65#ibcon#*before write, iclass 23, count 0 2006.232.07:54:09.65#ibcon#enter sib2, iclass 23, count 0 2006.232.07:54:09.65#ibcon#flushed, iclass 23, count 0 2006.232.07:54:09.65#ibcon#about to write, iclass 23, count 0 2006.232.07:54:09.65#ibcon#wrote, iclass 23, count 0 2006.232.07:54:09.65#ibcon#about to read 3, iclass 23, count 0 2006.232.07:54:09.69#ibcon#read 3, iclass 23, count 0 2006.232.07:54:09.69#ibcon#about to read 4, iclass 23, count 0 2006.232.07:54:09.69#ibcon#read 4, iclass 23, count 0 2006.232.07:54:09.69#ibcon#about to read 5, iclass 23, count 0 2006.232.07:54:09.69#ibcon#read 5, iclass 23, count 0 2006.232.07:54:09.69#ibcon#about to read 6, iclass 23, count 0 2006.232.07:54:09.69#ibcon#read 6, iclass 23, count 0 2006.232.07:54:09.69#ibcon#end of sib2, iclass 23, count 0 2006.232.07:54:09.69#ibcon#*after write, iclass 23, count 0 2006.232.07:54:09.69#ibcon#*before return 0, iclass 23, count 0 2006.232.07:54:09.69#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.232.07:54:09.69#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.232.07:54:09.69#ibcon#about to clear, iclass 23 cls_cnt 0 2006.232.07:54:09.69#ibcon#cleared, iclass 23 cls_cnt 0 2006.232.07:54:09.69$vc4f8/va=6,6 2006.232.07:54:09.69#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.232.07:54:09.69#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.232.07:54:09.69#ibcon#ireg 11 cls_cnt 2 2006.232.07:54:09.69#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.232.07:54:09.75#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.232.07:54:09.75#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.232.07:54:09.75#ibcon#enter wrdev, iclass 25, count 2 2006.232.07:54:09.75#ibcon#first serial, iclass 25, count 2 2006.232.07:54:09.75#ibcon#enter sib2, iclass 25, count 2 2006.232.07:54:09.75#ibcon#flushed, iclass 25, count 2 2006.232.07:54:09.75#ibcon#about to write, iclass 25, count 2 2006.232.07:54:09.75#ibcon#wrote, iclass 25, count 2 2006.232.07:54:09.75#ibcon#about to read 3, iclass 25, count 2 2006.232.07:54:09.77#ibcon#read 3, iclass 25, count 2 2006.232.07:54:09.77#ibcon#about to read 4, iclass 25, count 2 2006.232.07:54:09.77#ibcon#read 4, iclass 25, count 2 2006.232.07:54:09.77#ibcon#about to read 5, iclass 25, count 2 2006.232.07:54:09.77#ibcon#read 5, iclass 25, count 2 2006.232.07:54:09.77#ibcon#about to read 6, iclass 25, count 2 2006.232.07:54:09.77#ibcon#read 6, iclass 25, count 2 2006.232.07:54:09.77#ibcon#end of sib2, iclass 25, count 2 2006.232.07:54:09.77#ibcon#*mode == 0, iclass 25, count 2 2006.232.07:54:09.77#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.232.07:54:09.77#ibcon#[25=AT06-06\r\n] 2006.232.07:54:09.77#ibcon#*before write, iclass 25, count 2 2006.232.07:54:09.77#ibcon#enter sib2, iclass 25, count 2 2006.232.07:54:09.77#ibcon#flushed, iclass 25, count 2 2006.232.07:54:09.77#ibcon#about to write, iclass 25, count 2 2006.232.07:54:09.77#ibcon#wrote, iclass 25, count 2 2006.232.07:54:09.77#ibcon#about to read 3, iclass 25, count 2 2006.232.07:54:09.80#ibcon#read 3, iclass 25, count 2 2006.232.07:54:09.80#ibcon#about to read 4, iclass 25, count 2 2006.232.07:54:09.80#ibcon#read 4, iclass 25, count 2 2006.232.07:54:09.80#ibcon#about to read 5, iclass 25, count 2 2006.232.07:54:09.80#ibcon#read 5, iclass 25, count 2 2006.232.07:54:09.80#ibcon#about to read 6, iclass 25, count 2 2006.232.07:54:09.80#ibcon#read 6, iclass 25, count 2 2006.232.07:54:09.80#ibcon#end of sib2, iclass 25, count 2 2006.232.07:54:09.80#ibcon#*after write, iclass 25, count 2 2006.232.07:54:09.80#ibcon#*before return 0, iclass 25, count 2 2006.232.07:54:09.80#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.232.07:54:09.80#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.232.07:54:09.80#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.232.07:54:09.80#ibcon#ireg 7 cls_cnt 0 2006.232.07:54:09.80#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.232.07:54:09.85#abcon#<5=/05 3.4 6.2 29.43 861007.3\r\n> 2006.232.07:54:09.87#abcon#{5=INTERFACE CLEAR} 2006.232.07:54:09.92#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.232.07:54:09.92#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.232.07:54:09.92#ibcon#enter wrdev, iclass 25, count 0 2006.232.07:54:09.92#ibcon#first serial, iclass 25, count 0 2006.232.07:54:09.92#ibcon#enter sib2, iclass 25, count 0 2006.232.07:54:09.92#ibcon#flushed, iclass 25, count 0 2006.232.07:54:09.92#ibcon#about to write, iclass 25, count 0 2006.232.07:54:09.92#ibcon#wrote, iclass 25, count 0 2006.232.07:54:09.92#ibcon#about to read 3, iclass 25, count 0 2006.232.07:54:09.93#abcon#[5=S1D000X0/0*\r\n] 2006.232.07:54:09.94#ibcon#read 3, iclass 25, count 0 2006.232.07:54:09.94#ibcon#about to read 4, iclass 25, count 0 2006.232.07:54:09.94#ibcon#read 4, iclass 25, count 0 2006.232.07:54:09.94#ibcon#about to read 5, iclass 25, count 0 2006.232.07:54:09.94#ibcon#read 5, iclass 25, count 0 2006.232.07:54:09.94#ibcon#about to read 6, iclass 25, count 0 2006.232.07:54:09.94#ibcon#read 6, iclass 25, count 0 2006.232.07:54:09.94#ibcon#end of sib2, iclass 25, count 0 2006.232.07:54:09.94#ibcon#*mode == 0, iclass 25, count 0 2006.232.07:54:09.94#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.232.07:54:09.94#ibcon#[25=USB\r\n] 2006.232.07:54:09.94#ibcon#*before write, iclass 25, count 0 2006.232.07:54:09.94#ibcon#enter sib2, iclass 25, count 0 2006.232.07:54:09.94#ibcon#flushed, iclass 25, count 0 2006.232.07:54:09.94#ibcon#about to write, iclass 25, count 0 2006.232.07:54:09.94#ibcon#wrote, iclass 25, count 0 2006.232.07:54:09.94#ibcon#about to read 3, iclass 25, count 0 2006.232.07:54:09.97#ibcon#read 3, iclass 25, count 0 2006.232.07:54:09.97#ibcon#about to read 4, iclass 25, count 0 2006.232.07:54:09.97#ibcon#read 4, iclass 25, count 0 2006.232.07:54:09.97#ibcon#about to read 5, iclass 25, count 0 2006.232.07:54:09.97#ibcon#read 5, iclass 25, count 0 2006.232.07:54:09.97#ibcon#about to read 6, iclass 25, count 0 2006.232.07:54:09.97#ibcon#read 6, iclass 25, count 0 2006.232.07:54:09.97#ibcon#end of sib2, iclass 25, count 0 2006.232.07:54:09.97#ibcon#*after write, iclass 25, count 0 2006.232.07:54:09.97#ibcon#*before return 0, iclass 25, count 0 2006.232.07:54:09.97#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.232.07:54:09.97#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.232.07:54:09.97#ibcon#about to clear, iclass 25 cls_cnt 0 2006.232.07:54:09.97#ibcon#cleared, iclass 25 cls_cnt 0 2006.232.07:54:09.97$vc4f8/valo=7,832.99 2006.232.07:54:09.97#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.232.07:54:09.97#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.232.07:54:09.97#ibcon#ireg 17 cls_cnt 0 2006.232.07:54:09.97#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.232.07:54:09.97#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.232.07:54:09.97#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.232.07:54:09.97#ibcon#enter wrdev, iclass 31, count 0 2006.232.07:54:09.97#ibcon#first serial, iclass 31, count 0 2006.232.07:54:09.97#ibcon#enter sib2, iclass 31, count 0 2006.232.07:54:09.97#ibcon#flushed, iclass 31, count 0 2006.232.07:54:09.97#ibcon#about to write, iclass 31, count 0 2006.232.07:54:09.97#ibcon#wrote, iclass 31, count 0 2006.232.07:54:09.97#ibcon#about to read 3, iclass 31, count 0 2006.232.07:54:09.99#ibcon#read 3, iclass 31, count 0 2006.232.07:54:09.99#ibcon#about to read 4, iclass 31, count 0 2006.232.07:54:09.99#ibcon#read 4, iclass 31, count 0 2006.232.07:54:09.99#ibcon#about to read 5, iclass 31, count 0 2006.232.07:54:09.99#ibcon#read 5, iclass 31, count 0 2006.232.07:54:09.99#ibcon#about to read 6, iclass 31, count 0 2006.232.07:54:09.99#ibcon#read 6, iclass 31, count 0 2006.232.07:54:09.99#ibcon#end of sib2, iclass 31, count 0 2006.232.07:54:09.99#ibcon#*mode == 0, iclass 31, count 0 2006.232.07:54:09.99#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.232.07:54:09.99#ibcon#[26=FRQ=07,832.99\r\n] 2006.232.07:54:09.99#ibcon#*before write, iclass 31, count 0 2006.232.07:54:09.99#ibcon#enter sib2, iclass 31, count 0 2006.232.07:54:09.99#ibcon#flushed, iclass 31, count 0 2006.232.07:54:09.99#ibcon#about to write, iclass 31, count 0 2006.232.07:54:09.99#ibcon#wrote, iclass 31, count 0 2006.232.07:54:09.99#ibcon#about to read 3, iclass 31, count 0 2006.232.07:54:10.03#ibcon#read 3, iclass 31, count 0 2006.232.07:54:10.03#ibcon#about to read 4, iclass 31, count 0 2006.232.07:54:10.03#ibcon#read 4, iclass 31, count 0 2006.232.07:54:10.03#ibcon#about to read 5, iclass 31, count 0 2006.232.07:54:10.03#ibcon#read 5, iclass 31, count 0 2006.232.07:54:10.03#ibcon#about to read 6, iclass 31, count 0 2006.232.07:54:10.03#ibcon#read 6, iclass 31, count 0 2006.232.07:54:10.03#ibcon#end of sib2, iclass 31, count 0 2006.232.07:54:10.03#ibcon#*after write, iclass 31, count 0 2006.232.07:54:10.03#ibcon#*before return 0, iclass 31, count 0 2006.232.07:54:10.03#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.232.07:54:10.03#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.232.07:54:10.03#ibcon#about to clear, iclass 31 cls_cnt 0 2006.232.07:54:10.03#ibcon#cleared, iclass 31 cls_cnt 0 2006.232.07:54:10.03$vc4f8/va=7,6 2006.232.07:54:10.03#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.232.07:54:10.03#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.232.07:54:10.03#ibcon#ireg 11 cls_cnt 2 2006.232.07:54:10.03#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.232.07:54:10.09#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.232.07:54:10.09#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.232.07:54:10.09#ibcon#enter wrdev, iclass 33, count 2 2006.232.07:54:10.09#ibcon#first serial, iclass 33, count 2 2006.232.07:54:10.09#ibcon#enter sib2, iclass 33, count 2 2006.232.07:54:10.09#ibcon#flushed, iclass 33, count 2 2006.232.07:54:10.09#ibcon#about to write, iclass 33, count 2 2006.232.07:54:10.09#ibcon#wrote, iclass 33, count 2 2006.232.07:54:10.09#ibcon#about to read 3, iclass 33, count 2 2006.232.07:54:10.11#ibcon#read 3, iclass 33, count 2 2006.232.07:54:10.11#ibcon#about to read 4, iclass 33, count 2 2006.232.07:54:10.11#ibcon#read 4, iclass 33, count 2 2006.232.07:54:10.11#ibcon#about to read 5, iclass 33, count 2 2006.232.07:54:10.11#ibcon#read 5, iclass 33, count 2 2006.232.07:54:10.11#ibcon#about to read 6, iclass 33, count 2 2006.232.07:54:10.11#ibcon#read 6, iclass 33, count 2 2006.232.07:54:10.11#ibcon#end of sib2, iclass 33, count 2 2006.232.07:54:10.11#ibcon#*mode == 0, iclass 33, count 2 2006.232.07:54:10.11#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.232.07:54:10.11#ibcon#[25=AT07-06\r\n] 2006.232.07:54:10.11#ibcon#*before write, iclass 33, count 2 2006.232.07:54:10.11#ibcon#enter sib2, iclass 33, count 2 2006.232.07:54:10.11#ibcon#flushed, iclass 33, count 2 2006.232.07:54:10.11#ibcon#about to write, iclass 33, count 2 2006.232.07:54:10.11#ibcon#wrote, iclass 33, count 2 2006.232.07:54:10.11#ibcon#about to read 3, iclass 33, count 2 2006.232.07:54:10.14#ibcon#read 3, iclass 33, count 2 2006.232.07:54:10.14#ibcon#about to read 4, iclass 33, count 2 2006.232.07:54:10.14#ibcon#read 4, iclass 33, count 2 2006.232.07:54:10.14#ibcon#about to read 5, iclass 33, count 2 2006.232.07:54:10.14#ibcon#read 5, iclass 33, count 2 2006.232.07:54:10.14#ibcon#about to read 6, iclass 33, count 2 2006.232.07:54:10.14#ibcon#read 6, iclass 33, count 2 2006.232.07:54:10.14#ibcon#end of sib2, iclass 33, count 2 2006.232.07:54:10.14#ibcon#*after write, iclass 33, count 2 2006.232.07:54:10.14#ibcon#*before return 0, iclass 33, count 2 2006.232.07:54:10.14#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.232.07:54:10.14#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.232.07:54:10.14#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.232.07:54:10.14#ibcon#ireg 7 cls_cnt 0 2006.232.07:54:10.14#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.232.07:54:10.26#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.232.07:54:10.26#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.232.07:54:10.26#ibcon#enter wrdev, iclass 33, count 0 2006.232.07:54:10.26#ibcon#first serial, iclass 33, count 0 2006.232.07:54:10.26#ibcon#enter sib2, iclass 33, count 0 2006.232.07:54:10.26#ibcon#flushed, iclass 33, count 0 2006.232.07:54:10.26#ibcon#about to write, iclass 33, count 0 2006.232.07:54:10.26#ibcon#wrote, iclass 33, count 0 2006.232.07:54:10.26#ibcon#about to read 3, iclass 33, count 0 2006.232.07:54:10.28#ibcon#read 3, iclass 33, count 0 2006.232.07:54:10.28#ibcon#about to read 4, iclass 33, count 0 2006.232.07:54:10.28#ibcon#read 4, iclass 33, count 0 2006.232.07:54:10.28#ibcon#about to read 5, iclass 33, count 0 2006.232.07:54:10.28#ibcon#read 5, iclass 33, count 0 2006.232.07:54:10.28#ibcon#about to read 6, iclass 33, count 0 2006.232.07:54:10.28#ibcon#read 6, iclass 33, count 0 2006.232.07:54:10.28#ibcon#end of sib2, iclass 33, count 0 2006.232.07:54:10.28#ibcon#*mode == 0, iclass 33, count 0 2006.232.07:54:10.28#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.232.07:54:10.28#ibcon#[25=USB\r\n] 2006.232.07:54:10.28#ibcon#*before write, iclass 33, count 0 2006.232.07:54:10.28#ibcon#enter sib2, iclass 33, count 0 2006.232.07:54:10.28#ibcon#flushed, iclass 33, count 0 2006.232.07:54:10.28#ibcon#about to write, iclass 33, count 0 2006.232.07:54:10.28#ibcon#wrote, iclass 33, count 0 2006.232.07:54:10.28#ibcon#about to read 3, iclass 33, count 0 2006.232.07:54:10.31#ibcon#read 3, iclass 33, count 0 2006.232.07:54:10.31#ibcon#about to read 4, iclass 33, count 0 2006.232.07:54:10.31#ibcon#read 4, iclass 33, count 0 2006.232.07:54:10.31#ibcon#about to read 5, iclass 33, count 0 2006.232.07:54:10.31#ibcon#read 5, iclass 33, count 0 2006.232.07:54:10.31#ibcon#about to read 6, iclass 33, count 0 2006.232.07:54:10.31#ibcon#read 6, iclass 33, count 0 2006.232.07:54:10.31#ibcon#end of sib2, iclass 33, count 0 2006.232.07:54:10.31#ibcon#*after write, iclass 33, count 0 2006.232.07:54:10.31#ibcon#*before return 0, iclass 33, count 0 2006.232.07:54:10.31#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.232.07:54:10.31#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.232.07:54:10.31#ibcon#about to clear, iclass 33 cls_cnt 0 2006.232.07:54:10.31#ibcon#cleared, iclass 33 cls_cnt 0 2006.232.07:54:10.31$vc4f8/valo=8,852.99 2006.232.07:54:10.31#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.232.07:54:10.31#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.232.07:54:10.31#ibcon#ireg 17 cls_cnt 0 2006.232.07:54:10.31#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.232.07:54:10.31#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.232.07:54:10.31#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.232.07:54:10.31#ibcon#enter wrdev, iclass 35, count 0 2006.232.07:54:10.31#ibcon#first serial, iclass 35, count 0 2006.232.07:54:10.31#ibcon#enter sib2, iclass 35, count 0 2006.232.07:54:10.31#ibcon#flushed, iclass 35, count 0 2006.232.07:54:10.31#ibcon#about to write, iclass 35, count 0 2006.232.07:54:10.31#ibcon#wrote, iclass 35, count 0 2006.232.07:54:10.31#ibcon#about to read 3, iclass 35, count 0 2006.232.07:54:10.33#ibcon#read 3, iclass 35, count 0 2006.232.07:54:10.33#ibcon#about to read 4, iclass 35, count 0 2006.232.07:54:10.33#ibcon#read 4, iclass 35, count 0 2006.232.07:54:10.33#ibcon#about to read 5, iclass 35, count 0 2006.232.07:54:10.33#ibcon#read 5, iclass 35, count 0 2006.232.07:54:10.33#ibcon#about to read 6, iclass 35, count 0 2006.232.07:54:10.33#ibcon#read 6, iclass 35, count 0 2006.232.07:54:10.33#ibcon#end of sib2, iclass 35, count 0 2006.232.07:54:10.33#ibcon#*mode == 0, iclass 35, count 0 2006.232.07:54:10.33#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.232.07:54:10.33#ibcon#[26=FRQ=08,852.99\r\n] 2006.232.07:54:10.33#ibcon#*before write, iclass 35, count 0 2006.232.07:54:10.33#ibcon#enter sib2, iclass 35, count 0 2006.232.07:54:10.33#ibcon#flushed, iclass 35, count 0 2006.232.07:54:10.33#ibcon#about to write, iclass 35, count 0 2006.232.07:54:10.33#ibcon#wrote, iclass 35, count 0 2006.232.07:54:10.33#ibcon#about to read 3, iclass 35, count 0 2006.232.07:54:10.37#ibcon#read 3, iclass 35, count 0 2006.232.07:54:10.37#ibcon#about to read 4, iclass 35, count 0 2006.232.07:54:10.37#ibcon#read 4, iclass 35, count 0 2006.232.07:54:10.37#ibcon#about to read 5, iclass 35, count 0 2006.232.07:54:10.37#ibcon#read 5, iclass 35, count 0 2006.232.07:54:10.37#ibcon#about to read 6, iclass 35, count 0 2006.232.07:54:10.37#ibcon#read 6, iclass 35, count 0 2006.232.07:54:10.37#ibcon#end of sib2, iclass 35, count 0 2006.232.07:54:10.37#ibcon#*after write, iclass 35, count 0 2006.232.07:54:10.37#ibcon#*before return 0, iclass 35, count 0 2006.232.07:54:10.37#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.232.07:54:10.37#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.232.07:54:10.37#ibcon#about to clear, iclass 35 cls_cnt 0 2006.232.07:54:10.37#ibcon#cleared, iclass 35 cls_cnt 0 2006.232.07:54:10.37$vc4f8/va=8,6 2006.232.07:54:10.37#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.232.07:54:10.37#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.232.07:54:10.37#ibcon#ireg 11 cls_cnt 2 2006.232.07:54:10.37#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.232.07:54:10.43#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.232.07:54:10.43#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.232.07:54:10.43#ibcon#enter wrdev, iclass 37, count 2 2006.232.07:54:10.43#ibcon#first serial, iclass 37, count 2 2006.232.07:54:10.43#ibcon#enter sib2, iclass 37, count 2 2006.232.07:54:10.43#ibcon#flushed, iclass 37, count 2 2006.232.07:54:10.43#ibcon#about to write, iclass 37, count 2 2006.232.07:54:10.43#ibcon#wrote, iclass 37, count 2 2006.232.07:54:10.43#ibcon#about to read 3, iclass 37, count 2 2006.232.07:54:10.45#ibcon#read 3, iclass 37, count 2 2006.232.07:54:10.45#ibcon#about to read 4, iclass 37, count 2 2006.232.07:54:10.45#ibcon#read 4, iclass 37, count 2 2006.232.07:54:10.45#ibcon#about to read 5, iclass 37, count 2 2006.232.07:54:10.45#ibcon#read 5, iclass 37, count 2 2006.232.07:54:10.45#ibcon#about to read 6, iclass 37, count 2 2006.232.07:54:10.45#ibcon#read 6, iclass 37, count 2 2006.232.07:54:10.45#ibcon#end of sib2, iclass 37, count 2 2006.232.07:54:10.45#ibcon#*mode == 0, iclass 37, count 2 2006.232.07:54:10.45#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.232.07:54:10.45#ibcon#[25=AT08-06\r\n] 2006.232.07:54:10.45#ibcon#*before write, iclass 37, count 2 2006.232.07:54:10.45#ibcon#enter sib2, iclass 37, count 2 2006.232.07:54:10.45#ibcon#flushed, iclass 37, count 2 2006.232.07:54:10.45#ibcon#about to write, iclass 37, count 2 2006.232.07:54:10.45#ibcon#wrote, iclass 37, count 2 2006.232.07:54:10.45#ibcon#about to read 3, iclass 37, count 2 2006.232.07:54:10.48#ibcon#read 3, iclass 37, count 2 2006.232.07:54:10.48#ibcon#about to read 4, iclass 37, count 2 2006.232.07:54:10.48#ibcon#read 4, iclass 37, count 2 2006.232.07:54:10.48#ibcon#about to read 5, iclass 37, count 2 2006.232.07:54:10.48#ibcon#read 5, iclass 37, count 2 2006.232.07:54:10.48#ibcon#about to read 6, iclass 37, count 2 2006.232.07:54:10.48#ibcon#read 6, iclass 37, count 2 2006.232.07:54:10.48#ibcon#end of sib2, iclass 37, count 2 2006.232.07:54:10.48#ibcon#*after write, iclass 37, count 2 2006.232.07:54:10.48#ibcon#*before return 0, iclass 37, count 2 2006.232.07:54:10.48#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.232.07:54:10.48#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.232.07:54:10.48#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.232.07:54:10.48#ibcon#ireg 7 cls_cnt 0 2006.232.07:54:10.48#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.232.07:54:10.60#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.232.07:54:10.60#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.232.07:54:10.60#ibcon#enter wrdev, iclass 37, count 0 2006.232.07:54:10.60#ibcon#first serial, iclass 37, count 0 2006.232.07:54:10.60#ibcon#enter sib2, iclass 37, count 0 2006.232.07:54:10.60#ibcon#flushed, iclass 37, count 0 2006.232.07:54:10.60#ibcon#about to write, iclass 37, count 0 2006.232.07:54:10.60#ibcon#wrote, iclass 37, count 0 2006.232.07:54:10.60#ibcon#about to read 3, iclass 37, count 0 2006.232.07:54:10.62#ibcon#read 3, iclass 37, count 0 2006.232.07:54:10.62#ibcon#about to read 4, iclass 37, count 0 2006.232.07:54:10.62#ibcon#read 4, iclass 37, count 0 2006.232.07:54:10.62#ibcon#about to read 5, iclass 37, count 0 2006.232.07:54:10.62#ibcon#read 5, iclass 37, count 0 2006.232.07:54:10.62#ibcon#about to read 6, iclass 37, count 0 2006.232.07:54:10.62#ibcon#read 6, iclass 37, count 0 2006.232.07:54:10.62#ibcon#end of sib2, iclass 37, count 0 2006.232.07:54:10.62#ibcon#*mode == 0, iclass 37, count 0 2006.232.07:54:10.62#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.232.07:54:10.62#ibcon#[25=USB\r\n] 2006.232.07:54:10.62#ibcon#*before write, iclass 37, count 0 2006.232.07:54:10.62#ibcon#enter sib2, iclass 37, count 0 2006.232.07:54:10.62#ibcon#flushed, iclass 37, count 0 2006.232.07:54:10.62#ibcon#about to write, iclass 37, count 0 2006.232.07:54:10.62#ibcon#wrote, iclass 37, count 0 2006.232.07:54:10.62#ibcon#about to read 3, iclass 37, count 0 2006.232.07:54:10.65#ibcon#read 3, iclass 37, count 0 2006.232.07:54:10.65#ibcon#about to read 4, iclass 37, count 0 2006.232.07:54:10.65#ibcon#read 4, iclass 37, count 0 2006.232.07:54:10.65#ibcon#about to read 5, iclass 37, count 0 2006.232.07:54:10.65#ibcon#read 5, iclass 37, count 0 2006.232.07:54:10.65#ibcon#about to read 6, iclass 37, count 0 2006.232.07:54:10.65#ibcon#read 6, iclass 37, count 0 2006.232.07:54:10.65#ibcon#end of sib2, iclass 37, count 0 2006.232.07:54:10.65#ibcon#*after write, iclass 37, count 0 2006.232.07:54:10.65#ibcon#*before return 0, iclass 37, count 0 2006.232.07:54:10.65#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.232.07:54:10.65#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.232.07:54:10.65#ibcon#about to clear, iclass 37 cls_cnt 0 2006.232.07:54:10.65#ibcon#cleared, iclass 37 cls_cnt 0 2006.232.07:54:10.65$vc4f8/vblo=1,632.99 2006.232.07:54:10.65#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.232.07:54:10.65#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.232.07:54:10.65#ibcon#ireg 17 cls_cnt 0 2006.232.07:54:10.65#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.232.07:54:10.65#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.232.07:54:10.65#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.232.07:54:10.65#ibcon#enter wrdev, iclass 39, count 0 2006.232.07:54:10.65#ibcon#first serial, iclass 39, count 0 2006.232.07:54:10.65#ibcon#enter sib2, iclass 39, count 0 2006.232.07:54:10.65#ibcon#flushed, iclass 39, count 0 2006.232.07:54:10.65#ibcon#about to write, iclass 39, count 0 2006.232.07:54:10.65#ibcon#wrote, iclass 39, count 0 2006.232.07:54:10.65#ibcon#about to read 3, iclass 39, count 0 2006.232.07:54:10.67#ibcon#read 3, iclass 39, count 0 2006.232.07:54:10.67#ibcon#about to read 4, iclass 39, count 0 2006.232.07:54:10.67#ibcon#read 4, iclass 39, count 0 2006.232.07:54:10.67#ibcon#about to read 5, iclass 39, count 0 2006.232.07:54:10.67#ibcon#read 5, iclass 39, count 0 2006.232.07:54:10.67#ibcon#about to read 6, iclass 39, count 0 2006.232.07:54:10.67#ibcon#read 6, iclass 39, count 0 2006.232.07:54:10.67#ibcon#end of sib2, iclass 39, count 0 2006.232.07:54:10.67#ibcon#*mode == 0, iclass 39, count 0 2006.232.07:54:10.67#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.232.07:54:10.67#ibcon#[28=FRQ=01,632.99\r\n] 2006.232.07:54:10.67#ibcon#*before write, iclass 39, count 0 2006.232.07:54:10.67#ibcon#enter sib2, iclass 39, count 0 2006.232.07:54:10.67#ibcon#flushed, iclass 39, count 0 2006.232.07:54:10.67#ibcon#about to write, iclass 39, count 0 2006.232.07:54:10.67#ibcon#wrote, iclass 39, count 0 2006.232.07:54:10.67#ibcon#about to read 3, iclass 39, count 0 2006.232.07:54:10.71#ibcon#read 3, iclass 39, count 0 2006.232.07:54:10.71#ibcon#about to read 4, iclass 39, count 0 2006.232.07:54:10.71#ibcon#read 4, iclass 39, count 0 2006.232.07:54:10.71#ibcon#about to read 5, iclass 39, count 0 2006.232.07:54:10.71#ibcon#read 5, iclass 39, count 0 2006.232.07:54:10.71#ibcon#about to read 6, iclass 39, count 0 2006.232.07:54:10.71#ibcon#read 6, iclass 39, count 0 2006.232.07:54:10.71#ibcon#end of sib2, iclass 39, count 0 2006.232.07:54:10.71#ibcon#*after write, iclass 39, count 0 2006.232.07:54:10.71#ibcon#*before return 0, iclass 39, count 0 2006.232.07:54:10.71#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.232.07:54:10.71#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.232.07:54:10.71#ibcon#about to clear, iclass 39 cls_cnt 0 2006.232.07:54:10.71#ibcon#cleared, iclass 39 cls_cnt 0 2006.232.07:54:10.71$vc4f8/vb=1,4 2006.232.07:54:10.71#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.232.07:54:10.71#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.232.07:54:10.71#ibcon#ireg 11 cls_cnt 2 2006.232.07:54:10.71#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.232.07:54:10.71#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.232.07:54:10.71#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.232.07:54:10.71#ibcon#enter wrdev, iclass 3, count 2 2006.232.07:54:10.71#ibcon#first serial, iclass 3, count 2 2006.232.07:54:10.71#ibcon#enter sib2, iclass 3, count 2 2006.232.07:54:10.71#ibcon#flushed, iclass 3, count 2 2006.232.07:54:10.71#ibcon#about to write, iclass 3, count 2 2006.232.07:54:10.71#ibcon#wrote, iclass 3, count 2 2006.232.07:54:10.71#ibcon#about to read 3, iclass 3, count 2 2006.232.07:54:10.73#ibcon#read 3, iclass 3, count 2 2006.232.07:54:10.73#ibcon#about to read 4, iclass 3, count 2 2006.232.07:54:10.73#ibcon#read 4, iclass 3, count 2 2006.232.07:54:10.73#ibcon#about to read 5, iclass 3, count 2 2006.232.07:54:10.73#ibcon#read 5, iclass 3, count 2 2006.232.07:54:10.73#ibcon#about to read 6, iclass 3, count 2 2006.232.07:54:10.73#ibcon#read 6, iclass 3, count 2 2006.232.07:54:10.73#ibcon#end of sib2, iclass 3, count 2 2006.232.07:54:10.73#ibcon#*mode == 0, iclass 3, count 2 2006.232.07:54:10.73#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.232.07:54:10.73#ibcon#[27=AT01-04\r\n] 2006.232.07:54:10.73#ibcon#*before write, iclass 3, count 2 2006.232.07:54:10.73#ibcon#enter sib2, iclass 3, count 2 2006.232.07:54:10.73#ibcon#flushed, iclass 3, count 2 2006.232.07:54:10.73#ibcon#about to write, iclass 3, count 2 2006.232.07:54:10.73#ibcon#wrote, iclass 3, count 2 2006.232.07:54:10.73#ibcon#about to read 3, iclass 3, count 2 2006.232.07:54:10.76#ibcon#read 3, iclass 3, count 2 2006.232.07:54:10.76#ibcon#about to read 4, iclass 3, count 2 2006.232.07:54:10.76#ibcon#read 4, iclass 3, count 2 2006.232.07:54:10.76#ibcon#about to read 5, iclass 3, count 2 2006.232.07:54:10.76#ibcon#read 5, iclass 3, count 2 2006.232.07:54:10.76#ibcon#about to read 6, iclass 3, count 2 2006.232.07:54:10.76#ibcon#read 6, iclass 3, count 2 2006.232.07:54:10.76#ibcon#end of sib2, iclass 3, count 2 2006.232.07:54:10.76#ibcon#*after write, iclass 3, count 2 2006.232.07:54:10.76#ibcon#*before return 0, iclass 3, count 2 2006.232.07:54:10.76#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.232.07:54:10.76#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.232.07:54:10.76#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.232.07:54:10.76#ibcon#ireg 7 cls_cnt 0 2006.232.07:54:10.76#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.232.07:54:10.88#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.232.07:54:10.88#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.232.07:54:10.88#ibcon#enter wrdev, iclass 3, count 0 2006.232.07:54:10.88#ibcon#first serial, iclass 3, count 0 2006.232.07:54:10.88#ibcon#enter sib2, iclass 3, count 0 2006.232.07:54:10.88#ibcon#flushed, iclass 3, count 0 2006.232.07:54:10.88#ibcon#about to write, iclass 3, count 0 2006.232.07:54:10.88#ibcon#wrote, iclass 3, count 0 2006.232.07:54:10.88#ibcon#about to read 3, iclass 3, count 0 2006.232.07:54:10.90#ibcon#read 3, iclass 3, count 0 2006.232.07:54:10.90#ibcon#about to read 4, iclass 3, count 0 2006.232.07:54:10.90#ibcon#read 4, iclass 3, count 0 2006.232.07:54:10.90#ibcon#about to read 5, iclass 3, count 0 2006.232.07:54:10.90#ibcon#read 5, iclass 3, count 0 2006.232.07:54:10.90#ibcon#about to read 6, iclass 3, count 0 2006.232.07:54:10.90#ibcon#read 6, iclass 3, count 0 2006.232.07:54:10.90#ibcon#end of sib2, iclass 3, count 0 2006.232.07:54:10.90#ibcon#*mode == 0, iclass 3, count 0 2006.232.07:54:10.90#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.232.07:54:10.90#ibcon#[27=USB\r\n] 2006.232.07:54:10.90#ibcon#*before write, iclass 3, count 0 2006.232.07:54:10.90#ibcon#enter sib2, iclass 3, count 0 2006.232.07:54:10.90#ibcon#flushed, iclass 3, count 0 2006.232.07:54:10.90#ibcon#about to write, iclass 3, count 0 2006.232.07:54:10.90#ibcon#wrote, iclass 3, count 0 2006.232.07:54:10.90#ibcon#about to read 3, iclass 3, count 0 2006.232.07:54:10.93#ibcon#read 3, iclass 3, count 0 2006.232.07:54:10.93#ibcon#about to read 4, iclass 3, count 0 2006.232.07:54:10.93#ibcon#read 4, iclass 3, count 0 2006.232.07:54:10.93#ibcon#about to read 5, iclass 3, count 0 2006.232.07:54:10.93#ibcon#read 5, iclass 3, count 0 2006.232.07:54:10.93#ibcon#about to read 6, iclass 3, count 0 2006.232.07:54:10.93#ibcon#read 6, iclass 3, count 0 2006.232.07:54:10.93#ibcon#end of sib2, iclass 3, count 0 2006.232.07:54:10.93#ibcon#*after write, iclass 3, count 0 2006.232.07:54:10.93#ibcon#*before return 0, iclass 3, count 0 2006.232.07:54:10.93#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.232.07:54:10.93#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.232.07:54:10.93#ibcon#about to clear, iclass 3 cls_cnt 0 2006.232.07:54:10.93#ibcon#cleared, iclass 3 cls_cnt 0 2006.232.07:54:10.93$vc4f8/vblo=2,640.99 2006.232.07:54:10.93#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.232.07:54:10.93#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.232.07:54:10.93#ibcon#ireg 17 cls_cnt 0 2006.232.07:54:10.93#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.232.07:54:10.93#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.232.07:54:10.93#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.232.07:54:10.93#ibcon#enter wrdev, iclass 5, count 0 2006.232.07:54:10.93#ibcon#first serial, iclass 5, count 0 2006.232.07:54:10.93#ibcon#enter sib2, iclass 5, count 0 2006.232.07:54:10.93#ibcon#flushed, iclass 5, count 0 2006.232.07:54:10.93#ibcon#about to write, iclass 5, count 0 2006.232.07:54:10.93#ibcon#wrote, iclass 5, count 0 2006.232.07:54:10.93#ibcon#about to read 3, iclass 5, count 0 2006.232.07:54:10.95#ibcon#read 3, iclass 5, count 0 2006.232.07:54:10.95#ibcon#about to read 4, iclass 5, count 0 2006.232.07:54:10.95#ibcon#read 4, iclass 5, count 0 2006.232.07:54:10.95#ibcon#about to read 5, iclass 5, count 0 2006.232.07:54:10.95#ibcon#read 5, iclass 5, count 0 2006.232.07:54:10.95#ibcon#about to read 6, iclass 5, count 0 2006.232.07:54:10.95#ibcon#read 6, iclass 5, count 0 2006.232.07:54:10.95#ibcon#end of sib2, iclass 5, count 0 2006.232.07:54:10.95#ibcon#*mode == 0, iclass 5, count 0 2006.232.07:54:10.95#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.232.07:54:10.95#ibcon#[28=FRQ=02,640.99\r\n] 2006.232.07:54:10.95#ibcon#*before write, iclass 5, count 0 2006.232.07:54:10.95#ibcon#enter sib2, iclass 5, count 0 2006.232.07:54:10.95#ibcon#flushed, iclass 5, count 0 2006.232.07:54:10.95#ibcon#about to write, iclass 5, count 0 2006.232.07:54:10.95#ibcon#wrote, iclass 5, count 0 2006.232.07:54:10.95#ibcon#about to read 3, iclass 5, count 0 2006.232.07:54:10.99#ibcon#read 3, iclass 5, count 0 2006.232.07:54:10.99#ibcon#about to read 4, iclass 5, count 0 2006.232.07:54:10.99#ibcon#read 4, iclass 5, count 0 2006.232.07:54:10.99#ibcon#about to read 5, iclass 5, count 0 2006.232.07:54:10.99#ibcon#read 5, iclass 5, count 0 2006.232.07:54:10.99#ibcon#about to read 6, iclass 5, count 0 2006.232.07:54:10.99#ibcon#read 6, iclass 5, count 0 2006.232.07:54:10.99#ibcon#end of sib2, iclass 5, count 0 2006.232.07:54:10.99#ibcon#*after write, iclass 5, count 0 2006.232.07:54:10.99#ibcon#*before return 0, iclass 5, count 0 2006.232.07:54:10.99#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.232.07:54:10.99#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.232.07:54:10.99#ibcon#about to clear, iclass 5 cls_cnt 0 2006.232.07:54:10.99#ibcon#cleared, iclass 5 cls_cnt 0 2006.232.07:54:10.99$vc4f8/vb=2,4 2006.232.07:54:10.99#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.232.07:54:10.99#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.232.07:54:10.99#ibcon#ireg 11 cls_cnt 2 2006.232.07:54:10.99#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.232.07:54:11.05#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.232.07:54:11.05#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.232.07:54:11.05#ibcon#enter wrdev, iclass 7, count 2 2006.232.07:54:11.05#ibcon#first serial, iclass 7, count 2 2006.232.07:54:11.05#ibcon#enter sib2, iclass 7, count 2 2006.232.07:54:11.05#ibcon#flushed, iclass 7, count 2 2006.232.07:54:11.05#ibcon#about to write, iclass 7, count 2 2006.232.07:54:11.05#ibcon#wrote, iclass 7, count 2 2006.232.07:54:11.05#ibcon#about to read 3, iclass 7, count 2 2006.232.07:54:11.07#ibcon#read 3, iclass 7, count 2 2006.232.07:54:11.07#ibcon#about to read 4, iclass 7, count 2 2006.232.07:54:11.07#ibcon#read 4, iclass 7, count 2 2006.232.07:54:11.07#ibcon#about to read 5, iclass 7, count 2 2006.232.07:54:11.07#ibcon#read 5, iclass 7, count 2 2006.232.07:54:11.07#ibcon#about to read 6, iclass 7, count 2 2006.232.07:54:11.07#ibcon#read 6, iclass 7, count 2 2006.232.07:54:11.07#ibcon#end of sib2, iclass 7, count 2 2006.232.07:54:11.07#ibcon#*mode == 0, iclass 7, count 2 2006.232.07:54:11.07#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.232.07:54:11.07#ibcon#[27=AT02-04\r\n] 2006.232.07:54:11.07#ibcon#*before write, iclass 7, count 2 2006.232.07:54:11.07#ibcon#enter sib2, iclass 7, count 2 2006.232.07:54:11.07#ibcon#flushed, iclass 7, count 2 2006.232.07:54:11.07#ibcon#about to write, iclass 7, count 2 2006.232.07:54:11.07#ibcon#wrote, iclass 7, count 2 2006.232.07:54:11.07#ibcon#about to read 3, iclass 7, count 2 2006.232.07:54:11.10#ibcon#read 3, iclass 7, count 2 2006.232.07:54:11.10#ibcon#about to read 4, iclass 7, count 2 2006.232.07:54:11.10#ibcon#read 4, iclass 7, count 2 2006.232.07:54:11.10#ibcon#about to read 5, iclass 7, count 2 2006.232.07:54:11.10#ibcon#read 5, iclass 7, count 2 2006.232.07:54:11.10#ibcon#about to read 6, iclass 7, count 2 2006.232.07:54:11.10#ibcon#read 6, iclass 7, count 2 2006.232.07:54:11.10#ibcon#end of sib2, iclass 7, count 2 2006.232.07:54:11.10#ibcon#*after write, iclass 7, count 2 2006.232.07:54:11.10#ibcon#*before return 0, iclass 7, count 2 2006.232.07:54:11.10#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.232.07:54:11.10#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.232.07:54:11.10#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.232.07:54:11.10#ibcon#ireg 7 cls_cnt 0 2006.232.07:54:11.10#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.232.07:54:11.22#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.232.07:54:11.22#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.232.07:54:11.22#ibcon#enter wrdev, iclass 7, count 0 2006.232.07:54:11.22#ibcon#first serial, iclass 7, count 0 2006.232.07:54:11.22#ibcon#enter sib2, iclass 7, count 0 2006.232.07:54:11.22#ibcon#flushed, iclass 7, count 0 2006.232.07:54:11.22#ibcon#about to write, iclass 7, count 0 2006.232.07:54:11.22#ibcon#wrote, iclass 7, count 0 2006.232.07:54:11.22#ibcon#about to read 3, iclass 7, count 0 2006.232.07:54:11.24#ibcon#read 3, iclass 7, count 0 2006.232.07:54:11.24#ibcon#about to read 4, iclass 7, count 0 2006.232.07:54:11.24#ibcon#read 4, iclass 7, count 0 2006.232.07:54:11.24#ibcon#about to read 5, iclass 7, count 0 2006.232.07:54:11.24#ibcon#read 5, iclass 7, count 0 2006.232.07:54:11.24#ibcon#about to read 6, iclass 7, count 0 2006.232.07:54:11.24#ibcon#read 6, iclass 7, count 0 2006.232.07:54:11.24#ibcon#end of sib2, iclass 7, count 0 2006.232.07:54:11.24#ibcon#*mode == 0, iclass 7, count 0 2006.232.07:54:11.24#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.232.07:54:11.24#ibcon#[27=USB\r\n] 2006.232.07:54:11.24#ibcon#*before write, iclass 7, count 0 2006.232.07:54:11.24#ibcon#enter sib2, iclass 7, count 0 2006.232.07:54:11.24#ibcon#flushed, iclass 7, count 0 2006.232.07:54:11.24#ibcon#about to write, iclass 7, count 0 2006.232.07:54:11.24#ibcon#wrote, iclass 7, count 0 2006.232.07:54:11.24#ibcon#about to read 3, iclass 7, count 0 2006.232.07:54:11.27#ibcon#read 3, iclass 7, count 0 2006.232.07:54:11.27#ibcon#about to read 4, iclass 7, count 0 2006.232.07:54:11.27#ibcon#read 4, iclass 7, count 0 2006.232.07:54:11.27#ibcon#about to read 5, iclass 7, count 0 2006.232.07:54:11.27#ibcon#read 5, iclass 7, count 0 2006.232.07:54:11.27#ibcon#about to read 6, iclass 7, count 0 2006.232.07:54:11.27#ibcon#read 6, iclass 7, count 0 2006.232.07:54:11.27#ibcon#end of sib2, iclass 7, count 0 2006.232.07:54:11.27#ibcon#*after write, iclass 7, count 0 2006.232.07:54:11.27#ibcon#*before return 0, iclass 7, count 0 2006.232.07:54:11.27#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.232.07:54:11.27#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.232.07:54:11.27#ibcon#about to clear, iclass 7 cls_cnt 0 2006.232.07:54:11.27#ibcon#cleared, iclass 7 cls_cnt 0 2006.232.07:54:11.27$vc4f8/vblo=3,656.99 2006.232.07:54:11.27#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.232.07:54:11.27#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.232.07:54:11.27#ibcon#ireg 17 cls_cnt 0 2006.232.07:54:11.27#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.232.07:54:11.27#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.232.07:54:11.27#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.232.07:54:11.27#ibcon#enter wrdev, iclass 11, count 0 2006.232.07:54:11.27#ibcon#first serial, iclass 11, count 0 2006.232.07:54:11.27#ibcon#enter sib2, iclass 11, count 0 2006.232.07:54:11.27#ibcon#flushed, iclass 11, count 0 2006.232.07:54:11.27#ibcon#about to write, iclass 11, count 0 2006.232.07:54:11.27#ibcon#wrote, iclass 11, count 0 2006.232.07:54:11.27#ibcon#about to read 3, iclass 11, count 0 2006.232.07:54:11.29#ibcon#read 3, iclass 11, count 0 2006.232.07:54:11.29#ibcon#about to read 4, iclass 11, count 0 2006.232.07:54:11.29#ibcon#read 4, iclass 11, count 0 2006.232.07:54:11.29#ibcon#about to read 5, iclass 11, count 0 2006.232.07:54:11.29#ibcon#read 5, iclass 11, count 0 2006.232.07:54:11.29#ibcon#about to read 6, iclass 11, count 0 2006.232.07:54:11.29#ibcon#read 6, iclass 11, count 0 2006.232.07:54:11.29#ibcon#end of sib2, iclass 11, count 0 2006.232.07:54:11.29#ibcon#*mode == 0, iclass 11, count 0 2006.232.07:54:11.29#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.232.07:54:11.29#ibcon#[28=FRQ=03,656.99\r\n] 2006.232.07:54:11.29#ibcon#*before write, iclass 11, count 0 2006.232.07:54:11.29#ibcon#enter sib2, iclass 11, count 0 2006.232.07:54:11.29#ibcon#flushed, iclass 11, count 0 2006.232.07:54:11.29#ibcon#about to write, iclass 11, count 0 2006.232.07:54:11.29#ibcon#wrote, iclass 11, count 0 2006.232.07:54:11.29#ibcon#about to read 3, iclass 11, count 0 2006.232.07:54:11.33#ibcon#read 3, iclass 11, count 0 2006.232.07:54:11.33#ibcon#about to read 4, iclass 11, count 0 2006.232.07:54:11.33#ibcon#read 4, iclass 11, count 0 2006.232.07:54:11.33#ibcon#about to read 5, iclass 11, count 0 2006.232.07:54:11.33#ibcon#read 5, iclass 11, count 0 2006.232.07:54:11.33#ibcon#about to read 6, iclass 11, count 0 2006.232.07:54:11.33#ibcon#read 6, iclass 11, count 0 2006.232.07:54:11.33#ibcon#end of sib2, iclass 11, count 0 2006.232.07:54:11.33#ibcon#*after write, iclass 11, count 0 2006.232.07:54:11.33#ibcon#*before return 0, iclass 11, count 0 2006.232.07:54:11.33#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.232.07:54:11.33#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.232.07:54:11.33#ibcon#about to clear, iclass 11 cls_cnt 0 2006.232.07:54:11.33#ibcon#cleared, iclass 11 cls_cnt 0 2006.232.07:54:11.33$vc4f8/vb=3,4 2006.232.07:54:11.33#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.232.07:54:11.33#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.232.07:54:11.33#ibcon#ireg 11 cls_cnt 2 2006.232.07:54:11.33#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.232.07:54:11.39#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.232.07:54:11.39#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.232.07:54:11.39#ibcon#enter wrdev, iclass 13, count 2 2006.232.07:54:11.39#ibcon#first serial, iclass 13, count 2 2006.232.07:54:11.39#ibcon#enter sib2, iclass 13, count 2 2006.232.07:54:11.39#ibcon#flushed, iclass 13, count 2 2006.232.07:54:11.39#ibcon#about to write, iclass 13, count 2 2006.232.07:54:11.39#ibcon#wrote, iclass 13, count 2 2006.232.07:54:11.39#ibcon#about to read 3, iclass 13, count 2 2006.232.07:54:11.41#ibcon#read 3, iclass 13, count 2 2006.232.07:54:11.41#ibcon#about to read 4, iclass 13, count 2 2006.232.07:54:11.41#ibcon#read 4, iclass 13, count 2 2006.232.07:54:11.41#ibcon#about to read 5, iclass 13, count 2 2006.232.07:54:11.41#ibcon#read 5, iclass 13, count 2 2006.232.07:54:11.41#ibcon#about to read 6, iclass 13, count 2 2006.232.07:54:11.41#ibcon#read 6, iclass 13, count 2 2006.232.07:54:11.41#ibcon#end of sib2, iclass 13, count 2 2006.232.07:54:11.41#ibcon#*mode == 0, iclass 13, count 2 2006.232.07:54:11.41#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.232.07:54:11.41#ibcon#[27=AT03-04\r\n] 2006.232.07:54:11.41#ibcon#*before write, iclass 13, count 2 2006.232.07:54:11.41#ibcon#enter sib2, iclass 13, count 2 2006.232.07:54:11.41#ibcon#flushed, iclass 13, count 2 2006.232.07:54:11.41#ibcon#about to write, iclass 13, count 2 2006.232.07:54:11.41#ibcon#wrote, iclass 13, count 2 2006.232.07:54:11.41#ibcon#about to read 3, iclass 13, count 2 2006.232.07:54:11.44#ibcon#read 3, iclass 13, count 2 2006.232.07:54:11.44#ibcon#about to read 4, iclass 13, count 2 2006.232.07:54:11.44#ibcon#read 4, iclass 13, count 2 2006.232.07:54:11.44#ibcon#about to read 5, iclass 13, count 2 2006.232.07:54:11.44#ibcon#read 5, iclass 13, count 2 2006.232.07:54:11.44#ibcon#about to read 6, iclass 13, count 2 2006.232.07:54:11.44#ibcon#read 6, iclass 13, count 2 2006.232.07:54:11.44#ibcon#end of sib2, iclass 13, count 2 2006.232.07:54:11.44#ibcon#*after write, iclass 13, count 2 2006.232.07:54:11.44#ibcon#*before return 0, iclass 13, count 2 2006.232.07:54:11.44#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.232.07:54:11.44#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.232.07:54:11.44#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.232.07:54:11.44#ibcon#ireg 7 cls_cnt 0 2006.232.07:54:11.44#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.232.07:54:11.56#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.232.07:54:11.56#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.232.07:54:11.56#ibcon#enter wrdev, iclass 13, count 0 2006.232.07:54:11.56#ibcon#first serial, iclass 13, count 0 2006.232.07:54:11.56#ibcon#enter sib2, iclass 13, count 0 2006.232.07:54:11.56#ibcon#flushed, iclass 13, count 0 2006.232.07:54:11.56#ibcon#about to write, iclass 13, count 0 2006.232.07:54:11.56#ibcon#wrote, iclass 13, count 0 2006.232.07:54:11.56#ibcon#about to read 3, iclass 13, count 0 2006.232.07:54:11.58#ibcon#read 3, iclass 13, count 0 2006.232.07:54:11.58#ibcon#about to read 4, iclass 13, count 0 2006.232.07:54:11.58#ibcon#read 4, iclass 13, count 0 2006.232.07:54:11.58#ibcon#about to read 5, iclass 13, count 0 2006.232.07:54:11.58#ibcon#read 5, iclass 13, count 0 2006.232.07:54:11.58#ibcon#about to read 6, iclass 13, count 0 2006.232.07:54:11.58#ibcon#read 6, iclass 13, count 0 2006.232.07:54:11.58#ibcon#end of sib2, iclass 13, count 0 2006.232.07:54:11.58#ibcon#*mode == 0, iclass 13, count 0 2006.232.07:54:11.58#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.232.07:54:11.58#ibcon#[27=USB\r\n] 2006.232.07:54:11.58#ibcon#*before write, iclass 13, count 0 2006.232.07:54:11.58#ibcon#enter sib2, iclass 13, count 0 2006.232.07:54:11.58#ibcon#flushed, iclass 13, count 0 2006.232.07:54:11.58#ibcon#about to write, iclass 13, count 0 2006.232.07:54:11.58#ibcon#wrote, iclass 13, count 0 2006.232.07:54:11.58#ibcon#about to read 3, iclass 13, count 0 2006.232.07:54:11.61#ibcon#read 3, iclass 13, count 0 2006.232.07:54:11.61#ibcon#about to read 4, iclass 13, count 0 2006.232.07:54:11.61#ibcon#read 4, iclass 13, count 0 2006.232.07:54:11.61#ibcon#about to read 5, iclass 13, count 0 2006.232.07:54:11.61#ibcon#read 5, iclass 13, count 0 2006.232.07:54:11.61#ibcon#about to read 6, iclass 13, count 0 2006.232.07:54:11.61#ibcon#read 6, iclass 13, count 0 2006.232.07:54:11.61#ibcon#end of sib2, iclass 13, count 0 2006.232.07:54:11.61#ibcon#*after write, iclass 13, count 0 2006.232.07:54:11.61#ibcon#*before return 0, iclass 13, count 0 2006.232.07:54:11.61#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.232.07:54:11.61#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.232.07:54:11.61#ibcon#about to clear, iclass 13 cls_cnt 0 2006.232.07:54:11.61#ibcon#cleared, iclass 13 cls_cnt 0 2006.232.07:54:11.61$vc4f8/vblo=4,712.99 2006.232.07:54:11.61#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.232.07:54:11.61#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.232.07:54:11.61#ibcon#ireg 17 cls_cnt 0 2006.232.07:54:11.61#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.232.07:54:11.61#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.232.07:54:11.61#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.232.07:54:11.61#ibcon#enter wrdev, iclass 15, count 0 2006.232.07:54:11.61#ibcon#first serial, iclass 15, count 0 2006.232.07:54:11.61#ibcon#enter sib2, iclass 15, count 0 2006.232.07:54:11.61#ibcon#flushed, iclass 15, count 0 2006.232.07:54:11.61#ibcon#about to write, iclass 15, count 0 2006.232.07:54:11.61#ibcon#wrote, iclass 15, count 0 2006.232.07:54:11.61#ibcon#about to read 3, iclass 15, count 0 2006.232.07:54:11.63#ibcon#read 3, iclass 15, count 0 2006.232.07:54:11.63#ibcon#about to read 4, iclass 15, count 0 2006.232.07:54:11.63#ibcon#read 4, iclass 15, count 0 2006.232.07:54:11.63#ibcon#about to read 5, iclass 15, count 0 2006.232.07:54:11.63#ibcon#read 5, iclass 15, count 0 2006.232.07:54:11.63#ibcon#about to read 6, iclass 15, count 0 2006.232.07:54:11.63#ibcon#read 6, iclass 15, count 0 2006.232.07:54:11.63#ibcon#end of sib2, iclass 15, count 0 2006.232.07:54:11.63#ibcon#*mode == 0, iclass 15, count 0 2006.232.07:54:11.63#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.232.07:54:11.63#ibcon#[28=FRQ=04,712.99\r\n] 2006.232.07:54:11.63#ibcon#*before write, iclass 15, count 0 2006.232.07:54:11.63#ibcon#enter sib2, iclass 15, count 0 2006.232.07:54:11.63#ibcon#flushed, iclass 15, count 0 2006.232.07:54:11.63#ibcon#about to write, iclass 15, count 0 2006.232.07:54:11.63#ibcon#wrote, iclass 15, count 0 2006.232.07:54:11.63#ibcon#about to read 3, iclass 15, count 0 2006.232.07:54:11.67#ibcon#read 3, iclass 15, count 0 2006.232.07:54:11.67#ibcon#about to read 4, iclass 15, count 0 2006.232.07:54:11.67#ibcon#read 4, iclass 15, count 0 2006.232.07:54:11.67#ibcon#about to read 5, iclass 15, count 0 2006.232.07:54:11.67#ibcon#read 5, iclass 15, count 0 2006.232.07:54:11.67#ibcon#about to read 6, iclass 15, count 0 2006.232.07:54:11.67#ibcon#read 6, iclass 15, count 0 2006.232.07:54:11.67#ibcon#end of sib2, iclass 15, count 0 2006.232.07:54:11.67#ibcon#*after write, iclass 15, count 0 2006.232.07:54:11.67#ibcon#*before return 0, iclass 15, count 0 2006.232.07:54:11.67#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.232.07:54:11.67#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.232.07:54:11.67#ibcon#about to clear, iclass 15 cls_cnt 0 2006.232.07:54:11.67#ibcon#cleared, iclass 15 cls_cnt 0 2006.232.07:54:11.67$vc4f8/vb=4,4 2006.232.07:54:11.67#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.232.07:54:11.67#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.232.07:54:11.67#ibcon#ireg 11 cls_cnt 2 2006.232.07:54:11.67#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.232.07:54:11.73#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.232.07:54:11.73#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.232.07:54:11.73#ibcon#enter wrdev, iclass 17, count 2 2006.232.07:54:11.73#ibcon#first serial, iclass 17, count 2 2006.232.07:54:11.73#ibcon#enter sib2, iclass 17, count 2 2006.232.07:54:11.73#ibcon#flushed, iclass 17, count 2 2006.232.07:54:11.73#ibcon#about to write, iclass 17, count 2 2006.232.07:54:11.73#ibcon#wrote, iclass 17, count 2 2006.232.07:54:11.73#ibcon#about to read 3, iclass 17, count 2 2006.232.07:54:11.75#ibcon#read 3, iclass 17, count 2 2006.232.07:54:11.75#ibcon#about to read 4, iclass 17, count 2 2006.232.07:54:11.75#ibcon#read 4, iclass 17, count 2 2006.232.07:54:11.75#ibcon#about to read 5, iclass 17, count 2 2006.232.07:54:11.75#ibcon#read 5, iclass 17, count 2 2006.232.07:54:11.75#ibcon#about to read 6, iclass 17, count 2 2006.232.07:54:11.75#ibcon#read 6, iclass 17, count 2 2006.232.07:54:11.75#ibcon#end of sib2, iclass 17, count 2 2006.232.07:54:11.75#ibcon#*mode == 0, iclass 17, count 2 2006.232.07:54:11.75#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.232.07:54:11.75#ibcon#[27=AT04-04\r\n] 2006.232.07:54:11.75#ibcon#*before write, iclass 17, count 2 2006.232.07:54:11.75#ibcon#enter sib2, iclass 17, count 2 2006.232.07:54:11.75#ibcon#flushed, iclass 17, count 2 2006.232.07:54:11.75#ibcon#about to write, iclass 17, count 2 2006.232.07:54:11.75#ibcon#wrote, iclass 17, count 2 2006.232.07:54:11.75#ibcon#about to read 3, iclass 17, count 2 2006.232.07:54:11.78#ibcon#read 3, iclass 17, count 2 2006.232.07:54:11.78#ibcon#about to read 4, iclass 17, count 2 2006.232.07:54:11.78#ibcon#read 4, iclass 17, count 2 2006.232.07:54:11.78#ibcon#about to read 5, iclass 17, count 2 2006.232.07:54:11.78#ibcon#read 5, iclass 17, count 2 2006.232.07:54:11.78#ibcon#about to read 6, iclass 17, count 2 2006.232.07:54:11.78#ibcon#read 6, iclass 17, count 2 2006.232.07:54:11.78#ibcon#end of sib2, iclass 17, count 2 2006.232.07:54:11.78#ibcon#*after write, iclass 17, count 2 2006.232.07:54:11.78#ibcon#*before return 0, iclass 17, count 2 2006.232.07:54:11.78#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.232.07:54:11.78#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.232.07:54:11.78#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.232.07:54:11.78#ibcon#ireg 7 cls_cnt 0 2006.232.07:54:11.78#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.232.07:54:11.90#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.232.07:54:11.90#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.232.07:54:11.90#ibcon#enter wrdev, iclass 17, count 0 2006.232.07:54:11.90#ibcon#first serial, iclass 17, count 0 2006.232.07:54:11.90#ibcon#enter sib2, iclass 17, count 0 2006.232.07:54:11.90#ibcon#flushed, iclass 17, count 0 2006.232.07:54:11.90#ibcon#about to write, iclass 17, count 0 2006.232.07:54:11.90#ibcon#wrote, iclass 17, count 0 2006.232.07:54:11.90#ibcon#about to read 3, iclass 17, count 0 2006.232.07:54:11.92#ibcon#read 3, iclass 17, count 0 2006.232.07:54:11.92#ibcon#about to read 4, iclass 17, count 0 2006.232.07:54:11.92#ibcon#read 4, iclass 17, count 0 2006.232.07:54:11.92#ibcon#about to read 5, iclass 17, count 0 2006.232.07:54:11.92#ibcon#read 5, iclass 17, count 0 2006.232.07:54:11.92#ibcon#about to read 6, iclass 17, count 0 2006.232.07:54:11.92#ibcon#read 6, iclass 17, count 0 2006.232.07:54:11.92#ibcon#end of sib2, iclass 17, count 0 2006.232.07:54:11.92#ibcon#*mode == 0, iclass 17, count 0 2006.232.07:54:11.92#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.232.07:54:11.92#ibcon#[27=USB\r\n] 2006.232.07:54:11.92#ibcon#*before write, iclass 17, count 0 2006.232.07:54:11.92#ibcon#enter sib2, iclass 17, count 0 2006.232.07:54:11.92#ibcon#flushed, iclass 17, count 0 2006.232.07:54:11.92#ibcon#about to write, iclass 17, count 0 2006.232.07:54:11.92#ibcon#wrote, iclass 17, count 0 2006.232.07:54:11.92#ibcon#about to read 3, iclass 17, count 0 2006.232.07:54:11.95#ibcon#read 3, iclass 17, count 0 2006.232.07:54:11.95#ibcon#about to read 4, iclass 17, count 0 2006.232.07:54:11.95#ibcon#read 4, iclass 17, count 0 2006.232.07:54:11.95#ibcon#about to read 5, iclass 17, count 0 2006.232.07:54:11.95#ibcon#read 5, iclass 17, count 0 2006.232.07:54:11.95#ibcon#about to read 6, iclass 17, count 0 2006.232.07:54:11.95#ibcon#read 6, iclass 17, count 0 2006.232.07:54:11.95#ibcon#end of sib2, iclass 17, count 0 2006.232.07:54:11.95#ibcon#*after write, iclass 17, count 0 2006.232.07:54:11.95#ibcon#*before return 0, iclass 17, count 0 2006.232.07:54:11.95#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.232.07:54:11.95#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.232.07:54:11.95#ibcon#about to clear, iclass 17 cls_cnt 0 2006.232.07:54:11.95#ibcon#cleared, iclass 17 cls_cnt 0 2006.232.07:54:11.95$vc4f8/vblo=5,744.99 2006.232.07:54:11.95#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.232.07:54:11.95#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.232.07:54:11.95#ibcon#ireg 17 cls_cnt 0 2006.232.07:54:11.95#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.232.07:54:11.95#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.232.07:54:11.95#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.232.07:54:11.95#ibcon#enter wrdev, iclass 19, count 0 2006.232.07:54:11.95#ibcon#first serial, iclass 19, count 0 2006.232.07:54:11.95#ibcon#enter sib2, iclass 19, count 0 2006.232.07:54:11.95#ibcon#flushed, iclass 19, count 0 2006.232.07:54:11.95#ibcon#about to write, iclass 19, count 0 2006.232.07:54:11.95#ibcon#wrote, iclass 19, count 0 2006.232.07:54:11.95#ibcon#about to read 3, iclass 19, count 0 2006.232.07:54:11.97#ibcon#read 3, iclass 19, count 0 2006.232.07:54:11.97#ibcon#about to read 4, iclass 19, count 0 2006.232.07:54:11.97#ibcon#read 4, iclass 19, count 0 2006.232.07:54:11.97#ibcon#about to read 5, iclass 19, count 0 2006.232.07:54:11.97#ibcon#read 5, iclass 19, count 0 2006.232.07:54:11.97#ibcon#about to read 6, iclass 19, count 0 2006.232.07:54:11.97#ibcon#read 6, iclass 19, count 0 2006.232.07:54:11.97#ibcon#end of sib2, iclass 19, count 0 2006.232.07:54:11.97#ibcon#*mode == 0, iclass 19, count 0 2006.232.07:54:11.97#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.232.07:54:11.97#ibcon#[28=FRQ=05,744.99\r\n] 2006.232.07:54:11.97#ibcon#*before write, iclass 19, count 0 2006.232.07:54:11.97#ibcon#enter sib2, iclass 19, count 0 2006.232.07:54:11.97#ibcon#flushed, iclass 19, count 0 2006.232.07:54:11.97#ibcon#about to write, iclass 19, count 0 2006.232.07:54:11.97#ibcon#wrote, iclass 19, count 0 2006.232.07:54:11.97#ibcon#about to read 3, iclass 19, count 0 2006.232.07:54:12.01#ibcon#read 3, iclass 19, count 0 2006.232.07:54:12.01#ibcon#about to read 4, iclass 19, count 0 2006.232.07:54:12.01#ibcon#read 4, iclass 19, count 0 2006.232.07:54:12.01#ibcon#about to read 5, iclass 19, count 0 2006.232.07:54:12.01#ibcon#read 5, iclass 19, count 0 2006.232.07:54:12.01#ibcon#about to read 6, iclass 19, count 0 2006.232.07:54:12.01#ibcon#read 6, iclass 19, count 0 2006.232.07:54:12.01#ibcon#end of sib2, iclass 19, count 0 2006.232.07:54:12.01#ibcon#*after write, iclass 19, count 0 2006.232.07:54:12.01#ibcon#*before return 0, iclass 19, count 0 2006.232.07:54:12.01#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.232.07:54:12.01#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.232.07:54:12.01#ibcon#about to clear, iclass 19 cls_cnt 0 2006.232.07:54:12.01#ibcon#cleared, iclass 19 cls_cnt 0 2006.232.07:54:12.01$vc4f8/vb=5,3 2006.232.07:54:12.01#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.232.07:54:12.01#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.232.07:54:12.01#ibcon#ireg 11 cls_cnt 2 2006.232.07:54:12.01#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.232.07:54:12.07#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.232.07:54:12.07#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.232.07:54:12.07#ibcon#enter wrdev, iclass 21, count 2 2006.232.07:54:12.07#ibcon#first serial, iclass 21, count 2 2006.232.07:54:12.07#ibcon#enter sib2, iclass 21, count 2 2006.232.07:54:12.07#ibcon#flushed, iclass 21, count 2 2006.232.07:54:12.07#ibcon#about to write, iclass 21, count 2 2006.232.07:54:12.07#ibcon#wrote, iclass 21, count 2 2006.232.07:54:12.07#ibcon#about to read 3, iclass 21, count 2 2006.232.07:54:12.09#ibcon#read 3, iclass 21, count 2 2006.232.07:54:12.09#ibcon#about to read 4, iclass 21, count 2 2006.232.07:54:12.09#ibcon#read 4, iclass 21, count 2 2006.232.07:54:12.09#ibcon#about to read 5, iclass 21, count 2 2006.232.07:54:12.09#ibcon#read 5, iclass 21, count 2 2006.232.07:54:12.09#ibcon#about to read 6, iclass 21, count 2 2006.232.07:54:12.09#ibcon#read 6, iclass 21, count 2 2006.232.07:54:12.09#ibcon#end of sib2, iclass 21, count 2 2006.232.07:54:12.09#ibcon#*mode == 0, iclass 21, count 2 2006.232.07:54:12.09#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.232.07:54:12.09#ibcon#[27=AT05-03\r\n] 2006.232.07:54:12.09#ibcon#*before write, iclass 21, count 2 2006.232.07:54:12.09#ibcon#enter sib2, iclass 21, count 2 2006.232.07:54:12.09#ibcon#flushed, iclass 21, count 2 2006.232.07:54:12.09#ibcon#about to write, iclass 21, count 2 2006.232.07:54:12.09#ibcon#wrote, iclass 21, count 2 2006.232.07:54:12.09#ibcon#about to read 3, iclass 21, count 2 2006.232.07:54:12.12#ibcon#read 3, iclass 21, count 2 2006.232.07:54:12.12#ibcon#about to read 4, iclass 21, count 2 2006.232.07:54:12.12#ibcon#read 4, iclass 21, count 2 2006.232.07:54:12.12#ibcon#about to read 5, iclass 21, count 2 2006.232.07:54:12.12#ibcon#read 5, iclass 21, count 2 2006.232.07:54:12.12#ibcon#about to read 6, iclass 21, count 2 2006.232.07:54:12.12#ibcon#read 6, iclass 21, count 2 2006.232.07:54:12.12#ibcon#end of sib2, iclass 21, count 2 2006.232.07:54:12.12#ibcon#*after write, iclass 21, count 2 2006.232.07:54:12.12#ibcon#*before return 0, iclass 21, count 2 2006.232.07:54:12.12#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.232.07:54:12.12#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.232.07:54:12.12#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.232.07:54:12.12#ibcon#ireg 7 cls_cnt 0 2006.232.07:54:12.12#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.232.07:54:12.24#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.232.07:54:12.24#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.232.07:54:12.24#ibcon#enter wrdev, iclass 21, count 0 2006.232.07:54:12.24#ibcon#first serial, iclass 21, count 0 2006.232.07:54:12.24#ibcon#enter sib2, iclass 21, count 0 2006.232.07:54:12.24#ibcon#flushed, iclass 21, count 0 2006.232.07:54:12.24#ibcon#about to write, iclass 21, count 0 2006.232.07:54:12.24#ibcon#wrote, iclass 21, count 0 2006.232.07:54:12.24#ibcon#about to read 3, iclass 21, count 0 2006.232.07:54:12.26#ibcon#read 3, iclass 21, count 0 2006.232.07:54:12.26#ibcon#about to read 4, iclass 21, count 0 2006.232.07:54:12.26#ibcon#read 4, iclass 21, count 0 2006.232.07:54:12.26#ibcon#about to read 5, iclass 21, count 0 2006.232.07:54:12.26#ibcon#read 5, iclass 21, count 0 2006.232.07:54:12.26#ibcon#about to read 6, iclass 21, count 0 2006.232.07:54:12.26#ibcon#read 6, iclass 21, count 0 2006.232.07:54:12.26#ibcon#end of sib2, iclass 21, count 0 2006.232.07:54:12.26#ibcon#*mode == 0, iclass 21, count 0 2006.232.07:54:12.26#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.232.07:54:12.26#ibcon#[27=USB\r\n] 2006.232.07:54:12.26#ibcon#*before write, iclass 21, count 0 2006.232.07:54:12.26#ibcon#enter sib2, iclass 21, count 0 2006.232.07:54:12.26#ibcon#flushed, iclass 21, count 0 2006.232.07:54:12.26#ibcon#about to write, iclass 21, count 0 2006.232.07:54:12.26#ibcon#wrote, iclass 21, count 0 2006.232.07:54:12.26#ibcon#about to read 3, iclass 21, count 0 2006.232.07:54:12.29#ibcon#read 3, iclass 21, count 0 2006.232.07:54:12.29#ibcon#about to read 4, iclass 21, count 0 2006.232.07:54:12.29#ibcon#read 4, iclass 21, count 0 2006.232.07:54:12.29#ibcon#about to read 5, iclass 21, count 0 2006.232.07:54:12.29#ibcon#read 5, iclass 21, count 0 2006.232.07:54:12.29#ibcon#about to read 6, iclass 21, count 0 2006.232.07:54:12.29#ibcon#read 6, iclass 21, count 0 2006.232.07:54:12.29#ibcon#end of sib2, iclass 21, count 0 2006.232.07:54:12.29#ibcon#*after write, iclass 21, count 0 2006.232.07:54:12.29#ibcon#*before return 0, iclass 21, count 0 2006.232.07:54:12.29#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.232.07:54:12.29#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.232.07:54:12.29#ibcon#about to clear, iclass 21 cls_cnt 0 2006.232.07:54:12.29#ibcon#cleared, iclass 21 cls_cnt 0 2006.232.07:54:12.29$vc4f8/vblo=6,752.99 2006.232.07:54:12.29#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.232.07:54:12.29#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.232.07:54:12.29#ibcon#ireg 17 cls_cnt 0 2006.232.07:54:12.29#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.232.07:54:12.29#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.232.07:54:12.29#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.232.07:54:12.29#ibcon#enter wrdev, iclass 23, count 0 2006.232.07:54:12.29#ibcon#first serial, iclass 23, count 0 2006.232.07:54:12.29#ibcon#enter sib2, iclass 23, count 0 2006.232.07:54:12.29#ibcon#flushed, iclass 23, count 0 2006.232.07:54:12.29#ibcon#about to write, iclass 23, count 0 2006.232.07:54:12.29#ibcon#wrote, iclass 23, count 0 2006.232.07:54:12.29#ibcon#about to read 3, iclass 23, count 0 2006.232.07:54:12.31#ibcon#read 3, iclass 23, count 0 2006.232.07:54:12.31#ibcon#about to read 4, iclass 23, count 0 2006.232.07:54:12.31#ibcon#read 4, iclass 23, count 0 2006.232.07:54:12.31#ibcon#about to read 5, iclass 23, count 0 2006.232.07:54:12.31#ibcon#read 5, iclass 23, count 0 2006.232.07:54:12.31#ibcon#about to read 6, iclass 23, count 0 2006.232.07:54:12.31#ibcon#read 6, iclass 23, count 0 2006.232.07:54:12.31#ibcon#end of sib2, iclass 23, count 0 2006.232.07:54:12.31#ibcon#*mode == 0, iclass 23, count 0 2006.232.07:54:12.31#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.232.07:54:12.31#ibcon#[28=FRQ=06,752.99\r\n] 2006.232.07:54:12.31#ibcon#*before write, iclass 23, count 0 2006.232.07:54:12.31#ibcon#enter sib2, iclass 23, count 0 2006.232.07:54:12.31#ibcon#flushed, iclass 23, count 0 2006.232.07:54:12.31#ibcon#about to write, iclass 23, count 0 2006.232.07:54:12.31#ibcon#wrote, iclass 23, count 0 2006.232.07:54:12.31#ibcon#about to read 3, iclass 23, count 0 2006.232.07:54:12.35#ibcon#read 3, iclass 23, count 0 2006.232.07:54:12.35#ibcon#about to read 4, iclass 23, count 0 2006.232.07:54:12.35#ibcon#read 4, iclass 23, count 0 2006.232.07:54:12.35#ibcon#about to read 5, iclass 23, count 0 2006.232.07:54:12.35#ibcon#read 5, iclass 23, count 0 2006.232.07:54:12.35#ibcon#about to read 6, iclass 23, count 0 2006.232.07:54:12.35#ibcon#read 6, iclass 23, count 0 2006.232.07:54:12.35#ibcon#end of sib2, iclass 23, count 0 2006.232.07:54:12.35#ibcon#*after write, iclass 23, count 0 2006.232.07:54:12.35#ibcon#*before return 0, iclass 23, count 0 2006.232.07:54:12.35#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.232.07:54:12.35#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.232.07:54:12.35#ibcon#about to clear, iclass 23 cls_cnt 0 2006.232.07:54:12.35#ibcon#cleared, iclass 23 cls_cnt 0 2006.232.07:54:12.35$vc4f8/vb=6,4 2006.232.07:54:12.35#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.232.07:54:12.35#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.232.07:54:12.35#ibcon#ireg 11 cls_cnt 2 2006.232.07:54:12.35#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.232.07:54:12.41#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.232.07:54:12.41#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.232.07:54:12.41#ibcon#enter wrdev, iclass 25, count 2 2006.232.07:54:12.41#ibcon#first serial, iclass 25, count 2 2006.232.07:54:12.41#ibcon#enter sib2, iclass 25, count 2 2006.232.07:54:12.41#ibcon#flushed, iclass 25, count 2 2006.232.07:54:12.41#ibcon#about to write, iclass 25, count 2 2006.232.07:54:12.41#ibcon#wrote, iclass 25, count 2 2006.232.07:54:12.41#ibcon#about to read 3, iclass 25, count 2 2006.232.07:54:12.43#ibcon#read 3, iclass 25, count 2 2006.232.07:54:12.43#ibcon#about to read 4, iclass 25, count 2 2006.232.07:54:12.43#ibcon#read 4, iclass 25, count 2 2006.232.07:54:12.43#ibcon#about to read 5, iclass 25, count 2 2006.232.07:54:12.43#ibcon#read 5, iclass 25, count 2 2006.232.07:54:12.43#ibcon#about to read 6, iclass 25, count 2 2006.232.07:54:12.43#ibcon#read 6, iclass 25, count 2 2006.232.07:54:12.43#ibcon#end of sib2, iclass 25, count 2 2006.232.07:54:12.43#ibcon#*mode == 0, iclass 25, count 2 2006.232.07:54:12.43#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.232.07:54:12.43#ibcon#[27=AT06-04\r\n] 2006.232.07:54:12.43#ibcon#*before write, iclass 25, count 2 2006.232.07:54:12.43#ibcon#enter sib2, iclass 25, count 2 2006.232.07:54:12.43#ibcon#flushed, iclass 25, count 2 2006.232.07:54:12.43#ibcon#about to write, iclass 25, count 2 2006.232.07:54:12.43#ibcon#wrote, iclass 25, count 2 2006.232.07:54:12.43#ibcon#about to read 3, iclass 25, count 2 2006.232.07:54:12.46#ibcon#read 3, iclass 25, count 2 2006.232.07:54:12.46#ibcon#about to read 4, iclass 25, count 2 2006.232.07:54:12.46#ibcon#read 4, iclass 25, count 2 2006.232.07:54:12.46#ibcon#about to read 5, iclass 25, count 2 2006.232.07:54:12.46#ibcon#read 5, iclass 25, count 2 2006.232.07:54:12.46#ibcon#about to read 6, iclass 25, count 2 2006.232.07:54:12.46#ibcon#read 6, iclass 25, count 2 2006.232.07:54:12.46#ibcon#end of sib2, iclass 25, count 2 2006.232.07:54:12.46#ibcon#*after write, iclass 25, count 2 2006.232.07:54:12.46#ibcon#*before return 0, iclass 25, count 2 2006.232.07:54:12.46#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.232.07:54:12.46#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.232.07:54:12.46#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.232.07:54:12.46#ibcon#ireg 7 cls_cnt 0 2006.232.07:54:12.46#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.232.07:54:12.58#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.232.07:54:12.58#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.232.07:54:12.58#ibcon#enter wrdev, iclass 25, count 0 2006.232.07:54:12.58#ibcon#first serial, iclass 25, count 0 2006.232.07:54:12.58#ibcon#enter sib2, iclass 25, count 0 2006.232.07:54:12.58#ibcon#flushed, iclass 25, count 0 2006.232.07:54:12.58#ibcon#about to write, iclass 25, count 0 2006.232.07:54:12.58#ibcon#wrote, iclass 25, count 0 2006.232.07:54:12.58#ibcon#about to read 3, iclass 25, count 0 2006.232.07:54:12.60#ibcon#read 3, iclass 25, count 0 2006.232.07:54:12.60#ibcon#about to read 4, iclass 25, count 0 2006.232.07:54:12.60#ibcon#read 4, iclass 25, count 0 2006.232.07:54:12.60#ibcon#about to read 5, iclass 25, count 0 2006.232.07:54:12.60#ibcon#read 5, iclass 25, count 0 2006.232.07:54:12.60#ibcon#about to read 6, iclass 25, count 0 2006.232.07:54:12.60#ibcon#read 6, iclass 25, count 0 2006.232.07:54:12.60#ibcon#end of sib2, iclass 25, count 0 2006.232.07:54:12.60#ibcon#*mode == 0, iclass 25, count 0 2006.232.07:54:12.60#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.232.07:54:12.60#ibcon#[27=USB\r\n] 2006.232.07:54:12.60#ibcon#*before write, iclass 25, count 0 2006.232.07:54:12.60#ibcon#enter sib2, iclass 25, count 0 2006.232.07:54:12.60#ibcon#flushed, iclass 25, count 0 2006.232.07:54:12.60#ibcon#about to write, iclass 25, count 0 2006.232.07:54:12.60#ibcon#wrote, iclass 25, count 0 2006.232.07:54:12.60#ibcon#about to read 3, iclass 25, count 0 2006.232.07:54:12.63#ibcon#read 3, iclass 25, count 0 2006.232.07:54:12.63#ibcon#about to read 4, iclass 25, count 0 2006.232.07:54:12.63#ibcon#read 4, iclass 25, count 0 2006.232.07:54:12.63#ibcon#about to read 5, iclass 25, count 0 2006.232.07:54:12.63#ibcon#read 5, iclass 25, count 0 2006.232.07:54:12.63#ibcon#about to read 6, iclass 25, count 0 2006.232.07:54:12.63#ibcon#read 6, iclass 25, count 0 2006.232.07:54:12.63#ibcon#end of sib2, iclass 25, count 0 2006.232.07:54:12.63#ibcon#*after write, iclass 25, count 0 2006.232.07:54:12.63#ibcon#*before return 0, iclass 25, count 0 2006.232.07:54:12.63#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.232.07:54:12.63#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.232.07:54:12.63#ibcon#about to clear, iclass 25 cls_cnt 0 2006.232.07:54:12.63#ibcon#cleared, iclass 25 cls_cnt 0 2006.232.07:54:12.63$vc4f8/vabw=wide 2006.232.07:54:12.63#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.232.07:54:12.63#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.232.07:54:12.63#ibcon#ireg 8 cls_cnt 0 2006.232.07:54:12.63#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.232.07:54:12.63#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.232.07:54:12.63#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.232.07:54:12.63#ibcon#enter wrdev, iclass 27, count 0 2006.232.07:54:12.63#ibcon#first serial, iclass 27, count 0 2006.232.07:54:12.63#ibcon#enter sib2, iclass 27, count 0 2006.232.07:54:12.63#ibcon#flushed, iclass 27, count 0 2006.232.07:54:12.63#ibcon#about to write, iclass 27, count 0 2006.232.07:54:12.63#ibcon#wrote, iclass 27, count 0 2006.232.07:54:12.63#ibcon#about to read 3, iclass 27, count 0 2006.232.07:54:12.65#ibcon#read 3, iclass 27, count 0 2006.232.07:54:12.65#ibcon#about to read 4, iclass 27, count 0 2006.232.07:54:12.65#ibcon#read 4, iclass 27, count 0 2006.232.07:54:12.65#ibcon#about to read 5, iclass 27, count 0 2006.232.07:54:12.65#ibcon#read 5, iclass 27, count 0 2006.232.07:54:12.65#ibcon#about to read 6, iclass 27, count 0 2006.232.07:54:12.65#ibcon#read 6, iclass 27, count 0 2006.232.07:54:12.65#ibcon#end of sib2, iclass 27, count 0 2006.232.07:54:12.65#ibcon#*mode == 0, iclass 27, count 0 2006.232.07:54:12.65#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.232.07:54:12.65#ibcon#[25=BW32\r\n] 2006.232.07:54:12.65#ibcon#*before write, iclass 27, count 0 2006.232.07:54:12.65#ibcon#enter sib2, iclass 27, count 0 2006.232.07:54:12.65#ibcon#flushed, iclass 27, count 0 2006.232.07:54:12.65#ibcon#about to write, iclass 27, count 0 2006.232.07:54:12.65#ibcon#wrote, iclass 27, count 0 2006.232.07:54:12.65#ibcon#about to read 3, iclass 27, count 0 2006.232.07:54:12.69#ibcon#read 3, iclass 27, count 0 2006.232.07:54:12.69#ibcon#about to read 4, iclass 27, count 0 2006.232.07:54:12.69#ibcon#read 4, iclass 27, count 0 2006.232.07:54:12.69#ibcon#about to read 5, iclass 27, count 0 2006.232.07:54:12.69#ibcon#read 5, iclass 27, count 0 2006.232.07:54:12.69#ibcon#about to read 6, iclass 27, count 0 2006.232.07:54:12.69#ibcon#read 6, iclass 27, count 0 2006.232.07:54:12.69#ibcon#end of sib2, iclass 27, count 0 2006.232.07:54:12.69#ibcon#*after write, iclass 27, count 0 2006.232.07:54:12.69#ibcon#*before return 0, iclass 27, count 0 2006.232.07:54:12.69#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.232.07:54:12.69#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.232.07:54:12.69#ibcon#about to clear, iclass 27 cls_cnt 0 2006.232.07:54:12.69#ibcon#cleared, iclass 27 cls_cnt 0 2006.232.07:54:12.69$vc4f8/vbbw=wide 2006.232.07:54:12.69#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.232.07:54:12.69#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.232.07:54:12.69#ibcon#ireg 8 cls_cnt 0 2006.232.07:54:12.69#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:54:12.74#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:54:12.74#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:54:12.74#ibcon#enter wrdev, iclass 29, count 0 2006.232.07:54:12.74#ibcon#first serial, iclass 29, count 0 2006.232.07:54:12.74#ibcon#enter sib2, iclass 29, count 0 2006.232.07:54:12.74#ibcon#flushed, iclass 29, count 0 2006.232.07:54:12.74#ibcon#about to write, iclass 29, count 0 2006.232.07:54:12.74#ibcon#wrote, iclass 29, count 0 2006.232.07:54:12.74#ibcon#about to read 3, iclass 29, count 0 2006.232.07:54:12.76#ibcon#read 3, iclass 29, count 0 2006.232.07:54:12.76#ibcon#about to read 4, iclass 29, count 0 2006.232.07:54:12.76#ibcon#read 4, iclass 29, count 0 2006.232.07:54:12.76#ibcon#about to read 5, iclass 29, count 0 2006.232.07:54:12.76#ibcon#read 5, iclass 29, count 0 2006.232.07:54:12.76#ibcon#about to read 6, iclass 29, count 0 2006.232.07:54:12.76#ibcon#read 6, iclass 29, count 0 2006.232.07:54:12.76#ibcon#end of sib2, iclass 29, count 0 2006.232.07:54:12.76#ibcon#*mode == 0, iclass 29, count 0 2006.232.07:54:12.76#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.232.07:54:12.76#ibcon#[27=BW32\r\n] 2006.232.07:54:12.76#ibcon#*before write, iclass 29, count 0 2006.232.07:54:12.76#ibcon#enter sib2, iclass 29, count 0 2006.232.07:54:12.76#ibcon#flushed, iclass 29, count 0 2006.232.07:54:12.76#ibcon#about to write, iclass 29, count 0 2006.232.07:54:12.76#ibcon#wrote, iclass 29, count 0 2006.232.07:54:12.76#ibcon#about to read 3, iclass 29, count 0 2006.232.07:54:12.79#ibcon#read 3, iclass 29, count 0 2006.232.07:54:12.79#ibcon#about to read 4, iclass 29, count 0 2006.232.07:54:12.79#ibcon#read 4, iclass 29, count 0 2006.232.07:54:12.79#ibcon#about to read 5, iclass 29, count 0 2006.232.07:54:12.79#ibcon#read 5, iclass 29, count 0 2006.232.07:54:12.79#ibcon#about to read 6, iclass 29, count 0 2006.232.07:54:12.79#ibcon#read 6, iclass 29, count 0 2006.232.07:54:12.79#ibcon#end of sib2, iclass 29, count 0 2006.232.07:54:12.79#ibcon#*after write, iclass 29, count 0 2006.232.07:54:12.79#ibcon#*before return 0, iclass 29, count 0 2006.232.07:54:12.79#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:54:12.79#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.232.07:54:12.79#ibcon#about to clear, iclass 29 cls_cnt 0 2006.232.07:54:12.79#ibcon#cleared, iclass 29 cls_cnt 0 2006.232.07:54:12.79$4f8m12a/ifd4f 2006.232.07:54:12.79$ifd4f/lo= 2006.232.07:54:12.79$ifd4f/lo=lo1,7680.00,usb,rcp,1 2006.232.07:54:12.79$ifd4f/lo=lo2,1600.00,usb,rcp,1 2006.232.07:54:12.79$ifd4f/lo=lo3,8080.00,usb,rcp,1 2006.232.07:54:12.79$ifd4f/patch= 2006.232.07:54:12.79$ifd4f/patch=lo1,a1,a2,a3,a4 2006.232.07:54:12.79$ifd4f/patch=lo2,b1,b2,b3,b4,b5,b6 2006.232.07:54:12.79$ifd4f/patch=lo3,a5,a6,a7,a8 2006.232.07:54:12.79$4f8m12a/"form=m,16.000,1:2 2006.232.07:54:12.79$4f8m12a/"tpicd 2006.232.07:54:12.79$4f8m12a/echo=off 2006.232.07:54:12.79$4f8m12a/xlog=off 2006.232.07:54:12.79:!2006.232.07:55:40 2006.232.07:54:37.14#trakl#Source acquired 2006.232.07:54:37.14#flagr#flagr/antenna,acquired 2006.232.07:55:40.00:preob 2006.232.07:55:41.14/onsource/TRACKING 2006.232.07:55:41.14:!2006.232.07:55:50 2006.232.07:55:50.00:data_valid=on 2006.232.07:55:50.00:midob 2006.232.07:55:50.14/onsource/TRACKING 2006.232.07:55:50.14/wx/29.42,1007.3,87 2006.232.07:55:50.38/cable/+6.3879E-03 2006.232.07:55:51.47/va/01,08,usb,yes,30,32 2006.232.07:55:51.47/va/02,07,usb,yes,30,32 2006.232.07:55:51.47/va/03,08,usb,yes,23,23 2006.232.07:55:51.47/va/04,07,usb,yes,31,34 2006.232.07:55:51.47/va/05,07,usb,yes,35,37 2006.232.07:55:51.47/va/06,06,usb,yes,34,34 2006.232.07:55:51.47/va/07,06,usb,yes,35,35 2006.232.07:55:51.47/va/08,06,usb,yes,38,37 2006.232.07:55:51.70/valo/01,532.99,yes,locked 2006.232.07:55:51.70/valo/02,572.99,yes,locked 2006.232.07:55:51.70/valo/03,672.99,yes,locked 2006.232.07:55:51.70/valo/04,832.99,yes,locked 2006.232.07:55:51.70/valo/05,652.99,yes,locked 2006.232.07:55:51.70/valo/06,772.99,yes,locked 2006.232.07:55:51.70/valo/07,832.99,yes,locked 2006.232.07:55:51.70/valo/08,852.99,yes,locked 2006.232.07:55:52.79/vb/01,04,usb,yes,30,29 2006.232.07:55:52.79/vb/02,04,usb,yes,32,33 2006.232.07:55:52.79/vb/03,04,usb,yes,28,32 2006.232.07:55:52.79/vb/04,04,usb,yes,29,29 2006.232.07:55:52.79/vb/05,03,usb,yes,34,39 2006.232.07:55:52.79/vb/06,04,usb,yes,28,31 2006.232.07:55:52.79/vb/07,04,usb,yes,31,31 2006.232.07:55:52.79/vb/08,04,usb,yes,28,32 2006.232.07:55:53.03/vblo/01,632.99,yes,locked 2006.232.07:55:53.03/vblo/02,640.99,yes,locked 2006.232.07:55:53.03/vblo/03,656.99,yes,locked 2006.232.07:55:53.03/vblo/04,712.99,yes,locked 2006.232.07:55:53.03/vblo/05,744.99,yes,locked 2006.232.07:55:53.03/vblo/06,752.99,yes,locked 2006.232.07:55:53.03/vblo/07,734.99,yes,locked 2006.232.07:55:53.03/vblo/08,744.99,yes,locked 2006.232.07:55:53.18/vabw/8 2006.232.07:55:53.33/vbbw/8 2006.232.07:55:53.42/xfe/off,on,13.5 2006.232.07:55:53.79/ifatt/23,28,28,28 2006.232.07:55:54.07/fmout-gps/S +4.47E-07 2006.232.07:55:54.11:!2006.232.07:56:50 2006.232.07:56:50.00:data_valid=off 2006.232.07:56:50.00:postob 2006.232.07:56:50.17/cable/+6.3867E-03 2006.232.07:56:50.17/wx/29.42,1007.3,86 2006.232.07:56:51.07/fmout-gps/S +4.46E-07 2006.232.07:56:51.07:scan_name=232-0759,k06232,60 2006.232.07:56:51.07:source=0059+581,010245.76,582411.1,2000.0,cw 2006.232.07:56:51.14#flagr#flagr/antenna,new-source 2006.232.07:56:52.14:checkk5 2006.232.07:56:52.52/chk_autoobs//k5ts1/ autoobs is running! 2006.232.07:56:52.90/chk_autoobs//k5ts2/ autoobs is running! 2006.232.07:56:53.28/chk_autoobs//k5ts3/ autoobs is running! 2006.232.07:56:53.65/chk_autoobs//k5ts4/ autoobs is running! 2006.232.07:56:54.02/chk_obsdata//k5ts1/T2320755??a.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:56:54.44/chk_obsdata//k5ts2/T2320755??b.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:56:54.80/chk_obsdata//k5ts3/T2320755??c.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:56:55.16/chk_obsdata//k5ts4/T2320755??d.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.07:56:55.86/k5log//k5ts1_log_newline 2006.232.07:56:56.54/k5log//k5ts2_log_newline 2006.232.07:56:57.23/k5log//k5ts3_log_newline 2006.232.07:56:57.93/k5log//k5ts4_log_newline 2006.232.07:56:57.96/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.232.07:56:57.96:4f8m12a=2 2006.232.07:56:57.96$4f8m12a/echo=on 2006.232.07:56:57.96$4f8m12a/pcalon 2006.232.07:56:57.96$pcalon/"no phase cal control is implemented here 2006.232.07:56:57.96$4f8m12a/"tpicd=stop 2006.232.07:56:57.96$4f8m12a/vc4f8 2006.232.07:56:57.96$vc4f8/valo=1,532.99 2006.232.07:56:57.96#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.232.07:56:57.96#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.232.07:56:57.96#ibcon#ireg 17 cls_cnt 0 2006.232.07:56:57.96#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:56:57.96#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:56:57.96#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:56:57.96#ibcon#enter wrdev, iclass 24, count 0 2006.232.07:56:57.96#ibcon#first serial, iclass 24, count 0 2006.232.07:56:57.96#ibcon#enter sib2, iclass 24, count 0 2006.232.07:56:57.96#ibcon#flushed, iclass 24, count 0 2006.232.07:56:57.96#ibcon#about to write, iclass 24, count 0 2006.232.07:56:57.96#ibcon#wrote, iclass 24, count 0 2006.232.07:56:57.96#ibcon#about to read 3, iclass 24, count 0 2006.232.07:56:58.00#ibcon#read 3, iclass 24, count 0 2006.232.07:56:58.00#ibcon#about to read 4, iclass 24, count 0 2006.232.07:56:58.00#ibcon#read 4, iclass 24, count 0 2006.232.07:56:58.00#ibcon#about to read 5, iclass 24, count 0 2006.232.07:56:58.00#ibcon#read 5, iclass 24, count 0 2006.232.07:56:58.00#ibcon#about to read 6, iclass 24, count 0 2006.232.07:56:58.00#ibcon#read 6, iclass 24, count 0 2006.232.07:56:58.00#ibcon#end of sib2, iclass 24, count 0 2006.232.07:56:58.00#ibcon#*mode == 0, iclass 24, count 0 2006.232.07:56:58.00#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.232.07:56:58.00#ibcon#[26=FRQ=01,532.99\r\n] 2006.232.07:56:58.00#ibcon#*before write, iclass 24, count 0 2006.232.07:56:58.00#ibcon#enter sib2, iclass 24, count 0 2006.232.07:56:58.00#ibcon#flushed, iclass 24, count 0 2006.232.07:56:58.00#ibcon#about to write, iclass 24, count 0 2006.232.07:56:58.00#ibcon#wrote, iclass 24, count 0 2006.232.07:56:58.00#ibcon#about to read 3, iclass 24, count 0 2006.232.07:56:58.05#ibcon#read 3, iclass 24, count 0 2006.232.07:56:58.05#ibcon#about to read 4, iclass 24, count 0 2006.232.07:56:58.05#ibcon#read 4, iclass 24, count 0 2006.232.07:56:58.05#ibcon#about to read 5, iclass 24, count 0 2006.232.07:56:58.05#ibcon#read 5, iclass 24, count 0 2006.232.07:56:58.05#ibcon#about to read 6, iclass 24, count 0 2006.232.07:56:58.05#ibcon#read 6, iclass 24, count 0 2006.232.07:56:58.05#ibcon#end of sib2, iclass 24, count 0 2006.232.07:56:58.05#ibcon#*after write, iclass 24, count 0 2006.232.07:56:58.05#ibcon#*before return 0, iclass 24, count 0 2006.232.07:56:58.05#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:56:58.05#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:56:58.05#ibcon#about to clear, iclass 24 cls_cnt 0 2006.232.07:56:58.05#ibcon#cleared, iclass 24 cls_cnt 0 2006.232.07:56:58.05$vc4f8/va=1,8 2006.232.07:56:58.05#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.232.07:56:58.05#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.232.07:56:58.05#ibcon#ireg 11 cls_cnt 2 2006.232.07:56:58.05#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:56:58.05#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:56:58.05#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:56:58.05#ibcon#enter wrdev, iclass 26, count 2 2006.232.07:56:58.05#ibcon#first serial, iclass 26, count 2 2006.232.07:56:58.05#ibcon#enter sib2, iclass 26, count 2 2006.232.07:56:58.05#ibcon#flushed, iclass 26, count 2 2006.232.07:56:58.05#ibcon#about to write, iclass 26, count 2 2006.232.07:56:58.05#ibcon#wrote, iclass 26, count 2 2006.232.07:56:58.05#ibcon#about to read 3, iclass 26, count 2 2006.232.07:56:58.07#ibcon#read 3, iclass 26, count 2 2006.232.07:56:58.07#ibcon#about to read 4, iclass 26, count 2 2006.232.07:56:58.07#ibcon#read 4, iclass 26, count 2 2006.232.07:56:58.07#ibcon#about to read 5, iclass 26, count 2 2006.232.07:56:58.07#ibcon#read 5, iclass 26, count 2 2006.232.07:56:58.07#ibcon#about to read 6, iclass 26, count 2 2006.232.07:56:58.07#ibcon#read 6, iclass 26, count 2 2006.232.07:56:58.07#ibcon#end of sib2, iclass 26, count 2 2006.232.07:56:58.07#ibcon#*mode == 0, iclass 26, count 2 2006.232.07:56:58.07#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.232.07:56:58.07#ibcon#[25=AT01-08\r\n] 2006.232.07:56:58.07#ibcon#*before write, iclass 26, count 2 2006.232.07:56:58.07#ibcon#enter sib2, iclass 26, count 2 2006.232.07:56:58.07#ibcon#flushed, iclass 26, count 2 2006.232.07:56:58.07#ibcon#about to write, iclass 26, count 2 2006.232.07:56:58.08#ibcon#wrote, iclass 26, count 2 2006.232.07:56:58.08#ibcon#about to read 3, iclass 26, count 2 2006.232.07:56:58.11#ibcon#read 3, iclass 26, count 2 2006.232.07:56:58.11#ibcon#about to read 4, iclass 26, count 2 2006.232.07:56:58.11#ibcon#read 4, iclass 26, count 2 2006.232.07:56:58.11#ibcon#about to read 5, iclass 26, count 2 2006.232.07:56:58.11#ibcon#read 5, iclass 26, count 2 2006.232.07:56:58.11#ibcon#about to read 6, iclass 26, count 2 2006.232.07:56:58.11#ibcon#read 6, iclass 26, count 2 2006.232.07:56:58.11#ibcon#end of sib2, iclass 26, count 2 2006.232.07:56:58.11#ibcon#*after write, iclass 26, count 2 2006.232.07:56:58.11#ibcon#*before return 0, iclass 26, count 2 2006.232.07:56:58.11#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:56:58.11#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:56:58.11#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.232.07:56:58.11#ibcon#ireg 7 cls_cnt 0 2006.232.07:56:58.11#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:56:58.23#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:56:58.23#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:56:58.23#ibcon#enter wrdev, iclass 26, count 0 2006.232.07:56:58.23#ibcon#first serial, iclass 26, count 0 2006.232.07:56:58.23#ibcon#enter sib2, iclass 26, count 0 2006.232.07:56:58.23#ibcon#flushed, iclass 26, count 0 2006.232.07:56:58.23#ibcon#about to write, iclass 26, count 0 2006.232.07:56:58.23#ibcon#wrote, iclass 26, count 0 2006.232.07:56:58.23#ibcon#about to read 3, iclass 26, count 0 2006.232.07:56:58.25#ibcon#read 3, iclass 26, count 0 2006.232.07:56:58.25#ibcon#about to read 4, iclass 26, count 0 2006.232.07:56:58.25#ibcon#read 4, iclass 26, count 0 2006.232.07:56:58.25#ibcon#about to read 5, iclass 26, count 0 2006.232.07:56:58.25#ibcon#read 5, iclass 26, count 0 2006.232.07:56:58.25#ibcon#about to read 6, iclass 26, count 0 2006.232.07:56:58.25#ibcon#read 6, iclass 26, count 0 2006.232.07:56:58.25#ibcon#end of sib2, iclass 26, count 0 2006.232.07:56:58.25#ibcon#*mode == 0, iclass 26, count 0 2006.232.07:56:58.25#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.232.07:56:58.25#ibcon#[25=USB\r\n] 2006.232.07:56:58.25#ibcon#*before write, iclass 26, count 0 2006.232.07:56:58.25#ibcon#enter sib2, iclass 26, count 0 2006.232.07:56:58.25#ibcon#flushed, iclass 26, count 0 2006.232.07:56:58.25#ibcon#about to write, iclass 26, count 0 2006.232.07:56:58.25#ibcon#wrote, iclass 26, count 0 2006.232.07:56:58.25#ibcon#about to read 3, iclass 26, count 0 2006.232.07:56:58.28#ibcon#read 3, iclass 26, count 0 2006.232.07:56:58.28#ibcon#about to read 4, iclass 26, count 0 2006.232.07:56:58.28#ibcon#read 4, iclass 26, count 0 2006.232.07:56:58.28#ibcon#about to read 5, iclass 26, count 0 2006.232.07:56:58.28#ibcon#read 5, iclass 26, count 0 2006.232.07:56:58.28#ibcon#about to read 6, iclass 26, count 0 2006.232.07:56:58.28#ibcon#read 6, iclass 26, count 0 2006.232.07:56:58.28#ibcon#end of sib2, iclass 26, count 0 2006.232.07:56:58.28#ibcon#*after write, iclass 26, count 0 2006.232.07:56:58.28#ibcon#*before return 0, iclass 26, count 0 2006.232.07:56:58.28#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:56:58.28#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:56:58.28#ibcon#about to clear, iclass 26 cls_cnt 0 2006.232.07:56:58.28#ibcon#cleared, iclass 26 cls_cnt 0 2006.232.07:56:58.28$vc4f8/valo=2,572.99 2006.232.07:56:58.28#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.232.07:56:58.28#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.232.07:56:58.28#ibcon#ireg 17 cls_cnt 0 2006.232.07:56:58.28#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:56:58.28#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:56:58.28#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:56:58.28#ibcon#enter wrdev, iclass 28, count 0 2006.232.07:56:58.28#ibcon#first serial, iclass 28, count 0 2006.232.07:56:58.28#ibcon#enter sib2, iclass 28, count 0 2006.232.07:56:58.28#ibcon#flushed, iclass 28, count 0 2006.232.07:56:58.28#ibcon#about to write, iclass 28, count 0 2006.232.07:56:58.28#ibcon#wrote, iclass 28, count 0 2006.232.07:56:58.28#ibcon#about to read 3, iclass 28, count 0 2006.232.07:56:58.30#ibcon#read 3, iclass 28, count 0 2006.232.07:56:58.30#ibcon#about to read 4, iclass 28, count 0 2006.232.07:56:58.30#ibcon#read 4, iclass 28, count 0 2006.232.07:56:58.30#ibcon#about to read 5, iclass 28, count 0 2006.232.07:56:58.30#ibcon#read 5, iclass 28, count 0 2006.232.07:56:58.30#ibcon#about to read 6, iclass 28, count 0 2006.232.07:56:58.30#ibcon#read 6, iclass 28, count 0 2006.232.07:56:58.30#ibcon#end of sib2, iclass 28, count 0 2006.232.07:56:58.30#ibcon#*mode == 0, iclass 28, count 0 2006.232.07:56:58.30#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.232.07:56:58.30#ibcon#[26=FRQ=02,572.99\r\n] 2006.232.07:56:58.30#ibcon#*before write, iclass 28, count 0 2006.232.07:56:58.30#ibcon#enter sib2, iclass 28, count 0 2006.232.07:56:58.30#ibcon#flushed, iclass 28, count 0 2006.232.07:56:58.30#ibcon#about to write, iclass 28, count 0 2006.232.07:56:58.30#ibcon#wrote, iclass 28, count 0 2006.232.07:56:58.30#ibcon#about to read 3, iclass 28, count 0 2006.232.07:56:58.35#ibcon#read 3, iclass 28, count 0 2006.232.07:56:58.35#ibcon#about to read 4, iclass 28, count 0 2006.232.07:56:58.35#ibcon#read 4, iclass 28, count 0 2006.232.07:56:58.35#ibcon#about to read 5, iclass 28, count 0 2006.232.07:56:58.35#ibcon#read 5, iclass 28, count 0 2006.232.07:56:58.35#ibcon#about to read 6, iclass 28, count 0 2006.232.07:56:58.35#ibcon#read 6, iclass 28, count 0 2006.232.07:56:58.35#ibcon#end of sib2, iclass 28, count 0 2006.232.07:56:58.35#ibcon#*after write, iclass 28, count 0 2006.232.07:56:58.35#ibcon#*before return 0, iclass 28, count 0 2006.232.07:56:58.35#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:56:58.35#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:56:58.35#ibcon#about to clear, iclass 28 cls_cnt 0 2006.232.07:56:58.35#ibcon#cleared, iclass 28 cls_cnt 0 2006.232.07:56:58.35$vc4f8/va=2,7 2006.232.07:56:58.35#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.232.07:56:58.35#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.232.07:56:58.35#ibcon#ireg 11 cls_cnt 2 2006.232.07:56:58.35#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:56:58.41#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:56:58.41#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:56:58.41#ibcon#enter wrdev, iclass 30, count 2 2006.232.07:56:58.41#ibcon#first serial, iclass 30, count 2 2006.232.07:56:58.41#ibcon#enter sib2, iclass 30, count 2 2006.232.07:56:58.41#ibcon#flushed, iclass 30, count 2 2006.232.07:56:58.41#ibcon#about to write, iclass 30, count 2 2006.232.07:56:58.41#ibcon#wrote, iclass 30, count 2 2006.232.07:56:58.41#ibcon#about to read 3, iclass 30, count 2 2006.232.07:56:58.42#ibcon#read 3, iclass 30, count 2 2006.232.07:56:58.42#ibcon#about to read 4, iclass 30, count 2 2006.232.07:56:58.42#ibcon#read 4, iclass 30, count 2 2006.232.07:56:58.42#ibcon#about to read 5, iclass 30, count 2 2006.232.07:56:58.42#ibcon#read 5, iclass 30, count 2 2006.232.07:56:58.42#ibcon#about to read 6, iclass 30, count 2 2006.232.07:56:58.42#ibcon#read 6, iclass 30, count 2 2006.232.07:56:58.42#ibcon#end of sib2, iclass 30, count 2 2006.232.07:56:58.42#ibcon#*mode == 0, iclass 30, count 2 2006.232.07:56:58.42#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.232.07:56:58.42#ibcon#[25=AT02-07\r\n] 2006.232.07:56:58.42#ibcon#*before write, iclass 30, count 2 2006.232.07:56:58.42#ibcon#enter sib2, iclass 30, count 2 2006.232.07:56:58.42#ibcon#flushed, iclass 30, count 2 2006.232.07:56:58.42#ibcon#about to write, iclass 30, count 2 2006.232.07:56:58.42#ibcon#wrote, iclass 30, count 2 2006.232.07:56:58.42#ibcon#about to read 3, iclass 30, count 2 2006.232.07:56:58.45#ibcon#read 3, iclass 30, count 2 2006.232.07:56:58.45#ibcon#about to read 4, iclass 30, count 2 2006.232.07:56:58.45#ibcon#read 4, iclass 30, count 2 2006.232.07:56:58.45#ibcon#about to read 5, iclass 30, count 2 2006.232.07:56:58.45#ibcon#read 5, iclass 30, count 2 2006.232.07:56:58.45#ibcon#about to read 6, iclass 30, count 2 2006.232.07:56:58.45#ibcon#read 6, iclass 30, count 2 2006.232.07:56:58.45#ibcon#end of sib2, iclass 30, count 2 2006.232.07:56:58.45#ibcon#*after write, iclass 30, count 2 2006.232.07:56:58.45#ibcon#*before return 0, iclass 30, count 2 2006.232.07:56:58.45#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:56:58.45#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:56:58.45#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.232.07:56:58.45#ibcon#ireg 7 cls_cnt 0 2006.232.07:56:58.45#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:56:58.57#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:56:58.57#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:56:58.57#ibcon#enter wrdev, iclass 30, count 0 2006.232.07:56:58.57#ibcon#first serial, iclass 30, count 0 2006.232.07:56:58.57#ibcon#enter sib2, iclass 30, count 0 2006.232.07:56:58.57#ibcon#flushed, iclass 30, count 0 2006.232.07:56:58.57#ibcon#about to write, iclass 30, count 0 2006.232.07:56:58.57#ibcon#wrote, iclass 30, count 0 2006.232.07:56:58.57#ibcon#about to read 3, iclass 30, count 0 2006.232.07:56:58.59#ibcon#read 3, iclass 30, count 0 2006.232.07:56:58.59#ibcon#about to read 4, iclass 30, count 0 2006.232.07:56:58.59#ibcon#read 4, iclass 30, count 0 2006.232.07:56:58.59#ibcon#about to read 5, iclass 30, count 0 2006.232.07:56:58.59#ibcon#read 5, iclass 30, count 0 2006.232.07:56:58.59#ibcon#about to read 6, iclass 30, count 0 2006.232.07:56:58.59#ibcon#read 6, iclass 30, count 0 2006.232.07:56:58.59#ibcon#end of sib2, iclass 30, count 0 2006.232.07:56:58.59#ibcon#*mode == 0, iclass 30, count 0 2006.232.07:56:58.59#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.232.07:56:58.59#ibcon#[25=USB\r\n] 2006.232.07:56:58.59#ibcon#*before write, iclass 30, count 0 2006.232.07:56:58.59#ibcon#enter sib2, iclass 30, count 0 2006.232.07:56:58.59#ibcon#flushed, iclass 30, count 0 2006.232.07:56:58.59#ibcon#about to write, iclass 30, count 0 2006.232.07:56:58.59#ibcon#wrote, iclass 30, count 0 2006.232.07:56:58.59#ibcon#about to read 3, iclass 30, count 0 2006.232.07:56:58.62#ibcon#read 3, iclass 30, count 0 2006.232.07:56:58.62#ibcon#about to read 4, iclass 30, count 0 2006.232.07:56:58.62#ibcon#read 4, iclass 30, count 0 2006.232.07:56:58.62#ibcon#about to read 5, iclass 30, count 0 2006.232.07:56:58.62#ibcon#read 5, iclass 30, count 0 2006.232.07:56:58.62#ibcon#about to read 6, iclass 30, count 0 2006.232.07:56:58.62#ibcon#read 6, iclass 30, count 0 2006.232.07:56:58.62#ibcon#end of sib2, iclass 30, count 0 2006.232.07:56:58.62#ibcon#*after write, iclass 30, count 0 2006.232.07:56:58.62#ibcon#*before return 0, iclass 30, count 0 2006.232.07:56:58.62#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:56:58.62#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:56:58.62#ibcon#about to clear, iclass 30 cls_cnt 0 2006.232.07:56:58.62#ibcon#cleared, iclass 30 cls_cnt 0 2006.232.07:56:58.62$vc4f8/valo=3,672.99 2006.232.07:56:58.62#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.232.07:56:58.62#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.232.07:56:58.62#ibcon#ireg 17 cls_cnt 0 2006.232.07:56:58.62#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:56:58.62#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:56:58.62#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:56:58.62#ibcon#enter wrdev, iclass 32, count 0 2006.232.07:56:58.62#ibcon#first serial, iclass 32, count 0 2006.232.07:56:58.62#ibcon#enter sib2, iclass 32, count 0 2006.232.07:56:58.62#ibcon#flushed, iclass 32, count 0 2006.232.07:56:58.62#ibcon#about to write, iclass 32, count 0 2006.232.07:56:58.62#ibcon#wrote, iclass 32, count 0 2006.232.07:56:58.62#ibcon#about to read 3, iclass 32, count 0 2006.232.07:56:58.65#ibcon#read 3, iclass 32, count 0 2006.232.07:56:58.65#ibcon#about to read 4, iclass 32, count 0 2006.232.07:56:58.65#ibcon#read 4, iclass 32, count 0 2006.232.07:56:58.65#ibcon#about to read 5, iclass 32, count 0 2006.232.07:56:58.65#ibcon#read 5, iclass 32, count 0 2006.232.07:56:58.65#ibcon#about to read 6, iclass 32, count 0 2006.232.07:56:58.65#ibcon#read 6, iclass 32, count 0 2006.232.07:56:58.65#ibcon#end of sib2, iclass 32, count 0 2006.232.07:56:58.65#ibcon#*mode == 0, iclass 32, count 0 2006.232.07:56:58.65#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.232.07:56:58.65#ibcon#[26=FRQ=03,672.99\r\n] 2006.232.07:56:58.65#ibcon#*before write, iclass 32, count 0 2006.232.07:56:58.65#ibcon#enter sib2, iclass 32, count 0 2006.232.07:56:58.65#ibcon#flushed, iclass 32, count 0 2006.232.07:56:58.65#ibcon#about to write, iclass 32, count 0 2006.232.07:56:58.65#ibcon#wrote, iclass 32, count 0 2006.232.07:56:58.65#ibcon#about to read 3, iclass 32, count 0 2006.232.07:56:58.69#ibcon#read 3, iclass 32, count 0 2006.232.07:56:58.69#ibcon#about to read 4, iclass 32, count 0 2006.232.07:56:58.69#ibcon#read 4, iclass 32, count 0 2006.232.07:56:58.69#ibcon#about to read 5, iclass 32, count 0 2006.232.07:56:58.69#ibcon#read 5, iclass 32, count 0 2006.232.07:56:58.69#ibcon#about to read 6, iclass 32, count 0 2006.232.07:56:58.69#ibcon#read 6, iclass 32, count 0 2006.232.07:56:58.69#ibcon#end of sib2, iclass 32, count 0 2006.232.07:56:58.69#ibcon#*after write, iclass 32, count 0 2006.232.07:56:58.69#ibcon#*before return 0, iclass 32, count 0 2006.232.07:56:58.69#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:56:58.69#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:56:58.69#ibcon#about to clear, iclass 32 cls_cnt 0 2006.232.07:56:58.69#ibcon#cleared, iclass 32 cls_cnt 0 2006.232.07:56:58.69$vc4f8/va=3,8 2006.232.07:56:58.69#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.232.07:56:58.69#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.232.07:56:58.69#ibcon#ireg 11 cls_cnt 2 2006.232.07:56:58.69#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:56:58.74#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:56:58.74#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:56:58.74#ibcon#enter wrdev, iclass 34, count 2 2006.232.07:56:58.74#ibcon#first serial, iclass 34, count 2 2006.232.07:56:58.74#ibcon#enter sib2, iclass 34, count 2 2006.232.07:56:58.74#ibcon#flushed, iclass 34, count 2 2006.232.07:56:58.74#ibcon#about to write, iclass 34, count 2 2006.232.07:56:58.74#ibcon#wrote, iclass 34, count 2 2006.232.07:56:58.74#ibcon#about to read 3, iclass 34, count 2 2006.232.07:56:58.76#ibcon#read 3, iclass 34, count 2 2006.232.07:56:58.76#ibcon#about to read 4, iclass 34, count 2 2006.232.07:56:58.76#ibcon#read 4, iclass 34, count 2 2006.232.07:56:58.76#ibcon#about to read 5, iclass 34, count 2 2006.232.07:56:58.76#ibcon#read 5, iclass 34, count 2 2006.232.07:56:58.76#ibcon#about to read 6, iclass 34, count 2 2006.232.07:56:58.76#ibcon#read 6, iclass 34, count 2 2006.232.07:56:58.76#ibcon#end of sib2, iclass 34, count 2 2006.232.07:56:58.76#ibcon#*mode == 0, iclass 34, count 2 2006.232.07:56:58.76#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.232.07:56:58.76#ibcon#[25=AT03-08\r\n] 2006.232.07:56:58.76#ibcon#*before write, iclass 34, count 2 2006.232.07:56:58.76#ibcon#enter sib2, iclass 34, count 2 2006.232.07:56:58.76#ibcon#flushed, iclass 34, count 2 2006.232.07:56:58.76#ibcon#about to write, iclass 34, count 2 2006.232.07:56:58.76#ibcon#wrote, iclass 34, count 2 2006.232.07:56:58.76#ibcon#about to read 3, iclass 34, count 2 2006.232.07:56:58.79#ibcon#read 3, iclass 34, count 2 2006.232.07:56:58.79#ibcon#about to read 4, iclass 34, count 2 2006.232.07:56:58.79#ibcon#read 4, iclass 34, count 2 2006.232.07:56:58.79#ibcon#about to read 5, iclass 34, count 2 2006.232.07:56:58.79#ibcon#read 5, iclass 34, count 2 2006.232.07:56:58.79#ibcon#about to read 6, iclass 34, count 2 2006.232.07:56:58.79#ibcon#read 6, iclass 34, count 2 2006.232.07:56:58.79#ibcon#end of sib2, iclass 34, count 2 2006.232.07:56:58.79#ibcon#*after write, iclass 34, count 2 2006.232.07:56:58.79#ibcon#*before return 0, iclass 34, count 2 2006.232.07:56:58.79#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:56:58.79#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:56:58.79#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.232.07:56:58.79#ibcon#ireg 7 cls_cnt 0 2006.232.07:56:58.79#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:56:58.91#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:56:58.91#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:56:58.91#ibcon#enter wrdev, iclass 34, count 0 2006.232.07:56:58.91#ibcon#first serial, iclass 34, count 0 2006.232.07:56:58.91#ibcon#enter sib2, iclass 34, count 0 2006.232.07:56:58.91#ibcon#flushed, iclass 34, count 0 2006.232.07:56:58.91#ibcon#about to write, iclass 34, count 0 2006.232.07:56:58.91#ibcon#wrote, iclass 34, count 0 2006.232.07:56:58.91#ibcon#about to read 3, iclass 34, count 0 2006.232.07:56:58.93#ibcon#read 3, iclass 34, count 0 2006.232.07:56:58.93#ibcon#about to read 4, iclass 34, count 0 2006.232.07:56:58.93#ibcon#read 4, iclass 34, count 0 2006.232.07:56:58.93#ibcon#about to read 5, iclass 34, count 0 2006.232.07:56:58.93#ibcon#read 5, iclass 34, count 0 2006.232.07:56:58.93#ibcon#about to read 6, iclass 34, count 0 2006.232.07:56:58.93#ibcon#read 6, iclass 34, count 0 2006.232.07:56:58.93#ibcon#end of sib2, iclass 34, count 0 2006.232.07:56:58.93#ibcon#*mode == 0, iclass 34, count 0 2006.232.07:56:58.93#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.232.07:56:58.93#ibcon#[25=USB\r\n] 2006.232.07:56:58.93#ibcon#*before write, iclass 34, count 0 2006.232.07:56:58.93#ibcon#enter sib2, iclass 34, count 0 2006.232.07:56:58.93#ibcon#flushed, iclass 34, count 0 2006.232.07:56:58.93#ibcon#about to write, iclass 34, count 0 2006.232.07:56:58.93#ibcon#wrote, iclass 34, count 0 2006.232.07:56:58.93#ibcon#about to read 3, iclass 34, count 0 2006.232.07:56:58.96#ibcon#read 3, iclass 34, count 0 2006.232.07:56:58.96#ibcon#about to read 4, iclass 34, count 0 2006.232.07:56:58.96#ibcon#read 4, iclass 34, count 0 2006.232.07:56:58.96#ibcon#about to read 5, iclass 34, count 0 2006.232.07:56:58.96#ibcon#read 5, iclass 34, count 0 2006.232.07:56:58.96#ibcon#about to read 6, iclass 34, count 0 2006.232.07:56:58.96#ibcon#read 6, iclass 34, count 0 2006.232.07:56:58.96#ibcon#end of sib2, iclass 34, count 0 2006.232.07:56:58.96#ibcon#*after write, iclass 34, count 0 2006.232.07:56:58.96#ibcon#*before return 0, iclass 34, count 0 2006.232.07:56:58.96#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:56:58.96#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:56:58.96#ibcon#about to clear, iclass 34 cls_cnt 0 2006.232.07:56:58.96#ibcon#cleared, iclass 34 cls_cnt 0 2006.232.07:56:58.96$vc4f8/valo=4,832.99 2006.232.07:56:58.96#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.232.07:56:58.96#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.232.07:56:58.96#ibcon#ireg 17 cls_cnt 0 2006.232.07:56:58.96#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:56:58.96#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:56:58.96#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:56:58.96#ibcon#enter wrdev, iclass 36, count 0 2006.232.07:56:58.96#ibcon#first serial, iclass 36, count 0 2006.232.07:56:58.96#ibcon#enter sib2, iclass 36, count 0 2006.232.07:56:58.96#ibcon#flushed, iclass 36, count 0 2006.232.07:56:58.96#ibcon#about to write, iclass 36, count 0 2006.232.07:56:58.96#ibcon#wrote, iclass 36, count 0 2006.232.07:56:58.96#ibcon#about to read 3, iclass 36, count 0 2006.232.07:56:58.98#ibcon#read 3, iclass 36, count 0 2006.232.07:56:58.98#ibcon#about to read 4, iclass 36, count 0 2006.232.07:56:58.98#ibcon#read 4, iclass 36, count 0 2006.232.07:56:58.98#ibcon#about to read 5, iclass 36, count 0 2006.232.07:56:58.98#ibcon#read 5, iclass 36, count 0 2006.232.07:56:58.98#ibcon#about to read 6, iclass 36, count 0 2006.232.07:56:58.98#ibcon#read 6, iclass 36, count 0 2006.232.07:56:58.98#ibcon#end of sib2, iclass 36, count 0 2006.232.07:56:58.98#ibcon#*mode == 0, iclass 36, count 0 2006.232.07:56:58.98#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.232.07:56:58.98#ibcon#[26=FRQ=04,832.99\r\n] 2006.232.07:56:58.98#ibcon#*before write, iclass 36, count 0 2006.232.07:56:58.98#ibcon#enter sib2, iclass 36, count 0 2006.232.07:56:58.98#ibcon#flushed, iclass 36, count 0 2006.232.07:56:58.98#ibcon#about to write, iclass 36, count 0 2006.232.07:56:58.98#ibcon#wrote, iclass 36, count 0 2006.232.07:56:58.98#ibcon#about to read 3, iclass 36, count 0 2006.232.07:56:59.02#ibcon#read 3, iclass 36, count 0 2006.232.07:56:59.02#ibcon#about to read 4, iclass 36, count 0 2006.232.07:56:59.02#ibcon#read 4, iclass 36, count 0 2006.232.07:56:59.02#ibcon#about to read 5, iclass 36, count 0 2006.232.07:56:59.02#ibcon#read 5, iclass 36, count 0 2006.232.07:56:59.02#ibcon#about to read 6, iclass 36, count 0 2006.232.07:56:59.02#ibcon#read 6, iclass 36, count 0 2006.232.07:56:59.02#ibcon#end of sib2, iclass 36, count 0 2006.232.07:56:59.02#ibcon#*after write, iclass 36, count 0 2006.232.07:56:59.02#ibcon#*before return 0, iclass 36, count 0 2006.232.07:56:59.02#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:56:59.02#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:56:59.02#ibcon#about to clear, iclass 36 cls_cnt 0 2006.232.07:56:59.02#ibcon#cleared, iclass 36 cls_cnt 0 2006.232.07:56:59.02$vc4f8/va=4,7 2006.232.07:56:59.02#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.232.07:56:59.02#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.232.07:56:59.02#ibcon#ireg 11 cls_cnt 2 2006.232.07:56:59.02#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.232.07:56:59.08#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.232.07:56:59.08#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.232.07:56:59.08#ibcon#enter wrdev, iclass 38, count 2 2006.232.07:56:59.08#ibcon#first serial, iclass 38, count 2 2006.232.07:56:59.08#ibcon#enter sib2, iclass 38, count 2 2006.232.07:56:59.08#ibcon#flushed, iclass 38, count 2 2006.232.07:56:59.08#ibcon#about to write, iclass 38, count 2 2006.232.07:56:59.08#ibcon#wrote, iclass 38, count 2 2006.232.07:56:59.08#ibcon#about to read 3, iclass 38, count 2 2006.232.07:56:59.10#ibcon#read 3, iclass 38, count 2 2006.232.07:56:59.10#ibcon#about to read 4, iclass 38, count 2 2006.232.07:56:59.10#ibcon#read 4, iclass 38, count 2 2006.232.07:56:59.10#ibcon#about to read 5, iclass 38, count 2 2006.232.07:56:59.10#ibcon#read 5, iclass 38, count 2 2006.232.07:56:59.10#ibcon#about to read 6, iclass 38, count 2 2006.232.07:56:59.10#ibcon#read 6, iclass 38, count 2 2006.232.07:56:59.10#ibcon#end of sib2, iclass 38, count 2 2006.232.07:56:59.10#ibcon#*mode == 0, iclass 38, count 2 2006.232.07:56:59.10#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.232.07:56:59.10#ibcon#[25=AT04-07\r\n] 2006.232.07:56:59.10#ibcon#*before write, iclass 38, count 2 2006.232.07:56:59.10#ibcon#enter sib2, iclass 38, count 2 2006.232.07:56:59.10#ibcon#flushed, iclass 38, count 2 2006.232.07:56:59.10#ibcon#about to write, iclass 38, count 2 2006.232.07:56:59.10#ibcon#wrote, iclass 38, count 2 2006.232.07:56:59.10#ibcon#about to read 3, iclass 38, count 2 2006.232.07:56:59.13#ibcon#read 3, iclass 38, count 2 2006.232.07:56:59.13#ibcon#about to read 4, iclass 38, count 2 2006.232.07:56:59.13#ibcon#read 4, iclass 38, count 2 2006.232.07:56:59.13#ibcon#about to read 5, iclass 38, count 2 2006.232.07:56:59.13#ibcon#read 5, iclass 38, count 2 2006.232.07:56:59.13#ibcon#about to read 6, iclass 38, count 2 2006.232.07:56:59.13#ibcon#read 6, iclass 38, count 2 2006.232.07:56:59.13#ibcon#end of sib2, iclass 38, count 2 2006.232.07:56:59.13#ibcon#*after write, iclass 38, count 2 2006.232.07:56:59.13#ibcon#*before return 0, iclass 38, count 2 2006.232.07:56:59.13#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.232.07:56:59.13#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.232.07:56:59.13#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.232.07:56:59.13#ibcon#ireg 7 cls_cnt 0 2006.232.07:56:59.13#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.232.07:56:59.25#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.232.07:56:59.25#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.232.07:56:59.25#ibcon#enter wrdev, iclass 38, count 0 2006.232.07:56:59.25#ibcon#first serial, iclass 38, count 0 2006.232.07:56:59.25#ibcon#enter sib2, iclass 38, count 0 2006.232.07:56:59.25#ibcon#flushed, iclass 38, count 0 2006.232.07:56:59.25#ibcon#about to write, iclass 38, count 0 2006.232.07:56:59.25#ibcon#wrote, iclass 38, count 0 2006.232.07:56:59.25#ibcon#about to read 3, iclass 38, count 0 2006.232.07:56:59.27#ibcon#read 3, iclass 38, count 0 2006.232.07:56:59.27#ibcon#about to read 4, iclass 38, count 0 2006.232.07:56:59.27#ibcon#read 4, iclass 38, count 0 2006.232.07:56:59.27#ibcon#about to read 5, iclass 38, count 0 2006.232.07:56:59.27#ibcon#read 5, iclass 38, count 0 2006.232.07:56:59.27#ibcon#about to read 6, iclass 38, count 0 2006.232.07:56:59.27#ibcon#read 6, iclass 38, count 0 2006.232.07:56:59.27#ibcon#end of sib2, iclass 38, count 0 2006.232.07:56:59.27#ibcon#*mode == 0, iclass 38, count 0 2006.232.07:56:59.27#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.232.07:56:59.27#ibcon#[25=USB\r\n] 2006.232.07:56:59.27#ibcon#*before write, iclass 38, count 0 2006.232.07:56:59.27#ibcon#enter sib2, iclass 38, count 0 2006.232.07:56:59.27#ibcon#flushed, iclass 38, count 0 2006.232.07:56:59.27#ibcon#about to write, iclass 38, count 0 2006.232.07:56:59.27#ibcon#wrote, iclass 38, count 0 2006.232.07:56:59.27#ibcon#about to read 3, iclass 38, count 0 2006.232.07:56:59.30#ibcon#read 3, iclass 38, count 0 2006.232.07:56:59.30#ibcon#about to read 4, iclass 38, count 0 2006.232.07:56:59.30#ibcon#read 4, iclass 38, count 0 2006.232.07:56:59.30#ibcon#about to read 5, iclass 38, count 0 2006.232.07:56:59.30#ibcon#read 5, iclass 38, count 0 2006.232.07:56:59.30#ibcon#about to read 6, iclass 38, count 0 2006.232.07:56:59.30#ibcon#read 6, iclass 38, count 0 2006.232.07:56:59.30#ibcon#end of sib2, iclass 38, count 0 2006.232.07:56:59.30#ibcon#*after write, iclass 38, count 0 2006.232.07:56:59.30#ibcon#*before return 0, iclass 38, count 0 2006.232.07:56:59.30#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.232.07:56:59.30#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.232.07:56:59.30#ibcon#about to clear, iclass 38 cls_cnt 0 2006.232.07:56:59.30#ibcon#cleared, iclass 38 cls_cnt 0 2006.232.07:56:59.30$vc4f8/valo=5,652.99 2006.232.07:56:59.30#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.232.07:56:59.30#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.232.07:56:59.30#ibcon#ireg 17 cls_cnt 0 2006.232.07:56:59.30#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:56:59.30#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:56:59.30#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:56:59.30#ibcon#enter wrdev, iclass 40, count 0 2006.232.07:56:59.30#ibcon#first serial, iclass 40, count 0 2006.232.07:56:59.30#ibcon#enter sib2, iclass 40, count 0 2006.232.07:56:59.30#ibcon#flushed, iclass 40, count 0 2006.232.07:56:59.30#ibcon#about to write, iclass 40, count 0 2006.232.07:56:59.30#ibcon#wrote, iclass 40, count 0 2006.232.07:56:59.30#ibcon#about to read 3, iclass 40, count 0 2006.232.07:56:59.32#ibcon#read 3, iclass 40, count 0 2006.232.07:56:59.32#ibcon#about to read 4, iclass 40, count 0 2006.232.07:56:59.32#ibcon#read 4, iclass 40, count 0 2006.232.07:56:59.32#ibcon#about to read 5, iclass 40, count 0 2006.232.07:56:59.32#ibcon#read 5, iclass 40, count 0 2006.232.07:56:59.32#ibcon#about to read 6, iclass 40, count 0 2006.232.07:56:59.32#ibcon#read 6, iclass 40, count 0 2006.232.07:56:59.32#ibcon#end of sib2, iclass 40, count 0 2006.232.07:56:59.32#ibcon#*mode == 0, iclass 40, count 0 2006.232.07:56:59.32#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.232.07:56:59.32#ibcon#[26=FRQ=05,652.99\r\n] 2006.232.07:56:59.32#ibcon#*before write, iclass 40, count 0 2006.232.07:56:59.32#ibcon#enter sib2, iclass 40, count 0 2006.232.07:56:59.32#ibcon#flushed, iclass 40, count 0 2006.232.07:56:59.32#ibcon#about to write, iclass 40, count 0 2006.232.07:56:59.32#ibcon#wrote, iclass 40, count 0 2006.232.07:56:59.32#ibcon#about to read 3, iclass 40, count 0 2006.232.07:56:59.36#ibcon#read 3, iclass 40, count 0 2006.232.07:56:59.36#ibcon#about to read 4, iclass 40, count 0 2006.232.07:56:59.36#ibcon#read 4, iclass 40, count 0 2006.232.07:56:59.36#ibcon#about to read 5, iclass 40, count 0 2006.232.07:56:59.36#ibcon#read 5, iclass 40, count 0 2006.232.07:56:59.36#ibcon#about to read 6, iclass 40, count 0 2006.232.07:56:59.36#ibcon#read 6, iclass 40, count 0 2006.232.07:56:59.36#ibcon#end of sib2, iclass 40, count 0 2006.232.07:56:59.36#ibcon#*after write, iclass 40, count 0 2006.232.07:56:59.36#ibcon#*before return 0, iclass 40, count 0 2006.232.07:56:59.36#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:56:59.36#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:56:59.36#ibcon#about to clear, iclass 40 cls_cnt 0 2006.232.07:56:59.36#ibcon#cleared, iclass 40 cls_cnt 0 2006.232.07:56:59.36$vc4f8/va=5,7 2006.232.07:56:59.36#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.232.07:56:59.36#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.232.07:56:59.36#ibcon#ireg 11 cls_cnt 2 2006.232.07:56:59.36#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:56:59.42#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:56:59.42#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:56:59.42#ibcon#enter wrdev, iclass 4, count 2 2006.232.07:56:59.42#ibcon#first serial, iclass 4, count 2 2006.232.07:56:59.42#ibcon#enter sib2, iclass 4, count 2 2006.232.07:56:59.42#ibcon#flushed, iclass 4, count 2 2006.232.07:56:59.42#ibcon#about to write, iclass 4, count 2 2006.232.07:56:59.42#ibcon#wrote, iclass 4, count 2 2006.232.07:56:59.42#ibcon#about to read 3, iclass 4, count 2 2006.232.07:56:59.44#ibcon#read 3, iclass 4, count 2 2006.232.07:56:59.44#ibcon#about to read 4, iclass 4, count 2 2006.232.07:56:59.44#ibcon#read 4, iclass 4, count 2 2006.232.07:56:59.44#ibcon#about to read 5, iclass 4, count 2 2006.232.07:56:59.44#ibcon#read 5, iclass 4, count 2 2006.232.07:56:59.44#ibcon#about to read 6, iclass 4, count 2 2006.232.07:56:59.44#ibcon#read 6, iclass 4, count 2 2006.232.07:56:59.44#ibcon#end of sib2, iclass 4, count 2 2006.232.07:56:59.44#ibcon#*mode == 0, iclass 4, count 2 2006.232.07:56:59.44#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.232.07:56:59.44#ibcon#[25=AT05-07\r\n] 2006.232.07:56:59.44#ibcon#*before write, iclass 4, count 2 2006.232.07:56:59.44#ibcon#enter sib2, iclass 4, count 2 2006.232.07:56:59.44#ibcon#flushed, iclass 4, count 2 2006.232.07:56:59.44#ibcon#about to write, iclass 4, count 2 2006.232.07:56:59.44#ibcon#wrote, iclass 4, count 2 2006.232.07:56:59.44#ibcon#about to read 3, iclass 4, count 2 2006.232.07:56:59.47#ibcon#read 3, iclass 4, count 2 2006.232.07:56:59.47#ibcon#about to read 4, iclass 4, count 2 2006.232.07:56:59.47#ibcon#read 4, iclass 4, count 2 2006.232.07:56:59.47#ibcon#about to read 5, iclass 4, count 2 2006.232.07:56:59.47#ibcon#read 5, iclass 4, count 2 2006.232.07:56:59.47#ibcon#about to read 6, iclass 4, count 2 2006.232.07:56:59.47#ibcon#read 6, iclass 4, count 2 2006.232.07:56:59.47#ibcon#end of sib2, iclass 4, count 2 2006.232.07:56:59.47#ibcon#*after write, iclass 4, count 2 2006.232.07:56:59.47#ibcon#*before return 0, iclass 4, count 2 2006.232.07:56:59.47#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:56:59.47#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:56:59.47#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.232.07:56:59.47#ibcon#ireg 7 cls_cnt 0 2006.232.07:56:59.47#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:56:59.59#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:56:59.59#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:56:59.59#ibcon#enter wrdev, iclass 4, count 0 2006.232.07:56:59.59#ibcon#first serial, iclass 4, count 0 2006.232.07:56:59.59#ibcon#enter sib2, iclass 4, count 0 2006.232.07:56:59.59#ibcon#flushed, iclass 4, count 0 2006.232.07:56:59.59#ibcon#about to write, iclass 4, count 0 2006.232.07:56:59.59#ibcon#wrote, iclass 4, count 0 2006.232.07:56:59.59#ibcon#about to read 3, iclass 4, count 0 2006.232.07:56:59.61#ibcon#read 3, iclass 4, count 0 2006.232.07:56:59.61#ibcon#about to read 4, iclass 4, count 0 2006.232.07:56:59.61#ibcon#read 4, iclass 4, count 0 2006.232.07:56:59.61#ibcon#about to read 5, iclass 4, count 0 2006.232.07:56:59.61#ibcon#read 5, iclass 4, count 0 2006.232.07:56:59.61#ibcon#about to read 6, iclass 4, count 0 2006.232.07:56:59.61#ibcon#read 6, iclass 4, count 0 2006.232.07:56:59.61#ibcon#end of sib2, iclass 4, count 0 2006.232.07:56:59.61#ibcon#*mode == 0, iclass 4, count 0 2006.232.07:56:59.61#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.232.07:56:59.61#ibcon#[25=USB\r\n] 2006.232.07:56:59.61#ibcon#*before write, iclass 4, count 0 2006.232.07:56:59.61#ibcon#enter sib2, iclass 4, count 0 2006.232.07:56:59.61#ibcon#flushed, iclass 4, count 0 2006.232.07:56:59.61#ibcon#about to write, iclass 4, count 0 2006.232.07:56:59.61#ibcon#wrote, iclass 4, count 0 2006.232.07:56:59.61#ibcon#about to read 3, iclass 4, count 0 2006.232.07:56:59.64#ibcon#read 3, iclass 4, count 0 2006.232.07:56:59.64#ibcon#about to read 4, iclass 4, count 0 2006.232.07:56:59.64#ibcon#read 4, iclass 4, count 0 2006.232.07:56:59.64#ibcon#about to read 5, iclass 4, count 0 2006.232.07:56:59.64#ibcon#read 5, iclass 4, count 0 2006.232.07:56:59.64#ibcon#about to read 6, iclass 4, count 0 2006.232.07:56:59.64#ibcon#read 6, iclass 4, count 0 2006.232.07:56:59.64#ibcon#end of sib2, iclass 4, count 0 2006.232.07:56:59.64#ibcon#*after write, iclass 4, count 0 2006.232.07:56:59.64#ibcon#*before return 0, iclass 4, count 0 2006.232.07:56:59.64#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:56:59.64#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:56:59.64#ibcon#about to clear, iclass 4 cls_cnt 0 2006.232.07:56:59.64#ibcon#cleared, iclass 4 cls_cnt 0 2006.232.07:56:59.64$vc4f8/valo=6,772.99 2006.232.07:56:59.64#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.232.07:56:59.64#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.232.07:56:59.64#ibcon#ireg 17 cls_cnt 0 2006.232.07:56:59.64#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:56:59.64#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:56:59.64#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:56:59.64#ibcon#enter wrdev, iclass 6, count 0 2006.232.07:56:59.64#ibcon#first serial, iclass 6, count 0 2006.232.07:56:59.64#ibcon#enter sib2, iclass 6, count 0 2006.232.07:56:59.64#ibcon#flushed, iclass 6, count 0 2006.232.07:56:59.64#ibcon#about to write, iclass 6, count 0 2006.232.07:56:59.64#ibcon#wrote, iclass 6, count 0 2006.232.07:56:59.64#ibcon#about to read 3, iclass 6, count 0 2006.232.07:56:59.66#ibcon#read 3, iclass 6, count 0 2006.232.07:56:59.66#ibcon#about to read 4, iclass 6, count 0 2006.232.07:56:59.66#ibcon#read 4, iclass 6, count 0 2006.232.07:56:59.66#ibcon#about to read 5, iclass 6, count 0 2006.232.07:56:59.66#ibcon#read 5, iclass 6, count 0 2006.232.07:56:59.66#ibcon#about to read 6, iclass 6, count 0 2006.232.07:56:59.66#ibcon#read 6, iclass 6, count 0 2006.232.07:56:59.66#ibcon#end of sib2, iclass 6, count 0 2006.232.07:56:59.66#ibcon#*mode == 0, iclass 6, count 0 2006.232.07:56:59.66#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.232.07:56:59.66#ibcon#[26=FRQ=06,772.99\r\n] 2006.232.07:56:59.66#ibcon#*before write, iclass 6, count 0 2006.232.07:56:59.66#ibcon#enter sib2, iclass 6, count 0 2006.232.07:56:59.66#ibcon#flushed, iclass 6, count 0 2006.232.07:56:59.66#ibcon#about to write, iclass 6, count 0 2006.232.07:56:59.66#ibcon#wrote, iclass 6, count 0 2006.232.07:56:59.66#ibcon#about to read 3, iclass 6, count 0 2006.232.07:56:59.70#ibcon#read 3, iclass 6, count 0 2006.232.07:56:59.70#ibcon#about to read 4, iclass 6, count 0 2006.232.07:56:59.70#ibcon#read 4, iclass 6, count 0 2006.232.07:56:59.70#ibcon#about to read 5, iclass 6, count 0 2006.232.07:56:59.70#ibcon#read 5, iclass 6, count 0 2006.232.07:56:59.70#ibcon#about to read 6, iclass 6, count 0 2006.232.07:56:59.70#ibcon#read 6, iclass 6, count 0 2006.232.07:56:59.70#ibcon#end of sib2, iclass 6, count 0 2006.232.07:56:59.70#ibcon#*after write, iclass 6, count 0 2006.232.07:56:59.70#ibcon#*before return 0, iclass 6, count 0 2006.232.07:56:59.70#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:56:59.70#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:56:59.70#ibcon#about to clear, iclass 6 cls_cnt 0 2006.232.07:56:59.70#ibcon#cleared, iclass 6 cls_cnt 0 2006.232.07:56:59.70$vc4f8/va=6,6 2006.232.07:56:59.70#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.232.07:56:59.70#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.232.07:56:59.70#ibcon#ireg 11 cls_cnt 2 2006.232.07:56:59.70#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.232.07:56:59.76#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.232.07:56:59.76#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.232.07:56:59.76#ibcon#enter wrdev, iclass 10, count 2 2006.232.07:56:59.76#ibcon#first serial, iclass 10, count 2 2006.232.07:56:59.76#ibcon#enter sib2, iclass 10, count 2 2006.232.07:56:59.76#ibcon#flushed, iclass 10, count 2 2006.232.07:56:59.76#ibcon#about to write, iclass 10, count 2 2006.232.07:56:59.76#ibcon#wrote, iclass 10, count 2 2006.232.07:56:59.76#ibcon#about to read 3, iclass 10, count 2 2006.232.07:56:59.78#ibcon#read 3, iclass 10, count 2 2006.232.07:56:59.78#ibcon#about to read 4, iclass 10, count 2 2006.232.07:56:59.78#ibcon#read 4, iclass 10, count 2 2006.232.07:56:59.78#ibcon#about to read 5, iclass 10, count 2 2006.232.07:56:59.78#ibcon#read 5, iclass 10, count 2 2006.232.07:56:59.78#ibcon#about to read 6, iclass 10, count 2 2006.232.07:56:59.78#ibcon#read 6, iclass 10, count 2 2006.232.07:56:59.78#ibcon#end of sib2, iclass 10, count 2 2006.232.07:56:59.78#ibcon#*mode == 0, iclass 10, count 2 2006.232.07:56:59.78#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.232.07:56:59.78#ibcon#[25=AT06-06\r\n] 2006.232.07:56:59.78#ibcon#*before write, iclass 10, count 2 2006.232.07:56:59.78#ibcon#enter sib2, iclass 10, count 2 2006.232.07:56:59.78#ibcon#flushed, iclass 10, count 2 2006.232.07:56:59.78#ibcon#about to write, iclass 10, count 2 2006.232.07:56:59.78#ibcon#wrote, iclass 10, count 2 2006.232.07:56:59.78#ibcon#about to read 3, iclass 10, count 2 2006.232.07:56:59.81#ibcon#read 3, iclass 10, count 2 2006.232.07:56:59.81#ibcon#about to read 4, iclass 10, count 2 2006.232.07:56:59.81#ibcon#read 4, iclass 10, count 2 2006.232.07:56:59.81#ibcon#about to read 5, iclass 10, count 2 2006.232.07:56:59.81#ibcon#read 5, iclass 10, count 2 2006.232.07:56:59.81#ibcon#about to read 6, iclass 10, count 2 2006.232.07:56:59.81#ibcon#read 6, iclass 10, count 2 2006.232.07:56:59.81#ibcon#end of sib2, iclass 10, count 2 2006.232.07:56:59.81#ibcon#*after write, iclass 10, count 2 2006.232.07:56:59.81#ibcon#*before return 0, iclass 10, count 2 2006.232.07:56:59.81#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.232.07:56:59.81#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.232.07:56:59.81#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.232.07:56:59.81#ibcon#ireg 7 cls_cnt 0 2006.232.07:56:59.81#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.232.07:56:59.93#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.232.07:56:59.93#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.232.07:56:59.93#ibcon#enter wrdev, iclass 10, count 0 2006.232.07:56:59.93#ibcon#first serial, iclass 10, count 0 2006.232.07:56:59.93#ibcon#enter sib2, iclass 10, count 0 2006.232.07:56:59.93#ibcon#flushed, iclass 10, count 0 2006.232.07:56:59.93#ibcon#about to write, iclass 10, count 0 2006.232.07:56:59.93#ibcon#wrote, iclass 10, count 0 2006.232.07:56:59.93#ibcon#about to read 3, iclass 10, count 0 2006.232.07:56:59.95#ibcon#read 3, iclass 10, count 0 2006.232.07:56:59.95#ibcon#about to read 4, iclass 10, count 0 2006.232.07:56:59.95#ibcon#read 4, iclass 10, count 0 2006.232.07:56:59.95#ibcon#about to read 5, iclass 10, count 0 2006.232.07:56:59.95#ibcon#read 5, iclass 10, count 0 2006.232.07:56:59.95#ibcon#about to read 6, iclass 10, count 0 2006.232.07:56:59.95#ibcon#read 6, iclass 10, count 0 2006.232.07:56:59.95#ibcon#end of sib2, iclass 10, count 0 2006.232.07:56:59.95#ibcon#*mode == 0, iclass 10, count 0 2006.232.07:56:59.95#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.232.07:56:59.95#ibcon#[25=USB\r\n] 2006.232.07:56:59.95#ibcon#*before write, iclass 10, count 0 2006.232.07:56:59.95#ibcon#enter sib2, iclass 10, count 0 2006.232.07:56:59.95#ibcon#flushed, iclass 10, count 0 2006.232.07:56:59.95#ibcon#about to write, iclass 10, count 0 2006.232.07:56:59.95#ibcon#wrote, iclass 10, count 0 2006.232.07:56:59.95#ibcon#about to read 3, iclass 10, count 0 2006.232.07:56:59.98#ibcon#read 3, iclass 10, count 0 2006.232.07:56:59.98#ibcon#about to read 4, iclass 10, count 0 2006.232.07:56:59.98#ibcon#read 4, iclass 10, count 0 2006.232.07:56:59.98#ibcon#about to read 5, iclass 10, count 0 2006.232.07:56:59.98#ibcon#read 5, iclass 10, count 0 2006.232.07:56:59.98#ibcon#about to read 6, iclass 10, count 0 2006.232.07:56:59.98#ibcon#read 6, iclass 10, count 0 2006.232.07:56:59.98#ibcon#end of sib2, iclass 10, count 0 2006.232.07:56:59.98#ibcon#*after write, iclass 10, count 0 2006.232.07:56:59.98#ibcon#*before return 0, iclass 10, count 0 2006.232.07:56:59.98#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.232.07:56:59.98#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.232.07:56:59.98#ibcon#about to clear, iclass 10 cls_cnt 0 2006.232.07:56:59.98#ibcon#cleared, iclass 10 cls_cnt 0 2006.232.07:56:59.98$vc4f8/valo=7,832.99 2006.232.07:56:59.98#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.232.07:56:59.98#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.232.07:56:59.98#ibcon#ireg 17 cls_cnt 0 2006.232.07:56:59.98#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.232.07:56:59.98#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.232.07:56:59.98#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.232.07:56:59.98#ibcon#enter wrdev, iclass 12, count 0 2006.232.07:56:59.98#ibcon#first serial, iclass 12, count 0 2006.232.07:56:59.98#ibcon#enter sib2, iclass 12, count 0 2006.232.07:56:59.98#ibcon#flushed, iclass 12, count 0 2006.232.07:56:59.98#ibcon#about to write, iclass 12, count 0 2006.232.07:56:59.98#ibcon#wrote, iclass 12, count 0 2006.232.07:56:59.98#ibcon#about to read 3, iclass 12, count 0 2006.232.07:57:00.00#ibcon#read 3, iclass 12, count 0 2006.232.07:57:00.00#ibcon#about to read 4, iclass 12, count 0 2006.232.07:57:00.00#ibcon#read 4, iclass 12, count 0 2006.232.07:57:00.00#ibcon#about to read 5, iclass 12, count 0 2006.232.07:57:00.00#ibcon#read 5, iclass 12, count 0 2006.232.07:57:00.00#ibcon#about to read 6, iclass 12, count 0 2006.232.07:57:00.00#ibcon#read 6, iclass 12, count 0 2006.232.07:57:00.00#ibcon#end of sib2, iclass 12, count 0 2006.232.07:57:00.00#ibcon#*mode == 0, iclass 12, count 0 2006.232.07:57:00.00#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.232.07:57:00.00#ibcon#[26=FRQ=07,832.99\r\n] 2006.232.07:57:00.00#ibcon#*before write, iclass 12, count 0 2006.232.07:57:00.00#ibcon#enter sib2, iclass 12, count 0 2006.232.07:57:00.00#ibcon#flushed, iclass 12, count 0 2006.232.07:57:00.00#ibcon#about to write, iclass 12, count 0 2006.232.07:57:00.00#ibcon#wrote, iclass 12, count 0 2006.232.07:57:00.00#ibcon#about to read 3, iclass 12, count 0 2006.232.07:57:00.04#ibcon#read 3, iclass 12, count 0 2006.232.07:57:00.04#ibcon#about to read 4, iclass 12, count 0 2006.232.07:57:00.04#ibcon#read 4, iclass 12, count 0 2006.232.07:57:00.04#ibcon#about to read 5, iclass 12, count 0 2006.232.07:57:00.04#ibcon#read 5, iclass 12, count 0 2006.232.07:57:00.04#ibcon#about to read 6, iclass 12, count 0 2006.232.07:57:00.04#ibcon#read 6, iclass 12, count 0 2006.232.07:57:00.04#ibcon#end of sib2, iclass 12, count 0 2006.232.07:57:00.04#ibcon#*after write, iclass 12, count 0 2006.232.07:57:00.04#ibcon#*before return 0, iclass 12, count 0 2006.232.07:57:00.04#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.232.07:57:00.04#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.232.07:57:00.04#ibcon#about to clear, iclass 12 cls_cnt 0 2006.232.07:57:00.04#ibcon#cleared, iclass 12 cls_cnt 0 2006.232.07:57:00.04$vc4f8/va=7,6 2006.232.07:57:00.04#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.232.07:57:00.04#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.232.07:57:00.04#ibcon#ireg 11 cls_cnt 2 2006.232.07:57:00.04#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.232.07:57:00.10#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.232.07:57:00.10#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.232.07:57:00.10#ibcon#enter wrdev, iclass 14, count 2 2006.232.07:57:00.10#ibcon#first serial, iclass 14, count 2 2006.232.07:57:00.10#ibcon#enter sib2, iclass 14, count 2 2006.232.07:57:00.10#ibcon#flushed, iclass 14, count 2 2006.232.07:57:00.10#ibcon#about to write, iclass 14, count 2 2006.232.07:57:00.10#ibcon#wrote, iclass 14, count 2 2006.232.07:57:00.10#ibcon#about to read 3, iclass 14, count 2 2006.232.07:57:00.12#ibcon#read 3, iclass 14, count 2 2006.232.07:57:00.12#ibcon#about to read 4, iclass 14, count 2 2006.232.07:57:00.12#ibcon#read 4, iclass 14, count 2 2006.232.07:57:00.12#ibcon#about to read 5, iclass 14, count 2 2006.232.07:57:00.12#ibcon#read 5, iclass 14, count 2 2006.232.07:57:00.12#ibcon#about to read 6, iclass 14, count 2 2006.232.07:57:00.12#ibcon#read 6, iclass 14, count 2 2006.232.07:57:00.12#ibcon#end of sib2, iclass 14, count 2 2006.232.07:57:00.12#ibcon#*mode == 0, iclass 14, count 2 2006.232.07:57:00.12#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.232.07:57:00.12#ibcon#[25=AT07-06\r\n] 2006.232.07:57:00.12#ibcon#*before write, iclass 14, count 2 2006.232.07:57:00.12#ibcon#enter sib2, iclass 14, count 2 2006.232.07:57:00.12#ibcon#flushed, iclass 14, count 2 2006.232.07:57:00.12#ibcon#about to write, iclass 14, count 2 2006.232.07:57:00.12#ibcon#wrote, iclass 14, count 2 2006.232.07:57:00.12#ibcon#about to read 3, iclass 14, count 2 2006.232.07:57:00.15#ibcon#read 3, iclass 14, count 2 2006.232.07:57:00.15#ibcon#about to read 4, iclass 14, count 2 2006.232.07:57:00.15#ibcon#read 4, iclass 14, count 2 2006.232.07:57:00.15#ibcon#about to read 5, iclass 14, count 2 2006.232.07:57:00.15#ibcon#read 5, iclass 14, count 2 2006.232.07:57:00.15#ibcon#about to read 6, iclass 14, count 2 2006.232.07:57:00.15#ibcon#read 6, iclass 14, count 2 2006.232.07:57:00.15#ibcon#end of sib2, iclass 14, count 2 2006.232.07:57:00.15#ibcon#*after write, iclass 14, count 2 2006.232.07:57:00.15#ibcon#*before return 0, iclass 14, count 2 2006.232.07:57:00.15#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.232.07:57:00.15#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.232.07:57:00.15#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.232.07:57:00.15#ibcon#ireg 7 cls_cnt 0 2006.232.07:57:00.15#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.232.07:57:00.27#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.232.07:57:00.27#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.232.07:57:00.27#ibcon#enter wrdev, iclass 14, count 0 2006.232.07:57:00.27#ibcon#first serial, iclass 14, count 0 2006.232.07:57:00.27#ibcon#enter sib2, iclass 14, count 0 2006.232.07:57:00.27#ibcon#flushed, iclass 14, count 0 2006.232.07:57:00.27#ibcon#about to write, iclass 14, count 0 2006.232.07:57:00.27#ibcon#wrote, iclass 14, count 0 2006.232.07:57:00.27#ibcon#about to read 3, iclass 14, count 0 2006.232.07:57:00.29#ibcon#read 3, iclass 14, count 0 2006.232.07:57:00.29#ibcon#about to read 4, iclass 14, count 0 2006.232.07:57:00.29#ibcon#read 4, iclass 14, count 0 2006.232.07:57:00.29#ibcon#about to read 5, iclass 14, count 0 2006.232.07:57:00.29#ibcon#read 5, iclass 14, count 0 2006.232.07:57:00.29#ibcon#about to read 6, iclass 14, count 0 2006.232.07:57:00.29#ibcon#read 6, iclass 14, count 0 2006.232.07:57:00.29#ibcon#end of sib2, iclass 14, count 0 2006.232.07:57:00.29#ibcon#*mode == 0, iclass 14, count 0 2006.232.07:57:00.29#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.232.07:57:00.29#ibcon#[25=USB\r\n] 2006.232.07:57:00.29#ibcon#*before write, iclass 14, count 0 2006.232.07:57:00.29#ibcon#enter sib2, iclass 14, count 0 2006.232.07:57:00.29#ibcon#flushed, iclass 14, count 0 2006.232.07:57:00.29#ibcon#about to write, iclass 14, count 0 2006.232.07:57:00.29#ibcon#wrote, iclass 14, count 0 2006.232.07:57:00.29#ibcon#about to read 3, iclass 14, count 0 2006.232.07:57:00.32#ibcon#read 3, iclass 14, count 0 2006.232.07:57:00.32#ibcon#about to read 4, iclass 14, count 0 2006.232.07:57:00.32#ibcon#read 4, iclass 14, count 0 2006.232.07:57:00.32#ibcon#about to read 5, iclass 14, count 0 2006.232.07:57:00.32#ibcon#read 5, iclass 14, count 0 2006.232.07:57:00.32#ibcon#about to read 6, iclass 14, count 0 2006.232.07:57:00.32#ibcon#read 6, iclass 14, count 0 2006.232.07:57:00.32#ibcon#end of sib2, iclass 14, count 0 2006.232.07:57:00.32#ibcon#*after write, iclass 14, count 0 2006.232.07:57:00.32#ibcon#*before return 0, iclass 14, count 0 2006.232.07:57:00.32#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.232.07:57:00.32#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.232.07:57:00.32#ibcon#about to clear, iclass 14 cls_cnt 0 2006.232.07:57:00.32#ibcon#cleared, iclass 14 cls_cnt 0 2006.232.07:57:00.32$vc4f8/valo=8,852.99 2006.232.07:57:00.32#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.232.07:57:00.32#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.232.07:57:00.32#ibcon#ireg 17 cls_cnt 0 2006.232.07:57:00.32#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:57:00.32#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:57:00.32#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:57:00.32#ibcon#enter wrdev, iclass 16, count 0 2006.232.07:57:00.32#ibcon#first serial, iclass 16, count 0 2006.232.07:57:00.32#ibcon#enter sib2, iclass 16, count 0 2006.232.07:57:00.32#ibcon#flushed, iclass 16, count 0 2006.232.07:57:00.32#ibcon#about to write, iclass 16, count 0 2006.232.07:57:00.32#ibcon#wrote, iclass 16, count 0 2006.232.07:57:00.32#ibcon#about to read 3, iclass 16, count 0 2006.232.07:57:00.34#ibcon#read 3, iclass 16, count 0 2006.232.07:57:00.34#ibcon#about to read 4, iclass 16, count 0 2006.232.07:57:00.34#ibcon#read 4, iclass 16, count 0 2006.232.07:57:00.34#ibcon#about to read 5, iclass 16, count 0 2006.232.07:57:00.34#ibcon#read 5, iclass 16, count 0 2006.232.07:57:00.34#ibcon#about to read 6, iclass 16, count 0 2006.232.07:57:00.34#ibcon#read 6, iclass 16, count 0 2006.232.07:57:00.34#ibcon#end of sib2, iclass 16, count 0 2006.232.07:57:00.34#ibcon#*mode == 0, iclass 16, count 0 2006.232.07:57:00.34#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.232.07:57:00.34#ibcon#[26=FRQ=08,852.99\r\n] 2006.232.07:57:00.34#ibcon#*before write, iclass 16, count 0 2006.232.07:57:00.34#ibcon#enter sib2, iclass 16, count 0 2006.232.07:57:00.34#ibcon#flushed, iclass 16, count 0 2006.232.07:57:00.34#ibcon#about to write, iclass 16, count 0 2006.232.07:57:00.34#ibcon#wrote, iclass 16, count 0 2006.232.07:57:00.34#ibcon#about to read 3, iclass 16, count 0 2006.232.07:57:00.38#ibcon#read 3, iclass 16, count 0 2006.232.07:57:00.38#ibcon#about to read 4, iclass 16, count 0 2006.232.07:57:00.38#ibcon#read 4, iclass 16, count 0 2006.232.07:57:00.38#ibcon#about to read 5, iclass 16, count 0 2006.232.07:57:00.38#ibcon#read 5, iclass 16, count 0 2006.232.07:57:00.38#ibcon#about to read 6, iclass 16, count 0 2006.232.07:57:00.38#ibcon#read 6, iclass 16, count 0 2006.232.07:57:00.38#ibcon#end of sib2, iclass 16, count 0 2006.232.07:57:00.38#ibcon#*after write, iclass 16, count 0 2006.232.07:57:00.38#ibcon#*before return 0, iclass 16, count 0 2006.232.07:57:00.38#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:57:00.38#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.232.07:57:00.38#ibcon#about to clear, iclass 16 cls_cnt 0 2006.232.07:57:00.38#ibcon#cleared, iclass 16 cls_cnt 0 2006.232.07:57:00.38$vc4f8/va=8,6 2006.232.07:57:00.38#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.232.07:57:00.38#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.232.07:57:00.38#ibcon#ireg 11 cls_cnt 2 2006.232.07:57:00.38#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:57:00.44#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:57:00.44#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:57:00.44#ibcon#enter wrdev, iclass 18, count 2 2006.232.07:57:00.44#ibcon#first serial, iclass 18, count 2 2006.232.07:57:00.44#ibcon#enter sib2, iclass 18, count 2 2006.232.07:57:00.44#ibcon#flushed, iclass 18, count 2 2006.232.07:57:00.44#ibcon#about to write, iclass 18, count 2 2006.232.07:57:00.44#ibcon#wrote, iclass 18, count 2 2006.232.07:57:00.44#ibcon#about to read 3, iclass 18, count 2 2006.232.07:57:00.47#ibcon#read 3, iclass 18, count 2 2006.232.07:57:00.47#ibcon#about to read 4, iclass 18, count 2 2006.232.07:57:00.47#ibcon#read 4, iclass 18, count 2 2006.232.07:57:00.47#ibcon#about to read 5, iclass 18, count 2 2006.232.07:57:00.47#ibcon#read 5, iclass 18, count 2 2006.232.07:57:00.47#ibcon#about to read 6, iclass 18, count 2 2006.232.07:57:00.47#ibcon#read 6, iclass 18, count 2 2006.232.07:57:00.47#ibcon#end of sib2, iclass 18, count 2 2006.232.07:57:00.47#ibcon#*mode == 0, iclass 18, count 2 2006.232.07:57:00.47#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.232.07:57:00.47#ibcon#[25=AT08-06\r\n] 2006.232.07:57:00.47#ibcon#*before write, iclass 18, count 2 2006.232.07:57:00.47#ibcon#enter sib2, iclass 18, count 2 2006.232.07:57:00.47#ibcon#flushed, iclass 18, count 2 2006.232.07:57:00.47#ibcon#about to write, iclass 18, count 2 2006.232.07:57:00.47#ibcon#wrote, iclass 18, count 2 2006.232.07:57:00.47#ibcon#about to read 3, iclass 18, count 2 2006.232.07:57:00.50#ibcon#read 3, iclass 18, count 2 2006.232.07:57:00.50#ibcon#about to read 4, iclass 18, count 2 2006.232.07:57:00.50#ibcon#read 4, iclass 18, count 2 2006.232.07:57:00.50#ibcon#about to read 5, iclass 18, count 2 2006.232.07:57:00.50#ibcon#read 5, iclass 18, count 2 2006.232.07:57:00.50#ibcon#about to read 6, iclass 18, count 2 2006.232.07:57:00.50#ibcon#read 6, iclass 18, count 2 2006.232.07:57:00.50#ibcon#end of sib2, iclass 18, count 2 2006.232.07:57:00.50#ibcon#*after write, iclass 18, count 2 2006.232.07:57:00.50#ibcon#*before return 0, iclass 18, count 2 2006.232.07:57:00.50#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:57:00.50#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.232.07:57:00.50#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.232.07:57:00.50#ibcon#ireg 7 cls_cnt 0 2006.232.07:57:00.50#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:57:00.62#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:57:00.62#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:57:00.62#ibcon#enter wrdev, iclass 18, count 0 2006.232.07:57:00.62#ibcon#first serial, iclass 18, count 0 2006.232.07:57:00.62#ibcon#enter sib2, iclass 18, count 0 2006.232.07:57:00.62#ibcon#flushed, iclass 18, count 0 2006.232.07:57:00.62#ibcon#about to write, iclass 18, count 0 2006.232.07:57:00.62#ibcon#wrote, iclass 18, count 0 2006.232.07:57:00.62#ibcon#about to read 3, iclass 18, count 0 2006.232.07:57:00.64#ibcon#read 3, iclass 18, count 0 2006.232.07:57:00.64#ibcon#about to read 4, iclass 18, count 0 2006.232.07:57:00.64#ibcon#read 4, iclass 18, count 0 2006.232.07:57:00.64#ibcon#about to read 5, iclass 18, count 0 2006.232.07:57:00.64#ibcon#read 5, iclass 18, count 0 2006.232.07:57:00.64#ibcon#about to read 6, iclass 18, count 0 2006.232.07:57:00.64#ibcon#read 6, iclass 18, count 0 2006.232.07:57:00.64#ibcon#end of sib2, iclass 18, count 0 2006.232.07:57:00.64#ibcon#*mode == 0, iclass 18, count 0 2006.232.07:57:00.64#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.232.07:57:00.64#ibcon#[25=USB\r\n] 2006.232.07:57:00.64#ibcon#*before write, iclass 18, count 0 2006.232.07:57:00.64#ibcon#enter sib2, iclass 18, count 0 2006.232.07:57:00.64#ibcon#flushed, iclass 18, count 0 2006.232.07:57:00.64#ibcon#about to write, iclass 18, count 0 2006.232.07:57:00.64#ibcon#wrote, iclass 18, count 0 2006.232.07:57:00.64#ibcon#about to read 3, iclass 18, count 0 2006.232.07:57:00.67#ibcon#read 3, iclass 18, count 0 2006.232.07:57:00.67#ibcon#about to read 4, iclass 18, count 0 2006.232.07:57:00.67#ibcon#read 4, iclass 18, count 0 2006.232.07:57:00.67#ibcon#about to read 5, iclass 18, count 0 2006.232.07:57:00.67#ibcon#read 5, iclass 18, count 0 2006.232.07:57:00.67#ibcon#about to read 6, iclass 18, count 0 2006.232.07:57:00.67#ibcon#read 6, iclass 18, count 0 2006.232.07:57:00.67#ibcon#end of sib2, iclass 18, count 0 2006.232.07:57:00.67#ibcon#*after write, iclass 18, count 0 2006.232.07:57:00.67#ibcon#*before return 0, iclass 18, count 0 2006.232.07:57:00.67#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:57:00.67#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.232.07:57:00.67#ibcon#about to clear, iclass 18 cls_cnt 0 2006.232.07:57:00.67#ibcon#cleared, iclass 18 cls_cnt 0 2006.232.07:57:00.67$vc4f8/vblo=1,632.99 2006.232.07:57:00.67#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.232.07:57:00.67#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.232.07:57:00.67#ibcon#ireg 17 cls_cnt 0 2006.232.07:57:00.67#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:57:00.67#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:57:00.67#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:57:00.67#ibcon#enter wrdev, iclass 20, count 0 2006.232.07:57:00.67#ibcon#first serial, iclass 20, count 0 2006.232.07:57:00.67#ibcon#enter sib2, iclass 20, count 0 2006.232.07:57:00.67#ibcon#flushed, iclass 20, count 0 2006.232.07:57:00.67#ibcon#about to write, iclass 20, count 0 2006.232.07:57:00.67#ibcon#wrote, iclass 20, count 0 2006.232.07:57:00.67#ibcon#about to read 3, iclass 20, count 0 2006.232.07:57:00.69#ibcon#read 3, iclass 20, count 0 2006.232.07:57:00.69#ibcon#about to read 4, iclass 20, count 0 2006.232.07:57:00.69#ibcon#read 4, iclass 20, count 0 2006.232.07:57:00.69#ibcon#about to read 5, iclass 20, count 0 2006.232.07:57:00.69#ibcon#read 5, iclass 20, count 0 2006.232.07:57:00.69#ibcon#about to read 6, iclass 20, count 0 2006.232.07:57:00.69#ibcon#read 6, iclass 20, count 0 2006.232.07:57:00.69#ibcon#end of sib2, iclass 20, count 0 2006.232.07:57:00.69#ibcon#*mode == 0, iclass 20, count 0 2006.232.07:57:00.69#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.232.07:57:00.69#ibcon#[28=FRQ=01,632.99\r\n] 2006.232.07:57:00.69#ibcon#*before write, iclass 20, count 0 2006.232.07:57:00.69#ibcon#enter sib2, iclass 20, count 0 2006.232.07:57:00.69#ibcon#flushed, iclass 20, count 0 2006.232.07:57:00.69#ibcon#about to write, iclass 20, count 0 2006.232.07:57:00.69#ibcon#wrote, iclass 20, count 0 2006.232.07:57:00.69#ibcon#about to read 3, iclass 20, count 0 2006.232.07:57:00.73#ibcon#read 3, iclass 20, count 0 2006.232.07:57:00.73#ibcon#about to read 4, iclass 20, count 0 2006.232.07:57:00.73#ibcon#read 4, iclass 20, count 0 2006.232.07:57:00.73#ibcon#about to read 5, iclass 20, count 0 2006.232.07:57:00.73#ibcon#read 5, iclass 20, count 0 2006.232.07:57:00.73#ibcon#about to read 6, iclass 20, count 0 2006.232.07:57:00.73#ibcon#read 6, iclass 20, count 0 2006.232.07:57:00.73#ibcon#end of sib2, iclass 20, count 0 2006.232.07:57:00.73#ibcon#*after write, iclass 20, count 0 2006.232.07:57:00.73#ibcon#*before return 0, iclass 20, count 0 2006.232.07:57:00.73#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:57:00.73#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.232.07:57:00.73#ibcon#about to clear, iclass 20 cls_cnt 0 2006.232.07:57:00.73#ibcon#cleared, iclass 20 cls_cnt 0 2006.232.07:57:00.73$vc4f8/vb=1,4 2006.232.07:57:00.73#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.232.07:57:00.73#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.232.07:57:00.73#ibcon#ireg 11 cls_cnt 2 2006.232.07:57:00.73#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:57:00.73#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:57:00.73#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:57:00.73#ibcon#enter wrdev, iclass 22, count 2 2006.232.07:57:00.73#ibcon#first serial, iclass 22, count 2 2006.232.07:57:00.73#ibcon#enter sib2, iclass 22, count 2 2006.232.07:57:00.73#ibcon#flushed, iclass 22, count 2 2006.232.07:57:00.73#ibcon#about to write, iclass 22, count 2 2006.232.07:57:00.73#ibcon#wrote, iclass 22, count 2 2006.232.07:57:00.73#ibcon#about to read 3, iclass 22, count 2 2006.232.07:57:00.75#ibcon#read 3, iclass 22, count 2 2006.232.07:57:00.75#ibcon#about to read 4, iclass 22, count 2 2006.232.07:57:00.75#ibcon#read 4, iclass 22, count 2 2006.232.07:57:00.75#ibcon#about to read 5, iclass 22, count 2 2006.232.07:57:00.75#ibcon#read 5, iclass 22, count 2 2006.232.07:57:00.75#ibcon#about to read 6, iclass 22, count 2 2006.232.07:57:00.75#ibcon#read 6, iclass 22, count 2 2006.232.07:57:00.75#ibcon#end of sib2, iclass 22, count 2 2006.232.07:57:00.75#ibcon#*mode == 0, iclass 22, count 2 2006.232.07:57:00.75#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.232.07:57:00.75#ibcon#[27=AT01-04\r\n] 2006.232.07:57:00.75#ibcon#*before write, iclass 22, count 2 2006.232.07:57:00.75#ibcon#enter sib2, iclass 22, count 2 2006.232.07:57:00.75#ibcon#flushed, iclass 22, count 2 2006.232.07:57:00.75#ibcon#about to write, iclass 22, count 2 2006.232.07:57:00.75#ibcon#wrote, iclass 22, count 2 2006.232.07:57:00.75#ibcon#about to read 3, iclass 22, count 2 2006.232.07:57:00.78#ibcon#read 3, iclass 22, count 2 2006.232.07:57:00.78#ibcon#about to read 4, iclass 22, count 2 2006.232.07:57:00.78#ibcon#read 4, iclass 22, count 2 2006.232.07:57:00.78#ibcon#about to read 5, iclass 22, count 2 2006.232.07:57:00.78#ibcon#read 5, iclass 22, count 2 2006.232.07:57:00.78#ibcon#about to read 6, iclass 22, count 2 2006.232.07:57:00.78#ibcon#read 6, iclass 22, count 2 2006.232.07:57:00.78#ibcon#end of sib2, iclass 22, count 2 2006.232.07:57:00.78#ibcon#*after write, iclass 22, count 2 2006.232.07:57:00.78#ibcon#*before return 0, iclass 22, count 2 2006.232.07:57:00.78#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:57:00.78#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.232.07:57:00.78#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.232.07:57:00.78#ibcon#ireg 7 cls_cnt 0 2006.232.07:57:00.78#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:57:00.90#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:57:00.90#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:57:00.90#ibcon#enter wrdev, iclass 22, count 0 2006.232.07:57:00.90#ibcon#first serial, iclass 22, count 0 2006.232.07:57:00.90#ibcon#enter sib2, iclass 22, count 0 2006.232.07:57:00.90#ibcon#flushed, iclass 22, count 0 2006.232.07:57:00.90#ibcon#about to write, iclass 22, count 0 2006.232.07:57:00.90#ibcon#wrote, iclass 22, count 0 2006.232.07:57:00.90#ibcon#about to read 3, iclass 22, count 0 2006.232.07:57:00.92#ibcon#read 3, iclass 22, count 0 2006.232.07:57:00.92#ibcon#about to read 4, iclass 22, count 0 2006.232.07:57:00.92#ibcon#read 4, iclass 22, count 0 2006.232.07:57:00.92#ibcon#about to read 5, iclass 22, count 0 2006.232.07:57:00.92#ibcon#read 5, iclass 22, count 0 2006.232.07:57:00.92#ibcon#about to read 6, iclass 22, count 0 2006.232.07:57:00.92#ibcon#read 6, iclass 22, count 0 2006.232.07:57:00.92#ibcon#end of sib2, iclass 22, count 0 2006.232.07:57:00.92#ibcon#*mode == 0, iclass 22, count 0 2006.232.07:57:00.92#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.232.07:57:00.92#ibcon#[27=USB\r\n] 2006.232.07:57:00.92#ibcon#*before write, iclass 22, count 0 2006.232.07:57:00.92#ibcon#enter sib2, iclass 22, count 0 2006.232.07:57:00.92#ibcon#flushed, iclass 22, count 0 2006.232.07:57:00.92#ibcon#about to write, iclass 22, count 0 2006.232.07:57:00.92#ibcon#wrote, iclass 22, count 0 2006.232.07:57:00.92#ibcon#about to read 3, iclass 22, count 0 2006.232.07:57:00.95#ibcon#read 3, iclass 22, count 0 2006.232.07:57:00.95#ibcon#about to read 4, iclass 22, count 0 2006.232.07:57:00.95#ibcon#read 4, iclass 22, count 0 2006.232.07:57:00.95#ibcon#about to read 5, iclass 22, count 0 2006.232.07:57:00.95#ibcon#read 5, iclass 22, count 0 2006.232.07:57:00.95#ibcon#about to read 6, iclass 22, count 0 2006.232.07:57:00.95#ibcon#read 6, iclass 22, count 0 2006.232.07:57:00.95#ibcon#end of sib2, iclass 22, count 0 2006.232.07:57:00.95#ibcon#*after write, iclass 22, count 0 2006.232.07:57:00.95#ibcon#*before return 0, iclass 22, count 0 2006.232.07:57:00.95#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:57:00.95#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.232.07:57:00.95#ibcon#about to clear, iclass 22 cls_cnt 0 2006.232.07:57:00.95#ibcon#cleared, iclass 22 cls_cnt 0 2006.232.07:57:00.95$vc4f8/vblo=2,640.99 2006.232.07:57:00.95#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.232.07:57:00.95#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.232.07:57:00.95#ibcon#ireg 17 cls_cnt 0 2006.232.07:57:00.95#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:57:00.95#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:57:00.95#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:57:00.95#ibcon#enter wrdev, iclass 24, count 0 2006.232.07:57:00.95#ibcon#first serial, iclass 24, count 0 2006.232.07:57:00.95#ibcon#enter sib2, iclass 24, count 0 2006.232.07:57:00.95#ibcon#flushed, iclass 24, count 0 2006.232.07:57:00.95#ibcon#about to write, iclass 24, count 0 2006.232.07:57:00.95#ibcon#wrote, iclass 24, count 0 2006.232.07:57:00.95#ibcon#about to read 3, iclass 24, count 0 2006.232.07:57:00.97#ibcon#read 3, iclass 24, count 0 2006.232.07:57:00.97#ibcon#about to read 4, iclass 24, count 0 2006.232.07:57:00.97#ibcon#read 4, iclass 24, count 0 2006.232.07:57:00.97#ibcon#about to read 5, iclass 24, count 0 2006.232.07:57:00.97#ibcon#read 5, iclass 24, count 0 2006.232.07:57:00.97#ibcon#about to read 6, iclass 24, count 0 2006.232.07:57:00.97#ibcon#read 6, iclass 24, count 0 2006.232.07:57:00.97#ibcon#end of sib2, iclass 24, count 0 2006.232.07:57:00.97#ibcon#*mode == 0, iclass 24, count 0 2006.232.07:57:00.97#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.232.07:57:00.97#ibcon#[28=FRQ=02,640.99\r\n] 2006.232.07:57:00.97#ibcon#*before write, iclass 24, count 0 2006.232.07:57:00.97#ibcon#enter sib2, iclass 24, count 0 2006.232.07:57:00.97#ibcon#flushed, iclass 24, count 0 2006.232.07:57:00.97#ibcon#about to write, iclass 24, count 0 2006.232.07:57:00.97#ibcon#wrote, iclass 24, count 0 2006.232.07:57:00.97#ibcon#about to read 3, iclass 24, count 0 2006.232.07:57:01.01#ibcon#read 3, iclass 24, count 0 2006.232.07:57:01.01#ibcon#about to read 4, iclass 24, count 0 2006.232.07:57:01.01#ibcon#read 4, iclass 24, count 0 2006.232.07:57:01.01#ibcon#about to read 5, iclass 24, count 0 2006.232.07:57:01.01#ibcon#read 5, iclass 24, count 0 2006.232.07:57:01.01#ibcon#about to read 6, iclass 24, count 0 2006.232.07:57:01.01#ibcon#read 6, iclass 24, count 0 2006.232.07:57:01.01#ibcon#end of sib2, iclass 24, count 0 2006.232.07:57:01.01#ibcon#*after write, iclass 24, count 0 2006.232.07:57:01.01#ibcon#*before return 0, iclass 24, count 0 2006.232.07:57:01.01#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:57:01.01#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.232.07:57:01.01#ibcon#about to clear, iclass 24 cls_cnt 0 2006.232.07:57:01.01#ibcon#cleared, iclass 24 cls_cnt 0 2006.232.07:57:01.01$vc4f8/vb=2,4 2006.232.07:57:01.01#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.232.07:57:01.01#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.232.07:57:01.01#ibcon#ireg 11 cls_cnt 2 2006.232.07:57:01.01#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:57:01.07#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:57:01.07#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:57:01.07#ibcon#enter wrdev, iclass 26, count 2 2006.232.07:57:01.07#ibcon#first serial, iclass 26, count 2 2006.232.07:57:01.07#ibcon#enter sib2, iclass 26, count 2 2006.232.07:57:01.07#ibcon#flushed, iclass 26, count 2 2006.232.07:57:01.07#ibcon#about to write, iclass 26, count 2 2006.232.07:57:01.07#ibcon#wrote, iclass 26, count 2 2006.232.07:57:01.07#ibcon#about to read 3, iclass 26, count 2 2006.232.07:57:01.09#ibcon#read 3, iclass 26, count 2 2006.232.07:57:01.09#ibcon#about to read 4, iclass 26, count 2 2006.232.07:57:01.09#ibcon#read 4, iclass 26, count 2 2006.232.07:57:01.09#ibcon#about to read 5, iclass 26, count 2 2006.232.07:57:01.09#ibcon#read 5, iclass 26, count 2 2006.232.07:57:01.09#ibcon#about to read 6, iclass 26, count 2 2006.232.07:57:01.09#ibcon#read 6, iclass 26, count 2 2006.232.07:57:01.09#ibcon#end of sib2, iclass 26, count 2 2006.232.07:57:01.09#ibcon#*mode == 0, iclass 26, count 2 2006.232.07:57:01.09#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.232.07:57:01.09#ibcon#[27=AT02-04\r\n] 2006.232.07:57:01.09#ibcon#*before write, iclass 26, count 2 2006.232.07:57:01.09#ibcon#enter sib2, iclass 26, count 2 2006.232.07:57:01.09#ibcon#flushed, iclass 26, count 2 2006.232.07:57:01.09#ibcon#about to write, iclass 26, count 2 2006.232.07:57:01.09#ibcon#wrote, iclass 26, count 2 2006.232.07:57:01.09#ibcon#about to read 3, iclass 26, count 2 2006.232.07:57:01.12#ibcon#read 3, iclass 26, count 2 2006.232.07:57:01.12#ibcon#about to read 4, iclass 26, count 2 2006.232.07:57:01.12#ibcon#read 4, iclass 26, count 2 2006.232.07:57:01.12#ibcon#about to read 5, iclass 26, count 2 2006.232.07:57:01.12#ibcon#read 5, iclass 26, count 2 2006.232.07:57:01.12#ibcon#about to read 6, iclass 26, count 2 2006.232.07:57:01.12#ibcon#read 6, iclass 26, count 2 2006.232.07:57:01.12#ibcon#end of sib2, iclass 26, count 2 2006.232.07:57:01.12#ibcon#*after write, iclass 26, count 2 2006.232.07:57:01.12#ibcon#*before return 0, iclass 26, count 2 2006.232.07:57:01.12#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:57:01.12#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.232.07:57:01.12#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.232.07:57:01.12#ibcon#ireg 7 cls_cnt 0 2006.232.07:57:01.12#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:57:01.24#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:57:01.24#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:57:01.24#ibcon#enter wrdev, iclass 26, count 0 2006.232.07:57:01.24#ibcon#first serial, iclass 26, count 0 2006.232.07:57:01.24#ibcon#enter sib2, iclass 26, count 0 2006.232.07:57:01.24#ibcon#flushed, iclass 26, count 0 2006.232.07:57:01.24#ibcon#about to write, iclass 26, count 0 2006.232.07:57:01.24#ibcon#wrote, iclass 26, count 0 2006.232.07:57:01.24#ibcon#about to read 3, iclass 26, count 0 2006.232.07:57:01.26#ibcon#read 3, iclass 26, count 0 2006.232.07:57:01.26#ibcon#about to read 4, iclass 26, count 0 2006.232.07:57:01.26#ibcon#read 4, iclass 26, count 0 2006.232.07:57:01.26#ibcon#about to read 5, iclass 26, count 0 2006.232.07:57:01.26#ibcon#read 5, iclass 26, count 0 2006.232.07:57:01.26#ibcon#about to read 6, iclass 26, count 0 2006.232.07:57:01.26#ibcon#read 6, iclass 26, count 0 2006.232.07:57:01.26#ibcon#end of sib2, iclass 26, count 0 2006.232.07:57:01.26#ibcon#*mode == 0, iclass 26, count 0 2006.232.07:57:01.26#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.232.07:57:01.26#ibcon#[27=USB\r\n] 2006.232.07:57:01.26#ibcon#*before write, iclass 26, count 0 2006.232.07:57:01.26#ibcon#enter sib2, iclass 26, count 0 2006.232.07:57:01.26#ibcon#flushed, iclass 26, count 0 2006.232.07:57:01.26#ibcon#about to write, iclass 26, count 0 2006.232.07:57:01.26#ibcon#wrote, iclass 26, count 0 2006.232.07:57:01.26#ibcon#about to read 3, iclass 26, count 0 2006.232.07:57:01.29#ibcon#read 3, iclass 26, count 0 2006.232.07:57:01.29#ibcon#about to read 4, iclass 26, count 0 2006.232.07:57:01.29#ibcon#read 4, iclass 26, count 0 2006.232.07:57:01.29#ibcon#about to read 5, iclass 26, count 0 2006.232.07:57:01.29#ibcon#read 5, iclass 26, count 0 2006.232.07:57:01.29#ibcon#about to read 6, iclass 26, count 0 2006.232.07:57:01.29#ibcon#read 6, iclass 26, count 0 2006.232.07:57:01.29#ibcon#end of sib2, iclass 26, count 0 2006.232.07:57:01.29#ibcon#*after write, iclass 26, count 0 2006.232.07:57:01.29#ibcon#*before return 0, iclass 26, count 0 2006.232.07:57:01.29#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:57:01.29#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.232.07:57:01.29#ibcon#about to clear, iclass 26 cls_cnt 0 2006.232.07:57:01.29#ibcon#cleared, iclass 26 cls_cnt 0 2006.232.07:57:01.29$vc4f8/vblo=3,656.99 2006.232.07:57:01.29#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.232.07:57:01.29#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.232.07:57:01.29#ibcon#ireg 17 cls_cnt 0 2006.232.07:57:01.29#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:57:01.29#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:57:01.29#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:57:01.29#ibcon#enter wrdev, iclass 28, count 0 2006.232.07:57:01.29#ibcon#first serial, iclass 28, count 0 2006.232.07:57:01.29#ibcon#enter sib2, iclass 28, count 0 2006.232.07:57:01.29#ibcon#flushed, iclass 28, count 0 2006.232.07:57:01.29#ibcon#about to write, iclass 28, count 0 2006.232.07:57:01.29#ibcon#wrote, iclass 28, count 0 2006.232.07:57:01.29#ibcon#about to read 3, iclass 28, count 0 2006.232.07:57:01.31#ibcon#read 3, iclass 28, count 0 2006.232.07:57:01.31#ibcon#about to read 4, iclass 28, count 0 2006.232.07:57:01.31#ibcon#read 4, iclass 28, count 0 2006.232.07:57:01.31#ibcon#about to read 5, iclass 28, count 0 2006.232.07:57:01.31#ibcon#read 5, iclass 28, count 0 2006.232.07:57:01.31#ibcon#about to read 6, iclass 28, count 0 2006.232.07:57:01.31#ibcon#read 6, iclass 28, count 0 2006.232.07:57:01.31#ibcon#end of sib2, iclass 28, count 0 2006.232.07:57:01.31#ibcon#*mode == 0, iclass 28, count 0 2006.232.07:57:01.31#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.232.07:57:01.31#ibcon#[28=FRQ=03,656.99\r\n] 2006.232.07:57:01.31#ibcon#*before write, iclass 28, count 0 2006.232.07:57:01.31#ibcon#enter sib2, iclass 28, count 0 2006.232.07:57:01.31#ibcon#flushed, iclass 28, count 0 2006.232.07:57:01.31#ibcon#about to write, iclass 28, count 0 2006.232.07:57:01.31#ibcon#wrote, iclass 28, count 0 2006.232.07:57:01.31#ibcon#about to read 3, iclass 28, count 0 2006.232.07:57:01.35#ibcon#read 3, iclass 28, count 0 2006.232.07:57:01.35#ibcon#about to read 4, iclass 28, count 0 2006.232.07:57:01.35#ibcon#read 4, iclass 28, count 0 2006.232.07:57:01.35#ibcon#about to read 5, iclass 28, count 0 2006.232.07:57:01.35#ibcon#read 5, iclass 28, count 0 2006.232.07:57:01.35#ibcon#about to read 6, iclass 28, count 0 2006.232.07:57:01.35#ibcon#read 6, iclass 28, count 0 2006.232.07:57:01.35#ibcon#end of sib2, iclass 28, count 0 2006.232.07:57:01.35#ibcon#*after write, iclass 28, count 0 2006.232.07:57:01.35#ibcon#*before return 0, iclass 28, count 0 2006.232.07:57:01.35#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:57:01.35#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.232.07:57:01.35#ibcon#about to clear, iclass 28 cls_cnt 0 2006.232.07:57:01.35#ibcon#cleared, iclass 28 cls_cnt 0 2006.232.07:57:01.35$vc4f8/vb=3,4 2006.232.07:57:01.35#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.232.07:57:01.35#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.232.07:57:01.35#ibcon#ireg 11 cls_cnt 2 2006.232.07:57:01.35#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:57:01.41#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:57:01.41#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:57:01.41#ibcon#enter wrdev, iclass 30, count 2 2006.232.07:57:01.41#ibcon#first serial, iclass 30, count 2 2006.232.07:57:01.41#ibcon#enter sib2, iclass 30, count 2 2006.232.07:57:01.41#ibcon#flushed, iclass 30, count 2 2006.232.07:57:01.41#ibcon#about to write, iclass 30, count 2 2006.232.07:57:01.41#ibcon#wrote, iclass 30, count 2 2006.232.07:57:01.41#ibcon#about to read 3, iclass 30, count 2 2006.232.07:57:01.43#ibcon#read 3, iclass 30, count 2 2006.232.07:57:01.43#ibcon#about to read 4, iclass 30, count 2 2006.232.07:57:01.43#ibcon#read 4, iclass 30, count 2 2006.232.07:57:01.43#ibcon#about to read 5, iclass 30, count 2 2006.232.07:57:01.43#ibcon#read 5, iclass 30, count 2 2006.232.07:57:01.43#ibcon#about to read 6, iclass 30, count 2 2006.232.07:57:01.43#ibcon#read 6, iclass 30, count 2 2006.232.07:57:01.43#ibcon#end of sib2, iclass 30, count 2 2006.232.07:57:01.43#ibcon#*mode == 0, iclass 30, count 2 2006.232.07:57:01.43#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.232.07:57:01.43#ibcon#[27=AT03-04\r\n] 2006.232.07:57:01.43#ibcon#*before write, iclass 30, count 2 2006.232.07:57:01.43#ibcon#enter sib2, iclass 30, count 2 2006.232.07:57:01.43#ibcon#flushed, iclass 30, count 2 2006.232.07:57:01.43#ibcon#about to write, iclass 30, count 2 2006.232.07:57:01.43#ibcon#wrote, iclass 30, count 2 2006.232.07:57:01.43#ibcon#about to read 3, iclass 30, count 2 2006.232.07:57:01.46#ibcon#read 3, iclass 30, count 2 2006.232.07:57:01.46#ibcon#about to read 4, iclass 30, count 2 2006.232.07:57:01.46#ibcon#read 4, iclass 30, count 2 2006.232.07:57:01.46#ibcon#about to read 5, iclass 30, count 2 2006.232.07:57:01.46#ibcon#read 5, iclass 30, count 2 2006.232.07:57:01.46#ibcon#about to read 6, iclass 30, count 2 2006.232.07:57:01.46#ibcon#read 6, iclass 30, count 2 2006.232.07:57:01.46#ibcon#end of sib2, iclass 30, count 2 2006.232.07:57:01.46#ibcon#*after write, iclass 30, count 2 2006.232.07:57:01.46#ibcon#*before return 0, iclass 30, count 2 2006.232.07:57:01.46#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:57:01.46#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.232.07:57:01.46#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.232.07:57:01.46#ibcon#ireg 7 cls_cnt 0 2006.232.07:57:01.46#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:57:01.58#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:57:01.58#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:57:01.58#ibcon#enter wrdev, iclass 30, count 0 2006.232.07:57:01.58#ibcon#first serial, iclass 30, count 0 2006.232.07:57:01.58#ibcon#enter sib2, iclass 30, count 0 2006.232.07:57:01.58#ibcon#flushed, iclass 30, count 0 2006.232.07:57:01.58#ibcon#about to write, iclass 30, count 0 2006.232.07:57:01.58#ibcon#wrote, iclass 30, count 0 2006.232.07:57:01.58#ibcon#about to read 3, iclass 30, count 0 2006.232.07:57:01.60#ibcon#read 3, iclass 30, count 0 2006.232.07:57:01.60#ibcon#about to read 4, iclass 30, count 0 2006.232.07:57:01.60#ibcon#read 4, iclass 30, count 0 2006.232.07:57:01.60#ibcon#about to read 5, iclass 30, count 0 2006.232.07:57:01.60#ibcon#read 5, iclass 30, count 0 2006.232.07:57:01.60#ibcon#about to read 6, iclass 30, count 0 2006.232.07:57:01.60#ibcon#read 6, iclass 30, count 0 2006.232.07:57:01.60#ibcon#end of sib2, iclass 30, count 0 2006.232.07:57:01.60#ibcon#*mode == 0, iclass 30, count 0 2006.232.07:57:01.60#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.232.07:57:01.60#ibcon#[27=USB\r\n] 2006.232.07:57:01.60#ibcon#*before write, iclass 30, count 0 2006.232.07:57:01.60#ibcon#enter sib2, iclass 30, count 0 2006.232.07:57:01.60#ibcon#flushed, iclass 30, count 0 2006.232.07:57:01.60#ibcon#about to write, iclass 30, count 0 2006.232.07:57:01.60#ibcon#wrote, iclass 30, count 0 2006.232.07:57:01.60#ibcon#about to read 3, iclass 30, count 0 2006.232.07:57:01.63#ibcon#read 3, iclass 30, count 0 2006.232.07:57:01.63#ibcon#about to read 4, iclass 30, count 0 2006.232.07:57:01.63#ibcon#read 4, iclass 30, count 0 2006.232.07:57:01.63#ibcon#about to read 5, iclass 30, count 0 2006.232.07:57:01.63#ibcon#read 5, iclass 30, count 0 2006.232.07:57:01.63#ibcon#about to read 6, iclass 30, count 0 2006.232.07:57:01.63#ibcon#read 6, iclass 30, count 0 2006.232.07:57:01.63#ibcon#end of sib2, iclass 30, count 0 2006.232.07:57:01.63#ibcon#*after write, iclass 30, count 0 2006.232.07:57:01.63#ibcon#*before return 0, iclass 30, count 0 2006.232.07:57:01.63#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:57:01.63#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.232.07:57:01.63#ibcon#about to clear, iclass 30 cls_cnt 0 2006.232.07:57:01.63#ibcon#cleared, iclass 30 cls_cnt 0 2006.232.07:57:01.63$vc4f8/vblo=4,712.99 2006.232.07:57:01.63#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.232.07:57:01.63#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.232.07:57:01.63#ibcon#ireg 17 cls_cnt 0 2006.232.07:57:01.63#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:57:01.63#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:57:01.63#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:57:01.63#ibcon#enter wrdev, iclass 32, count 0 2006.232.07:57:01.63#ibcon#first serial, iclass 32, count 0 2006.232.07:57:01.63#ibcon#enter sib2, iclass 32, count 0 2006.232.07:57:01.63#ibcon#flushed, iclass 32, count 0 2006.232.07:57:01.63#ibcon#about to write, iclass 32, count 0 2006.232.07:57:01.63#ibcon#wrote, iclass 32, count 0 2006.232.07:57:01.63#ibcon#about to read 3, iclass 32, count 0 2006.232.07:57:01.65#ibcon#read 3, iclass 32, count 0 2006.232.07:57:01.65#ibcon#about to read 4, iclass 32, count 0 2006.232.07:57:01.65#ibcon#read 4, iclass 32, count 0 2006.232.07:57:01.65#ibcon#about to read 5, iclass 32, count 0 2006.232.07:57:01.65#ibcon#read 5, iclass 32, count 0 2006.232.07:57:01.65#ibcon#about to read 6, iclass 32, count 0 2006.232.07:57:01.65#ibcon#read 6, iclass 32, count 0 2006.232.07:57:01.65#ibcon#end of sib2, iclass 32, count 0 2006.232.07:57:01.65#ibcon#*mode == 0, iclass 32, count 0 2006.232.07:57:01.65#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.232.07:57:01.65#ibcon#[28=FRQ=04,712.99\r\n] 2006.232.07:57:01.65#ibcon#*before write, iclass 32, count 0 2006.232.07:57:01.65#ibcon#enter sib2, iclass 32, count 0 2006.232.07:57:01.65#ibcon#flushed, iclass 32, count 0 2006.232.07:57:01.65#ibcon#about to write, iclass 32, count 0 2006.232.07:57:01.65#ibcon#wrote, iclass 32, count 0 2006.232.07:57:01.65#ibcon#about to read 3, iclass 32, count 0 2006.232.07:57:01.69#ibcon#read 3, iclass 32, count 0 2006.232.07:57:01.69#ibcon#about to read 4, iclass 32, count 0 2006.232.07:57:01.69#ibcon#read 4, iclass 32, count 0 2006.232.07:57:01.69#ibcon#about to read 5, iclass 32, count 0 2006.232.07:57:01.69#ibcon#read 5, iclass 32, count 0 2006.232.07:57:01.69#ibcon#about to read 6, iclass 32, count 0 2006.232.07:57:01.69#ibcon#read 6, iclass 32, count 0 2006.232.07:57:01.69#ibcon#end of sib2, iclass 32, count 0 2006.232.07:57:01.69#ibcon#*after write, iclass 32, count 0 2006.232.07:57:01.69#ibcon#*before return 0, iclass 32, count 0 2006.232.07:57:01.69#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:57:01.69#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.232.07:57:01.69#ibcon#about to clear, iclass 32 cls_cnt 0 2006.232.07:57:01.69#ibcon#cleared, iclass 32 cls_cnt 0 2006.232.07:57:01.69$vc4f8/vb=4,4 2006.232.07:57:01.69#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.232.07:57:01.69#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.232.07:57:01.69#ibcon#ireg 11 cls_cnt 2 2006.232.07:57:01.69#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:57:01.76#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:57:01.76#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:57:01.76#ibcon#enter wrdev, iclass 34, count 2 2006.232.07:57:01.76#ibcon#first serial, iclass 34, count 2 2006.232.07:57:01.76#ibcon#enter sib2, iclass 34, count 2 2006.232.07:57:01.76#ibcon#flushed, iclass 34, count 2 2006.232.07:57:01.76#ibcon#about to write, iclass 34, count 2 2006.232.07:57:01.76#ibcon#wrote, iclass 34, count 2 2006.232.07:57:01.76#ibcon#about to read 3, iclass 34, count 2 2006.232.07:57:01.77#ibcon#read 3, iclass 34, count 2 2006.232.07:57:01.77#ibcon#about to read 4, iclass 34, count 2 2006.232.07:57:01.77#ibcon#read 4, iclass 34, count 2 2006.232.07:57:01.77#ibcon#about to read 5, iclass 34, count 2 2006.232.07:57:01.77#ibcon#read 5, iclass 34, count 2 2006.232.07:57:01.77#ibcon#about to read 6, iclass 34, count 2 2006.232.07:57:01.77#ibcon#read 6, iclass 34, count 2 2006.232.07:57:01.77#ibcon#end of sib2, iclass 34, count 2 2006.232.07:57:01.77#ibcon#*mode == 0, iclass 34, count 2 2006.232.07:57:01.77#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.232.07:57:01.77#ibcon#[27=AT04-04\r\n] 2006.232.07:57:01.77#ibcon#*before write, iclass 34, count 2 2006.232.07:57:01.77#ibcon#enter sib2, iclass 34, count 2 2006.232.07:57:01.77#ibcon#flushed, iclass 34, count 2 2006.232.07:57:01.77#ibcon#about to write, iclass 34, count 2 2006.232.07:57:01.77#ibcon#wrote, iclass 34, count 2 2006.232.07:57:01.77#ibcon#about to read 3, iclass 34, count 2 2006.232.07:57:01.80#ibcon#read 3, iclass 34, count 2 2006.232.07:57:01.80#ibcon#about to read 4, iclass 34, count 2 2006.232.07:57:01.80#ibcon#read 4, iclass 34, count 2 2006.232.07:57:01.80#ibcon#about to read 5, iclass 34, count 2 2006.232.07:57:01.80#ibcon#read 5, iclass 34, count 2 2006.232.07:57:01.80#ibcon#about to read 6, iclass 34, count 2 2006.232.07:57:01.80#ibcon#read 6, iclass 34, count 2 2006.232.07:57:01.80#ibcon#end of sib2, iclass 34, count 2 2006.232.07:57:01.80#ibcon#*after write, iclass 34, count 2 2006.232.07:57:01.80#ibcon#*before return 0, iclass 34, count 2 2006.232.07:57:01.80#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:57:01.80#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.232.07:57:01.80#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.232.07:57:01.80#ibcon#ireg 7 cls_cnt 0 2006.232.07:57:01.80#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:57:01.92#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:57:01.92#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:57:01.92#ibcon#enter wrdev, iclass 34, count 0 2006.232.07:57:01.92#ibcon#first serial, iclass 34, count 0 2006.232.07:57:01.92#ibcon#enter sib2, iclass 34, count 0 2006.232.07:57:01.92#ibcon#flushed, iclass 34, count 0 2006.232.07:57:01.92#ibcon#about to write, iclass 34, count 0 2006.232.07:57:01.92#ibcon#wrote, iclass 34, count 0 2006.232.07:57:01.92#ibcon#about to read 3, iclass 34, count 0 2006.232.07:57:01.94#ibcon#read 3, iclass 34, count 0 2006.232.07:57:01.94#ibcon#about to read 4, iclass 34, count 0 2006.232.07:57:01.94#ibcon#read 4, iclass 34, count 0 2006.232.07:57:01.94#ibcon#about to read 5, iclass 34, count 0 2006.232.07:57:01.94#ibcon#read 5, iclass 34, count 0 2006.232.07:57:01.94#ibcon#about to read 6, iclass 34, count 0 2006.232.07:57:01.94#ibcon#read 6, iclass 34, count 0 2006.232.07:57:01.94#ibcon#end of sib2, iclass 34, count 0 2006.232.07:57:01.94#ibcon#*mode == 0, iclass 34, count 0 2006.232.07:57:01.94#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.232.07:57:01.94#ibcon#[27=USB\r\n] 2006.232.07:57:01.94#ibcon#*before write, iclass 34, count 0 2006.232.07:57:01.94#ibcon#enter sib2, iclass 34, count 0 2006.232.07:57:01.94#ibcon#flushed, iclass 34, count 0 2006.232.07:57:01.94#ibcon#about to write, iclass 34, count 0 2006.232.07:57:01.94#ibcon#wrote, iclass 34, count 0 2006.232.07:57:01.94#ibcon#about to read 3, iclass 34, count 0 2006.232.07:57:01.97#ibcon#read 3, iclass 34, count 0 2006.232.07:57:01.97#ibcon#about to read 4, iclass 34, count 0 2006.232.07:57:01.97#ibcon#read 4, iclass 34, count 0 2006.232.07:57:01.97#ibcon#about to read 5, iclass 34, count 0 2006.232.07:57:01.97#ibcon#read 5, iclass 34, count 0 2006.232.07:57:01.97#ibcon#about to read 6, iclass 34, count 0 2006.232.07:57:01.97#ibcon#read 6, iclass 34, count 0 2006.232.07:57:01.97#ibcon#end of sib2, iclass 34, count 0 2006.232.07:57:01.97#ibcon#*after write, iclass 34, count 0 2006.232.07:57:01.97#ibcon#*before return 0, iclass 34, count 0 2006.232.07:57:01.97#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:57:01.97#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.232.07:57:01.97#ibcon#about to clear, iclass 34 cls_cnt 0 2006.232.07:57:01.97#ibcon#cleared, iclass 34 cls_cnt 0 2006.232.07:57:01.97$vc4f8/vblo=5,744.99 2006.232.07:57:01.97#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.232.07:57:01.97#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.232.07:57:01.97#ibcon#ireg 17 cls_cnt 0 2006.232.07:57:01.97#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:57:01.97#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:57:01.97#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:57:01.97#ibcon#enter wrdev, iclass 36, count 0 2006.232.07:57:01.97#ibcon#first serial, iclass 36, count 0 2006.232.07:57:01.97#ibcon#enter sib2, iclass 36, count 0 2006.232.07:57:01.97#ibcon#flushed, iclass 36, count 0 2006.232.07:57:01.97#ibcon#about to write, iclass 36, count 0 2006.232.07:57:01.97#ibcon#wrote, iclass 36, count 0 2006.232.07:57:01.97#ibcon#about to read 3, iclass 36, count 0 2006.232.07:57:02.00#ibcon#read 3, iclass 36, count 0 2006.232.07:57:02.00#ibcon#about to read 4, iclass 36, count 0 2006.232.07:57:02.00#ibcon#read 4, iclass 36, count 0 2006.232.07:57:02.00#ibcon#about to read 5, iclass 36, count 0 2006.232.07:57:02.00#ibcon#read 5, iclass 36, count 0 2006.232.07:57:02.00#ibcon#about to read 6, iclass 36, count 0 2006.232.07:57:02.00#ibcon#read 6, iclass 36, count 0 2006.232.07:57:02.00#ibcon#end of sib2, iclass 36, count 0 2006.232.07:57:02.00#ibcon#*mode == 0, iclass 36, count 0 2006.232.07:57:02.00#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.232.07:57:02.00#ibcon#[28=FRQ=05,744.99\r\n] 2006.232.07:57:02.00#ibcon#*before write, iclass 36, count 0 2006.232.07:57:02.00#ibcon#enter sib2, iclass 36, count 0 2006.232.07:57:02.00#ibcon#flushed, iclass 36, count 0 2006.232.07:57:02.00#ibcon#about to write, iclass 36, count 0 2006.232.07:57:02.00#ibcon#wrote, iclass 36, count 0 2006.232.07:57:02.00#ibcon#about to read 3, iclass 36, count 0 2006.232.07:57:02.04#ibcon#read 3, iclass 36, count 0 2006.232.07:57:02.04#ibcon#about to read 4, iclass 36, count 0 2006.232.07:57:02.04#ibcon#read 4, iclass 36, count 0 2006.232.07:57:02.04#ibcon#about to read 5, iclass 36, count 0 2006.232.07:57:02.04#ibcon#read 5, iclass 36, count 0 2006.232.07:57:02.04#ibcon#about to read 6, iclass 36, count 0 2006.232.07:57:02.04#ibcon#read 6, iclass 36, count 0 2006.232.07:57:02.04#ibcon#end of sib2, iclass 36, count 0 2006.232.07:57:02.04#ibcon#*after write, iclass 36, count 0 2006.232.07:57:02.04#ibcon#*before return 0, iclass 36, count 0 2006.232.07:57:02.04#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:57:02.04#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.232.07:57:02.04#ibcon#about to clear, iclass 36 cls_cnt 0 2006.232.07:57:02.04#ibcon#cleared, iclass 36 cls_cnt 0 2006.232.07:57:02.04$vc4f8/vb=5,3 2006.232.07:57:02.04#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.232.07:57:02.04#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.232.07:57:02.04#ibcon#ireg 11 cls_cnt 2 2006.232.07:57:02.04#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.232.07:57:02.09#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.232.07:57:02.09#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.232.07:57:02.09#ibcon#enter wrdev, iclass 38, count 2 2006.232.07:57:02.09#ibcon#first serial, iclass 38, count 2 2006.232.07:57:02.09#ibcon#enter sib2, iclass 38, count 2 2006.232.07:57:02.09#ibcon#flushed, iclass 38, count 2 2006.232.07:57:02.09#ibcon#about to write, iclass 38, count 2 2006.232.07:57:02.09#ibcon#wrote, iclass 38, count 2 2006.232.07:57:02.09#ibcon#about to read 3, iclass 38, count 2 2006.232.07:57:02.11#ibcon#read 3, iclass 38, count 2 2006.232.07:57:02.11#ibcon#about to read 4, iclass 38, count 2 2006.232.07:57:02.11#ibcon#read 4, iclass 38, count 2 2006.232.07:57:02.11#ibcon#about to read 5, iclass 38, count 2 2006.232.07:57:02.11#ibcon#read 5, iclass 38, count 2 2006.232.07:57:02.11#ibcon#about to read 6, iclass 38, count 2 2006.232.07:57:02.11#ibcon#read 6, iclass 38, count 2 2006.232.07:57:02.11#ibcon#end of sib2, iclass 38, count 2 2006.232.07:57:02.11#ibcon#*mode == 0, iclass 38, count 2 2006.232.07:57:02.11#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.232.07:57:02.11#ibcon#[27=AT05-03\r\n] 2006.232.07:57:02.11#ibcon#*before write, iclass 38, count 2 2006.232.07:57:02.11#ibcon#enter sib2, iclass 38, count 2 2006.232.07:57:02.11#ibcon#flushed, iclass 38, count 2 2006.232.07:57:02.11#ibcon#about to write, iclass 38, count 2 2006.232.07:57:02.11#ibcon#wrote, iclass 38, count 2 2006.232.07:57:02.11#ibcon#about to read 3, iclass 38, count 2 2006.232.07:57:02.14#ibcon#read 3, iclass 38, count 2 2006.232.07:57:02.14#ibcon#about to read 4, iclass 38, count 2 2006.232.07:57:02.14#ibcon#read 4, iclass 38, count 2 2006.232.07:57:02.14#ibcon#about to read 5, iclass 38, count 2 2006.232.07:57:02.14#ibcon#read 5, iclass 38, count 2 2006.232.07:57:02.14#ibcon#about to read 6, iclass 38, count 2 2006.232.07:57:02.14#ibcon#read 6, iclass 38, count 2 2006.232.07:57:02.14#ibcon#end of sib2, iclass 38, count 2 2006.232.07:57:02.14#ibcon#*after write, iclass 38, count 2 2006.232.07:57:02.14#ibcon#*before return 0, iclass 38, count 2 2006.232.07:57:02.14#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.232.07:57:02.14#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.232.07:57:02.14#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.232.07:57:02.14#ibcon#ireg 7 cls_cnt 0 2006.232.07:57:02.14#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.232.07:57:02.26#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.232.07:57:02.26#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.232.07:57:02.26#ibcon#enter wrdev, iclass 38, count 0 2006.232.07:57:02.26#ibcon#first serial, iclass 38, count 0 2006.232.07:57:02.26#ibcon#enter sib2, iclass 38, count 0 2006.232.07:57:02.26#ibcon#flushed, iclass 38, count 0 2006.232.07:57:02.26#ibcon#about to write, iclass 38, count 0 2006.232.07:57:02.26#ibcon#wrote, iclass 38, count 0 2006.232.07:57:02.26#ibcon#about to read 3, iclass 38, count 0 2006.232.07:57:02.28#ibcon#read 3, iclass 38, count 0 2006.232.07:57:02.28#ibcon#about to read 4, iclass 38, count 0 2006.232.07:57:02.28#ibcon#read 4, iclass 38, count 0 2006.232.07:57:02.28#ibcon#about to read 5, iclass 38, count 0 2006.232.07:57:02.28#ibcon#read 5, iclass 38, count 0 2006.232.07:57:02.28#ibcon#about to read 6, iclass 38, count 0 2006.232.07:57:02.28#ibcon#read 6, iclass 38, count 0 2006.232.07:57:02.28#ibcon#end of sib2, iclass 38, count 0 2006.232.07:57:02.28#ibcon#*mode == 0, iclass 38, count 0 2006.232.07:57:02.28#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.232.07:57:02.28#ibcon#[27=USB\r\n] 2006.232.07:57:02.28#ibcon#*before write, iclass 38, count 0 2006.232.07:57:02.28#ibcon#enter sib2, iclass 38, count 0 2006.232.07:57:02.28#ibcon#flushed, iclass 38, count 0 2006.232.07:57:02.28#ibcon#about to write, iclass 38, count 0 2006.232.07:57:02.28#ibcon#wrote, iclass 38, count 0 2006.232.07:57:02.28#ibcon#about to read 3, iclass 38, count 0 2006.232.07:57:02.31#ibcon#read 3, iclass 38, count 0 2006.232.07:57:02.31#ibcon#about to read 4, iclass 38, count 0 2006.232.07:57:02.31#ibcon#read 4, iclass 38, count 0 2006.232.07:57:02.31#ibcon#about to read 5, iclass 38, count 0 2006.232.07:57:02.31#ibcon#read 5, iclass 38, count 0 2006.232.07:57:02.31#ibcon#about to read 6, iclass 38, count 0 2006.232.07:57:02.31#ibcon#read 6, iclass 38, count 0 2006.232.07:57:02.31#ibcon#end of sib2, iclass 38, count 0 2006.232.07:57:02.31#ibcon#*after write, iclass 38, count 0 2006.232.07:57:02.31#ibcon#*before return 0, iclass 38, count 0 2006.232.07:57:02.31#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.232.07:57:02.31#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.232.07:57:02.31#ibcon#about to clear, iclass 38 cls_cnt 0 2006.232.07:57:02.31#ibcon#cleared, iclass 38 cls_cnt 0 2006.232.07:57:02.31$vc4f8/vblo=6,752.99 2006.232.07:57:02.31#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.232.07:57:02.31#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.232.07:57:02.31#ibcon#ireg 17 cls_cnt 0 2006.232.07:57:02.31#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:57:02.31#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:57:02.31#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:57:02.31#ibcon#enter wrdev, iclass 40, count 0 2006.232.07:57:02.31#ibcon#first serial, iclass 40, count 0 2006.232.07:57:02.31#ibcon#enter sib2, iclass 40, count 0 2006.232.07:57:02.31#ibcon#flushed, iclass 40, count 0 2006.232.07:57:02.31#ibcon#about to write, iclass 40, count 0 2006.232.07:57:02.31#ibcon#wrote, iclass 40, count 0 2006.232.07:57:02.31#ibcon#about to read 3, iclass 40, count 0 2006.232.07:57:02.33#ibcon#read 3, iclass 40, count 0 2006.232.07:57:02.33#ibcon#about to read 4, iclass 40, count 0 2006.232.07:57:02.33#ibcon#read 4, iclass 40, count 0 2006.232.07:57:02.33#ibcon#about to read 5, iclass 40, count 0 2006.232.07:57:02.33#ibcon#read 5, iclass 40, count 0 2006.232.07:57:02.33#ibcon#about to read 6, iclass 40, count 0 2006.232.07:57:02.33#ibcon#read 6, iclass 40, count 0 2006.232.07:57:02.33#ibcon#end of sib2, iclass 40, count 0 2006.232.07:57:02.33#ibcon#*mode == 0, iclass 40, count 0 2006.232.07:57:02.33#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.232.07:57:02.33#ibcon#[28=FRQ=06,752.99\r\n] 2006.232.07:57:02.33#ibcon#*before write, iclass 40, count 0 2006.232.07:57:02.33#ibcon#enter sib2, iclass 40, count 0 2006.232.07:57:02.33#ibcon#flushed, iclass 40, count 0 2006.232.07:57:02.33#ibcon#about to write, iclass 40, count 0 2006.232.07:57:02.33#ibcon#wrote, iclass 40, count 0 2006.232.07:57:02.33#ibcon#about to read 3, iclass 40, count 0 2006.232.07:57:02.37#ibcon#read 3, iclass 40, count 0 2006.232.07:57:02.37#ibcon#about to read 4, iclass 40, count 0 2006.232.07:57:02.37#ibcon#read 4, iclass 40, count 0 2006.232.07:57:02.37#ibcon#about to read 5, iclass 40, count 0 2006.232.07:57:02.37#ibcon#read 5, iclass 40, count 0 2006.232.07:57:02.37#ibcon#about to read 6, iclass 40, count 0 2006.232.07:57:02.37#ibcon#read 6, iclass 40, count 0 2006.232.07:57:02.37#ibcon#end of sib2, iclass 40, count 0 2006.232.07:57:02.37#ibcon#*after write, iclass 40, count 0 2006.232.07:57:02.37#ibcon#*before return 0, iclass 40, count 0 2006.232.07:57:02.37#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:57:02.37#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.232.07:57:02.37#ibcon#about to clear, iclass 40 cls_cnt 0 2006.232.07:57:02.37#ibcon#cleared, iclass 40 cls_cnt 0 2006.232.07:57:02.37$vc4f8/vb=6,4 2006.232.07:57:02.37#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.232.07:57:02.37#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.232.07:57:02.37#ibcon#ireg 11 cls_cnt 2 2006.232.07:57:02.37#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:57:02.43#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:57:02.43#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:57:02.43#ibcon#enter wrdev, iclass 4, count 2 2006.232.07:57:02.43#ibcon#first serial, iclass 4, count 2 2006.232.07:57:02.43#ibcon#enter sib2, iclass 4, count 2 2006.232.07:57:02.43#ibcon#flushed, iclass 4, count 2 2006.232.07:57:02.43#ibcon#about to write, iclass 4, count 2 2006.232.07:57:02.43#ibcon#wrote, iclass 4, count 2 2006.232.07:57:02.43#ibcon#about to read 3, iclass 4, count 2 2006.232.07:57:02.45#ibcon#read 3, iclass 4, count 2 2006.232.07:57:02.45#ibcon#about to read 4, iclass 4, count 2 2006.232.07:57:02.45#ibcon#read 4, iclass 4, count 2 2006.232.07:57:02.45#ibcon#about to read 5, iclass 4, count 2 2006.232.07:57:02.45#ibcon#read 5, iclass 4, count 2 2006.232.07:57:02.45#ibcon#about to read 6, iclass 4, count 2 2006.232.07:57:02.45#ibcon#read 6, iclass 4, count 2 2006.232.07:57:02.45#ibcon#end of sib2, iclass 4, count 2 2006.232.07:57:02.45#ibcon#*mode == 0, iclass 4, count 2 2006.232.07:57:02.45#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.232.07:57:02.45#ibcon#[27=AT06-04\r\n] 2006.232.07:57:02.45#ibcon#*before write, iclass 4, count 2 2006.232.07:57:02.45#ibcon#enter sib2, iclass 4, count 2 2006.232.07:57:02.45#ibcon#flushed, iclass 4, count 2 2006.232.07:57:02.45#ibcon#about to write, iclass 4, count 2 2006.232.07:57:02.45#ibcon#wrote, iclass 4, count 2 2006.232.07:57:02.45#ibcon#about to read 3, iclass 4, count 2 2006.232.07:57:02.48#ibcon#read 3, iclass 4, count 2 2006.232.07:57:02.48#ibcon#about to read 4, iclass 4, count 2 2006.232.07:57:02.48#ibcon#read 4, iclass 4, count 2 2006.232.07:57:02.48#ibcon#about to read 5, iclass 4, count 2 2006.232.07:57:02.48#ibcon#read 5, iclass 4, count 2 2006.232.07:57:02.48#ibcon#about to read 6, iclass 4, count 2 2006.232.07:57:02.48#ibcon#read 6, iclass 4, count 2 2006.232.07:57:02.48#ibcon#end of sib2, iclass 4, count 2 2006.232.07:57:02.48#ibcon#*after write, iclass 4, count 2 2006.232.07:57:02.48#ibcon#*before return 0, iclass 4, count 2 2006.232.07:57:02.48#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:57:02.48#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.232.07:57:02.48#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.232.07:57:02.48#ibcon#ireg 7 cls_cnt 0 2006.232.07:57:02.48#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:57:02.60#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:57:02.60#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:57:02.60#ibcon#enter wrdev, iclass 4, count 0 2006.232.07:57:02.60#ibcon#first serial, iclass 4, count 0 2006.232.07:57:02.60#ibcon#enter sib2, iclass 4, count 0 2006.232.07:57:02.60#ibcon#flushed, iclass 4, count 0 2006.232.07:57:02.60#ibcon#about to write, iclass 4, count 0 2006.232.07:57:02.60#ibcon#wrote, iclass 4, count 0 2006.232.07:57:02.60#ibcon#about to read 3, iclass 4, count 0 2006.232.07:57:02.62#ibcon#read 3, iclass 4, count 0 2006.232.07:57:02.62#ibcon#about to read 4, iclass 4, count 0 2006.232.07:57:02.62#ibcon#read 4, iclass 4, count 0 2006.232.07:57:02.62#ibcon#about to read 5, iclass 4, count 0 2006.232.07:57:02.62#ibcon#read 5, iclass 4, count 0 2006.232.07:57:02.62#ibcon#about to read 6, iclass 4, count 0 2006.232.07:57:02.62#ibcon#read 6, iclass 4, count 0 2006.232.07:57:02.62#ibcon#end of sib2, iclass 4, count 0 2006.232.07:57:02.62#ibcon#*mode == 0, iclass 4, count 0 2006.232.07:57:02.62#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.232.07:57:02.62#ibcon#[27=USB\r\n] 2006.232.07:57:02.62#ibcon#*before write, iclass 4, count 0 2006.232.07:57:02.62#ibcon#enter sib2, iclass 4, count 0 2006.232.07:57:02.62#ibcon#flushed, iclass 4, count 0 2006.232.07:57:02.62#ibcon#about to write, iclass 4, count 0 2006.232.07:57:02.62#ibcon#wrote, iclass 4, count 0 2006.232.07:57:02.62#ibcon#about to read 3, iclass 4, count 0 2006.232.07:57:02.65#ibcon#read 3, iclass 4, count 0 2006.232.07:57:02.65#ibcon#about to read 4, iclass 4, count 0 2006.232.07:57:02.65#ibcon#read 4, iclass 4, count 0 2006.232.07:57:02.65#ibcon#about to read 5, iclass 4, count 0 2006.232.07:57:02.65#ibcon#read 5, iclass 4, count 0 2006.232.07:57:02.65#ibcon#about to read 6, iclass 4, count 0 2006.232.07:57:02.65#ibcon#read 6, iclass 4, count 0 2006.232.07:57:02.65#ibcon#end of sib2, iclass 4, count 0 2006.232.07:57:02.65#ibcon#*after write, iclass 4, count 0 2006.232.07:57:02.65#ibcon#*before return 0, iclass 4, count 0 2006.232.07:57:02.65#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:57:02.65#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.232.07:57:02.65#ibcon#about to clear, iclass 4 cls_cnt 0 2006.232.07:57:02.65#ibcon#cleared, iclass 4 cls_cnt 0 2006.232.07:57:02.65$vc4f8/vabw=wide 2006.232.07:57:02.65#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.232.07:57:02.65#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.232.07:57:02.65#ibcon#ireg 8 cls_cnt 0 2006.232.07:57:02.65#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:57:02.65#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:57:02.65#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:57:02.65#ibcon#enter wrdev, iclass 6, count 0 2006.232.07:57:02.65#ibcon#first serial, iclass 6, count 0 2006.232.07:57:02.65#ibcon#enter sib2, iclass 6, count 0 2006.232.07:57:02.65#ibcon#flushed, iclass 6, count 0 2006.232.07:57:02.65#ibcon#about to write, iclass 6, count 0 2006.232.07:57:02.65#ibcon#wrote, iclass 6, count 0 2006.232.07:57:02.65#ibcon#about to read 3, iclass 6, count 0 2006.232.07:57:02.68#ibcon#read 3, iclass 6, count 0 2006.232.07:57:02.68#ibcon#about to read 4, iclass 6, count 0 2006.232.07:57:02.68#ibcon#read 4, iclass 6, count 0 2006.232.07:57:02.68#ibcon#about to read 5, iclass 6, count 0 2006.232.07:57:02.68#ibcon#read 5, iclass 6, count 0 2006.232.07:57:02.68#ibcon#about to read 6, iclass 6, count 0 2006.232.07:57:02.68#ibcon#read 6, iclass 6, count 0 2006.232.07:57:02.68#ibcon#end of sib2, iclass 6, count 0 2006.232.07:57:02.68#ibcon#*mode == 0, iclass 6, count 0 2006.232.07:57:02.68#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.232.07:57:02.68#ibcon#[25=BW32\r\n] 2006.232.07:57:02.68#ibcon#*before write, iclass 6, count 0 2006.232.07:57:02.68#ibcon#enter sib2, iclass 6, count 0 2006.232.07:57:02.68#ibcon#flushed, iclass 6, count 0 2006.232.07:57:02.68#ibcon#about to write, iclass 6, count 0 2006.232.07:57:02.68#ibcon#wrote, iclass 6, count 0 2006.232.07:57:02.68#ibcon#about to read 3, iclass 6, count 0 2006.232.07:57:02.71#ibcon#read 3, iclass 6, count 0 2006.232.07:57:02.71#ibcon#about to read 4, iclass 6, count 0 2006.232.07:57:02.71#ibcon#read 4, iclass 6, count 0 2006.232.07:57:02.71#ibcon#about to read 5, iclass 6, count 0 2006.232.07:57:02.71#ibcon#read 5, iclass 6, count 0 2006.232.07:57:02.71#ibcon#about to read 6, iclass 6, count 0 2006.232.07:57:02.71#ibcon#read 6, iclass 6, count 0 2006.232.07:57:02.71#ibcon#end of sib2, iclass 6, count 0 2006.232.07:57:02.71#ibcon#*after write, iclass 6, count 0 2006.232.07:57:02.71#ibcon#*before return 0, iclass 6, count 0 2006.232.07:57:02.71#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:57:02.71#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.232.07:57:02.71#ibcon#about to clear, iclass 6 cls_cnt 0 2006.232.07:57:02.71#ibcon#cleared, iclass 6 cls_cnt 0 2006.232.07:57:02.71$vc4f8/vbbw=wide 2006.232.07:57:02.71#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.232.07:57:02.71#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.232.07:57:02.71#ibcon#ireg 8 cls_cnt 0 2006.232.07:57:02.71#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.232.07:57:02.76#abcon#<5=/05 3.7 6.7 29.42 861007.2\r\n> 2006.232.07:57:02.77#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.232.07:57:02.77#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.232.07:57:02.77#ibcon#enter wrdev, iclass 10, count 0 2006.232.07:57:02.77#ibcon#first serial, iclass 10, count 0 2006.232.07:57:02.77#ibcon#enter sib2, iclass 10, count 0 2006.232.07:57:02.77#ibcon#flushed, iclass 10, count 0 2006.232.07:57:02.77#ibcon#about to write, iclass 10, count 0 2006.232.07:57:02.77#ibcon#wrote, iclass 10, count 0 2006.232.07:57:02.77#ibcon#about to read 3, iclass 10, count 0 2006.232.07:57:02.78#abcon#{5=INTERFACE CLEAR} 2006.232.07:57:02.79#ibcon#read 3, iclass 10, count 0 2006.232.07:57:02.79#ibcon#about to read 4, iclass 10, count 0 2006.232.07:57:02.79#ibcon#read 4, iclass 10, count 0 2006.232.07:57:02.79#ibcon#about to read 5, iclass 10, count 0 2006.232.07:57:02.79#ibcon#read 5, iclass 10, count 0 2006.232.07:57:02.79#ibcon#about to read 6, iclass 10, count 0 2006.232.07:57:02.79#ibcon#read 6, iclass 10, count 0 2006.232.07:57:02.79#ibcon#end of sib2, iclass 10, count 0 2006.232.07:57:02.79#ibcon#*mode == 0, iclass 10, count 0 2006.232.07:57:02.79#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.232.07:57:02.79#ibcon#[27=BW32\r\n] 2006.232.07:57:02.79#ibcon#*before write, iclass 10, count 0 2006.232.07:57:02.79#ibcon#enter sib2, iclass 10, count 0 2006.232.07:57:02.79#ibcon#flushed, iclass 10, count 0 2006.232.07:57:02.79#ibcon#about to write, iclass 10, count 0 2006.232.07:57:02.79#ibcon#wrote, iclass 10, count 0 2006.232.07:57:02.79#ibcon#about to read 3, iclass 10, count 0 2006.232.07:57:02.82#ibcon#read 3, iclass 10, count 0 2006.232.07:57:02.82#ibcon#about to read 4, iclass 10, count 0 2006.232.07:57:02.82#ibcon#read 4, iclass 10, count 0 2006.232.07:57:02.82#ibcon#about to read 5, iclass 10, count 0 2006.232.07:57:02.82#ibcon#read 5, iclass 10, count 0 2006.232.07:57:02.82#ibcon#about to read 6, iclass 10, count 0 2006.232.07:57:02.82#ibcon#read 6, iclass 10, count 0 2006.232.07:57:02.82#ibcon#end of sib2, iclass 10, count 0 2006.232.07:57:02.82#ibcon#*after write, iclass 10, count 0 2006.232.07:57:02.82#ibcon#*before return 0, iclass 10, count 0 2006.232.07:57:02.82#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.232.07:57:02.82#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.232.07:57:02.82#ibcon#about to clear, iclass 10 cls_cnt 0 2006.232.07:57:02.82#ibcon#cleared, iclass 10 cls_cnt 0 2006.232.07:57:02.82$4f8m12a/ifd4f 2006.232.07:57:02.82$ifd4f/lo= 2006.232.07:57:02.82$ifd4f/lo=lo1,7680.00,usb,rcp,1 2006.232.07:57:02.82$ifd4f/lo=lo2,1600.00,usb,rcp,1 2006.232.07:57:02.82$ifd4f/lo=lo3,8080.00,usb,rcp,1 2006.232.07:57:02.82$ifd4f/patch= 2006.232.07:57:02.82$ifd4f/patch=lo1,a1,a2,a3,a4 2006.232.07:57:02.82$ifd4f/patch=lo2,b1,b2,b3,b4,b5,b6 2006.232.07:57:02.82$ifd4f/patch=lo3,a5,a6,a7,a8 2006.232.07:57:02.82$4f8m12a/"form=m,16.000,1:2 2006.232.07:57:02.82$4f8m12a/"tpicd 2006.232.07:57:02.82$4f8m12a/echo=off 2006.232.07:57:02.82$4f8m12a/xlog=off 2006.232.07:57:02.82:!2006.232.07:59:10 2006.232.07:57:42.13#trakl#Source acquired 2006.232.07:57:42.13#flagr#flagr/antenna,acquired 2006.232.07:59:10.00:preob 2006.232.07:59:10.13/onsource/TRACKING 2006.232.07:59:10.13:!2006.232.07:59:20 2006.232.07:59:20.00:data_valid=on 2006.232.07:59:20.00:midob 2006.232.07:59:21.13/onsource/TRACKING 2006.232.07:59:21.13/wx/29.41,1007.3,86 2006.232.07:59:21.29/cable/+6.3892E-03 2006.232.07:59:22.38/va/01,08,usb,yes,38,39 2006.232.07:59:22.38/va/02,07,usb,yes,38,40 2006.232.07:59:22.38/va/03,08,usb,yes,29,29 2006.232.07:59:22.38/va/04,07,usb,yes,39,42 2006.232.07:59:22.38/va/05,07,usb,yes,44,47 2006.232.07:59:22.38/va/06,06,usb,yes,44,43 2006.232.07:59:22.38/va/07,06,usb,yes,44,44 2006.232.07:59:22.38/va/08,06,usb,yes,47,46 2006.232.07:59:22.61/valo/01,532.99,yes,locked 2006.232.07:59:22.61/valo/02,572.99,yes,locked 2006.232.07:59:22.61/valo/03,672.99,yes,locked 2006.232.07:59:22.61/valo/04,832.99,yes,locked 2006.232.07:59:22.61/valo/05,652.99,yes,locked 2006.232.07:59:22.61/valo/06,772.99,yes,locked 2006.232.07:59:22.61/valo/07,832.99,yes,locked 2006.232.07:59:22.61/valo/08,852.99,yes,locked 2006.232.07:59:23.70/vb/01,04,usb,yes,39,96 2006.232.07:59:23.70/vb/02,04,usb,yes,33,95 2006.232.07:59:23.70/vb/03,04,usb,yes,31,53 2006.232.07:59:23.70/vb/04,04,usb,yes,32,32 2006.232.07:59:23.70/vb/05,03,usb,yes,39,44 2006.232.07:59:23.70/vb/06,04,usb,yes,32,34 2006.232.07:59:23.70/vb/07,04,usb,yes,33,33 2006.232.07:59:23.70/vb/08,04,usb,yes,31,35 2006.232.07:59:23.93/vblo/01,632.99,yes,locked 2006.232.07:59:23.93/vblo/02,640.99,yes,locked 2006.232.07:59:23.93/vblo/03,656.99,yes,locked 2006.232.07:59:23.93/vblo/04,712.99,yes,locked 2006.232.07:59:23.93/vblo/05,744.99,yes,locked 2006.232.07:59:23.93/vblo/06,752.99,yes,locked 2006.232.07:59:23.93/vblo/07,734.99,yes,locked 2006.232.07:59:23.93/vblo/08,744.99,yes,locked 2006.232.07:59:24.08/vabw/8 2006.232.07:59:24.23/vbbw/8 2006.232.07:59:24.32/xfe/off,on,13.7 2006.232.07:59:24.70/ifatt/23,28,28,28 2006.232.07:59:25.07/fmout-gps/S +4.46E-07 2006.232.07:59:25.11:!2006.232.08:00:20 2006.232.08:00:20.00:data_valid=off 2006.232.08:00:20.00:postob 2006.232.08:00:20.22/cable/+6.3883E-03 2006.232.08:00:20.22/wx/29.41,1007.3,87 2006.232.08:00:21.07/fmout-gps/S +4.45E-07 2006.232.08:00:21.07:scan_name=232-0801,k06232,60 2006.232.08:00:21.07:source=1044+719,104827.62,714335.9,2000.0,ccw 2006.232.08:00:21.14#flagr#flagr/antenna,new-source 2006.232.08:00:22.14:checkk5 2006.232.08:00:22.47/chk_autoobs//k5ts1/ autoobs is running! 2006.232.08:00:22.84/chk_autoobs//k5ts2/ autoobs is running! 2006.232.08:00:23.22/chk_autoobs//k5ts3/ autoobs is running! 2006.232.08:00:23.59/chk_autoobs//k5ts4/ autoobs is running! 2006.232.08:00:23.96/chk_obsdata//k5ts1/T2320759??a.dat file size is correct (nominal:480MB, actual:480MB). 2006.232.08:00:24.33/chk_obsdata//k5ts2/T2320759??b.dat file size is correct (nominal:480MB, actual:480MB). 2006.232.08:00:24.69/chk_obsdata//k5ts3/T2320759??c.dat file size is correct (nominal:480MB, actual:480MB). 2006.232.08:00:25.07/chk_obsdata//k5ts4/T2320759??d.dat file size is correct (nominal:480MB, actual:480MB). 2006.232.08:00:25.76/k5log//k5ts1_log_newline 2006.232.08:00:26.44/k5log//k5ts2_log_newline 2006.232.08:00:27.15/k5log//k5ts3_log_newline 2006.232.08:00:27.84/k5log//k5ts4_log_newline 2006.232.08:00:27.87/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.232.08:00:27.87:4f8m12a=2 2006.232.08:00:27.87$4f8m12a/echo=on 2006.232.08:00:27.87$4f8m12a/pcalon 2006.232.08:00:27.87$pcalon/"no phase cal control is implemented here 2006.232.08:00:27.87$4f8m12a/"tpicd=stop 2006.232.08:00:27.87$4f8m12a/vc4f8 2006.232.08:00:27.87$vc4f8/valo=1,532.99 2006.232.08:00:27.87#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.232.08:00:27.87#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.232.08:00:27.87#ibcon#ireg 17 cls_cnt 0 2006.232.08:00:27.87#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:00:27.87#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:00:27.87#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:00:27.87#ibcon#enter wrdev, iclass 25, count 0 2006.232.08:00:27.87#ibcon#first serial, iclass 25, count 0 2006.232.08:00:27.87#ibcon#enter sib2, iclass 25, count 0 2006.232.08:00:27.87#ibcon#flushed, iclass 25, count 0 2006.232.08:00:27.87#ibcon#about to write, iclass 25, count 0 2006.232.08:00:27.87#ibcon#wrote, iclass 25, count 0 2006.232.08:00:27.87#ibcon#about to read 3, iclass 25, count 0 2006.232.08:00:27.91#ibcon#read 3, iclass 25, count 0 2006.232.08:00:27.91#ibcon#about to read 4, iclass 25, count 0 2006.232.08:00:27.91#ibcon#read 4, iclass 25, count 0 2006.232.08:00:27.91#ibcon#about to read 5, iclass 25, count 0 2006.232.08:00:27.91#ibcon#read 5, iclass 25, count 0 2006.232.08:00:27.91#ibcon#about to read 6, iclass 25, count 0 2006.232.08:00:27.91#ibcon#read 6, iclass 25, count 0 2006.232.08:00:27.91#ibcon#end of sib2, iclass 25, count 0 2006.232.08:00:27.91#ibcon#*mode == 0, iclass 25, count 0 2006.232.08:00:27.91#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.232.08:00:27.91#ibcon#[26=FRQ=01,532.99\r\n] 2006.232.08:00:27.91#ibcon#*before write, iclass 25, count 0 2006.232.08:00:27.91#ibcon#enter sib2, iclass 25, count 0 2006.232.08:00:27.91#ibcon#flushed, iclass 25, count 0 2006.232.08:00:27.91#ibcon#about to write, iclass 25, count 0 2006.232.08:00:27.91#ibcon#wrote, iclass 25, count 0 2006.232.08:00:27.91#ibcon#about to read 3, iclass 25, count 0 2006.232.08:00:27.96#ibcon#read 3, iclass 25, count 0 2006.232.08:00:27.96#ibcon#about to read 4, iclass 25, count 0 2006.232.08:00:27.96#ibcon#read 4, iclass 25, count 0 2006.232.08:00:27.96#ibcon#about to read 5, iclass 25, count 0 2006.232.08:00:27.96#ibcon#read 5, iclass 25, count 0 2006.232.08:00:27.96#ibcon#about to read 6, iclass 25, count 0 2006.232.08:00:27.96#ibcon#read 6, iclass 25, count 0 2006.232.08:00:27.96#ibcon#end of sib2, iclass 25, count 0 2006.232.08:00:27.96#ibcon#*after write, iclass 25, count 0 2006.232.08:00:27.96#ibcon#*before return 0, iclass 25, count 0 2006.232.08:00:27.96#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:00:27.96#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:00:27.96#ibcon#about to clear, iclass 25 cls_cnt 0 2006.232.08:00:27.96#ibcon#cleared, iclass 25 cls_cnt 0 2006.232.08:00:27.96$vc4f8/va=1,8 2006.232.08:00:27.96#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.232.08:00:27.96#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.232.08:00:27.96#ibcon#ireg 11 cls_cnt 2 2006.232.08:00:27.96#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:00:27.96#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:00:27.96#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:00:27.96#ibcon#enter wrdev, iclass 27, count 2 2006.232.08:00:27.96#ibcon#first serial, iclass 27, count 2 2006.232.08:00:27.96#ibcon#enter sib2, iclass 27, count 2 2006.232.08:00:27.96#ibcon#flushed, iclass 27, count 2 2006.232.08:00:27.96#ibcon#about to write, iclass 27, count 2 2006.232.08:00:27.96#ibcon#wrote, iclass 27, count 2 2006.232.08:00:27.96#ibcon#about to read 3, iclass 27, count 2 2006.232.08:00:27.98#ibcon#read 3, iclass 27, count 2 2006.232.08:00:27.98#ibcon#about to read 4, iclass 27, count 2 2006.232.08:00:27.98#ibcon#read 4, iclass 27, count 2 2006.232.08:00:27.98#ibcon#about to read 5, iclass 27, count 2 2006.232.08:00:27.98#ibcon#read 5, iclass 27, count 2 2006.232.08:00:27.98#ibcon#about to read 6, iclass 27, count 2 2006.232.08:00:27.98#ibcon#read 6, iclass 27, count 2 2006.232.08:00:27.98#ibcon#end of sib2, iclass 27, count 2 2006.232.08:00:27.98#ibcon#*mode == 0, iclass 27, count 2 2006.232.08:00:27.98#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.232.08:00:27.98#ibcon#[25=AT01-08\r\n] 2006.232.08:00:27.98#ibcon#*before write, iclass 27, count 2 2006.232.08:00:27.98#ibcon#enter sib2, iclass 27, count 2 2006.232.08:00:27.98#ibcon#flushed, iclass 27, count 2 2006.232.08:00:27.98#ibcon#about to write, iclass 27, count 2 2006.232.08:00:27.98#ibcon#wrote, iclass 27, count 2 2006.232.08:00:27.98#ibcon#about to read 3, iclass 27, count 2 2006.232.08:00:28.01#ibcon#read 3, iclass 27, count 2 2006.232.08:00:28.01#ibcon#about to read 4, iclass 27, count 2 2006.232.08:00:28.01#ibcon#read 4, iclass 27, count 2 2006.232.08:00:28.01#ibcon#about to read 5, iclass 27, count 2 2006.232.08:00:28.01#ibcon#read 5, iclass 27, count 2 2006.232.08:00:28.01#ibcon#about to read 6, iclass 27, count 2 2006.232.08:00:28.01#ibcon#read 6, iclass 27, count 2 2006.232.08:00:28.01#ibcon#end of sib2, iclass 27, count 2 2006.232.08:00:28.01#ibcon#*after write, iclass 27, count 2 2006.232.08:00:28.01#ibcon#*before return 0, iclass 27, count 2 2006.232.08:00:28.01#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:00:28.01#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:00:28.01#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.232.08:00:28.01#ibcon#ireg 7 cls_cnt 0 2006.232.08:00:28.01#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:00:28.13#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:00:28.13#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:00:28.13#ibcon#enter wrdev, iclass 27, count 0 2006.232.08:00:28.13#ibcon#first serial, iclass 27, count 0 2006.232.08:00:28.13#ibcon#enter sib2, iclass 27, count 0 2006.232.08:00:28.13#ibcon#flushed, iclass 27, count 0 2006.232.08:00:28.13#ibcon#about to write, iclass 27, count 0 2006.232.08:00:28.13#ibcon#wrote, iclass 27, count 0 2006.232.08:00:28.13#ibcon#about to read 3, iclass 27, count 0 2006.232.08:00:28.15#ibcon#read 3, iclass 27, count 0 2006.232.08:00:28.15#ibcon#about to read 4, iclass 27, count 0 2006.232.08:00:28.15#ibcon#read 4, iclass 27, count 0 2006.232.08:00:28.15#ibcon#about to read 5, iclass 27, count 0 2006.232.08:00:28.15#ibcon#read 5, iclass 27, count 0 2006.232.08:00:28.15#ibcon#about to read 6, iclass 27, count 0 2006.232.08:00:28.15#ibcon#read 6, iclass 27, count 0 2006.232.08:00:28.15#ibcon#end of sib2, iclass 27, count 0 2006.232.08:00:28.15#ibcon#*mode == 0, iclass 27, count 0 2006.232.08:00:28.15#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.232.08:00:28.15#ibcon#[25=USB\r\n] 2006.232.08:00:28.15#ibcon#*before write, iclass 27, count 0 2006.232.08:00:28.15#ibcon#enter sib2, iclass 27, count 0 2006.232.08:00:28.15#ibcon#flushed, iclass 27, count 0 2006.232.08:00:28.15#ibcon#about to write, iclass 27, count 0 2006.232.08:00:28.15#ibcon#wrote, iclass 27, count 0 2006.232.08:00:28.15#ibcon#about to read 3, iclass 27, count 0 2006.232.08:00:28.18#ibcon#read 3, iclass 27, count 0 2006.232.08:00:28.18#ibcon#about to read 4, iclass 27, count 0 2006.232.08:00:28.18#ibcon#read 4, iclass 27, count 0 2006.232.08:00:28.18#ibcon#about to read 5, iclass 27, count 0 2006.232.08:00:28.18#ibcon#read 5, iclass 27, count 0 2006.232.08:00:28.18#ibcon#about to read 6, iclass 27, count 0 2006.232.08:00:28.18#ibcon#read 6, iclass 27, count 0 2006.232.08:00:28.18#ibcon#end of sib2, iclass 27, count 0 2006.232.08:00:28.18#ibcon#*after write, iclass 27, count 0 2006.232.08:00:28.18#ibcon#*before return 0, iclass 27, count 0 2006.232.08:00:28.18#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:00:28.18#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:00:28.18#ibcon#about to clear, iclass 27 cls_cnt 0 2006.232.08:00:28.18#ibcon#cleared, iclass 27 cls_cnt 0 2006.232.08:00:28.18$vc4f8/valo=2,572.99 2006.232.08:00:28.18#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.232.08:00:28.18#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.232.08:00:28.18#ibcon#ireg 17 cls_cnt 0 2006.232.08:00:28.18#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:00:28.18#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:00:28.18#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:00:28.18#ibcon#enter wrdev, iclass 29, count 0 2006.232.08:00:28.18#ibcon#first serial, iclass 29, count 0 2006.232.08:00:28.18#ibcon#enter sib2, iclass 29, count 0 2006.232.08:00:28.18#ibcon#flushed, iclass 29, count 0 2006.232.08:00:28.18#ibcon#about to write, iclass 29, count 0 2006.232.08:00:28.18#ibcon#wrote, iclass 29, count 0 2006.232.08:00:28.18#ibcon#about to read 3, iclass 29, count 0 2006.232.08:00:28.20#ibcon#read 3, iclass 29, count 0 2006.232.08:00:28.20#ibcon#about to read 4, iclass 29, count 0 2006.232.08:00:28.20#ibcon#read 4, iclass 29, count 0 2006.232.08:00:28.20#ibcon#about to read 5, iclass 29, count 0 2006.232.08:00:28.20#ibcon#read 5, iclass 29, count 0 2006.232.08:00:28.20#ibcon#about to read 6, iclass 29, count 0 2006.232.08:00:28.20#ibcon#read 6, iclass 29, count 0 2006.232.08:00:28.20#ibcon#end of sib2, iclass 29, count 0 2006.232.08:00:28.20#ibcon#*mode == 0, iclass 29, count 0 2006.232.08:00:28.20#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.232.08:00:28.20#ibcon#[26=FRQ=02,572.99\r\n] 2006.232.08:00:28.20#ibcon#*before write, iclass 29, count 0 2006.232.08:00:28.20#ibcon#enter sib2, iclass 29, count 0 2006.232.08:00:28.20#ibcon#flushed, iclass 29, count 0 2006.232.08:00:28.20#ibcon#about to write, iclass 29, count 0 2006.232.08:00:28.20#ibcon#wrote, iclass 29, count 0 2006.232.08:00:28.20#ibcon#about to read 3, iclass 29, count 0 2006.232.08:00:28.24#ibcon#read 3, iclass 29, count 0 2006.232.08:00:28.24#ibcon#about to read 4, iclass 29, count 0 2006.232.08:00:28.24#ibcon#read 4, iclass 29, count 0 2006.232.08:00:28.24#ibcon#about to read 5, iclass 29, count 0 2006.232.08:00:28.24#ibcon#read 5, iclass 29, count 0 2006.232.08:00:28.24#ibcon#about to read 6, iclass 29, count 0 2006.232.08:00:28.24#ibcon#read 6, iclass 29, count 0 2006.232.08:00:28.24#ibcon#end of sib2, iclass 29, count 0 2006.232.08:00:28.24#ibcon#*after write, iclass 29, count 0 2006.232.08:00:28.24#ibcon#*before return 0, iclass 29, count 0 2006.232.08:00:28.24#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:00:28.24#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:00:28.24#ibcon#about to clear, iclass 29 cls_cnt 0 2006.232.08:00:28.24#ibcon#cleared, iclass 29 cls_cnt 0 2006.232.08:00:28.24$vc4f8/va=2,7 2006.232.08:00:28.24#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.232.08:00:28.24#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.232.08:00:28.24#ibcon#ireg 11 cls_cnt 2 2006.232.08:00:28.24#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.232.08:00:28.30#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.232.08:00:28.30#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.232.08:00:28.30#ibcon#enter wrdev, iclass 31, count 2 2006.232.08:00:28.30#ibcon#first serial, iclass 31, count 2 2006.232.08:00:28.30#ibcon#enter sib2, iclass 31, count 2 2006.232.08:00:28.30#ibcon#flushed, iclass 31, count 2 2006.232.08:00:28.30#ibcon#about to write, iclass 31, count 2 2006.232.08:00:28.30#ibcon#wrote, iclass 31, count 2 2006.232.08:00:28.30#ibcon#about to read 3, iclass 31, count 2 2006.232.08:00:28.33#ibcon#read 3, iclass 31, count 2 2006.232.08:00:28.33#ibcon#about to read 4, iclass 31, count 2 2006.232.08:00:28.33#ibcon#read 4, iclass 31, count 2 2006.232.08:00:28.33#ibcon#about to read 5, iclass 31, count 2 2006.232.08:00:28.33#ibcon#read 5, iclass 31, count 2 2006.232.08:00:28.33#ibcon#about to read 6, iclass 31, count 2 2006.232.08:00:28.33#ibcon#read 6, iclass 31, count 2 2006.232.08:00:28.33#ibcon#end of sib2, iclass 31, count 2 2006.232.08:00:28.33#ibcon#*mode == 0, iclass 31, count 2 2006.232.08:00:28.33#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.232.08:00:28.33#ibcon#[25=AT02-07\r\n] 2006.232.08:00:28.33#ibcon#*before write, iclass 31, count 2 2006.232.08:00:28.33#ibcon#enter sib2, iclass 31, count 2 2006.232.08:00:28.33#ibcon#flushed, iclass 31, count 2 2006.232.08:00:28.33#ibcon#about to write, iclass 31, count 2 2006.232.08:00:28.33#ibcon#wrote, iclass 31, count 2 2006.232.08:00:28.33#ibcon#about to read 3, iclass 31, count 2 2006.232.08:00:28.36#ibcon#read 3, iclass 31, count 2 2006.232.08:00:28.36#ibcon#about to read 4, iclass 31, count 2 2006.232.08:00:28.36#ibcon#read 4, iclass 31, count 2 2006.232.08:00:28.36#ibcon#about to read 5, iclass 31, count 2 2006.232.08:00:28.36#ibcon#read 5, iclass 31, count 2 2006.232.08:00:28.36#ibcon#about to read 6, iclass 31, count 2 2006.232.08:00:28.36#ibcon#read 6, iclass 31, count 2 2006.232.08:00:28.36#ibcon#end of sib2, iclass 31, count 2 2006.232.08:00:28.36#ibcon#*after write, iclass 31, count 2 2006.232.08:00:28.36#ibcon#*before return 0, iclass 31, count 2 2006.232.08:00:28.36#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.232.08:00:28.36#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.232.08:00:28.36#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.232.08:00:28.36#ibcon#ireg 7 cls_cnt 0 2006.232.08:00:28.36#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.232.08:00:28.48#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.232.08:00:28.48#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.232.08:00:28.48#ibcon#enter wrdev, iclass 31, count 0 2006.232.08:00:28.48#ibcon#first serial, iclass 31, count 0 2006.232.08:00:28.48#ibcon#enter sib2, iclass 31, count 0 2006.232.08:00:28.48#ibcon#flushed, iclass 31, count 0 2006.232.08:00:28.48#ibcon#about to write, iclass 31, count 0 2006.232.08:00:28.48#ibcon#wrote, iclass 31, count 0 2006.232.08:00:28.48#ibcon#about to read 3, iclass 31, count 0 2006.232.08:00:28.50#ibcon#read 3, iclass 31, count 0 2006.232.08:00:28.50#ibcon#about to read 4, iclass 31, count 0 2006.232.08:00:28.50#ibcon#read 4, iclass 31, count 0 2006.232.08:00:28.50#ibcon#about to read 5, iclass 31, count 0 2006.232.08:00:28.50#ibcon#read 5, iclass 31, count 0 2006.232.08:00:28.50#ibcon#about to read 6, iclass 31, count 0 2006.232.08:00:28.50#ibcon#read 6, iclass 31, count 0 2006.232.08:00:28.50#ibcon#end of sib2, iclass 31, count 0 2006.232.08:00:28.50#ibcon#*mode == 0, iclass 31, count 0 2006.232.08:00:28.50#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.232.08:00:28.50#ibcon#[25=USB\r\n] 2006.232.08:00:28.50#ibcon#*before write, iclass 31, count 0 2006.232.08:00:28.50#ibcon#enter sib2, iclass 31, count 0 2006.232.08:00:28.50#ibcon#flushed, iclass 31, count 0 2006.232.08:00:28.50#ibcon#about to write, iclass 31, count 0 2006.232.08:00:28.50#ibcon#wrote, iclass 31, count 0 2006.232.08:00:28.50#ibcon#about to read 3, iclass 31, count 0 2006.232.08:00:28.53#ibcon#read 3, iclass 31, count 0 2006.232.08:00:28.53#ibcon#about to read 4, iclass 31, count 0 2006.232.08:00:28.53#ibcon#read 4, iclass 31, count 0 2006.232.08:00:28.53#ibcon#about to read 5, iclass 31, count 0 2006.232.08:00:28.53#ibcon#read 5, iclass 31, count 0 2006.232.08:00:28.53#ibcon#about to read 6, iclass 31, count 0 2006.232.08:00:28.53#ibcon#read 6, iclass 31, count 0 2006.232.08:00:28.53#ibcon#end of sib2, iclass 31, count 0 2006.232.08:00:28.53#ibcon#*after write, iclass 31, count 0 2006.232.08:00:28.53#ibcon#*before return 0, iclass 31, count 0 2006.232.08:00:28.53#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.232.08:00:28.53#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.232.08:00:28.53#ibcon#about to clear, iclass 31 cls_cnt 0 2006.232.08:00:28.53#ibcon#cleared, iclass 31 cls_cnt 0 2006.232.08:00:28.53$vc4f8/valo=3,672.99 2006.232.08:00:28.53#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.232.08:00:28.53#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.232.08:00:28.53#ibcon#ireg 17 cls_cnt 0 2006.232.08:00:28.53#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.232.08:00:28.53#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.232.08:00:28.53#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.232.08:00:28.53#ibcon#enter wrdev, iclass 33, count 0 2006.232.08:00:28.53#ibcon#first serial, iclass 33, count 0 2006.232.08:00:28.53#ibcon#enter sib2, iclass 33, count 0 2006.232.08:00:28.53#ibcon#flushed, iclass 33, count 0 2006.232.08:00:28.53#ibcon#about to write, iclass 33, count 0 2006.232.08:00:28.53#ibcon#wrote, iclass 33, count 0 2006.232.08:00:28.53#ibcon#about to read 3, iclass 33, count 0 2006.232.08:00:28.55#ibcon#read 3, iclass 33, count 0 2006.232.08:00:28.55#ibcon#about to read 4, iclass 33, count 0 2006.232.08:00:28.55#ibcon#read 4, iclass 33, count 0 2006.232.08:00:28.55#ibcon#about to read 5, iclass 33, count 0 2006.232.08:00:28.55#ibcon#read 5, iclass 33, count 0 2006.232.08:00:28.55#ibcon#about to read 6, iclass 33, count 0 2006.232.08:00:28.55#ibcon#read 6, iclass 33, count 0 2006.232.08:00:28.55#ibcon#end of sib2, iclass 33, count 0 2006.232.08:00:28.55#ibcon#*mode == 0, iclass 33, count 0 2006.232.08:00:28.55#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.232.08:00:28.55#ibcon#[26=FRQ=03,672.99\r\n] 2006.232.08:00:28.55#ibcon#*before write, iclass 33, count 0 2006.232.08:00:28.55#ibcon#enter sib2, iclass 33, count 0 2006.232.08:00:28.55#ibcon#flushed, iclass 33, count 0 2006.232.08:00:28.55#ibcon#about to write, iclass 33, count 0 2006.232.08:00:28.55#ibcon#wrote, iclass 33, count 0 2006.232.08:00:28.55#ibcon#about to read 3, iclass 33, count 0 2006.232.08:00:28.59#ibcon#read 3, iclass 33, count 0 2006.232.08:00:28.59#ibcon#about to read 4, iclass 33, count 0 2006.232.08:00:28.59#ibcon#read 4, iclass 33, count 0 2006.232.08:00:28.59#ibcon#about to read 5, iclass 33, count 0 2006.232.08:00:28.59#ibcon#read 5, iclass 33, count 0 2006.232.08:00:28.59#ibcon#about to read 6, iclass 33, count 0 2006.232.08:00:28.59#ibcon#read 6, iclass 33, count 0 2006.232.08:00:28.59#ibcon#end of sib2, iclass 33, count 0 2006.232.08:00:28.59#ibcon#*after write, iclass 33, count 0 2006.232.08:00:28.59#ibcon#*before return 0, iclass 33, count 0 2006.232.08:00:28.59#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.232.08:00:28.59#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.232.08:00:28.59#ibcon#about to clear, iclass 33 cls_cnt 0 2006.232.08:00:28.59#ibcon#cleared, iclass 33 cls_cnt 0 2006.232.08:00:28.59$vc4f8/va=3,8 2006.232.08:00:28.59#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.232.08:00:28.59#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.232.08:00:28.59#ibcon#ireg 11 cls_cnt 2 2006.232.08:00:28.59#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.232.08:00:28.65#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.232.08:00:28.65#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.232.08:00:28.65#ibcon#enter wrdev, iclass 35, count 2 2006.232.08:00:28.65#ibcon#first serial, iclass 35, count 2 2006.232.08:00:28.65#ibcon#enter sib2, iclass 35, count 2 2006.232.08:00:28.65#ibcon#flushed, iclass 35, count 2 2006.232.08:00:28.65#ibcon#about to write, iclass 35, count 2 2006.232.08:00:28.65#ibcon#wrote, iclass 35, count 2 2006.232.08:00:28.65#ibcon#about to read 3, iclass 35, count 2 2006.232.08:00:28.68#ibcon#read 3, iclass 35, count 2 2006.232.08:00:28.68#ibcon#about to read 4, iclass 35, count 2 2006.232.08:00:28.68#ibcon#read 4, iclass 35, count 2 2006.232.08:00:28.68#ibcon#about to read 5, iclass 35, count 2 2006.232.08:00:28.68#ibcon#read 5, iclass 35, count 2 2006.232.08:00:28.68#ibcon#about to read 6, iclass 35, count 2 2006.232.08:00:28.68#ibcon#read 6, iclass 35, count 2 2006.232.08:00:28.68#ibcon#end of sib2, iclass 35, count 2 2006.232.08:00:28.68#ibcon#*mode == 0, iclass 35, count 2 2006.232.08:00:28.68#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.232.08:00:28.68#ibcon#[25=AT03-08\r\n] 2006.232.08:00:28.68#ibcon#*before write, iclass 35, count 2 2006.232.08:00:28.68#ibcon#enter sib2, iclass 35, count 2 2006.232.08:00:28.68#ibcon#flushed, iclass 35, count 2 2006.232.08:00:28.68#ibcon#about to write, iclass 35, count 2 2006.232.08:00:28.68#ibcon#wrote, iclass 35, count 2 2006.232.08:00:28.68#ibcon#about to read 3, iclass 35, count 2 2006.232.08:00:28.71#ibcon#read 3, iclass 35, count 2 2006.232.08:00:28.71#ibcon#about to read 4, iclass 35, count 2 2006.232.08:00:28.71#ibcon#read 4, iclass 35, count 2 2006.232.08:00:28.71#ibcon#about to read 5, iclass 35, count 2 2006.232.08:00:28.71#ibcon#read 5, iclass 35, count 2 2006.232.08:00:28.71#ibcon#about to read 6, iclass 35, count 2 2006.232.08:00:28.71#ibcon#read 6, iclass 35, count 2 2006.232.08:00:28.71#ibcon#end of sib2, iclass 35, count 2 2006.232.08:00:28.71#ibcon#*after write, iclass 35, count 2 2006.232.08:00:28.71#ibcon#*before return 0, iclass 35, count 2 2006.232.08:00:28.71#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.232.08:00:28.71#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.232.08:00:28.71#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.232.08:00:28.71#ibcon#ireg 7 cls_cnt 0 2006.232.08:00:28.71#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.232.08:00:28.83#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.232.08:00:28.83#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.232.08:00:28.83#ibcon#enter wrdev, iclass 35, count 0 2006.232.08:00:28.83#ibcon#first serial, iclass 35, count 0 2006.232.08:00:28.83#ibcon#enter sib2, iclass 35, count 0 2006.232.08:00:28.83#ibcon#flushed, iclass 35, count 0 2006.232.08:00:28.83#ibcon#about to write, iclass 35, count 0 2006.232.08:00:28.83#ibcon#wrote, iclass 35, count 0 2006.232.08:00:28.83#ibcon#about to read 3, iclass 35, count 0 2006.232.08:00:28.85#ibcon#read 3, iclass 35, count 0 2006.232.08:00:28.85#ibcon#about to read 4, iclass 35, count 0 2006.232.08:00:28.85#ibcon#read 4, iclass 35, count 0 2006.232.08:00:28.85#ibcon#about to read 5, iclass 35, count 0 2006.232.08:00:28.85#ibcon#read 5, iclass 35, count 0 2006.232.08:00:28.85#ibcon#about to read 6, iclass 35, count 0 2006.232.08:00:28.85#ibcon#read 6, iclass 35, count 0 2006.232.08:00:28.85#ibcon#end of sib2, iclass 35, count 0 2006.232.08:00:28.85#ibcon#*mode == 0, iclass 35, count 0 2006.232.08:00:28.85#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.232.08:00:28.85#ibcon#[25=USB\r\n] 2006.232.08:00:28.85#ibcon#*before write, iclass 35, count 0 2006.232.08:00:28.85#ibcon#enter sib2, iclass 35, count 0 2006.232.08:00:28.85#ibcon#flushed, iclass 35, count 0 2006.232.08:00:28.85#ibcon#about to write, iclass 35, count 0 2006.232.08:00:28.85#ibcon#wrote, iclass 35, count 0 2006.232.08:00:28.85#ibcon#about to read 3, iclass 35, count 0 2006.232.08:00:28.88#ibcon#read 3, iclass 35, count 0 2006.232.08:00:28.88#ibcon#about to read 4, iclass 35, count 0 2006.232.08:00:28.88#ibcon#read 4, iclass 35, count 0 2006.232.08:00:28.88#ibcon#about to read 5, iclass 35, count 0 2006.232.08:00:28.88#ibcon#read 5, iclass 35, count 0 2006.232.08:00:28.88#ibcon#about to read 6, iclass 35, count 0 2006.232.08:00:28.88#ibcon#read 6, iclass 35, count 0 2006.232.08:00:28.88#ibcon#end of sib2, iclass 35, count 0 2006.232.08:00:28.88#ibcon#*after write, iclass 35, count 0 2006.232.08:00:28.88#ibcon#*before return 0, iclass 35, count 0 2006.232.08:00:28.88#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.232.08:00:28.88#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.232.08:00:28.88#ibcon#about to clear, iclass 35 cls_cnt 0 2006.232.08:00:28.88#ibcon#cleared, iclass 35 cls_cnt 0 2006.232.08:00:28.88$vc4f8/valo=4,832.99 2006.232.08:00:28.88#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.232.08:00:28.88#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.232.08:00:28.88#ibcon#ireg 17 cls_cnt 0 2006.232.08:00:28.88#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.232.08:00:28.88#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.232.08:00:28.88#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.232.08:00:28.88#ibcon#enter wrdev, iclass 37, count 0 2006.232.08:00:28.88#ibcon#first serial, iclass 37, count 0 2006.232.08:00:28.88#ibcon#enter sib2, iclass 37, count 0 2006.232.08:00:28.88#ibcon#flushed, iclass 37, count 0 2006.232.08:00:28.88#ibcon#about to write, iclass 37, count 0 2006.232.08:00:28.88#ibcon#wrote, iclass 37, count 0 2006.232.08:00:28.88#ibcon#about to read 3, iclass 37, count 0 2006.232.08:00:28.90#ibcon#read 3, iclass 37, count 0 2006.232.08:00:28.90#ibcon#about to read 4, iclass 37, count 0 2006.232.08:00:28.90#ibcon#read 4, iclass 37, count 0 2006.232.08:00:28.90#ibcon#about to read 5, iclass 37, count 0 2006.232.08:00:28.90#ibcon#read 5, iclass 37, count 0 2006.232.08:00:28.90#ibcon#about to read 6, iclass 37, count 0 2006.232.08:00:28.90#ibcon#read 6, iclass 37, count 0 2006.232.08:00:28.90#ibcon#end of sib2, iclass 37, count 0 2006.232.08:00:28.90#ibcon#*mode == 0, iclass 37, count 0 2006.232.08:00:28.90#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.232.08:00:28.90#ibcon#[26=FRQ=04,832.99\r\n] 2006.232.08:00:28.90#ibcon#*before write, iclass 37, count 0 2006.232.08:00:28.90#ibcon#enter sib2, iclass 37, count 0 2006.232.08:00:28.90#ibcon#flushed, iclass 37, count 0 2006.232.08:00:28.90#ibcon#about to write, iclass 37, count 0 2006.232.08:00:28.90#ibcon#wrote, iclass 37, count 0 2006.232.08:00:28.90#ibcon#about to read 3, iclass 37, count 0 2006.232.08:00:28.95#ibcon#read 3, iclass 37, count 0 2006.232.08:00:28.95#ibcon#about to read 4, iclass 37, count 0 2006.232.08:00:28.95#ibcon#read 4, iclass 37, count 0 2006.232.08:00:28.95#ibcon#about to read 5, iclass 37, count 0 2006.232.08:00:28.95#ibcon#read 5, iclass 37, count 0 2006.232.08:00:28.95#ibcon#about to read 6, iclass 37, count 0 2006.232.08:00:28.95#ibcon#read 6, iclass 37, count 0 2006.232.08:00:28.95#ibcon#end of sib2, iclass 37, count 0 2006.232.08:00:28.95#ibcon#*after write, iclass 37, count 0 2006.232.08:00:28.95#ibcon#*before return 0, iclass 37, count 0 2006.232.08:00:28.95#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.232.08:00:28.95#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.232.08:00:28.95#ibcon#about to clear, iclass 37 cls_cnt 0 2006.232.08:00:28.95#ibcon#cleared, iclass 37 cls_cnt 0 2006.232.08:00:28.95$vc4f8/va=4,7 2006.232.08:00:28.95#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.232.08:00:28.95#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.232.08:00:28.95#ibcon#ireg 11 cls_cnt 2 2006.232.08:00:28.95#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.232.08:00:29.00#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.232.08:00:29.00#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.232.08:00:29.00#ibcon#enter wrdev, iclass 39, count 2 2006.232.08:00:29.00#ibcon#first serial, iclass 39, count 2 2006.232.08:00:29.00#ibcon#enter sib2, iclass 39, count 2 2006.232.08:00:29.00#ibcon#flushed, iclass 39, count 2 2006.232.08:00:29.00#ibcon#about to write, iclass 39, count 2 2006.232.08:00:29.00#ibcon#wrote, iclass 39, count 2 2006.232.08:00:29.00#ibcon#about to read 3, iclass 39, count 2 2006.232.08:00:29.02#ibcon#read 3, iclass 39, count 2 2006.232.08:00:29.02#ibcon#about to read 4, iclass 39, count 2 2006.232.08:00:29.02#ibcon#read 4, iclass 39, count 2 2006.232.08:00:29.02#ibcon#about to read 5, iclass 39, count 2 2006.232.08:00:29.02#ibcon#read 5, iclass 39, count 2 2006.232.08:00:29.02#ibcon#about to read 6, iclass 39, count 2 2006.232.08:00:29.02#ibcon#read 6, iclass 39, count 2 2006.232.08:00:29.02#ibcon#end of sib2, iclass 39, count 2 2006.232.08:00:29.02#ibcon#*mode == 0, iclass 39, count 2 2006.232.08:00:29.02#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.232.08:00:29.02#ibcon#[25=AT04-07\r\n] 2006.232.08:00:29.02#ibcon#*before write, iclass 39, count 2 2006.232.08:00:29.02#ibcon#enter sib2, iclass 39, count 2 2006.232.08:00:29.02#ibcon#flushed, iclass 39, count 2 2006.232.08:00:29.02#ibcon#about to write, iclass 39, count 2 2006.232.08:00:29.02#ibcon#wrote, iclass 39, count 2 2006.232.08:00:29.02#ibcon#about to read 3, iclass 39, count 2 2006.232.08:00:29.05#ibcon#read 3, iclass 39, count 2 2006.232.08:00:29.05#ibcon#about to read 4, iclass 39, count 2 2006.232.08:00:29.05#ibcon#read 4, iclass 39, count 2 2006.232.08:00:29.05#ibcon#about to read 5, iclass 39, count 2 2006.232.08:00:29.05#ibcon#read 5, iclass 39, count 2 2006.232.08:00:29.05#ibcon#about to read 6, iclass 39, count 2 2006.232.08:00:29.05#ibcon#read 6, iclass 39, count 2 2006.232.08:00:29.05#ibcon#end of sib2, iclass 39, count 2 2006.232.08:00:29.05#ibcon#*after write, iclass 39, count 2 2006.232.08:00:29.05#ibcon#*before return 0, iclass 39, count 2 2006.232.08:00:29.05#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.232.08:00:29.05#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.232.08:00:29.05#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.232.08:00:29.05#ibcon#ireg 7 cls_cnt 0 2006.232.08:00:29.05#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.232.08:00:29.17#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.232.08:00:29.17#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.232.08:00:29.17#ibcon#enter wrdev, iclass 39, count 0 2006.232.08:00:29.17#ibcon#first serial, iclass 39, count 0 2006.232.08:00:29.17#ibcon#enter sib2, iclass 39, count 0 2006.232.08:00:29.17#ibcon#flushed, iclass 39, count 0 2006.232.08:00:29.17#ibcon#about to write, iclass 39, count 0 2006.232.08:00:29.17#ibcon#wrote, iclass 39, count 0 2006.232.08:00:29.17#ibcon#about to read 3, iclass 39, count 0 2006.232.08:00:29.19#ibcon#read 3, iclass 39, count 0 2006.232.08:00:29.19#ibcon#about to read 4, iclass 39, count 0 2006.232.08:00:29.19#ibcon#read 4, iclass 39, count 0 2006.232.08:00:29.19#ibcon#about to read 5, iclass 39, count 0 2006.232.08:00:29.19#ibcon#read 5, iclass 39, count 0 2006.232.08:00:29.19#ibcon#about to read 6, iclass 39, count 0 2006.232.08:00:29.19#ibcon#read 6, iclass 39, count 0 2006.232.08:00:29.19#ibcon#end of sib2, iclass 39, count 0 2006.232.08:00:29.19#ibcon#*mode == 0, iclass 39, count 0 2006.232.08:00:29.19#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.232.08:00:29.19#ibcon#[25=USB\r\n] 2006.232.08:00:29.19#ibcon#*before write, iclass 39, count 0 2006.232.08:00:29.19#ibcon#enter sib2, iclass 39, count 0 2006.232.08:00:29.19#ibcon#flushed, iclass 39, count 0 2006.232.08:00:29.19#ibcon#about to write, iclass 39, count 0 2006.232.08:00:29.19#ibcon#wrote, iclass 39, count 0 2006.232.08:00:29.19#ibcon#about to read 3, iclass 39, count 0 2006.232.08:00:29.22#ibcon#read 3, iclass 39, count 0 2006.232.08:00:29.22#ibcon#about to read 4, iclass 39, count 0 2006.232.08:00:29.22#ibcon#read 4, iclass 39, count 0 2006.232.08:00:29.22#ibcon#about to read 5, iclass 39, count 0 2006.232.08:00:29.22#ibcon#read 5, iclass 39, count 0 2006.232.08:00:29.22#ibcon#about to read 6, iclass 39, count 0 2006.232.08:00:29.22#ibcon#read 6, iclass 39, count 0 2006.232.08:00:29.22#ibcon#end of sib2, iclass 39, count 0 2006.232.08:00:29.22#ibcon#*after write, iclass 39, count 0 2006.232.08:00:29.22#ibcon#*before return 0, iclass 39, count 0 2006.232.08:00:29.22#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.232.08:00:29.22#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.232.08:00:29.22#ibcon#about to clear, iclass 39 cls_cnt 0 2006.232.08:00:29.22#ibcon#cleared, iclass 39 cls_cnt 0 2006.232.08:00:29.22$vc4f8/valo=5,652.99 2006.232.08:00:29.22#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.232.08:00:29.22#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.232.08:00:29.22#ibcon#ireg 17 cls_cnt 0 2006.232.08:00:29.22#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:00:29.22#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:00:29.22#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:00:29.22#ibcon#enter wrdev, iclass 3, count 0 2006.232.08:00:29.22#ibcon#first serial, iclass 3, count 0 2006.232.08:00:29.22#ibcon#enter sib2, iclass 3, count 0 2006.232.08:00:29.22#ibcon#flushed, iclass 3, count 0 2006.232.08:00:29.22#ibcon#about to write, iclass 3, count 0 2006.232.08:00:29.22#ibcon#wrote, iclass 3, count 0 2006.232.08:00:29.22#ibcon#about to read 3, iclass 3, count 0 2006.232.08:00:29.24#ibcon#read 3, iclass 3, count 0 2006.232.08:00:29.24#ibcon#about to read 4, iclass 3, count 0 2006.232.08:00:29.24#ibcon#read 4, iclass 3, count 0 2006.232.08:00:29.24#ibcon#about to read 5, iclass 3, count 0 2006.232.08:00:29.24#ibcon#read 5, iclass 3, count 0 2006.232.08:00:29.24#ibcon#about to read 6, iclass 3, count 0 2006.232.08:00:29.24#ibcon#read 6, iclass 3, count 0 2006.232.08:00:29.24#ibcon#end of sib2, iclass 3, count 0 2006.232.08:00:29.24#ibcon#*mode == 0, iclass 3, count 0 2006.232.08:00:29.24#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.232.08:00:29.24#ibcon#[26=FRQ=05,652.99\r\n] 2006.232.08:00:29.24#ibcon#*before write, iclass 3, count 0 2006.232.08:00:29.24#ibcon#enter sib2, iclass 3, count 0 2006.232.08:00:29.24#ibcon#flushed, iclass 3, count 0 2006.232.08:00:29.24#ibcon#about to write, iclass 3, count 0 2006.232.08:00:29.24#ibcon#wrote, iclass 3, count 0 2006.232.08:00:29.24#ibcon#about to read 3, iclass 3, count 0 2006.232.08:00:29.28#ibcon#read 3, iclass 3, count 0 2006.232.08:00:29.28#ibcon#about to read 4, iclass 3, count 0 2006.232.08:00:29.28#ibcon#read 4, iclass 3, count 0 2006.232.08:00:29.28#ibcon#about to read 5, iclass 3, count 0 2006.232.08:00:29.28#ibcon#read 5, iclass 3, count 0 2006.232.08:00:29.28#ibcon#about to read 6, iclass 3, count 0 2006.232.08:00:29.28#ibcon#read 6, iclass 3, count 0 2006.232.08:00:29.28#ibcon#end of sib2, iclass 3, count 0 2006.232.08:00:29.28#ibcon#*after write, iclass 3, count 0 2006.232.08:00:29.28#ibcon#*before return 0, iclass 3, count 0 2006.232.08:00:29.28#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:00:29.28#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:00:29.28#ibcon#about to clear, iclass 3 cls_cnt 0 2006.232.08:00:29.28#ibcon#cleared, iclass 3 cls_cnt 0 2006.232.08:00:29.28$vc4f8/va=5,7 2006.232.08:00:29.28#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.232.08:00:29.28#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.232.08:00:29.28#ibcon#ireg 11 cls_cnt 2 2006.232.08:00:29.28#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.232.08:00:29.34#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.232.08:00:29.34#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.232.08:00:29.34#ibcon#enter wrdev, iclass 5, count 2 2006.232.08:00:29.34#ibcon#first serial, iclass 5, count 2 2006.232.08:00:29.34#ibcon#enter sib2, iclass 5, count 2 2006.232.08:00:29.34#ibcon#flushed, iclass 5, count 2 2006.232.08:00:29.34#ibcon#about to write, iclass 5, count 2 2006.232.08:00:29.34#ibcon#wrote, iclass 5, count 2 2006.232.08:00:29.34#ibcon#about to read 3, iclass 5, count 2 2006.232.08:00:29.36#ibcon#read 3, iclass 5, count 2 2006.232.08:00:29.36#ibcon#about to read 4, iclass 5, count 2 2006.232.08:00:29.36#ibcon#read 4, iclass 5, count 2 2006.232.08:00:29.36#ibcon#about to read 5, iclass 5, count 2 2006.232.08:00:29.36#ibcon#read 5, iclass 5, count 2 2006.232.08:00:29.36#ibcon#about to read 6, iclass 5, count 2 2006.232.08:00:29.36#ibcon#read 6, iclass 5, count 2 2006.232.08:00:29.36#ibcon#end of sib2, iclass 5, count 2 2006.232.08:00:29.36#ibcon#*mode == 0, iclass 5, count 2 2006.232.08:00:29.36#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.232.08:00:29.36#ibcon#[25=AT05-07\r\n] 2006.232.08:00:29.36#ibcon#*before write, iclass 5, count 2 2006.232.08:00:29.36#ibcon#enter sib2, iclass 5, count 2 2006.232.08:00:29.36#ibcon#flushed, iclass 5, count 2 2006.232.08:00:29.36#ibcon#about to write, iclass 5, count 2 2006.232.08:00:29.36#ibcon#wrote, iclass 5, count 2 2006.232.08:00:29.36#ibcon#about to read 3, iclass 5, count 2 2006.232.08:00:29.39#ibcon#read 3, iclass 5, count 2 2006.232.08:00:29.39#ibcon#about to read 4, iclass 5, count 2 2006.232.08:00:29.39#ibcon#read 4, iclass 5, count 2 2006.232.08:00:29.39#ibcon#about to read 5, iclass 5, count 2 2006.232.08:00:29.39#ibcon#read 5, iclass 5, count 2 2006.232.08:00:29.39#ibcon#about to read 6, iclass 5, count 2 2006.232.08:00:29.39#ibcon#read 6, iclass 5, count 2 2006.232.08:00:29.39#ibcon#end of sib2, iclass 5, count 2 2006.232.08:00:29.39#ibcon#*after write, iclass 5, count 2 2006.232.08:00:29.39#ibcon#*before return 0, iclass 5, count 2 2006.232.08:00:29.39#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.232.08:00:29.39#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.232.08:00:29.39#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.232.08:00:29.39#ibcon#ireg 7 cls_cnt 0 2006.232.08:00:29.39#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.232.08:00:29.51#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.232.08:00:29.51#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.232.08:00:29.51#ibcon#enter wrdev, iclass 5, count 0 2006.232.08:00:29.51#ibcon#first serial, iclass 5, count 0 2006.232.08:00:29.51#ibcon#enter sib2, iclass 5, count 0 2006.232.08:00:29.51#ibcon#flushed, iclass 5, count 0 2006.232.08:00:29.51#ibcon#about to write, iclass 5, count 0 2006.232.08:00:29.51#ibcon#wrote, iclass 5, count 0 2006.232.08:00:29.51#ibcon#about to read 3, iclass 5, count 0 2006.232.08:00:29.53#ibcon#read 3, iclass 5, count 0 2006.232.08:00:29.53#ibcon#about to read 4, iclass 5, count 0 2006.232.08:00:29.53#ibcon#read 4, iclass 5, count 0 2006.232.08:00:29.53#ibcon#about to read 5, iclass 5, count 0 2006.232.08:00:29.53#ibcon#read 5, iclass 5, count 0 2006.232.08:00:29.53#ibcon#about to read 6, iclass 5, count 0 2006.232.08:00:29.53#ibcon#read 6, iclass 5, count 0 2006.232.08:00:29.53#ibcon#end of sib2, iclass 5, count 0 2006.232.08:00:29.53#ibcon#*mode == 0, iclass 5, count 0 2006.232.08:00:29.53#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.232.08:00:29.53#ibcon#[25=USB\r\n] 2006.232.08:00:29.53#ibcon#*before write, iclass 5, count 0 2006.232.08:00:29.53#ibcon#enter sib2, iclass 5, count 0 2006.232.08:00:29.53#ibcon#flushed, iclass 5, count 0 2006.232.08:00:29.53#ibcon#about to write, iclass 5, count 0 2006.232.08:00:29.53#ibcon#wrote, iclass 5, count 0 2006.232.08:00:29.53#ibcon#about to read 3, iclass 5, count 0 2006.232.08:00:29.56#ibcon#read 3, iclass 5, count 0 2006.232.08:00:29.56#ibcon#about to read 4, iclass 5, count 0 2006.232.08:00:29.56#ibcon#read 4, iclass 5, count 0 2006.232.08:00:29.56#ibcon#about to read 5, iclass 5, count 0 2006.232.08:00:29.56#ibcon#read 5, iclass 5, count 0 2006.232.08:00:29.56#ibcon#about to read 6, iclass 5, count 0 2006.232.08:00:29.56#ibcon#read 6, iclass 5, count 0 2006.232.08:00:29.56#ibcon#end of sib2, iclass 5, count 0 2006.232.08:00:29.56#ibcon#*after write, iclass 5, count 0 2006.232.08:00:29.56#ibcon#*before return 0, iclass 5, count 0 2006.232.08:00:29.56#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.232.08:00:29.56#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.232.08:00:29.56#ibcon#about to clear, iclass 5 cls_cnt 0 2006.232.08:00:29.56#ibcon#cleared, iclass 5 cls_cnt 0 2006.232.08:00:29.56$vc4f8/valo=6,772.99 2006.232.08:00:29.56#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.232.08:00:29.56#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.232.08:00:29.56#ibcon#ireg 17 cls_cnt 0 2006.232.08:00:29.56#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.232.08:00:29.56#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.232.08:00:29.56#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.232.08:00:29.56#ibcon#enter wrdev, iclass 7, count 0 2006.232.08:00:29.56#ibcon#first serial, iclass 7, count 0 2006.232.08:00:29.56#ibcon#enter sib2, iclass 7, count 0 2006.232.08:00:29.56#ibcon#flushed, iclass 7, count 0 2006.232.08:00:29.56#ibcon#about to write, iclass 7, count 0 2006.232.08:00:29.56#ibcon#wrote, iclass 7, count 0 2006.232.08:00:29.56#ibcon#about to read 3, iclass 7, count 0 2006.232.08:00:29.58#ibcon#read 3, iclass 7, count 0 2006.232.08:00:29.58#ibcon#about to read 4, iclass 7, count 0 2006.232.08:00:29.58#ibcon#read 4, iclass 7, count 0 2006.232.08:00:29.58#ibcon#about to read 5, iclass 7, count 0 2006.232.08:00:29.58#ibcon#read 5, iclass 7, count 0 2006.232.08:00:29.58#ibcon#about to read 6, iclass 7, count 0 2006.232.08:00:29.58#ibcon#read 6, iclass 7, count 0 2006.232.08:00:29.58#ibcon#end of sib2, iclass 7, count 0 2006.232.08:00:29.58#ibcon#*mode == 0, iclass 7, count 0 2006.232.08:00:29.58#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.232.08:00:29.58#ibcon#[26=FRQ=06,772.99\r\n] 2006.232.08:00:29.58#ibcon#*before write, iclass 7, count 0 2006.232.08:00:29.58#ibcon#enter sib2, iclass 7, count 0 2006.232.08:00:29.58#ibcon#flushed, iclass 7, count 0 2006.232.08:00:29.58#ibcon#about to write, iclass 7, count 0 2006.232.08:00:29.58#ibcon#wrote, iclass 7, count 0 2006.232.08:00:29.58#ibcon#about to read 3, iclass 7, count 0 2006.232.08:00:29.62#ibcon#read 3, iclass 7, count 0 2006.232.08:00:29.62#ibcon#about to read 4, iclass 7, count 0 2006.232.08:00:29.62#ibcon#read 4, iclass 7, count 0 2006.232.08:00:29.62#ibcon#about to read 5, iclass 7, count 0 2006.232.08:00:29.62#ibcon#read 5, iclass 7, count 0 2006.232.08:00:29.62#ibcon#about to read 6, iclass 7, count 0 2006.232.08:00:29.62#ibcon#read 6, iclass 7, count 0 2006.232.08:00:29.62#ibcon#end of sib2, iclass 7, count 0 2006.232.08:00:29.62#ibcon#*after write, iclass 7, count 0 2006.232.08:00:29.62#ibcon#*before return 0, iclass 7, count 0 2006.232.08:00:29.62#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.232.08:00:29.62#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.232.08:00:29.62#ibcon#about to clear, iclass 7 cls_cnt 0 2006.232.08:00:29.62#ibcon#cleared, iclass 7 cls_cnt 0 2006.232.08:00:29.62$vc4f8/va=6,6 2006.232.08:00:29.62#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.232.08:00:29.62#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.232.08:00:29.62#ibcon#ireg 11 cls_cnt 2 2006.232.08:00:29.62#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.232.08:00:29.68#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.232.08:00:29.68#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.232.08:00:29.68#ibcon#enter wrdev, iclass 11, count 2 2006.232.08:00:29.68#ibcon#first serial, iclass 11, count 2 2006.232.08:00:29.68#ibcon#enter sib2, iclass 11, count 2 2006.232.08:00:29.68#ibcon#flushed, iclass 11, count 2 2006.232.08:00:29.68#ibcon#about to write, iclass 11, count 2 2006.232.08:00:29.68#ibcon#wrote, iclass 11, count 2 2006.232.08:00:29.68#ibcon#about to read 3, iclass 11, count 2 2006.232.08:00:29.70#ibcon#read 3, iclass 11, count 2 2006.232.08:00:29.70#ibcon#about to read 4, iclass 11, count 2 2006.232.08:00:29.70#ibcon#read 4, iclass 11, count 2 2006.232.08:00:29.70#ibcon#about to read 5, iclass 11, count 2 2006.232.08:00:29.70#ibcon#read 5, iclass 11, count 2 2006.232.08:00:29.70#ibcon#about to read 6, iclass 11, count 2 2006.232.08:00:29.70#ibcon#read 6, iclass 11, count 2 2006.232.08:00:29.70#ibcon#end of sib2, iclass 11, count 2 2006.232.08:00:29.70#ibcon#*mode == 0, iclass 11, count 2 2006.232.08:00:29.70#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.232.08:00:29.70#ibcon#[25=AT06-06\r\n] 2006.232.08:00:29.70#ibcon#*before write, iclass 11, count 2 2006.232.08:00:29.70#ibcon#enter sib2, iclass 11, count 2 2006.232.08:00:29.70#ibcon#flushed, iclass 11, count 2 2006.232.08:00:29.70#ibcon#about to write, iclass 11, count 2 2006.232.08:00:29.70#ibcon#wrote, iclass 11, count 2 2006.232.08:00:29.70#ibcon#about to read 3, iclass 11, count 2 2006.232.08:00:29.73#ibcon#read 3, iclass 11, count 2 2006.232.08:00:29.73#ibcon#about to read 4, iclass 11, count 2 2006.232.08:00:29.73#ibcon#read 4, iclass 11, count 2 2006.232.08:00:29.73#ibcon#about to read 5, iclass 11, count 2 2006.232.08:00:29.73#ibcon#read 5, iclass 11, count 2 2006.232.08:00:29.73#ibcon#about to read 6, iclass 11, count 2 2006.232.08:00:29.73#ibcon#read 6, iclass 11, count 2 2006.232.08:00:29.73#ibcon#end of sib2, iclass 11, count 2 2006.232.08:00:29.73#ibcon#*after write, iclass 11, count 2 2006.232.08:00:29.73#ibcon#*before return 0, iclass 11, count 2 2006.232.08:00:29.73#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.232.08:00:29.73#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.232.08:00:29.73#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.232.08:00:29.73#ibcon#ireg 7 cls_cnt 0 2006.232.08:00:29.73#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.232.08:00:29.85#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.232.08:00:29.85#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.232.08:00:29.85#ibcon#enter wrdev, iclass 11, count 0 2006.232.08:00:29.85#ibcon#first serial, iclass 11, count 0 2006.232.08:00:29.85#ibcon#enter sib2, iclass 11, count 0 2006.232.08:00:29.85#ibcon#flushed, iclass 11, count 0 2006.232.08:00:29.85#ibcon#about to write, iclass 11, count 0 2006.232.08:00:29.85#ibcon#wrote, iclass 11, count 0 2006.232.08:00:29.85#ibcon#about to read 3, iclass 11, count 0 2006.232.08:00:29.87#ibcon#read 3, iclass 11, count 0 2006.232.08:00:29.87#ibcon#about to read 4, iclass 11, count 0 2006.232.08:00:29.87#ibcon#read 4, iclass 11, count 0 2006.232.08:00:29.87#ibcon#about to read 5, iclass 11, count 0 2006.232.08:00:29.87#ibcon#read 5, iclass 11, count 0 2006.232.08:00:29.87#ibcon#about to read 6, iclass 11, count 0 2006.232.08:00:29.87#ibcon#read 6, iclass 11, count 0 2006.232.08:00:29.87#ibcon#end of sib2, iclass 11, count 0 2006.232.08:00:29.87#ibcon#*mode == 0, iclass 11, count 0 2006.232.08:00:29.87#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.232.08:00:29.87#ibcon#[25=USB\r\n] 2006.232.08:00:29.87#ibcon#*before write, iclass 11, count 0 2006.232.08:00:29.87#ibcon#enter sib2, iclass 11, count 0 2006.232.08:00:29.87#ibcon#flushed, iclass 11, count 0 2006.232.08:00:29.87#ibcon#about to write, iclass 11, count 0 2006.232.08:00:29.87#ibcon#wrote, iclass 11, count 0 2006.232.08:00:29.87#ibcon#about to read 3, iclass 11, count 0 2006.232.08:00:29.90#ibcon#read 3, iclass 11, count 0 2006.232.08:00:29.90#ibcon#about to read 4, iclass 11, count 0 2006.232.08:00:29.90#ibcon#read 4, iclass 11, count 0 2006.232.08:00:29.90#ibcon#about to read 5, iclass 11, count 0 2006.232.08:00:29.90#ibcon#read 5, iclass 11, count 0 2006.232.08:00:29.90#ibcon#about to read 6, iclass 11, count 0 2006.232.08:00:29.90#ibcon#read 6, iclass 11, count 0 2006.232.08:00:29.90#ibcon#end of sib2, iclass 11, count 0 2006.232.08:00:29.90#ibcon#*after write, iclass 11, count 0 2006.232.08:00:29.90#ibcon#*before return 0, iclass 11, count 0 2006.232.08:00:29.90#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.232.08:00:29.90#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.232.08:00:29.90#ibcon#about to clear, iclass 11 cls_cnt 0 2006.232.08:00:29.90#ibcon#cleared, iclass 11 cls_cnt 0 2006.232.08:00:29.90$vc4f8/valo=7,832.99 2006.232.08:00:29.90#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.232.08:00:29.90#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.232.08:00:29.90#ibcon#ireg 17 cls_cnt 0 2006.232.08:00:29.90#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.232.08:00:29.90#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.232.08:00:29.90#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.232.08:00:29.90#ibcon#enter wrdev, iclass 13, count 0 2006.232.08:00:29.90#ibcon#first serial, iclass 13, count 0 2006.232.08:00:29.90#ibcon#enter sib2, iclass 13, count 0 2006.232.08:00:29.90#ibcon#flushed, iclass 13, count 0 2006.232.08:00:29.90#ibcon#about to write, iclass 13, count 0 2006.232.08:00:29.90#ibcon#wrote, iclass 13, count 0 2006.232.08:00:29.90#ibcon#about to read 3, iclass 13, count 0 2006.232.08:00:29.92#ibcon#read 3, iclass 13, count 0 2006.232.08:00:29.92#ibcon#about to read 4, iclass 13, count 0 2006.232.08:00:29.92#ibcon#read 4, iclass 13, count 0 2006.232.08:00:29.92#ibcon#about to read 5, iclass 13, count 0 2006.232.08:00:29.92#ibcon#read 5, iclass 13, count 0 2006.232.08:00:29.92#ibcon#about to read 6, iclass 13, count 0 2006.232.08:00:29.92#ibcon#read 6, iclass 13, count 0 2006.232.08:00:29.92#ibcon#end of sib2, iclass 13, count 0 2006.232.08:00:29.92#ibcon#*mode == 0, iclass 13, count 0 2006.232.08:00:29.92#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.232.08:00:29.92#ibcon#[26=FRQ=07,832.99\r\n] 2006.232.08:00:29.92#ibcon#*before write, iclass 13, count 0 2006.232.08:00:29.92#ibcon#enter sib2, iclass 13, count 0 2006.232.08:00:29.92#ibcon#flushed, iclass 13, count 0 2006.232.08:00:29.92#ibcon#about to write, iclass 13, count 0 2006.232.08:00:29.92#ibcon#wrote, iclass 13, count 0 2006.232.08:00:29.92#ibcon#about to read 3, iclass 13, count 0 2006.232.08:00:29.96#ibcon#read 3, iclass 13, count 0 2006.232.08:00:29.96#ibcon#about to read 4, iclass 13, count 0 2006.232.08:00:29.96#ibcon#read 4, iclass 13, count 0 2006.232.08:00:29.96#ibcon#about to read 5, iclass 13, count 0 2006.232.08:00:29.96#ibcon#read 5, iclass 13, count 0 2006.232.08:00:29.96#ibcon#about to read 6, iclass 13, count 0 2006.232.08:00:29.96#ibcon#read 6, iclass 13, count 0 2006.232.08:00:29.96#ibcon#end of sib2, iclass 13, count 0 2006.232.08:00:29.96#ibcon#*after write, iclass 13, count 0 2006.232.08:00:29.96#ibcon#*before return 0, iclass 13, count 0 2006.232.08:00:29.96#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.232.08:00:29.96#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.232.08:00:29.96#ibcon#about to clear, iclass 13 cls_cnt 0 2006.232.08:00:29.96#ibcon#cleared, iclass 13 cls_cnt 0 2006.232.08:00:29.96$vc4f8/va=7,6 2006.232.08:00:29.96#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.232.08:00:29.96#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.232.08:00:29.96#ibcon#ireg 11 cls_cnt 2 2006.232.08:00:29.96#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.232.08:00:30.02#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.232.08:00:30.02#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.232.08:00:30.02#ibcon#enter wrdev, iclass 15, count 2 2006.232.08:00:30.02#ibcon#first serial, iclass 15, count 2 2006.232.08:00:30.02#ibcon#enter sib2, iclass 15, count 2 2006.232.08:00:30.02#ibcon#flushed, iclass 15, count 2 2006.232.08:00:30.02#ibcon#about to write, iclass 15, count 2 2006.232.08:00:30.02#ibcon#wrote, iclass 15, count 2 2006.232.08:00:30.02#ibcon#about to read 3, iclass 15, count 2 2006.232.08:00:30.04#ibcon#read 3, iclass 15, count 2 2006.232.08:00:30.04#ibcon#about to read 4, iclass 15, count 2 2006.232.08:00:30.04#ibcon#read 4, iclass 15, count 2 2006.232.08:00:30.04#ibcon#about to read 5, iclass 15, count 2 2006.232.08:00:30.04#ibcon#read 5, iclass 15, count 2 2006.232.08:00:30.04#ibcon#about to read 6, iclass 15, count 2 2006.232.08:00:30.04#ibcon#read 6, iclass 15, count 2 2006.232.08:00:30.04#ibcon#end of sib2, iclass 15, count 2 2006.232.08:00:30.04#ibcon#*mode == 0, iclass 15, count 2 2006.232.08:00:30.04#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.232.08:00:30.04#ibcon#[25=AT07-06\r\n] 2006.232.08:00:30.04#ibcon#*before write, iclass 15, count 2 2006.232.08:00:30.04#ibcon#enter sib2, iclass 15, count 2 2006.232.08:00:30.04#ibcon#flushed, iclass 15, count 2 2006.232.08:00:30.04#ibcon#about to write, iclass 15, count 2 2006.232.08:00:30.04#ibcon#wrote, iclass 15, count 2 2006.232.08:00:30.04#ibcon#about to read 3, iclass 15, count 2 2006.232.08:00:30.07#ibcon#read 3, iclass 15, count 2 2006.232.08:00:30.07#ibcon#about to read 4, iclass 15, count 2 2006.232.08:00:30.07#ibcon#read 4, iclass 15, count 2 2006.232.08:00:30.07#ibcon#about to read 5, iclass 15, count 2 2006.232.08:00:30.07#ibcon#read 5, iclass 15, count 2 2006.232.08:00:30.07#ibcon#about to read 6, iclass 15, count 2 2006.232.08:00:30.07#ibcon#read 6, iclass 15, count 2 2006.232.08:00:30.07#ibcon#end of sib2, iclass 15, count 2 2006.232.08:00:30.07#ibcon#*after write, iclass 15, count 2 2006.232.08:00:30.07#ibcon#*before return 0, iclass 15, count 2 2006.232.08:00:30.07#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.232.08:00:30.07#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.232.08:00:30.07#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.232.08:00:30.07#ibcon#ireg 7 cls_cnt 0 2006.232.08:00:30.07#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.232.08:00:30.19#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.232.08:00:30.19#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.232.08:00:30.19#ibcon#enter wrdev, iclass 15, count 0 2006.232.08:00:30.19#ibcon#first serial, iclass 15, count 0 2006.232.08:00:30.19#ibcon#enter sib2, iclass 15, count 0 2006.232.08:00:30.19#ibcon#flushed, iclass 15, count 0 2006.232.08:00:30.19#ibcon#about to write, iclass 15, count 0 2006.232.08:00:30.19#ibcon#wrote, iclass 15, count 0 2006.232.08:00:30.19#ibcon#about to read 3, iclass 15, count 0 2006.232.08:00:30.21#ibcon#read 3, iclass 15, count 0 2006.232.08:00:30.21#ibcon#about to read 4, iclass 15, count 0 2006.232.08:00:30.21#ibcon#read 4, iclass 15, count 0 2006.232.08:00:30.21#ibcon#about to read 5, iclass 15, count 0 2006.232.08:00:30.21#ibcon#read 5, iclass 15, count 0 2006.232.08:00:30.21#ibcon#about to read 6, iclass 15, count 0 2006.232.08:00:30.21#ibcon#read 6, iclass 15, count 0 2006.232.08:00:30.21#ibcon#end of sib2, iclass 15, count 0 2006.232.08:00:30.21#ibcon#*mode == 0, iclass 15, count 0 2006.232.08:00:30.21#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.232.08:00:30.21#ibcon#[25=USB\r\n] 2006.232.08:00:30.21#ibcon#*before write, iclass 15, count 0 2006.232.08:00:30.21#ibcon#enter sib2, iclass 15, count 0 2006.232.08:00:30.21#ibcon#flushed, iclass 15, count 0 2006.232.08:00:30.21#ibcon#about to write, iclass 15, count 0 2006.232.08:00:30.21#ibcon#wrote, iclass 15, count 0 2006.232.08:00:30.21#ibcon#about to read 3, iclass 15, count 0 2006.232.08:00:30.24#ibcon#read 3, iclass 15, count 0 2006.232.08:00:30.24#ibcon#about to read 4, iclass 15, count 0 2006.232.08:00:30.24#ibcon#read 4, iclass 15, count 0 2006.232.08:00:30.24#ibcon#about to read 5, iclass 15, count 0 2006.232.08:00:30.24#ibcon#read 5, iclass 15, count 0 2006.232.08:00:30.24#ibcon#about to read 6, iclass 15, count 0 2006.232.08:00:30.24#ibcon#read 6, iclass 15, count 0 2006.232.08:00:30.24#ibcon#end of sib2, iclass 15, count 0 2006.232.08:00:30.24#ibcon#*after write, iclass 15, count 0 2006.232.08:00:30.24#ibcon#*before return 0, iclass 15, count 0 2006.232.08:00:30.24#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.232.08:00:30.24#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.232.08:00:30.24#ibcon#about to clear, iclass 15 cls_cnt 0 2006.232.08:00:30.24#ibcon#cleared, iclass 15 cls_cnt 0 2006.232.08:00:30.24$vc4f8/valo=8,852.99 2006.232.08:00:30.24#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.232.08:00:30.24#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.232.08:00:30.24#ibcon#ireg 17 cls_cnt 0 2006.232.08:00:30.24#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.232.08:00:30.24#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.232.08:00:30.24#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.232.08:00:30.24#ibcon#enter wrdev, iclass 17, count 0 2006.232.08:00:30.24#ibcon#first serial, iclass 17, count 0 2006.232.08:00:30.24#ibcon#enter sib2, iclass 17, count 0 2006.232.08:00:30.24#ibcon#flushed, iclass 17, count 0 2006.232.08:00:30.24#ibcon#about to write, iclass 17, count 0 2006.232.08:00:30.24#ibcon#wrote, iclass 17, count 0 2006.232.08:00:30.24#ibcon#about to read 3, iclass 17, count 0 2006.232.08:00:30.26#ibcon#read 3, iclass 17, count 0 2006.232.08:00:30.26#ibcon#about to read 4, iclass 17, count 0 2006.232.08:00:30.26#ibcon#read 4, iclass 17, count 0 2006.232.08:00:30.26#ibcon#about to read 5, iclass 17, count 0 2006.232.08:00:30.26#ibcon#read 5, iclass 17, count 0 2006.232.08:00:30.26#ibcon#about to read 6, iclass 17, count 0 2006.232.08:00:30.26#ibcon#read 6, iclass 17, count 0 2006.232.08:00:30.26#ibcon#end of sib2, iclass 17, count 0 2006.232.08:00:30.26#ibcon#*mode == 0, iclass 17, count 0 2006.232.08:00:30.26#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.232.08:00:30.26#ibcon#[26=FRQ=08,852.99\r\n] 2006.232.08:00:30.26#ibcon#*before write, iclass 17, count 0 2006.232.08:00:30.26#ibcon#enter sib2, iclass 17, count 0 2006.232.08:00:30.26#ibcon#flushed, iclass 17, count 0 2006.232.08:00:30.26#ibcon#about to write, iclass 17, count 0 2006.232.08:00:30.26#ibcon#wrote, iclass 17, count 0 2006.232.08:00:30.26#ibcon#about to read 3, iclass 17, count 0 2006.232.08:00:30.30#ibcon#read 3, iclass 17, count 0 2006.232.08:00:30.30#ibcon#about to read 4, iclass 17, count 0 2006.232.08:00:30.30#ibcon#read 4, iclass 17, count 0 2006.232.08:00:30.30#ibcon#about to read 5, iclass 17, count 0 2006.232.08:00:30.30#ibcon#read 5, iclass 17, count 0 2006.232.08:00:30.30#ibcon#about to read 6, iclass 17, count 0 2006.232.08:00:30.30#ibcon#read 6, iclass 17, count 0 2006.232.08:00:30.30#ibcon#end of sib2, iclass 17, count 0 2006.232.08:00:30.30#ibcon#*after write, iclass 17, count 0 2006.232.08:00:30.30#ibcon#*before return 0, iclass 17, count 0 2006.232.08:00:30.30#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.232.08:00:30.30#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.232.08:00:30.30#ibcon#about to clear, iclass 17 cls_cnt 0 2006.232.08:00:30.30#ibcon#cleared, iclass 17 cls_cnt 0 2006.232.08:00:30.30$vc4f8/va=8,6 2006.232.08:00:30.30#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.232.08:00:30.30#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.232.08:00:30.30#ibcon#ireg 11 cls_cnt 2 2006.232.08:00:30.30#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.232.08:00:30.36#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.232.08:00:30.36#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.232.08:00:30.36#ibcon#enter wrdev, iclass 19, count 2 2006.232.08:00:30.36#ibcon#first serial, iclass 19, count 2 2006.232.08:00:30.36#ibcon#enter sib2, iclass 19, count 2 2006.232.08:00:30.36#ibcon#flushed, iclass 19, count 2 2006.232.08:00:30.36#ibcon#about to write, iclass 19, count 2 2006.232.08:00:30.36#ibcon#wrote, iclass 19, count 2 2006.232.08:00:30.36#ibcon#about to read 3, iclass 19, count 2 2006.232.08:00:30.38#ibcon#read 3, iclass 19, count 2 2006.232.08:00:30.38#ibcon#about to read 4, iclass 19, count 2 2006.232.08:00:30.38#ibcon#read 4, iclass 19, count 2 2006.232.08:00:30.38#ibcon#about to read 5, iclass 19, count 2 2006.232.08:00:30.38#ibcon#read 5, iclass 19, count 2 2006.232.08:00:30.38#ibcon#about to read 6, iclass 19, count 2 2006.232.08:00:30.38#ibcon#read 6, iclass 19, count 2 2006.232.08:00:30.38#ibcon#end of sib2, iclass 19, count 2 2006.232.08:00:30.38#ibcon#*mode == 0, iclass 19, count 2 2006.232.08:00:30.38#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.232.08:00:30.38#ibcon#[25=AT08-06\r\n] 2006.232.08:00:30.38#ibcon#*before write, iclass 19, count 2 2006.232.08:00:30.38#ibcon#enter sib2, iclass 19, count 2 2006.232.08:00:30.38#ibcon#flushed, iclass 19, count 2 2006.232.08:00:30.38#ibcon#about to write, iclass 19, count 2 2006.232.08:00:30.38#ibcon#wrote, iclass 19, count 2 2006.232.08:00:30.38#ibcon#about to read 3, iclass 19, count 2 2006.232.08:00:30.41#ibcon#read 3, iclass 19, count 2 2006.232.08:00:30.41#ibcon#about to read 4, iclass 19, count 2 2006.232.08:00:30.41#ibcon#read 4, iclass 19, count 2 2006.232.08:00:30.41#ibcon#about to read 5, iclass 19, count 2 2006.232.08:00:30.41#ibcon#read 5, iclass 19, count 2 2006.232.08:00:30.41#ibcon#about to read 6, iclass 19, count 2 2006.232.08:00:30.41#ibcon#read 6, iclass 19, count 2 2006.232.08:00:30.41#ibcon#end of sib2, iclass 19, count 2 2006.232.08:00:30.41#ibcon#*after write, iclass 19, count 2 2006.232.08:00:30.41#ibcon#*before return 0, iclass 19, count 2 2006.232.08:00:30.41#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.232.08:00:30.41#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.232.08:00:30.41#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.232.08:00:30.41#ibcon#ireg 7 cls_cnt 0 2006.232.08:00:30.41#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.232.08:00:30.53#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.232.08:00:30.53#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.232.08:00:30.53#ibcon#enter wrdev, iclass 19, count 0 2006.232.08:00:30.53#ibcon#first serial, iclass 19, count 0 2006.232.08:00:30.53#ibcon#enter sib2, iclass 19, count 0 2006.232.08:00:30.53#ibcon#flushed, iclass 19, count 0 2006.232.08:00:30.53#ibcon#about to write, iclass 19, count 0 2006.232.08:00:30.53#ibcon#wrote, iclass 19, count 0 2006.232.08:00:30.53#ibcon#about to read 3, iclass 19, count 0 2006.232.08:00:30.55#ibcon#read 3, iclass 19, count 0 2006.232.08:00:30.55#ibcon#about to read 4, iclass 19, count 0 2006.232.08:00:30.55#ibcon#read 4, iclass 19, count 0 2006.232.08:00:30.55#ibcon#about to read 5, iclass 19, count 0 2006.232.08:00:30.55#ibcon#read 5, iclass 19, count 0 2006.232.08:00:30.55#ibcon#about to read 6, iclass 19, count 0 2006.232.08:00:30.55#ibcon#read 6, iclass 19, count 0 2006.232.08:00:30.55#ibcon#end of sib2, iclass 19, count 0 2006.232.08:00:30.55#ibcon#*mode == 0, iclass 19, count 0 2006.232.08:00:30.55#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.232.08:00:30.55#ibcon#[25=USB\r\n] 2006.232.08:00:30.55#ibcon#*before write, iclass 19, count 0 2006.232.08:00:30.55#ibcon#enter sib2, iclass 19, count 0 2006.232.08:00:30.55#ibcon#flushed, iclass 19, count 0 2006.232.08:00:30.55#ibcon#about to write, iclass 19, count 0 2006.232.08:00:30.55#ibcon#wrote, iclass 19, count 0 2006.232.08:00:30.55#ibcon#about to read 3, iclass 19, count 0 2006.232.08:00:30.59#ibcon#read 3, iclass 19, count 0 2006.232.08:00:30.59#ibcon#about to read 4, iclass 19, count 0 2006.232.08:00:30.59#ibcon#read 4, iclass 19, count 0 2006.232.08:00:30.59#ibcon#about to read 5, iclass 19, count 0 2006.232.08:00:30.59#ibcon#read 5, iclass 19, count 0 2006.232.08:00:30.59#ibcon#about to read 6, iclass 19, count 0 2006.232.08:00:30.59#ibcon#read 6, iclass 19, count 0 2006.232.08:00:30.59#ibcon#end of sib2, iclass 19, count 0 2006.232.08:00:30.59#ibcon#*after write, iclass 19, count 0 2006.232.08:00:30.59#ibcon#*before return 0, iclass 19, count 0 2006.232.08:00:30.59#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.232.08:00:30.59#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.232.08:00:30.59#ibcon#about to clear, iclass 19 cls_cnt 0 2006.232.08:00:30.59#ibcon#cleared, iclass 19 cls_cnt 0 2006.232.08:00:30.59$vc4f8/vblo=1,632.99 2006.232.08:00:30.59#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.232.08:00:30.59#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.232.08:00:30.59#ibcon#ireg 17 cls_cnt 0 2006.232.08:00:30.59#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.232.08:00:30.59#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.232.08:00:30.59#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.232.08:00:30.59#ibcon#enter wrdev, iclass 21, count 0 2006.232.08:00:30.59#ibcon#first serial, iclass 21, count 0 2006.232.08:00:30.59#ibcon#enter sib2, iclass 21, count 0 2006.232.08:00:30.59#ibcon#flushed, iclass 21, count 0 2006.232.08:00:30.59#ibcon#about to write, iclass 21, count 0 2006.232.08:00:30.59#ibcon#wrote, iclass 21, count 0 2006.232.08:00:30.59#ibcon#about to read 3, iclass 21, count 0 2006.232.08:00:30.61#ibcon#read 3, iclass 21, count 0 2006.232.08:00:30.61#ibcon#about to read 4, iclass 21, count 0 2006.232.08:00:30.61#ibcon#read 4, iclass 21, count 0 2006.232.08:00:30.61#ibcon#about to read 5, iclass 21, count 0 2006.232.08:00:30.61#ibcon#read 5, iclass 21, count 0 2006.232.08:00:30.61#ibcon#about to read 6, iclass 21, count 0 2006.232.08:00:30.61#ibcon#read 6, iclass 21, count 0 2006.232.08:00:30.61#ibcon#end of sib2, iclass 21, count 0 2006.232.08:00:30.61#ibcon#*mode == 0, iclass 21, count 0 2006.232.08:00:30.61#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.232.08:00:30.61#ibcon#[28=FRQ=01,632.99\r\n] 2006.232.08:00:30.61#ibcon#*before write, iclass 21, count 0 2006.232.08:00:30.61#ibcon#enter sib2, iclass 21, count 0 2006.232.08:00:30.61#ibcon#flushed, iclass 21, count 0 2006.232.08:00:30.61#ibcon#about to write, iclass 21, count 0 2006.232.08:00:30.61#ibcon#wrote, iclass 21, count 0 2006.232.08:00:30.61#ibcon#about to read 3, iclass 21, count 0 2006.232.08:00:30.65#ibcon#read 3, iclass 21, count 0 2006.232.08:00:30.65#ibcon#about to read 4, iclass 21, count 0 2006.232.08:00:30.65#ibcon#read 4, iclass 21, count 0 2006.232.08:00:30.65#ibcon#about to read 5, iclass 21, count 0 2006.232.08:00:30.65#ibcon#read 5, iclass 21, count 0 2006.232.08:00:30.65#ibcon#about to read 6, iclass 21, count 0 2006.232.08:00:30.65#ibcon#read 6, iclass 21, count 0 2006.232.08:00:30.65#ibcon#end of sib2, iclass 21, count 0 2006.232.08:00:30.65#ibcon#*after write, iclass 21, count 0 2006.232.08:00:30.65#ibcon#*before return 0, iclass 21, count 0 2006.232.08:00:30.65#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.232.08:00:30.65#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.232.08:00:30.65#ibcon#about to clear, iclass 21 cls_cnt 0 2006.232.08:00:30.65#ibcon#cleared, iclass 21 cls_cnt 0 2006.232.08:00:30.65$vc4f8/vb=1,4 2006.232.08:00:30.65#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.232.08:00:30.65#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.232.08:00:30.65#ibcon#ireg 11 cls_cnt 2 2006.232.08:00:30.65#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.232.08:00:30.65#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.232.08:00:30.65#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.232.08:00:30.65#ibcon#enter wrdev, iclass 23, count 2 2006.232.08:00:30.65#ibcon#first serial, iclass 23, count 2 2006.232.08:00:30.65#ibcon#enter sib2, iclass 23, count 2 2006.232.08:00:30.65#ibcon#flushed, iclass 23, count 2 2006.232.08:00:30.65#ibcon#about to write, iclass 23, count 2 2006.232.08:00:30.65#ibcon#wrote, iclass 23, count 2 2006.232.08:00:30.65#ibcon#about to read 3, iclass 23, count 2 2006.232.08:00:30.67#ibcon#read 3, iclass 23, count 2 2006.232.08:00:30.67#ibcon#about to read 4, iclass 23, count 2 2006.232.08:00:30.67#ibcon#read 4, iclass 23, count 2 2006.232.08:00:30.67#ibcon#about to read 5, iclass 23, count 2 2006.232.08:00:30.67#ibcon#read 5, iclass 23, count 2 2006.232.08:00:30.67#ibcon#about to read 6, iclass 23, count 2 2006.232.08:00:30.67#ibcon#read 6, iclass 23, count 2 2006.232.08:00:30.67#ibcon#end of sib2, iclass 23, count 2 2006.232.08:00:30.67#ibcon#*mode == 0, iclass 23, count 2 2006.232.08:00:30.67#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.232.08:00:30.67#ibcon#[27=AT01-04\r\n] 2006.232.08:00:30.67#ibcon#*before write, iclass 23, count 2 2006.232.08:00:30.67#ibcon#enter sib2, iclass 23, count 2 2006.232.08:00:30.67#ibcon#flushed, iclass 23, count 2 2006.232.08:00:30.67#ibcon#about to write, iclass 23, count 2 2006.232.08:00:30.67#ibcon#wrote, iclass 23, count 2 2006.232.08:00:30.67#ibcon#about to read 3, iclass 23, count 2 2006.232.08:00:30.70#ibcon#read 3, iclass 23, count 2 2006.232.08:00:30.70#ibcon#about to read 4, iclass 23, count 2 2006.232.08:00:30.70#ibcon#read 4, iclass 23, count 2 2006.232.08:00:30.70#ibcon#about to read 5, iclass 23, count 2 2006.232.08:00:30.70#ibcon#read 5, iclass 23, count 2 2006.232.08:00:30.70#ibcon#about to read 6, iclass 23, count 2 2006.232.08:00:30.70#ibcon#read 6, iclass 23, count 2 2006.232.08:00:30.70#ibcon#end of sib2, iclass 23, count 2 2006.232.08:00:30.70#ibcon#*after write, iclass 23, count 2 2006.232.08:00:30.70#ibcon#*before return 0, iclass 23, count 2 2006.232.08:00:30.70#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.232.08:00:30.70#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.232.08:00:30.70#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.232.08:00:30.70#ibcon#ireg 7 cls_cnt 0 2006.232.08:00:30.70#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.232.08:00:30.82#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.232.08:00:30.82#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.232.08:00:30.82#ibcon#enter wrdev, iclass 23, count 0 2006.232.08:00:30.82#ibcon#first serial, iclass 23, count 0 2006.232.08:00:30.82#ibcon#enter sib2, iclass 23, count 0 2006.232.08:00:30.82#ibcon#flushed, iclass 23, count 0 2006.232.08:00:30.82#ibcon#about to write, iclass 23, count 0 2006.232.08:00:30.82#ibcon#wrote, iclass 23, count 0 2006.232.08:00:30.82#ibcon#about to read 3, iclass 23, count 0 2006.232.08:00:30.84#ibcon#read 3, iclass 23, count 0 2006.232.08:00:30.84#ibcon#about to read 4, iclass 23, count 0 2006.232.08:00:30.84#ibcon#read 4, iclass 23, count 0 2006.232.08:00:30.84#ibcon#about to read 5, iclass 23, count 0 2006.232.08:00:30.84#ibcon#read 5, iclass 23, count 0 2006.232.08:00:30.84#ibcon#about to read 6, iclass 23, count 0 2006.232.08:00:30.84#ibcon#read 6, iclass 23, count 0 2006.232.08:00:30.84#ibcon#end of sib2, iclass 23, count 0 2006.232.08:00:30.84#ibcon#*mode == 0, iclass 23, count 0 2006.232.08:00:30.84#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.232.08:00:30.84#ibcon#[27=USB\r\n] 2006.232.08:00:30.84#ibcon#*before write, iclass 23, count 0 2006.232.08:00:30.84#ibcon#enter sib2, iclass 23, count 0 2006.232.08:00:30.84#ibcon#flushed, iclass 23, count 0 2006.232.08:00:30.84#ibcon#about to write, iclass 23, count 0 2006.232.08:00:30.84#ibcon#wrote, iclass 23, count 0 2006.232.08:00:30.84#ibcon#about to read 3, iclass 23, count 0 2006.232.08:00:30.87#ibcon#read 3, iclass 23, count 0 2006.232.08:00:30.87#ibcon#about to read 4, iclass 23, count 0 2006.232.08:00:30.87#ibcon#read 4, iclass 23, count 0 2006.232.08:00:30.87#ibcon#about to read 5, iclass 23, count 0 2006.232.08:00:30.87#ibcon#read 5, iclass 23, count 0 2006.232.08:00:30.87#ibcon#about to read 6, iclass 23, count 0 2006.232.08:00:30.87#ibcon#read 6, iclass 23, count 0 2006.232.08:00:30.87#ibcon#end of sib2, iclass 23, count 0 2006.232.08:00:30.87#ibcon#*after write, iclass 23, count 0 2006.232.08:00:30.87#ibcon#*before return 0, iclass 23, count 0 2006.232.08:00:30.87#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.232.08:00:30.87#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.232.08:00:30.87#ibcon#about to clear, iclass 23 cls_cnt 0 2006.232.08:00:30.87#ibcon#cleared, iclass 23 cls_cnt 0 2006.232.08:00:30.87$vc4f8/vblo=2,640.99 2006.232.08:00:30.87#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.232.08:00:30.87#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.232.08:00:30.87#ibcon#ireg 17 cls_cnt 0 2006.232.08:00:30.87#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:00:30.87#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:00:30.87#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:00:30.87#ibcon#enter wrdev, iclass 25, count 0 2006.232.08:00:30.87#ibcon#first serial, iclass 25, count 0 2006.232.08:00:30.87#ibcon#enter sib2, iclass 25, count 0 2006.232.08:00:30.87#ibcon#flushed, iclass 25, count 0 2006.232.08:00:30.87#ibcon#about to write, iclass 25, count 0 2006.232.08:00:30.87#ibcon#wrote, iclass 25, count 0 2006.232.08:00:30.87#ibcon#about to read 3, iclass 25, count 0 2006.232.08:00:30.89#ibcon#read 3, iclass 25, count 0 2006.232.08:00:30.89#ibcon#about to read 4, iclass 25, count 0 2006.232.08:00:30.89#ibcon#read 4, iclass 25, count 0 2006.232.08:00:30.89#ibcon#about to read 5, iclass 25, count 0 2006.232.08:00:30.89#ibcon#read 5, iclass 25, count 0 2006.232.08:00:30.89#ibcon#about to read 6, iclass 25, count 0 2006.232.08:00:30.89#ibcon#read 6, iclass 25, count 0 2006.232.08:00:30.89#ibcon#end of sib2, iclass 25, count 0 2006.232.08:00:30.89#ibcon#*mode == 0, iclass 25, count 0 2006.232.08:00:30.89#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.232.08:00:30.89#ibcon#[28=FRQ=02,640.99\r\n] 2006.232.08:00:30.89#ibcon#*before write, iclass 25, count 0 2006.232.08:00:30.89#ibcon#enter sib2, iclass 25, count 0 2006.232.08:00:30.89#ibcon#flushed, iclass 25, count 0 2006.232.08:00:30.89#ibcon#about to write, iclass 25, count 0 2006.232.08:00:30.89#ibcon#wrote, iclass 25, count 0 2006.232.08:00:30.89#ibcon#about to read 3, iclass 25, count 0 2006.232.08:00:30.93#ibcon#read 3, iclass 25, count 0 2006.232.08:00:30.93#ibcon#about to read 4, iclass 25, count 0 2006.232.08:00:30.93#ibcon#read 4, iclass 25, count 0 2006.232.08:00:30.93#ibcon#about to read 5, iclass 25, count 0 2006.232.08:00:30.93#ibcon#read 5, iclass 25, count 0 2006.232.08:00:30.93#ibcon#about to read 6, iclass 25, count 0 2006.232.08:00:30.93#ibcon#read 6, iclass 25, count 0 2006.232.08:00:30.93#ibcon#end of sib2, iclass 25, count 0 2006.232.08:00:30.93#ibcon#*after write, iclass 25, count 0 2006.232.08:00:30.93#ibcon#*before return 0, iclass 25, count 0 2006.232.08:00:30.93#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:00:30.93#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:00:30.93#ibcon#about to clear, iclass 25 cls_cnt 0 2006.232.08:00:30.93#ibcon#cleared, iclass 25 cls_cnt 0 2006.232.08:00:30.93$vc4f8/vb=2,4 2006.232.08:00:30.93#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.232.08:00:30.93#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.232.08:00:30.93#ibcon#ireg 11 cls_cnt 2 2006.232.08:00:30.93#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:00:30.99#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:00:30.99#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:00:30.99#ibcon#enter wrdev, iclass 27, count 2 2006.232.08:00:30.99#ibcon#first serial, iclass 27, count 2 2006.232.08:00:30.99#ibcon#enter sib2, iclass 27, count 2 2006.232.08:00:30.99#ibcon#flushed, iclass 27, count 2 2006.232.08:00:30.99#ibcon#about to write, iclass 27, count 2 2006.232.08:00:30.99#ibcon#wrote, iclass 27, count 2 2006.232.08:00:30.99#ibcon#about to read 3, iclass 27, count 2 2006.232.08:00:31.01#ibcon#read 3, iclass 27, count 2 2006.232.08:00:31.01#ibcon#about to read 4, iclass 27, count 2 2006.232.08:00:31.01#ibcon#read 4, iclass 27, count 2 2006.232.08:00:31.01#ibcon#about to read 5, iclass 27, count 2 2006.232.08:00:31.01#ibcon#read 5, iclass 27, count 2 2006.232.08:00:31.01#ibcon#about to read 6, iclass 27, count 2 2006.232.08:00:31.01#ibcon#read 6, iclass 27, count 2 2006.232.08:00:31.01#ibcon#end of sib2, iclass 27, count 2 2006.232.08:00:31.01#ibcon#*mode == 0, iclass 27, count 2 2006.232.08:00:31.01#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.232.08:00:31.01#ibcon#[27=AT02-04\r\n] 2006.232.08:00:31.01#ibcon#*before write, iclass 27, count 2 2006.232.08:00:31.01#ibcon#enter sib2, iclass 27, count 2 2006.232.08:00:31.01#ibcon#flushed, iclass 27, count 2 2006.232.08:00:31.01#ibcon#about to write, iclass 27, count 2 2006.232.08:00:31.01#ibcon#wrote, iclass 27, count 2 2006.232.08:00:31.01#ibcon#about to read 3, iclass 27, count 2 2006.232.08:00:31.04#ibcon#read 3, iclass 27, count 2 2006.232.08:00:31.04#ibcon#about to read 4, iclass 27, count 2 2006.232.08:00:31.04#ibcon#read 4, iclass 27, count 2 2006.232.08:00:31.04#ibcon#about to read 5, iclass 27, count 2 2006.232.08:00:31.04#ibcon#read 5, iclass 27, count 2 2006.232.08:00:31.04#ibcon#about to read 6, iclass 27, count 2 2006.232.08:00:31.04#ibcon#read 6, iclass 27, count 2 2006.232.08:00:31.04#ibcon#end of sib2, iclass 27, count 2 2006.232.08:00:31.04#ibcon#*after write, iclass 27, count 2 2006.232.08:00:31.04#ibcon#*before return 0, iclass 27, count 2 2006.232.08:00:31.04#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:00:31.04#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:00:31.04#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.232.08:00:31.04#ibcon#ireg 7 cls_cnt 0 2006.232.08:00:31.04#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:00:31.16#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:00:31.16#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:00:31.16#ibcon#enter wrdev, iclass 27, count 0 2006.232.08:00:31.16#ibcon#first serial, iclass 27, count 0 2006.232.08:00:31.16#ibcon#enter sib2, iclass 27, count 0 2006.232.08:00:31.16#ibcon#flushed, iclass 27, count 0 2006.232.08:00:31.16#ibcon#about to write, iclass 27, count 0 2006.232.08:00:31.16#ibcon#wrote, iclass 27, count 0 2006.232.08:00:31.16#ibcon#about to read 3, iclass 27, count 0 2006.232.08:00:31.18#ibcon#read 3, iclass 27, count 0 2006.232.08:00:31.18#ibcon#about to read 4, iclass 27, count 0 2006.232.08:00:31.18#ibcon#read 4, iclass 27, count 0 2006.232.08:00:31.18#ibcon#about to read 5, iclass 27, count 0 2006.232.08:00:31.18#ibcon#read 5, iclass 27, count 0 2006.232.08:00:31.18#ibcon#about to read 6, iclass 27, count 0 2006.232.08:00:31.18#ibcon#read 6, iclass 27, count 0 2006.232.08:00:31.18#ibcon#end of sib2, iclass 27, count 0 2006.232.08:00:31.18#ibcon#*mode == 0, iclass 27, count 0 2006.232.08:00:31.18#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.232.08:00:31.18#ibcon#[27=USB\r\n] 2006.232.08:00:31.18#ibcon#*before write, iclass 27, count 0 2006.232.08:00:31.18#ibcon#enter sib2, iclass 27, count 0 2006.232.08:00:31.18#ibcon#flushed, iclass 27, count 0 2006.232.08:00:31.18#ibcon#about to write, iclass 27, count 0 2006.232.08:00:31.18#ibcon#wrote, iclass 27, count 0 2006.232.08:00:31.18#ibcon#about to read 3, iclass 27, count 0 2006.232.08:00:31.21#ibcon#read 3, iclass 27, count 0 2006.232.08:00:31.21#ibcon#about to read 4, iclass 27, count 0 2006.232.08:00:31.21#ibcon#read 4, iclass 27, count 0 2006.232.08:00:31.21#ibcon#about to read 5, iclass 27, count 0 2006.232.08:00:31.21#ibcon#read 5, iclass 27, count 0 2006.232.08:00:31.21#ibcon#about to read 6, iclass 27, count 0 2006.232.08:00:31.21#ibcon#read 6, iclass 27, count 0 2006.232.08:00:31.21#ibcon#end of sib2, iclass 27, count 0 2006.232.08:00:31.21#ibcon#*after write, iclass 27, count 0 2006.232.08:00:31.21#ibcon#*before return 0, iclass 27, count 0 2006.232.08:00:31.21#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:00:31.21#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:00:31.21#ibcon#about to clear, iclass 27 cls_cnt 0 2006.232.08:00:31.21#ibcon#cleared, iclass 27 cls_cnt 0 2006.232.08:00:31.21$vc4f8/vblo=3,656.99 2006.232.08:00:31.21#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.232.08:00:31.21#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.232.08:00:31.21#ibcon#ireg 17 cls_cnt 0 2006.232.08:00:31.21#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:00:31.21#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:00:31.21#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:00:31.21#ibcon#enter wrdev, iclass 29, count 0 2006.232.08:00:31.21#ibcon#first serial, iclass 29, count 0 2006.232.08:00:31.21#ibcon#enter sib2, iclass 29, count 0 2006.232.08:00:31.21#ibcon#flushed, iclass 29, count 0 2006.232.08:00:31.21#ibcon#about to write, iclass 29, count 0 2006.232.08:00:31.21#ibcon#wrote, iclass 29, count 0 2006.232.08:00:31.21#ibcon#about to read 3, iclass 29, count 0 2006.232.08:00:31.23#ibcon#read 3, iclass 29, count 0 2006.232.08:00:31.23#ibcon#about to read 4, iclass 29, count 0 2006.232.08:00:31.23#ibcon#read 4, iclass 29, count 0 2006.232.08:00:31.23#ibcon#about to read 5, iclass 29, count 0 2006.232.08:00:31.23#ibcon#read 5, iclass 29, count 0 2006.232.08:00:31.23#ibcon#about to read 6, iclass 29, count 0 2006.232.08:00:31.23#ibcon#read 6, iclass 29, count 0 2006.232.08:00:31.23#ibcon#end of sib2, iclass 29, count 0 2006.232.08:00:31.23#ibcon#*mode == 0, iclass 29, count 0 2006.232.08:00:31.23#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.232.08:00:31.23#ibcon#[28=FRQ=03,656.99\r\n] 2006.232.08:00:31.23#ibcon#*before write, iclass 29, count 0 2006.232.08:00:31.23#ibcon#enter sib2, iclass 29, count 0 2006.232.08:00:31.23#ibcon#flushed, iclass 29, count 0 2006.232.08:00:31.23#ibcon#about to write, iclass 29, count 0 2006.232.08:00:31.23#ibcon#wrote, iclass 29, count 0 2006.232.08:00:31.23#ibcon#about to read 3, iclass 29, count 0 2006.232.08:00:31.27#ibcon#read 3, iclass 29, count 0 2006.232.08:00:31.27#ibcon#about to read 4, iclass 29, count 0 2006.232.08:00:31.27#ibcon#read 4, iclass 29, count 0 2006.232.08:00:31.27#ibcon#about to read 5, iclass 29, count 0 2006.232.08:00:31.27#ibcon#read 5, iclass 29, count 0 2006.232.08:00:31.27#ibcon#about to read 6, iclass 29, count 0 2006.232.08:00:31.27#ibcon#read 6, iclass 29, count 0 2006.232.08:00:31.27#ibcon#end of sib2, iclass 29, count 0 2006.232.08:00:31.27#ibcon#*after write, iclass 29, count 0 2006.232.08:00:31.27#ibcon#*before return 0, iclass 29, count 0 2006.232.08:00:31.27#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:00:31.27#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:00:31.27#ibcon#about to clear, iclass 29 cls_cnt 0 2006.232.08:00:31.27#ibcon#cleared, iclass 29 cls_cnt 0 2006.232.08:00:31.27$vc4f8/vb=3,4 2006.232.08:00:31.27#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.232.08:00:31.27#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.232.08:00:31.27#ibcon#ireg 11 cls_cnt 2 2006.232.08:00:31.27#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.232.08:00:31.33#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.232.08:00:31.33#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.232.08:00:31.33#ibcon#enter wrdev, iclass 31, count 2 2006.232.08:00:31.33#ibcon#first serial, iclass 31, count 2 2006.232.08:00:31.33#ibcon#enter sib2, iclass 31, count 2 2006.232.08:00:31.33#ibcon#flushed, iclass 31, count 2 2006.232.08:00:31.33#ibcon#about to write, iclass 31, count 2 2006.232.08:00:31.33#ibcon#wrote, iclass 31, count 2 2006.232.08:00:31.33#ibcon#about to read 3, iclass 31, count 2 2006.232.08:00:31.35#ibcon#read 3, iclass 31, count 2 2006.232.08:00:31.35#ibcon#about to read 4, iclass 31, count 2 2006.232.08:00:31.35#ibcon#read 4, iclass 31, count 2 2006.232.08:00:31.35#ibcon#about to read 5, iclass 31, count 2 2006.232.08:00:31.35#ibcon#read 5, iclass 31, count 2 2006.232.08:00:31.35#ibcon#about to read 6, iclass 31, count 2 2006.232.08:00:31.35#ibcon#read 6, iclass 31, count 2 2006.232.08:00:31.35#ibcon#end of sib2, iclass 31, count 2 2006.232.08:00:31.35#ibcon#*mode == 0, iclass 31, count 2 2006.232.08:00:31.35#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.232.08:00:31.35#ibcon#[27=AT03-04\r\n] 2006.232.08:00:31.35#ibcon#*before write, iclass 31, count 2 2006.232.08:00:31.35#ibcon#enter sib2, iclass 31, count 2 2006.232.08:00:31.35#ibcon#flushed, iclass 31, count 2 2006.232.08:00:31.35#ibcon#about to write, iclass 31, count 2 2006.232.08:00:31.35#ibcon#wrote, iclass 31, count 2 2006.232.08:00:31.35#ibcon#about to read 3, iclass 31, count 2 2006.232.08:00:31.38#ibcon#read 3, iclass 31, count 2 2006.232.08:00:31.38#ibcon#about to read 4, iclass 31, count 2 2006.232.08:00:31.38#ibcon#read 4, iclass 31, count 2 2006.232.08:00:31.38#ibcon#about to read 5, iclass 31, count 2 2006.232.08:00:31.38#ibcon#read 5, iclass 31, count 2 2006.232.08:00:31.38#ibcon#about to read 6, iclass 31, count 2 2006.232.08:00:31.38#ibcon#read 6, iclass 31, count 2 2006.232.08:00:31.38#ibcon#end of sib2, iclass 31, count 2 2006.232.08:00:31.38#ibcon#*after write, iclass 31, count 2 2006.232.08:00:31.38#ibcon#*before return 0, iclass 31, count 2 2006.232.08:00:31.38#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.232.08:00:31.38#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.232.08:00:31.38#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.232.08:00:31.38#ibcon#ireg 7 cls_cnt 0 2006.232.08:00:31.38#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.232.08:00:31.50#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.232.08:00:31.50#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.232.08:00:31.50#ibcon#enter wrdev, iclass 31, count 0 2006.232.08:00:31.50#ibcon#first serial, iclass 31, count 0 2006.232.08:00:31.50#ibcon#enter sib2, iclass 31, count 0 2006.232.08:00:31.50#ibcon#flushed, iclass 31, count 0 2006.232.08:00:31.50#ibcon#about to write, iclass 31, count 0 2006.232.08:00:31.50#ibcon#wrote, iclass 31, count 0 2006.232.08:00:31.50#ibcon#about to read 3, iclass 31, count 0 2006.232.08:00:31.52#ibcon#read 3, iclass 31, count 0 2006.232.08:00:31.52#ibcon#about to read 4, iclass 31, count 0 2006.232.08:00:31.52#ibcon#read 4, iclass 31, count 0 2006.232.08:00:31.52#ibcon#about to read 5, iclass 31, count 0 2006.232.08:00:31.52#ibcon#read 5, iclass 31, count 0 2006.232.08:00:31.52#ibcon#about to read 6, iclass 31, count 0 2006.232.08:00:31.52#ibcon#read 6, iclass 31, count 0 2006.232.08:00:31.52#ibcon#end of sib2, iclass 31, count 0 2006.232.08:00:31.52#ibcon#*mode == 0, iclass 31, count 0 2006.232.08:00:31.52#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.232.08:00:31.52#ibcon#[27=USB\r\n] 2006.232.08:00:31.52#ibcon#*before write, iclass 31, count 0 2006.232.08:00:31.52#ibcon#enter sib2, iclass 31, count 0 2006.232.08:00:31.52#ibcon#flushed, iclass 31, count 0 2006.232.08:00:31.52#ibcon#about to write, iclass 31, count 0 2006.232.08:00:31.52#ibcon#wrote, iclass 31, count 0 2006.232.08:00:31.52#ibcon#about to read 3, iclass 31, count 0 2006.232.08:00:31.55#ibcon#read 3, iclass 31, count 0 2006.232.08:00:31.55#ibcon#about to read 4, iclass 31, count 0 2006.232.08:00:31.55#ibcon#read 4, iclass 31, count 0 2006.232.08:00:31.55#ibcon#about to read 5, iclass 31, count 0 2006.232.08:00:31.55#ibcon#read 5, iclass 31, count 0 2006.232.08:00:31.55#ibcon#about to read 6, iclass 31, count 0 2006.232.08:00:31.55#ibcon#read 6, iclass 31, count 0 2006.232.08:00:31.55#ibcon#end of sib2, iclass 31, count 0 2006.232.08:00:31.55#ibcon#*after write, iclass 31, count 0 2006.232.08:00:31.55#ibcon#*before return 0, iclass 31, count 0 2006.232.08:00:31.55#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.232.08:00:31.55#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.232.08:00:31.55#ibcon#about to clear, iclass 31 cls_cnt 0 2006.232.08:00:31.55#ibcon#cleared, iclass 31 cls_cnt 0 2006.232.08:00:31.55$vc4f8/vblo=4,712.99 2006.232.08:00:31.55#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.232.08:00:31.55#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.232.08:00:31.55#ibcon#ireg 17 cls_cnt 0 2006.232.08:00:31.55#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.232.08:00:31.55#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.232.08:00:31.55#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.232.08:00:31.55#ibcon#enter wrdev, iclass 33, count 0 2006.232.08:00:31.55#ibcon#first serial, iclass 33, count 0 2006.232.08:00:31.55#ibcon#enter sib2, iclass 33, count 0 2006.232.08:00:31.55#ibcon#flushed, iclass 33, count 0 2006.232.08:00:31.55#ibcon#about to write, iclass 33, count 0 2006.232.08:00:31.55#ibcon#wrote, iclass 33, count 0 2006.232.08:00:31.55#ibcon#about to read 3, iclass 33, count 0 2006.232.08:00:31.57#ibcon#read 3, iclass 33, count 0 2006.232.08:00:31.57#ibcon#about to read 4, iclass 33, count 0 2006.232.08:00:31.57#ibcon#read 4, iclass 33, count 0 2006.232.08:00:31.57#ibcon#about to read 5, iclass 33, count 0 2006.232.08:00:31.57#ibcon#read 5, iclass 33, count 0 2006.232.08:00:31.57#ibcon#about to read 6, iclass 33, count 0 2006.232.08:00:31.57#ibcon#read 6, iclass 33, count 0 2006.232.08:00:31.57#ibcon#end of sib2, iclass 33, count 0 2006.232.08:00:31.57#ibcon#*mode == 0, iclass 33, count 0 2006.232.08:00:31.57#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.232.08:00:31.57#ibcon#[28=FRQ=04,712.99\r\n] 2006.232.08:00:31.57#ibcon#*before write, iclass 33, count 0 2006.232.08:00:31.57#ibcon#enter sib2, iclass 33, count 0 2006.232.08:00:31.57#ibcon#flushed, iclass 33, count 0 2006.232.08:00:31.57#ibcon#about to write, iclass 33, count 0 2006.232.08:00:31.57#ibcon#wrote, iclass 33, count 0 2006.232.08:00:31.57#ibcon#about to read 3, iclass 33, count 0 2006.232.08:00:31.61#ibcon#read 3, iclass 33, count 0 2006.232.08:00:31.61#ibcon#about to read 4, iclass 33, count 0 2006.232.08:00:31.61#ibcon#read 4, iclass 33, count 0 2006.232.08:00:31.61#ibcon#about to read 5, iclass 33, count 0 2006.232.08:00:31.61#ibcon#read 5, iclass 33, count 0 2006.232.08:00:31.61#ibcon#about to read 6, iclass 33, count 0 2006.232.08:00:31.61#ibcon#read 6, iclass 33, count 0 2006.232.08:00:31.61#ibcon#end of sib2, iclass 33, count 0 2006.232.08:00:31.61#ibcon#*after write, iclass 33, count 0 2006.232.08:00:31.61#ibcon#*before return 0, iclass 33, count 0 2006.232.08:00:31.61#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.232.08:00:31.61#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.232.08:00:31.61#ibcon#about to clear, iclass 33 cls_cnt 0 2006.232.08:00:31.61#ibcon#cleared, iclass 33 cls_cnt 0 2006.232.08:00:31.61$vc4f8/vb=4,4 2006.232.08:00:31.61#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.232.08:00:31.61#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.232.08:00:31.61#ibcon#ireg 11 cls_cnt 2 2006.232.08:00:31.61#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.232.08:00:31.67#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.232.08:00:31.67#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.232.08:00:31.67#ibcon#enter wrdev, iclass 35, count 2 2006.232.08:00:31.67#ibcon#first serial, iclass 35, count 2 2006.232.08:00:31.67#ibcon#enter sib2, iclass 35, count 2 2006.232.08:00:31.67#ibcon#flushed, iclass 35, count 2 2006.232.08:00:31.67#ibcon#about to write, iclass 35, count 2 2006.232.08:00:31.67#ibcon#wrote, iclass 35, count 2 2006.232.08:00:31.67#ibcon#about to read 3, iclass 35, count 2 2006.232.08:00:31.69#ibcon#read 3, iclass 35, count 2 2006.232.08:00:31.69#ibcon#about to read 4, iclass 35, count 2 2006.232.08:00:31.69#ibcon#read 4, iclass 35, count 2 2006.232.08:00:31.69#ibcon#about to read 5, iclass 35, count 2 2006.232.08:00:31.69#ibcon#read 5, iclass 35, count 2 2006.232.08:00:31.69#ibcon#about to read 6, iclass 35, count 2 2006.232.08:00:31.69#ibcon#read 6, iclass 35, count 2 2006.232.08:00:31.69#ibcon#end of sib2, iclass 35, count 2 2006.232.08:00:31.69#ibcon#*mode == 0, iclass 35, count 2 2006.232.08:00:31.69#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.232.08:00:31.69#ibcon#[27=AT04-04\r\n] 2006.232.08:00:31.69#ibcon#*before write, iclass 35, count 2 2006.232.08:00:31.69#ibcon#enter sib2, iclass 35, count 2 2006.232.08:00:31.69#ibcon#flushed, iclass 35, count 2 2006.232.08:00:31.69#ibcon#about to write, iclass 35, count 2 2006.232.08:00:31.69#ibcon#wrote, iclass 35, count 2 2006.232.08:00:31.69#ibcon#about to read 3, iclass 35, count 2 2006.232.08:00:31.72#ibcon#read 3, iclass 35, count 2 2006.232.08:00:31.72#ibcon#about to read 4, iclass 35, count 2 2006.232.08:00:31.72#ibcon#read 4, iclass 35, count 2 2006.232.08:00:31.72#ibcon#about to read 5, iclass 35, count 2 2006.232.08:00:31.72#ibcon#read 5, iclass 35, count 2 2006.232.08:00:31.72#ibcon#about to read 6, iclass 35, count 2 2006.232.08:00:31.72#ibcon#read 6, iclass 35, count 2 2006.232.08:00:31.72#ibcon#end of sib2, iclass 35, count 2 2006.232.08:00:31.72#ibcon#*after write, iclass 35, count 2 2006.232.08:00:31.72#ibcon#*before return 0, iclass 35, count 2 2006.232.08:00:31.72#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.232.08:00:31.72#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.232.08:00:31.72#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.232.08:00:31.72#ibcon#ireg 7 cls_cnt 0 2006.232.08:00:31.72#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.232.08:00:31.84#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.232.08:00:31.84#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.232.08:00:31.84#ibcon#enter wrdev, iclass 35, count 0 2006.232.08:00:31.84#ibcon#first serial, iclass 35, count 0 2006.232.08:00:31.84#ibcon#enter sib2, iclass 35, count 0 2006.232.08:00:31.84#ibcon#flushed, iclass 35, count 0 2006.232.08:00:31.84#ibcon#about to write, iclass 35, count 0 2006.232.08:00:31.84#ibcon#wrote, iclass 35, count 0 2006.232.08:00:31.84#ibcon#about to read 3, iclass 35, count 0 2006.232.08:00:31.86#ibcon#read 3, iclass 35, count 0 2006.232.08:00:31.86#ibcon#about to read 4, iclass 35, count 0 2006.232.08:00:31.86#ibcon#read 4, iclass 35, count 0 2006.232.08:00:31.86#ibcon#about to read 5, iclass 35, count 0 2006.232.08:00:31.86#ibcon#read 5, iclass 35, count 0 2006.232.08:00:31.86#ibcon#about to read 6, iclass 35, count 0 2006.232.08:00:31.86#ibcon#read 6, iclass 35, count 0 2006.232.08:00:31.86#ibcon#end of sib2, iclass 35, count 0 2006.232.08:00:31.86#ibcon#*mode == 0, iclass 35, count 0 2006.232.08:00:31.86#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.232.08:00:31.86#ibcon#[27=USB\r\n] 2006.232.08:00:31.86#ibcon#*before write, iclass 35, count 0 2006.232.08:00:31.86#ibcon#enter sib2, iclass 35, count 0 2006.232.08:00:31.86#ibcon#flushed, iclass 35, count 0 2006.232.08:00:31.86#ibcon#about to write, iclass 35, count 0 2006.232.08:00:31.86#ibcon#wrote, iclass 35, count 0 2006.232.08:00:31.86#ibcon#about to read 3, iclass 35, count 0 2006.232.08:00:31.89#ibcon#read 3, iclass 35, count 0 2006.232.08:00:31.89#ibcon#about to read 4, iclass 35, count 0 2006.232.08:00:31.89#ibcon#read 4, iclass 35, count 0 2006.232.08:00:31.89#ibcon#about to read 5, iclass 35, count 0 2006.232.08:00:31.89#ibcon#read 5, iclass 35, count 0 2006.232.08:00:31.89#ibcon#about to read 6, iclass 35, count 0 2006.232.08:00:31.89#ibcon#read 6, iclass 35, count 0 2006.232.08:00:31.89#ibcon#end of sib2, iclass 35, count 0 2006.232.08:00:31.89#ibcon#*after write, iclass 35, count 0 2006.232.08:00:31.89#ibcon#*before return 0, iclass 35, count 0 2006.232.08:00:31.89#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.232.08:00:31.89#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.232.08:00:31.89#ibcon#about to clear, iclass 35 cls_cnt 0 2006.232.08:00:31.89#ibcon#cleared, iclass 35 cls_cnt 0 2006.232.08:00:31.89$vc4f8/vblo=5,744.99 2006.232.08:00:31.89#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.232.08:00:31.89#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.232.08:00:31.89#ibcon#ireg 17 cls_cnt 0 2006.232.08:00:31.89#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.232.08:00:31.89#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.232.08:00:31.89#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.232.08:00:31.89#ibcon#enter wrdev, iclass 37, count 0 2006.232.08:00:31.89#ibcon#first serial, iclass 37, count 0 2006.232.08:00:31.89#ibcon#enter sib2, iclass 37, count 0 2006.232.08:00:31.89#ibcon#flushed, iclass 37, count 0 2006.232.08:00:31.89#ibcon#about to write, iclass 37, count 0 2006.232.08:00:31.89#ibcon#wrote, iclass 37, count 0 2006.232.08:00:31.89#ibcon#about to read 3, iclass 37, count 0 2006.232.08:00:31.91#ibcon#read 3, iclass 37, count 0 2006.232.08:00:31.91#ibcon#about to read 4, iclass 37, count 0 2006.232.08:00:31.91#ibcon#read 4, iclass 37, count 0 2006.232.08:00:31.91#ibcon#about to read 5, iclass 37, count 0 2006.232.08:00:31.91#ibcon#read 5, iclass 37, count 0 2006.232.08:00:31.91#ibcon#about to read 6, iclass 37, count 0 2006.232.08:00:31.91#ibcon#read 6, iclass 37, count 0 2006.232.08:00:31.91#ibcon#end of sib2, iclass 37, count 0 2006.232.08:00:31.91#ibcon#*mode == 0, iclass 37, count 0 2006.232.08:00:31.91#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.232.08:00:31.91#ibcon#[28=FRQ=05,744.99\r\n] 2006.232.08:00:31.91#ibcon#*before write, iclass 37, count 0 2006.232.08:00:31.91#ibcon#enter sib2, iclass 37, count 0 2006.232.08:00:31.91#ibcon#flushed, iclass 37, count 0 2006.232.08:00:31.91#ibcon#about to write, iclass 37, count 0 2006.232.08:00:31.91#ibcon#wrote, iclass 37, count 0 2006.232.08:00:31.91#ibcon#about to read 3, iclass 37, count 0 2006.232.08:00:31.95#ibcon#read 3, iclass 37, count 0 2006.232.08:00:31.95#ibcon#about to read 4, iclass 37, count 0 2006.232.08:00:31.95#ibcon#read 4, iclass 37, count 0 2006.232.08:00:31.95#ibcon#about to read 5, iclass 37, count 0 2006.232.08:00:31.95#ibcon#read 5, iclass 37, count 0 2006.232.08:00:31.95#ibcon#about to read 6, iclass 37, count 0 2006.232.08:00:31.95#ibcon#read 6, iclass 37, count 0 2006.232.08:00:31.95#ibcon#end of sib2, iclass 37, count 0 2006.232.08:00:31.95#ibcon#*after write, iclass 37, count 0 2006.232.08:00:31.95#ibcon#*before return 0, iclass 37, count 0 2006.232.08:00:31.95#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.232.08:00:31.95#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.232.08:00:31.95#ibcon#about to clear, iclass 37 cls_cnt 0 2006.232.08:00:31.95#ibcon#cleared, iclass 37 cls_cnt 0 2006.232.08:00:31.95$vc4f8/vb=5,3 2006.232.08:00:31.95#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.232.08:00:31.95#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.232.08:00:31.95#ibcon#ireg 11 cls_cnt 2 2006.232.08:00:31.95#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.232.08:00:32.01#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.232.08:00:32.01#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.232.08:00:32.01#ibcon#enter wrdev, iclass 39, count 2 2006.232.08:00:32.01#ibcon#first serial, iclass 39, count 2 2006.232.08:00:32.01#ibcon#enter sib2, iclass 39, count 2 2006.232.08:00:32.01#ibcon#flushed, iclass 39, count 2 2006.232.08:00:32.01#ibcon#about to write, iclass 39, count 2 2006.232.08:00:32.01#ibcon#wrote, iclass 39, count 2 2006.232.08:00:32.01#ibcon#about to read 3, iclass 39, count 2 2006.232.08:00:32.03#ibcon#read 3, iclass 39, count 2 2006.232.08:00:32.03#ibcon#about to read 4, iclass 39, count 2 2006.232.08:00:32.03#ibcon#read 4, iclass 39, count 2 2006.232.08:00:32.03#ibcon#about to read 5, iclass 39, count 2 2006.232.08:00:32.03#ibcon#read 5, iclass 39, count 2 2006.232.08:00:32.03#ibcon#about to read 6, iclass 39, count 2 2006.232.08:00:32.03#ibcon#read 6, iclass 39, count 2 2006.232.08:00:32.03#ibcon#end of sib2, iclass 39, count 2 2006.232.08:00:32.03#ibcon#*mode == 0, iclass 39, count 2 2006.232.08:00:32.03#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.232.08:00:32.03#ibcon#[27=AT05-03\r\n] 2006.232.08:00:32.03#ibcon#*before write, iclass 39, count 2 2006.232.08:00:32.03#ibcon#enter sib2, iclass 39, count 2 2006.232.08:00:32.03#ibcon#flushed, iclass 39, count 2 2006.232.08:00:32.03#ibcon#about to write, iclass 39, count 2 2006.232.08:00:32.03#ibcon#wrote, iclass 39, count 2 2006.232.08:00:32.03#ibcon#about to read 3, iclass 39, count 2 2006.232.08:00:32.06#ibcon#read 3, iclass 39, count 2 2006.232.08:00:32.06#ibcon#about to read 4, iclass 39, count 2 2006.232.08:00:32.06#ibcon#read 4, iclass 39, count 2 2006.232.08:00:32.06#ibcon#about to read 5, iclass 39, count 2 2006.232.08:00:32.06#ibcon#read 5, iclass 39, count 2 2006.232.08:00:32.06#ibcon#about to read 6, iclass 39, count 2 2006.232.08:00:32.06#ibcon#read 6, iclass 39, count 2 2006.232.08:00:32.06#ibcon#end of sib2, iclass 39, count 2 2006.232.08:00:32.06#ibcon#*after write, iclass 39, count 2 2006.232.08:00:32.06#ibcon#*before return 0, iclass 39, count 2 2006.232.08:00:32.06#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.232.08:00:32.06#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.232.08:00:32.06#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.232.08:00:32.06#ibcon#ireg 7 cls_cnt 0 2006.232.08:00:32.06#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.232.08:00:32.18#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.232.08:00:32.18#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.232.08:00:32.18#ibcon#enter wrdev, iclass 39, count 0 2006.232.08:00:32.18#ibcon#first serial, iclass 39, count 0 2006.232.08:00:32.18#ibcon#enter sib2, iclass 39, count 0 2006.232.08:00:32.18#ibcon#flushed, iclass 39, count 0 2006.232.08:00:32.18#ibcon#about to write, iclass 39, count 0 2006.232.08:00:32.18#ibcon#wrote, iclass 39, count 0 2006.232.08:00:32.18#ibcon#about to read 3, iclass 39, count 0 2006.232.08:00:32.20#ibcon#read 3, iclass 39, count 0 2006.232.08:00:32.20#ibcon#about to read 4, iclass 39, count 0 2006.232.08:00:32.20#ibcon#read 4, iclass 39, count 0 2006.232.08:00:32.20#ibcon#about to read 5, iclass 39, count 0 2006.232.08:00:32.20#ibcon#read 5, iclass 39, count 0 2006.232.08:00:32.20#ibcon#about to read 6, iclass 39, count 0 2006.232.08:00:32.20#ibcon#read 6, iclass 39, count 0 2006.232.08:00:32.20#ibcon#end of sib2, iclass 39, count 0 2006.232.08:00:32.20#ibcon#*mode == 0, iclass 39, count 0 2006.232.08:00:32.20#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.232.08:00:32.20#ibcon#[27=USB\r\n] 2006.232.08:00:32.20#ibcon#*before write, iclass 39, count 0 2006.232.08:00:32.20#ibcon#enter sib2, iclass 39, count 0 2006.232.08:00:32.20#ibcon#flushed, iclass 39, count 0 2006.232.08:00:32.20#ibcon#about to write, iclass 39, count 0 2006.232.08:00:32.20#ibcon#wrote, iclass 39, count 0 2006.232.08:00:32.20#ibcon#about to read 3, iclass 39, count 0 2006.232.08:00:32.23#ibcon#read 3, iclass 39, count 0 2006.232.08:00:32.23#ibcon#about to read 4, iclass 39, count 0 2006.232.08:00:32.23#ibcon#read 4, iclass 39, count 0 2006.232.08:00:32.23#ibcon#about to read 5, iclass 39, count 0 2006.232.08:00:32.23#ibcon#read 5, iclass 39, count 0 2006.232.08:00:32.23#ibcon#about to read 6, iclass 39, count 0 2006.232.08:00:32.23#ibcon#read 6, iclass 39, count 0 2006.232.08:00:32.23#ibcon#end of sib2, iclass 39, count 0 2006.232.08:00:32.23#ibcon#*after write, iclass 39, count 0 2006.232.08:00:32.23#ibcon#*before return 0, iclass 39, count 0 2006.232.08:00:32.23#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.232.08:00:32.23#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.232.08:00:32.23#ibcon#about to clear, iclass 39 cls_cnt 0 2006.232.08:00:32.23#ibcon#cleared, iclass 39 cls_cnt 0 2006.232.08:00:32.23$vc4f8/vblo=6,752.99 2006.232.08:00:32.23#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.232.08:00:32.23#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.232.08:00:32.23#ibcon#ireg 17 cls_cnt 0 2006.232.08:00:32.23#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:00:32.23#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:00:32.23#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:00:32.23#ibcon#enter wrdev, iclass 3, count 0 2006.232.08:00:32.23#ibcon#first serial, iclass 3, count 0 2006.232.08:00:32.23#ibcon#enter sib2, iclass 3, count 0 2006.232.08:00:32.23#ibcon#flushed, iclass 3, count 0 2006.232.08:00:32.23#ibcon#about to write, iclass 3, count 0 2006.232.08:00:32.23#ibcon#wrote, iclass 3, count 0 2006.232.08:00:32.23#ibcon#about to read 3, iclass 3, count 0 2006.232.08:00:32.25#ibcon#read 3, iclass 3, count 0 2006.232.08:00:32.25#ibcon#about to read 4, iclass 3, count 0 2006.232.08:00:32.25#ibcon#read 4, iclass 3, count 0 2006.232.08:00:32.25#ibcon#about to read 5, iclass 3, count 0 2006.232.08:00:32.25#ibcon#read 5, iclass 3, count 0 2006.232.08:00:32.25#ibcon#about to read 6, iclass 3, count 0 2006.232.08:00:32.25#ibcon#read 6, iclass 3, count 0 2006.232.08:00:32.25#ibcon#end of sib2, iclass 3, count 0 2006.232.08:00:32.25#ibcon#*mode == 0, iclass 3, count 0 2006.232.08:00:32.25#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.232.08:00:32.25#ibcon#[28=FRQ=06,752.99\r\n] 2006.232.08:00:32.25#ibcon#*before write, iclass 3, count 0 2006.232.08:00:32.25#ibcon#enter sib2, iclass 3, count 0 2006.232.08:00:32.25#ibcon#flushed, iclass 3, count 0 2006.232.08:00:32.25#ibcon#about to write, iclass 3, count 0 2006.232.08:00:32.25#ibcon#wrote, iclass 3, count 0 2006.232.08:00:32.25#ibcon#about to read 3, iclass 3, count 0 2006.232.08:00:32.29#ibcon#read 3, iclass 3, count 0 2006.232.08:00:32.29#ibcon#about to read 4, iclass 3, count 0 2006.232.08:00:32.29#ibcon#read 4, iclass 3, count 0 2006.232.08:00:32.29#ibcon#about to read 5, iclass 3, count 0 2006.232.08:00:32.29#ibcon#read 5, iclass 3, count 0 2006.232.08:00:32.29#ibcon#about to read 6, iclass 3, count 0 2006.232.08:00:32.29#ibcon#read 6, iclass 3, count 0 2006.232.08:00:32.29#ibcon#end of sib2, iclass 3, count 0 2006.232.08:00:32.29#ibcon#*after write, iclass 3, count 0 2006.232.08:00:32.29#ibcon#*before return 0, iclass 3, count 0 2006.232.08:00:32.29#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:00:32.29#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:00:32.29#ibcon#about to clear, iclass 3 cls_cnt 0 2006.232.08:00:32.29#ibcon#cleared, iclass 3 cls_cnt 0 2006.232.08:00:32.29$vc4f8/vb=6,4 2006.232.08:00:32.29#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.232.08:00:32.29#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.232.08:00:32.29#ibcon#ireg 11 cls_cnt 2 2006.232.08:00:32.29#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.232.08:00:32.35#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.232.08:00:32.35#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.232.08:00:32.35#ibcon#enter wrdev, iclass 5, count 2 2006.232.08:00:32.35#ibcon#first serial, iclass 5, count 2 2006.232.08:00:32.35#ibcon#enter sib2, iclass 5, count 2 2006.232.08:00:32.35#ibcon#flushed, iclass 5, count 2 2006.232.08:00:32.35#ibcon#about to write, iclass 5, count 2 2006.232.08:00:32.35#ibcon#wrote, iclass 5, count 2 2006.232.08:00:32.35#ibcon#about to read 3, iclass 5, count 2 2006.232.08:00:32.37#ibcon#read 3, iclass 5, count 2 2006.232.08:00:32.37#ibcon#about to read 4, iclass 5, count 2 2006.232.08:00:32.37#ibcon#read 4, iclass 5, count 2 2006.232.08:00:32.37#ibcon#about to read 5, iclass 5, count 2 2006.232.08:00:32.37#ibcon#read 5, iclass 5, count 2 2006.232.08:00:32.37#ibcon#about to read 6, iclass 5, count 2 2006.232.08:00:32.37#ibcon#read 6, iclass 5, count 2 2006.232.08:00:32.37#ibcon#end of sib2, iclass 5, count 2 2006.232.08:00:32.37#ibcon#*mode == 0, iclass 5, count 2 2006.232.08:00:32.37#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.232.08:00:32.37#ibcon#[27=AT06-04\r\n] 2006.232.08:00:32.37#ibcon#*before write, iclass 5, count 2 2006.232.08:00:32.37#ibcon#enter sib2, iclass 5, count 2 2006.232.08:00:32.37#ibcon#flushed, iclass 5, count 2 2006.232.08:00:32.37#ibcon#about to write, iclass 5, count 2 2006.232.08:00:32.37#ibcon#wrote, iclass 5, count 2 2006.232.08:00:32.37#ibcon#about to read 3, iclass 5, count 2 2006.232.08:00:32.40#ibcon#read 3, iclass 5, count 2 2006.232.08:00:32.40#ibcon#about to read 4, iclass 5, count 2 2006.232.08:00:32.40#ibcon#read 4, iclass 5, count 2 2006.232.08:00:32.40#ibcon#about to read 5, iclass 5, count 2 2006.232.08:00:32.40#ibcon#read 5, iclass 5, count 2 2006.232.08:00:32.40#ibcon#about to read 6, iclass 5, count 2 2006.232.08:00:32.40#ibcon#read 6, iclass 5, count 2 2006.232.08:00:32.40#ibcon#end of sib2, iclass 5, count 2 2006.232.08:00:32.40#ibcon#*after write, iclass 5, count 2 2006.232.08:00:32.40#ibcon#*before return 0, iclass 5, count 2 2006.232.08:00:32.40#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.232.08:00:32.40#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.232.08:00:32.40#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.232.08:00:32.40#ibcon#ireg 7 cls_cnt 0 2006.232.08:00:32.40#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.232.08:00:32.52#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.232.08:00:32.52#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.232.08:00:32.52#ibcon#enter wrdev, iclass 5, count 0 2006.232.08:00:32.52#ibcon#first serial, iclass 5, count 0 2006.232.08:00:32.52#ibcon#enter sib2, iclass 5, count 0 2006.232.08:00:32.52#ibcon#flushed, iclass 5, count 0 2006.232.08:00:32.52#ibcon#about to write, iclass 5, count 0 2006.232.08:00:32.52#ibcon#wrote, iclass 5, count 0 2006.232.08:00:32.52#ibcon#about to read 3, iclass 5, count 0 2006.232.08:00:32.54#ibcon#read 3, iclass 5, count 0 2006.232.08:00:32.54#ibcon#about to read 4, iclass 5, count 0 2006.232.08:00:32.54#ibcon#read 4, iclass 5, count 0 2006.232.08:00:32.54#ibcon#about to read 5, iclass 5, count 0 2006.232.08:00:32.54#ibcon#read 5, iclass 5, count 0 2006.232.08:00:32.54#ibcon#about to read 6, iclass 5, count 0 2006.232.08:00:32.54#ibcon#read 6, iclass 5, count 0 2006.232.08:00:32.54#ibcon#end of sib2, iclass 5, count 0 2006.232.08:00:32.54#ibcon#*mode == 0, iclass 5, count 0 2006.232.08:00:32.54#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.232.08:00:32.54#ibcon#[27=USB\r\n] 2006.232.08:00:32.54#ibcon#*before write, iclass 5, count 0 2006.232.08:00:32.54#ibcon#enter sib2, iclass 5, count 0 2006.232.08:00:32.54#ibcon#flushed, iclass 5, count 0 2006.232.08:00:32.54#ibcon#about to write, iclass 5, count 0 2006.232.08:00:32.54#ibcon#wrote, iclass 5, count 0 2006.232.08:00:32.54#ibcon#about to read 3, iclass 5, count 0 2006.232.08:00:32.57#ibcon#read 3, iclass 5, count 0 2006.232.08:00:32.57#ibcon#about to read 4, iclass 5, count 0 2006.232.08:00:32.57#ibcon#read 4, iclass 5, count 0 2006.232.08:00:32.57#ibcon#about to read 5, iclass 5, count 0 2006.232.08:00:32.57#ibcon#read 5, iclass 5, count 0 2006.232.08:00:32.57#ibcon#about to read 6, iclass 5, count 0 2006.232.08:00:32.57#ibcon#read 6, iclass 5, count 0 2006.232.08:00:32.57#ibcon#end of sib2, iclass 5, count 0 2006.232.08:00:32.57#ibcon#*after write, iclass 5, count 0 2006.232.08:00:32.57#ibcon#*before return 0, iclass 5, count 0 2006.232.08:00:32.57#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.232.08:00:32.57#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.232.08:00:32.57#ibcon#about to clear, iclass 5 cls_cnt 0 2006.232.08:00:32.57#ibcon#cleared, iclass 5 cls_cnt 0 2006.232.08:00:32.57$vc4f8/vabw=wide 2006.232.08:00:32.57#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.232.08:00:32.57#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.232.08:00:32.57#ibcon#ireg 8 cls_cnt 0 2006.232.08:00:32.57#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.232.08:00:32.57#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.232.08:00:32.57#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.232.08:00:32.57#ibcon#enter wrdev, iclass 7, count 0 2006.232.08:00:32.57#ibcon#first serial, iclass 7, count 0 2006.232.08:00:32.57#ibcon#enter sib2, iclass 7, count 0 2006.232.08:00:32.57#ibcon#flushed, iclass 7, count 0 2006.232.08:00:32.57#ibcon#about to write, iclass 7, count 0 2006.232.08:00:32.57#ibcon#wrote, iclass 7, count 0 2006.232.08:00:32.57#ibcon#about to read 3, iclass 7, count 0 2006.232.08:00:32.59#ibcon#read 3, iclass 7, count 0 2006.232.08:00:32.59#ibcon#about to read 4, iclass 7, count 0 2006.232.08:00:32.59#ibcon#read 4, iclass 7, count 0 2006.232.08:00:32.59#ibcon#about to read 5, iclass 7, count 0 2006.232.08:00:32.59#ibcon#read 5, iclass 7, count 0 2006.232.08:00:32.59#ibcon#about to read 6, iclass 7, count 0 2006.232.08:00:32.59#ibcon#read 6, iclass 7, count 0 2006.232.08:00:32.59#ibcon#end of sib2, iclass 7, count 0 2006.232.08:00:32.59#ibcon#*mode == 0, iclass 7, count 0 2006.232.08:00:32.59#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.232.08:00:32.59#ibcon#[25=BW32\r\n] 2006.232.08:00:32.59#ibcon#*before write, iclass 7, count 0 2006.232.08:00:32.59#ibcon#enter sib2, iclass 7, count 0 2006.232.08:00:32.59#ibcon#flushed, iclass 7, count 0 2006.232.08:00:32.59#ibcon#about to write, iclass 7, count 0 2006.232.08:00:32.59#ibcon#wrote, iclass 7, count 0 2006.232.08:00:32.59#ibcon#about to read 3, iclass 7, count 0 2006.232.08:00:32.62#ibcon#read 3, iclass 7, count 0 2006.232.08:00:32.62#ibcon#about to read 4, iclass 7, count 0 2006.232.08:00:32.62#ibcon#read 4, iclass 7, count 0 2006.232.08:00:32.62#ibcon#about to read 5, iclass 7, count 0 2006.232.08:00:32.62#ibcon#read 5, iclass 7, count 0 2006.232.08:00:32.62#ibcon#about to read 6, iclass 7, count 0 2006.232.08:00:32.62#ibcon#read 6, iclass 7, count 0 2006.232.08:00:32.62#ibcon#end of sib2, iclass 7, count 0 2006.232.08:00:32.62#ibcon#*after write, iclass 7, count 0 2006.232.08:00:32.62#ibcon#*before return 0, iclass 7, count 0 2006.232.08:00:32.62#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.232.08:00:32.62#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.232.08:00:32.62#ibcon#about to clear, iclass 7 cls_cnt 0 2006.232.08:00:32.62#ibcon#cleared, iclass 7 cls_cnt 0 2006.232.08:00:32.62$vc4f8/vbbw=wide 2006.232.08:00:32.62#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.232.08:00:32.62#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.232.08:00:32.62#ibcon#ireg 8 cls_cnt 0 2006.232.08:00:32.62#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.232.08:00:32.69#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.232.08:00:32.69#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.232.08:00:32.69#ibcon#enter wrdev, iclass 11, count 0 2006.232.08:00:32.69#ibcon#first serial, iclass 11, count 0 2006.232.08:00:32.69#ibcon#enter sib2, iclass 11, count 0 2006.232.08:00:32.69#ibcon#flushed, iclass 11, count 0 2006.232.08:00:32.69#ibcon#about to write, iclass 11, count 0 2006.232.08:00:32.69#ibcon#wrote, iclass 11, count 0 2006.232.08:00:32.69#ibcon#about to read 3, iclass 11, count 0 2006.232.08:00:32.71#ibcon#read 3, iclass 11, count 0 2006.232.08:00:32.71#ibcon#about to read 4, iclass 11, count 0 2006.232.08:00:32.71#ibcon#read 4, iclass 11, count 0 2006.232.08:00:32.71#ibcon#about to read 5, iclass 11, count 0 2006.232.08:00:32.71#ibcon#read 5, iclass 11, count 0 2006.232.08:00:32.71#ibcon#about to read 6, iclass 11, count 0 2006.232.08:00:32.71#ibcon#read 6, iclass 11, count 0 2006.232.08:00:32.71#ibcon#end of sib2, iclass 11, count 0 2006.232.08:00:32.71#ibcon#*mode == 0, iclass 11, count 0 2006.232.08:00:32.71#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.232.08:00:32.71#ibcon#[27=BW32\r\n] 2006.232.08:00:32.71#ibcon#*before write, iclass 11, count 0 2006.232.08:00:32.71#ibcon#enter sib2, iclass 11, count 0 2006.232.08:00:32.71#ibcon#flushed, iclass 11, count 0 2006.232.08:00:32.71#ibcon#about to write, iclass 11, count 0 2006.232.08:00:32.71#ibcon#wrote, iclass 11, count 0 2006.232.08:00:32.71#ibcon#about to read 3, iclass 11, count 0 2006.232.08:00:32.74#ibcon#read 3, iclass 11, count 0 2006.232.08:00:32.74#ibcon#about to read 4, iclass 11, count 0 2006.232.08:00:32.74#ibcon#read 4, iclass 11, count 0 2006.232.08:00:32.74#ibcon#about to read 5, iclass 11, count 0 2006.232.08:00:32.74#ibcon#read 5, iclass 11, count 0 2006.232.08:00:32.74#ibcon#about to read 6, iclass 11, count 0 2006.232.08:00:32.74#ibcon#read 6, iclass 11, count 0 2006.232.08:00:32.74#ibcon#end of sib2, iclass 11, count 0 2006.232.08:00:32.74#ibcon#*after write, iclass 11, count 0 2006.232.08:00:32.74#ibcon#*before return 0, iclass 11, count 0 2006.232.08:00:32.74#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.232.08:00:32.74#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.232.08:00:32.74#ibcon#about to clear, iclass 11 cls_cnt 0 2006.232.08:00:32.74#ibcon#cleared, iclass 11 cls_cnt 0 2006.232.08:00:32.74$4f8m12a/ifd4f 2006.232.08:00:32.74$ifd4f/lo= 2006.232.08:00:32.74$ifd4f/lo=lo1,7680.00,usb,rcp,1 2006.232.08:00:32.74$ifd4f/lo=lo2,1600.00,usb,rcp,1 2006.232.08:00:32.74$ifd4f/lo=lo3,8080.00,usb,rcp,1 2006.232.08:00:32.74$ifd4f/patch= 2006.232.08:00:32.74$ifd4f/patch=lo1,a1,a2,a3,a4 2006.232.08:00:32.74$ifd4f/patch=lo2,b1,b2,b3,b4,b5,b6 2006.232.08:00:32.74$ifd4f/patch=lo3,a5,a6,a7,a8 2006.232.08:00:32.74$4f8m12a/"form=m,16.000,1:2 2006.232.08:00:32.74$4f8m12a/"tpicd 2006.232.08:00:32.74$4f8m12a/echo=off 2006.232.08:00:32.74$4f8m12a/xlog=off 2006.232.08:00:32.74:!2006.232.08:01:00 2006.232.08:00:44.14#trakl#Source acquired 2006.232.08:00:45.14#flagr#flagr/antenna,acquired 2006.232.08:01:00.00:preob 2006.232.08:01:01.14/onsource/TRACKING 2006.232.08:01:01.14:!2006.232.08:01:10 2006.232.08:01:10.00:data_valid=on 2006.232.08:01:10.00:midob 2006.232.08:01:10.14/onsource/TRACKING 2006.232.08:01:10.14/wx/29.40,1007.3,86 2006.232.08:01:10.30/cable/+6.3873E-03 2006.232.08:01:11.39/va/01,08,usb,yes,31,32 2006.232.08:01:11.39/va/02,07,usb,yes,31,32 2006.232.08:01:11.39/va/03,08,usb,yes,23,23 2006.232.08:01:11.39/va/04,07,usb,yes,32,35 2006.232.08:01:11.39/va/05,07,usb,yes,36,38 2006.232.08:01:11.39/va/06,06,usb,yes,35,35 2006.232.08:01:11.39/va/07,06,usb,yes,36,36 2006.232.08:01:11.39/va/08,06,usb,yes,38,38 2006.232.08:01:11.62/valo/01,532.99,yes,locked 2006.232.08:01:11.62/valo/02,572.99,yes,locked 2006.232.08:01:11.62/valo/03,672.99,yes,locked 2006.232.08:01:11.62/valo/04,832.99,yes,locked 2006.232.08:01:11.62/valo/05,652.99,yes,locked 2006.232.08:01:11.62/valo/06,772.99,yes,locked 2006.232.08:01:11.62/valo/07,832.99,yes,locked 2006.232.08:01:11.62/valo/08,852.99,yes,locked 2006.232.08:01:12.71/vb/01,04,usb,yes,31,29 2006.232.08:01:12.71/vb/02,04,usb,yes,32,34 2006.232.08:01:12.71/vb/03,04,usb,yes,29,32 2006.232.08:01:12.71/vb/04,04,usb,yes,30,30 2006.232.08:01:12.71/vb/05,03,usb,yes,35,40 2006.232.08:01:12.71/vb/06,04,usb,yes,29,32 2006.232.08:01:12.71/vb/07,04,usb,yes,31,31 2006.232.08:01:12.71/vb/08,04,usb,yes,29,32 2006.232.08:01:12.95/vblo/01,632.99,yes,locked 2006.232.08:01:12.95/vblo/02,640.99,yes,locked 2006.232.08:01:12.95/vblo/03,656.99,yes,locked 2006.232.08:01:12.95/vblo/04,712.99,yes,locked 2006.232.08:01:12.95/vblo/05,744.99,yes,locked 2006.232.08:01:12.95/vblo/06,752.99,yes,locked 2006.232.08:01:12.95/vblo/07,734.99,yes,locked 2006.232.08:01:12.95/vblo/08,744.99,yes,locked 2006.232.08:01:13.10/vabw/8 2006.232.08:01:13.25/vbbw/8 2006.232.08:01:13.34/xfe/off,on,13.5 2006.232.08:01:13.71/ifatt/23,28,28,28 2006.232.08:01:14.07/fmout-gps/S +4.46E-07 2006.232.08:01:14.11:!2006.232.08:02:10 2006.232.08:02:10.00:data_valid=off 2006.232.08:02:10.00:postob 2006.232.08:02:10.08/cable/+6.3899E-03 2006.232.08:02:10.09/wx/29.40,1007.3,87 2006.232.08:02:11.08/fmout-gps/S +4.49E-07 2006.232.08:02:11.08:scan_name=232-0803,k06232,60 2006.232.08:02:11.09:source=4c39.25,092703.01,390220.9,2000.0,ccw 2006.232.08:02:11.14#flagr#flagr/antenna,new-source 2006.232.08:02:12.14:checkk5 2006.232.08:02:12.51/chk_autoobs//k5ts1/ autoobs is running! 2006.232.08:02:12.88/chk_autoobs//k5ts2/ autoobs is running! 2006.232.08:02:13.26/chk_autoobs//k5ts3/ autoobs is running! 2006.232.08:02:13.64/chk_autoobs//k5ts4/ autoobs is running! 2006.232.08:02:14.06/chk_obsdata//k5ts1/T2320801??a.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.08:02:14.42/chk_obsdata//k5ts2/T2320801??b.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.08:02:14.79/chk_obsdata//k5ts3/T2320801??c.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.08:02:15.17/chk_obsdata//k5ts4/T2320801??d.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.08:02:15.85/k5log//k5ts1_log_newline 2006.232.08:02:16.56/k5log//k5ts2_log_newline 2006.232.08:02:17.26/k5log//k5ts3_log_newline 2006.232.08:02:17.94/k5log//k5ts4_log_newline 2006.232.08:02:17.97/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.232.08:02:17.97:4f8m12a=2 2006.232.08:02:17.97$4f8m12a/echo=on 2006.232.08:02:17.97$4f8m12a/pcalon 2006.232.08:02:17.97$pcalon/"no phase cal control is implemented here 2006.232.08:02:17.97$4f8m12a/"tpicd=stop 2006.232.08:02:17.97$4f8m12a/vc4f8 2006.232.08:02:17.97$vc4f8/valo=1,532.99 2006.232.08:02:17.97#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.232.08:02:17.97#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.232.08:02:17.97#ibcon#ireg 17 cls_cnt 0 2006.232.08:02:17.97#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.232.08:02:17.97#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.232.08:02:17.97#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.232.08:02:17.97#ibcon#enter wrdev, iclass 18, count 0 2006.232.08:02:17.97#ibcon#first serial, iclass 18, count 0 2006.232.08:02:17.97#ibcon#enter sib2, iclass 18, count 0 2006.232.08:02:17.97#ibcon#flushed, iclass 18, count 0 2006.232.08:02:17.97#ibcon#about to write, iclass 18, count 0 2006.232.08:02:17.97#ibcon#wrote, iclass 18, count 0 2006.232.08:02:17.97#ibcon#about to read 3, iclass 18, count 0 2006.232.08:02:18.01#ibcon#read 3, iclass 18, count 0 2006.232.08:02:18.01#ibcon#about to read 4, iclass 18, count 0 2006.232.08:02:18.01#ibcon#read 4, iclass 18, count 0 2006.232.08:02:18.01#ibcon#about to read 5, iclass 18, count 0 2006.232.08:02:18.01#ibcon#read 5, iclass 18, count 0 2006.232.08:02:18.01#ibcon#about to read 6, iclass 18, count 0 2006.232.08:02:18.01#ibcon#read 6, iclass 18, count 0 2006.232.08:02:18.01#ibcon#end of sib2, iclass 18, count 0 2006.232.08:02:18.01#ibcon#*mode == 0, iclass 18, count 0 2006.232.08:02:18.01#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.232.08:02:18.01#ibcon#[26=FRQ=01,532.99\r\n] 2006.232.08:02:18.01#ibcon#*before write, iclass 18, count 0 2006.232.08:02:18.01#ibcon#enter sib2, iclass 18, count 0 2006.232.08:02:18.01#ibcon#flushed, iclass 18, count 0 2006.232.08:02:18.01#ibcon#about to write, iclass 18, count 0 2006.232.08:02:18.01#ibcon#wrote, iclass 18, count 0 2006.232.08:02:18.01#ibcon#about to read 3, iclass 18, count 0 2006.232.08:02:18.06#ibcon#read 3, iclass 18, count 0 2006.232.08:02:18.06#ibcon#about to read 4, iclass 18, count 0 2006.232.08:02:18.06#ibcon#read 4, iclass 18, count 0 2006.232.08:02:18.06#ibcon#about to read 5, iclass 18, count 0 2006.232.08:02:18.06#ibcon#read 5, iclass 18, count 0 2006.232.08:02:18.06#ibcon#about to read 6, iclass 18, count 0 2006.232.08:02:18.06#ibcon#read 6, iclass 18, count 0 2006.232.08:02:18.06#ibcon#end of sib2, iclass 18, count 0 2006.232.08:02:18.06#ibcon#*after write, iclass 18, count 0 2006.232.08:02:18.06#ibcon#*before return 0, iclass 18, count 0 2006.232.08:02:18.06#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.232.08:02:18.06#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.232.08:02:18.06#ibcon#about to clear, iclass 18 cls_cnt 0 2006.232.08:02:18.06#ibcon#cleared, iclass 18 cls_cnt 0 2006.232.08:02:18.06$vc4f8/va=1,8 2006.232.08:02:18.06#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.232.08:02:18.06#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.232.08:02:18.06#ibcon#ireg 11 cls_cnt 2 2006.232.08:02:18.06#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.232.08:02:18.06#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.232.08:02:18.06#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.232.08:02:18.06#ibcon#enter wrdev, iclass 20, count 2 2006.232.08:02:18.06#ibcon#first serial, iclass 20, count 2 2006.232.08:02:18.06#ibcon#enter sib2, iclass 20, count 2 2006.232.08:02:18.06#ibcon#flushed, iclass 20, count 2 2006.232.08:02:18.06#ibcon#about to write, iclass 20, count 2 2006.232.08:02:18.06#ibcon#wrote, iclass 20, count 2 2006.232.08:02:18.06#ibcon#about to read 3, iclass 20, count 2 2006.232.08:02:18.08#ibcon#read 3, iclass 20, count 2 2006.232.08:02:18.08#ibcon#about to read 4, iclass 20, count 2 2006.232.08:02:18.08#ibcon#read 4, iclass 20, count 2 2006.232.08:02:18.08#ibcon#about to read 5, iclass 20, count 2 2006.232.08:02:18.08#ibcon#read 5, iclass 20, count 2 2006.232.08:02:18.08#ibcon#about to read 6, iclass 20, count 2 2006.232.08:02:18.08#ibcon#read 6, iclass 20, count 2 2006.232.08:02:18.08#ibcon#end of sib2, iclass 20, count 2 2006.232.08:02:18.08#ibcon#*mode == 0, iclass 20, count 2 2006.232.08:02:18.08#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.232.08:02:18.08#ibcon#[25=AT01-08\r\n] 2006.232.08:02:18.08#ibcon#*before write, iclass 20, count 2 2006.232.08:02:18.08#ibcon#enter sib2, iclass 20, count 2 2006.232.08:02:18.08#ibcon#flushed, iclass 20, count 2 2006.232.08:02:18.08#ibcon#about to write, iclass 20, count 2 2006.232.08:02:18.08#ibcon#wrote, iclass 20, count 2 2006.232.08:02:18.08#ibcon#about to read 3, iclass 20, count 2 2006.232.08:02:18.11#ibcon#read 3, iclass 20, count 2 2006.232.08:02:18.11#ibcon#about to read 4, iclass 20, count 2 2006.232.08:02:18.11#ibcon#read 4, iclass 20, count 2 2006.232.08:02:18.11#ibcon#about to read 5, iclass 20, count 2 2006.232.08:02:18.11#ibcon#read 5, iclass 20, count 2 2006.232.08:02:18.11#ibcon#about to read 6, iclass 20, count 2 2006.232.08:02:18.11#ibcon#read 6, iclass 20, count 2 2006.232.08:02:18.11#ibcon#end of sib2, iclass 20, count 2 2006.232.08:02:18.11#ibcon#*after write, iclass 20, count 2 2006.232.08:02:18.11#ibcon#*before return 0, iclass 20, count 2 2006.232.08:02:18.11#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.232.08:02:18.11#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.232.08:02:18.11#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.232.08:02:18.11#ibcon#ireg 7 cls_cnt 0 2006.232.08:02:18.11#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.232.08:02:18.23#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.232.08:02:18.23#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.232.08:02:18.23#ibcon#enter wrdev, iclass 20, count 0 2006.232.08:02:18.23#ibcon#first serial, iclass 20, count 0 2006.232.08:02:18.23#ibcon#enter sib2, iclass 20, count 0 2006.232.08:02:18.23#ibcon#flushed, iclass 20, count 0 2006.232.08:02:18.23#ibcon#about to write, iclass 20, count 0 2006.232.08:02:18.23#ibcon#wrote, iclass 20, count 0 2006.232.08:02:18.23#ibcon#about to read 3, iclass 20, count 0 2006.232.08:02:18.25#ibcon#read 3, iclass 20, count 0 2006.232.08:02:18.25#ibcon#about to read 4, iclass 20, count 0 2006.232.08:02:18.25#ibcon#read 4, iclass 20, count 0 2006.232.08:02:18.25#ibcon#about to read 5, iclass 20, count 0 2006.232.08:02:18.25#ibcon#read 5, iclass 20, count 0 2006.232.08:02:18.25#ibcon#about to read 6, iclass 20, count 0 2006.232.08:02:18.25#ibcon#read 6, iclass 20, count 0 2006.232.08:02:18.25#ibcon#end of sib2, iclass 20, count 0 2006.232.08:02:18.25#ibcon#*mode == 0, iclass 20, count 0 2006.232.08:02:18.25#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.232.08:02:18.25#ibcon#[25=USB\r\n] 2006.232.08:02:18.25#ibcon#*before write, iclass 20, count 0 2006.232.08:02:18.25#ibcon#enter sib2, iclass 20, count 0 2006.232.08:02:18.25#ibcon#flushed, iclass 20, count 0 2006.232.08:02:18.25#ibcon#about to write, iclass 20, count 0 2006.232.08:02:18.25#ibcon#wrote, iclass 20, count 0 2006.232.08:02:18.25#ibcon#about to read 3, iclass 20, count 0 2006.232.08:02:18.28#ibcon#read 3, iclass 20, count 0 2006.232.08:02:18.28#ibcon#about to read 4, iclass 20, count 0 2006.232.08:02:18.28#ibcon#read 4, iclass 20, count 0 2006.232.08:02:18.28#ibcon#about to read 5, iclass 20, count 0 2006.232.08:02:18.28#ibcon#read 5, iclass 20, count 0 2006.232.08:02:18.28#ibcon#about to read 6, iclass 20, count 0 2006.232.08:02:18.28#ibcon#read 6, iclass 20, count 0 2006.232.08:02:18.28#ibcon#end of sib2, iclass 20, count 0 2006.232.08:02:18.28#ibcon#*after write, iclass 20, count 0 2006.232.08:02:18.28#ibcon#*before return 0, iclass 20, count 0 2006.232.08:02:18.28#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.232.08:02:18.28#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.232.08:02:18.28#ibcon#about to clear, iclass 20 cls_cnt 0 2006.232.08:02:18.28#ibcon#cleared, iclass 20 cls_cnt 0 2006.232.08:02:18.28$vc4f8/valo=2,572.99 2006.232.08:02:18.28#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.232.08:02:18.28#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.232.08:02:18.28#ibcon#ireg 17 cls_cnt 0 2006.232.08:02:18.28#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.232.08:02:18.28#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.232.08:02:18.28#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.232.08:02:18.28#ibcon#enter wrdev, iclass 22, count 0 2006.232.08:02:18.28#ibcon#first serial, iclass 22, count 0 2006.232.08:02:18.28#ibcon#enter sib2, iclass 22, count 0 2006.232.08:02:18.28#ibcon#flushed, iclass 22, count 0 2006.232.08:02:18.28#ibcon#about to write, iclass 22, count 0 2006.232.08:02:18.28#ibcon#wrote, iclass 22, count 0 2006.232.08:02:18.28#ibcon#about to read 3, iclass 22, count 0 2006.232.08:02:18.30#ibcon#read 3, iclass 22, count 0 2006.232.08:02:18.30#ibcon#about to read 4, iclass 22, count 0 2006.232.08:02:18.30#ibcon#read 4, iclass 22, count 0 2006.232.08:02:18.30#ibcon#about to read 5, iclass 22, count 0 2006.232.08:02:18.30#ibcon#read 5, iclass 22, count 0 2006.232.08:02:18.30#ibcon#about to read 6, iclass 22, count 0 2006.232.08:02:18.30#ibcon#read 6, iclass 22, count 0 2006.232.08:02:18.30#ibcon#end of sib2, iclass 22, count 0 2006.232.08:02:18.30#ibcon#*mode == 0, iclass 22, count 0 2006.232.08:02:18.30#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.232.08:02:18.30#ibcon#[26=FRQ=02,572.99\r\n] 2006.232.08:02:18.30#ibcon#*before write, iclass 22, count 0 2006.232.08:02:18.30#ibcon#enter sib2, iclass 22, count 0 2006.232.08:02:18.30#ibcon#flushed, iclass 22, count 0 2006.232.08:02:18.30#ibcon#about to write, iclass 22, count 0 2006.232.08:02:18.30#ibcon#wrote, iclass 22, count 0 2006.232.08:02:18.30#ibcon#about to read 3, iclass 22, count 0 2006.232.08:02:18.33#abcon#<5=/05 3.8 6.9 29.40 871007.3\r\n> 2006.232.08:02:18.34#ibcon#read 3, iclass 22, count 0 2006.232.08:02:18.34#ibcon#about to read 4, iclass 22, count 0 2006.232.08:02:18.34#ibcon#read 4, iclass 22, count 0 2006.232.08:02:18.34#ibcon#about to read 5, iclass 22, count 0 2006.232.08:02:18.34#ibcon#read 5, iclass 22, count 0 2006.232.08:02:18.34#ibcon#about to read 6, iclass 22, count 0 2006.232.08:02:18.34#ibcon#read 6, iclass 22, count 0 2006.232.08:02:18.34#ibcon#end of sib2, iclass 22, count 0 2006.232.08:02:18.34#ibcon#*after write, iclass 22, count 0 2006.232.08:02:18.34#ibcon#*before return 0, iclass 22, count 0 2006.232.08:02:18.34#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.232.08:02:18.34#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.232.08:02:18.34#ibcon#about to clear, iclass 22 cls_cnt 0 2006.232.08:02:18.34#ibcon#cleared, iclass 22 cls_cnt 0 2006.232.08:02:18.34$vc4f8/va=2,7 2006.232.08:02:18.34#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.232.08:02:18.34#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.232.08:02:18.34#ibcon#ireg 11 cls_cnt 2 2006.232.08:02:18.34#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:02:18.35#abcon#{5=INTERFACE CLEAR} 2006.232.08:02:18.40#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:02:18.40#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:02:18.40#ibcon#enter wrdev, iclass 27, count 2 2006.232.08:02:18.40#ibcon#first serial, iclass 27, count 2 2006.232.08:02:18.40#ibcon#enter sib2, iclass 27, count 2 2006.232.08:02:18.40#ibcon#flushed, iclass 27, count 2 2006.232.08:02:18.40#ibcon#about to write, iclass 27, count 2 2006.232.08:02:18.40#ibcon#wrote, iclass 27, count 2 2006.232.08:02:18.40#ibcon#about to read 3, iclass 27, count 2 2006.232.08:02:18.41#abcon#[5=S1D000X0/0*\r\n] 2006.232.08:02:18.42#ibcon#read 3, iclass 27, count 2 2006.232.08:02:18.42#ibcon#about to read 4, iclass 27, count 2 2006.232.08:02:18.42#ibcon#read 4, iclass 27, count 2 2006.232.08:02:18.42#ibcon#about to read 5, iclass 27, count 2 2006.232.08:02:18.42#ibcon#read 5, iclass 27, count 2 2006.232.08:02:18.42#ibcon#about to read 6, iclass 27, count 2 2006.232.08:02:18.42#ibcon#read 6, iclass 27, count 2 2006.232.08:02:18.42#ibcon#end of sib2, iclass 27, count 2 2006.232.08:02:18.42#ibcon#*mode == 0, iclass 27, count 2 2006.232.08:02:18.42#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.232.08:02:18.42#ibcon#[25=AT02-07\r\n] 2006.232.08:02:18.42#ibcon#*before write, iclass 27, count 2 2006.232.08:02:18.42#ibcon#enter sib2, iclass 27, count 2 2006.232.08:02:18.42#ibcon#flushed, iclass 27, count 2 2006.232.08:02:18.42#ibcon#about to write, iclass 27, count 2 2006.232.08:02:18.42#ibcon#wrote, iclass 27, count 2 2006.232.08:02:18.42#ibcon#about to read 3, iclass 27, count 2 2006.232.08:02:18.45#ibcon#read 3, iclass 27, count 2 2006.232.08:02:18.45#ibcon#about to read 4, iclass 27, count 2 2006.232.08:02:18.45#ibcon#read 4, iclass 27, count 2 2006.232.08:02:18.45#ibcon#about to read 5, iclass 27, count 2 2006.232.08:02:18.45#ibcon#read 5, iclass 27, count 2 2006.232.08:02:18.45#ibcon#about to read 6, iclass 27, count 2 2006.232.08:02:18.45#ibcon#read 6, iclass 27, count 2 2006.232.08:02:18.45#ibcon#end of sib2, iclass 27, count 2 2006.232.08:02:18.45#ibcon#*after write, iclass 27, count 2 2006.232.08:02:18.45#ibcon#*before return 0, iclass 27, count 2 2006.232.08:02:18.45#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:02:18.45#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:02:18.45#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.232.08:02:18.45#ibcon#ireg 7 cls_cnt 0 2006.232.08:02:18.45#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:02:18.57#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:02:18.57#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:02:18.57#ibcon#enter wrdev, iclass 27, count 0 2006.232.08:02:18.57#ibcon#first serial, iclass 27, count 0 2006.232.08:02:18.57#ibcon#enter sib2, iclass 27, count 0 2006.232.08:02:18.57#ibcon#flushed, iclass 27, count 0 2006.232.08:02:18.57#ibcon#about to write, iclass 27, count 0 2006.232.08:02:18.57#ibcon#wrote, iclass 27, count 0 2006.232.08:02:18.57#ibcon#about to read 3, iclass 27, count 0 2006.232.08:02:18.59#ibcon#read 3, iclass 27, count 0 2006.232.08:02:18.59#ibcon#about to read 4, iclass 27, count 0 2006.232.08:02:18.59#ibcon#read 4, iclass 27, count 0 2006.232.08:02:18.59#ibcon#about to read 5, iclass 27, count 0 2006.232.08:02:18.59#ibcon#read 5, iclass 27, count 0 2006.232.08:02:18.59#ibcon#about to read 6, iclass 27, count 0 2006.232.08:02:18.59#ibcon#read 6, iclass 27, count 0 2006.232.08:02:18.59#ibcon#end of sib2, iclass 27, count 0 2006.232.08:02:18.59#ibcon#*mode == 0, iclass 27, count 0 2006.232.08:02:18.59#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.232.08:02:18.59#ibcon#[25=USB\r\n] 2006.232.08:02:18.59#ibcon#*before write, iclass 27, count 0 2006.232.08:02:18.59#ibcon#enter sib2, iclass 27, count 0 2006.232.08:02:18.59#ibcon#flushed, iclass 27, count 0 2006.232.08:02:18.59#ibcon#about to write, iclass 27, count 0 2006.232.08:02:18.59#ibcon#wrote, iclass 27, count 0 2006.232.08:02:18.59#ibcon#about to read 3, iclass 27, count 0 2006.232.08:02:18.62#ibcon#read 3, iclass 27, count 0 2006.232.08:02:18.62#ibcon#about to read 4, iclass 27, count 0 2006.232.08:02:18.62#ibcon#read 4, iclass 27, count 0 2006.232.08:02:18.62#ibcon#about to read 5, iclass 27, count 0 2006.232.08:02:18.62#ibcon#read 5, iclass 27, count 0 2006.232.08:02:18.62#ibcon#about to read 6, iclass 27, count 0 2006.232.08:02:18.62#ibcon#read 6, iclass 27, count 0 2006.232.08:02:18.62#ibcon#end of sib2, iclass 27, count 0 2006.232.08:02:18.62#ibcon#*after write, iclass 27, count 0 2006.232.08:02:18.62#ibcon#*before return 0, iclass 27, count 0 2006.232.08:02:18.62#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:02:18.62#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:02:18.62#ibcon#about to clear, iclass 27 cls_cnt 0 2006.232.08:02:18.62#ibcon#cleared, iclass 27 cls_cnt 0 2006.232.08:02:18.62$vc4f8/valo=3,672.99 2006.232.08:02:18.62#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.232.08:02:18.62#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.232.08:02:18.62#ibcon#ireg 17 cls_cnt 0 2006.232.08:02:18.62#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.232.08:02:18.62#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.232.08:02:18.62#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.232.08:02:18.62#ibcon#enter wrdev, iclass 30, count 0 2006.232.08:02:18.62#ibcon#first serial, iclass 30, count 0 2006.232.08:02:18.62#ibcon#enter sib2, iclass 30, count 0 2006.232.08:02:18.62#ibcon#flushed, iclass 30, count 0 2006.232.08:02:18.62#ibcon#about to write, iclass 30, count 0 2006.232.08:02:18.62#ibcon#wrote, iclass 30, count 0 2006.232.08:02:18.62#ibcon#about to read 3, iclass 30, count 0 2006.232.08:02:18.64#ibcon#read 3, iclass 30, count 0 2006.232.08:02:18.64#ibcon#about to read 4, iclass 30, count 0 2006.232.08:02:18.64#ibcon#read 4, iclass 30, count 0 2006.232.08:02:18.64#ibcon#about to read 5, iclass 30, count 0 2006.232.08:02:18.64#ibcon#read 5, iclass 30, count 0 2006.232.08:02:18.64#ibcon#about to read 6, iclass 30, count 0 2006.232.08:02:18.64#ibcon#read 6, iclass 30, count 0 2006.232.08:02:18.64#ibcon#end of sib2, iclass 30, count 0 2006.232.08:02:18.64#ibcon#*mode == 0, iclass 30, count 0 2006.232.08:02:18.64#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.232.08:02:18.64#ibcon#[26=FRQ=03,672.99\r\n] 2006.232.08:02:18.64#ibcon#*before write, iclass 30, count 0 2006.232.08:02:18.64#ibcon#enter sib2, iclass 30, count 0 2006.232.08:02:18.64#ibcon#flushed, iclass 30, count 0 2006.232.08:02:18.64#ibcon#about to write, iclass 30, count 0 2006.232.08:02:18.64#ibcon#wrote, iclass 30, count 0 2006.232.08:02:18.64#ibcon#about to read 3, iclass 30, count 0 2006.232.08:02:18.68#ibcon#read 3, iclass 30, count 0 2006.232.08:02:18.68#ibcon#about to read 4, iclass 30, count 0 2006.232.08:02:18.68#ibcon#read 4, iclass 30, count 0 2006.232.08:02:18.68#ibcon#about to read 5, iclass 30, count 0 2006.232.08:02:18.68#ibcon#read 5, iclass 30, count 0 2006.232.08:02:18.68#ibcon#about to read 6, iclass 30, count 0 2006.232.08:02:18.68#ibcon#read 6, iclass 30, count 0 2006.232.08:02:18.68#ibcon#end of sib2, iclass 30, count 0 2006.232.08:02:18.68#ibcon#*after write, iclass 30, count 0 2006.232.08:02:18.68#ibcon#*before return 0, iclass 30, count 0 2006.232.08:02:18.68#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.232.08:02:18.68#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.232.08:02:18.68#ibcon#about to clear, iclass 30 cls_cnt 0 2006.232.08:02:18.68#ibcon#cleared, iclass 30 cls_cnt 0 2006.232.08:02:18.68$vc4f8/va=3,8 2006.232.08:02:18.68#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.232.08:02:18.68#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.232.08:02:18.68#ibcon#ireg 11 cls_cnt 2 2006.232.08:02:18.68#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.232.08:02:18.74#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.232.08:02:18.74#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.232.08:02:18.74#ibcon#enter wrdev, iclass 32, count 2 2006.232.08:02:18.74#ibcon#first serial, iclass 32, count 2 2006.232.08:02:18.74#ibcon#enter sib2, iclass 32, count 2 2006.232.08:02:18.74#ibcon#flushed, iclass 32, count 2 2006.232.08:02:18.74#ibcon#about to write, iclass 32, count 2 2006.232.08:02:18.74#ibcon#wrote, iclass 32, count 2 2006.232.08:02:18.74#ibcon#about to read 3, iclass 32, count 2 2006.232.08:02:18.76#ibcon#read 3, iclass 32, count 2 2006.232.08:02:18.76#ibcon#about to read 4, iclass 32, count 2 2006.232.08:02:18.76#ibcon#read 4, iclass 32, count 2 2006.232.08:02:18.76#ibcon#about to read 5, iclass 32, count 2 2006.232.08:02:18.76#ibcon#read 5, iclass 32, count 2 2006.232.08:02:18.76#ibcon#about to read 6, iclass 32, count 2 2006.232.08:02:18.76#ibcon#read 6, iclass 32, count 2 2006.232.08:02:18.76#ibcon#end of sib2, iclass 32, count 2 2006.232.08:02:18.76#ibcon#*mode == 0, iclass 32, count 2 2006.232.08:02:18.76#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.232.08:02:18.76#ibcon#[25=AT03-08\r\n] 2006.232.08:02:18.76#ibcon#*before write, iclass 32, count 2 2006.232.08:02:18.76#ibcon#enter sib2, iclass 32, count 2 2006.232.08:02:18.76#ibcon#flushed, iclass 32, count 2 2006.232.08:02:18.76#ibcon#about to write, iclass 32, count 2 2006.232.08:02:18.76#ibcon#wrote, iclass 32, count 2 2006.232.08:02:18.76#ibcon#about to read 3, iclass 32, count 2 2006.232.08:02:18.79#ibcon#read 3, iclass 32, count 2 2006.232.08:02:18.79#ibcon#about to read 4, iclass 32, count 2 2006.232.08:02:18.79#ibcon#read 4, iclass 32, count 2 2006.232.08:02:18.79#ibcon#about to read 5, iclass 32, count 2 2006.232.08:02:18.79#ibcon#read 5, iclass 32, count 2 2006.232.08:02:18.79#ibcon#about to read 6, iclass 32, count 2 2006.232.08:02:18.79#ibcon#read 6, iclass 32, count 2 2006.232.08:02:18.79#ibcon#end of sib2, iclass 32, count 2 2006.232.08:02:18.79#ibcon#*after write, iclass 32, count 2 2006.232.08:02:18.79#ibcon#*before return 0, iclass 32, count 2 2006.232.08:02:18.79#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.232.08:02:18.79#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.232.08:02:18.79#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.232.08:02:18.79#ibcon#ireg 7 cls_cnt 0 2006.232.08:02:18.79#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.232.08:02:18.91#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.232.08:02:18.91#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.232.08:02:18.91#ibcon#enter wrdev, iclass 32, count 0 2006.232.08:02:18.91#ibcon#first serial, iclass 32, count 0 2006.232.08:02:18.91#ibcon#enter sib2, iclass 32, count 0 2006.232.08:02:18.91#ibcon#flushed, iclass 32, count 0 2006.232.08:02:18.91#ibcon#about to write, iclass 32, count 0 2006.232.08:02:18.91#ibcon#wrote, iclass 32, count 0 2006.232.08:02:18.91#ibcon#about to read 3, iclass 32, count 0 2006.232.08:02:18.93#ibcon#read 3, iclass 32, count 0 2006.232.08:02:18.93#ibcon#about to read 4, iclass 32, count 0 2006.232.08:02:18.93#ibcon#read 4, iclass 32, count 0 2006.232.08:02:18.93#ibcon#about to read 5, iclass 32, count 0 2006.232.08:02:18.93#ibcon#read 5, iclass 32, count 0 2006.232.08:02:18.93#ibcon#about to read 6, iclass 32, count 0 2006.232.08:02:18.93#ibcon#read 6, iclass 32, count 0 2006.232.08:02:18.93#ibcon#end of sib2, iclass 32, count 0 2006.232.08:02:18.93#ibcon#*mode == 0, iclass 32, count 0 2006.232.08:02:18.93#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.232.08:02:18.93#ibcon#[25=USB\r\n] 2006.232.08:02:18.93#ibcon#*before write, iclass 32, count 0 2006.232.08:02:18.93#ibcon#enter sib2, iclass 32, count 0 2006.232.08:02:18.93#ibcon#flushed, iclass 32, count 0 2006.232.08:02:18.93#ibcon#about to write, iclass 32, count 0 2006.232.08:02:18.93#ibcon#wrote, iclass 32, count 0 2006.232.08:02:18.93#ibcon#about to read 3, iclass 32, count 0 2006.232.08:02:18.96#ibcon#read 3, iclass 32, count 0 2006.232.08:02:18.96#ibcon#about to read 4, iclass 32, count 0 2006.232.08:02:18.96#ibcon#read 4, iclass 32, count 0 2006.232.08:02:18.96#ibcon#about to read 5, iclass 32, count 0 2006.232.08:02:18.96#ibcon#read 5, iclass 32, count 0 2006.232.08:02:18.96#ibcon#about to read 6, iclass 32, count 0 2006.232.08:02:18.96#ibcon#read 6, iclass 32, count 0 2006.232.08:02:18.96#ibcon#end of sib2, iclass 32, count 0 2006.232.08:02:18.96#ibcon#*after write, iclass 32, count 0 2006.232.08:02:18.96#ibcon#*before return 0, iclass 32, count 0 2006.232.08:02:18.96#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.232.08:02:18.96#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.232.08:02:18.96#ibcon#about to clear, iclass 32 cls_cnt 0 2006.232.08:02:18.96#ibcon#cleared, iclass 32 cls_cnt 0 2006.232.08:02:18.96$vc4f8/valo=4,832.99 2006.232.08:02:18.96#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.232.08:02:18.96#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.232.08:02:18.96#ibcon#ireg 17 cls_cnt 0 2006.232.08:02:18.96#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.232.08:02:18.96#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.232.08:02:18.96#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.232.08:02:18.96#ibcon#enter wrdev, iclass 34, count 0 2006.232.08:02:18.96#ibcon#first serial, iclass 34, count 0 2006.232.08:02:18.96#ibcon#enter sib2, iclass 34, count 0 2006.232.08:02:18.96#ibcon#flushed, iclass 34, count 0 2006.232.08:02:18.96#ibcon#about to write, iclass 34, count 0 2006.232.08:02:18.96#ibcon#wrote, iclass 34, count 0 2006.232.08:02:18.96#ibcon#about to read 3, iclass 34, count 0 2006.232.08:02:18.98#ibcon#read 3, iclass 34, count 0 2006.232.08:02:18.98#ibcon#about to read 4, iclass 34, count 0 2006.232.08:02:18.98#ibcon#read 4, iclass 34, count 0 2006.232.08:02:18.98#ibcon#about to read 5, iclass 34, count 0 2006.232.08:02:18.98#ibcon#read 5, iclass 34, count 0 2006.232.08:02:18.98#ibcon#about to read 6, iclass 34, count 0 2006.232.08:02:18.98#ibcon#read 6, iclass 34, count 0 2006.232.08:02:18.98#ibcon#end of sib2, iclass 34, count 0 2006.232.08:02:18.98#ibcon#*mode == 0, iclass 34, count 0 2006.232.08:02:18.98#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.232.08:02:18.98#ibcon#[26=FRQ=04,832.99\r\n] 2006.232.08:02:18.98#ibcon#*before write, iclass 34, count 0 2006.232.08:02:18.98#ibcon#enter sib2, iclass 34, count 0 2006.232.08:02:18.98#ibcon#flushed, iclass 34, count 0 2006.232.08:02:18.98#ibcon#about to write, iclass 34, count 0 2006.232.08:02:18.98#ibcon#wrote, iclass 34, count 0 2006.232.08:02:18.98#ibcon#about to read 3, iclass 34, count 0 2006.232.08:02:19.02#ibcon#read 3, iclass 34, count 0 2006.232.08:02:19.02#ibcon#about to read 4, iclass 34, count 0 2006.232.08:02:19.02#ibcon#read 4, iclass 34, count 0 2006.232.08:02:19.02#ibcon#about to read 5, iclass 34, count 0 2006.232.08:02:19.02#ibcon#read 5, iclass 34, count 0 2006.232.08:02:19.02#ibcon#about to read 6, iclass 34, count 0 2006.232.08:02:19.02#ibcon#read 6, iclass 34, count 0 2006.232.08:02:19.02#ibcon#end of sib2, iclass 34, count 0 2006.232.08:02:19.02#ibcon#*after write, iclass 34, count 0 2006.232.08:02:19.02#ibcon#*before return 0, iclass 34, count 0 2006.232.08:02:19.02#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.232.08:02:19.02#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.232.08:02:19.02#ibcon#about to clear, iclass 34 cls_cnt 0 2006.232.08:02:19.02#ibcon#cleared, iclass 34 cls_cnt 0 2006.232.08:02:19.02$vc4f8/va=4,7 2006.232.08:02:19.02#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.232.08:02:19.02#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.232.08:02:19.02#ibcon#ireg 11 cls_cnt 2 2006.232.08:02:19.02#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.232.08:02:19.08#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.232.08:02:19.08#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.232.08:02:19.08#ibcon#enter wrdev, iclass 36, count 2 2006.232.08:02:19.08#ibcon#first serial, iclass 36, count 2 2006.232.08:02:19.08#ibcon#enter sib2, iclass 36, count 2 2006.232.08:02:19.08#ibcon#flushed, iclass 36, count 2 2006.232.08:02:19.08#ibcon#about to write, iclass 36, count 2 2006.232.08:02:19.08#ibcon#wrote, iclass 36, count 2 2006.232.08:02:19.08#ibcon#about to read 3, iclass 36, count 2 2006.232.08:02:19.10#ibcon#read 3, iclass 36, count 2 2006.232.08:02:19.10#ibcon#about to read 4, iclass 36, count 2 2006.232.08:02:19.10#ibcon#read 4, iclass 36, count 2 2006.232.08:02:19.10#ibcon#about to read 5, iclass 36, count 2 2006.232.08:02:19.10#ibcon#read 5, iclass 36, count 2 2006.232.08:02:19.10#ibcon#about to read 6, iclass 36, count 2 2006.232.08:02:19.10#ibcon#read 6, iclass 36, count 2 2006.232.08:02:19.10#ibcon#end of sib2, iclass 36, count 2 2006.232.08:02:19.10#ibcon#*mode == 0, iclass 36, count 2 2006.232.08:02:19.10#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.232.08:02:19.10#ibcon#[25=AT04-07\r\n] 2006.232.08:02:19.10#ibcon#*before write, iclass 36, count 2 2006.232.08:02:19.10#ibcon#enter sib2, iclass 36, count 2 2006.232.08:02:19.10#ibcon#flushed, iclass 36, count 2 2006.232.08:02:19.10#ibcon#about to write, iclass 36, count 2 2006.232.08:02:19.10#ibcon#wrote, iclass 36, count 2 2006.232.08:02:19.10#ibcon#about to read 3, iclass 36, count 2 2006.232.08:02:19.13#ibcon#read 3, iclass 36, count 2 2006.232.08:02:19.13#ibcon#about to read 4, iclass 36, count 2 2006.232.08:02:19.13#ibcon#read 4, iclass 36, count 2 2006.232.08:02:19.13#ibcon#about to read 5, iclass 36, count 2 2006.232.08:02:19.13#ibcon#read 5, iclass 36, count 2 2006.232.08:02:19.13#ibcon#about to read 6, iclass 36, count 2 2006.232.08:02:19.13#ibcon#read 6, iclass 36, count 2 2006.232.08:02:19.13#ibcon#end of sib2, iclass 36, count 2 2006.232.08:02:19.13#ibcon#*after write, iclass 36, count 2 2006.232.08:02:19.13#ibcon#*before return 0, iclass 36, count 2 2006.232.08:02:19.13#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.232.08:02:19.13#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.232.08:02:19.13#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.232.08:02:19.13#ibcon#ireg 7 cls_cnt 0 2006.232.08:02:19.13#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.232.08:02:19.25#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.232.08:02:19.25#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.232.08:02:19.25#ibcon#enter wrdev, iclass 36, count 0 2006.232.08:02:19.25#ibcon#first serial, iclass 36, count 0 2006.232.08:02:19.25#ibcon#enter sib2, iclass 36, count 0 2006.232.08:02:19.25#ibcon#flushed, iclass 36, count 0 2006.232.08:02:19.25#ibcon#about to write, iclass 36, count 0 2006.232.08:02:19.25#ibcon#wrote, iclass 36, count 0 2006.232.08:02:19.25#ibcon#about to read 3, iclass 36, count 0 2006.232.08:02:19.27#ibcon#read 3, iclass 36, count 0 2006.232.08:02:19.27#ibcon#about to read 4, iclass 36, count 0 2006.232.08:02:19.27#ibcon#read 4, iclass 36, count 0 2006.232.08:02:19.27#ibcon#about to read 5, iclass 36, count 0 2006.232.08:02:19.27#ibcon#read 5, iclass 36, count 0 2006.232.08:02:19.27#ibcon#about to read 6, iclass 36, count 0 2006.232.08:02:19.27#ibcon#read 6, iclass 36, count 0 2006.232.08:02:19.27#ibcon#end of sib2, iclass 36, count 0 2006.232.08:02:19.27#ibcon#*mode == 0, iclass 36, count 0 2006.232.08:02:19.27#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.232.08:02:19.27#ibcon#[25=USB\r\n] 2006.232.08:02:19.27#ibcon#*before write, iclass 36, count 0 2006.232.08:02:19.27#ibcon#enter sib2, iclass 36, count 0 2006.232.08:02:19.27#ibcon#flushed, iclass 36, count 0 2006.232.08:02:19.27#ibcon#about to write, iclass 36, count 0 2006.232.08:02:19.27#ibcon#wrote, iclass 36, count 0 2006.232.08:02:19.27#ibcon#about to read 3, iclass 36, count 0 2006.232.08:02:19.30#ibcon#read 3, iclass 36, count 0 2006.232.08:02:19.30#ibcon#about to read 4, iclass 36, count 0 2006.232.08:02:19.30#ibcon#read 4, iclass 36, count 0 2006.232.08:02:19.30#ibcon#about to read 5, iclass 36, count 0 2006.232.08:02:19.30#ibcon#read 5, iclass 36, count 0 2006.232.08:02:19.30#ibcon#about to read 6, iclass 36, count 0 2006.232.08:02:19.30#ibcon#read 6, iclass 36, count 0 2006.232.08:02:19.30#ibcon#end of sib2, iclass 36, count 0 2006.232.08:02:19.30#ibcon#*after write, iclass 36, count 0 2006.232.08:02:19.30#ibcon#*before return 0, iclass 36, count 0 2006.232.08:02:19.30#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.232.08:02:19.30#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.232.08:02:19.30#ibcon#about to clear, iclass 36 cls_cnt 0 2006.232.08:02:19.30#ibcon#cleared, iclass 36 cls_cnt 0 2006.232.08:02:19.30$vc4f8/valo=5,652.99 2006.232.08:02:19.30#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.232.08:02:19.30#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.232.08:02:19.30#ibcon#ireg 17 cls_cnt 0 2006.232.08:02:19.30#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.232.08:02:19.30#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.232.08:02:19.30#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.232.08:02:19.30#ibcon#enter wrdev, iclass 38, count 0 2006.232.08:02:19.30#ibcon#first serial, iclass 38, count 0 2006.232.08:02:19.30#ibcon#enter sib2, iclass 38, count 0 2006.232.08:02:19.30#ibcon#flushed, iclass 38, count 0 2006.232.08:02:19.30#ibcon#about to write, iclass 38, count 0 2006.232.08:02:19.30#ibcon#wrote, iclass 38, count 0 2006.232.08:02:19.30#ibcon#about to read 3, iclass 38, count 0 2006.232.08:02:19.32#ibcon#read 3, iclass 38, count 0 2006.232.08:02:19.32#ibcon#about to read 4, iclass 38, count 0 2006.232.08:02:19.32#ibcon#read 4, iclass 38, count 0 2006.232.08:02:19.32#ibcon#about to read 5, iclass 38, count 0 2006.232.08:02:19.32#ibcon#read 5, iclass 38, count 0 2006.232.08:02:19.32#ibcon#about to read 6, iclass 38, count 0 2006.232.08:02:19.32#ibcon#read 6, iclass 38, count 0 2006.232.08:02:19.32#ibcon#end of sib2, iclass 38, count 0 2006.232.08:02:19.32#ibcon#*mode == 0, iclass 38, count 0 2006.232.08:02:19.32#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.232.08:02:19.32#ibcon#[26=FRQ=05,652.99\r\n] 2006.232.08:02:19.32#ibcon#*before write, iclass 38, count 0 2006.232.08:02:19.32#ibcon#enter sib2, iclass 38, count 0 2006.232.08:02:19.32#ibcon#flushed, iclass 38, count 0 2006.232.08:02:19.32#ibcon#about to write, iclass 38, count 0 2006.232.08:02:19.32#ibcon#wrote, iclass 38, count 0 2006.232.08:02:19.32#ibcon#about to read 3, iclass 38, count 0 2006.232.08:02:19.36#ibcon#read 3, iclass 38, count 0 2006.232.08:02:19.36#ibcon#about to read 4, iclass 38, count 0 2006.232.08:02:19.36#ibcon#read 4, iclass 38, count 0 2006.232.08:02:19.36#ibcon#about to read 5, iclass 38, count 0 2006.232.08:02:19.36#ibcon#read 5, iclass 38, count 0 2006.232.08:02:19.36#ibcon#about to read 6, iclass 38, count 0 2006.232.08:02:19.36#ibcon#read 6, iclass 38, count 0 2006.232.08:02:19.36#ibcon#end of sib2, iclass 38, count 0 2006.232.08:02:19.36#ibcon#*after write, iclass 38, count 0 2006.232.08:02:19.36#ibcon#*before return 0, iclass 38, count 0 2006.232.08:02:19.36#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.232.08:02:19.36#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.232.08:02:19.36#ibcon#about to clear, iclass 38 cls_cnt 0 2006.232.08:02:19.36#ibcon#cleared, iclass 38 cls_cnt 0 2006.232.08:02:19.36$vc4f8/va=5,7 2006.232.08:02:19.36#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.232.08:02:19.36#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.232.08:02:19.36#ibcon#ireg 11 cls_cnt 2 2006.232.08:02:19.36#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.232.08:02:19.42#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.232.08:02:19.42#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.232.08:02:19.42#ibcon#enter wrdev, iclass 40, count 2 2006.232.08:02:19.42#ibcon#first serial, iclass 40, count 2 2006.232.08:02:19.42#ibcon#enter sib2, iclass 40, count 2 2006.232.08:02:19.42#ibcon#flushed, iclass 40, count 2 2006.232.08:02:19.42#ibcon#about to write, iclass 40, count 2 2006.232.08:02:19.42#ibcon#wrote, iclass 40, count 2 2006.232.08:02:19.42#ibcon#about to read 3, iclass 40, count 2 2006.232.08:02:19.44#ibcon#read 3, iclass 40, count 2 2006.232.08:02:19.44#ibcon#about to read 4, iclass 40, count 2 2006.232.08:02:19.44#ibcon#read 4, iclass 40, count 2 2006.232.08:02:19.44#ibcon#about to read 5, iclass 40, count 2 2006.232.08:02:19.44#ibcon#read 5, iclass 40, count 2 2006.232.08:02:19.44#ibcon#about to read 6, iclass 40, count 2 2006.232.08:02:19.44#ibcon#read 6, iclass 40, count 2 2006.232.08:02:19.44#ibcon#end of sib2, iclass 40, count 2 2006.232.08:02:19.44#ibcon#*mode == 0, iclass 40, count 2 2006.232.08:02:19.44#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.232.08:02:19.44#ibcon#[25=AT05-07\r\n] 2006.232.08:02:19.44#ibcon#*before write, iclass 40, count 2 2006.232.08:02:19.44#ibcon#enter sib2, iclass 40, count 2 2006.232.08:02:19.44#ibcon#flushed, iclass 40, count 2 2006.232.08:02:19.44#ibcon#about to write, iclass 40, count 2 2006.232.08:02:19.44#ibcon#wrote, iclass 40, count 2 2006.232.08:02:19.44#ibcon#about to read 3, iclass 40, count 2 2006.232.08:02:19.47#ibcon#read 3, iclass 40, count 2 2006.232.08:02:19.47#ibcon#about to read 4, iclass 40, count 2 2006.232.08:02:19.47#ibcon#read 4, iclass 40, count 2 2006.232.08:02:19.47#ibcon#about to read 5, iclass 40, count 2 2006.232.08:02:19.47#ibcon#read 5, iclass 40, count 2 2006.232.08:02:19.47#ibcon#about to read 6, iclass 40, count 2 2006.232.08:02:19.47#ibcon#read 6, iclass 40, count 2 2006.232.08:02:19.47#ibcon#end of sib2, iclass 40, count 2 2006.232.08:02:19.47#ibcon#*after write, iclass 40, count 2 2006.232.08:02:19.47#ibcon#*before return 0, iclass 40, count 2 2006.232.08:02:19.47#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.232.08:02:19.47#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.232.08:02:19.47#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.232.08:02:19.47#ibcon#ireg 7 cls_cnt 0 2006.232.08:02:19.47#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.232.08:02:19.59#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.232.08:02:19.59#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.232.08:02:19.59#ibcon#enter wrdev, iclass 40, count 0 2006.232.08:02:19.59#ibcon#first serial, iclass 40, count 0 2006.232.08:02:19.59#ibcon#enter sib2, iclass 40, count 0 2006.232.08:02:19.59#ibcon#flushed, iclass 40, count 0 2006.232.08:02:19.59#ibcon#about to write, iclass 40, count 0 2006.232.08:02:19.59#ibcon#wrote, iclass 40, count 0 2006.232.08:02:19.59#ibcon#about to read 3, iclass 40, count 0 2006.232.08:02:19.61#ibcon#read 3, iclass 40, count 0 2006.232.08:02:19.61#ibcon#about to read 4, iclass 40, count 0 2006.232.08:02:19.61#ibcon#read 4, iclass 40, count 0 2006.232.08:02:19.61#ibcon#about to read 5, iclass 40, count 0 2006.232.08:02:19.61#ibcon#read 5, iclass 40, count 0 2006.232.08:02:19.61#ibcon#about to read 6, iclass 40, count 0 2006.232.08:02:19.61#ibcon#read 6, iclass 40, count 0 2006.232.08:02:19.61#ibcon#end of sib2, iclass 40, count 0 2006.232.08:02:19.61#ibcon#*mode == 0, iclass 40, count 0 2006.232.08:02:19.61#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.232.08:02:19.61#ibcon#[25=USB\r\n] 2006.232.08:02:19.61#ibcon#*before write, iclass 40, count 0 2006.232.08:02:19.61#ibcon#enter sib2, iclass 40, count 0 2006.232.08:02:19.61#ibcon#flushed, iclass 40, count 0 2006.232.08:02:19.61#ibcon#about to write, iclass 40, count 0 2006.232.08:02:19.61#ibcon#wrote, iclass 40, count 0 2006.232.08:02:19.61#ibcon#about to read 3, iclass 40, count 0 2006.232.08:02:19.64#ibcon#read 3, iclass 40, count 0 2006.232.08:02:19.64#ibcon#about to read 4, iclass 40, count 0 2006.232.08:02:19.64#ibcon#read 4, iclass 40, count 0 2006.232.08:02:19.64#ibcon#about to read 5, iclass 40, count 0 2006.232.08:02:19.64#ibcon#read 5, iclass 40, count 0 2006.232.08:02:19.64#ibcon#about to read 6, iclass 40, count 0 2006.232.08:02:19.64#ibcon#read 6, iclass 40, count 0 2006.232.08:02:19.64#ibcon#end of sib2, iclass 40, count 0 2006.232.08:02:19.64#ibcon#*after write, iclass 40, count 0 2006.232.08:02:19.64#ibcon#*before return 0, iclass 40, count 0 2006.232.08:02:19.64#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.232.08:02:19.64#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.232.08:02:19.64#ibcon#about to clear, iclass 40 cls_cnt 0 2006.232.08:02:19.64#ibcon#cleared, iclass 40 cls_cnt 0 2006.232.08:02:19.64$vc4f8/valo=6,772.99 2006.232.08:02:19.64#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.232.08:02:19.64#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.232.08:02:19.64#ibcon#ireg 17 cls_cnt 0 2006.232.08:02:19.64#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.232.08:02:19.64#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.232.08:02:19.64#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.232.08:02:19.64#ibcon#enter wrdev, iclass 4, count 0 2006.232.08:02:19.64#ibcon#first serial, iclass 4, count 0 2006.232.08:02:19.64#ibcon#enter sib2, iclass 4, count 0 2006.232.08:02:19.64#ibcon#flushed, iclass 4, count 0 2006.232.08:02:19.64#ibcon#about to write, iclass 4, count 0 2006.232.08:02:19.64#ibcon#wrote, iclass 4, count 0 2006.232.08:02:19.64#ibcon#about to read 3, iclass 4, count 0 2006.232.08:02:19.66#ibcon#read 3, iclass 4, count 0 2006.232.08:02:19.66#ibcon#about to read 4, iclass 4, count 0 2006.232.08:02:19.66#ibcon#read 4, iclass 4, count 0 2006.232.08:02:19.66#ibcon#about to read 5, iclass 4, count 0 2006.232.08:02:19.66#ibcon#read 5, iclass 4, count 0 2006.232.08:02:19.66#ibcon#about to read 6, iclass 4, count 0 2006.232.08:02:19.66#ibcon#read 6, iclass 4, count 0 2006.232.08:02:19.66#ibcon#end of sib2, iclass 4, count 0 2006.232.08:02:19.66#ibcon#*mode == 0, iclass 4, count 0 2006.232.08:02:19.66#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.232.08:02:19.66#ibcon#[26=FRQ=06,772.99\r\n] 2006.232.08:02:19.66#ibcon#*before write, iclass 4, count 0 2006.232.08:02:19.66#ibcon#enter sib2, iclass 4, count 0 2006.232.08:02:19.66#ibcon#flushed, iclass 4, count 0 2006.232.08:02:19.66#ibcon#about to write, iclass 4, count 0 2006.232.08:02:19.66#ibcon#wrote, iclass 4, count 0 2006.232.08:02:19.66#ibcon#about to read 3, iclass 4, count 0 2006.232.08:02:19.70#ibcon#read 3, iclass 4, count 0 2006.232.08:02:19.70#ibcon#about to read 4, iclass 4, count 0 2006.232.08:02:19.70#ibcon#read 4, iclass 4, count 0 2006.232.08:02:19.70#ibcon#about to read 5, iclass 4, count 0 2006.232.08:02:19.70#ibcon#read 5, iclass 4, count 0 2006.232.08:02:19.70#ibcon#about to read 6, iclass 4, count 0 2006.232.08:02:19.70#ibcon#read 6, iclass 4, count 0 2006.232.08:02:19.70#ibcon#end of sib2, iclass 4, count 0 2006.232.08:02:19.70#ibcon#*after write, iclass 4, count 0 2006.232.08:02:19.70#ibcon#*before return 0, iclass 4, count 0 2006.232.08:02:19.70#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.232.08:02:19.70#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.232.08:02:19.70#ibcon#about to clear, iclass 4 cls_cnt 0 2006.232.08:02:19.70#ibcon#cleared, iclass 4 cls_cnt 0 2006.232.08:02:19.70$vc4f8/va=6,6 2006.232.08:02:19.70#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.232.08:02:19.70#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.232.08:02:19.70#ibcon#ireg 11 cls_cnt 2 2006.232.08:02:19.70#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.232.08:02:19.76#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.232.08:02:19.76#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.232.08:02:19.76#ibcon#enter wrdev, iclass 6, count 2 2006.232.08:02:19.76#ibcon#first serial, iclass 6, count 2 2006.232.08:02:19.76#ibcon#enter sib2, iclass 6, count 2 2006.232.08:02:19.76#ibcon#flushed, iclass 6, count 2 2006.232.08:02:19.76#ibcon#about to write, iclass 6, count 2 2006.232.08:02:19.76#ibcon#wrote, iclass 6, count 2 2006.232.08:02:19.76#ibcon#about to read 3, iclass 6, count 2 2006.232.08:02:19.78#ibcon#read 3, iclass 6, count 2 2006.232.08:02:19.78#ibcon#about to read 4, iclass 6, count 2 2006.232.08:02:19.78#ibcon#read 4, iclass 6, count 2 2006.232.08:02:19.78#ibcon#about to read 5, iclass 6, count 2 2006.232.08:02:19.78#ibcon#read 5, iclass 6, count 2 2006.232.08:02:19.78#ibcon#about to read 6, iclass 6, count 2 2006.232.08:02:19.78#ibcon#read 6, iclass 6, count 2 2006.232.08:02:19.78#ibcon#end of sib2, iclass 6, count 2 2006.232.08:02:19.78#ibcon#*mode == 0, iclass 6, count 2 2006.232.08:02:19.78#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.232.08:02:19.78#ibcon#[25=AT06-06\r\n] 2006.232.08:02:19.78#ibcon#*before write, iclass 6, count 2 2006.232.08:02:19.78#ibcon#enter sib2, iclass 6, count 2 2006.232.08:02:19.78#ibcon#flushed, iclass 6, count 2 2006.232.08:02:19.78#ibcon#about to write, iclass 6, count 2 2006.232.08:02:19.78#ibcon#wrote, iclass 6, count 2 2006.232.08:02:19.78#ibcon#about to read 3, iclass 6, count 2 2006.232.08:02:19.81#ibcon#read 3, iclass 6, count 2 2006.232.08:02:19.81#ibcon#about to read 4, iclass 6, count 2 2006.232.08:02:19.81#ibcon#read 4, iclass 6, count 2 2006.232.08:02:19.81#ibcon#about to read 5, iclass 6, count 2 2006.232.08:02:19.81#ibcon#read 5, iclass 6, count 2 2006.232.08:02:19.81#ibcon#about to read 6, iclass 6, count 2 2006.232.08:02:19.81#ibcon#read 6, iclass 6, count 2 2006.232.08:02:19.81#ibcon#end of sib2, iclass 6, count 2 2006.232.08:02:19.81#ibcon#*after write, iclass 6, count 2 2006.232.08:02:19.81#ibcon#*before return 0, iclass 6, count 2 2006.232.08:02:19.81#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.232.08:02:19.81#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.232.08:02:19.81#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.232.08:02:19.81#ibcon#ireg 7 cls_cnt 0 2006.232.08:02:19.81#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.232.08:02:19.93#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.232.08:02:19.93#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.232.08:02:19.93#ibcon#enter wrdev, iclass 6, count 0 2006.232.08:02:19.93#ibcon#first serial, iclass 6, count 0 2006.232.08:02:19.93#ibcon#enter sib2, iclass 6, count 0 2006.232.08:02:19.93#ibcon#flushed, iclass 6, count 0 2006.232.08:02:19.93#ibcon#about to write, iclass 6, count 0 2006.232.08:02:19.93#ibcon#wrote, iclass 6, count 0 2006.232.08:02:19.93#ibcon#about to read 3, iclass 6, count 0 2006.232.08:02:19.95#ibcon#read 3, iclass 6, count 0 2006.232.08:02:19.95#ibcon#about to read 4, iclass 6, count 0 2006.232.08:02:19.95#ibcon#read 4, iclass 6, count 0 2006.232.08:02:19.95#ibcon#about to read 5, iclass 6, count 0 2006.232.08:02:19.95#ibcon#read 5, iclass 6, count 0 2006.232.08:02:19.95#ibcon#about to read 6, iclass 6, count 0 2006.232.08:02:19.95#ibcon#read 6, iclass 6, count 0 2006.232.08:02:19.95#ibcon#end of sib2, iclass 6, count 0 2006.232.08:02:19.95#ibcon#*mode == 0, iclass 6, count 0 2006.232.08:02:19.95#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.232.08:02:19.95#ibcon#[25=USB\r\n] 2006.232.08:02:19.95#ibcon#*before write, iclass 6, count 0 2006.232.08:02:19.95#ibcon#enter sib2, iclass 6, count 0 2006.232.08:02:19.95#ibcon#flushed, iclass 6, count 0 2006.232.08:02:19.95#ibcon#about to write, iclass 6, count 0 2006.232.08:02:19.95#ibcon#wrote, iclass 6, count 0 2006.232.08:02:19.95#ibcon#about to read 3, iclass 6, count 0 2006.232.08:02:19.98#ibcon#read 3, iclass 6, count 0 2006.232.08:02:19.98#ibcon#about to read 4, iclass 6, count 0 2006.232.08:02:19.98#ibcon#read 4, iclass 6, count 0 2006.232.08:02:19.98#ibcon#about to read 5, iclass 6, count 0 2006.232.08:02:19.98#ibcon#read 5, iclass 6, count 0 2006.232.08:02:19.98#ibcon#about to read 6, iclass 6, count 0 2006.232.08:02:19.98#ibcon#read 6, iclass 6, count 0 2006.232.08:02:19.98#ibcon#end of sib2, iclass 6, count 0 2006.232.08:02:19.98#ibcon#*after write, iclass 6, count 0 2006.232.08:02:19.98#ibcon#*before return 0, iclass 6, count 0 2006.232.08:02:19.98#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.232.08:02:19.98#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.232.08:02:19.98#ibcon#about to clear, iclass 6 cls_cnt 0 2006.232.08:02:19.98#ibcon#cleared, iclass 6 cls_cnt 0 2006.232.08:02:19.98$vc4f8/valo=7,832.99 2006.232.08:02:19.98#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.232.08:02:19.98#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.232.08:02:19.98#ibcon#ireg 17 cls_cnt 0 2006.232.08:02:19.98#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.232.08:02:19.98#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.232.08:02:19.98#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.232.08:02:19.98#ibcon#enter wrdev, iclass 10, count 0 2006.232.08:02:19.98#ibcon#first serial, iclass 10, count 0 2006.232.08:02:19.98#ibcon#enter sib2, iclass 10, count 0 2006.232.08:02:19.98#ibcon#flushed, iclass 10, count 0 2006.232.08:02:19.98#ibcon#about to write, iclass 10, count 0 2006.232.08:02:19.98#ibcon#wrote, iclass 10, count 0 2006.232.08:02:19.98#ibcon#about to read 3, iclass 10, count 0 2006.232.08:02:20.00#ibcon#read 3, iclass 10, count 0 2006.232.08:02:20.00#ibcon#about to read 4, iclass 10, count 0 2006.232.08:02:20.00#ibcon#read 4, iclass 10, count 0 2006.232.08:02:20.00#ibcon#about to read 5, iclass 10, count 0 2006.232.08:02:20.00#ibcon#read 5, iclass 10, count 0 2006.232.08:02:20.00#ibcon#about to read 6, iclass 10, count 0 2006.232.08:02:20.00#ibcon#read 6, iclass 10, count 0 2006.232.08:02:20.00#ibcon#end of sib2, iclass 10, count 0 2006.232.08:02:20.00#ibcon#*mode == 0, iclass 10, count 0 2006.232.08:02:20.00#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.232.08:02:20.00#ibcon#[26=FRQ=07,832.99\r\n] 2006.232.08:02:20.00#ibcon#*before write, iclass 10, count 0 2006.232.08:02:20.00#ibcon#enter sib2, iclass 10, count 0 2006.232.08:02:20.00#ibcon#flushed, iclass 10, count 0 2006.232.08:02:20.00#ibcon#about to write, iclass 10, count 0 2006.232.08:02:20.00#ibcon#wrote, iclass 10, count 0 2006.232.08:02:20.00#ibcon#about to read 3, iclass 10, count 0 2006.232.08:02:20.04#ibcon#read 3, iclass 10, count 0 2006.232.08:02:20.04#ibcon#about to read 4, iclass 10, count 0 2006.232.08:02:20.04#ibcon#read 4, iclass 10, count 0 2006.232.08:02:20.04#ibcon#about to read 5, iclass 10, count 0 2006.232.08:02:20.04#ibcon#read 5, iclass 10, count 0 2006.232.08:02:20.04#ibcon#about to read 6, iclass 10, count 0 2006.232.08:02:20.04#ibcon#read 6, iclass 10, count 0 2006.232.08:02:20.04#ibcon#end of sib2, iclass 10, count 0 2006.232.08:02:20.04#ibcon#*after write, iclass 10, count 0 2006.232.08:02:20.04#ibcon#*before return 0, iclass 10, count 0 2006.232.08:02:20.04#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.232.08:02:20.04#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.232.08:02:20.04#ibcon#about to clear, iclass 10 cls_cnt 0 2006.232.08:02:20.04#ibcon#cleared, iclass 10 cls_cnt 0 2006.232.08:02:20.04$vc4f8/va=7,6 2006.232.08:02:20.04#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.232.08:02:20.04#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.232.08:02:20.04#ibcon#ireg 11 cls_cnt 2 2006.232.08:02:20.04#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.232.08:02:20.10#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.232.08:02:20.10#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.232.08:02:20.10#ibcon#enter wrdev, iclass 12, count 2 2006.232.08:02:20.10#ibcon#first serial, iclass 12, count 2 2006.232.08:02:20.10#ibcon#enter sib2, iclass 12, count 2 2006.232.08:02:20.10#ibcon#flushed, iclass 12, count 2 2006.232.08:02:20.10#ibcon#about to write, iclass 12, count 2 2006.232.08:02:20.10#ibcon#wrote, iclass 12, count 2 2006.232.08:02:20.10#ibcon#about to read 3, iclass 12, count 2 2006.232.08:02:20.12#ibcon#read 3, iclass 12, count 2 2006.232.08:02:20.12#ibcon#about to read 4, iclass 12, count 2 2006.232.08:02:20.12#ibcon#read 4, iclass 12, count 2 2006.232.08:02:20.12#ibcon#about to read 5, iclass 12, count 2 2006.232.08:02:20.12#ibcon#read 5, iclass 12, count 2 2006.232.08:02:20.12#ibcon#about to read 6, iclass 12, count 2 2006.232.08:02:20.12#ibcon#read 6, iclass 12, count 2 2006.232.08:02:20.12#ibcon#end of sib2, iclass 12, count 2 2006.232.08:02:20.12#ibcon#*mode == 0, iclass 12, count 2 2006.232.08:02:20.12#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.232.08:02:20.12#ibcon#[25=AT07-06\r\n] 2006.232.08:02:20.12#ibcon#*before write, iclass 12, count 2 2006.232.08:02:20.12#ibcon#enter sib2, iclass 12, count 2 2006.232.08:02:20.12#ibcon#flushed, iclass 12, count 2 2006.232.08:02:20.12#ibcon#about to write, iclass 12, count 2 2006.232.08:02:20.12#ibcon#wrote, iclass 12, count 2 2006.232.08:02:20.12#ibcon#about to read 3, iclass 12, count 2 2006.232.08:02:20.15#ibcon#read 3, iclass 12, count 2 2006.232.08:02:20.15#ibcon#about to read 4, iclass 12, count 2 2006.232.08:02:20.15#ibcon#read 4, iclass 12, count 2 2006.232.08:02:20.15#ibcon#about to read 5, iclass 12, count 2 2006.232.08:02:20.15#ibcon#read 5, iclass 12, count 2 2006.232.08:02:20.15#ibcon#about to read 6, iclass 12, count 2 2006.232.08:02:20.15#ibcon#read 6, iclass 12, count 2 2006.232.08:02:20.15#ibcon#end of sib2, iclass 12, count 2 2006.232.08:02:20.15#ibcon#*after write, iclass 12, count 2 2006.232.08:02:20.15#ibcon#*before return 0, iclass 12, count 2 2006.232.08:02:20.15#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.232.08:02:20.15#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.232.08:02:20.15#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.232.08:02:20.15#ibcon#ireg 7 cls_cnt 0 2006.232.08:02:20.15#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.232.08:02:20.27#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.232.08:02:20.27#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.232.08:02:20.27#ibcon#enter wrdev, iclass 12, count 0 2006.232.08:02:20.27#ibcon#first serial, iclass 12, count 0 2006.232.08:02:20.27#ibcon#enter sib2, iclass 12, count 0 2006.232.08:02:20.27#ibcon#flushed, iclass 12, count 0 2006.232.08:02:20.27#ibcon#about to write, iclass 12, count 0 2006.232.08:02:20.27#ibcon#wrote, iclass 12, count 0 2006.232.08:02:20.27#ibcon#about to read 3, iclass 12, count 0 2006.232.08:02:20.29#ibcon#read 3, iclass 12, count 0 2006.232.08:02:20.29#ibcon#about to read 4, iclass 12, count 0 2006.232.08:02:20.29#ibcon#read 4, iclass 12, count 0 2006.232.08:02:20.29#ibcon#about to read 5, iclass 12, count 0 2006.232.08:02:20.29#ibcon#read 5, iclass 12, count 0 2006.232.08:02:20.29#ibcon#about to read 6, iclass 12, count 0 2006.232.08:02:20.29#ibcon#read 6, iclass 12, count 0 2006.232.08:02:20.29#ibcon#end of sib2, iclass 12, count 0 2006.232.08:02:20.29#ibcon#*mode == 0, iclass 12, count 0 2006.232.08:02:20.29#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.232.08:02:20.29#ibcon#[25=USB\r\n] 2006.232.08:02:20.29#ibcon#*before write, iclass 12, count 0 2006.232.08:02:20.29#ibcon#enter sib2, iclass 12, count 0 2006.232.08:02:20.29#ibcon#flushed, iclass 12, count 0 2006.232.08:02:20.29#ibcon#about to write, iclass 12, count 0 2006.232.08:02:20.29#ibcon#wrote, iclass 12, count 0 2006.232.08:02:20.29#ibcon#about to read 3, iclass 12, count 0 2006.232.08:02:20.32#ibcon#read 3, iclass 12, count 0 2006.232.08:02:20.32#ibcon#about to read 4, iclass 12, count 0 2006.232.08:02:20.32#ibcon#read 4, iclass 12, count 0 2006.232.08:02:20.32#ibcon#about to read 5, iclass 12, count 0 2006.232.08:02:20.32#ibcon#read 5, iclass 12, count 0 2006.232.08:02:20.32#ibcon#about to read 6, iclass 12, count 0 2006.232.08:02:20.32#ibcon#read 6, iclass 12, count 0 2006.232.08:02:20.32#ibcon#end of sib2, iclass 12, count 0 2006.232.08:02:20.32#ibcon#*after write, iclass 12, count 0 2006.232.08:02:20.32#ibcon#*before return 0, iclass 12, count 0 2006.232.08:02:20.32#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.232.08:02:20.32#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.232.08:02:20.32#ibcon#about to clear, iclass 12 cls_cnt 0 2006.232.08:02:20.32#ibcon#cleared, iclass 12 cls_cnt 0 2006.232.08:02:20.32$vc4f8/valo=8,852.99 2006.232.08:02:20.32#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.232.08:02:20.32#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.232.08:02:20.32#ibcon#ireg 17 cls_cnt 0 2006.232.08:02:20.32#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.232.08:02:20.32#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.232.08:02:20.32#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.232.08:02:20.32#ibcon#enter wrdev, iclass 14, count 0 2006.232.08:02:20.32#ibcon#first serial, iclass 14, count 0 2006.232.08:02:20.32#ibcon#enter sib2, iclass 14, count 0 2006.232.08:02:20.32#ibcon#flushed, iclass 14, count 0 2006.232.08:02:20.32#ibcon#about to write, iclass 14, count 0 2006.232.08:02:20.32#ibcon#wrote, iclass 14, count 0 2006.232.08:02:20.32#ibcon#about to read 3, iclass 14, count 0 2006.232.08:02:20.34#ibcon#read 3, iclass 14, count 0 2006.232.08:02:20.34#ibcon#about to read 4, iclass 14, count 0 2006.232.08:02:20.34#ibcon#read 4, iclass 14, count 0 2006.232.08:02:20.34#ibcon#about to read 5, iclass 14, count 0 2006.232.08:02:20.34#ibcon#read 5, iclass 14, count 0 2006.232.08:02:20.34#ibcon#about to read 6, iclass 14, count 0 2006.232.08:02:20.34#ibcon#read 6, iclass 14, count 0 2006.232.08:02:20.34#ibcon#end of sib2, iclass 14, count 0 2006.232.08:02:20.34#ibcon#*mode == 0, iclass 14, count 0 2006.232.08:02:20.34#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.232.08:02:20.34#ibcon#[26=FRQ=08,852.99\r\n] 2006.232.08:02:20.34#ibcon#*before write, iclass 14, count 0 2006.232.08:02:20.34#ibcon#enter sib2, iclass 14, count 0 2006.232.08:02:20.34#ibcon#flushed, iclass 14, count 0 2006.232.08:02:20.34#ibcon#about to write, iclass 14, count 0 2006.232.08:02:20.34#ibcon#wrote, iclass 14, count 0 2006.232.08:02:20.34#ibcon#about to read 3, iclass 14, count 0 2006.232.08:02:20.38#ibcon#read 3, iclass 14, count 0 2006.232.08:02:20.38#ibcon#about to read 4, iclass 14, count 0 2006.232.08:02:20.38#ibcon#read 4, iclass 14, count 0 2006.232.08:02:20.38#ibcon#about to read 5, iclass 14, count 0 2006.232.08:02:20.38#ibcon#read 5, iclass 14, count 0 2006.232.08:02:20.38#ibcon#about to read 6, iclass 14, count 0 2006.232.08:02:20.38#ibcon#read 6, iclass 14, count 0 2006.232.08:02:20.38#ibcon#end of sib2, iclass 14, count 0 2006.232.08:02:20.38#ibcon#*after write, iclass 14, count 0 2006.232.08:02:20.38#ibcon#*before return 0, iclass 14, count 0 2006.232.08:02:20.38#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.232.08:02:20.38#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.232.08:02:20.38#ibcon#about to clear, iclass 14 cls_cnt 0 2006.232.08:02:20.38#ibcon#cleared, iclass 14 cls_cnt 0 2006.232.08:02:20.38$vc4f8/va=8,6 2006.232.08:02:20.38#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.232.08:02:20.38#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.232.08:02:20.38#ibcon#ireg 11 cls_cnt 2 2006.232.08:02:20.38#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.232.08:02:20.44#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.232.08:02:20.44#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.232.08:02:20.44#ibcon#enter wrdev, iclass 16, count 2 2006.232.08:02:20.44#ibcon#first serial, iclass 16, count 2 2006.232.08:02:20.44#ibcon#enter sib2, iclass 16, count 2 2006.232.08:02:20.44#ibcon#flushed, iclass 16, count 2 2006.232.08:02:20.44#ibcon#about to write, iclass 16, count 2 2006.232.08:02:20.44#ibcon#wrote, iclass 16, count 2 2006.232.08:02:20.44#ibcon#about to read 3, iclass 16, count 2 2006.232.08:02:20.46#ibcon#read 3, iclass 16, count 2 2006.232.08:02:20.46#ibcon#about to read 4, iclass 16, count 2 2006.232.08:02:20.46#ibcon#read 4, iclass 16, count 2 2006.232.08:02:20.46#ibcon#about to read 5, iclass 16, count 2 2006.232.08:02:20.46#ibcon#read 5, iclass 16, count 2 2006.232.08:02:20.46#ibcon#about to read 6, iclass 16, count 2 2006.232.08:02:20.46#ibcon#read 6, iclass 16, count 2 2006.232.08:02:20.46#ibcon#end of sib2, iclass 16, count 2 2006.232.08:02:20.46#ibcon#*mode == 0, iclass 16, count 2 2006.232.08:02:20.46#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.232.08:02:20.46#ibcon#[25=AT08-06\r\n] 2006.232.08:02:20.46#ibcon#*before write, iclass 16, count 2 2006.232.08:02:20.46#ibcon#enter sib2, iclass 16, count 2 2006.232.08:02:20.46#ibcon#flushed, iclass 16, count 2 2006.232.08:02:20.46#ibcon#about to write, iclass 16, count 2 2006.232.08:02:20.46#ibcon#wrote, iclass 16, count 2 2006.232.08:02:20.46#ibcon#about to read 3, iclass 16, count 2 2006.232.08:02:20.49#ibcon#read 3, iclass 16, count 2 2006.232.08:02:20.49#ibcon#about to read 4, iclass 16, count 2 2006.232.08:02:20.49#ibcon#read 4, iclass 16, count 2 2006.232.08:02:20.49#ibcon#about to read 5, iclass 16, count 2 2006.232.08:02:20.49#ibcon#read 5, iclass 16, count 2 2006.232.08:02:20.49#ibcon#about to read 6, iclass 16, count 2 2006.232.08:02:20.49#ibcon#read 6, iclass 16, count 2 2006.232.08:02:20.49#ibcon#end of sib2, iclass 16, count 2 2006.232.08:02:20.49#ibcon#*after write, iclass 16, count 2 2006.232.08:02:20.49#ibcon#*before return 0, iclass 16, count 2 2006.232.08:02:20.49#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.232.08:02:20.49#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.232.08:02:20.49#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.232.08:02:20.49#ibcon#ireg 7 cls_cnt 0 2006.232.08:02:20.49#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.232.08:02:20.61#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.232.08:02:20.61#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.232.08:02:20.61#ibcon#enter wrdev, iclass 16, count 0 2006.232.08:02:20.61#ibcon#first serial, iclass 16, count 0 2006.232.08:02:20.61#ibcon#enter sib2, iclass 16, count 0 2006.232.08:02:20.61#ibcon#flushed, iclass 16, count 0 2006.232.08:02:20.61#ibcon#about to write, iclass 16, count 0 2006.232.08:02:20.61#ibcon#wrote, iclass 16, count 0 2006.232.08:02:20.61#ibcon#about to read 3, iclass 16, count 0 2006.232.08:02:20.63#ibcon#read 3, iclass 16, count 0 2006.232.08:02:20.63#ibcon#about to read 4, iclass 16, count 0 2006.232.08:02:20.63#ibcon#read 4, iclass 16, count 0 2006.232.08:02:20.63#ibcon#about to read 5, iclass 16, count 0 2006.232.08:02:20.63#ibcon#read 5, iclass 16, count 0 2006.232.08:02:20.63#ibcon#about to read 6, iclass 16, count 0 2006.232.08:02:20.63#ibcon#read 6, iclass 16, count 0 2006.232.08:02:20.63#ibcon#end of sib2, iclass 16, count 0 2006.232.08:02:20.63#ibcon#*mode == 0, iclass 16, count 0 2006.232.08:02:20.63#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.232.08:02:20.63#ibcon#[25=USB\r\n] 2006.232.08:02:20.63#ibcon#*before write, iclass 16, count 0 2006.232.08:02:20.63#ibcon#enter sib2, iclass 16, count 0 2006.232.08:02:20.63#ibcon#flushed, iclass 16, count 0 2006.232.08:02:20.63#ibcon#about to write, iclass 16, count 0 2006.232.08:02:20.63#ibcon#wrote, iclass 16, count 0 2006.232.08:02:20.63#ibcon#about to read 3, iclass 16, count 0 2006.232.08:02:20.66#ibcon#read 3, iclass 16, count 0 2006.232.08:02:20.66#ibcon#about to read 4, iclass 16, count 0 2006.232.08:02:20.66#ibcon#read 4, iclass 16, count 0 2006.232.08:02:20.66#ibcon#about to read 5, iclass 16, count 0 2006.232.08:02:20.66#ibcon#read 5, iclass 16, count 0 2006.232.08:02:20.66#ibcon#about to read 6, iclass 16, count 0 2006.232.08:02:20.66#ibcon#read 6, iclass 16, count 0 2006.232.08:02:20.66#ibcon#end of sib2, iclass 16, count 0 2006.232.08:02:20.66#ibcon#*after write, iclass 16, count 0 2006.232.08:02:20.66#ibcon#*before return 0, iclass 16, count 0 2006.232.08:02:20.66#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.232.08:02:20.66#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.232.08:02:20.66#ibcon#about to clear, iclass 16 cls_cnt 0 2006.232.08:02:20.66#ibcon#cleared, iclass 16 cls_cnt 0 2006.232.08:02:20.66$vc4f8/vblo=1,632.99 2006.232.08:02:20.66#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.232.08:02:20.66#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.232.08:02:20.66#ibcon#ireg 17 cls_cnt 0 2006.232.08:02:20.66#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.232.08:02:20.66#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.232.08:02:20.66#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.232.08:02:20.66#ibcon#enter wrdev, iclass 18, count 0 2006.232.08:02:20.66#ibcon#first serial, iclass 18, count 0 2006.232.08:02:20.66#ibcon#enter sib2, iclass 18, count 0 2006.232.08:02:20.66#ibcon#flushed, iclass 18, count 0 2006.232.08:02:20.66#ibcon#about to write, iclass 18, count 0 2006.232.08:02:20.66#ibcon#wrote, iclass 18, count 0 2006.232.08:02:20.66#ibcon#about to read 3, iclass 18, count 0 2006.232.08:02:20.68#ibcon#read 3, iclass 18, count 0 2006.232.08:02:20.68#ibcon#about to read 4, iclass 18, count 0 2006.232.08:02:20.68#ibcon#read 4, iclass 18, count 0 2006.232.08:02:20.68#ibcon#about to read 5, iclass 18, count 0 2006.232.08:02:20.68#ibcon#read 5, iclass 18, count 0 2006.232.08:02:20.68#ibcon#about to read 6, iclass 18, count 0 2006.232.08:02:20.68#ibcon#read 6, iclass 18, count 0 2006.232.08:02:20.68#ibcon#end of sib2, iclass 18, count 0 2006.232.08:02:20.68#ibcon#*mode == 0, iclass 18, count 0 2006.232.08:02:20.68#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.232.08:02:20.68#ibcon#[28=FRQ=01,632.99\r\n] 2006.232.08:02:20.68#ibcon#*before write, iclass 18, count 0 2006.232.08:02:20.68#ibcon#enter sib2, iclass 18, count 0 2006.232.08:02:20.68#ibcon#flushed, iclass 18, count 0 2006.232.08:02:20.68#ibcon#about to write, iclass 18, count 0 2006.232.08:02:20.68#ibcon#wrote, iclass 18, count 0 2006.232.08:02:20.68#ibcon#about to read 3, iclass 18, count 0 2006.232.08:02:20.72#ibcon#read 3, iclass 18, count 0 2006.232.08:02:20.72#ibcon#about to read 4, iclass 18, count 0 2006.232.08:02:20.72#ibcon#read 4, iclass 18, count 0 2006.232.08:02:20.72#ibcon#about to read 5, iclass 18, count 0 2006.232.08:02:20.72#ibcon#read 5, iclass 18, count 0 2006.232.08:02:20.72#ibcon#about to read 6, iclass 18, count 0 2006.232.08:02:20.72#ibcon#read 6, iclass 18, count 0 2006.232.08:02:20.72#ibcon#end of sib2, iclass 18, count 0 2006.232.08:02:20.72#ibcon#*after write, iclass 18, count 0 2006.232.08:02:20.72#ibcon#*before return 0, iclass 18, count 0 2006.232.08:02:20.72#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.232.08:02:20.72#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.232.08:02:20.72#ibcon#about to clear, iclass 18 cls_cnt 0 2006.232.08:02:20.72#ibcon#cleared, iclass 18 cls_cnt 0 2006.232.08:02:20.72$vc4f8/vb=1,4 2006.232.08:02:20.72#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.232.08:02:20.72#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.232.08:02:20.72#ibcon#ireg 11 cls_cnt 2 2006.232.08:02:20.72#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.232.08:02:20.72#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.232.08:02:20.72#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.232.08:02:20.72#ibcon#enter wrdev, iclass 20, count 2 2006.232.08:02:20.72#ibcon#first serial, iclass 20, count 2 2006.232.08:02:20.72#ibcon#enter sib2, iclass 20, count 2 2006.232.08:02:20.72#ibcon#flushed, iclass 20, count 2 2006.232.08:02:20.72#ibcon#about to write, iclass 20, count 2 2006.232.08:02:20.72#ibcon#wrote, iclass 20, count 2 2006.232.08:02:20.72#ibcon#about to read 3, iclass 20, count 2 2006.232.08:02:20.74#ibcon#read 3, iclass 20, count 2 2006.232.08:02:20.74#ibcon#about to read 4, iclass 20, count 2 2006.232.08:02:20.74#ibcon#read 4, iclass 20, count 2 2006.232.08:02:20.74#ibcon#about to read 5, iclass 20, count 2 2006.232.08:02:20.74#ibcon#read 5, iclass 20, count 2 2006.232.08:02:20.74#ibcon#about to read 6, iclass 20, count 2 2006.232.08:02:20.74#ibcon#read 6, iclass 20, count 2 2006.232.08:02:20.74#ibcon#end of sib2, iclass 20, count 2 2006.232.08:02:20.74#ibcon#*mode == 0, iclass 20, count 2 2006.232.08:02:20.74#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.232.08:02:20.74#ibcon#[27=AT01-04\r\n] 2006.232.08:02:20.74#ibcon#*before write, iclass 20, count 2 2006.232.08:02:20.74#ibcon#enter sib2, iclass 20, count 2 2006.232.08:02:20.74#ibcon#flushed, iclass 20, count 2 2006.232.08:02:20.74#ibcon#about to write, iclass 20, count 2 2006.232.08:02:20.74#ibcon#wrote, iclass 20, count 2 2006.232.08:02:20.74#ibcon#about to read 3, iclass 20, count 2 2006.232.08:02:20.77#ibcon#read 3, iclass 20, count 2 2006.232.08:02:20.77#ibcon#about to read 4, iclass 20, count 2 2006.232.08:02:20.77#ibcon#read 4, iclass 20, count 2 2006.232.08:02:20.77#ibcon#about to read 5, iclass 20, count 2 2006.232.08:02:20.77#ibcon#read 5, iclass 20, count 2 2006.232.08:02:20.77#ibcon#about to read 6, iclass 20, count 2 2006.232.08:02:20.77#ibcon#read 6, iclass 20, count 2 2006.232.08:02:20.77#ibcon#end of sib2, iclass 20, count 2 2006.232.08:02:20.77#ibcon#*after write, iclass 20, count 2 2006.232.08:02:20.77#ibcon#*before return 0, iclass 20, count 2 2006.232.08:02:20.77#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.232.08:02:20.77#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.232.08:02:20.77#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.232.08:02:20.77#ibcon#ireg 7 cls_cnt 0 2006.232.08:02:20.77#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.232.08:02:20.89#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.232.08:02:20.89#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.232.08:02:20.89#ibcon#enter wrdev, iclass 20, count 0 2006.232.08:02:20.89#ibcon#first serial, iclass 20, count 0 2006.232.08:02:20.89#ibcon#enter sib2, iclass 20, count 0 2006.232.08:02:20.89#ibcon#flushed, iclass 20, count 0 2006.232.08:02:20.89#ibcon#about to write, iclass 20, count 0 2006.232.08:02:20.89#ibcon#wrote, iclass 20, count 0 2006.232.08:02:20.89#ibcon#about to read 3, iclass 20, count 0 2006.232.08:02:20.91#ibcon#read 3, iclass 20, count 0 2006.232.08:02:20.91#ibcon#about to read 4, iclass 20, count 0 2006.232.08:02:20.91#ibcon#read 4, iclass 20, count 0 2006.232.08:02:20.91#ibcon#about to read 5, iclass 20, count 0 2006.232.08:02:20.91#ibcon#read 5, iclass 20, count 0 2006.232.08:02:20.91#ibcon#about to read 6, iclass 20, count 0 2006.232.08:02:20.91#ibcon#read 6, iclass 20, count 0 2006.232.08:02:20.91#ibcon#end of sib2, iclass 20, count 0 2006.232.08:02:20.91#ibcon#*mode == 0, iclass 20, count 0 2006.232.08:02:20.91#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.232.08:02:20.91#ibcon#[27=USB\r\n] 2006.232.08:02:20.91#ibcon#*before write, iclass 20, count 0 2006.232.08:02:20.91#ibcon#enter sib2, iclass 20, count 0 2006.232.08:02:20.91#ibcon#flushed, iclass 20, count 0 2006.232.08:02:20.91#ibcon#about to write, iclass 20, count 0 2006.232.08:02:20.91#ibcon#wrote, iclass 20, count 0 2006.232.08:02:20.91#ibcon#about to read 3, iclass 20, count 0 2006.232.08:02:20.94#ibcon#read 3, iclass 20, count 0 2006.232.08:02:20.94#ibcon#about to read 4, iclass 20, count 0 2006.232.08:02:20.94#ibcon#read 4, iclass 20, count 0 2006.232.08:02:20.94#ibcon#about to read 5, iclass 20, count 0 2006.232.08:02:20.94#ibcon#read 5, iclass 20, count 0 2006.232.08:02:20.94#ibcon#about to read 6, iclass 20, count 0 2006.232.08:02:20.94#ibcon#read 6, iclass 20, count 0 2006.232.08:02:20.94#ibcon#end of sib2, iclass 20, count 0 2006.232.08:02:20.94#ibcon#*after write, iclass 20, count 0 2006.232.08:02:20.94#ibcon#*before return 0, iclass 20, count 0 2006.232.08:02:20.94#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.232.08:02:20.94#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.232.08:02:20.94#ibcon#about to clear, iclass 20 cls_cnt 0 2006.232.08:02:20.94#ibcon#cleared, iclass 20 cls_cnt 0 2006.232.08:02:20.94$vc4f8/vblo=2,640.99 2006.232.08:02:20.94#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.232.08:02:20.94#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.232.08:02:20.94#ibcon#ireg 17 cls_cnt 0 2006.232.08:02:20.94#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.232.08:02:20.94#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.232.08:02:20.94#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.232.08:02:20.94#ibcon#enter wrdev, iclass 22, count 0 2006.232.08:02:20.94#ibcon#first serial, iclass 22, count 0 2006.232.08:02:20.94#ibcon#enter sib2, iclass 22, count 0 2006.232.08:02:20.94#ibcon#flushed, iclass 22, count 0 2006.232.08:02:20.94#ibcon#about to write, iclass 22, count 0 2006.232.08:02:20.94#ibcon#wrote, iclass 22, count 0 2006.232.08:02:20.94#ibcon#about to read 3, iclass 22, count 0 2006.232.08:02:20.96#ibcon#read 3, iclass 22, count 0 2006.232.08:02:20.96#ibcon#about to read 4, iclass 22, count 0 2006.232.08:02:20.96#ibcon#read 4, iclass 22, count 0 2006.232.08:02:20.96#ibcon#about to read 5, iclass 22, count 0 2006.232.08:02:20.96#ibcon#read 5, iclass 22, count 0 2006.232.08:02:20.96#ibcon#about to read 6, iclass 22, count 0 2006.232.08:02:20.96#ibcon#read 6, iclass 22, count 0 2006.232.08:02:20.96#ibcon#end of sib2, iclass 22, count 0 2006.232.08:02:20.96#ibcon#*mode == 0, iclass 22, count 0 2006.232.08:02:20.96#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.232.08:02:20.96#ibcon#[28=FRQ=02,640.99\r\n] 2006.232.08:02:20.96#ibcon#*before write, iclass 22, count 0 2006.232.08:02:20.96#ibcon#enter sib2, iclass 22, count 0 2006.232.08:02:20.96#ibcon#flushed, iclass 22, count 0 2006.232.08:02:20.96#ibcon#about to write, iclass 22, count 0 2006.232.08:02:20.96#ibcon#wrote, iclass 22, count 0 2006.232.08:02:20.96#ibcon#about to read 3, iclass 22, count 0 2006.232.08:02:21.00#ibcon#read 3, iclass 22, count 0 2006.232.08:02:21.00#ibcon#about to read 4, iclass 22, count 0 2006.232.08:02:21.00#ibcon#read 4, iclass 22, count 0 2006.232.08:02:21.00#ibcon#about to read 5, iclass 22, count 0 2006.232.08:02:21.00#ibcon#read 5, iclass 22, count 0 2006.232.08:02:21.00#ibcon#about to read 6, iclass 22, count 0 2006.232.08:02:21.00#ibcon#read 6, iclass 22, count 0 2006.232.08:02:21.00#ibcon#end of sib2, iclass 22, count 0 2006.232.08:02:21.00#ibcon#*after write, iclass 22, count 0 2006.232.08:02:21.00#ibcon#*before return 0, iclass 22, count 0 2006.232.08:02:21.00#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.232.08:02:21.00#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.232.08:02:21.00#ibcon#about to clear, iclass 22 cls_cnt 0 2006.232.08:02:21.00#ibcon#cleared, iclass 22 cls_cnt 0 2006.232.08:02:21.00$vc4f8/vb=2,4 2006.232.08:02:21.00#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.232.08:02:21.00#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.232.08:02:21.00#ibcon#ireg 11 cls_cnt 2 2006.232.08:02:21.00#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.232.08:02:21.06#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.232.08:02:21.06#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.232.08:02:21.06#ibcon#enter wrdev, iclass 24, count 2 2006.232.08:02:21.06#ibcon#first serial, iclass 24, count 2 2006.232.08:02:21.06#ibcon#enter sib2, iclass 24, count 2 2006.232.08:02:21.06#ibcon#flushed, iclass 24, count 2 2006.232.08:02:21.06#ibcon#about to write, iclass 24, count 2 2006.232.08:02:21.06#ibcon#wrote, iclass 24, count 2 2006.232.08:02:21.06#ibcon#about to read 3, iclass 24, count 2 2006.232.08:02:21.08#ibcon#read 3, iclass 24, count 2 2006.232.08:02:21.08#ibcon#about to read 4, iclass 24, count 2 2006.232.08:02:21.08#ibcon#read 4, iclass 24, count 2 2006.232.08:02:21.08#ibcon#about to read 5, iclass 24, count 2 2006.232.08:02:21.08#ibcon#read 5, iclass 24, count 2 2006.232.08:02:21.08#ibcon#about to read 6, iclass 24, count 2 2006.232.08:02:21.08#ibcon#read 6, iclass 24, count 2 2006.232.08:02:21.08#ibcon#end of sib2, iclass 24, count 2 2006.232.08:02:21.08#ibcon#*mode == 0, iclass 24, count 2 2006.232.08:02:21.08#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.232.08:02:21.08#ibcon#[27=AT02-04\r\n] 2006.232.08:02:21.08#ibcon#*before write, iclass 24, count 2 2006.232.08:02:21.08#ibcon#enter sib2, iclass 24, count 2 2006.232.08:02:21.08#ibcon#flushed, iclass 24, count 2 2006.232.08:02:21.08#ibcon#about to write, iclass 24, count 2 2006.232.08:02:21.08#ibcon#wrote, iclass 24, count 2 2006.232.08:02:21.08#ibcon#about to read 3, iclass 24, count 2 2006.232.08:02:21.11#ibcon#read 3, iclass 24, count 2 2006.232.08:02:21.11#ibcon#about to read 4, iclass 24, count 2 2006.232.08:02:21.11#ibcon#read 4, iclass 24, count 2 2006.232.08:02:21.11#ibcon#about to read 5, iclass 24, count 2 2006.232.08:02:21.11#ibcon#read 5, iclass 24, count 2 2006.232.08:02:21.11#ibcon#about to read 6, iclass 24, count 2 2006.232.08:02:21.11#ibcon#read 6, iclass 24, count 2 2006.232.08:02:21.11#ibcon#end of sib2, iclass 24, count 2 2006.232.08:02:21.11#ibcon#*after write, iclass 24, count 2 2006.232.08:02:21.11#ibcon#*before return 0, iclass 24, count 2 2006.232.08:02:21.11#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.232.08:02:21.11#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.232.08:02:21.11#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.232.08:02:21.11#ibcon#ireg 7 cls_cnt 0 2006.232.08:02:21.11#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.232.08:02:21.23#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.232.08:02:21.23#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.232.08:02:21.23#ibcon#enter wrdev, iclass 24, count 0 2006.232.08:02:21.23#ibcon#first serial, iclass 24, count 0 2006.232.08:02:21.23#ibcon#enter sib2, iclass 24, count 0 2006.232.08:02:21.23#ibcon#flushed, iclass 24, count 0 2006.232.08:02:21.23#ibcon#about to write, iclass 24, count 0 2006.232.08:02:21.23#ibcon#wrote, iclass 24, count 0 2006.232.08:02:21.23#ibcon#about to read 3, iclass 24, count 0 2006.232.08:02:21.25#ibcon#read 3, iclass 24, count 0 2006.232.08:02:21.25#ibcon#about to read 4, iclass 24, count 0 2006.232.08:02:21.25#ibcon#read 4, iclass 24, count 0 2006.232.08:02:21.25#ibcon#about to read 5, iclass 24, count 0 2006.232.08:02:21.25#ibcon#read 5, iclass 24, count 0 2006.232.08:02:21.25#ibcon#about to read 6, iclass 24, count 0 2006.232.08:02:21.25#ibcon#read 6, iclass 24, count 0 2006.232.08:02:21.25#ibcon#end of sib2, iclass 24, count 0 2006.232.08:02:21.25#ibcon#*mode == 0, iclass 24, count 0 2006.232.08:02:21.25#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.232.08:02:21.25#ibcon#[27=USB\r\n] 2006.232.08:02:21.25#ibcon#*before write, iclass 24, count 0 2006.232.08:02:21.25#ibcon#enter sib2, iclass 24, count 0 2006.232.08:02:21.25#ibcon#flushed, iclass 24, count 0 2006.232.08:02:21.25#ibcon#about to write, iclass 24, count 0 2006.232.08:02:21.25#ibcon#wrote, iclass 24, count 0 2006.232.08:02:21.25#ibcon#about to read 3, iclass 24, count 0 2006.232.08:02:21.28#ibcon#read 3, iclass 24, count 0 2006.232.08:02:21.28#ibcon#about to read 4, iclass 24, count 0 2006.232.08:02:21.28#ibcon#read 4, iclass 24, count 0 2006.232.08:02:21.28#ibcon#about to read 5, iclass 24, count 0 2006.232.08:02:21.28#ibcon#read 5, iclass 24, count 0 2006.232.08:02:21.28#ibcon#about to read 6, iclass 24, count 0 2006.232.08:02:21.28#ibcon#read 6, iclass 24, count 0 2006.232.08:02:21.28#ibcon#end of sib2, iclass 24, count 0 2006.232.08:02:21.28#ibcon#*after write, iclass 24, count 0 2006.232.08:02:21.28#ibcon#*before return 0, iclass 24, count 0 2006.232.08:02:21.28#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.232.08:02:21.28#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.232.08:02:21.28#ibcon#about to clear, iclass 24 cls_cnt 0 2006.232.08:02:21.28#ibcon#cleared, iclass 24 cls_cnt 0 2006.232.08:02:21.28$vc4f8/vblo=3,656.99 2006.232.08:02:21.28#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.232.08:02:21.28#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.232.08:02:21.28#ibcon#ireg 17 cls_cnt 0 2006.232.08:02:21.28#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.232.08:02:21.28#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.232.08:02:21.28#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.232.08:02:21.28#ibcon#enter wrdev, iclass 26, count 0 2006.232.08:02:21.28#ibcon#first serial, iclass 26, count 0 2006.232.08:02:21.28#ibcon#enter sib2, iclass 26, count 0 2006.232.08:02:21.28#ibcon#flushed, iclass 26, count 0 2006.232.08:02:21.28#ibcon#about to write, iclass 26, count 0 2006.232.08:02:21.28#ibcon#wrote, iclass 26, count 0 2006.232.08:02:21.28#ibcon#about to read 3, iclass 26, count 0 2006.232.08:02:21.30#ibcon#read 3, iclass 26, count 0 2006.232.08:02:21.30#ibcon#about to read 4, iclass 26, count 0 2006.232.08:02:21.30#ibcon#read 4, iclass 26, count 0 2006.232.08:02:21.30#ibcon#about to read 5, iclass 26, count 0 2006.232.08:02:21.30#ibcon#read 5, iclass 26, count 0 2006.232.08:02:21.30#ibcon#about to read 6, iclass 26, count 0 2006.232.08:02:21.30#ibcon#read 6, iclass 26, count 0 2006.232.08:02:21.30#ibcon#end of sib2, iclass 26, count 0 2006.232.08:02:21.30#ibcon#*mode == 0, iclass 26, count 0 2006.232.08:02:21.30#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.232.08:02:21.30#ibcon#[28=FRQ=03,656.99\r\n] 2006.232.08:02:21.30#ibcon#*before write, iclass 26, count 0 2006.232.08:02:21.30#ibcon#enter sib2, iclass 26, count 0 2006.232.08:02:21.30#ibcon#flushed, iclass 26, count 0 2006.232.08:02:21.30#ibcon#about to write, iclass 26, count 0 2006.232.08:02:21.30#ibcon#wrote, iclass 26, count 0 2006.232.08:02:21.30#ibcon#about to read 3, iclass 26, count 0 2006.232.08:02:21.34#ibcon#read 3, iclass 26, count 0 2006.232.08:02:21.34#ibcon#about to read 4, iclass 26, count 0 2006.232.08:02:21.34#ibcon#read 4, iclass 26, count 0 2006.232.08:02:21.34#ibcon#about to read 5, iclass 26, count 0 2006.232.08:02:21.34#ibcon#read 5, iclass 26, count 0 2006.232.08:02:21.34#ibcon#about to read 6, iclass 26, count 0 2006.232.08:02:21.34#ibcon#read 6, iclass 26, count 0 2006.232.08:02:21.34#ibcon#end of sib2, iclass 26, count 0 2006.232.08:02:21.34#ibcon#*after write, iclass 26, count 0 2006.232.08:02:21.34#ibcon#*before return 0, iclass 26, count 0 2006.232.08:02:21.34#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.232.08:02:21.34#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.232.08:02:21.34#ibcon#about to clear, iclass 26 cls_cnt 0 2006.232.08:02:21.34#ibcon#cleared, iclass 26 cls_cnt 0 2006.232.08:02:21.34$vc4f8/vb=3,4 2006.232.08:02:21.34#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.232.08:02:21.34#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.232.08:02:21.34#ibcon#ireg 11 cls_cnt 2 2006.232.08:02:21.34#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.232.08:02:21.40#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.232.08:02:21.40#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.232.08:02:21.40#ibcon#enter wrdev, iclass 28, count 2 2006.232.08:02:21.40#ibcon#first serial, iclass 28, count 2 2006.232.08:02:21.40#ibcon#enter sib2, iclass 28, count 2 2006.232.08:02:21.40#ibcon#flushed, iclass 28, count 2 2006.232.08:02:21.40#ibcon#about to write, iclass 28, count 2 2006.232.08:02:21.40#ibcon#wrote, iclass 28, count 2 2006.232.08:02:21.40#ibcon#about to read 3, iclass 28, count 2 2006.232.08:02:21.42#ibcon#read 3, iclass 28, count 2 2006.232.08:02:21.42#ibcon#about to read 4, iclass 28, count 2 2006.232.08:02:21.42#ibcon#read 4, iclass 28, count 2 2006.232.08:02:21.42#ibcon#about to read 5, iclass 28, count 2 2006.232.08:02:21.42#ibcon#read 5, iclass 28, count 2 2006.232.08:02:21.42#ibcon#about to read 6, iclass 28, count 2 2006.232.08:02:21.42#ibcon#read 6, iclass 28, count 2 2006.232.08:02:21.42#ibcon#end of sib2, iclass 28, count 2 2006.232.08:02:21.42#ibcon#*mode == 0, iclass 28, count 2 2006.232.08:02:21.42#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.232.08:02:21.42#ibcon#[27=AT03-04\r\n] 2006.232.08:02:21.42#ibcon#*before write, iclass 28, count 2 2006.232.08:02:21.42#ibcon#enter sib2, iclass 28, count 2 2006.232.08:02:21.42#ibcon#flushed, iclass 28, count 2 2006.232.08:02:21.42#ibcon#about to write, iclass 28, count 2 2006.232.08:02:21.42#ibcon#wrote, iclass 28, count 2 2006.232.08:02:21.42#ibcon#about to read 3, iclass 28, count 2 2006.232.08:02:21.45#ibcon#read 3, iclass 28, count 2 2006.232.08:02:21.45#ibcon#about to read 4, iclass 28, count 2 2006.232.08:02:21.45#ibcon#read 4, iclass 28, count 2 2006.232.08:02:21.45#ibcon#about to read 5, iclass 28, count 2 2006.232.08:02:21.45#ibcon#read 5, iclass 28, count 2 2006.232.08:02:21.45#ibcon#about to read 6, iclass 28, count 2 2006.232.08:02:21.45#ibcon#read 6, iclass 28, count 2 2006.232.08:02:21.45#ibcon#end of sib2, iclass 28, count 2 2006.232.08:02:21.45#ibcon#*after write, iclass 28, count 2 2006.232.08:02:21.45#ibcon#*before return 0, iclass 28, count 2 2006.232.08:02:21.45#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.232.08:02:21.45#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.232.08:02:21.45#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.232.08:02:21.45#ibcon#ireg 7 cls_cnt 0 2006.232.08:02:21.45#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.232.08:02:21.57#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.232.08:02:21.57#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.232.08:02:21.57#ibcon#enter wrdev, iclass 28, count 0 2006.232.08:02:21.57#ibcon#first serial, iclass 28, count 0 2006.232.08:02:21.57#ibcon#enter sib2, iclass 28, count 0 2006.232.08:02:21.57#ibcon#flushed, iclass 28, count 0 2006.232.08:02:21.57#ibcon#about to write, iclass 28, count 0 2006.232.08:02:21.57#ibcon#wrote, iclass 28, count 0 2006.232.08:02:21.57#ibcon#about to read 3, iclass 28, count 0 2006.232.08:02:21.59#ibcon#read 3, iclass 28, count 0 2006.232.08:02:21.59#ibcon#about to read 4, iclass 28, count 0 2006.232.08:02:21.59#ibcon#read 4, iclass 28, count 0 2006.232.08:02:21.59#ibcon#about to read 5, iclass 28, count 0 2006.232.08:02:21.59#ibcon#read 5, iclass 28, count 0 2006.232.08:02:21.59#ibcon#about to read 6, iclass 28, count 0 2006.232.08:02:21.59#ibcon#read 6, iclass 28, count 0 2006.232.08:02:21.59#ibcon#end of sib2, iclass 28, count 0 2006.232.08:02:21.59#ibcon#*mode == 0, iclass 28, count 0 2006.232.08:02:21.59#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.232.08:02:21.59#ibcon#[27=USB\r\n] 2006.232.08:02:21.59#ibcon#*before write, iclass 28, count 0 2006.232.08:02:21.59#ibcon#enter sib2, iclass 28, count 0 2006.232.08:02:21.59#ibcon#flushed, iclass 28, count 0 2006.232.08:02:21.59#ibcon#about to write, iclass 28, count 0 2006.232.08:02:21.59#ibcon#wrote, iclass 28, count 0 2006.232.08:02:21.59#ibcon#about to read 3, iclass 28, count 0 2006.232.08:02:21.62#ibcon#read 3, iclass 28, count 0 2006.232.08:02:21.62#ibcon#about to read 4, iclass 28, count 0 2006.232.08:02:21.62#ibcon#read 4, iclass 28, count 0 2006.232.08:02:21.62#ibcon#about to read 5, iclass 28, count 0 2006.232.08:02:21.62#ibcon#read 5, iclass 28, count 0 2006.232.08:02:21.62#ibcon#about to read 6, iclass 28, count 0 2006.232.08:02:21.62#ibcon#read 6, iclass 28, count 0 2006.232.08:02:21.62#ibcon#end of sib2, iclass 28, count 0 2006.232.08:02:21.62#ibcon#*after write, iclass 28, count 0 2006.232.08:02:21.62#ibcon#*before return 0, iclass 28, count 0 2006.232.08:02:21.62#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.232.08:02:21.62#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.232.08:02:21.62#ibcon#about to clear, iclass 28 cls_cnt 0 2006.232.08:02:21.62#ibcon#cleared, iclass 28 cls_cnt 0 2006.232.08:02:21.62$vc4f8/vblo=4,712.99 2006.232.08:02:21.62#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.232.08:02:21.62#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.232.08:02:21.62#ibcon#ireg 17 cls_cnt 0 2006.232.08:02:21.62#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.232.08:02:21.62#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.232.08:02:21.62#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.232.08:02:21.62#ibcon#enter wrdev, iclass 30, count 0 2006.232.08:02:21.62#ibcon#first serial, iclass 30, count 0 2006.232.08:02:21.62#ibcon#enter sib2, iclass 30, count 0 2006.232.08:02:21.62#ibcon#flushed, iclass 30, count 0 2006.232.08:02:21.62#ibcon#about to write, iclass 30, count 0 2006.232.08:02:21.62#ibcon#wrote, iclass 30, count 0 2006.232.08:02:21.62#ibcon#about to read 3, iclass 30, count 0 2006.232.08:02:21.64#ibcon#read 3, iclass 30, count 0 2006.232.08:02:21.64#ibcon#about to read 4, iclass 30, count 0 2006.232.08:02:21.64#ibcon#read 4, iclass 30, count 0 2006.232.08:02:21.64#ibcon#about to read 5, iclass 30, count 0 2006.232.08:02:21.64#ibcon#read 5, iclass 30, count 0 2006.232.08:02:21.64#ibcon#about to read 6, iclass 30, count 0 2006.232.08:02:21.64#ibcon#read 6, iclass 30, count 0 2006.232.08:02:21.64#ibcon#end of sib2, iclass 30, count 0 2006.232.08:02:21.64#ibcon#*mode == 0, iclass 30, count 0 2006.232.08:02:21.64#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.232.08:02:21.64#ibcon#[28=FRQ=04,712.99\r\n] 2006.232.08:02:21.64#ibcon#*before write, iclass 30, count 0 2006.232.08:02:21.64#ibcon#enter sib2, iclass 30, count 0 2006.232.08:02:21.64#ibcon#flushed, iclass 30, count 0 2006.232.08:02:21.64#ibcon#about to write, iclass 30, count 0 2006.232.08:02:21.64#ibcon#wrote, iclass 30, count 0 2006.232.08:02:21.64#ibcon#about to read 3, iclass 30, count 0 2006.232.08:02:21.68#ibcon#read 3, iclass 30, count 0 2006.232.08:02:21.68#ibcon#about to read 4, iclass 30, count 0 2006.232.08:02:21.68#ibcon#read 4, iclass 30, count 0 2006.232.08:02:21.68#ibcon#about to read 5, iclass 30, count 0 2006.232.08:02:21.68#ibcon#read 5, iclass 30, count 0 2006.232.08:02:21.68#ibcon#about to read 6, iclass 30, count 0 2006.232.08:02:21.68#ibcon#read 6, iclass 30, count 0 2006.232.08:02:21.68#ibcon#end of sib2, iclass 30, count 0 2006.232.08:02:21.68#ibcon#*after write, iclass 30, count 0 2006.232.08:02:21.68#ibcon#*before return 0, iclass 30, count 0 2006.232.08:02:21.68#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.232.08:02:21.68#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.232.08:02:21.68#ibcon#about to clear, iclass 30 cls_cnt 0 2006.232.08:02:21.68#ibcon#cleared, iclass 30 cls_cnt 0 2006.232.08:02:21.68$vc4f8/vb=4,4 2006.232.08:02:21.68#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.232.08:02:21.68#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.232.08:02:21.68#ibcon#ireg 11 cls_cnt 2 2006.232.08:02:21.68#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.232.08:02:21.74#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.232.08:02:21.74#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.232.08:02:21.74#ibcon#enter wrdev, iclass 32, count 2 2006.232.08:02:21.74#ibcon#first serial, iclass 32, count 2 2006.232.08:02:21.74#ibcon#enter sib2, iclass 32, count 2 2006.232.08:02:21.74#ibcon#flushed, iclass 32, count 2 2006.232.08:02:21.74#ibcon#about to write, iclass 32, count 2 2006.232.08:02:21.74#ibcon#wrote, iclass 32, count 2 2006.232.08:02:21.74#ibcon#about to read 3, iclass 32, count 2 2006.232.08:02:21.76#ibcon#read 3, iclass 32, count 2 2006.232.08:02:21.76#ibcon#about to read 4, iclass 32, count 2 2006.232.08:02:21.76#ibcon#read 4, iclass 32, count 2 2006.232.08:02:21.76#ibcon#about to read 5, iclass 32, count 2 2006.232.08:02:21.76#ibcon#read 5, iclass 32, count 2 2006.232.08:02:21.76#ibcon#about to read 6, iclass 32, count 2 2006.232.08:02:21.76#ibcon#read 6, iclass 32, count 2 2006.232.08:02:21.76#ibcon#end of sib2, iclass 32, count 2 2006.232.08:02:21.76#ibcon#*mode == 0, iclass 32, count 2 2006.232.08:02:21.76#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.232.08:02:21.76#ibcon#[27=AT04-04\r\n] 2006.232.08:02:21.76#ibcon#*before write, iclass 32, count 2 2006.232.08:02:21.76#ibcon#enter sib2, iclass 32, count 2 2006.232.08:02:21.76#ibcon#flushed, iclass 32, count 2 2006.232.08:02:21.76#ibcon#about to write, iclass 32, count 2 2006.232.08:02:21.76#ibcon#wrote, iclass 32, count 2 2006.232.08:02:21.76#ibcon#about to read 3, iclass 32, count 2 2006.232.08:02:21.79#ibcon#read 3, iclass 32, count 2 2006.232.08:02:21.79#ibcon#about to read 4, iclass 32, count 2 2006.232.08:02:21.79#ibcon#read 4, iclass 32, count 2 2006.232.08:02:21.79#ibcon#about to read 5, iclass 32, count 2 2006.232.08:02:21.79#ibcon#read 5, iclass 32, count 2 2006.232.08:02:21.79#ibcon#about to read 6, iclass 32, count 2 2006.232.08:02:21.79#ibcon#read 6, iclass 32, count 2 2006.232.08:02:21.79#ibcon#end of sib2, iclass 32, count 2 2006.232.08:02:21.79#ibcon#*after write, iclass 32, count 2 2006.232.08:02:21.79#ibcon#*before return 0, iclass 32, count 2 2006.232.08:02:21.79#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.232.08:02:21.79#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.232.08:02:21.79#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.232.08:02:21.79#ibcon#ireg 7 cls_cnt 0 2006.232.08:02:21.79#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.232.08:02:21.91#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.232.08:02:21.91#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.232.08:02:21.91#ibcon#enter wrdev, iclass 32, count 0 2006.232.08:02:21.91#ibcon#first serial, iclass 32, count 0 2006.232.08:02:21.91#ibcon#enter sib2, iclass 32, count 0 2006.232.08:02:21.91#ibcon#flushed, iclass 32, count 0 2006.232.08:02:21.91#ibcon#about to write, iclass 32, count 0 2006.232.08:02:21.91#ibcon#wrote, iclass 32, count 0 2006.232.08:02:21.91#ibcon#about to read 3, iclass 32, count 0 2006.232.08:02:21.93#ibcon#read 3, iclass 32, count 0 2006.232.08:02:21.93#ibcon#about to read 4, iclass 32, count 0 2006.232.08:02:21.93#ibcon#read 4, iclass 32, count 0 2006.232.08:02:21.93#ibcon#about to read 5, iclass 32, count 0 2006.232.08:02:21.93#ibcon#read 5, iclass 32, count 0 2006.232.08:02:21.93#ibcon#about to read 6, iclass 32, count 0 2006.232.08:02:21.93#ibcon#read 6, iclass 32, count 0 2006.232.08:02:21.93#ibcon#end of sib2, iclass 32, count 0 2006.232.08:02:21.93#ibcon#*mode == 0, iclass 32, count 0 2006.232.08:02:21.93#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.232.08:02:21.93#ibcon#[27=USB\r\n] 2006.232.08:02:21.93#ibcon#*before write, iclass 32, count 0 2006.232.08:02:21.93#ibcon#enter sib2, iclass 32, count 0 2006.232.08:02:21.93#ibcon#flushed, iclass 32, count 0 2006.232.08:02:21.93#ibcon#about to write, iclass 32, count 0 2006.232.08:02:21.93#ibcon#wrote, iclass 32, count 0 2006.232.08:02:21.93#ibcon#about to read 3, iclass 32, count 0 2006.232.08:02:21.96#ibcon#read 3, iclass 32, count 0 2006.232.08:02:21.96#ibcon#about to read 4, iclass 32, count 0 2006.232.08:02:21.96#ibcon#read 4, iclass 32, count 0 2006.232.08:02:21.96#ibcon#about to read 5, iclass 32, count 0 2006.232.08:02:21.96#ibcon#read 5, iclass 32, count 0 2006.232.08:02:21.96#ibcon#about to read 6, iclass 32, count 0 2006.232.08:02:21.96#ibcon#read 6, iclass 32, count 0 2006.232.08:02:21.96#ibcon#end of sib2, iclass 32, count 0 2006.232.08:02:21.96#ibcon#*after write, iclass 32, count 0 2006.232.08:02:21.96#ibcon#*before return 0, iclass 32, count 0 2006.232.08:02:21.96#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.232.08:02:21.96#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.232.08:02:21.96#ibcon#about to clear, iclass 32 cls_cnt 0 2006.232.08:02:21.96#ibcon#cleared, iclass 32 cls_cnt 0 2006.232.08:02:21.96$vc4f8/vblo=5,744.99 2006.232.08:02:21.96#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.232.08:02:21.96#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.232.08:02:21.96#ibcon#ireg 17 cls_cnt 0 2006.232.08:02:21.96#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.232.08:02:21.96#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.232.08:02:21.96#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.232.08:02:21.96#ibcon#enter wrdev, iclass 34, count 0 2006.232.08:02:21.96#ibcon#first serial, iclass 34, count 0 2006.232.08:02:21.96#ibcon#enter sib2, iclass 34, count 0 2006.232.08:02:21.96#ibcon#flushed, iclass 34, count 0 2006.232.08:02:21.96#ibcon#about to write, iclass 34, count 0 2006.232.08:02:21.96#ibcon#wrote, iclass 34, count 0 2006.232.08:02:21.96#ibcon#about to read 3, iclass 34, count 0 2006.232.08:02:21.98#ibcon#read 3, iclass 34, count 0 2006.232.08:02:21.98#ibcon#about to read 4, iclass 34, count 0 2006.232.08:02:21.98#ibcon#read 4, iclass 34, count 0 2006.232.08:02:21.98#ibcon#about to read 5, iclass 34, count 0 2006.232.08:02:21.98#ibcon#read 5, iclass 34, count 0 2006.232.08:02:21.98#ibcon#about to read 6, iclass 34, count 0 2006.232.08:02:21.98#ibcon#read 6, iclass 34, count 0 2006.232.08:02:21.98#ibcon#end of sib2, iclass 34, count 0 2006.232.08:02:21.98#ibcon#*mode == 0, iclass 34, count 0 2006.232.08:02:21.98#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.232.08:02:21.98#ibcon#[28=FRQ=05,744.99\r\n] 2006.232.08:02:21.98#ibcon#*before write, iclass 34, count 0 2006.232.08:02:21.98#ibcon#enter sib2, iclass 34, count 0 2006.232.08:02:21.98#ibcon#flushed, iclass 34, count 0 2006.232.08:02:21.98#ibcon#about to write, iclass 34, count 0 2006.232.08:02:21.98#ibcon#wrote, iclass 34, count 0 2006.232.08:02:21.98#ibcon#about to read 3, iclass 34, count 0 2006.232.08:02:22.02#ibcon#read 3, iclass 34, count 0 2006.232.08:02:22.02#ibcon#about to read 4, iclass 34, count 0 2006.232.08:02:22.02#ibcon#read 4, iclass 34, count 0 2006.232.08:02:22.02#ibcon#about to read 5, iclass 34, count 0 2006.232.08:02:22.02#ibcon#read 5, iclass 34, count 0 2006.232.08:02:22.02#ibcon#about to read 6, iclass 34, count 0 2006.232.08:02:22.02#ibcon#read 6, iclass 34, count 0 2006.232.08:02:22.02#ibcon#end of sib2, iclass 34, count 0 2006.232.08:02:22.02#ibcon#*after write, iclass 34, count 0 2006.232.08:02:22.02#ibcon#*before return 0, iclass 34, count 0 2006.232.08:02:22.02#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.232.08:02:22.02#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.232.08:02:22.02#ibcon#about to clear, iclass 34 cls_cnt 0 2006.232.08:02:22.02#ibcon#cleared, iclass 34 cls_cnt 0 2006.232.08:02:22.02$vc4f8/vb=5,3 2006.232.08:02:22.02#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.232.08:02:22.02#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.232.08:02:22.02#ibcon#ireg 11 cls_cnt 2 2006.232.08:02:22.02#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.232.08:02:22.08#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.232.08:02:22.08#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.232.08:02:22.08#ibcon#enter wrdev, iclass 36, count 2 2006.232.08:02:22.08#ibcon#first serial, iclass 36, count 2 2006.232.08:02:22.08#ibcon#enter sib2, iclass 36, count 2 2006.232.08:02:22.08#ibcon#flushed, iclass 36, count 2 2006.232.08:02:22.08#ibcon#about to write, iclass 36, count 2 2006.232.08:02:22.08#ibcon#wrote, iclass 36, count 2 2006.232.08:02:22.08#ibcon#about to read 3, iclass 36, count 2 2006.232.08:02:22.10#ibcon#read 3, iclass 36, count 2 2006.232.08:02:22.10#ibcon#about to read 4, iclass 36, count 2 2006.232.08:02:22.10#ibcon#read 4, iclass 36, count 2 2006.232.08:02:22.10#ibcon#about to read 5, iclass 36, count 2 2006.232.08:02:22.10#ibcon#read 5, iclass 36, count 2 2006.232.08:02:22.10#ibcon#about to read 6, iclass 36, count 2 2006.232.08:02:22.10#ibcon#read 6, iclass 36, count 2 2006.232.08:02:22.10#ibcon#end of sib2, iclass 36, count 2 2006.232.08:02:22.10#ibcon#*mode == 0, iclass 36, count 2 2006.232.08:02:22.10#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.232.08:02:22.10#ibcon#[27=AT05-03\r\n] 2006.232.08:02:22.10#ibcon#*before write, iclass 36, count 2 2006.232.08:02:22.10#ibcon#enter sib2, iclass 36, count 2 2006.232.08:02:22.10#ibcon#flushed, iclass 36, count 2 2006.232.08:02:22.10#ibcon#about to write, iclass 36, count 2 2006.232.08:02:22.10#ibcon#wrote, iclass 36, count 2 2006.232.08:02:22.10#ibcon#about to read 3, iclass 36, count 2 2006.232.08:02:22.13#ibcon#read 3, iclass 36, count 2 2006.232.08:02:22.13#ibcon#about to read 4, iclass 36, count 2 2006.232.08:02:22.13#ibcon#read 4, iclass 36, count 2 2006.232.08:02:22.13#ibcon#about to read 5, iclass 36, count 2 2006.232.08:02:22.13#ibcon#read 5, iclass 36, count 2 2006.232.08:02:22.13#ibcon#about to read 6, iclass 36, count 2 2006.232.08:02:22.13#ibcon#read 6, iclass 36, count 2 2006.232.08:02:22.13#ibcon#end of sib2, iclass 36, count 2 2006.232.08:02:22.13#ibcon#*after write, iclass 36, count 2 2006.232.08:02:22.13#ibcon#*before return 0, iclass 36, count 2 2006.232.08:02:22.13#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.232.08:02:22.13#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.232.08:02:22.13#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.232.08:02:22.13#ibcon#ireg 7 cls_cnt 0 2006.232.08:02:22.13#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.232.08:02:22.25#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.232.08:02:22.25#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.232.08:02:22.25#ibcon#enter wrdev, iclass 36, count 0 2006.232.08:02:22.25#ibcon#first serial, iclass 36, count 0 2006.232.08:02:22.25#ibcon#enter sib2, iclass 36, count 0 2006.232.08:02:22.25#ibcon#flushed, iclass 36, count 0 2006.232.08:02:22.25#ibcon#about to write, iclass 36, count 0 2006.232.08:02:22.25#ibcon#wrote, iclass 36, count 0 2006.232.08:02:22.25#ibcon#about to read 3, iclass 36, count 0 2006.232.08:02:22.27#ibcon#read 3, iclass 36, count 0 2006.232.08:02:22.27#ibcon#about to read 4, iclass 36, count 0 2006.232.08:02:22.27#ibcon#read 4, iclass 36, count 0 2006.232.08:02:22.27#ibcon#about to read 5, iclass 36, count 0 2006.232.08:02:22.27#ibcon#read 5, iclass 36, count 0 2006.232.08:02:22.27#ibcon#about to read 6, iclass 36, count 0 2006.232.08:02:22.27#ibcon#read 6, iclass 36, count 0 2006.232.08:02:22.27#ibcon#end of sib2, iclass 36, count 0 2006.232.08:02:22.27#ibcon#*mode == 0, iclass 36, count 0 2006.232.08:02:22.27#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.232.08:02:22.27#ibcon#[27=USB\r\n] 2006.232.08:02:22.27#ibcon#*before write, iclass 36, count 0 2006.232.08:02:22.27#ibcon#enter sib2, iclass 36, count 0 2006.232.08:02:22.27#ibcon#flushed, iclass 36, count 0 2006.232.08:02:22.27#ibcon#about to write, iclass 36, count 0 2006.232.08:02:22.27#ibcon#wrote, iclass 36, count 0 2006.232.08:02:22.27#ibcon#about to read 3, iclass 36, count 0 2006.232.08:02:22.30#ibcon#read 3, iclass 36, count 0 2006.232.08:02:22.30#ibcon#about to read 4, iclass 36, count 0 2006.232.08:02:22.30#ibcon#read 4, iclass 36, count 0 2006.232.08:02:22.30#ibcon#about to read 5, iclass 36, count 0 2006.232.08:02:22.30#ibcon#read 5, iclass 36, count 0 2006.232.08:02:22.30#ibcon#about to read 6, iclass 36, count 0 2006.232.08:02:22.30#ibcon#read 6, iclass 36, count 0 2006.232.08:02:22.30#ibcon#end of sib2, iclass 36, count 0 2006.232.08:02:22.30#ibcon#*after write, iclass 36, count 0 2006.232.08:02:22.30#ibcon#*before return 0, iclass 36, count 0 2006.232.08:02:22.30#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.232.08:02:22.30#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.232.08:02:22.30#ibcon#about to clear, iclass 36 cls_cnt 0 2006.232.08:02:22.30#ibcon#cleared, iclass 36 cls_cnt 0 2006.232.08:02:22.30$vc4f8/vblo=6,752.99 2006.232.08:02:22.30#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.232.08:02:22.30#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.232.08:02:22.30#ibcon#ireg 17 cls_cnt 0 2006.232.08:02:22.30#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.232.08:02:22.30#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.232.08:02:22.30#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.232.08:02:22.30#ibcon#enter wrdev, iclass 38, count 0 2006.232.08:02:22.30#ibcon#first serial, iclass 38, count 0 2006.232.08:02:22.30#ibcon#enter sib2, iclass 38, count 0 2006.232.08:02:22.30#ibcon#flushed, iclass 38, count 0 2006.232.08:02:22.30#ibcon#about to write, iclass 38, count 0 2006.232.08:02:22.30#ibcon#wrote, iclass 38, count 0 2006.232.08:02:22.30#ibcon#about to read 3, iclass 38, count 0 2006.232.08:02:22.32#ibcon#read 3, iclass 38, count 0 2006.232.08:02:22.32#ibcon#about to read 4, iclass 38, count 0 2006.232.08:02:22.32#ibcon#read 4, iclass 38, count 0 2006.232.08:02:22.32#ibcon#about to read 5, iclass 38, count 0 2006.232.08:02:22.32#ibcon#read 5, iclass 38, count 0 2006.232.08:02:22.32#ibcon#about to read 6, iclass 38, count 0 2006.232.08:02:22.32#ibcon#read 6, iclass 38, count 0 2006.232.08:02:22.32#ibcon#end of sib2, iclass 38, count 0 2006.232.08:02:22.32#ibcon#*mode == 0, iclass 38, count 0 2006.232.08:02:22.32#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.232.08:02:22.32#ibcon#[28=FRQ=06,752.99\r\n] 2006.232.08:02:22.32#ibcon#*before write, iclass 38, count 0 2006.232.08:02:22.32#ibcon#enter sib2, iclass 38, count 0 2006.232.08:02:22.32#ibcon#flushed, iclass 38, count 0 2006.232.08:02:22.32#ibcon#about to write, iclass 38, count 0 2006.232.08:02:22.32#ibcon#wrote, iclass 38, count 0 2006.232.08:02:22.32#ibcon#about to read 3, iclass 38, count 0 2006.232.08:02:22.36#ibcon#read 3, iclass 38, count 0 2006.232.08:02:22.36#ibcon#about to read 4, iclass 38, count 0 2006.232.08:02:22.36#ibcon#read 4, iclass 38, count 0 2006.232.08:02:22.36#ibcon#about to read 5, iclass 38, count 0 2006.232.08:02:22.36#ibcon#read 5, iclass 38, count 0 2006.232.08:02:22.36#ibcon#about to read 6, iclass 38, count 0 2006.232.08:02:22.36#ibcon#read 6, iclass 38, count 0 2006.232.08:02:22.36#ibcon#end of sib2, iclass 38, count 0 2006.232.08:02:22.36#ibcon#*after write, iclass 38, count 0 2006.232.08:02:22.36#ibcon#*before return 0, iclass 38, count 0 2006.232.08:02:22.36#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.232.08:02:22.36#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.232.08:02:22.36#ibcon#about to clear, iclass 38 cls_cnt 0 2006.232.08:02:22.36#ibcon#cleared, iclass 38 cls_cnt 0 2006.232.08:02:22.36$vc4f8/vb=6,4 2006.232.08:02:22.36#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.232.08:02:22.36#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.232.08:02:22.36#ibcon#ireg 11 cls_cnt 2 2006.232.08:02:22.36#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.232.08:02:22.42#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.232.08:02:22.42#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.232.08:02:22.42#ibcon#enter wrdev, iclass 40, count 2 2006.232.08:02:22.42#ibcon#first serial, iclass 40, count 2 2006.232.08:02:22.42#ibcon#enter sib2, iclass 40, count 2 2006.232.08:02:22.42#ibcon#flushed, iclass 40, count 2 2006.232.08:02:22.42#ibcon#about to write, iclass 40, count 2 2006.232.08:02:22.42#ibcon#wrote, iclass 40, count 2 2006.232.08:02:22.42#ibcon#about to read 3, iclass 40, count 2 2006.232.08:02:22.44#ibcon#read 3, iclass 40, count 2 2006.232.08:02:22.44#ibcon#about to read 4, iclass 40, count 2 2006.232.08:02:22.44#ibcon#read 4, iclass 40, count 2 2006.232.08:02:22.44#ibcon#about to read 5, iclass 40, count 2 2006.232.08:02:22.44#ibcon#read 5, iclass 40, count 2 2006.232.08:02:22.44#ibcon#about to read 6, iclass 40, count 2 2006.232.08:02:22.44#ibcon#read 6, iclass 40, count 2 2006.232.08:02:22.44#ibcon#end of sib2, iclass 40, count 2 2006.232.08:02:22.44#ibcon#*mode == 0, iclass 40, count 2 2006.232.08:02:22.44#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.232.08:02:22.44#ibcon#[27=AT06-04\r\n] 2006.232.08:02:22.44#ibcon#*before write, iclass 40, count 2 2006.232.08:02:22.44#ibcon#enter sib2, iclass 40, count 2 2006.232.08:02:22.44#ibcon#flushed, iclass 40, count 2 2006.232.08:02:22.44#ibcon#about to write, iclass 40, count 2 2006.232.08:02:22.44#ibcon#wrote, iclass 40, count 2 2006.232.08:02:22.44#ibcon#about to read 3, iclass 40, count 2 2006.232.08:02:22.47#ibcon#read 3, iclass 40, count 2 2006.232.08:02:22.47#ibcon#about to read 4, iclass 40, count 2 2006.232.08:02:22.47#ibcon#read 4, iclass 40, count 2 2006.232.08:02:22.47#ibcon#about to read 5, iclass 40, count 2 2006.232.08:02:22.47#ibcon#read 5, iclass 40, count 2 2006.232.08:02:22.47#ibcon#about to read 6, iclass 40, count 2 2006.232.08:02:22.47#ibcon#read 6, iclass 40, count 2 2006.232.08:02:22.47#ibcon#end of sib2, iclass 40, count 2 2006.232.08:02:22.47#ibcon#*after write, iclass 40, count 2 2006.232.08:02:22.47#ibcon#*before return 0, iclass 40, count 2 2006.232.08:02:22.47#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.232.08:02:22.47#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.232.08:02:22.47#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.232.08:02:22.47#ibcon#ireg 7 cls_cnt 0 2006.232.08:02:22.47#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.232.08:02:22.59#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.232.08:02:22.59#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.232.08:02:22.59#ibcon#enter wrdev, iclass 40, count 0 2006.232.08:02:22.59#ibcon#first serial, iclass 40, count 0 2006.232.08:02:22.59#ibcon#enter sib2, iclass 40, count 0 2006.232.08:02:22.59#ibcon#flushed, iclass 40, count 0 2006.232.08:02:22.59#ibcon#about to write, iclass 40, count 0 2006.232.08:02:22.59#ibcon#wrote, iclass 40, count 0 2006.232.08:02:22.59#ibcon#about to read 3, iclass 40, count 0 2006.232.08:02:22.61#ibcon#read 3, iclass 40, count 0 2006.232.08:02:22.61#ibcon#about to read 4, iclass 40, count 0 2006.232.08:02:22.61#ibcon#read 4, iclass 40, count 0 2006.232.08:02:22.61#ibcon#about to read 5, iclass 40, count 0 2006.232.08:02:22.61#ibcon#read 5, iclass 40, count 0 2006.232.08:02:22.61#ibcon#about to read 6, iclass 40, count 0 2006.232.08:02:22.61#ibcon#read 6, iclass 40, count 0 2006.232.08:02:22.61#ibcon#end of sib2, iclass 40, count 0 2006.232.08:02:22.61#ibcon#*mode == 0, iclass 40, count 0 2006.232.08:02:22.61#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.232.08:02:22.61#ibcon#[27=USB\r\n] 2006.232.08:02:22.61#ibcon#*before write, iclass 40, count 0 2006.232.08:02:22.61#ibcon#enter sib2, iclass 40, count 0 2006.232.08:02:22.61#ibcon#flushed, iclass 40, count 0 2006.232.08:02:22.61#ibcon#about to write, iclass 40, count 0 2006.232.08:02:22.61#ibcon#wrote, iclass 40, count 0 2006.232.08:02:22.61#ibcon#about to read 3, iclass 40, count 0 2006.232.08:02:22.64#ibcon#read 3, iclass 40, count 0 2006.232.08:02:22.64#ibcon#about to read 4, iclass 40, count 0 2006.232.08:02:22.64#ibcon#read 4, iclass 40, count 0 2006.232.08:02:22.64#ibcon#about to read 5, iclass 40, count 0 2006.232.08:02:22.64#ibcon#read 5, iclass 40, count 0 2006.232.08:02:22.64#ibcon#about to read 6, iclass 40, count 0 2006.232.08:02:22.64#ibcon#read 6, iclass 40, count 0 2006.232.08:02:22.64#ibcon#end of sib2, iclass 40, count 0 2006.232.08:02:22.64#ibcon#*after write, iclass 40, count 0 2006.232.08:02:22.64#ibcon#*before return 0, iclass 40, count 0 2006.232.08:02:22.64#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.232.08:02:22.64#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.232.08:02:22.64#ibcon#about to clear, iclass 40 cls_cnt 0 2006.232.08:02:22.64#ibcon#cleared, iclass 40 cls_cnt 0 2006.232.08:02:22.64$vc4f8/vabw=wide 2006.232.08:02:22.64#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.232.08:02:22.64#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.232.08:02:22.64#ibcon#ireg 8 cls_cnt 0 2006.232.08:02:22.64#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.232.08:02:22.64#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.232.08:02:22.64#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.232.08:02:22.64#ibcon#enter wrdev, iclass 4, count 0 2006.232.08:02:22.64#ibcon#first serial, iclass 4, count 0 2006.232.08:02:22.64#ibcon#enter sib2, iclass 4, count 0 2006.232.08:02:22.64#ibcon#flushed, iclass 4, count 0 2006.232.08:02:22.64#ibcon#about to write, iclass 4, count 0 2006.232.08:02:22.64#ibcon#wrote, iclass 4, count 0 2006.232.08:02:22.64#ibcon#about to read 3, iclass 4, count 0 2006.232.08:02:22.66#ibcon#read 3, iclass 4, count 0 2006.232.08:02:22.66#ibcon#about to read 4, iclass 4, count 0 2006.232.08:02:22.66#ibcon#read 4, iclass 4, count 0 2006.232.08:02:22.66#ibcon#about to read 5, iclass 4, count 0 2006.232.08:02:22.66#ibcon#read 5, iclass 4, count 0 2006.232.08:02:22.66#ibcon#about to read 6, iclass 4, count 0 2006.232.08:02:22.66#ibcon#read 6, iclass 4, count 0 2006.232.08:02:22.66#ibcon#end of sib2, iclass 4, count 0 2006.232.08:02:22.66#ibcon#*mode == 0, iclass 4, count 0 2006.232.08:02:22.66#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.232.08:02:22.66#ibcon#[25=BW32\r\n] 2006.232.08:02:22.66#ibcon#*before write, iclass 4, count 0 2006.232.08:02:22.66#ibcon#enter sib2, iclass 4, count 0 2006.232.08:02:22.66#ibcon#flushed, iclass 4, count 0 2006.232.08:02:22.66#ibcon#about to write, iclass 4, count 0 2006.232.08:02:22.66#ibcon#wrote, iclass 4, count 0 2006.232.08:02:22.66#ibcon#about to read 3, iclass 4, count 0 2006.232.08:02:22.69#ibcon#read 3, iclass 4, count 0 2006.232.08:02:22.69#ibcon#about to read 4, iclass 4, count 0 2006.232.08:02:22.69#ibcon#read 4, iclass 4, count 0 2006.232.08:02:22.69#ibcon#about to read 5, iclass 4, count 0 2006.232.08:02:22.69#ibcon#read 5, iclass 4, count 0 2006.232.08:02:22.69#ibcon#about to read 6, iclass 4, count 0 2006.232.08:02:22.69#ibcon#read 6, iclass 4, count 0 2006.232.08:02:22.69#ibcon#end of sib2, iclass 4, count 0 2006.232.08:02:22.69#ibcon#*after write, iclass 4, count 0 2006.232.08:02:22.69#ibcon#*before return 0, iclass 4, count 0 2006.232.08:02:22.69#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.232.08:02:22.69#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.232.08:02:22.69#ibcon#about to clear, iclass 4 cls_cnt 0 2006.232.08:02:22.69#ibcon#cleared, iclass 4 cls_cnt 0 2006.232.08:02:22.69$vc4f8/vbbw=wide 2006.232.08:02:22.69#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.232.08:02:22.69#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.232.08:02:22.69#ibcon#ireg 8 cls_cnt 0 2006.232.08:02:22.69#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.232.08:02:22.76#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.232.08:02:22.76#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.232.08:02:22.76#ibcon#enter wrdev, iclass 6, count 0 2006.232.08:02:22.76#ibcon#first serial, iclass 6, count 0 2006.232.08:02:22.76#ibcon#enter sib2, iclass 6, count 0 2006.232.08:02:22.76#ibcon#flushed, iclass 6, count 0 2006.232.08:02:22.76#ibcon#about to write, iclass 6, count 0 2006.232.08:02:22.76#ibcon#wrote, iclass 6, count 0 2006.232.08:02:22.76#ibcon#about to read 3, iclass 6, count 0 2006.232.08:02:22.78#ibcon#read 3, iclass 6, count 0 2006.232.08:02:22.78#ibcon#about to read 4, iclass 6, count 0 2006.232.08:02:22.78#ibcon#read 4, iclass 6, count 0 2006.232.08:02:22.78#ibcon#about to read 5, iclass 6, count 0 2006.232.08:02:22.78#ibcon#read 5, iclass 6, count 0 2006.232.08:02:22.78#ibcon#about to read 6, iclass 6, count 0 2006.232.08:02:22.78#ibcon#read 6, iclass 6, count 0 2006.232.08:02:22.78#ibcon#end of sib2, iclass 6, count 0 2006.232.08:02:22.78#ibcon#*mode == 0, iclass 6, count 0 2006.232.08:02:22.78#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.232.08:02:22.78#ibcon#[27=BW32\r\n] 2006.232.08:02:22.78#ibcon#*before write, iclass 6, count 0 2006.232.08:02:22.78#ibcon#enter sib2, iclass 6, count 0 2006.232.08:02:22.78#ibcon#flushed, iclass 6, count 0 2006.232.08:02:22.78#ibcon#about to write, iclass 6, count 0 2006.232.08:02:22.78#ibcon#wrote, iclass 6, count 0 2006.232.08:02:22.78#ibcon#about to read 3, iclass 6, count 0 2006.232.08:02:22.81#ibcon#read 3, iclass 6, count 0 2006.232.08:02:22.81#ibcon#about to read 4, iclass 6, count 0 2006.232.08:02:22.81#ibcon#read 4, iclass 6, count 0 2006.232.08:02:22.81#ibcon#about to read 5, iclass 6, count 0 2006.232.08:02:22.81#ibcon#read 5, iclass 6, count 0 2006.232.08:02:22.81#ibcon#about to read 6, iclass 6, count 0 2006.232.08:02:22.81#ibcon#read 6, iclass 6, count 0 2006.232.08:02:22.81#ibcon#end of sib2, iclass 6, count 0 2006.232.08:02:22.81#ibcon#*after write, iclass 6, count 0 2006.232.08:02:22.81#ibcon#*before return 0, iclass 6, count 0 2006.232.08:02:22.81#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.232.08:02:22.81#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.232.08:02:22.81#ibcon#about to clear, iclass 6 cls_cnt 0 2006.232.08:02:22.81#ibcon#cleared, iclass 6 cls_cnt 0 2006.232.08:02:22.81$4f8m12a/ifd4f 2006.232.08:02:22.81$ifd4f/lo= 2006.232.08:02:22.81$ifd4f/lo=lo1,7680.00,usb,rcp,1 2006.232.08:02:22.81$ifd4f/lo=lo2,1600.00,usb,rcp,1 2006.232.08:02:22.81$ifd4f/lo=lo3,8080.00,usb,rcp,1 2006.232.08:02:22.81$ifd4f/patch= 2006.232.08:02:22.81$ifd4f/patch=lo1,a1,a2,a3,a4 2006.232.08:02:22.81$ifd4f/patch=lo2,b1,b2,b3,b4,b5,b6 2006.232.08:02:22.81$ifd4f/patch=lo3,a5,a6,a7,a8 2006.232.08:02:22.81$4f8m12a/"form=m,16.000,1:2 2006.232.08:02:22.81$4f8m12a/"tpicd 2006.232.08:02:22.81$4f8m12a/echo=off 2006.232.08:02:22.81$4f8m12a/xlog=off 2006.232.08:02:22.81:!2006.232.08:02:50 2006.232.08:02:33.14#trakl#Source acquired 2006.232.08:02:35.14#flagr#flagr/antenna,acquired 2006.232.08:02:50.00:preob 2006.232.08:02:51.14/onsource/TRACKING 2006.232.08:02:51.14:!2006.232.08:03:00 2006.232.08:03:00.00:data_valid=on 2006.232.08:03:00.00:midob 2006.232.08:03:00.14/onsource/TRACKING 2006.232.08:03:00.14/wx/29.39,1007.3,87 2006.232.08:03:00.31/cable/+6.3879E-03 2006.232.08:03:01.40/va/01,08,usb,yes,33,34 2006.232.08:03:01.40/va/02,07,usb,yes,33,34 2006.232.08:03:01.40/va/03,08,usb,yes,25,25 2006.232.08:03:01.40/va/04,07,usb,yes,34,37 2006.232.08:03:01.40/va/05,07,usb,yes,39,41 2006.232.08:03:01.40/va/06,06,usb,yes,38,38 2006.232.08:03:01.40/va/07,06,usb,yes,39,38 2006.232.08:03:01.40/va/08,06,usb,yes,41,40 2006.232.08:03:01.63/valo/01,532.99,yes,locked 2006.232.08:03:01.63/valo/02,572.99,yes,locked 2006.232.08:03:01.63/valo/03,672.99,yes,locked 2006.232.08:03:01.63/valo/04,832.99,yes,locked 2006.232.08:03:01.63/valo/05,652.99,yes,locked 2006.232.08:03:01.63/valo/06,772.99,yes,locked 2006.232.08:03:01.63/valo/07,832.99,yes,locked 2006.232.08:03:01.63/valo/08,852.99,yes,locked 2006.232.08:03:02.72/vb/01,04,usb,yes,32,30 2006.232.08:03:02.72/vb/02,04,usb,yes,34,35 2006.232.08:03:02.72/vb/03,04,usb,yes,30,34 2006.232.08:03:02.72/vb/04,04,usb,yes,31,31 2006.232.08:03:02.72/vb/05,03,usb,yes,36,41 2006.232.08:03:02.72/vb/06,04,usb,yes,30,33 2006.232.08:03:02.72/vb/07,04,usb,yes,32,32 2006.232.08:03:02.72/vb/08,04,usb,yes,30,33 2006.232.08:03:02.95/vblo/01,632.99,yes,locked 2006.232.08:03:02.95/vblo/02,640.99,yes,locked 2006.232.08:03:02.95/vblo/03,656.99,yes,locked 2006.232.08:03:02.95/vblo/04,712.99,yes,locked 2006.232.08:03:02.95/vblo/05,744.99,yes,locked 2006.232.08:03:02.95/vblo/06,752.99,yes,locked 2006.232.08:03:02.95/vblo/07,734.99,yes,locked 2006.232.08:03:02.95/vblo/08,744.99,yes,locked 2006.232.08:03:03.10/vabw/8 2006.232.08:03:03.25/vbbw/8 2006.232.08:03:03.34/xfe/off,on,13.5 2006.232.08:03:03.71/ifatt/23,28,28,28 2006.232.08:03:04.08/fmout-gps/S +4.48E-07 2006.232.08:03:04.12:!2006.232.08:04:00 2006.232.08:04:00.00:data_valid=off 2006.232.08:04:00.00:postob 2006.232.08:04:00.07/cable/+6.3876E-03 2006.232.08:04:00.07/wx/29.39,1007.3,87 2006.232.08:04:01.07/fmout-gps/S +4.47E-07 2006.232.08:04:01.07:scan_name=232-0804,k06232,60 2006.232.08:04:01.07:source=1128+385,113053.28,381518.5,2000.0,ccw 2006.232.08:04:01.14#flagr#flagr/antenna,new-source 2006.232.08:04:02.14:checkk5 2006.232.08:04:02.51/chk_autoobs//k5ts1/ autoobs is running! 2006.232.08:04:02.88/chk_autoobs//k5ts2/ autoobs is running! 2006.232.08:04:03.25/chk_autoobs//k5ts3/ autoobs is running! 2006.232.08:04:03.63/chk_autoobs//k5ts4/ autoobs is running! 2006.232.08:04:03.99/chk_obsdata//k5ts1/T2320803??a.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.08:04:04.37/chk_obsdata//k5ts2/T2320803??b.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.08:04:04.74/chk_obsdata//k5ts3/T2320803??c.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.08:04:05.11/chk_obsdata//k5ts4/T2320803??d.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.08:04:05.80/k5log//k5ts1_log_newline 2006.232.08:04:06.49/k5log//k5ts2_log_newline 2006.232.08:04:07.19/k5log//k5ts3_log_newline 2006.232.08:04:07.87/k5log//k5ts4_log_newline 2006.232.08:04:07.90/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.232.08:04:07.90:4f8m12a=2 2006.232.08:04:07.90$4f8m12a/echo=on 2006.232.08:04:07.90$4f8m12a/pcalon 2006.232.08:04:07.90$pcalon/"no phase cal control is implemented here 2006.232.08:04:07.90$4f8m12a/"tpicd=stop 2006.232.08:04:07.90$4f8m12a/vc4f8 2006.232.08:04:07.90$vc4f8/valo=1,532.99 2006.232.08:04:07.91#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.232.08:04:07.91#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.232.08:04:07.91#ibcon#ireg 17 cls_cnt 0 2006.232.08:04:07.91#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.232.08:04:07.91#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.232.08:04:07.91#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.232.08:04:07.91#ibcon#enter wrdev, iclass 15, count 0 2006.232.08:04:07.91#ibcon#first serial, iclass 15, count 0 2006.232.08:04:07.91#ibcon#enter sib2, iclass 15, count 0 2006.232.08:04:07.91#ibcon#flushed, iclass 15, count 0 2006.232.08:04:07.91#ibcon#about to write, iclass 15, count 0 2006.232.08:04:07.91#ibcon#wrote, iclass 15, count 0 2006.232.08:04:07.91#ibcon#about to read 3, iclass 15, count 0 2006.232.08:04:07.94#ibcon#read 3, iclass 15, count 0 2006.232.08:04:07.94#ibcon#about to read 4, iclass 15, count 0 2006.232.08:04:07.94#ibcon#read 4, iclass 15, count 0 2006.232.08:04:07.94#ibcon#about to read 5, iclass 15, count 0 2006.232.08:04:07.94#ibcon#read 5, iclass 15, count 0 2006.232.08:04:07.94#ibcon#about to read 6, iclass 15, count 0 2006.232.08:04:07.94#ibcon#read 6, iclass 15, count 0 2006.232.08:04:07.94#ibcon#end of sib2, iclass 15, count 0 2006.232.08:04:07.94#ibcon#*mode == 0, iclass 15, count 0 2006.232.08:04:07.94#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.232.08:04:07.94#ibcon#[26=FRQ=01,532.99\r\n] 2006.232.08:04:07.94#ibcon#*before write, iclass 15, count 0 2006.232.08:04:07.94#ibcon#enter sib2, iclass 15, count 0 2006.232.08:04:07.94#ibcon#flushed, iclass 15, count 0 2006.232.08:04:07.94#ibcon#about to write, iclass 15, count 0 2006.232.08:04:07.94#ibcon#wrote, iclass 15, count 0 2006.232.08:04:07.94#ibcon#about to read 3, iclass 15, count 0 2006.232.08:04:07.99#ibcon#read 3, iclass 15, count 0 2006.232.08:04:07.99#ibcon#about to read 4, iclass 15, count 0 2006.232.08:04:07.99#ibcon#read 4, iclass 15, count 0 2006.232.08:04:07.99#ibcon#about to read 5, iclass 15, count 0 2006.232.08:04:07.99#ibcon#read 5, iclass 15, count 0 2006.232.08:04:07.99#ibcon#about to read 6, iclass 15, count 0 2006.232.08:04:07.99#ibcon#read 6, iclass 15, count 0 2006.232.08:04:07.99#ibcon#end of sib2, iclass 15, count 0 2006.232.08:04:07.99#ibcon#*after write, iclass 15, count 0 2006.232.08:04:07.99#ibcon#*before return 0, iclass 15, count 0 2006.232.08:04:07.99#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.232.08:04:07.99#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.232.08:04:07.99#ibcon#about to clear, iclass 15 cls_cnt 0 2006.232.08:04:07.99#ibcon#cleared, iclass 15 cls_cnt 0 2006.232.08:04:07.99$vc4f8/va=1,8 2006.232.08:04:07.99#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.232.08:04:07.99#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.232.08:04:07.99#ibcon#ireg 11 cls_cnt 2 2006.232.08:04:07.99#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.232.08:04:07.99#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.232.08:04:07.99#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.232.08:04:07.99#ibcon#enter wrdev, iclass 17, count 2 2006.232.08:04:07.99#ibcon#first serial, iclass 17, count 2 2006.232.08:04:07.99#ibcon#enter sib2, iclass 17, count 2 2006.232.08:04:07.99#ibcon#flushed, iclass 17, count 2 2006.232.08:04:07.99#ibcon#about to write, iclass 17, count 2 2006.232.08:04:07.99#ibcon#wrote, iclass 17, count 2 2006.232.08:04:07.99#ibcon#about to read 3, iclass 17, count 2 2006.232.08:04:08.01#ibcon#read 3, iclass 17, count 2 2006.232.08:04:08.01#ibcon#about to read 4, iclass 17, count 2 2006.232.08:04:08.01#ibcon#read 4, iclass 17, count 2 2006.232.08:04:08.01#ibcon#about to read 5, iclass 17, count 2 2006.232.08:04:08.01#ibcon#read 5, iclass 17, count 2 2006.232.08:04:08.01#ibcon#about to read 6, iclass 17, count 2 2006.232.08:04:08.01#ibcon#read 6, iclass 17, count 2 2006.232.08:04:08.01#ibcon#end of sib2, iclass 17, count 2 2006.232.08:04:08.01#ibcon#*mode == 0, iclass 17, count 2 2006.232.08:04:08.01#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.232.08:04:08.01#ibcon#[25=AT01-08\r\n] 2006.232.08:04:08.01#ibcon#*before write, iclass 17, count 2 2006.232.08:04:08.01#ibcon#enter sib2, iclass 17, count 2 2006.232.08:04:08.01#ibcon#flushed, iclass 17, count 2 2006.232.08:04:08.01#ibcon#about to write, iclass 17, count 2 2006.232.08:04:08.01#ibcon#wrote, iclass 17, count 2 2006.232.08:04:08.01#ibcon#about to read 3, iclass 17, count 2 2006.232.08:04:08.04#ibcon#read 3, iclass 17, count 2 2006.232.08:04:08.04#ibcon#about to read 4, iclass 17, count 2 2006.232.08:04:08.04#ibcon#read 4, iclass 17, count 2 2006.232.08:04:08.04#ibcon#about to read 5, iclass 17, count 2 2006.232.08:04:08.04#ibcon#read 5, iclass 17, count 2 2006.232.08:04:08.04#ibcon#about to read 6, iclass 17, count 2 2006.232.08:04:08.04#ibcon#read 6, iclass 17, count 2 2006.232.08:04:08.04#ibcon#end of sib2, iclass 17, count 2 2006.232.08:04:08.04#ibcon#*after write, iclass 17, count 2 2006.232.08:04:08.04#ibcon#*before return 0, iclass 17, count 2 2006.232.08:04:08.04#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.232.08:04:08.04#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.232.08:04:08.04#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.232.08:04:08.04#ibcon#ireg 7 cls_cnt 0 2006.232.08:04:08.04#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.232.08:04:08.16#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.232.08:04:08.16#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.232.08:04:08.16#ibcon#enter wrdev, iclass 17, count 0 2006.232.08:04:08.16#ibcon#first serial, iclass 17, count 0 2006.232.08:04:08.16#ibcon#enter sib2, iclass 17, count 0 2006.232.08:04:08.16#ibcon#flushed, iclass 17, count 0 2006.232.08:04:08.16#ibcon#about to write, iclass 17, count 0 2006.232.08:04:08.16#ibcon#wrote, iclass 17, count 0 2006.232.08:04:08.16#ibcon#about to read 3, iclass 17, count 0 2006.232.08:04:08.18#ibcon#read 3, iclass 17, count 0 2006.232.08:04:08.18#ibcon#about to read 4, iclass 17, count 0 2006.232.08:04:08.18#ibcon#read 4, iclass 17, count 0 2006.232.08:04:08.18#ibcon#about to read 5, iclass 17, count 0 2006.232.08:04:08.18#ibcon#read 5, iclass 17, count 0 2006.232.08:04:08.18#ibcon#about to read 6, iclass 17, count 0 2006.232.08:04:08.18#ibcon#read 6, iclass 17, count 0 2006.232.08:04:08.18#ibcon#end of sib2, iclass 17, count 0 2006.232.08:04:08.18#ibcon#*mode == 0, iclass 17, count 0 2006.232.08:04:08.18#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.232.08:04:08.18#ibcon#[25=USB\r\n] 2006.232.08:04:08.18#ibcon#*before write, iclass 17, count 0 2006.232.08:04:08.18#ibcon#enter sib2, iclass 17, count 0 2006.232.08:04:08.18#ibcon#flushed, iclass 17, count 0 2006.232.08:04:08.18#ibcon#about to write, iclass 17, count 0 2006.232.08:04:08.18#ibcon#wrote, iclass 17, count 0 2006.232.08:04:08.18#ibcon#about to read 3, iclass 17, count 0 2006.232.08:04:08.21#ibcon#read 3, iclass 17, count 0 2006.232.08:04:08.21#ibcon#about to read 4, iclass 17, count 0 2006.232.08:04:08.21#ibcon#read 4, iclass 17, count 0 2006.232.08:04:08.21#ibcon#about to read 5, iclass 17, count 0 2006.232.08:04:08.21#ibcon#read 5, iclass 17, count 0 2006.232.08:04:08.21#ibcon#about to read 6, iclass 17, count 0 2006.232.08:04:08.21#ibcon#read 6, iclass 17, count 0 2006.232.08:04:08.21#ibcon#end of sib2, iclass 17, count 0 2006.232.08:04:08.21#ibcon#*after write, iclass 17, count 0 2006.232.08:04:08.21#ibcon#*before return 0, iclass 17, count 0 2006.232.08:04:08.21#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.232.08:04:08.21#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.232.08:04:08.21#ibcon#about to clear, iclass 17 cls_cnt 0 2006.232.08:04:08.21#ibcon#cleared, iclass 17 cls_cnt 0 2006.232.08:04:08.21$vc4f8/valo=2,572.99 2006.232.08:04:08.21#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.232.08:04:08.21#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.232.08:04:08.21#ibcon#ireg 17 cls_cnt 0 2006.232.08:04:08.21#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.232.08:04:08.21#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.232.08:04:08.21#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.232.08:04:08.21#ibcon#enter wrdev, iclass 19, count 0 2006.232.08:04:08.21#ibcon#first serial, iclass 19, count 0 2006.232.08:04:08.21#ibcon#enter sib2, iclass 19, count 0 2006.232.08:04:08.21#ibcon#flushed, iclass 19, count 0 2006.232.08:04:08.21#ibcon#about to write, iclass 19, count 0 2006.232.08:04:08.21#ibcon#wrote, iclass 19, count 0 2006.232.08:04:08.21#ibcon#about to read 3, iclass 19, count 0 2006.232.08:04:08.23#ibcon#read 3, iclass 19, count 0 2006.232.08:04:08.23#ibcon#about to read 4, iclass 19, count 0 2006.232.08:04:08.23#ibcon#read 4, iclass 19, count 0 2006.232.08:04:08.23#ibcon#about to read 5, iclass 19, count 0 2006.232.08:04:08.23#ibcon#read 5, iclass 19, count 0 2006.232.08:04:08.23#ibcon#about to read 6, iclass 19, count 0 2006.232.08:04:08.23#ibcon#read 6, iclass 19, count 0 2006.232.08:04:08.23#ibcon#end of sib2, iclass 19, count 0 2006.232.08:04:08.23#ibcon#*mode == 0, iclass 19, count 0 2006.232.08:04:08.23#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.232.08:04:08.23#ibcon#[26=FRQ=02,572.99\r\n] 2006.232.08:04:08.23#ibcon#*before write, iclass 19, count 0 2006.232.08:04:08.23#ibcon#enter sib2, iclass 19, count 0 2006.232.08:04:08.23#ibcon#flushed, iclass 19, count 0 2006.232.08:04:08.23#ibcon#about to write, iclass 19, count 0 2006.232.08:04:08.23#ibcon#wrote, iclass 19, count 0 2006.232.08:04:08.23#ibcon#about to read 3, iclass 19, count 0 2006.232.08:04:08.27#ibcon#read 3, iclass 19, count 0 2006.232.08:04:08.27#ibcon#about to read 4, iclass 19, count 0 2006.232.08:04:08.27#ibcon#read 4, iclass 19, count 0 2006.232.08:04:08.27#ibcon#about to read 5, iclass 19, count 0 2006.232.08:04:08.27#ibcon#read 5, iclass 19, count 0 2006.232.08:04:08.27#ibcon#about to read 6, iclass 19, count 0 2006.232.08:04:08.27#ibcon#read 6, iclass 19, count 0 2006.232.08:04:08.27#ibcon#end of sib2, iclass 19, count 0 2006.232.08:04:08.27#ibcon#*after write, iclass 19, count 0 2006.232.08:04:08.27#ibcon#*before return 0, iclass 19, count 0 2006.232.08:04:08.27#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.232.08:04:08.27#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.232.08:04:08.27#ibcon#about to clear, iclass 19 cls_cnt 0 2006.232.08:04:08.27#ibcon#cleared, iclass 19 cls_cnt 0 2006.232.08:04:08.27$vc4f8/va=2,7 2006.232.08:04:08.27#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.232.08:04:08.27#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.232.08:04:08.27#ibcon#ireg 11 cls_cnt 2 2006.232.08:04:08.27#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.232.08:04:08.33#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.232.08:04:08.33#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.232.08:04:08.33#ibcon#enter wrdev, iclass 21, count 2 2006.232.08:04:08.33#ibcon#first serial, iclass 21, count 2 2006.232.08:04:08.33#ibcon#enter sib2, iclass 21, count 2 2006.232.08:04:08.33#ibcon#flushed, iclass 21, count 2 2006.232.08:04:08.33#ibcon#about to write, iclass 21, count 2 2006.232.08:04:08.33#ibcon#wrote, iclass 21, count 2 2006.232.08:04:08.33#ibcon#about to read 3, iclass 21, count 2 2006.232.08:04:08.35#ibcon#read 3, iclass 21, count 2 2006.232.08:04:08.35#ibcon#about to read 4, iclass 21, count 2 2006.232.08:04:08.35#ibcon#read 4, iclass 21, count 2 2006.232.08:04:08.35#ibcon#about to read 5, iclass 21, count 2 2006.232.08:04:08.35#ibcon#read 5, iclass 21, count 2 2006.232.08:04:08.35#ibcon#about to read 6, iclass 21, count 2 2006.232.08:04:08.35#ibcon#read 6, iclass 21, count 2 2006.232.08:04:08.35#ibcon#end of sib2, iclass 21, count 2 2006.232.08:04:08.35#ibcon#*mode == 0, iclass 21, count 2 2006.232.08:04:08.35#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.232.08:04:08.35#ibcon#[25=AT02-07\r\n] 2006.232.08:04:08.35#ibcon#*before write, iclass 21, count 2 2006.232.08:04:08.35#ibcon#enter sib2, iclass 21, count 2 2006.232.08:04:08.35#ibcon#flushed, iclass 21, count 2 2006.232.08:04:08.35#ibcon#about to write, iclass 21, count 2 2006.232.08:04:08.35#ibcon#wrote, iclass 21, count 2 2006.232.08:04:08.35#ibcon#about to read 3, iclass 21, count 2 2006.232.08:04:08.38#ibcon#read 3, iclass 21, count 2 2006.232.08:04:08.38#ibcon#about to read 4, iclass 21, count 2 2006.232.08:04:08.38#ibcon#read 4, iclass 21, count 2 2006.232.08:04:08.38#ibcon#about to read 5, iclass 21, count 2 2006.232.08:04:08.38#ibcon#read 5, iclass 21, count 2 2006.232.08:04:08.38#ibcon#about to read 6, iclass 21, count 2 2006.232.08:04:08.38#ibcon#read 6, iclass 21, count 2 2006.232.08:04:08.38#ibcon#end of sib2, iclass 21, count 2 2006.232.08:04:08.38#ibcon#*after write, iclass 21, count 2 2006.232.08:04:08.38#ibcon#*before return 0, iclass 21, count 2 2006.232.08:04:08.38#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.232.08:04:08.38#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.232.08:04:08.38#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.232.08:04:08.38#ibcon#ireg 7 cls_cnt 0 2006.232.08:04:08.38#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.232.08:04:08.50#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.232.08:04:08.50#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.232.08:04:08.50#ibcon#enter wrdev, iclass 21, count 0 2006.232.08:04:08.50#ibcon#first serial, iclass 21, count 0 2006.232.08:04:08.50#ibcon#enter sib2, iclass 21, count 0 2006.232.08:04:08.50#ibcon#flushed, iclass 21, count 0 2006.232.08:04:08.50#ibcon#about to write, iclass 21, count 0 2006.232.08:04:08.50#ibcon#wrote, iclass 21, count 0 2006.232.08:04:08.50#ibcon#about to read 3, iclass 21, count 0 2006.232.08:04:08.52#ibcon#read 3, iclass 21, count 0 2006.232.08:04:08.52#ibcon#about to read 4, iclass 21, count 0 2006.232.08:04:08.52#ibcon#read 4, iclass 21, count 0 2006.232.08:04:08.52#ibcon#about to read 5, iclass 21, count 0 2006.232.08:04:08.52#ibcon#read 5, iclass 21, count 0 2006.232.08:04:08.52#ibcon#about to read 6, iclass 21, count 0 2006.232.08:04:08.52#ibcon#read 6, iclass 21, count 0 2006.232.08:04:08.52#ibcon#end of sib2, iclass 21, count 0 2006.232.08:04:08.52#ibcon#*mode == 0, iclass 21, count 0 2006.232.08:04:08.52#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.232.08:04:08.52#ibcon#[25=USB\r\n] 2006.232.08:04:08.52#ibcon#*before write, iclass 21, count 0 2006.232.08:04:08.52#ibcon#enter sib2, iclass 21, count 0 2006.232.08:04:08.52#ibcon#flushed, iclass 21, count 0 2006.232.08:04:08.52#ibcon#about to write, iclass 21, count 0 2006.232.08:04:08.52#ibcon#wrote, iclass 21, count 0 2006.232.08:04:08.52#ibcon#about to read 3, iclass 21, count 0 2006.232.08:04:08.55#ibcon#read 3, iclass 21, count 0 2006.232.08:04:08.55#ibcon#about to read 4, iclass 21, count 0 2006.232.08:04:08.55#ibcon#read 4, iclass 21, count 0 2006.232.08:04:08.55#ibcon#about to read 5, iclass 21, count 0 2006.232.08:04:08.55#ibcon#read 5, iclass 21, count 0 2006.232.08:04:08.55#ibcon#about to read 6, iclass 21, count 0 2006.232.08:04:08.55#ibcon#read 6, iclass 21, count 0 2006.232.08:04:08.55#ibcon#end of sib2, iclass 21, count 0 2006.232.08:04:08.55#ibcon#*after write, iclass 21, count 0 2006.232.08:04:08.55#ibcon#*before return 0, iclass 21, count 0 2006.232.08:04:08.55#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.232.08:04:08.55#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.232.08:04:08.55#ibcon#about to clear, iclass 21 cls_cnt 0 2006.232.08:04:08.55#ibcon#cleared, iclass 21 cls_cnt 0 2006.232.08:04:08.55$vc4f8/valo=3,672.99 2006.232.08:04:08.55#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.232.08:04:08.55#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.232.08:04:08.55#ibcon#ireg 17 cls_cnt 0 2006.232.08:04:08.55#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.232.08:04:08.55#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.232.08:04:08.55#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.232.08:04:08.55#ibcon#enter wrdev, iclass 23, count 0 2006.232.08:04:08.55#ibcon#first serial, iclass 23, count 0 2006.232.08:04:08.55#ibcon#enter sib2, iclass 23, count 0 2006.232.08:04:08.55#ibcon#flushed, iclass 23, count 0 2006.232.08:04:08.55#ibcon#about to write, iclass 23, count 0 2006.232.08:04:08.55#ibcon#wrote, iclass 23, count 0 2006.232.08:04:08.55#ibcon#about to read 3, iclass 23, count 0 2006.232.08:04:08.57#ibcon#read 3, iclass 23, count 0 2006.232.08:04:08.57#ibcon#about to read 4, iclass 23, count 0 2006.232.08:04:08.57#ibcon#read 4, iclass 23, count 0 2006.232.08:04:08.57#ibcon#about to read 5, iclass 23, count 0 2006.232.08:04:08.57#ibcon#read 5, iclass 23, count 0 2006.232.08:04:08.57#ibcon#about to read 6, iclass 23, count 0 2006.232.08:04:08.57#ibcon#read 6, iclass 23, count 0 2006.232.08:04:08.57#ibcon#end of sib2, iclass 23, count 0 2006.232.08:04:08.57#ibcon#*mode == 0, iclass 23, count 0 2006.232.08:04:08.57#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.232.08:04:08.57#ibcon#[26=FRQ=03,672.99\r\n] 2006.232.08:04:08.57#ibcon#*before write, iclass 23, count 0 2006.232.08:04:08.57#ibcon#enter sib2, iclass 23, count 0 2006.232.08:04:08.57#ibcon#flushed, iclass 23, count 0 2006.232.08:04:08.57#ibcon#about to write, iclass 23, count 0 2006.232.08:04:08.57#ibcon#wrote, iclass 23, count 0 2006.232.08:04:08.57#ibcon#about to read 3, iclass 23, count 0 2006.232.08:04:08.61#ibcon#read 3, iclass 23, count 0 2006.232.08:04:08.61#ibcon#about to read 4, iclass 23, count 0 2006.232.08:04:08.61#ibcon#read 4, iclass 23, count 0 2006.232.08:04:08.61#ibcon#about to read 5, iclass 23, count 0 2006.232.08:04:08.61#ibcon#read 5, iclass 23, count 0 2006.232.08:04:08.61#ibcon#about to read 6, iclass 23, count 0 2006.232.08:04:08.61#ibcon#read 6, iclass 23, count 0 2006.232.08:04:08.61#ibcon#end of sib2, iclass 23, count 0 2006.232.08:04:08.61#ibcon#*after write, iclass 23, count 0 2006.232.08:04:08.61#ibcon#*before return 0, iclass 23, count 0 2006.232.08:04:08.61#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.232.08:04:08.61#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.232.08:04:08.61#ibcon#about to clear, iclass 23 cls_cnt 0 2006.232.08:04:08.61#ibcon#cleared, iclass 23 cls_cnt 0 2006.232.08:04:08.61$vc4f8/va=3,8 2006.232.08:04:08.61#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.232.08:04:08.61#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.232.08:04:08.61#ibcon#ireg 11 cls_cnt 2 2006.232.08:04:08.61#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.232.08:04:08.67#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.232.08:04:08.67#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.232.08:04:08.67#ibcon#enter wrdev, iclass 25, count 2 2006.232.08:04:08.67#ibcon#first serial, iclass 25, count 2 2006.232.08:04:08.67#ibcon#enter sib2, iclass 25, count 2 2006.232.08:04:08.67#ibcon#flushed, iclass 25, count 2 2006.232.08:04:08.67#ibcon#about to write, iclass 25, count 2 2006.232.08:04:08.67#ibcon#wrote, iclass 25, count 2 2006.232.08:04:08.67#ibcon#about to read 3, iclass 25, count 2 2006.232.08:04:08.69#ibcon#read 3, iclass 25, count 2 2006.232.08:04:08.69#ibcon#about to read 4, iclass 25, count 2 2006.232.08:04:08.69#ibcon#read 4, iclass 25, count 2 2006.232.08:04:08.69#ibcon#about to read 5, iclass 25, count 2 2006.232.08:04:08.69#ibcon#read 5, iclass 25, count 2 2006.232.08:04:08.69#ibcon#about to read 6, iclass 25, count 2 2006.232.08:04:08.69#ibcon#read 6, iclass 25, count 2 2006.232.08:04:08.69#ibcon#end of sib2, iclass 25, count 2 2006.232.08:04:08.69#ibcon#*mode == 0, iclass 25, count 2 2006.232.08:04:08.69#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.232.08:04:08.69#ibcon#[25=AT03-08\r\n] 2006.232.08:04:08.69#ibcon#*before write, iclass 25, count 2 2006.232.08:04:08.69#ibcon#enter sib2, iclass 25, count 2 2006.232.08:04:08.69#ibcon#flushed, iclass 25, count 2 2006.232.08:04:08.69#ibcon#about to write, iclass 25, count 2 2006.232.08:04:08.69#ibcon#wrote, iclass 25, count 2 2006.232.08:04:08.69#ibcon#about to read 3, iclass 25, count 2 2006.232.08:04:08.72#ibcon#read 3, iclass 25, count 2 2006.232.08:04:08.72#ibcon#about to read 4, iclass 25, count 2 2006.232.08:04:08.72#ibcon#read 4, iclass 25, count 2 2006.232.08:04:08.72#ibcon#about to read 5, iclass 25, count 2 2006.232.08:04:08.72#ibcon#read 5, iclass 25, count 2 2006.232.08:04:08.72#ibcon#about to read 6, iclass 25, count 2 2006.232.08:04:08.72#ibcon#read 6, iclass 25, count 2 2006.232.08:04:08.72#ibcon#end of sib2, iclass 25, count 2 2006.232.08:04:08.72#ibcon#*after write, iclass 25, count 2 2006.232.08:04:08.72#ibcon#*before return 0, iclass 25, count 2 2006.232.08:04:08.72#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.232.08:04:08.72#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.232.08:04:08.72#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.232.08:04:08.72#ibcon#ireg 7 cls_cnt 0 2006.232.08:04:08.72#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.232.08:04:08.84#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.232.08:04:08.84#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.232.08:04:08.84#ibcon#enter wrdev, iclass 25, count 0 2006.232.08:04:08.84#ibcon#first serial, iclass 25, count 0 2006.232.08:04:08.84#ibcon#enter sib2, iclass 25, count 0 2006.232.08:04:08.84#ibcon#flushed, iclass 25, count 0 2006.232.08:04:08.84#ibcon#about to write, iclass 25, count 0 2006.232.08:04:08.84#ibcon#wrote, iclass 25, count 0 2006.232.08:04:08.84#ibcon#about to read 3, iclass 25, count 0 2006.232.08:04:08.86#ibcon#read 3, iclass 25, count 0 2006.232.08:04:08.86#ibcon#about to read 4, iclass 25, count 0 2006.232.08:04:08.86#ibcon#read 4, iclass 25, count 0 2006.232.08:04:08.86#ibcon#about to read 5, iclass 25, count 0 2006.232.08:04:08.86#ibcon#read 5, iclass 25, count 0 2006.232.08:04:08.86#ibcon#about to read 6, iclass 25, count 0 2006.232.08:04:08.86#ibcon#read 6, iclass 25, count 0 2006.232.08:04:08.86#ibcon#end of sib2, iclass 25, count 0 2006.232.08:04:08.86#ibcon#*mode == 0, iclass 25, count 0 2006.232.08:04:08.86#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.232.08:04:08.86#ibcon#[25=USB\r\n] 2006.232.08:04:08.86#ibcon#*before write, iclass 25, count 0 2006.232.08:04:08.86#ibcon#enter sib2, iclass 25, count 0 2006.232.08:04:08.86#ibcon#flushed, iclass 25, count 0 2006.232.08:04:08.86#ibcon#about to write, iclass 25, count 0 2006.232.08:04:08.86#ibcon#wrote, iclass 25, count 0 2006.232.08:04:08.86#ibcon#about to read 3, iclass 25, count 0 2006.232.08:04:08.89#ibcon#read 3, iclass 25, count 0 2006.232.08:04:08.89#ibcon#about to read 4, iclass 25, count 0 2006.232.08:04:08.89#ibcon#read 4, iclass 25, count 0 2006.232.08:04:08.89#ibcon#about to read 5, iclass 25, count 0 2006.232.08:04:08.89#ibcon#read 5, iclass 25, count 0 2006.232.08:04:08.89#ibcon#about to read 6, iclass 25, count 0 2006.232.08:04:08.89#ibcon#read 6, iclass 25, count 0 2006.232.08:04:08.89#ibcon#end of sib2, iclass 25, count 0 2006.232.08:04:08.89#ibcon#*after write, iclass 25, count 0 2006.232.08:04:08.89#ibcon#*before return 0, iclass 25, count 0 2006.232.08:04:08.89#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.232.08:04:08.89#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.232.08:04:08.89#ibcon#about to clear, iclass 25 cls_cnt 0 2006.232.08:04:08.89#ibcon#cleared, iclass 25 cls_cnt 0 2006.232.08:04:08.89$vc4f8/valo=4,832.99 2006.232.08:04:08.89#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.232.08:04:08.89#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.232.08:04:08.89#ibcon#ireg 17 cls_cnt 0 2006.232.08:04:08.89#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.232.08:04:08.89#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.232.08:04:08.89#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.232.08:04:08.89#ibcon#enter wrdev, iclass 27, count 0 2006.232.08:04:08.89#ibcon#first serial, iclass 27, count 0 2006.232.08:04:08.89#ibcon#enter sib2, iclass 27, count 0 2006.232.08:04:08.89#ibcon#flushed, iclass 27, count 0 2006.232.08:04:08.89#ibcon#about to write, iclass 27, count 0 2006.232.08:04:08.89#ibcon#wrote, iclass 27, count 0 2006.232.08:04:08.89#ibcon#about to read 3, iclass 27, count 0 2006.232.08:04:08.91#ibcon#read 3, iclass 27, count 0 2006.232.08:04:08.91#ibcon#about to read 4, iclass 27, count 0 2006.232.08:04:08.91#ibcon#read 4, iclass 27, count 0 2006.232.08:04:08.91#ibcon#about to read 5, iclass 27, count 0 2006.232.08:04:08.91#ibcon#read 5, iclass 27, count 0 2006.232.08:04:08.91#ibcon#about to read 6, iclass 27, count 0 2006.232.08:04:08.91#ibcon#read 6, iclass 27, count 0 2006.232.08:04:08.91#ibcon#end of sib2, iclass 27, count 0 2006.232.08:04:08.91#ibcon#*mode == 0, iclass 27, count 0 2006.232.08:04:08.91#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.232.08:04:08.91#ibcon#[26=FRQ=04,832.99\r\n] 2006.232.08:04:08.91#ibcon#*before write, iclass 27, count 0 2006.232.08:04:08.91#ibcon#enter sib2, iclass 27, count 0 2006.232.08:04:08.91#ibcon#flushed, iclass 27, count 0 2006.232.08:04:08.91#ibcon#about to write, iclass 27, count 0 2006.232.08:04:08.91#ibcon#wrote, iclass 27, count 0 2006.232.08:04:08.91#ibcon#about to read 3, iclass 27, count 0 2006.232.08:04:08.95#ibcon#read 3, iclass 27, count 0 2006.232.08:04:08.95#ibcon#about to read 4, iclass 27, count 0 2006.232.08:04:08.95#ibcon#read 4, iclass 27, count 0 2006.232.08:04:08.95#ibcon#about to read 5, iclass 27, count 0 2006.232.08:04:08.95#ibcon#read 5, iclass 27, count 0 2006.232.08:04:08.95#ibcon#about to read 6, iclass 27, count 0 2006.232.08:04:08.95#ibcon#read 6, iclass 27, count 0 2006.232.08:04:08.95#ibcon#end of sib2, iclass 27, count 0 2006.232.08:04:08.95#ibcon#*after write, iclass 27, count 0 2006.232.08:04:08.95#ibcon#*before return 0, iclass 27, count 0 2006.232.08:04:08.95#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.232.08:04:08.95#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.232.08:04:08.95#ibcon#about to clear, iclass 27 cls_cnt 0 2006.232.08:04:08.95#ibcon#cleared, iclass 27 cls_cnt 0 2006.232.08:04:08.95$vc4f8/va=4,7 2006.232.08:04:08.95#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.232.08:04:08.95#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.232.08:04:08.95#ibcon#ireg 11 cls_cnt 2 2006.232.08:04:08.95#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.232.08:04:09.01#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.232.08:04:09.01#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.232.08:04:09.01#ibcon#enter wrdev, iclass 29, count 2 2006.232.08:04:09.01#ibcon#first serial, iclass 29, count 2 2006.232.08:04:09.01#ibcon#enter sib2, iclass 29, count 2 2006.232.08:04:09.01#ibcon#flushed, iclass 29, count 2 2006.232.08:04:09.01#ibcon#about to write, iclass 29, count 2 2006.232.08:04:09.01#ibcon#wrote, iclass 29, count 2 2006.232.08:04:09.01#ibcon#about to read 3, iclass 29, count 2 2006.232.08:04:09.03#ibcon#read 3, iclass 29, count 2 2006.232.08:04:09.03#ibcon#about to read 4, iclass 29, count 2 2006.232.08:04:09.03#ibcon#read 4, iclass 29, count 2 2006.232.08:04:09.03#ibcon#about to read 5, iclass 29, count 2 2006.232.08:04:09.03#ibcon#read 5, iclass 29, count 2 2006.232.08:04:09.03#ibcon#about to read 6, iclass 29, count 2 2006.232.08:04:09.03#ibcon#read 6, iclass 29, count 2 2006.232.08:04:09.03#ibcon#end of sib2, iclass 29, count 2 2006.232.08:04:09.03#ibcon#*mode == 0, iclass 29, count 2 2006.232.08:04:09.03#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.232.08:04:09.03#ibcon#[25=AT04-07\r\n] 2006.232.08:04:09.03#ibcon#*before write, iclass 29, count 2 2006.232.08:04:09.03#ibcon#enter sib2, iclass 29, count 2 2006.232.08:04:09.03#ibcon#flushed, iclass 29, count 2 2006.232.08:04:09.03#ibcon#about to write, iclass 29, count 2 2006.232.08:04:09.03#ibcon#wrote, iclass 29, count 2 2006.232.08:04:09.03#ibcon#about to read 3, iclass 29, count 2 2006.232.08:04:09.06#ibcon#read 3, iclass 29, count 2 2006.232.08:04:09.06#ibcon#about to read 4, iclass 29, count 2 2006.232.08:04:09.06#ibcon#read 4, iclass 29, count 2 2006.232.08:04:09.06#ibcon#about to read 5, iclass 29, count 2 2006.232.08:04:09.06#ibcon#read 5, iclass 29, count 2 2006.232.08:04:09.06#ibcon#about to read 6, iclass 29, count 2 2006.232.08:04:09.06#ibcon#read 6, iclass 29, count 2 2006.232.08:04:09.06#ibcon#end of sib2, iclass 29, count 2 2006.232.08:04:09.06#ibcon#*after write, iclass 29, count 2 2006.232.08:04:09.06#ibcon#*before return 0, iclass 29, count 2 2006.232.08:04:09.06#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.232.08:04:09.06#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.232.08:04:09.06#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.232.08:04:09.06#ibcon#ireg 7 cls_cnt 0 2006.232.08:04:09.06#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.232.08:04:09.18#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.232.08:04:09.18#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.232.08:04:09.18#ibcon#enter wrdev, iclass 29, count 0 2006.232.08:04:09.18#ibcon#first serial, iclass 29, count 0 2006.232.08:04:09.18#ibcon#enter sib2, iclass 29, count 0 2006.232.08:04:09.18#ibcon#flushed, iclass 29, count 0 2006.232.08:04:09.18#ibcon#about to write, iclass 29, count 0 2006.232.08:04:09.18#ibcon#wrote, iclass 29, count 0 2006.232.08:04:09.18#ibcon#about to read 3, iclass 29, count 0 2006.232.08:04:09.20#ibcon#read 3, iclass 29, count 0 2006.232.08:04:09.20#ibcon#about to read 4, iclass 29, count 0 2006.232.08:04:09.20#ibcon#read 4, iclass 29, count 0 2006.232.08:04:09.20#ibcon#about to read 5, iclass 29, count 0 2006.232.08:04:09.20#ibcon#read 5, iclass 29, count 0 2006.232.08:04:09.20#ibcon#about to read 6, iclass 29, count 0 2006.232.08:04:09.20#ibcon#read 6, iclass 29, count 0 2006.232.08:04:09.20#ibcon#end of sib2, iclass 29, count 0 2006.232.08:04:09.20#ibcon#*mode == 0, iclass 29, count 0 2006.232.08:04:09.20#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.232.08:04:09.20#ibcon#[25=USB\r\n] 2006.232.08:04:09.20#ibcon#*before write, iclass 29, count 0 2006.232.08:04:09.20#ibcon#enter sib2, iclass 29, count 0 2006.232.08:04:09.20#ibcon#flushed, iclass 29, count 0 2006.232.08:04:09.20#ibcon#about to write, iclass 29, count 0 2006.232.08:04:09.20#ibcon#wrote, iclass 29, count 0 2006.232.08:04:09.20#ibcon#about to read 3, iclass 29, count 0 2006.232.08:04:09.23#ibcon#read 3, iclass 29, count 0 2006.232.08:04:09.23#ibcon#about to read 4, iclass 29, count 0 2006.232.08:04:09.23#ibcon#read 4, iclass 29, count 0 2006.232.08:04:09.23#ibcon#about to read 5, iclass 29, count 0 2006.232.08:04:09.23#ibcon#read 5, iclass 29, count 0 2006.232.08:04:09.23#ibcon#about to read 6, iclass 29, count 0 2006.232.08:04:09.23#ibcon#read 6, iclass 29, count 0 2006.232.08:04:09.23#ibcon#end of sib2, iclass 29, count 0 2006.232.08:04:09.23#ibcon#*after write, iclass 29, count 0 2006.232.08:04:09.23#ibcon#*before return 0, iclass 29, count 0 2006.232.08:04:09.23#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.232.08:04:09.23#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.232.08:04:09.23#ibcon#about to clear, iclass 29 cls_cnt 0 2006.232.08:04:09.23#ibcon#cleared, iclass 29 cls_cnt 0 2006.232.08:04:09.23$vc4f8/valo=5,652.99 2006.232.08:04:09.23#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.232.08:04:09.23#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.232.08:04:09.23#ibcon#ireg 17 cls_cnt 0 2006.232.08:04:09.23#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.232.08:04:09.23#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.232.08:04:09.23#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.232.08:04:09.23#ibcon#enter wrdev, iclass 31, count 0 2006.232.08:04:09.23#ibcon#first serial, iclass 31, count 0 2006.232.08:04:09.23#ibcon#enter sib2, iclass 31, count 0 2006.232.08:04:09.23#ibcon#flushed, iclass 31, count 0 2006.232.08:04:09.23#ibcon#about to write, iclass 31, count 0 2006.232.08:04:09.23#ibcon#wrote, iclass 31, count 0 2006.232.08:04:09.23#ibcon#about to read 3, iclass 31, count 0 2006.232.08:04:09.25#ibcon#read 3, iclass 31, count 0 2006.232.08:04:09.25#ibcon#about to read 4, iclass 31, count 0 2006.232.08:04:09.25#ibcon#read 4, iclass 31, count 0 2006.232.08:04:09.25#ibcon#about to read 5, iclass 31, count 0 2006.232.08:04:09.25#ibcon#read 5, iclass 31, count 0 2006.232.08:04:09.25#ibcon#about to read 6, iclass 31, count 0 2006.232.08:04:09.25#ibcon#read 6, iclass 31, count 0 2006.232.08:04:09.25#ibcon#end of sib2, iclass 31, count 0 2006.232.08:04:09.25#ibcon#*mode == 0, iclass 31, count 0 2006.232.08:04:09.25#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.232.08:04:09.25#ibcon#[26=FRQ=05,652.99\r\n] 2006.232.08:04:09.25#ibcon#*before write, iclass 31, count 0 2006.232.08:04:09.25#ibcon#enter sib2, iclass 31, count 0 2006.232.08:04:09.25#ibcon#flushed, iclass 31, count 0 2006.232.08:04:09.25#ibcon#about to write, iclass 31, count 0 2006.232.08:04:09.25#ibcon#wrote, iclass 31, count 0 2006.232.08:04:09.25#ibcon#about to read 3, iclass 31, count 0 2006.232.08:04:09.29#ibcon#read 3, iclass 31, count 0 2006.232.08:04:09.29#ibcon#about to read 4, iclass 31, count 0 2006.232.08:04:09.29#ibcon#read 4, iclass 31, count 0 2006.232.08:04:09.29#ibcon#about to read 5, iclass 31, count 0 2006.232.08:04:09.29#ibcon#read 5, iclass 31, count 0 2006.232.08:04:09.29#ibcon#about to read 6, iclass 31, count 0 2006.232.08:04:09.29#ibcon#read 6, iclass 31, count 0 2006.232.08:04:09.29#ibcon#end of sib2, iclass 31, count 0 2006.232.08:04:09.29#ibcon#*after write, iclass 31, count 0 2006.232.08:04:09.29#ibcon#*before return 0, iclass 31, count 0 2006.232.08:04:09.29#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.232.08:04:09.29#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.232.08:04:09.29#ibcon#about to clear, iclass 31 cls_cnt 0 2006.232.08:04:09.29#ibcon#cleared, iclass 31 cls_cnt 0 2006.232.08:04:09.29$vc4f8/va=5,7 2006.232.08:04:09.29#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.232.08:04:09.29#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.232.08:04:09.29#ibcon#ireg 11 cls_cnt 2 2006.232.08:04:09.29#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.232.08:04:09.35#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.232.08:04:09.35#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.232.08:04:09.35#ibcon#enter wrdev, iclass 33, count 2 2006.232.08:04:09.35#ibcon#first serial, iclass 33, count 2 2006.232.08:04:09.35#ibcon#enter sib2, iclass 33, count 2 2006.232.08:04:09.35#ibcon#flushed, iclass 33, count 2 2006.232.08:04:09.35#ibcon#about to write, iclass 33, count 2 2006.232.08:04:09.35#ibcon#wrote, iclass 33, count 2 2006.232.08:04:09.35#ibcon#about to read 3, iclass 33, count 2 2006.232.08:04:09.37#ibcon#read 3, iclass 33, count 2 2006.232.08:04:09.37#ibcon#about to read 4, iclass 33, count 2 2006.232.08:04:09.37#ibcon#read 4, iclass 33, count 2 2006.232.08:04:09.37#ibcon#about to read 5, iclass 33, count 2 2006.232.08:04:09.37#ibcon#read 5, iclass 33, count 2 2006.232.08:04:09.37#ibcon#about to read 6, iclass 33, count 2 2006.232.08:04:09.37#ibcon#read 6, iclass 33, count 2 2006.232.08:04:09.37#ibcon#end of sib2, iclass 33, count 2 2006.232.08:04:09.37#ibcon#*mode == 0, iclass 33, count 2 2006.232.08:04:09.37#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.232.08:04:09.37#ibcon#[25=AT05-07\r\n] 2006.232.08:04:09.37#ibcon#*before write, iclass 33, count 2 2006.232.08:04:09.37#ibcon#enter sib2, iclass 33, count 2 2006.232.08:04:09.37#ibcon#flushed, iclass 33, count 2 2006.232.08:04:09.37#ibcon#about to write, iclass 33, count 2 2006.232.08:04:09.37#ibcon#wrote, iclass 33, count 2 2006.232.08:04:09.37#ibcon#about to read 3, iclass 33, count 2 2006.232.08:04:09.40#ibcon#read 3, iclass 33, count 2 2006.232.08:04:09.40#ibcon#about to read 4, iclass 33, count 2 2006.232.08:04:09.40#ibcon#read 4, iclass 33, count 2 2006.232.08:04:09.40#ibcon#about to read 5, iclass 33, count 2 2006.232.08:04:09.40#ibcon#read 5, iclass 33, count 2 2006.232.08:04:09.40#ibcon#about to read 6, iclass 33, count 2 2006.232.08:04:09.40#ibcon#read 6, iclass 33, count 2 2006.232.08:04:09.40#ibcon#end of sib2, iclass 33, count 2 2006.232.08:04:09.40#ibcon#*after write, iclass 33, count 2 2006.232.08:04:09.40#ibcon#*before return 0, iclass 33, count 2 2006.232.08:04:09.40#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.232.08:04:09.40#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.232.08:04:09.40#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.232.08:04:09.40#ibcon#ireg 7 cls_cnt 0 2006.232.08:04:09.40#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.232.08:04:09.52#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.232.08:04:09.52#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.232.08:04:09.52#ibcon#enter wrdev, iclass 33, count 0 2006.232.08:04:09.52#ibcon#first serial, iclass 33, count 0 2006.232.08:04:09.52#ibcon#enter sib2, iclass 33, count 0 2006.232.08:04:09.52#ibcon#flushed, iclass 33, count 0 2006.232.08:04:09.52#ibcon#about to write, iclass 33, count 0 2006.232.08:04:09.52#ibcon#wrote, iclass 33, count 0 2006.232.08:04:09.52#ibcon#about to read 3, iclass 33, count 0 2006.232.08:04:09.54#ibcon#read 3, iclass 33, count 0 2006.232.08:04:09.54#ibcon#about to read 4, iclass 33, count 0 2006.232.08:04:09.54#ibcon#read 4, iclass 33, count 0 2006.232.08:04:09.54#ibcon#about to read 5, iclass 33, count 0 2006.232.08:04:09.54#ibcon#read 5, iclass 33, count 0 2006.232.08:04:09.54#ibcon#about to read 6, iclass 33, count 0 2006.232.08:04:09.54#ibcon#read 6, iclass 33, count 0 2006.232.08:04:09.54#ibcon#end of sib2, iclass 33, count 0 2006.232.08:04:09.54#ibcon#*mode == 0, iclass 33, count 0 2006.232.08:04:09.54#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.232.08:04:09.54#ibcon#[25=USB\r\n] 2006.232.08:04:09.54#ibcon#*before write, iclass 33, count 0 2006.232.08:04:09.54#ibcon#enter sib2, iclass 33, count 0 2006.232.08:04:09.54#ibcon#flushed, iclass 33, count 0 2006.232.08:04:09.54#ibcon#about to write, iclass 33, count 0 2006.232.08:04:09.54#ibcon#wrote, iclass 33, count 0 2006.232.08:04:09.54#ibcon#about to read 3, iclass 33, count 0 2006.232.08:04:09.57#ibcon#read 3, iclass 33, count 0 2006.232.08:04:09.57#ibcon#about to read 4, iclass 33, count 0 2006.232.08:04:09.57#ibcon#read 4, iclass 33, count 0 2006.232.08:04:09.57#ibcon#about to read 5, iclass 33, count 0 2006.232.08:04:09.57#ibcon#read 5, iclass 33, count 0 2006.232.08:04:09.57#ibcon#about to read 6, iclass 33, count 0 2006.232.08:04:09.57#ibcon#read 6, iclass 33, count 0 2006.232.08:04:09.57#ibcon#end of sib2, iclass 33, count 0 2006.232.08:04:09.57#ibcon#*after write, iclass 33, count 0 2006.232.08:04:09.57#ibcon#*before return 0, iclass 33, count 0 2006.232.08:04:09.57#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.232.08:04:09.57#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.232.08:04:09.57#ibcon#about to clear, iclass 33 cls_cnt 0 2006.232.08:04:09.57#ibcon#cleared, iclass 33 cls_cnt 0 2006.232.08:04:09.57$vc4f8/valo=6,772.99 2006.232.08:04:09.57#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.232.08:04:09.57#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.232.08:04:09.57#ibcon#ireg 17 cls_cnt 0 2006.232.08:04:09.57#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.232.08:04:09.57#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.232.08:04:09.57#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.232.08:04:09.57#ibcon#enter wrdev, iclass 35, count 0 2006.232.08:04:09.57#ibcon#first serial, iclass 35, count 0 2006.232.08:04:09.57#ibcon#enter sib2, iclass 35, count 0 2006.232.08:04:09.57#ibcon#flushed, iclass 35, count 0 2006.232.08:04:09.57#ibcon#about to write, iclass 35, count 0 2006.232.08:04:09.57#ibcon#wrote, iclass 35, count 0 2006.232.08:04:09.57#ibcon#about to read 3, iclass 35, count 0 2006.232.08:04:09.59#ibcon#read 3, iclass 35, count 0 2006.232.08:04:09.59#ibcon#about to read 4, iclass 35, count 0 2006.232.08:04:09.59#ibcon#read 4, iclass 35, count 0 2006.232.08:04:09.59#ibcon#about to read 5, iclass 35, count 0 2006.232.08:04:09.59#ibcon#read 5, iclass 35, count 0 2006.232.08:04:09.59#ibcon#about to read 6, iclass 35, count 0 2006.232.08:04:09.59#ibcon#read 6, iclass 35, count 0 2006.232.08:04:09.59#ibcon#end of sib2, iclass 35, count 0 2006.232.08:04:09.59#ibcon#*mode == 0, iclass 35, count 0 2006.232.08:04:09.59#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.232.08:04:09.59#ibcon#[26=FRQ=06,772.99\r\n] 2006.232.08:04:09.59#ibcon#*before write, iclass 35, count 0 2006.232.08:04:09.59#ibcon#enter sib2, iclass 35, count 0 2006.232.08:04:09.59#ibcon#flushed, iclass 35, count 0 2006.232.08:04:09.59#ibcon#about to write, iclass 35, count 0 2006.232.08:04:09.59#ibcon#wrote, iclass 35, count 0 2006.232.08:04:09.59#ibcon#about to read 3, iclass 35, count 0 2006.232.08:04:09.63#ibcon#read 3, iclass 35, count 0 2006.232.08:04:09.63#ibcon#about to read 4, iclass 35, count 0 2006.232.08:04:09.63#ibcon#read 4, iclass 35, count 0 2006.232.08:04:09.63#ibcon#about to read 5, iclass 35, count 0 2006.232.08:04:09.63#ibcon#read 5, iclass 35, count 0 2006.232.08:04:09.63#ibcon#about to read 6, iclass 35, count 0 2006.232.08:04:09.63#ibcon#read 6, iclass 35, count 0 2006.232.08:04:09.63#ibcon#end of sib2, iclass 35, count 0 2006.232.08:04:09.63#ibcon#*after write, iclass 35, count 0 2006.232.08:04:09.63#ibcon#*before return 0, iclass 35, count 0 2006.232.08:04:09.63#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.232.08:04:09.63#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.232.08:04:09.63#ibcon#about to clear, iclass 35 cls_cnt 0 2006.232.08:04:09.63#ibcon#cleared, iclass 35 cls_cnt 0 2006.232.08:04:09.63$vc4f8/va=6,6 2006.232.08:04:09.63#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.232.08:04:09.63#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.232.08:04:09.63#ibcon#ireg 11 cls_cnt 2 2006.232.08:04:09.63#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.232.08:04:09.69#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.232.08:04:09.69#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.232.08:04:09.69#ibcon#enter wrdev, iclass 37, count 2 2006.232.08:04:09.69#ibcon#first serial, iclass 37, count 2 2006.232.08:04:09.69#ibcon#enter sib2, iclass 37, count 2 2006.232.08:04:09.69#ibcon#flushed, iclass 37, count 2 2006.232.08:04:09.69#ibcon#about to write, iclass 37, count 2 2006.232.08:04:09.69#ibcon#wrote, iclass 37, count 2 2006.232.08:04:09.69#ibcon#about to read 3, iclass 37, count 2 2006.232.08:04:09.71#ibcon#read 3, iclass 37, count 2 2006.232.08:04:09.71#ibcon#about to read 4, iclass 37, count 2 2006.232.08:04:09.71#ibcon#read 4, iclass 37, count 2 2006.232.08:04:09.71#ibcon#about to read 5, iclass 37, count 2 2006.232.08:04:09.71#ibcon#read 5, iclass 37, count 2 2006.232.08:04:09.71#ibcon#about to read 6, iclass 37, count 2 2006.232.08:04:09.71#ibcon#read 6, iclass 37, count 2 2006.232.08:04:09.71#ibcon#end of sib2, iclass 37, count 2 2006.232.08:04:09.71#ibcon#*mode == 0, iclass 37, count 2 2006.232.08:04:09.71#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.232.08:04:09.71#ibcon#[25=AT06-06\r\n] 2006.232.08:04:09.71#ibcon#*before write, iclass 37, count 2 2006.232.08:04:09.71#ibcon#enter sib2, iclass 37, count 2 2006.232.08:04:09.71#ibcon#flushed, iclass 37, count 2 2006.232.08:04:09.71#ibcon#about to write, iclass 37, count 2 2006.232.08:04:09.71#ibcon#wrote, iclass 37, count 2 2006.232.08:04:09.71#ibcon#about to read 3, iclass 37, count 2 2006.232.08:04:09.74#ibcon#read 3, iclass 37, count 2 2006.232.08:04:09.74#ibcon#about to read 4, iclass 37, count 2 2006.232.08:04:09.74#ibcon#read 4, iclass 37, count 2 2006.232.08:04:09.74#ibcon#about to read 5, iclass 37, count 2 2006.232.08:04:09.74#ibcon#read 5, iclass 37, count 2 2006.232.08:04:09.74#ibcon#about to read 6, iclass 37, count 2 2006.232.08:04:09.74#ibcon#read 6, iclass 37, count 2 2006.232.08:04:09.74#ibcon#end of sib2, iclass 37, count 2 2006.232.08:04:09.74#ibcon#*after write, iclass 37, count 2 2006.232.08:04:09.74#ibcon#*before return 0, iclass 37, count 2 2006.232.08:04:09.74#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.232.08:04:09.74#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.232.08:04:09.74#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.232.08:04:09.74#ibcon#ireg 7 cls_cnt 0 2006.232.08:04:09.74#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.232.08:04:09.86#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.232.08:04:09.86#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.232.08:04:09.86#ibcon#enter wrdev, iclass 37, count 0 2006.232.08:04:09.86#ibcon#first serial, iclass 37, count 0 2006.232.08:04:09.86#ibcon#enter sib2, iclass 37, count 0 2006.232.08:04:09.86#ibcon#flushed, iclass 37, count 0 2006.232.08:04:09.86#ibcon#about to write, iclass 37, count 0 2006.232.08:04:09.86#ibcon#wrote, iclass 37, count 0 2006.232.08:04:09.86#ibcon#about to read 3, iclass 37, count 0 2006.232.08:04:09.88#ibcon#read 3, iclass 37, count 0 2006.232.08:04:09.88#ibcon#about to read 4, iclass 37, count 0 2006.232.08:04:09.88#ibcon#read 4, iclass 37, count 0 2006.232.08:04:09.88#ibcon#about to read 5, iclass 37, count 0 2006.232.08:04:09.88#ibcon#read 5, iclass 37, count 0 2006.232.08:04:09.88#ibcon#about to read 6, iclass 37, count 0 2006.232.08:04:09.88#ibcon#read 6, iclass 37, count 0 2006.232.08:04:09.88#ibcon#end of sib2, iclass 37, count 0 2006.232.08:04:09.88#ibcon#*mode == 0, iclass 37, count 0 2006.232.08:04:09.88#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.232.08:04:09.88#ibcon#[25=USB\r\n] 2006.232.08:04:09.88#ibcon#*before write, iclass 37, count 0 2006.232.08:04:09.88#ibcon#enter sib2, iclass 37, count 0 2006.232.08:04:09.88#ibcon#flushed, iclass 37, count 0 2006.232.08:04:09.88#ibcon#about to write, iclass 37, count 0 2006.232.08:04:09.88#ibcon#wrote, iclass 37, count 0 2006.232.08:04:09.88#ibcon#about to read 3, iclass 37, count 0 2006.232.08:04:09.91#ibcon#read 3, iclass 37, count 0 2006.232.08:04:09.91#ibcon#about to read 4, iclass 37, count 0 2006.232.08:04:09.91#ibcon#read 4, iclass 37, count 0 2006.232.08:04:09.91#ibcon#about to read 5, iclass 37, count 0 2006.232.08:04:09.91#ibcon#read 5, iclass 37, count 0 2006.232.08:04:09.91#ibcon#about to read 6, iclass 37, count 0 2006.232.08:04:09.91#ibcon#read 6, iclass 37, count 0 2006.232.08:04:09.91#ibcon#end of sib2, iclass 37, count 0 2006.232.08:04:09.91#ibcon#*after write, iclass 37, count 0 2006.232.08:04:09.91#ibcon#*before return 0, iclass 37, count 0 2006.232.08:04:09.91#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.232.08:04:09.91#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.232.08:04:09.91#ibcon#about to clear, iclass 37 cls_cnt 0 2006.232.08:04:09.91#ibcon#cleared, iclass 37 cls_cnt 0 2006.232.08:04:09.91$vc4f8/valo=7,832.99 2006.232.08:04:09.91#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.232.08:04:09.91#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.232.08:04:09.91#ibcon#ireg 17 cls_cnt 0 2006.232.08:04:09.91#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.232.08:04:09.91#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.232.08:04:09.91#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.232.08:04:09.91#ibcon#enter wrdev, iclass 39, count 0 2006.232.08:04:09.91#ibcon#first serial, iclass 39, count 0 2006.232.08:04:09.91#ibcon#enter sib2, iclass 39, count 0 2006.232.08:04:09.91#ibcon#flushed, iclass 39, count 0 2006.232.08:04:09.91#ibcon#about to write, iclass 39, count 0 2006.232.08:04:09.91#ibcon#wrote, iclass 39, count 0 2006.232.08:04:09.91#ibcon#about to read 3, iclass 39, count 0 2006.232.08:04:09.93#ibcon#read 3, iclass 39, count 0 2006.232.08:04:09.93#ibcon#about to read 4, iclass 39, count 0 2006.232.08:04:09.93#ibcon#read 4, iclass 39, count 0 2006.232.08:04:09.93#ibcon#about to read 5, iclass 39, count 0 2006.232.08:04:09.93#ibcon#read 5, iclass 39, count 0 2006.232.08:04:09.93#ibcon#about to read 6, iclass 39, count 0 2006.232.08:04:09.93#ibcon#read 6, iclass 39, count 0 2006.232.08:04:09.93#ibcon#end of sib2, iclass 39, count 0 2006.232.08:04:09.93#ibcon#*mode == 0, iclass 39, count 0 2006.232.08:04:09.93#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.232.08:04:09.93#ibcon#[26=FRQ=07,832.99\r\n] 2006.232.08:04:09.93#ibcon#*before write, iclass 39, count 0 2006.232.08:04:09.93#ibcon#enter sib2, iclass 39, count 0 2006.232.08:04:09.93#ibcon#flushed, iclass 39, count 0 2006.232.08:04:09.93#ibcon#about to write, iclass 39, count 0 2006.232.08:04:09.93#ibcon#wrote, iclass 39, count 0 2006.232.08:04:09.93#ibcon#about to read 3, iclass 39, count 0 2006.232.08:04:09.97#ibcon#read 3, iclass 39, count 0 2006.232.08:04:09.97#ibcon#about to read 4, iclass 39, count 0 2006.232.08:04:09.97#ibcon#read 4, iclass 39, count 0 2006.232.08:04:09.97#ibcon#about to read 5, iclass 39, count 0 2006.232.08:04:09.97#ibcon#read 5, iclass 39, count 0 2006.232.08:04:09.97#ibcon#about to read 6, iclass 39, count 0 2006.232.08:04:09.97#ibcon#read 6, iclass 39, count 0 2006.232.08:04:09.97#ibcon#end of sib2, iclass 39, count 0 2006.232.08:04:09.97#ibcon#*after write, iclass 39, count 0 2006.232.08:04:09.97#ibcon#*before return 0, iclass 39, count 0 2006.232.08:04:09.97#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.232.08:04:09.97#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.232.08:04:09.97#ibcon#about to clear, iclass 39 cls_cnt 0 2006.232.08:04:09.97#ibcon#cleared, iclass 39 cls_cnt 0 2006.232.08:04:09.97$vc4f8/va=7,6 2006.232.08:04:09.97#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.232.08:04:09.97#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.232.08:04:09.97#ibcon#ireg 11 cls_cnt 2 2006.232.08:04:09.97#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.232.08:04:10.03#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.232.08:04:10.03#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.232.08:04:10.03#ibcon#enter wrdev, iclass 3, count 2 2006.232.08:04:10.03#ibcon#first serial, iclass 3, count 2 2006.232.08:04:10.03#ibcon#enter sib2, iclass 3, count 2 2006.232.08:04:10.03#ibcon#flushed, iclass 3, count 2 2006.232.08:04:10.03#ibcon#about to write, iclass 3, count 2 2006.232.08:04:10.03#ibcon#wrote, iclass 3, count 2 2006.232.08:04:10.03#ibcon#about to read 3, iclass 3, count 2 2006.232.08:04:10.05#ibcon#read 3, iclass 3, count 2 2006.232.08:04:10.05#ibcon#about to read 4, iclass 3, count 2 2006.232.08:04:10.05#ibcon#read 4, iclass 3, count 2 2006.232.08:04:10.05#ibcon#about to read 5, iclass 3, count 2 2006.232.08:04:10.05#ibcon#read 5, iclass 3, count 2 2006.232.08:04:10.05#ibcon#about to read 6, iclass 3, count 2 2006.232.08:04:10.05#ibcon#read 6, iclass 3, count 2 2006.232.08:04:10.05#ibcon#end of sib2, iclass 3, count 2 2006.232.08:04:10.05#ibcon#*mode == 0, iclass 3, count 2 2006.232.08:04:10.05#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.232.08:04:10.05#ibcon#[25=AT07-06\r\n] 2006.232.08:04:10.05#ibcon#*before write, iclass 3, count 2 2006.232.08:04:10.05#ibcon#enter sib2, iclass 3, count 2 2006.232.08:04:10.05#ibcon#flushed, iclass 3, count 2 2006.232.08:04:10.05#ibcon#about to write, iclass 3, count 2 2006.232.08:04:10.05#ibcon#wrote, iclass 3, count 2 2006.232.08:04:10.05#ibcon#about to read 3, iclass 3, count 2 2006.232.08:04:10.08#ibcon#read 3, iclass 3, count 2 2006.232.08:04:10.08#ibcon#about to read 4, iclass 3, count 2 2006.232.08:04:10.08#ibcon#read 4, iclass 3, count 2 2006.232.08:04:10.08#ibcon#about to read 5, iclass 3, count 2 2006.232.08:04:10.08#ibcon#read 5, iclass 3, count 2 2006.232.08:04:10.08#ibcon#about to read 6, iclass 3, count 2 2006.232.08:04:10.08#ibcon#read 6, iclass 3, count 2 2006.232.08:04:10.08#ibcon#end of sib2, iclass 3, count 2 2006.232.08:04:10.08#ibcon#*after write, iclass 3, count 2 2006.232.08:04:10.08#ibcon#*before return 0, iclass 3, count 2 2006.232.08:04:10.08#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.232.08:04:10.08#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.232.08:04:10.08#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.232.08:04:10.08#ibcon#ireg 7 cls_cnt 0 2006.232.08:04:10.08#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.232.08:04:10.20#abcon#<5=/05 3.7 6.9 29.39 871007.3\r\n> 2006.232.08:04:10.20#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.232.08:04:10.20#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.232.08:04:10.20#ibcon#enter wrdev, iclass 3, count 0 2006.232.08:04:10.20#ibcon#first serial, iclass 3, count 0 2006.232.08:04:10.20#ibcon#enter sib2, iclass 3, count 0 2006.232.08:04:10.20#ibcon#flushed, iclass 3, count 0 2006.232.08:04:10.20#ibcon#about to write, iclass 3, count 0 2006.232.08:04:10.20#ibcon#wrote, iclass 3, count 0 2006.232.08:04:10.20#ibcon#about to read 3, iclass 3, count 0 2006.232.08:04:10.22#ibcon#read 3, iclass 3, count 0 2006.232.08:04:10.22#ibcon#about to read 4, iclass 3, count 0 2006.232.08:04:10.22#ibcon#read 4, iclass 3, count 0 2006.232.08:04:10.22#ibcon#about to read 5, iclass 3, count 0 2006.232.08:04:10.22#ibcon#read 5, iclass 3, count 0 2006.232.08:04:10.22#ibcon#about to read 6, iclass 3, count 0 2006.232.08:04:10.22#ibcon#read 6, iclass 3, count 0 2006.232.08:04:10.22#ibcon#end of sib2, iclass 3, count 0 2006.232.08:04:10.22#ibcon#*mode == 0, iclass 3, count 0 2006.232.08:04:10.22#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.232.08:04:10.22#ibcon#[25=USB\r\n] 2006.232.08:04:10.22#ibcon#*before write, iclass 3, count 0 2006.232.08:04:10.22#ibcon#enter sib2, iclass 3, count 0 2006.232.08:04:10.22#ibcon#flushed, iclass 3, count 0 2006.232.08:04:10.22#ibcon#about to write, iclass 3, count 0 2006.232.08:04:10.22#ibcon#wrote, iclass 3, count 0 2006.232.08:04:10.22#ibcon#about to read 3, iclass 3, count 0 2006.232.08:04:10.22#abcon#{5=INTERFACE CLEAR} 2006.232.08:04:10.25#ibcon#read 3, iclass 3, count 0 2006.232.08:04:10.25#ibcon#about to read 4, iclass 3, count 0 2006.232.08:04:10.25#ibcon#read 4, iclass 3, count 0 2006.232.08:04:10.25#ibcon#about to read 5, iclass 3, count 0 2006.232.08:04:10.25#ibcon#read 5, iclass 3, count 0 2006.232.08:04:10.25#ibcon#about to read 6, iclass 3, count 0 2006.232.08:04:10.25#ibcon#read 6, iclass 3, count 0 2006.232.08:04:10.25#ibcon#end of sib2, iclass 3, count 0 2006.232.08:04:10.25#ibcon#*after write, iclass 3, count 0 2006.232.08:04:10.25#ibcon#*before return 0, iclass 3, count 0 2006.232.08:04:10.25#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.232.08:04:10.25#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.232.08:04:10.25#ibcon#about to clear, iclass 3 cls_cnt 0 2006.232.08:04:10.25#ibcon#cleared, iclass 3 cls_cnt 0 2006.232.08:04:10.25$vc4f8/valo=8,852.99 2006.232.08:04:10.25#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.232.08:04:10.25#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.232.08:04:10.25#ibcon#ireg 17 cls_cnt 0 2006.232.08:04:10.25#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.232.08:04:10.25#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.232.08:04:10.25#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.232.08:04:10.25#ibcon#enter wrdev, iclass 10, count 0 2006.232.08:04:10.25#ibcon#first serial, iclass 10, count 0 2006.232.08:04:10.25#ibcon#enter sib2, iclass 10, count 0 2006.232.08:04:10.25#ibcon#flushed, iclass 10, count 0 2006.232.08:04:10.25#ibcon#about to write, iclass 10, count 0 2006.232.08:04:10.25#ibcon#wrote, iclass 10, count 0 2006.232.08:04:10.25#ibcon#about to read 3, iclass 10, count 0 2006.232.08:04:10.27#ibcon#read 3, iclass 10, count 0 2006.232.08:04:10.27#ibcon#about to read 4, iclass 10, count 0 2006.232.08:04:10.27#ibcon#read 4, iclass 10, count 0 2006.232.08:04:10.27#ibcon#about to read 5, iclass 10, count 0 2006.232.08:04:10.27#ibcon#read 5, iclass 10, count 0 2006.232.08:04:10.27#ibcon#about to read 6, iclass 10, count 0 2006.232.08:04:10.27#ibcon#read 6, iclass 10, count 0 2006.232.08:04:10.27#ibcon#end of sib2, iclass 10, count 0 2006.232.08:04:10.27#ibcon#*mode == 0, iclass 10, count 0 2006.232.08:04:10.27#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.232.08:04:10.27#ibcon#[26=FRQ=08,852.99\r\n] 2006.232.08:04:10.27#ibcon#*before write, iclass 10, count 0 2006.232.08:04:10.27#ibcon#enter sib2, iclass 10, count 0 2006.232.08:04:10.27#ibcon#flushed, iclass 10, count 0 2006.232.08:04:10.27#ibcon#about to write, iclass 10, count 0 2006.232.08:04:10.27#ibcon#wrote, iclass 10, count 0 2006.232.08:04:10.27#ibcon#about to read 3, iclass 10, count 0 2006.232.08:04:10.28#abcon#[5=S1D000X0/0*\r\n] 2006.232.08:04:10.31#ibcon#read 3, iclass 10, count 0 2006.232.08:04:10.31#ibcon#about to read 4, iclass 10, count 0 2006.232.08:04:10.31#ibcon#read 4, iclass 10, count 0 2006.232.08:04:10.31#ibcon#about to read 5, iclass 10, count 0 2006.232.08:04:10.31#ibcon#read 5, iclass 10, count 0 2006.232.08:04:10.31#ibcon#about to read 6, iclass 10, count 0 2006.232.08:04:10.31#ibcon#read 6, iclass 10, count 0 2006.232.08:04:10.31#ibcon#end of sib2, iclass 10, count 0 2006.232.08:04:10.31#ibcon#*after write, iclass 10, count 0 2006.232.08:04:10.31#ibcon#*before return 0, iclass 10, count 0 2006.232.08:04:10.31#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.232.08:04:10.31#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.232.08:04:10.31#ibcon#about to clear, iclass 10 cls_cnt 0 2006.232.08:04:10.31#ibcon#cleared, iclass 10 cls_cnt 0 2006.232.08:04:10.31$vc4f8/va=8,6 2006.232.08:04:10.31#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.232.08:04:10.31#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.232.08:04:10.31#ibcon#ireg 11 cls_cnt 2 2006.232.08:04:10.31#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.232.08:04:10.37#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.232.08:04:10.37#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.232.08:04:10.37#ibcon#enter wrdev, iclass 13, count 2 2006.232.08:04:10.37#ibcon#first serial, iclass 13, count 2 2006.232.08:04:10.37#ibcon#enter sib2, iclass 13, count 2 2006.232.08:04:10.37#ibcon#flushed, iclass 13, count 2 2006.232.08:04:10.37#ibcon#about to write, iclass 13, count 2 2006.232.08:04:10.37#ibcon#wrote, iclass 13, count 2 2006.232.08:04:10.37#ibcon#about to read 3, iclass 13, count 2 2006.232.08:04:10.39#ibcon#read 3, iclass 13, count 2 2006.232.08:04:10.39#ibcon#about to read 4, iclass 13, count 2 2006.232.08:04:10.39#ibcon#read 4, iclass 13, count 2 2006.232.08:04:10.39#ibcon#about to read 5, iclass 13, count 2 2006.232.08:04:10.39#ibcon#read 5, iclass 13, count 2 2006.232.08:04:10.39#ibcon#about to read 6, iclass 13, count 2 2006.232.08:04:10.39#ibcon#read 6, iclass 13, count 2 2006.232.08:04:10.39#ibcon#end of sib2, iclass 13, count 2 2006.232.08:04:10.39#ibcon#*mode == 0, iclass 13, count 2 2006.232.08:04:10.39#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.232.08:04:10.39#ibcon#[25=AT08-06\r\n] 2006.232.08:04:10.39#ibcon#*before write, iclass 13, count 2 2006.232.08:04:10.39#ibcon#enter sib2, iclass 13, count 2 2006.232.08:04:10.39#ibcon#flushed, iclass 13, count 2 2006.232.08:04:10.39#ibcon#about to write, iclass 13, count 2 2006.232.08:04:10.39#ibcon#wrote, iclass 13, count 2 2006.232.08:04:10.39#ibcon#about to read 3, iclass 13, count 2 2006.232.08:04:10.42#ibcon#read 3, iclass 13, count 2 2006.232.08:04:10.42#ibcon#about to read 4, iclass 13, count 2 2006.232.08:04:10.42#ibcon#read 4, iclass 13, count 2 2006.232.08:04:10.42#ibcon#about to read 5, iclass 13, count 2 2006.232.08:04:10.42#ibcon#read 5, iclass 13, count 2 2006.232.08:04:10.42#ibcon#about to read 6, iclass 13, count 2 2006.232.08:04:10.42#ibcon#read 6, iclass 13, count 2 2006.232.08:04:10.42#ibcon#end of sib2, iclass 13, count 2 2006.232.08:04:10.42#ibcon#*after write, iclass 13, count 2 2006.232.08:04:10.42#ibcon#*before return 0, iclass 13, count 2 2006.232.08:04:10.42#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.232.08:04:10.42#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.232.08:04:10.42#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.232.08:04:10.42#ibcon#ireg 7 cls_cnt 0 2006.232.08:04:10.42#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.232.08:04:10.54#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.232.08:04:10.54#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.232.08:04:10.54#ibcon#enter wrdev, iclass 13, count 0 2006.232.08:04:10.54#ibcon#first serial, iclass 13, count 0 2006.232.08:04:10.54#ibcon#enter sib2, iclass 13, count 0 2006.232.08:04:10.54#ibcon#flushed, iclass 13, count 0 2006.232.08:04:10.54#ibcon#about to write, iclass 13, count 0 2006.232.08:04:10.54#ibcon#wrote, iclass 13, count 0 2006.232.08:04:10.54#ibcon#about to read 3, iclass 13, count 0 2006.232.08:04:10.56#ibcon#read 3, iclass 13, count 0 2006.232.08:04:10.56#ibcon#about to read 4, iclass 13, count 0 2006.232.08:04:10.56#ibcon#read 4, iclass 13, count 0 2006.232.08:04:10.56#ibcon#about to read 5, iclass 13, count 0 2006.232.08:04:10.56#ibcon#read 5, iclass 13, count 0 2006.232.08:04:10.56#ibcon#about to read 6, iclass 13, count 0 2006.232.08:04:10.56#ibcon#read 6, iclass 13, count 0 2006.232.08:04:10.56#ibcon#end of sib2, iclass 13, count 0 2006.232.08:04:10.56#ibcon#*mode == 0, iclass 13, count 0 2006.232.08:04:10.56#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.232.08:04:10.56#ibcon#[25=USB\r\n] 2006.232.08:04:10.56#ibcon#*before write, iclass 13, count 0 2006.232.08:04:10.56#ibcon#enter sib2, iclass 13, count 0 2006.232.08:04:10.56#ibcon#flushed, iclass 13, count 0 2006.232.08:04:10.56#ibcon#about to write, iclass 13, count 0 2006.232.08:04:10.56#ibcon#wrote, iclass 13, count 0 2006.232.08:04:10.56#ibcon#about to read 3, iclass 13, count 0 2006.232.08:04:10.59#ibcon#read 3, iclass 13, count 0 2006.232.08:04:10.59#ibcon#about to read 4, iclass 13, count 0 2006.232.08:04:10.59#ibcon#read 4, iclass 13, count 0 2006.232.08:04:10.59#ibcon#about to read 5, iclass 13, count 0 2006.232.08:04:10.59#ibcon#read 5, iclass 13, count 0 2006.232.08:04:10.59#ibcon#about to read 6, iclass 13, count 0 2006.232.08:04:10.59#ibcon#read 6, iclass 13, count 0 2006.232.08:04:10.59#ibcon#end of sib2, iclass 13, count 0 2006.232.08:04:10.59#ibcon#*after write, iclass 13, count 0 2006.232.08:04:10.59#ibcon#*before return 0, iclass 13, count 0 2006.232.08:04:10.59#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.232.08:04:10.59#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.232.08:04:10.59#ibcon#about to clear, iclass 13 cls_cnt 0 2006.232.08:04:10.59#ibcon#cleared, iclass 13 cls_cnt 0 2006.232.08:04:10.59$vc4f8/vblo=1,632.99 2006.232.08:04:10.59#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.232.08:04:10.59#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.232.08:04:10.59#ibcon#ireg 17 cls_cnt 0 2006.232.08:04:10.59#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.232.08:04:10.59#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.232.08:04:10.59#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.232.08:04:10.59#ibcon#enter wrdev, iclass 15, count 0 2006.232.08:04:10.59#ibcon#first serial, iclass 15, count 0 2006.232.08:04:10.59#ibcon#enter sib2, iclass 15, count 0 2006.232.08:04:10.59#ibcon#flushed, iclass 15, count 0 2006.232.08:04:10.59#ibcon#about to write, iclass 15, count 0 2006.232.08:04:10.59#ibcon#wrote, iclass 15, count 0 2006.232.08:04:10.59#ibcon#about to read 3, iclass 15, count 0 2006.232.08:04:10.61#ibcon#read 3, iclass 15, count 0 2006.232.08:04:10.61#ibcon#about to read 4, iclass 15, count 0 2006.232.08:04:10.61#ibcon#read 4, iclass 15, count 0 2006.232.08:04:10.61#ibcon#about to read 5, iclass 15, count 0 2006.232.08:04:10.61#ibcon#read 5, iclass 15, count 0 2006.232.08:04:10.61#ibcon#about to read 6, iclass 15, count 0 2006.232.08:04:10.61#ibcon#read 6, iclass 15, count 0 2006.232.08:04:10.61#ibcon#end of sib2, iclass 15, count 0 2006.232.08:04:10.61#ibcon#*mode == 0, iclass 15, count 0 2006.232.08:04:10.61#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.232.08:04:10.61#ibcon#[28=FRQ=01,632.99\r\n] 2006.232.08:04:10.61#ibcon#*before write, iclass 15, count 0 2006.232.08:04:10.61#ibcon#enter sib2, iclass 15, count 0 2006.232.08:04:10.61#ibcon#flushed, iclass 15, count 0 2006.232.08:04:10.61#ibcon#about to write, iclass 15, count 0 2006.232.08:04:10.61#ibcon#wrote, iclass 15, count 0 2006.232.08:04:10.61#ibcon#about to read 3, iclass 15, count 0 2006.232.08:04:10.65#ibcon#read 3, iclass 15, count 0 2006.232.08:04:10.65#ibcon#about to read 4, iclass 15, count 0 2006.232.08:04:10.65#ibcon#read 4, iclass 15, count 0 2006.232.08:04:10.65#ibcon#about to read 5, iclass 15, count 0 2006.232.08:04:10.65#ibcon#read 5, iclass 15, count 0 2006.232.08:04:10.65#ibcon#about to read 6, iclass 15, count 0 2006.232.08:04:10.65#ibcon#read 6, iclass 15, count 0 2006.232.08:04:10.65#ibcon#end of sib2, iclass 15, count 0 2006.232.08:04:10.65#ibcon#*after write, iclass 15, count 0 2006.232.08:04:10.65#ibcon#*before return 0, iclass 15, count 0 2006.232.08:04:10.65#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.232.08:04:10.65#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.232.08:04:10.65#ibcon#about to clear, iclass 15 cls_cnt 0 2006.232.08:04:10.65#ibcon#cleared, iclass 15 cls_cnt 0 2006.232.08:04:10.65$vc4f8/vb=1,4 2006.232.08:04:10.65#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.232.08:04:10.65#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.232.08:04:10.65#ibcon#ireg 11 cls_cnt 2 2006.232.08:04:10.65#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.232.08:04:10.65#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.232.08:04:10.65#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.232.08:04:10.65#ibcon#enter wrdev, iclass 17, count 2 2006.232.08:04:10.65#ibcon#first serial, iclass 17, count 2 2006.232.08:04:10.65#ibcon#enter sib2, iclass 17, count 2 2006.232.08:04:10.65#ibcon#flushed, iclass 17, count 2 2006.232.08:04:10.65#ibcon#about to write, iclass 17, count 2 2006.232.08:04:10.65#ibcon#wrote, iclass 17, count 2 2006.232.08:04:10.65#ibcon#about to read 3, iclass 17, count 2 2006.232.08:04:10.67#ibcon#read 3, iclass 17, count 2 2006.232.08:04:10.67#ibcon#about to read 4, iclass 17, count 2 2006.232.08:04:10.67#ibcon#read 4, iclass 17, count 2 2006.232.08:04:10.67#ibcon#about to read 5, iclass 17, count 2 2006.232.08:04:10.67#ibcon#read 5, iclass 17, count 2 2006.232.08:04:10.67#ibcon#about to read 6, iclass 17, count 2 2006.232.08:04:10.67#ibcon#read 6, iclass 17, count 2 2006.232.08:04:10.67#ibcon#end of sib2, iclass 17, count 2 2006.232.08:04:10.67#ibcon#*mode == 0, iclass 17, count 2 2006.232.08:04:10.67#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.232.08:04:10.67#ibcon#[27=AT01-04\r\n] 2006.232.08:04:10.67#ibcon#*before write, iclass 17, count 2 2006.232.08:04:10.67#ibcon#enter sib2, iclass 17, count 2 2006.232.08:04:10.67#ibcon#flushed, iclass 17, count 2 2006.232.08:04:10.67#ibcon#about to write, iclass 17, count 2 2006.232.08:04:10.67#ibcon#wrote, iclass 17, count 2 2006.232.08:04:10.67#ibcon#about to read 3, iclass 17, count 2 2006.232.08:04:10.70#ibcon#read 3, iclass 17, count 2 2006.232.08:04:10.70#ibcon#about to read 4, iclass 17, count 2 2006.232.08:04:10.70#ibcon#read 4, iclass 17, count 2 2006.232.08:04:10.70#ibcon#about to read 5, iclass 17, count 2 2006.232.08:04:10.70#ibcon#read 5, iclass 17, count 2 2006.232.08:04:10.70#ibcon#about to read 6, iclass 17, count 2 2006.232.08:04:10.70#ibcon#read 6, iclass 17, count 2 2006.232.08:04:10.70#ibcon#end of sib2, iclass 17, count 2 2006.232.08:04:10.70#ibcon#*after write, iclass 17, count 2 2006.232.08:04:10.70#ibcon#*before return 0, iclass 17, count 2 2006.232.08:04:10.70#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.232.08:04:10.70#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.232.08:04:10.70#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.232.08:04:10.70#ibcon#ireg 7 cls_cnt 0 2006.232.08:04:10.70#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.232.08:04:10.82#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.232.08:04:10.82#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.232.08:04:10.82#ibcon#enter wrdev, iclass 17, count 0 2006.232.08:04:10.82#ibcon#first serial, iclass 17, count 0 2006.232.08:04:10.82#ibcon#enter sib2, iclass 17, count 0 2006.232.08:04:10.82#ibcon#flushed, iclass 17, count 0 2006.232.08:04:10.82#ibcon#about to write, iclass 17, count 0 2006.232.08:04:10.82#ibcon#wrote, iclass 17, count 0 2006.232.08:04:10.82#ibcon#about to read 3, iclass 17, count 0 2006.232.08:04:10.84#ibcon#read 3, iclass 17, count 0 2006.232.08:04:10.84#ibcon#about to read 4, iclass 17, count 0 2006.232.08:04:10.84#ibcon#read 4, iclass 17, count 0 2006.232.08:04:10.84#ibcon#about to read 5, iclass 17, count 0 2006.232.08:04:10.84#ibcon#read 5, iclass 17, count 0 2006.232.08:04:10.84#ibcon#about to read 6, iclass 17, count 0 2006.232.08:04:10.84#ibcon#read 6, iclass 17, count 0 2006.232.08:04:10.84#ibcon#end of sib2, iclass 17, count 0 2006.232.08:04:10.84#ibcon#*mode == 0, iclass 17, count 0 2006.232.08:04:10.84#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.232.08:04:10.84#ibcon#[27=USB\r\n] 2006.232.08:04:10.84#ibcon#*before write, iclass 17, count 0 2006.232.08:04:10.84#ibcon#enter sib2, iclass 17, count 0 2006.232.08:04:10.84#ibcon#flushed, iclass 17, count 0 2006.232.08:04:10.84#ibcon#about to write, iclass 17, count 0 2006.232.08:04:10.84#ibcon#wrote, iclass 17, count 0 2006.232.08:04:10.84#ibcon#about to read 3, iclass 17, count 0 2006.232.08:04:10.87#ibcon#read 3, iclass 17, count 0 2006.232.08:04:10.87#ibcon#about to read 4, iclass 17, count 0 2006.232.08:04:10.87#ibcon#read 4, iclass 17, count 0 2006.232.08:04:10.87#ibcon#about to read 5, iclass 17, count 0 2006.232.08:04:10.87#ibcon#read 5, iclass 17, count 0 2006.232.08:04:10.87#ibcon#about to read 6, iclass 17, count 0 2006.232.08:04:10.87#ibcon#read 6, iclass 17, count 0 2006.232.08:04:10.87#ibcon#end of sib2, iclass 17, count 0 2006.232.08:04:10.87#ibcon#*after write, iclass 17, count 0 2006.232.08:04:10.87#ibcon#*before return 0, iclass 17, count 0 2006.232.08:04:10.87#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.232.08:04:10.87#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.232.08:04:10.87#ibcon#about to clear, iclass 17 cls_cnt 0 2006.232.08:04:10.87#ibcon#cleared, iclass 17 cls_cnt 0 2006.232.08:04:10.87$vc4f8/vblo=2,640.99 2006.232.08:04:10.87#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.232.08:04:10.87#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.232.08:04:10.87#ibcon#ireg 17 cls_cnt 0 2006.232.08:04:10.87#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.232.08:04:10.87#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.232.08:04:10.87#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.232.08:04:10.87#ibcon#enter wrdev, iclass 19, count 0 2006.232.08:04:10.87#ibcon#first serial, iclass 19, count 0 2006.232.08:04:10.87#ibcon#enter sib2, iclass 19, count 0 2006.232.08:04:10.87#ibcon#flushed, iclass 19, count 0 2006.232.08:04:10.87#ibcon#about to write, iclass 19, count 0 2006.232.08:04:10.87#ibcon#wrote, iclass 19, count 0 2006.232.08:04:10.87#ibcon#about to read 3, iclass 19, count 0 2006.232.08:04:10.89#ibcon#read 3, iclass 19, count 0 2006.232.08:04:10.89#ibcon#about to read 4, iclass 19, count 0 2006.232.08:04:10.89#ibcon#read 4, iclass 19, count 0 2006.232.08:04:10.89#ibcon#about to read 5, iclass 19, count 0 2006.232.08:04:10.89#ibcon#read 5, iclass 19, count 0 2006.232.08:04:10.89#ibcon#about to read 6, iclass 19, count 0 2006.232.08:04:10.89#ibcon#read 6, iclass 19, count 0 2006.232.08:04:10.89#ibcon#end of sib2, iclass 19, count 0 2006.232.08:04:10.89#ibcon#*mode == 0, iclass 19, count 0 2006.232.08:04:10.89#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.232.08:04:10.89#ibcon#[28=FRQ=02,640.99\r\n] 2006.232.08:04:10.89#ibcon#*before write, iclass 19, count 0 2006.232.08:04:10.89#ibcon#enter sib2, iclass 19, count 0 2006.232.08:04:10.89#ibcon#flushed, iclass 19, count 0 2006.232.08:04:10.89#ibcon#about to write, iclass 19, count 0 2006.232.08:04:10.89#ibcon#wrote, iclass 19, count 0 2006.232.08:04:10.89#ibcon#about to read 3, iclass 19, count 0 2006.232.08:04:10.93#ibcon#read 3, iclass 19, count 0 2006.232.08:04:10.93#ibcon#about to read 4, iclass 19, count 0 2006.232.08:04:10.93#ibcon#read 4, iclass 19, count 0 2006.232.08:04:10.93#ibcon#about to read 5, iclass 19, count 0 2006.232.08:04:10.93#ibcon#read 5, iclass 19, count 0 2006.232.08:04:10.93#ibcon#about to read 6, iclass 19, count 0 2006.232.08:04:10.93#ibcon#read 6, iclass 19, count 0 2006.232.08:04:10.93#ibcon#end of sib2, iclass 19, count 0 2006.232.08:04:10.93#ibcon#*after write, iclass 19, count 0 2006.232.08:04:10.93#ibcon#*before return 0, iclass 19, count 0 2006.232.08:04:10.93#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.232.08:04:10.93#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.232.08:04:10.93#ibcon#about to clear, iclass 19 cls_cnt 0 2006.232.08:04:10.93#ibcon#cleared, iclass 19 cls_cnt 0 2006.232.08:04:10.93$vc4f8/vb=2,4 2006.232.08:04:10.93#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.232.08:04:10.93#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.232.08:04:10.93#ibcon#ireg 11 cls_cnt 2 2006.232.08:04:10.93#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.232.08:04:10.99#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.232.08:04:10.99#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.232.08:04:10.99#ibcon#enter wrdev, iclass 21, count 2 2006.232.08:04:10.99#ibcon#first serial, iclass 21, count 2 2006.232.08:04:10.99#ibcon#enter sib2, iclass 21, count 2 2006.232.08:04:10.99#ibcon#flushed, iclass 21, count 2 2006.232.08:04:10.99#ibcon#about to write, iclass 21, count 2 2006.232.08:04:10.99#ibcon#wrote, iclass 21, count 2 2006.232.08:04:10.99#ibcon#about to read 3, iclass 21, count 2 2006.232.08:04:11.01#ibcon#read 3, iclass 21, count 2 2006.232.08:04:11.01#ibcon#about to read 4, iclass 21, count 2 2006.232.08:04:11.01#ibcon#read 4, iclass 21, count 2 2006.232.08:04:11.01#ibcon#about to read 5, iclass 21, count 2 2006.232.08:04:11.01#ibcon#read 5, iclass 21, count 2 2006.232.08:04:11.01#ibcon#about to read 6, iclass 21, count 2 2006.232.08:04:11.01#ibcon#read 6, iclass 21, count 2 2006.232.08:04:11.01#ibcon#end of sib2, iclass 21, count 2 2006.232.08:04:11.01#ibcon#*mode == 0, iclass 21, count 2 2006.232.08:04:11.01#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.232.08:04:11.01#ibcon#[27=AT02-04\r\n] 2006.232.08:04:11.01#ibcon#*before write, iclass 21, count 2 2006.232.08:04:11.01#ibcon#enter sib2, iclass 21, count 2 2006.232.08:04:11.01#ibcon#flushed, iclass 21, count 2 2006.232.08:04:11.01#ibcon#about to write, iclass 21, count 2 2006.232.08:04:11.01#ibcon#wrote, iclass 21, count 2 2006.232.08:04:11.01#ibcon#about to read 3, iclass 21, count 2 2006.232.08:04:11.04#ibcon#read 3, iclass 21, count 2 2006.232.08:04:11.04#ibcon#about to read 4, iclass 21, count 2 2006.232.08:04:11.04#ibcon#read 4, iclass 21, count 2 2006.232.08:04:11.04#ibcon#about to read 5, iclass 21, count 2 2006.232.08:04:11.04#ibcon#read 5, iclass 21, count 2 2006.232.08:04:11.04#ibcon#about to read 6, iclass 21, count 2 2006.232.08:04:11.04#ibcon#read 6, iclass 21, count 2 2006.232.08:04:11.04#ibcon#end of sib2, iclass 21, count 2 2006.232.08:04:11.04#ibcon#*after write, iclass 21, count 2 2006.232.08:04:11.04#ibcon#*before return 0, iclass 21, count 2 2006.232.08:04:11.04#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.232.08:04:11.04#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.232.08:04:11.04#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.232.08:04:11.04#ibcon#ireg 7 cls_cnt 0 2006.232.08:04:11.04#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.232.08:04:11.16#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.232.08:04:11.16#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.232.08:04:11.16#ibcon#enter wrdev, iclass 21, count 0 2006.232.08:04:11.16#ibcon#first serial, iclass 21, count 0 2006.232.08:04:11.16#ibcon#enter sib2, iclass 21, count 0 2006.232.08:04:11.16#ibcon#flushed, iclass 21, count 0 2006.232.08:04:11.16#ibcon#about to write, iclass 21, count 0 2006.232.08:04:11.16#ibcon#wrote, iclass 21, count 0 2006.232.08:04:11.16#ibcon#about to read 3, iclass 21, count 0 2006.232.08:04:11.18#ibcon#read 3, iclass 21, count 0 2006.232.08:04:11.18#ibcon#about to read 4, iclass 21, count 0 2006.232.08:04:11.18#ibcon#read 4, iclass 21, count 0 2006.232.08:04:11.18#ibcon#about to read 5, iclass 21, count 0 2006.232.08:04:11.18#ibcon#read 5, iclass 21, count 0 2006.232.08:04:11.18#ibcon#about to read 6, iclass 21, count 0 2006.232.08:04:11.18#ibcon#read 6, iclass 21, count 0 2006.232.08:04:11.18#ibcon#end of sib2, iclass 21, count 0 2006.232.08:04:11.18#ibcon#*mode == 0, iclass 21, count 0 2006.232.08:04:11.18#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.232.08:04:11.18#ibcon#[27=USB\r\n] 2006.232.08:04:11.18#ibcon#*before write, iclass 21, count 0 2006.232.08:04:11.18#ibcon#enter sib2, iclass 21, count 0 2006.232.08:04:11.18#ibcon#flushed, iclass 21, count 0 2006.232.08:04:11.18#ibcon#about to write, iclass 21, count 0 2006.232.08:04:11.18#ibcon#wrote, iclass 21, count 0 2006.232.08:04:11.18#ibcon#about to read 3, iclass 21, count 0 2006.232.08:04:11.21#ibcon#read 3, iclass 21, count 0 2006.232.08:04:11.21#ibcon#about to read 4, iclass 21, count 0 2006.232.08:04:11.21#ibcon#read 4, iclass 21, count 0 2006.232.08:04:11.21#ibcon#about to read 5, iclass 21, count 0 2006.232.08:04:11.21#ibcon#read 5, iclass 21, count 0 2006.232.08:04:11.21#ibcon#about to read 6, iclass 21, count 0 2006.232.08:04:11.21#ibcon#read 6, iclass 21, count 0 2006.232.08:04:11.21#ibcon#end of sib2, iclass 21, count 0 2006.232.08:04:11.21#ibcon#*after write, iclass 21, count 0 2006.232.08:04:11.21#ibcon#*before return 0, iclass 21, count 0 2006.232.08:04:11.21#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.232.08:04:11.21#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.232.08:04:11.21#ibcon#about to clear, iclass 21 cls_cnt 0 2006.232.08:04:11.21#ibcon#cleared, iclass 21 cls_cnt 0 2006.232.08:04:11.21$vc4f8/vblo=3,656.99 2006.232.08:04:11.21#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.232.08:04:11.21#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.232.08:04:11.21#ibcon#ireg 17 cls_cnt 0 2006.232.08:04:11.21#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.232.08:04:11.21#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.232.08:04:11.21#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.232.08:04:11.21#ibcon#enter wrdev, iclass 23, count 0 2006.232.08:04:11.21#ibcon#first serial, iclass 23, count 0 2006.232.08:04:11.21#ibcon#enter sib2, iclass 23, count 0 2006.232.08:04:11.21#ibcon#flushed, iclass 23, count 0 2006.232.08:04:11.21#ibcon#about to write, iclass 23, count 0 2006.232.08:04:11.21#ibcon#wrote, iclass 23, count 0 2006.232.08:04:11.21#ibcon#about to read 3, iclass 23, count 0 2006.232.08:04:11.23#ibcon#read 3, iclass 23, count 0 2006.232.08:04:11.23#ibcon#about to read 4, iclass 23, count 0 2006.232.08:04:11.23#ibcon#read 4, iclass 23, count 0 2006.232.08:04:11.23#ibcon#about to read 5, iclass 23, count 0 2006.232.08:04:11.23#ibcon#read 5, iclass 23, count 0 2006.232.08:04:11.23#ibcon#about to read 6, iclass 23, count 0 2006.232.08:04:11.23#ibcon#read 6, iclass 23, count 0 2006.232.08:04:11.23#ibcon#end of sib2, iclass 23, count 0 2006.232.08:04:11.23#ibcon#*mode == 0, iclass 23, count 0 2006.232.08:04:11.23#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.232.08:04:11.23#ibcon#[28=FRQ=03,656.99\r\n] 2006.232.08:04:11.23#ibcon#*before write, iclass 23, count 0 2006.232.08:04:11.23#ibcon#enter sib2, iclass 23, count 0 2006.232.08:04:11.23#ibcon#flushed, iclass 23, count 0 2006.232.08:04:11.23#ibcon#about to write, iclass 23, count 0 2006.232.08:04:11.23#ibcon#wrote, iclass 23, count 0 2006.232.08:04:11.23#ibcon#about to read 3, iclass 23, count 0 2006.232.08:04:11.27#ibcon#read 3, iclass 23, count 0 2006.232.08:04:11.27#ibcon#about to read 4, iclass 23, count 0 2006.232.08:04:11.27#ibcon#read 4, iclass 23, count 0 2006.232.08:04:11.27#ibcon#about to read 5, iclass 23, count 0 2006.232.08:04:11.27#ibcon#read 5, iclass 23, count 0 2006.232.08:04:11.27#ibcon#about to read 6, iclass 23, count 0 2006.232.08:04:11.27#ibcon#read 6, iclass 23, count 0 2006.232.08:04:11.27#ibcon#end of sib2, iclass 23, count 0 2006.232.08:04:11.27#ibcon#*after write, iclass 23, count 0 2006.232.08:04:11.27#ibcon#*before return 0, iclass 23, count 0 2006.232.08:04:11.27#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.232.08:04:11.27#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.232.08:04:11.27#ibcon#about to clear, iclass 23 cls_cnt 0 2006.232.08:04:11.27#ibcon#cleared, iclass 23 cls_cnt 0 2006.232.08:04:11.27$vc4f8/vb=3,4 2006.232.08:04:11.27#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.232.08:04:11.27#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.232.08:04:11.27#ibcon#ireg 11 cls_cnt 2 2006.232.08:04:11.27#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.232.08:04:11.33#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.232.08:04:11.33#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.232.08:04:11.33#ibcon#enter wrdev, iclass 25, count 2 2006.232.08:04:11.33#ibcon#first serial, iclass 25, count 2 2006.232.08:04:11.33#ibcon#enter sib2, iclass 25, count 2 2006.232.08:04:11.33#ibcon#flushed, iclass 25, count 2 2006.232.08:04:11.33#ibcon#about to write, iclass 25, count 2 2006.232.08:04:11.33#ibcon#wrote, iclass 25, count 2 2006.232.08:04:11.33#ibcon#about to read 3, iclass 25, count 2 2006.232.08:04:11.35#ibcon#read 3, iclass 25, count 2 2006.232.08:04:11.35#ibcon#about to read 4, iclass 25, count 2 2006.232.08:04:11.35#ibcon#read 4, iclass 25, count 2 2006.232.08:04:11.35#ibcon#about to read 5, iclass 25, count 2 2006.232.08:04:11.35#ibcon#read 5, iclass 25, count 2 2006.232.08:04:11.35#ibcon#about to read 6, iclass 25, count 2 2006.232.08:04:11.35#ibcon#read 6, iclass 25, count 2 2006.232.08:04:11.35#ibcon#end of sib2, iclass 25, count 2 2006.232.08:04:11.35#ibcon#*mode == 0, iclass 25, count 2 2006.232.08:04:11.35#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.232.08:04:11.35#ibcon#[27=AT03-04\r\n] 2006.232.08:04:11.35#ibcon#*before write, iclass 25, count 2 2006.232.08:04:11.35#ibcon#enter sib2, iclass 25, count 2 2006.232.08:04:11.35#ibcon#flushed, iclass 25, count 2 2006.232.08:04:11.35#ibcon#about to write, iclass 25, count 2 2006.232.08:04:11.35#ibcon#wrote, iclass 25, count 2 2006.232.08:04:11.35#ibcon#about to read 3, iclass 25, count 2 2006.232.08:04:11.38#ibcon#read 3, iclass 25, count 2 2006.232.08:04:11.38#ibcon#about to read 4, iclass 25, count 2 2006.232.08:04:11.38#ibcon#read 4, iclass 25, count 2 2006.232.08:04:11.38#ibcon#about to read 5, iclass 25, count 2 2006.232.08:04:11.38#ibcon#read 5, iclass 25, count 2 2006.232.08:04:11.38#ibcon#about to read 6, iclass 25, count 2 2006.232.08:04:11.38#ibcon#read 6, iclass 25, count 2 2006.232.08:04:11.38#ibcon#end of sib2, iclass 25, count 2 2006.232.08:04:11.38#ibcon#*after write, iclass 25, count 2 2006.232.08:04:11.38#ibcon#*before return 0, iclass 25, count 2 2006.232.08:04:11.38#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.232.08:04:11.38#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.232.08:04:11.38#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.232.08:04:11.38#ibcon#ireg 7 cls_cnt 0 2006.232.08:04:11.38#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.232.08:04:11.50#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.232.08:04:11.50#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.232.08:04:11.50#ibcon#enter wrdev, iclass 25, count 0 2006.232.08:04:11.50#ibcon#first serial, iclass 25, count 0 2006.232.08:04:11.50#ibcon#enter sib2, iclass 25, count 0 2006.232.08:04:11.50#ibcon#flushed, iclass 25, count 0 2006.232.08:04:11.50#ibcon#about to write, iclass 25, count 0 2006.232.08:04:11.50#ibcon#wrote, iclass 25, count 0 2006.232.08:04:11.50#ibcon#about to read 3, iclass 25, count 0 2006.232.08:04:11.52#ibcon#read 3, iclass 25, count 0 2006.232.08:04:11.52#ibcon#about to read 4, iclass 25, count 0 2006.232.08:04:11.52#ibcon#read 4, iclass 25, count 0 2006.232.08:04:11.52#ibcon#about to read 5, iclass 25, count 0 2006.232.08:04:11.52#ibcon#read 5, iclass 25, count 0 2006.232.08:04:11.52#ibcon#about to read 6, iclass 25, count 0 2006.232.08:04:11.52#ibcon#read 6, iclass 25, count 0 2006.232.08:04:11.52#ibcon#end of sib2, iclass 25, count 0 2006.232.08:04:11.52#ibcon#*mode == 0, iclass 25, count 0 2006.232.08:04:11.52#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.232.08:04:11.52#ibcon#[27=USB\r\n] 2006.232.08:04:11.52#ibcon#*before write, iclass 25, count 0 2006.232.08:04:11.52#ibcon#enter sib2, iclass 25, count 0 2006.232.08:04:11.52#ibcon#flushed, iclass 25, count 0 2006.232.08:04:11.52#ibcon#about to write, iclass 25, count 0 2006.232.08:04:11.52#ibcon#wrote, iclass 25, count 0 2006.232.08:04:11.52#ibcon#about to read 3, iclass 25, count 0 2006.232.08:04:11.55#ibcon#read 3, iclass 25, count 0 2006.232.08:04:11.55#ibcon#about to read 4, iclass 25, count 0 2006.232.08:04:11.55#ibcon#read 4, iclass 25, count 0 2006.232.08:04:11.55#ibcon#about to read 5, iclass 25, count 0 2006.232.08:04:11.55#ibcon#read 5, iclass 25, count 0 2006.232.08:04:11.55#ibcon#about to read 6, iclass 25, count 0 2006.232.08:04:11.55#ibcon#read 6, iclass 25, count 0 2006.232.08:04:11.55#ibcon#end of sib2, iclass 25, count 0 2006.232.08:04:11.55#ibcon#*after write, iclass 25, count 0 2006.232.08:04:11.55#ibcon#*before return 0, iclass 25, count 0 2006.232.08:04:11.55#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.232.08:04:11.55#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.232.08:04:11.55#ibcon#about to clear, iclass 25 cls_cnt 0 2006.232.08:04:11.55#ibcon#cleared, iclass 25 cls_cnt 0 2006.232.08:04:11.55$vc4f8/vblo=4,712.99 2006.232.08:04:11.55#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.232.08:04:11.55#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.232.08:04:11.55#ibcon#ireg 17 cls_cnt 0 2006.232.08:04:11.55#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.232.08:04:11.55#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.232.08:04:11.55#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.232.08:04:11.55#ibcon#enter wrdev, iclass 27, count 0 2006.232.08:04:11.55#ibcon#first serial, iclass 27, count 0 2006.232.08:04:11.55#ibcon#enter sib2, iclass 27, count 0 2006.232.08:04:11.55#ibcon#flushed, iclass 27, count 0 2006.232.08:04:11.55#ibcon#about to write, iclass 27, count 0 2006.232.08:04:11.55#ibcon#wrote, iclass 27, count 0 2006.232.08:04:11.55#ibcon#about to read 3, iclass 27, count 0 2006.232.08:04:11.57#ibcon#read 3, iclass 27, count 0 2006.232.08:04:11.57#ibcon#about to read 4, iclass 27, count 0 2006.232.08:04:11.57#ibcon#read 4, iclass 27, count 0 2006.232.08:04:11.57#ibcon#about to read 5, iclass 27, count 0 2006.232.08:04:11.57#ibcon#read 5, iclass 27, count 0 2006.232.08:04:11.57#ibcon#about to read 6, iclass 27, count 0 2006.232.08:04:11.57#ibcon#read 6, iclass 27, count 0 2006.232.08:04:11.57#ibcon#end of sib2, iclass 27, count 0 2006.232.08:04:11.57#ibcon#*mode == 0, iclass 27, count 0 2006.232.08:04:11.57#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.232.08:04:11.57#ibcon#[28=FRQ=04,712.99\r\n] 2006.232.08:04:11.57#ibcon#*before write, iclass 27, count 0 2006.232.08:04:11.57#ibcon#enter sib2, iclass 27, count 0 2006.232.08:04:11.57#ibcon#flushed, iclass 27, count 0 2006.232.08:04:11.57#ibcon#about to write, iclass 27, count 0 2006.232.08:04:11.57#ibcon#wrote, iclass 27, count 0 2006.232.08:04:11.57#ibcon#about to read 3, iclass 27, count 0 2006.232.08:04:11.61#ibcon#read 3, iclass 27, count 0 2006.232.08:04:11.61#ibcon#about to read 4, iclass 27, count 0 2006.232.08:04:11.61#ibcon#read 4, iclass 27, count 0 2006.232.08:04:11.61#ibcon#about to read 5, iclass 27, count 0 2006.232.08:04:11.61#ibcon#read 5, iclass 27, count 0 2006.232.08:04:11.61#ibcon#about to read 6, iclass 27, count 0 2006.232.08:04:11.61#ibcon#read 6, iclass 27, count 0 2006.232.08:04:11.61#ibcon#end of sib2, iclass 27, count 0 2006.232.08:04:11.61#ibcon#*after write, iclass 27, count 0 2006.232.08:04:11.61#ibcon#*before return 0, iclass 27, count 0 2006.232.08:04:11.61#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.232.08:04:11.61#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.232.08:04:11.61#ibcon#about to clear, iclass 27 cls_cnt 0 2006.232.08:04:11.61#ibcon#cleared, iclass 27 cls_cnt 0 2006.232.08:04:11.61$vc4f8/vb=4,4 2006.232.08:04:11.61#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.232.08:04:11.61#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.232.08:04:11.61#ibcon#ireg 11 cls_cnt 2 2006.232.08:04:11.61#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.232.08:04:11.67#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.232.08:04:11.67#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.232.08:04:11.67#ibcon#enter wrdev, iclass 29, count 2 2006.232.08:04:11.67#ibcon#first serial, iclass 29, count 2 2006.232.08:04:11.67#ibcon#enter sib2, iclass 29, count 2 2006.232.08:04:11.67#ibcon#flushed, iclass 29, count 2 2006.232.08:04:11.67#ibcon#about to write, iclass 29, count 2 2006.232.08:04:11.67#ibcon#wrote, iclass 29, count 2 2006.232.08:04:11.67#ibcon#about to read 3, iclass 29, count 2 2006.232.08:04:11.69#ibcon#read 3, iclass 29, count 2 2006.232.08:04:11.69#ibcon#about to read 4, iclass 29, count 2 2006.232.08:04:11.69#ibcon#read 4, iclass 29, count 2 2006.232.08:04:11.69#ibcon#about to read 5, iclass 29, count 2 2006.232.08:04:11.69#ibcon#read 5, iclass 29, count 2 2006.232.08:04:11.69#ibcon#about to read 6, iclass 29, count 2 2006.232.08:04:11.69#ibcon#read 6, iclass 29, count 2 2006.232.08:04:11.69#ibcon#end of sib2, iclass 29, count 2 2006.232.08:04:11.69#ibcon#*mode == 0, iclass 29, count 2 2006.232.08:04:11.69#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.232.08:04:11.69#ibcon#[27=AT04-04\r\n] 2006.232.08:04:11.69#ibcon#*before write, iclass 29, count 2 2006.232.08:04:11.69#ibcon#enter sib2, iclass 29, count 2 2006.232.08:04:11.69#ibcon#flushed, iclass 29, count 2 2006.232.08:04:11.69#ibcon#about to write, iclass 29, count 2 2006.232.08:04:11.69#ibcon#wrote, iclass 29, count 2 2006.232.08:04:11.69#ibcon#about to read 3, iclass 29, count 2 2006.232.08:04:11.72#ibcon#read 3, iclass 29, count 2 2006.232.08:04:11.72#ibcon#about to read 4, iclass 29, count 2 2006.232.08:04:11.72#ibcon#read 4, iclass 29, count 2 2006.232.08:04:11.72#ibcon#about to read 5, iclass 29, count 2 2006.232.08:04:11.72#ibcon#read 5, iclass 29, count 2 2006.232.08:04:11.72#ibcon#about to read 6, iclass 29, count 2 2006.232.08:04:11.72#ibcon#read 6, iclass 29, count 2 2006.232.08:04:11.72#ibcon#end of sib2, iclass 29, count 2 2006.232.08:04:11.72#ibcon#*after write, iclass 29, count 2 2006.232.08:04:11.72#ibcon#*before return 0, iclass 29, count 2 2006.232.08:04:11.72#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.232.08:04:11.72#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.232.08:04:11.72#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.232.08:04:11.72#ibcon#ireg 7 cls_cnt 0 2006.232.08:04:11.72#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.232.08:04:11.84#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.232.08:04:11.84#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.232.08:04:11.84#ibcon#enter wrdev, iclass 29, count 0 2006.232.08:04:11.84#ibcon#first serial, iclass 29, count 0 2006.232.08:04:11.84#ibcon#enter sib2, iclass 29, count 0 2006.232.08:04:11.84#ibcon#flushed, iclass 29, count 0 2006.232.08:04:11.84#ibcon#about to write, iclass 29, count 0 2006.232.08:04:11.84#ibcon#wrote, iclass 29, count 0 2006.232.08:04:11.84#ibcon#about to read 3, iclass 29, count 0 2006.232.08:04:11.86#ibcon#read 3, iclass 29, count 0 2006.232.08:04:11.86#ibcon#about to read 4, iclass 29, count 0 2006.232.08:04:11.86#ibcon#read 4, iclass 29, count 0 2006.232.08:04:11.86#ibcon#about to read 5, iclass 29, count 0 2006.232.08:04:11.86#ibcon#read 5, iclass 29, count 0 2006.232.08:04:11.86#ibcon#about to read 6, iclass 29, count 0 2006.232.08:04:11.86#ibcon#read 6, iclass 29, count 0 2006.232.08:04:11.86#ibcon#end of sib2, iclass 29, count 0 2006.232.08:04:11.86#ibcon#*mode == 0, iclass 29, count 0 2006.232.08:04:11.86#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.232.08:04:11.86#ibcon#[27=USB\r\n] 2006.232.08:04:11.86#ibcon#*before write, iclass 29, count 0 2006.232.08:04:11.86#ibcon#enter sib2, iclass 29, count 0 2006.232.08:04:11.86#ibcon#flushed, iclass 29, count 0 2006.232.08:04:11.86#ibcon#about to write, iclass 29, count 0 2006.232.08:04:11.86#ibcon#wrote, iclass 29, count 0 2006.232.08:04:11.86#ibcon#about to read 3, iclass 29, count 0 2006.232.08:04:11.89#ibcon#read 3, iclass 29, count 0 2006.232.08:04:11.89#ibcon#about to read 4, iclass 29, count 0 2006.232.08:04:11.89#ibcon#read 4, iclass 29, count 0 2006.232.08:04:11.89#ibcon#about to read 5, iclass 29, count 0 2006.232.08:04:11.89#ibcon#read 5, iclass 29, count 0 2006.232.08:04:11.89#ibcon#about to read 6, iclass 29, count 0 2006.232.08:04:11.89#ibcon#read 6, iclass 29, count 0 2006.232.08:04:11.89#ibcon#end of sib2, iclass 29, count 0 2006.232.08:04:11.89#ibcon#*after write, iclass 29, count 0 2006.232.08:04:11.89#ibcon#*before return 0, iclass 29, count 0 2006.232.08:04:11.89#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.232.08:04:11.89#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.232.08:04:11.89#ibcon#about to clear, iclass 29 cls_cnt 0 2006.232.08:04:11.89#ibcon#cleared, iclass 29 cls_cnt 0 2006.232.08:04:11.89$vc4f8/vblo=5,744.99 2006.232.08:04:11.89#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.232.08:04:11.89#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.232.08:04:11.89#ibcon#ireg 17 cls_cnt 0 2006.232.08:04:11.89#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.232.08:04:11.89#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.232.08:04:11.89#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.232.08:04:11.89#ibcon#enter wrdev, iclass 31, count 0 2006.232.08:04:11.89#ibcon#first serial, iclass 31, count 0 2006.232.08:04:11.89#ibcon#enter sib2, iclass 31, count 0 2006.232.08:04:11.89#ibcon#flushed, iclass 31, count 0 2006.232.08:04:11.89#ibcon#about to write, iclass 31, count 0 2006.232.08:04:11.89#ibcon#wrote, iclass 31, count 0 2006.232.08:04:11.89#ibcon#about to read 3, iclass 31, count 0 2006.232.08:04:11.91#ibcon#read 3, iclass 31, count 0 2006.232.08:04:11.91#ibcon#about to read 4, iclass 31, count 0 2006.232.08:04:11.91#ibcon#read 4, iclass 31, count 0 2006.232.08:04:11.91#ibcon#about to read 5, iclass 31, count 0 2006.232.08:04:11.91#ibcon#read 5, iclass 31, count 0 2006.232.08:04:11.91#ibcon#about to read 6, iclass 31, count 0 2006.232.08:04:11.91#ibcon#read 6, iclass 31, count 0 2006.232.08:04:11.91#ibcon#end of sib2, iclass 31, count 0 2006.232.08:04:11.91#ibcon#*mode == 0, iclass 31, count 0 2006.232.08:04:11.91#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.232.08:04:11.91#ibcon#[28=FRQ=05,744.99\r\n] 2006.232.08:04:11.91#ibcon#*before write, iclass 31, count 0 2006.232.08:04:11.91#ibcon#enter sib2, iclass 31, count 0 2006.232.08:04:11.91#ibcon#flushed, iclass 31, count 0 2006.232.08:04:11.91#ibcon#about to write, iclass 31, count 0 2006.232.08:04:11.91#ibcon#wrote, iclass 31, count 0 2006.232.08:04:11.91#ibcon#about to read 3, iclass 31, count 0 2006.232.08:04:11.95#ibcon#read 3, iclass 31, count 0 2006.232.08:04:11.95#ibcon#about to read 4, iclass 31, count 0 2006.232.08:04:11.95#ibcon#read 4, iclass 31, count 0 2006.232.08:04:11.95#ibcon#about to read 5, iclass 31, count 0 2006.232.08:04:11.95#ibcon#read 5, iclass 31, count 0 2006.232.08:04:11.95#ibcon#about to read 6, iclass 31, count 0 2006.232.08:04:11.95#ibcon#read 6, iclass 31, count 0 2006.232.08:04:11.95#ibcon#end of sib2, iclass 31, count 0 2006.232.08:04:11.95#ibcon#*after write, iclass 31, count 0 2006.232.08:04:11.95#ibcon#*before return 0, iclass 31, count 0 2006.232.08:04:11.95#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.232.08:04:11.95#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.232.08:04:11.95#ibcon#about to clear, iclass 31 cls_cnt 0 2006.232.08:04:11.95#ibcon#cleared, iclass 31 cls_cnt 0 2006.232.08:04:11.95$vc4f8/vb=5,3 2006.232.08:04:11.95#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.232.08:04:11.95#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.232.08:04:11.95#ibcon#ireg 11 cls_cnt 2 2006.232.08:04:11.95#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.232.08:04:12.01#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.232.08:04:12.01#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.232.08:04:12.01#ibcon#enter wrdev, iclass 33, count 2 2006.232.08:04:12.01#ibcon#first serial, iclass 33, count 2 2006.232.08:04:12.01#ibcon#enter sib2, iclass 33, count 2 2006.232.08:04:12.01#ibcon#flushed, iclass 33, count 2 2006.232.08:04:12.01#ibcon#about to write, iclass 33, count 2 2006.232.08:04:12.01#ibcon#wrote, iclass 33, count 2 2006.232.08:04:12.01#ibcon#about to read 3, iclass 33, count 2 2006.232.08:04:12.03#ibcon#read 3, iclass 33, count 2 2006.232.08:04:12.03#ibcon#about to read 4, iclass 33, count 2 2006.232.08:04:12.03#ibcon#read 4, iclass 33, count 2 2006.232.08:04:12.03#ibcon#about to read 5, iclass 33, count 2 2006.232.08:04:12.03#ibcon#read 5, iclass 33, count 2 2006.232.08:04:12.03#ibcon#about to read 6, iclass 33, count 2 2006.232.08:04:12.03#ibcon#read 6, iclass 33, count 2 2006.232.08:04:12.03#ibcon#end of sib2, iclass 33, count 2 2006.232.08:04:12.03#ibcon#*mode == 0, iclass 33, count 2 2006.232.08:04:12.03#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.232.08:04:12.03#ibcon#[27=AT05-03\r\n] 2006.232.08:04:12.03#ibcon#*before write, iclass 33, count 2 2006.232.08:04:12.03#ibcon#enter sib2, iclass 33, count 2 2006.232.08:04:12.03#ibcon#flushed, iclass 33, count 2 2006.232.08:04:12.03#ibcon#about to write, iclass 33, count 2 2006.232.08:04:12.03#ibcon#wrote, iclass 33, count 2 2006.232.08:04:12.03#ibcon#about to read 3, iclass 33, count 2 2006.232.08:04:12.06#ibcon#read 3, iclass 33, count 2 2006.232.08:04:12.06#ibcon#about to read 4, iclass 33, count 2 2006.232.08:04:12.06#ibcon#read 4, iclass 33, count 2 2006.232.08:04:12.06#ibcon#about to read 5, iclass 33, count 2 2006.232.08:04:12.06#ibcon#read 5, iclass 33, count 2 2006.232.08:04:12.06#ibcon#about to read 6, iclass 33, count 2 2006.232.08:04:12.06#ibcon#read 6, iclass 33, count 2 2006.232.08:04:12.06#ibcon#end of sib2, iclass 33, count 2 2006.232.08:04:12.06#ibcon#*after write, iclass 33, count 2 2006.232.08:04:12.06#ibcon#*before return 0, iclass 33, count 2 2006.232.08:04:12.06#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.232.08:04:12.06#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.232.08:04:12.06#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.232.08:04:12.06#ibcon#ireg 7 cls_cnt 0 2006.232.08:04:12.06#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.232.08:04:12.18#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.232.08:04:12.18#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.232.08:04:12.18#ibcon#enter wrdev, iclass 33, count 0 2006.232.08:04:12.18#ibcon#first serial, iclass 33, count 0 2006.232.08:04:12.18#ibcon#enter sib2, iclass 33, count 0 2006.232.08:04:12.18#ibcon#flushed, iclass 33, count 0 2006.232.08:04:12.18#ibcon#about to write, iclass 33, count 0 2006.232.08:04:12.18#ibcon#wrote, iclass 33, count 0 2006.232.08:04:12.18#ibcon#about to read 3, iclass 33, count 0 2006.232.08:04:12.20#ibcon#read 3, iclass 33, count 0 2006.232.08:04:12.20#ibcon#about to read 4, iclass 33, count 0 2006.232.08:04:12.20#ibcon#read 4, iclass 33, count 0 2006.232.08:04:12.20#ibcon#about to read 5, iclass 33, count 0 2006.232.08:04:12.20#ibcon#read 5, iclass 33, count 0 2006.232.08:04:12.20#ibcon#about to read 6, iclass 33, count 0 2006.232.08:04:12.20#ibcon#read 6, iclass 33, count 0 2006.232.08:04:12.20#ibcon#end of sib2, iclass 33, count 0 2006.232.08:04:12.20#ibcon#*mode == 0, iclass 33, count 0 2006.232.08:04:12.20#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.232.08:04:12.20#ibcon#[27=USB\r\n] 2006.232.08:04:12.20#ibcon#*before write, iclass 33, count 0 2006.232.08:04:12.20#ibcon#enter sib2, iclass 33, count 0 2006.232.08:04:12.20#ibcon#flushed, iclass 33, count 0 2006.232.08:04:12.20#ibcon#about to write, iclass 33, count 0 2006.232.08:04:12.20#ibcon#wrote, iclass 33, count 0 2006.232.08:04:12.20#ibcon#about to read 3, iclass 33, count 0 2006.232.08:04:12.23#ibcon#read 3, iclass 33, count 0 2006.232.08:04:12.23#ibcon#about to read 4, iclass 33, count 0 2006.232.08:04:12.23#ibcon#read 4, iclass 33, count 0 2006.232.08:04:12.23#ibcon#about to read 5, iclass 33, count 0 2006.232.08:04:12.23#ibcon#read 5, iclass 33, count 0 2006.232.08:04:12.23#ibcon#about to read 6, iclass 33, count 0 2006.232.08:04:12.23#ibcon#read 6, iclass 33, count 0 2006.232.08:04:12.23#ibcon#end of sib2, iclass 33, count 0 2006.232.08:04:12.23#ibcon#*after write, iclass 33, count 0 2006.232.08:04:12.23#ibcon#*before return 0, iclass 33, count 0 2006.232.08:04:12.23#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.232.08:04:12.23#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.232.08:04:12.23#ibcon#about to clear, iclass 33 cls_cnt 0 2006.232.08:04:12.23#ibcon#cleared, iclass 33 cls_cnt 0 2006.232.08:04:12.23$vc4f8/vblo=6,752.99 2006.232.08:04:12.23#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.232.08:04:12.23#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.232.08:04:12.23#ibcon#ireg 17 cls_cnt 0 2006.232.08:04:12.23#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.232.08:04:12.23#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.232.08:04:12.23#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.232.08:04:12.23#ibcon#enter wrdev, iclass 35, count 0 2006.232.08:04:12.23#ibcon#first serial, iclass 35, count 0 2006.232.08:04:12.23#ibcon#enter sib2, iclass 35, count 0 2006.232.08:04:12.23#ibcon#flushed, iclass 35, count 0 2006.232.08:04:12.23#ibcon#about to write, iclass 35, count 0 2006.232.08:04:12.23#ibcon#wrote, iclass 35, count 0 2006.232.08:04:12.23#ibcon#about to read 3, iclass 35, count 0 2006.232.08:04:12.25#ibcon#read 3, iclass 35, count 0 2006.232.08:04:12.25#ibcon#about to read 4, iclass 35, count 0 2006.232.08:04:12.25#ibcon#read 4, iclass 35, count 0 2006.232.08:04:12.25#ibcon#about to read 5, iclass 35, count 0 2006.232.08:04:12.25#ibcon#read 5, iclass 35, count 0 2006.232.08:04:12.25#ibcon#about to read 6, iclass 35, count 0 2006.232.08:04:12.25#ibcon#read 6, iclass 35, count 0 2006.232.08:04:12.25#ibcon#end of sib2, iclass 35, count 0 2006.232.08:04:12.25#ibcon#*mode == 0, iclass 35, count 0 2006.232.08:04:12.25#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.232.08:04:12.25#ibcon#[28=FRQ=06,752.99\r\n] 2006.232.08:04:12.25#ibcon#*before write, iclass 35, count 0 2006.232.08:04:12.25#ibcon#enter sib2, iclass 35, count 0 2006.232.08:04:12.25#ibcon#flushed, iclass 35, count 0 2006.232.08:04:12.25#ibcon#about to write, iclass 35, count 0 2006.232.08:04:12.25#ibcon#wrote, iclass 35, count 0 2006.232.08:04:12.25#ibcon#about to read 3, iclass 35, count 0 2006.232.08:04:12.29#ibcon#read 3, iclass 35, count 0 2006.232.08:04:12.29#ibcon#about to read 4, iclass 35, count 0 2006.232.08:04:12.29#ibcon#read 4, iclass 35, count 0 2006.232.08:04:12.29#ibcon#about to read 5, iclass 35, count 0 2006.232.08:04:12.29#ibcon#read 5, iclass 35, count 0 2006.232.08:04:12.29#ibcon#about to read 6, iclass 35, count 0 2006.232.08:04:12.29#ibcon#read 6, iclass 35, count 0 2006.232.08:04:12.29#ibcon#end of sib2, iclass 35, count 0 2006.232.08:04:12.29#ibcon#*after write, iclass 35, count 0 2006.232.08:04:12.29#ibcon#*before return 0, iclass 35, count 0 2006.232.08:04:12.29#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.232.08:04:12.29#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.232.08:04:12.29#ibcon#about to clear, iclass 35 cls_cnt 0 2006.232.08:04:12.29#ibcon#cleared, iclass 35 cls_cnt 0 2006.232.08:04:12.29$vc4f8/vb=6,4 2006.232.08:04:12.29#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.232.08:04:12.29#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.232.08:04:12.29#ibcon#ireg 11 cls_cnt 2 2006.232.08:04:12.29#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.232.08:04:12.35#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.232.08:04:12.35#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.232.08:04:12.35#ibcon#enter wrdev, iclass 37, count 2 2006.232.08:04:12.35#ibcon#first serial, iclass 37, count 2 2006.232.08:04:12.35#ibcon#enter sib2, iclass 37, count 2 2006.232.08:04:12.35#ibcon#flushed, iclass 37, count 2 2006.232.08:04:12.35#ibcon#about to write, iclass 37, count 2 2006.232.08:04:12.35#ibcon#wrote, iclass 37, count 2 2006.232.08:04:12.35#ibcon#about to read 3, iclass 37, count 2 2006.232.08:04:12.37#ibcon#read 3, iclass 37, count 2 2006.232.08:04:12.37#ibcon#about to read 4, iclass 37, count 2 2006.232.08:04:12.37#ibcon#read 4, iclass 37, count 2 2006.232.08:04:12.37#ibcon#about to read 5, iclass 37, count 2 2006.232.08:04:12.37#ibcon#read 5, iclass 37, count 2 2006.232.08:04:12.37#ibcon#about to read 6, iclass 37, count 2 2006.232.08:04:12.37#ibcon#read 6, iclass 37, count 2 2006.232.08:04:12.37#ibcon#end of sib2, iclass 37, count 2 2006.232.08:04:12.37#ibcon#*mode == 0, iclass 37, count 2 2006.232.08:04:12.37#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.232.08:04:12.37#ibcon#[27=AT06-04\r\n] 2006.232.08:04:12.37#ibcon#*before write, iclass 37, count 2 2006.232.08:04:12.37#ibcon#enter sib2, iclass 37, count 2 2006.232.08:04:12.37#ibcon#flushed, iclass 37, count 2 2006.232.08:04:12.37#ibcon#about to write, iclass 37, count 2 2006.232.08:04:12.37#ibcon#wrote, iclass 37, count 2 2006.232.08:04:12.37#ibcon#about to read 3, iclass 37, count 2 2006.232.08:04:12.41#ibcon#read 3, iclass 37, count 2 2006.232.08:04:12.41#ibcon#about to read 4, iclass 37, count 2 2006.232.08:04:12.41#ibcon#read 4, iclass 37, count 2 2006.232.08:04:12.41#ibcon#about to read 5, iclass 37, count 2 2006.232.08:04:12.41#ibcon#read 5, iclass 37, count 2 2006.232.08:04:12.41#ibcon#about to read 6, iclass 37, count 2 2006.232.08:04:12.41#ibcon#read 6, iclass 37, count 2 2006.232.08:04:12.41#ibcon#end of sib2, iclass 37, count 2 2006.232.08:04:12.41#ibcon#*after write, iclass 37, count 2 2006.232.08:04:12.41#ibcon#*before return 0, iclass 37, count 2 2006.232.08:04:12.41#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.232.08:04:12.41#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.232.08:04:12.41#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.232.08:04:12.41#ibcon#ireg 7 cls_cnt 0 2006.232.08:04:12.41#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.232.08:04:12.53#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.232.08:04:12.53#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.232.08:04:12.53#ibcon#enter wrdev, iclass 37, count 0 2006.232.08:04:12.53#ibcon#first serial, iclass 37, count 0 2006.232.08:04:12.53#ibcon#enter sib2, iclass 37, count 0 2006.232.08:04:12.53#ibcon#flushed, iclass 37, count 0 2006.232.08:04:12.53#ibcon#about to write, iclass 37, count 0 2006.232.08:04:12.53#ibcon#wrote, iclass 37, count 0 2006.232.08:04:12.53#ibcon#about to read 3, iclass 37, count 0 2006.232.08:04:12.55#ibcon#read 3, iclass 37, count 0 2006.232.08:04:12.55#ibcon#about to read 4, iclass 37, count 0 2006.232.08:04:12.55#ibcon#read 4, iclass 37, count 0 2006.232.08:04:12.55#ibcon#about to read 5, iclass 37, count 0 2006.232.08:04:12.55#ibcon#read 5, iclass 37, count 0 2006.232.08:04:12.55#ibcon#about to read 6, iclass 37, count 0 2006.232.08:04:12.55#ibcon#read 6, iclass 37, count 0 2006.232.08:04:12.55#ibcon#end of sib2, iclass 37, count 0 2006.232.08:04:12.55#ibcon#*mode == 0, iclass 37, count 0 2006.232.08:04:12.55#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.232.08:04:12.55#ibcon#[27=USB\r\n] 2006.232.08:04:12.55#ibcon#*before write, iclass 37, count 0 2006.232.08:04:12.55#ibcon#enter sib2, iclass 37, count 0 2006.232.08:04:12.55#ibcon#flushed, iclass 37, count 0 2006.232.08:04:12.55#ibcon#about to write, iclass 37, count 0 2006.232.08:04:12.55#ibcon#wrote, iclass 37, count 0 2006.232.08:04:12.55#ibcon#about to read 3, iclass 37, count 0 2006.232.08:04:12.58#ibcon#read 3, iclass 37, count 0 2006.232.08:04:12.58#ibcon#about to read 4, iclass 37, count 0 2006.232.08:04:12.58#ibcon#read 4, iclass 37, count 0 2006.232.08:04:12.58#ibcon#about to read 5, iclass 37, count 0 2006.232.08:04:12.58#ibcon#read 5, iclass 37, count 0 2006.232.08:04:12.58#ibcon#about to read 6, iclass 37, count 0 2006.232.08:04:12.58#ibcon#read 6, iclass 37, count 0 2006.232.08:04:12.58#ibcon#end of sib2, iclass 37, count 0 2006.232.08:04:12.58#ibcon#*after write, iclass 37, count 0 2006.232.08:04:12.58#ibcon#*before return 0, iclass 37, count 0 2006.232.08:04:12.58#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.232.08:04:12.58#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.232.08:04:12.58#ibcon#about to clear, iclass 37 cls_cnt 0 2006.232.08:04:12.58#ibcon#cleared, iclass 37 cls_cnt 0 2006.232.08:04:12.58$vc4f8/vabw=wide 2006.232.08:04:12.58#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.232.08:04:12.58#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.232.08:04:12.58#ibcon#ireg 8 cls_cnt 0 2006.232.08:04:12.58#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.232.08:04:12.58#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.232.08:04:12.58#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.232.08:04:12.58#ibcon#enter wrdev, iclass 39, count 0 2006.232.08:04:12.58#ibcon#first serial, iclass 39, count 0 2006.232.08:04:12.58#ibcon#enter sib2, iclass 39, count 0 2006.232.08:04:12.58#ibcon#flushed, iclass 39, count 0 2006.232.08:04:12.58#ibcon#about to write, iclass 39, count 0 2006.232.08:04:12.58#ibcon#wrote, iclass 39, count 0 2006.232.08:04:12.58#ibcon#about to read 3, iclass 39, count 0 2006.232.08:04:12.60#ibcon#read 3, iclass 39, count 0 2006.232.08:04:12.60#ibcon#about to read 4, iclass 39, count 0 2006.232.08:04:12.60#ibcon#read 4, iclass 39, count 0 2006.232.08:04:12.60#ibcon#about to read 5, iclass 39, count 0 2006.232.08:04:12.60#ibcon#read 5, iclass 39, count 0 2006.232.08:04:12.60#ibcon#about to read 6, iclass 39, count 0 2006.232.08:04:12.60#ibcon#read 6, iclass 39, count 0 2006.232.08:04:12.60#ibcon#end of sib2, iclass 39, count 0 2006.232.08:04:12.60#ibcon#*mode == 0, iclass 39, count 0 2006.232.08:04:12.60#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.232.08:04:12.60#ibcon#[25=BW32\r\n] 2006.232.08:04:12.60#ibcon#*before write, iclass 39, count 0 2006.232.08:04:12.60#ibcon#enter sib2, iclass 39, count 0 2006.232.08:04:12.60#ibcon#flushed, iclass 39, count 0 2006.232.08:04:12.60#ibcon#about to write, iclass 39, count 0 2006.232.08:04:12.60#ibcon#wrote, iclass 39, count 0 2006.232.08:04:12.60#ibcon#about to read 3, iclass 39, count 0 2006.232.08:04:12.63#ibcon#read 3, iclass 39, count 0 2006.232.08:04:12.63#ibcon#about to read 4, iclass 39, count 0 2006.232.08:04:12.63#ibcon#read 4, iclass 39, count 0 2006.232.08:04:12.63#ibcon#about to read 5, iclass 39, count 0 2006.232.08:04:12.63#ibcon#read 5, iclass 39, count 0 2006.232.08:04:12.63#ibcon#about to read 6, iclass 39, count 0 2006.232.08:04:12.63#ibcon#read 6, iclass 39, count 0 2006.232.08:04:12.63#ibcon#end of sib2, iclass 39, count 0 2006.232.08:04:12.63#ibcon#*after write, iclass 39, count 0 2006.232.08:04:12.63#ibcon#*before return 0, iclass 39, count 0 2006.232.08:04:12.63#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.232.08:04:12.63#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.232.08:04:12.63#ibcon#about to clear, iclass 39 cls_cnt 0 2006.232.08:04:12.63#ibcon#cleared, iclass 39 cls_cnt 0 2006.232.08:04:12.63$vc4f8/vbbw=wide 2006.232.08:04:12.63#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.232.08:04:12.63#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.232.08:04:12.63#ibcon#ireg 8 cls_cnt 0 2006.232.08:04:12.63#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:04:12.70#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:04:12.70#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:04:12.70#ibcon#enter wrdev, iclass 3, count 0 2006.232.08:04:12.70#ibcon#first serial, iclass 3, count 0 2006.232.08:04:12.70#ibcon#enter sib2, iclass 3, count 0 2006.232.08:04:12.70#ibcon#flushed, iclass 3, count 0 2006.232.08:04:12.70#ibcon#about to write, iclass 3, count 0 2006.232.08:04:12.70#ibcon#wrote, iclass 3, count 0 2006.232.08:04:12.70#ibcon#about to read 3, iclass 3, count 0 2006.232.08:04:12.72#ibcon#read 3, iclass 3, count 0 2006.232.08:04:12.72#ibcon#about to read 4, iclass 3, count 0 2006.232.08:04:12.72#ibcon#read 4, iclass 3, count 0 2006.232.08:04:12.72#ibcon#about to read 5, iclass 3, count 0 2006.232.08:04:12.72#ibcon#read 5, iclass 3, count 0 2006.232.08:04:12.72#ibcon#about to read 6, iclass 3, count 0 2006.232.08:04:12.72#ibcon#read 6, iclass 3, count 0 2006.232.08:04:12.72#ibcon#end of sib2, iclass 3, count 0 2006.232.08:04:12.72#ibcon#*mode == 0, iclass 3, count 0 2006.232.08:04:12.72#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.232.08:04:12.72#ibcon#[27=BW32\r\n] 2006.232.08:04:12.72#ibcon#*before write, iclass 3, count 0 2006.232.08:04:12.72#ibcon#enter sib2, iclass 3, count 0 2006.232.08:04:12.72#ibcon#flushed, iclass 3, count 0 2006.232.08:04:12.72#ibcon#about to write, iclass 3, count 0 2006.232.08:04:12.72#ibcon#wrote, iclass 3, count 0 2006.232.08:04:12.72#ibcon#about to read 3, iclass 3, count 0 2006.232.08:04:12.75#ibcon#read 3, iclass 3, count 0 2006.232.08:04:12.75#ibcon#about to read 4, iclass 3, count 0 2006.232.08:04:12.75#ibcon#read 4, iclass 3, count 0 2006.232.08:04:12.75#ibcon#about to read 5, iclass 3, count 0 2006.232.08:04:12.75#ibcon#read 5, iclass 3, count 0 2006.232.08:04:12.75#ibcon#about to read 6, iclass 3, count 0 2006.232.08:04:12.75#ibcon#read 6, iclass 3, count 0 2006.232.08:04:12.75#ibcon#end of sib2, iclass 3, count 0 2006.232.08:04:12.75#ibcon#*after write, iclass 3, count 0 2006.232.08:04:12.75#ibcon#*before return 0, iclass 3, count 0 2006.232.08:04:12.75#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:04:12.75#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:04:12.75#ibcon#about to clear, iclass 3 cls_cnt 0 2006.232.08:04:12.75#ibcon#cleared, iclass 3 cls_cnt 0 2006.232.08:04:12.75$4f8m12a/ifd4f 2006.232.08:04:12.75$ifd4f/lo= 2006.232.08:04:12.75$ifd4f/lo=lo1,7680.00,usb,rcp,1 2006.232.08:04:12.75$ifd4f/lo=lo2,1600.00,usb,rcp,1 2006.232.08:04:12.75$ifd4f/lo=lo3,8080.00,usb,rcp,1 2006.232.08:04:12.75$ifd4f/patch= 2006.232.08:04:12.75$ifd4f/patch=lo1,a1,a2,a3,a4 2006.232.08:04:12.75$ifd4f/patch=lo2,b1,b2,b3,b4,b5,b6 2006.232.08:04:12.75$ifd4f/patch=lo3,a5,a6,a7,a8 2006.232.08:04:12.75$4f8m12a/"form=m,16.000,1:2 2006.232.08:04:12.75$4f8m12a/"tpicd 2006.232.08:04:12.75$4f8m12a/echo=off 2006.232.08:04:12.75$4f8m12a/xlog=off 2006.232.08:04:12.75:!2006.232.08:04:40 2006.232.08:04:20.14#trakl#Source acquired 2006.232.08:04:22.14#flagr#flagr/antenna,acquired 2006.232.08:04:40.00:preob 2006.232.08:04:41.14/onsource/TRACKING 2006.232.08:04:41.14:!2006.232.08:04:50 2006.232.08:04:50.00:data_valid=on 2006.232.08:04:50.00:midob 2006.232.08:04:50.14/onsource/TRACKING 2006.232.08:04:50.14/wx/29.39,1007.3,87 2006.232.08:04:50.27/cable/+6.3881E-03 2006.232.08:04:51.36/va/01,08,usb,yes,31,32 2006.232.08:04:51.36/va/02,07,usb,yes,30,32 2006.232.08:04:51.36/va/03,08,usb,yes,23,23 2006.232.08:04:51.36/va/04,07,usb,yes,32,35 2006.232.08:04:51.36/va/05,07,usb,yes,36,38 2006.232.08:04:51.36/va/06,06,usb,yes,35,35 2006.232.08:04:51.36/va/07,06,usb,yes,36,36 2006.232.08:04:51.36/va/08,06,usb,yes,39,38 2006.232.08:04:51.59/valo/01,532.99,yes,locked 2006.232.08:04:51.59/valo/02,572.99,yes,locked 2006.232.08:04:51.59/valo/03,672.99,yes,locked 2006.232.08:04:51.59/valo/04,832.99,yes,locked 2006.232.08:04:51.59/valo/05,652.99,yes,locked 2006.232.08:04:51.59/valo/06,772.99,yes,locked 2006.232.08:04:51.59/valo/07,832.99,yes,locked 2006.232.08:04:51.59/valo/08,852.99,yes,locked 2006.232.08:04:52.68/vb/01,04,usb,yes,30,29 2006.232.08:04:52.68/vb/02,04,usb,yes,32,34 2006.232.08:04:52.68/vb/03,04,usb,yes,29,32 2006.232.08:04:52.68/vb/04,04,usb,yes,29,30 2006.232.08:04:52.68/vb/05,03,usb,yes,35,39 2006.232.08:04:52.68/vb/06,04,usb,yes,29,32 2006.232.08:04:52.68/vb/07,04,usb,yes,31,31 2006.232.08:04:52.68/vb/08,04,usb,yes,28,32 2006.232.08:04:52.91/vblo/01,632.99,yes,locked 2006.232.08:04:52.91/vblo/02,640.99,yes,locked 2006.232.08:04:52.91/vblo/03,656.99,yes,locked 2006.232.08:04:52.91/vblo/04,712.99,yes,locked 2006.232.08:04:52.91/vblo/05,744.99,yes,locked 2006.232.08:04:52.91/vblo/06,752.99,yes,locked 2006.232.08:04:52.91/vblo/07,734.99,yes,locked 2006.232.08:04:52.91/vblo/08,744.99,yes,locked 2006.232.08:04:53.06/vabw/8 2006.232.08:04:53.21/vbbw/8 2006.232.08:04:53.41/xfe/off,on,13.5 2006.232.08:04:53.79/ifatt/23,28,28,28 2006.232.08:04:54.08/fmout-gps/S +4.49E-07 2006.232.08:04:54.12:!2006.232.08:05:50 2006.232.08:05:50.00:data_valid=off 2006.232.08:05:50.00:postob 2006.232.08:05:50.13/cable/+6.3861E-03 2006.232.08:05:50.13/wx/29.38,1007.3,87 2006.232.08:05:51.08/fmout-gps/S +4.49E-07 2006.232.08:05:51.08:scan_name=232-0806,k06232,70 2006.232.08:05:51.08:source=1116+128,111857.30,123441.7,2000.0,ccw 2006.232.08:05:51.14#flagr#flagr/antenna,new-source 2006.232.08:05:52.14:checkk5 2006.232.08:05:52.51/chk_autoobs//k5ts1/ autoobs is running! 2006.232.08:05:52.90/chk_autoobs//k5ts2/ autoobs is running! 2006.232.08:05:53.28/chk_autoobs//k5ts3/ autoobs is running! 2006.232.08:05:53.65/chk_autoobs//k5ts4/ autoobs is running! 2006.232.08:05:54.02/chk_obsdata//k5ts1/T2320804??a.dat file size is correct (nominal:480MB, actual:480MB). 2006.232.08:05:54.38/chk_obsdata//k5ts2/T2320804??b.dat file size is correct (nominal:480MB, actual:480MB). 2006.232.08:05:54.76/chk_obsdata//k5ts3/T2320804??c.dat file size is correct (nominal:480MB, actual:480MB). 2006.232.08:05:55.13/chk_obsdata//k5ts4/T2320804??d.dat file size is correct (nominal:480MB, actual:480MB). 2006.232.08:05:55.83/k5log//k5ts1_log_newline 2006.232.08:05:56.53/k5log//k5ts2_log_newline 2006.232.08:05:57.22/k5log//k5ts3_log_newline 2006.232.08:05:57.90/k5log//k5ts4_log_newline 2006.232.08:05:57.93/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.232.08:05:57.93:4f8m12a=2 2006.232.08:05:57.93$4f8m12a/echo=on 2006.232.08:05:57.93$4f8m12a/pcalon 2006.232.08:05:57.93$pcalon/"no phase cal control is implemented here 2006.232.08:05:57.93$4f8m12a/"tpicd=stop 2006.232.08:05:57.93$4f8m12a/vc4f8 2006.232.08:05:57.93$vc4f8/valo=1,532.99 2006.232.08:05:57.93#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.232.08:05:57.93#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.232.08:05:57.93#ibcon#ireg 17 cls_cnt 0 2006.232.08:05:57.93#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.232.08:05:57.93#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.232.08:05:57.93#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.232.08:05:57.93#ibcon#enter wrdev, iclass 12, count 0 2006.232.08:05:57.93#ibcon#first serial, iclass 12, count 0 2006.232.08:05:57.93#ibcon#enter sib2, iclass 12, count 0 2006.232.08:05:57.93#ibcon#flushed, iclass 12, count 0 2006.232.08:05:57.93#ibcon#about to write, iclass 12, count 0 2006.232.08:05:57.93#ibcon#wrote, iclass 12, count 0 2006.232.08:05:57.93#ibcon#about to read 3, iclass 12, count 0 2006.232.08:05:57.95#ibcon#read 3, iclass 12, count 0 2006.232.08:05:57.95#ibcon#about to read 4, iclass 12, count 0 2006.232.08:05:57.95#ibcon#read 4, iclass 12, count 0 2006.232.08:05:57.95#ibcon#about to read 5, iclass 12, count 0 2006.232.08:05:57.95#ibcon#read 5, iclass 12, count 0 2006.232.08:05:57.95#ibcon#about to read 6, iclass 12, count 0 2006.232.08:05:57.95#ibcon#read 6, iclass 12, count 0 2006.232.08:05:57.95#ibcon#end of sib2, iclass 12, count 0 2006.232.08:05:57.95#ibcon#*mode == 0, iclass 12, count 0 2006.232.08:05:57.95#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.232.08:05:57.95#ibcon#[26=FRQ=01,532.99\r\n] 2006.232.08:05:57.95#ibcon#*before write, iclass 12, count 0 2006.232.08:05:57.95#ibcon#enter sib2, iclass 12, count 0 2006.232.08:05:57.95#ibcon#flushed, iclass 12, count 0 2006.232.08:05:57.95#ibcon#about to write, iclass 12, count 0 2006.232.08:05:57.95#ibcon#wrote, iclass 12, count 0 2006.232.08:05:57.95#ibcon#about to read 3, iclass 12, count 0 2006.232.08:05:58.00#ibcon#read 3, iclass 12, count 0 2006.232.08:05:58.00#ibcon#about to read 4, iclass 12, count 0 2006.232.08:05:58.00#ibcon#read 4, iclass 12, count 0 2006.232.08:05:58.00#ibcon#about to read 5, iclass 12, count 0 2006.232.08:05:58.00#ibcon#read 5, iclass 12, count 0 2006.232.08:05:58.00#ibcon#about to read 6, iclass 12, count 0 2006.232.08:05:58.00#ibcon#read 6, iclass 12, count 0 2006.232.08:05:58.00#ibcon#end of sib2, iclass 12, count 0 2006.232.08:05:58.00#ibcon#*after write, iclass 12, count 0 2006.232.08:05:58.00#ibcon#*before return 0, iclass 12, count 0 2006.232.08:05:58.00#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.232.08:05:58.00#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.232.08:05:58.00#ibcon#about to clear, iclass 12 cls_cnt 0 2006.232.08:05:58.00#ibcon#cleared, iclass 12 cls_cnt 0 2006.232.08:05:58.00$vc4f8/va=1,8 2006.232.08:05:58.00#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.232.08:05:58.00#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.232.08:05:58.00#ibcon#ireg 11 cls_cnt 2 2006.232.08:05:58.00#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.232.08:05:58.00#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.232.08:05:58.00#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.232.08:05:58.00#ibcon#enter wrdev, iclass 14, count 2 2006.232.08:05:58.00#ibcon#first serial, iclass 14, count 2 2006.232.08:05:58.00#ibcon#enter sib2, iclass 14, count 2 2006.232.08:05:58.00#ibcon#flushed, iclass 14, count 2 2006.232.08:05:58.00#ibcon#about to write, iclass 14, count 2 2006.232.08:05:58.00#ibcon#wrote, iclass 14, count 2 2006.232.08:05:58.00#ibcon#about to read 3, iclass 14, count 2 2006.232.08:05:58.02#ibcon#read 3, iclass 14, count 2 2006.232.08:05:58.02#ibcon#about to read 4, iclass 14, count 2 2006.232.08:05:58.02#ibcon#read 4, iclass 14, count 2 2006.232.08:05:58.02#ibcon#about to read 5, iclass 14, count 2 2006.232.08:05:58.02#ibcon#read 5, iclass 14, count 2 2006.232.08:05:58.02#ibcon#about to read 6, iclass 14, count 2 2006.232.08:05:58.02#ibcon#read 6, iclass 14, count 2 2006.232.08:05:58.02#ibcon#end of sib2, iclass 14, count 2 2006.232.08:05:58.02#ibcon#*mode == 0, iclass 14, count 2 2006.232.08:05:58.02#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.232.08:05:58.02#ibcon#[25=AT01-08\r\n] 2006.232.08:05:58.02#ibcon#*before write, iclass 14, count 2 2006.232.08:05:58.02#ibcon#enter sib2, iclass 14, count 2 2006.232.08:05:58.02#ibcon#flushed, iclass 14, count 2 2006.232.08:05:58.02#ibcon#about to write, iclass 14, count 2 2006.232.08:05:58.02#ibcon#wrote, iclass 14, count 2 2006.232.08:05:58.02#ibcon#about to read 3, iclass 14, count 2 2006.232.08:05:58.05#ibcon#read 3, iclass 14, count 2 2006.232.08:05:58.05#ibcon#about to read 4, iclass 14, count 2 2006.232.08:05:58.05#ibcon#read 4, iclass 14, count 2 2006.232.08:05:58.05#ibcon#about to read 5, iclass 14, count 2 2006.232.08:05:58.05#ibcon#read 5, iclass 14, count 2 2006.232.08:05:58.05#ibcon#about to read 6, iclass 14, count 2 2006.232.08:05:58.05#ibcon#read 6, iclass 14, count 2 2006.232.08:05:58.05#ibcon#end of sib2, iclass 14, count 2 2006.232.08:05:58.05#ibcon#*after write, iclass 14, count 2 2006.232.08:05:58.05#ibcon#*before return 0, iclass 14, count 2 2006.232.08:05:58.05#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.232.08:05:58.05#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.232.08:05:58.05#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.232.08:05:58.05#ibcon#ireg 7 cls_cnt 0 2006.232.08:05:58.05#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.232.08:05:58.17#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.232.08:05:58.17#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.232.08:05:58.17#ibcon#enter wrdev, iclass 14, count 0 2006.232.08:05:58.17#ibcon#first serial, iclass 14, count 0 2006.232.08:05:58.17#ibcon#enter sib2, iclass 14, count 0 2006.232.08:05:58.17#ibcon#flushed, iclass 14, count 0 2006.232.08:05:58.17#ibcon#about to write, iclass 14, count 0 2006.232.08:05:58.17#ibcon#wrote, iclass 14, count 0 2006.232.08:05:58.17#ibcon#about to read 3, iclass 14, count 0 2006.232.08:05:58.19#ibcon#read 3, iclass 14, count 0 2006.232.08:05:58.19#ibcon#about to read 4, iclass 14, count 0 2006.232.08:05:58.19#ibcon#read 4, iclass 14, count 0 2006.232.08:05:58.19#ibcon#about to read 5, iclass 14, count 0 2006.232.08:05:58.19#ibcon#read 5, iclass 14, count 0 2006.232.08:05:58.19#ibcon#about to read 6, iclass 14, count 0 2006.232.08:05:58.19#ibcon#read 6, iclass 14, count 0 2006.232.08:05:58.19#ibcon#end of sib2, iclass 14, count 0 2006.232.08:05:58.19#ibcon#*mode == 0, iclass 14, count 0 2006.232.08:05:58.19#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.232.08:05:58.19#ibcon#[25=USB\r\n] 2006.232.08:05:58.19#ibcon#*before write, iclass 14, count 0 2006.232.08:05:58.19#ibcon#enter sib2, iclass 14, count 0 2006.232.08:05:58.19#ibcon#flushed, iclass 14, count 0 2006.232.08:05:58.19#ibcon#about to write, iclass 14, count 0 2006.232.08:05:58.19#ibcon#wrote, iclass 14, count 0 2006.232.08:05:58.19#ibcon#about to read 3, iclass 14, count 0 2006.232.08:05:58.22#ibcon#read 3, iclass 14, count 0 2006.232.08:05:58.22#ibcon#about to read 4, iclass 14, count 0 2006.232.08:05:58.22#ibcon#read 4, iclass 14, count 0 2006.232.08:05:58.22#ibcon#about to read 5, iclass 14, count 0 2006.232.08:05:58.22#ibcon#read 5, iclass 14, count 0 2006.232.08:05:58.22#ibcon#about to read 6, iclass 14, count 0 2006.232.08:05:58.22#ibcon#read 6, iclass 14, count 0 2006.232.08:05:58.22#ibcon#end of sib2, iclass 14, count 0 2006.232.08:05:58.22#ibcon#*after write, iclass 14, count 0 2006.232.08:05:58.22#ibcon#*before return 0, iclass 14, count 0 2006.232.08:05:58.22#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.232.08:05:58.22#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.232.08:05:58.22#ibcon#about to clear, iclass 14 cls_cnt 0 2006.232.08:05:58.22#ibcon#cleared, iclass 14 cls_cnt 0 2006.232.08:05:58.22$vc4f8/valo=2,572.99 2006.232.08:05:58.22#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.232.08:05:58.22#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.232.08:05:58.22#ibcon#ireg 17 cls_cnt 0 2006.232.08:05:58.22#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.232.08:05:58.22#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.232.08:05:58.22#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.232.08:05:58.22#ibcon#enter wrdev, iclass 16, count 0 2006.232.08:05:58.22#ibcon#first serial, iclass 16, count 0 2006.232.08:05:58.22#ibcon#enter sib2, iclass 16, count 0 2006.232.08:05:58.22#ibcon#flushed, iclass 16, count 0 2006.232.08:05:58.22#ibcon#about to write, iclass 16, count 0 2006.232.08:05:58.22#ibcon#wrote, iclass 16, count 0 2006.232.08:05:58.22#ibcon#about to read 3, iclass 16, count 0 2006.232.08:05:58.24#ibcon#read 3, iclass 16, count 0 2006.232.08:05:58.24#ibcon#about to read 4, iclass 16, count 0 2006.232.08:05:58.24#ibcon#read 4, iclass 16, count 0 2006.232.08:05:58.24#ibcon#about to read 5, iclass 16, count 0 2006.232.08:05:58.24#ibcon#read 5, iclass 16, count 0 2006.232.08:05:58.24#ibcon#about to read 6, iclass 16, count 0 2006.232.08:05:58.24#ibcon#read 6, iclass 16, count 0 2006.232.08:05:58.24#ibcon#end of sib2, iclass 16, count 0 2006.232.08:05:58.24#ibcon#*mode == 0, iclass 16, count 0 2006.232.08:05:58.24#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.232.08:05:58.24#ibcon#[26=FRQ=02,572.99\r\n] 2006.232.08:05:58.24#ibcon#*before write, iclass 16, count 0 2006.232.08:05:58.24#ibcon#enter sib2, iclass 16, count 0 2006.232.08:05:58.24#ibcon#flushed, iclass 16, count 0 2006.232.08:05:58.24#ibcon#about to write, iclass 16, count 0 2006.232.08:05:58.24#ibcon#wrote, iclass 16, count 0 2006.232.08:05:58.24#ibcon#about to read 3, iclass 16, count 0 2006.232.08:05:58.29#ibcon#read 3, iclass 16, count 0 2006.232.08:05:58.29#ibcon#about to read 4, iclass 16, count 0 2006.232.08:05:58.29#ibcon#read 4, iclass 16, count 0 2006.232.08:05:58.29#ibcon#about to read 5, iclass 16, count 0 2006.232.08:05:58.29#ibcon#read 5, iclass 16, count 0 2006.232.08:05:58.29#ibcon#about to read 6, iclass 16, count 0 2006.232.08:05:58.29#ibcon#read 6, iclass 16, count 0 2006.232.08:05:58.29#ibcon#end of sib2, iclass 16, count 0 2006.232.08:05:58.29#ibcon#*after write, iclass 16, count 0 2006.232.08:05:58.29#ibcon#*before return 0, iclass 16, count 0 2006.232.08:05:58.29#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.232.08:05:58.29#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.232.08:05:58.29#ibcon#about to clear, iclass 16 cls_cnt 0 2006.232.08:05:58.29#ibcon#cleared, iclass 16 cls_cnt 0 2006.232.08:05:58.29$vc4f8/va=2,7 2006.232.08:05:58.29#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.232.08:05:58.29#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.232.08:05:58.29#ibcon#ireg 11 cls_cnt 2 2006.232.08:05:58.29#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.232.08:05:58.34#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.232.08:05:58.34#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.232.08:05:58.34#ibcon#enter wrdev, iclass 18, count 2 2006.232.08:05:58.34#ibcon#first serial, iclass 18, count 2 2006.232.08:05:58.34#ibcon#enter sib2, iclass 18, count 2 2006.232.08:05:58.34#ibcon#flushed, iclass 18, count 2 2006.232.08:05:58.34#ibcon#about to write, iclass 18, count 2 2006.232.08:05:58.34#ibcon#wrote, iclass 18, count 2 2006.232.08:05:58.34#ibcon#about to read 3, iclass 18, count 2 2006.232.08:05:58.36#ibcon#read 3, iclass 18, count 2 2006.232.08:05:58.36#ibcon#about to read 4, iclass 18, count 2 2006.232.08:05:58.36#ibcon#read 4, iclass 18, count 2 2006.232.08:05:58.36#ibcon#about to read 5, iclass 18, count 2 2006.232.08:05:58.36#ibcon#read 5, iclass 18, count 2 2006.232.08:05:58.36#ibcon#about to read 6, iclass 18, count 2 2006.232.08:05:58.36#ibcon#read 6, iclass 18, count 2 2006.232.08:05:58.36#ibcon#end of sib2, iclass 18, count 2 2006.232.08:05:58.36#ibcon#*mode == 0, iclass 18, count 2 2006.232.08:05:58.36#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.232.08:05:58.36#ibcon#[25=AT02-07\r\n] 2006.232.08:05:58.36#ibcon#*before write, iclass 18, count 2 2006.232.08:05:58.36#ibcon#enter sib2, iclass 18, count 2 2006.232.08:05:58.36#ibcon#flushed, iclass 18, count 2 2006.232.08:05:58.36#ibcon#about to write, iclass 18, count 2 2006.232.08:05:58.36#ibcon#wrote, iclass 18, count 2 2006.232.08:05:58.36#ibcon#about to read 3, iclass 18, count 2 2006.232.08:05:58.39#ibcon#read 3, iclass 18, count 2 2006.232.08:05:58.39#ibcon#about to read 4, iclass 18, count 2 2006.232.08:05:58.39#ibcon#read 4, iclass 18, count 2 2006.232.08:05:58.39#ibcon#about to read 5, iclass 18, count 2 2006.232.08:05:58.39#ibcon#read 5, iclass 18, count 2 2006.232.08:05:58.39#ibcon#about to read 6, iclass 18, count 2 2006.232.08:05:58.39#ibcon#read 6, iclass 18, count 2 2006.232.08:05:58.39#ibcon#end of sib2, iclass 18, count 2 2006.232.08:05:58.39#ibcon#*after write, iclass 18, count 2 2006.232.08:05:58.39#ibcon#*before return 0, iclass 18, count 2 2006.232.08:05:58.39#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.232.08:05:58.39#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.232.08:05:58.39#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.232.08:05:58.39#ibcon#ireg 7 cls_cnt 0 2006.232.08:05:58.39#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.232.08:05:58.51#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.232.08:05:58.51#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.232.08:05:58.51#ibcon#enter wrdev, iclass 18, count 0 2006.232.08:05:58.51#ibcon#first serial, iclass 18, count 0 2006.232.08:05:58.51#ibcon#enter sib2, iclass 18, count 0 2006.232.08:05:58.51#ibcon#flushed, iclass 18, count 0 2006.232.08:05:58.51#ibcon#about to write, iclass 18, count 0 2006.232.08:05:58.51#ibcon#wrote, iclass 18, count 0 2006.232.08:05:58.51#ibcon#about to read 3, iclass 18, count 0 2006.232.08:05:58.53#ibcon#read 3, iclass 18, count 0 2006.232.08:05:58.53#ibcon#about to read 4, iclass 18, count 0 2006.232.08:05:58.53#ibcon#read 4, iclass 18, count 0 2006.232.08:05:58.53#ibcon#about to read 5, iclass 18, count 0 2006.232.08:05:58.53#ibcon#read 5, iclass 18, count 0 2006.232.08:05:58.53#ibcon#about to read 6, iclass 18, count 0 2006.232.08:05:58.53#ibcon#read 6, iclass 18, count 0 2006.232.08:05:58.53#ibcon#end of sib2, iclass 18, count 0 2006.232.08:05:58.53#ibcon#*mode == 0, iclass 18, count 0 2006.232.08:05:58.53#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.232.08:05:58.53#ibcon#[25=USB\r\n] 2006.232.08:05:58.53#ibcon#*before write, iclass 18, count 0 2006.232.08:05:58.53#ibcon#enter sib2, iclass 18, count 0 2006.232.08:05:58.53#ibcon#flushed, iclass 18, count 0 2006.232.08:05:58.53#ibcon#about to write, iclass 18, count 0 2006.232.08:05:58.53#ibcon#wrote, iclass 18, count 0 2006.232.08:05:58.53#ibcon#about to read 3, iclass 18, count 0 2006.232.08:05:58.56#ibcon#read 3, iclass 18, count 0 2006.232.08:05:58.56#ibcon#about to read 4, iclass 18, count 0 2006.232.08:05:58.56#ibcon#read 4, iclass 18, count 0 2006.232.08:05:58.56#ibcon#about to read 5, iclass 18, count 0 2006.232.08:05:58.56#ibcon#read 5, iclass 18, count 0 2006.232.08:05:58.56#ibcon#about to read 6, iclass 18, count 0 2006.232.08:05:58.56#ibcon#read 6, iclass 18, count 0 2006.232.08:05:58.56#ibcon#end of sib2, iclass 18, count 0 2006.232.08:05:58.56#ibcon#*after write, iclass 18, count 0 2006.232.08:05:58.56#ibcon#*before return 0, iclass 18, count 0 2006.232.08:05:58.56#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.232.08:05:58.56#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.232.08:05:58.56#ibcon#about to clear, iclass 18 cls_cnt 0 2006.232.08:05:58.56#ibcon#cleared, iclass 18 cls_cnt 0 2006.232.08:05:58.56$vc4f8/valo=3,672.99 2006.232.08:05:58.56#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.232.08:05:58.56#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.232.08:05:58.56#ibcon#ireg 17 cls_cnt 0 2006.232.08:05:58.56#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.232.08:05:58.56#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.232.08:05:58.56#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.232.08:05:58.56#ibcon#enter wrdev, iclass 20, count 0 2006.232.08:05:58.56#ibcon#first serial, iclass 20, count 0 2006.232.08:05:58.56#ibcon#enter sib2, iclass 20, count 0 2006.232.08:05:58.56#ibcon#flushed, iclass 20, count 0 2006.232.08:05:58.56#ibcon#about to write, iclass 20, count 0 2006.232.08:05:58.56#ibcon#wrote, iclass 20, count 0 2006.232.08:05:58.56#ibcon#about to read 3, iclass 20, count 0 2006.232.08:05:58.58#ibcon#read 3, iclass 20, count 0 2006.232.08:05:58.58#ibcon#about to read 4, iclass 20, count 0 2006.232.08:05:58.58#ibcon#read 4, iclass 20, count 0 2006.232.08:05:58.58#ibcon#about to read 5, iclass 20, count 0 2006.232.08:05:58.58#ibcon#read 5, iclass 20, count 0 2006.232.08:05:58.58#ibcon#about to read 6, iclass 20, count 0 2006.232.08:05:58.58#ibcon#read 6, iclass 20, count 0 2006.232.08:05:58.58#ibcon#end of sib2, iclass 20, count 0 2006.232.08:05:58.58#ibcon#*mode == 0, iclass 20, count 0 2006.232.08:05:58.58#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.232.08:05:58.58#ibcon#[26=FRQ=03,672.99\r\n] 2006.232.08:05:58.58#ibcon#*before write, iclass 20, count 0 2006.232.08:05:58.58#ibcon#enter sib2, iclass 20, count 0 2006.232.08:05:58.58#ibcon#flushed, iclass 20, count 0 2006.232.08:05:58.58#ibcon#about to write, iclass 20, count 0 2006.232.08:05:58.58#ibcon#wrote, iclass 20, count 0 2006.232.08:05:58.58#ibcon#about to read 3, iclass 20, count 0 2006.232.08:05:58.62#ibcon#read 3, iclass 20, count 0 2006.232.08:05:58.62#ibcon#about to read 4, iclass 20, count 0 2006.232.08:05:58.62#ibcon#read 4, iclass 20, count 0 2006.232.08:05:58.62#ibcon#about to read 5, iclass 20, count 0 2006.232.08:05:58.62#ibcon#read 5, iclass 20, count 0 2006.232.08:05:58.62#ibcon#about to read 6, iclass 20, count 0 2006.232.08:05:58.62#ibcon#read 6, iclass 20, count 0 2006.232.08:05:58.62#ibcon#end of sib2, iclass 20, count 0 2006.232.08:05:58.62#ibcon#*after write, iclass 20, count 0 2006.232.08:05:58.62#ibcon#*before return 0, iclass 20, count 0 2006.232.08:05:58.62#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.232.08:05:58.62#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.232.08:05:58.62#ibcon#about to clear, iclass 20 cls_cnt 0 2006.232.08:05:58.62#ibcon#cleared, iclass 20 cls_cnt 0 2006.232.08:05:58.62$vc4f8/va=3,8 2006.232.08:05:58.62#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.232.08:05:58.62#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.232.08:05:58.62#ibcon#ireg 11 cls_cnt 2 2006.232.08:05:58.62#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.232.08:05:58.68#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.232.08:05:58.68#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.232.08:05:58.68#ibcon#enter wrdev, iclass 22, count 2 2006.232.08:05:58.68#ibcon#first serial, iclass 22, count 2 2006.232.08:05:58.68#ibcon#enter sib2, iclass 22, count 2 2006.232.08:05:58.68#ibcon#flushed, iclass 22, count 2 2006.232.08:05:58.68#ibcon#about to write, iclass 22, count 2 2006.232.08:05:58.68#ibcon#wrote, iclass 22, count 2 2006.232.08:05:58.68#ibcon#about to read 3, iclass 22, count 2 2006.232.08:05:58.70#ibcon#read 3, iclass 22, count 2 2006.232.08:05:58.70#ibcon#about to read 4, iclass 22, count 2 2006.232.08:05:58.70#ibcon#read 4, iclass 22, count 2 2006.232.08:05:58.70#ibcon#about to read 5, iclass 22, count 2 2006.232.08:05:58.70#ibcon#read 5, iclass 22, count 2 2006.232.08:05:58.70#ibcon#about to read 6, iclass 22, count 2 2006.232.08:05:58.70#ibcon#read 6, iclass 22, count 2 2006.232.08:05:58.70#ibcon#end of sib2, iclass 22, count 2 2006.232.08:05:58.70#ibcon#*mode == 0, iclass 22, count 2 2006.232.08:05:58.70#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.232.08:05:58.70#ibcon#[25=AT03-08\r\n] 2006.232.08:05:58.70#ibcon#*before write, iclass 22, count 2 2006.232.08:05:58.70#ibcon#enter sib2, iclass 22, count 2 2006.232.08:05:58.70#ibcon#flushed, iclass 22, count 2 2006.232.08:05:58.70#ibcon#about to write, iclass 22, count 2 2006.232.08:05:58.70#ibcon#wrote, iclass 22, count 2 2006.232.08:05:58.70#ibcon#about to read 3, iclass 22, count 2 2006.232.08:05:58.73#ibcon#read 3, iclass 22, count 2 2006.232.08:05:58.73#ibcon#about to read 4, iclass 22, count 2 2006.232.08:05:58.73#ibcon#read 4, iclass 22, count 2 2006.232.08:05:58.73#ibcon#about to read 5, iclass 22, count 2 2006.232.08:05:58.73#ibcon#read 5, iclass 22, count 2 2006.232.08:05:58.73#ibcon#about to read 6, iclass 22, count 2 2006.232.08:05:58.73#ibcon#read 6, iclass 22, count 2 2006.232.08:05:58.73#ibcon#end of sib2, iclass 22, count 2 2006.232.08:05:58.73#ibcon#*after write, iclass 22, count 2 2006.232.08:05:58.73#ibcon#*before return 0, iclass 22, count 2 2006.232.08:05:58.73#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.232.08:05:58.73#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.232.08:05:58.73#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.232.08:05:58.73#ibcon#ireg 7 cls_cnt 0 2006.232.08:05:58.73#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.232.08:05:58.85#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.232.08:05:58.85#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.232.08:05:58.85#ibcon#enter wrdev, iclass 22, count 0 2006.232.08:05:58.85#ibcon#first serial, iclass 22, count 0 2006.232.08:05:58.85#ibcon#enter sib2, iclass 22, count 0 2006.232.08:05:58.85#ibcon#flushed, iclass 22, count 0 2006.232.08:05:58.85#ibcon#about to write, iclass 22, count 0 2006.232.08:05:58.85#ibcon#wrote, iclass 22, count 0 2006.232.08:05:58.85#ibcon#about to read 3, iclass 22, count 0 2006.232.08:05:58.87#ibcon#read 3, iclass 22, count 0 2006.232.08:05:58.87#ibcon#about to read 4, iclass 22, count 0 2006.232.08:05:58.87#ibcon#read 4, iclass 22, count 0 2006.232.08:05:58.87#ibcon#about to read 5, iclass 22, count 0 2006.232.08:05:58.87#ibcon#read 5, iclass 22, count 0 2006.232.08:05:58.87#ibcon#about to read 6, iclass 22, count 0 2006.232.08:05:58.87#ibcon#read 6, iclass 22, count 0 2006.232.08:05:58.87#ibcon#end of sib2, iclass 22, count 0 2006.232.08:05:58.87#ibcon#*mode == 0, iclass 22, count 0 2006.232.08:05:58.87#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.232.08:05:58.87#ibcon#[25=USB\r\n] 2006.232.08:05:58.87#ibcon#*before write, iclass 22, count 0 2006.232.08:05:58.87#ibcon#enter sib2, iclass 22, count 0 2006.232.08:05:58.87#ibcon#flushed, iclass 22, count 0 2006.232.08:05:58.87#ibcon#about to write, iclass 22, count 0 2006.232.08:05:58.87#ibcon#wrote, iclass 22, count 0 2006.232.08:05:58.87#ibcon#about to read 3, iclass 22, count 0 2006.232.08:05:58.90#ibcon#read 3, iclass 22, count 0 2006.232.08:05:58.90#ibcon#about to read 4, iclass 22, count 0 2006.232.08:05:58.90#ibcon#read 4, iclass 22, count 0 2006.232.08:05:58.90#ibcon#about to read 5, iclass 22, count 0 2006.232.08:05:58.90#ibcon#read 5, iclass 22, count 0 2006.232.08:05:58.90#ibcon#about to read 6, iclass 22, count 0 2006.232.08:05:58.90#ibcon#read 6, iclass 22, count 0 2006.232.08:05:58.90#ibcon#end of sib2, iclass 22, count 0 2006.232.08:05:58.90#ibcon#*after write, iclass 22, count 0 2006.232.08:05:58.90#ibcon#*before return 0, iclass 22, count 0 2006.232.08:05:58.90#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.232.08:05:58.90#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.232.08:05:58.90#ibcon#about to clear, iclass 22 cls_cnt 0 2006.232.08:05:58.90#ibcon#cleared, iclass 22 cls_cnt 0 2006.232.08:05:58.90$vc4f8/valo=4,832.99 2006.232.08:05:58.90#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.232.08:05:58.90#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.232.08:05:58.90#ibcon#ireg 17 cls_cnt 0 2006.232.08:05:58.90#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.232.08:05:58.90#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.232.08:05:58.90#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.232.08:05:58.90#ibcon#enter wrdev, iclass 24, count 0 2006.232.08:05:58.90#ibcon#first serial, iclass 24, count 0 2006.232.08:05:58.90#ibcon#enter sib2, iclass 24, count 0 2006.232.08:05:58.90#ibcon#flushed, iclass 24, count 0 2006.232.08:05:58.90#ibcon#about to write, iclass 24, count 0 2006.232.08:05:58.90#ibcon#wrote, iclass 24, count 0 2006.232.08:05:58.90#ibcon#about to read 3, iclass 24, count 0 2006.232.08:05:58.92#ibcon#read 3, iclass 24, count 0 2006.232.08:05:58.92#ibcon#about to read 4, iclass 24, count 0 2006.232.08:05:58.92#ibcon#read 4, iclass 24, count 0 2006.232.08:05:58.92#ibcon#about to read 5, iclass 24, count 0 2006.232.08:05:58.92#ibcon#read 5, iclass 24, count 0 2006.232.08:05:58.92#ibcon#about to read 6, iclass 24, count 0 2006.232.08:05:58.92#ibcon#read 6, iclass 24, count 0 2006.232.08:05:58.92#ibcon#end of sib2, iclass 24, count 0 2006.232.08:05:58.92#ibcon#*mode == 0, iclass 24, count 0 2006.232.08:05:58.92#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.232.08:05:58.92#ibcon#[26=FRQ=04,832.99\r\n] 2006.232.08:05:58.92#ibcon#*before write, iclass 24, count 0 2006.232.08:05:58.92#ibcon#enter sib2, iclass 24, count 0 2006.232.08:05:58.92#ibcon#flushed, iclass 24, count 0 2006.232.08:05:58.92#ibcon#about to write, iclass 24, count 0 2006.232.08:05:58.92#ibcon#wrote, iclass 24, count 0 2006.232.08:05:58.92#ibcon#about to read 3, iclass 24, count 0 2006.232.08:05:58.96#ibcon#read 3, iclass 24, count 0 2006.232.08:05:58.96#ibcon#about to read 4, iclass 24, count 0 2006.232.08:05:58.96#ibcon#read 4, iclass 24, count 0 2006.232.08:05:58.96#ibcon#about to read 5, iclass 24, count 0 2006.232.08:05:58.96#ibcon#read 5, iclass 24, count 0 2006.232.08:05:58.96#ibcon#about to read 6, iclass 24, count 0 2006.232.08:05:58.96#ibcon#read 6, iclass 24, count 0 2006.232.08:05:58.96#ibcon#end of sib2, iclass 24, count 0 2006.232.08:05:58.96#ibcon#*after write, iclass 24, count 0 2006.232.08:05:58.96#ibcon#*before return 0, iclass 24, count 0 2006.232.08:05:58.96#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.232.08:05:58.96#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.232.08:05:58.96#ibcon#about to clear, iclass 24 cls_cnt 0 2006.232.08:05:58.96#ibcon#cleared, iclass 24 cls_cnt 0 2006.232.08:05:58.96$vc4f8/va=4,7 2006.232.08:05:58.96#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.232.08:05:58.96#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.232.08:05:58.96#ibcon#ireg 11 cls_cnt 2 2006.232.08:05:58.96#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.232.08:05:59.02#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.232.08:05:59.02#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.232.08:05:59.02#ibcon#enter wrdev, iclass 26, count 2 2006.232.08:05:59.02#ibcon#first serial, iclass 26, count 2 2006.232.08:05:59.02#ibcon#enter sib2, iclass 26, count 2 2006.232.08:05:59.02#ibcon#flushed, iclass 26, count 2 2006.232.08:05:59.02#ibcon#about to write, iclass 26, count 2 2006.232.08:05:59.02#ibcon#wrote, iclass 26, count 2 2006.232.08:05:59.02#ibcon#about to read 3, iclass 26, count 2 2006.232.08:05:59.04#ibcon#read 3, iclass 26, count 2 2006.232.08:05:59.04#ibcon#about to read 4, iclass 26, count 2 2006.232.08:05:59.04#ibcon#read 4, iclass 26, count 2 2006.232.08:05:59.04#ibcon#about to read 5, iclass 26, count 2 2006.232.08:05:59.04#ibcon#read 5, iclass 26, count 2 2006.232.08:05:59.04#ibcon#about to read 6, iclass 26, count 2 2006.232.08:05:59.04#ibcon#read 6, iclass 26, count 2 2006.232.08:05:59.04#ibcon#end of sib2, iclass 26, count 2 2006.232.08:05:59.04#ibcon#*mode == 0, iclass 26, count 2 2006.232.08:05:59.04#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.232.08:05:59.04#ibcon#[25=AT04-07\r\n] 2006.232.08:05:59.04#ibcon#*before write, iclass 26, count 2 2006.232.08:05:59.04#ibcon#enter sib2, iclass 26, count 2 2006.232.08:05:59.04#ibcon#flushed, iclass 26, count 2 2006.232.08:05:59.04#ibcon#about to write, iclass 26, count 2 2006.232.08:05:59.04#ibcon#wrote, iclass 26, count 2 2006.232.08:05:59.04#ibcon#about to read 3, iclass 26, count 2 2006.232.08:05:59.07#ibcon#read 3, iclass 26, count 2 2006.232.08:05:59.07#ibcon#about to read 4, iclass 26, count 2 2006.232.08:05:59.07#ibcon#read 4, iclass 26, count 2 2006.232.08:05:59.07#ibcon#about to read 5, iclass 26, count 2 2006.232.08:05:59.07#ibcon#read 5, iclass 26, count 2 2006.232.08:05:59.07#ibcon#about to read 6, iclass 26, count 2 2006.232.08:05:59.07#ibcon#read 6, iclass 26, count 2 2006.232.08:05:59.07#ibcon#end of sib2, iclass 26, count 2 2006.232.08:05:59.07#ibcon#*after write, iclass 26, count 2 2006.232.08:05:59.07#ibcon#*before return 0, iclass 26, count 2 2006.232.08:05:59.07#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.232.08:05:59.07#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.232.08:05:59.07#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.232.08:05:59.07#ibcon#ireg 7 cls_cnt 0 2006.232.08:05:59.07#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.232.08:05:59.19#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.232.08:05:59.19#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.232.08:05:59.19#ibcon#enter wrdev, iclass 26, count 0 2006.232.08:05:59.19#ibcon#first serial, iclass 26, count 0 2006.232.08:05:59.19#ibcon#enter sib2, iclass 26, count 0 2006.232.08:05:59.19#ibcon#flushed, iclass 26, count 0 2006.232.08:05:59.19#ibcon#about to write, iclass 26, count 0 2006.232.08:05:59.19#ibcon#wrote, iclass 26, count 0 2006.232.08:05:59.19#ibcon#about to read 3, iclass 26, count 0 2006.232.08:05:59.21#ibcon#read 3, iclass 26, count 0 2006.232.08:05:59.21#ibcon#about to read 4, iclass 26, count 0 2006.232.08:05:59.21#ibcon#read 4, iclass 26, count 0 2006.232.08:05:59.21#ibcon#about to read 5, iclass 26, count 0 2006.232.08:05:59.21#ibcon#read 5, iclass 26, count 0 2006.232.08:05:59.21#ibcon#about to read 6, iclass 26, count 0 2006.232.08:05:59.21#ibcon#read 6, iclass 26, count 0 2006.232.08:05:59.21#ibcon#end of sib2, iclass 26, count 0 2006.232.08:05:59.21#ibcon#*mode == 0, iclass 26, count 0 2006.232.08:05:59.21#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.232.08:05:59.21#ibcon#[25=USB\r\n] 2006.232.08:05:59.21#ibcon#*before write, iclass 26, count 0 2006.232.08:05:59.21#ibcon#enter sib2, iclass 26, count 0 2006.232.08:05:59.21#ibcon#flushed, iclass 26, count 0 2006.232.08:05:59.21#ibcon#about to write, iclass 26, count 0 2006.232.08:05:59.21#ibcon#wrote, iclass 26, count 0 2006.232.08:05:59.21#ibcon#about to read 3, iclass 26, count 0 2006.232.08:05:59.24#ibcon#read 3, iclass 26, count 0 2006.232.08:05:59.24#ibcon#about to read 4, iclass 26, count 0 2006.232.08:05:59.24#ibcon#read 4, iclass 26, count 0 2006.232.08:05:59.24#ibcon#about to read 5, iclass 26, count 0 2006.232.08:05:59.24#ibcon#read 5, iclass 26, count 0 2006.232.08:05:59.24#ibcon#about to read 6, iclass 26, count 0 2006.232.08:05:59.24#ibcon#read 6, iclass 26, count 0 2006.232.08:05:59.24#ibcon#end of sib2, iclass 26, count 0 2006.232.08:05:59.24#ibcon#*after write, iclass 26, count 0 2006.232.08:05:59.24#ibcon#*before return 0, iclass 26, count 0 2006.232.08:05:59.24#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.232.08:05:59.24#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.232.08:05:59.24#ibcon#about to clear, iclass 26 cls_cnt 0 2006.232.08:05:59.24#ibcon#cleared, iclass 26 cls_cnt 0 2006.232.08:05:59.24$vc4f8/valo=5,652.99 2006.232.08:05:59.24#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.232.08:05:59.24#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.232.08:05:59.24#ibcon#ireg 17 cls_cnt 0 2006.232.08:05:59.24#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.232.08:05:59.24#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.232.08:05:59.24#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.232.08:05:59.24#ibcon#enter wrdev, iclass 28, count 0 2006.232.08:05:59.24#ibcon#first serial, iclass 28, count 0 2006.232.08:05:59.24#ibcon#enter sib2, iclass 28, count 0 2006.232.08:05:59.24#ibcon#flushed, iclass 28, count 0 2006.232.08:05:59.24#ibcon#about to write, iclass 28, count 0 2006.232.08:05:59.24#ibcon#wrote, iclass 28, count 0 2006.232.08:05:59.24#ibcon#about to read 3, iclass 28, count 0 2006.232.08:05:59.26#ibcon#read 3, iclass 28, count 0 2006.232.08:05:59.26#ibcon#about to read 4, iclass 28, count 0 2006.232.08:05:59.26#ibcon#read 4, iclass 28, count 0 2006.232.08:05:59.26#ibcon#about to read 5, iclass 28, count 0 2006.232.08:05:59.26#ibcon#read 5, iclass 28, count 0 2006.232.08:05:59.26#ibcon#about to read 6, iclass 28, count 0 2006.232.08:05:59.26#ibcon#read 6, iclass 28, count 0 2006.232.08:05:59.26#ibcon#end of sib2, iclass 28, count 0 2006.232.08:05:59.26#ibcon#*mode == 0, iclass 28, count 0 2006.232.08:05:59.26#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.232.08:05:59.26#ibcon#[26=FRQ=05,652.99\r\n] 2006.232.08:05:59.26#ibcon#*before write, iclass 28, count 0 2006.232.08:05:59.26#ibcon#enter sib2, iclass 28, count 0 2006.232.08:05:59.26#ibcon#flushed, iclass 28, count 0 2006.232.08:05:59.26#ibcon#about to write, iclass 28, count 0 2006.232.08:05:59.26#ibcon#wrote, iclass 28, count 0 2006.232.08:05:59.26#ibcon#about to read 3, iclass 28, count 0 2006.232.08:05:59.30#ibcon#read 3, iclass 28, count 0 2006.232.08:05:59.30#ibcon#about to read 4, iclass 28, count 0 2006.232.08:05:59.30#ibcon#read 4, iclass 28, count 0 2006.232.08:05:59.30#ibcon#about to read 5, iclass 28, count 0 2006.232.08:05:59.30#ibcon#read 5, iclass 28, count 0 2006.232.08:05:59.30#ibcon#about to read 6, iclass 28, count 0 2006.232.08:05:59.30#ibcon#read 6, iclass 28, count 0 2006.232.08:05:59.30#ibcon#end of sib2, iclass 28, count 0 2006.232.08:05:59.30#ibcon#*after write, iclass 28, count 0 2006.232.08:05:59.30#ibcon#*before return 0, iclass 28, count 0 2006.232.08:05:59.30#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.232.08:05:59.30#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.232.08:05:59.30#ibcon#about to clear, iclass 28 cls_cnt 0 2006.232.08:05:59.30#ibcon#cleared, iclass 28 cls_cnt 0 2006.232.08:05:59.30$vc4f8/va=5,7 2006.232.08:05:59.30#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.232.08:05:59.30#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.232.08:05:59.30#ibcon#ireg 11 cls_cnt 2 2006.232.08:05:59.30#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.232.08:05:59.36#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.232.08:05:59.36#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.232.08:05:59.36#ibcon#enter wrdev, iclass 30, count 2 2006.232.08:05:59.36#ibcon#first serial, iclass 30, count 2 2006.232.08:05:59.36#ibcon#enter sib2, iclass 30, count 2 2006.232.08:05:59.36#ibcon#flushed, iclass 30, count 2 2006.232.08:05:59.36#ibcon#about to write, iclass 30, count 2 2006.232.08:05:59.36#ibcon#wrote, iclass 30, count 2 2006.232.08:05:59.36#ibcon#about to read 3, iclass 30, count 2 2006.232.08:05:59.38#ibcon#read 3, iclass 30, count 2 2006.232.08:05:59.38#ibcon#about to read 4, iclass 30, count 2 2006.232.08:05:59.38#ibcon#read 4, iclass 30, count 2 2006.232.08:05:59.38#ibcon#about to read 5, iclass 30, count 2 2006.232.08:05:59.38#ibcon#read 5, iclass 30, count 2 2006.232.08:05:59.38#ibcon#about to read 6, iclass 30, count 2 2006.232.08:05:59.38#ibcon#read 6, iclass 30, count 2 2006.232.08:05:59.38#ibcon#end of sib2, iclass 30, count 2 2006.232.08:05:59.38#ibcon#*mode == 0, iclass 30, count 2 2006.232.08:05:59.38#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.232.08:05:59.38#ibcon#[25=AT05-07\r\n] 2006.232.08:05:59.38#ibcon#*before write, iclass 30, count 2 2006.232.08:05:59.38#ibcon#enter sib2, iclass 30, count 2 2006.232.08:05:59.38#ibcon#flushed, iclass 30, count 2 2006.232.08:05:59.38#ibcon#about to write, iclass 30, count 2 2006.232.08:05:59.38#ibcon#wrote, iclass 30, count 2 2006.232.08:05:59.38#ibcon#about to read 3, iclass 30, count 2 2006.232.08:05:59.41#ibcon#read 3, iclass 30, count 2 2006.232.08:05:59.41#ibcon#about to read 4, iclass 30, count 2 2006.232.08:05:59.41#ibcon#read 4, iclass 30, count 2 2006.232.08:05:59.41#ibcon#about to read 5, iclass 30, count 2 2006.232.08:05:59.41#ibcon#read 5, iclass 30, count 2 2006.232.08:05:59.41#ibcon#about to read 6, iclass 30, count 2 2006.232.08:05:59.41#ibcon#read 6, iclass 30, count 2 2006.232.08:05:59.41#ibcon#end of sib2, iclass 30, count 2 2006.232.08:05:59.41#ibcon#*after write, iclass 30, count 2 2006.232.08:05:59.41#ibcon#*before return 0, iclass 30, count 2 2006.232.08:05:59.41#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.232.08:05:59.41#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.232.08:05:59.41#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.232.08:05:59.41#ibcon#ireg 7 cls_cnt 0 2006.232.08:05:59.41#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.232.08:05:59.53#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.232.08:05:59.53#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.232.08:05:59.53#ibcon#enter wrdev, iclass 30, count 0 2006.232.08:05:59.53#ibcon#first serial, iclass 30, count 0 2006.232.08:05:59.53#ibcon#enter sib2, iclass 30, count 0 2006.232.08:05:59.53#ibcon#flushed, iclass 30, count 0 2006.232.08:05:59.53#ibcon#about to write, iclass 30, count 0 2006.232.08:05:59.53#ibcon#wrote, iclass 30, count 0 2006.232.08:05:59.53#ibcon#about to read 3, iclass 30, count 0 2006.232.08:05:59.55#ibcon#read 3, iclass 30, count 0 2006.232.08:05:59.55#ibcon#about to read 4, iclass 30, count 0 2006.232.08:05:59.55#ibcon#read 4, iclass 30, count 0 2006.232.08:05:59.55#ibcon#about to read 5, iclass 30, count 0 2006.232.08:05:59.55#ibcon#read 5, iclass 30, count 0 2006.232.08:05:59.55#ibcon#about to read 6, iclass 30, count 0 2006.232.08:05:59.55#ibcon#read 6, iclass 30, count 0 2006.232.08:05:59.55#ibcon#end of sib2, iclass 30, count 0 2006.232.08:05:59.55#ibcon#*mode == 0, iclass 30, count 0 2006.232.08:05:59.55#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.232.08:05:59.55#ibcon#[25=USB\r\n] 2006.232.08:05:59.55#ibcon#*before write, iclass 30, count 0 2006.232.08:05:59.55#ibcon#enter sib2, iclass 30, count 0 2006.232.08:05:59.55#ibcon#flushed, iclass 30, count 0 2006.232.08:05:59.55#ibcon#about to write, iclass 30, count 0 2006.232.08:05:59.55#ibcon#wrote, iclass 30, count 0 2006.232.08:05:59.55#ibcon#about to read 3, iclass 30, count 0 2006.232.08:05:59.58#ibcon#read 3, iclass 30, count 0 2006.232.08:05:59.58#ibcon#about to read 4, iclass 30, count 0 2006.232.08:05:59.58#ibcon#read 4, iclass 30, count 0 2006.232.08:05:59.58#ibcon#about to read 5, iclass 30, count 0 2006.232.08:05:59.58#ibcon#read 5, iclass 30, count 0 2006.232.08:05:59.58#ibcon#about to read 6, iclass 30, count 0 2006.232.08:05:59.58#ibcon#read 6, iclass 30, count 0 2006.232.08:05:59.58#ibcon#end of sib2, iclass 30, count 0 2006.232.08:05:59.58#ibcon#*after write, iclass 30, count 0 2006.232.08:05:59.58#ibcon#*before return 0, iclass 30, count 0 2006.232.08:05:59.58#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.232.08:05:59.58#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.232.08:05:59.58#ibcon#about to clear, iclass 30 cls_cnt 0 2006.232.08:05:59.58#ibcon#cleared, iclass 30 cls_cnt 0 2006.232.08:05:59.58$vc4f8/valo=6,772.99 2006.232.08:05:59.58#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.232.08:05:59.58#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.232.08:05:59.58#ibcon#ireg 17 cls_cnt 0 2006.232.08:05:59.58#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.232.08:05:59.58#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.232.08:05:59.58#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.232.08:05:59.58#ibcon#enter wrdev, iclass 32, count 0 2006.232.08:05:59.58#ibcon#first serial, iclass 32, count 0 2006.232.08:05:59.58#ibcon#enter sib2, iclass 32, count 0 2006.232.08:05:59.58#ibcon#flushed, iclass 32, count 0 2006.232.08:05:59.58#ibcon#about to write, iclass 32, count 0 2006.232.08:05:59.58#ibcon#wrote, iclass 32, count 0 2006.232.08:05:59.58#ibcon#about to read 3, iclass 32, count 0 2006.232.08:05:59.60#ibcon#read 3, iclass 32, count 0 2006.232.08:05:59.60#ibcon#about to read 4, iclass 32, count 0 2006.232.08:05:59.60#ibcon#read 4, iclass 32, count 0 2006.232.08:05:59.60#ibcon#about to read 5, iclass 32, count 0 2006.232.08:05:59.60#ibcon#read 5, iclass 32, count 0 2006.232.08:05:59.60#ibcon#about to read 6, iclass 32, count 0 2006.232.08:05:59.60#ibcon#read 6, iclass 32, count 0 2006.232.08:05:59.60#ibcon#end of sib2, iclass 32, count 0 2006.232.08:05:59.60#ibcon#*mode == 0, iclass 32, count 0 2006.232.08:05:59.60#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.232.08:05:59.60#ibcon#[26=FRQ=06,772.99\r\n] 2006.232.08:05:59.60#ibcon#*before write, iclass 32, count 0 2006.232.08:05:59.60#ibcon#enter sib2, iclass 32, count 0 2006.232.08:05:59.60#ibcon#flushed, iclass 32, count 0 2006.232.08:05:59.60#ibcon#about to write, iclass 32, count 0 2006.232.08:05:59.60#ibcon#wrote, iclass 32, count 0 2006.232.08:05:59.60#ibcon#about to read 3, iclass 32, count 0 2006.232.08:05:59.64#ibcon#read 3, iclass 32, count 0 2006.232.08:05:59.64#ibcon#about to read 4, iclass 32, count 0 2006.232.08:05:59.64#ibcon#read 4, iclass 32, count 0 2006.232.08:05:59.64#ibcon#about to read 5, iclass 32, count 0 2006.232.08:05:59.64#ibcon#read 5, iclass 32, count 0 2006.232.08:05:59.64#ibcon#about to read 6, iclass 32, count 0 2006.232.08:05:59.64#ibcon#read 6, iclass 32, count 0 2006.232.08:05:59.64#ibcon#end of sib2, iclass 32, count 0 2006.232.08:05:59.64#ibcon#*after write, iclass 32, count 0 2006.232.08:05:59.64#ibcon#*before return 0, iclass 32, count 0 2006.232.08:05:59.64#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.232.08:05:59.64#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.232.08:05:59.64#ibcon#about to clear, iclass 32 cls_cnt 0 2006.232.08:05:59.64#ibcon#cleared, iclass 32 cls_cnt 0 2006.232.08:05:59.64$vc4f8/va=6,6 2006.232.08:05:59.64#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.232.08:05:59.64#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.232.08:05:59.64#ibcon#ireg 11 cls_cnt 2 2006.232.08:05:59.64#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.232.08:05:59.70#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.232.08:05:59.70#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.232.08:05:59.70#ibcon#enter wrdev, iclass 34, count 2 2006.232.08:05:59.70#ibcon#first serial, iclass 34, count 2 2006.232.08:05:59.70#ibcon#enter sib2, iclass 34, count 2 2006.232.08:05:59.70#ibcon#flushed, iclass 34, count 2 2006.232.08:05:59.70#ibcon#about to write, iclass 34, count 2 2006.232.08:05:59.70#ibcon#wrote, iclass 34, count 2 2006.232.08:05:59.70#ibcon#about to read 3, iclass 34, count 2 2006.232.08:05:59.72#ibcon#read 3, iclass 34, count 2 2006.232.08:05:59.72#ibcon#about to read 4, iclass 34, count 2 2006.232.08:05:59.72#ibcon#read 4, iclass 34, count 2 2006.232.08:05:59.72#ibcon#about to read 5, iclass 34, count 2 2006.232.08:05:59.72#ibcon#read 5, iclass 34, count 2 2006.232.08:05:59.72#ibcon#about to read 6, iclass 34, count 2 2006.232.08:05:59.72#ibcon#read 6, iclass 34, count 2 2006.232.08:05:59.72#ibcon#end of sib2, iclass 34, count 2 2006.232.08:05:59.72#ibcon#*mode == 0, iclass 34, count 2 2006.232.08:05:59.72#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.232.08:05:59.72#ibcon#[25=AT06-06\r\n] 2006.232.08:05:59.72#ibcon#*before write, iclass 34, count 2 2006.232.08:05:59.72#ibcon#enter sib2, iclass 34, count 2 2006.232.08:05:59.72#ibcon#flushed, iclass 34, count 2 2006.232.08:05:59.72#ibcon#about to write, iclass 34, count 2 2006.232.08:05:59.72#ibcon#wrote, iclass 34, count 2 2006.232.08:05:59.72#ibcon#about to read 3, iclass 34, count 2 2006.232.08:05:59.75#ibcon#read 3, iclass 34, count 2 2006.232.08:05:59.75#ibcon#about to read 4, iclass 34, count 2 2006.232.08:05:59.75#ibcon#read 4, iclass 34, count 2 2006.232.08:05:59.75#ibcon#about to read 5, iclass 34, count 2 2006.232.08:05:59.75#ibcon#read 5, iclass 34, count 2 2006.232.08:05:59.75#ibcon#about to read 6, iclass 34, count 2 2006.232.08:05:59.75#ibcon#read 6, iclass 34, count 2 2006.232.08:05:59.75#ibcon#end of sib2, iclass 34, count 2 2006.232.08:05:59.75#ibcon#*after write, iclass 34, count 2 2006.232.08:05:59.75#ibcon#*before return 0, iclass 34, count 2 2006.232.08:05:59.75#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.232.08:05:59.75#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.232.08:05:59.75#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.232.08:05:59.75#ibcon#ireg 7 cls_cnt 0 2006.232.08:05:59.75#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.232.08:05:59.87#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.232.08:05:59.87#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.232.08:05:59.87#ibcon#enter wrdev, iclass 34, count 0 2006.232.08:05:59.87#ibcon#first serial, iclass 34, count 0 2006.232.08:05:59.87#ibcon#enter sib2, iclass 34, count 0 2006.232.08:05:59.87#ibcon#flushed, iclass 34, count 0 2006.232.08:05:59.87#ibcon#about to write, iclass 34, count 0 2006.232.08:05:59.87#ibcon#wrote, iclass 34, count 0 2006.232.08:05:59.87#ibcon#about to read 3, iclass 34, count 0 2006.232.08:05:59.89#ibcon#read 3, iclass 34, count 0 2006.232.08:05:59.89#ibcon#about to read 4, iclass 34, count 0 2006.232.08:05:59.89#ibcon#read 4, iclass 34, count 0 2006.232.08:05:59.89#ibcon#about to read 5, iclass 34, count 0 2006.232.08:05:59.89#ibcon#read 5, iclass 34, count 0 2006.232.08:05:59.89#ibcon#about to read 6, iclass 34, count 0 2006.232.08:05:59.89#ibcon#read 6, iclass 34, count 0 2006.232.08:05:59.89#ibcon#end of sib2, iclass 34, count 0 2006.232.08:05:59.89#ibcon#*mode == 0, iclass 34, count 0 2006.232.08:05:59.89#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.232.08:05:59.89#ibcon#[25=USB\r\n] 2006.232.08:05:59.89#ibcon#*before write, iclass 34, count 0 2006.232.08:05:59.89#ibcon#enter sib2, iclass 34, count 0 2006.232.08:05:59.89#ibcon#flushed, iclass 34, count 0 2006.232.08:05:59.89#ibcon#about to write, iclass 34, count 0 2006.232.08:05:59.89#ibcon#wrote, iclass 34, count 0 2006.232.08:05:59.89#ibcon#about to read 3, iclass 34, count 0 2006.232.08:05:59.92#ibcon#read 3, iclass 34, count 0 2006.232.08:05:59.92#ibcon#about to read 4, iclass 34, count 0 2006.232.08:05:59.92#ibcon#read 4, iclass 34, count 0 2006.232.08:05:59.92#ibcon#about to read 5, iclass 34, count 0 2006.232.08:05:59.92#ibcon#read 5, iclass 34, count 0 2006.232.08:05:59.92#ibcon#about to read 6, iclass 34, count 0 2006.232.08:05:59.92#ibcon#read 6, iclass 34, count 0 2006.232.08:05:59.92#ibcon#end of sib2, iclass 34, count 0 2006.232.08:05:59.92#ibcon#*after write, iclass 34, count 0 2006.232.08:05:59.92#ibcon#*before return 0, iclass 34, count 0 2006.232.08:05:59.92#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.232.08:05:59.92#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.232.08:05:59.92#ibcon#about to clear, iclass 34 cls_cnt 0 2006.232.08:05:59.92#ibcon#cleared, iclass 34 cls_cnt 0 2006.232.08:05:59.92$vc4f8/valo=7,832.99 2006.232.08:05:59.92#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.232.08:05:59.92#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.232.08:05:59.92#ibcon#ireg 17 cls_cnt 0 2006.232.08:05:59.92#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.232.08:05:59.92#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.232.08:05:59.92#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.232.08:05:59.92#ibcon#enter wrdev, iclass 36, count 0 2006.232.08:05:59.92#ibcon#first serial, iclass 36, count 0 2006.232.08:05:59.92#ibcon#enter sib2, iclass 36, count 0 2006.232.08:05:59.92#ibcon#flushed, iclass 36, count 0 2006.232.08:05:59.92#ibcon#about to write, iclass 36, count 0 2006.232.08:05:59.92#ibcon#wrote, iclass 36, count 0 2006.232.08:05:59.92#ibcon#about to read 3, iclass 36, count 0 2006.232.08:05:59.94#ibcon#read 3, iclass 36, count 0 2006.232.08:05:59.94#ibcon#about to read 4, iclass 36, count 0 2006.232.08:05:59.94#ibcon#read 4, iclass 36, count 0 2006.232.08:05:59.94#ibcon#about to read 5, iclass 36, count 0 2006.232.08:05:59.94#ibcon#read 5, iclass 36, count 0 2006.232.08:05:59.94#ibcon#about to read 6, iclass 36, count 0 2006.232.08:05:59.94#ibcon#read 6, iclass 36, count 0 2006.232.08:05:59.94#ibcon#end of sib2, iclass 36, count 0 2006.232.08:05:59.94#ibcon#*mode == 0, iclass 36, count 0 2006.232.08:05:59.94#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.232.08:05:59.94#ibcon#[26=FRQ=07,832.99\r\n] 2006.232.08:05:59.94#ibcon#*before write, iclass 36, count 0 2006.232.08:05:59.94#ibcon#enter sib2, iclass 36, count 0 2006.232.08:05:59.94#ibcon#flushed, iclass 36, count 0 2006.232.08:05:59.94#ibcon#about to write, iclass 36, count 0 2006.232.08:05:59.94#ibcon#wrote, iclass 36, count 0 2006.232.08:05:59.94#ibcon#about to read 3, iclass 36, count 0 2006.232.08:05:59.98#ibcon#read 3, iclass 36, count 0 2006.232.08:05:59.98#ibcon#about to read 4, iclass 36, count 0 2006.232.08:05:59.98#ibcon#read 4, iclass 36, count 0 2006.232.08:05:59.98#ibcon#about to read 5, iclass 36, count 0 2006.232.08:05:59.98#ibcon#read 5, iclass 36, count 0 2006.232.08:05:59.98#ibcon#about to read 6, iclass 36, count 0 2006.232.08:05:59.98#ibcon#read 6, iclass 36, count 0 2006.232.08:05:59.98#ibcon#end of sib2, iclass 36, count 0 2006.232.08:05:59.98#ibcon#*after write, iclass 36, count 0 2006.232.08:05:59.98#ibcon#*before return 0, iclass 36, count 0 2006.232.08:05:59.98#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.232.08:05:59.98#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.232.08:05:59.98#ibcon#about to clear, iclass 36 cls_cnt 0 2006.232.08:05:59.98#ibcon#cleared, iclass 36 cls_cnt 0 2006.232.08:05:59.98$vc4f8/va=7,6 2006.232.08:05:59.98#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.232.08:05:59.98#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.232.08:05:59.98#ibcon#ireg 11 cls_cnt 2 2006.232.08:05:59.98#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.232.08:06:00.04#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.232.08:06:00.04#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.232.08:06:00.04#ibcon#enter wrdev, iclass 38, count 2 2006.232.08:06:00.04#ibcon#first serial, iclass 38, count 2 2006.232.08:06:00.04#ibcon#enter sib2, iclass 38, count 2 2006.232.08:06:00.04#ibcon#flushed, iclass 38, count 2 2006.232.08:06:00.04#ibcon#about to write, iclass 38, count 2 2006.232.08:06:00.04#ibcon#wrote, iclass 38, count 2 2006.232.08:06:00.04#ibcon#about to read 3, iclass 38, count 2 2006.232.08:06:00.06#ibcon#read 3, iclass 38, count 2 2006.232.08:06:00.06#ibcon#about to read 4, iclass 38, count 2 2006.232.08:06:00.06#ibcon#read 4, iclass 38, count 2 2006.232.08:06:00.06#ibcon#about to read 5, iclass 38, count 2 2006.232.08:06:00.06#ibcon#read 5, iclass 38, count 2 2006.232.08:06:00.06#ibcon#about to read 6, iclass 38, count 2 2006.232.08:06:00.06#ibcon#read 6, iclass 38, count 2 2006.232.08:06:00.06#ibcon#end of sib2, iclass 38, count 2 2006.232.08:06:00.06#ibcon#*mode == 0, iclass 38, count 2 2006.232.08:06:00.06#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.232.08:06:00.06#ibcon#[25=AT07-06\r\n] 2006.232.08:06:00.06#ibcon#*before write, iclass 38, count 2 2006.232.08:06:00.06#ibcon#enter sib2, iclass 38, count 2 2006.232.08:06:00.06#ibcon#flushed, iclass 38, count 2 2006.232.08:06:00.06#ibcon#about to write, iclass 38, count 2 2006.232.08:06:00.06#ibcon#wrote, iclass 38, count 2 2006.232.08:06:00.06#ibcon#about to read 3, iclass 38, count 2 2006.232.08:06:00.09#ibcon#read 3, iclass 38, count 2 2006.232.08:06:00.09#ibcon#about to read 4, iclass 38, count 2 2006.232.08:06:00.09#ibcon#read 4, iclass 38, count 2 2006.232.08:06:00.09#ibcon#about to read 5, iclass 38, count 2 2006.232.08:06:00.09#ibcon#read 5, iclass 38, count 2 2006.232.08:06:00.09#ibcon#about to read 6, iclass 38, count 2 2006.232.08:06:00.09#ibcon#read 6, iclass 38, count 2 2006.232.08:06:00.09#ibcon#end of sib2, iclass 38, count 2 2006.232.08:06:00.09#ibcon#*after write, iclass 38, count 2 2006.232.08:06:00.09#ibcon#*before return 0, iclass 38, count 2 2006.232.08:06:00.09#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.232.08:06:00.09#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.232.08:06:00.09#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.232.08:06:00.09#ibcon#ireg 7 cls_cnt 0 2006.232.08:06:00.09#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.232.08:06:00.21#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.232.08:06:00.21#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.232.08:06:00.21#ibcon#enter wrdev, iclass 38, count 0 2006.232.08:06:00.21#ibcon#first serial, iclass 38, count 0 2006.232.08:06:00.21#ibcon#enter sib2, iclass 38, count 0 2006.232.08:06:00.21#ibcon#flushed, iclass 38, count 0 2006.232.08:06:00.21#ibcon#about to write, iclass 38, count 0 2006.232.08:06:00.21#ibcon#wrote, iclass 38, count 0 2006.232.08:06:00.21#ibcon#about to read 3, iclass 38, count 0 2006.232.08:06:00.23#ibcon#read 3, iclass 38, count 0 2006.232.08:06:00.23#ibcon#about to read 4, iclass 38, count 0 2006.232.08:06:00.23#ibcon#read 4, iclass 38, count 0 2006.232.08:06:00.23#ibcon#about to read 5, iclass 38, count 0 2006.232.08:06:00.23#ibcon#read 5, iclass 38, count 0 2006.232.08:06:00.23#ibcon#about to read 6, iclass 38, count 0 2006.232.08:06:00.23#ibcon#read 6, iclass 38, count 0 2006.232.08:06:00.23#ibcon#end of sib2, iclass 38, count 0 2006.232.08:06:00.23#ibcon#*mode == 0, iclass 38, count 0 2006.232.08:06:00.23#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.232.08:06:00.23#ibcon#[25=USB\r\n] 2006.232.08:06:00.23#ibcon#*before write, iclass 38, count 0 2006.232.08:06:00.23#ibcon#enter sib2, iclass 38, count 0 2006.232.08:06:00.23#ibcon#flushed, iclass 38, count 0 2006.232.08:06:00.23#ibcon#about to write, iclass 38, count 0 2006.232.08:06:00.23#ibcon#wrote, iclass 38, count 0 2006.232.08:06:00.23#ibcon#about to read 3, iclass 38, count 0 2006.232.08:06:00.26#ibcon#read 3, iclass 38, count 0 2006.232.08:06:00.26#ibcon#about to read 4, iclass 38, count 0 2006.232.08:06:00.26#ibcon#read 4, iclass 38, count 0 2006.232.08:06:00.26#ibcon#about to read 5, iclass 38, count 0 2006.232.08:06:00.26#ibcon#read 5, iclass 38, count 0 2006.232.08:06:00.26#ibcon#about to read 6, iclass 38, count 0 2006.232.08:06:00.26#ibcon#read 6, iclass 38, count 0 2006.232.08:06:00.26#ibcon#end of sib2, iclass 38, count 0 2006.232.08:06:00.26#ibcon#*after write, iclass 38, count 0 2006.232.08:06:00.26#ibcon#*before return 0, iclass 38, count 0 2006.232.08:06:00.26#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.232.08:06:00.26#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.232.08:06:00.26#ibcon#about to clear, iclass 38 cls_cnt 0 2006.232.08:06:00.26#ibcon#cleared, iclass 38 cls_cnt 0 2006.232.08:06:00.26$vc4f8/valo=8,852.99 2006.232.08:06:00.26#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.232.08:06:00.26#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.232.08:06:00.26#ibcon#ireg 17 cls_cnt 0 2006.232.08:06:00.26#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.232.08:06:00.26#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.232.08:06:00.26#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.232.08:06:00.26#ibcon#enter wrdev, iclass 40, count 0 2006.232.08:06:00.26#ibcon#first serial, iclass 40, count 0 2006.232.08:06:00.26#ibcon#enter sib2, iclass 40, count 0 2006.232.08:06:00.26#ibcon#flushed, iclass 40, count 0 2006.232.08:06:00.26#ibcon#about to write, iclass 40, count 0 2006.232.08:06:00.26#ibcon#wrote, iclass 40, count 0 2006.232.08:06:00.26#ibcon#about to read 3, iclass 40, count 0 2006.232.08:06:00.28#ibcon#read 3, iclass 40, count 0 2006.232.08:06:00.28#ibcon#about to read 4, iclass 40, count 0 2006.232.08:06:00.28#ibcon#read 4, iclass 40, count 0 2006.232.08:06:00.28#ibcon#about to read 5, iclass 40, count 0 2006.232.08:06:00.28#ibcon#read 5, iclass 40, count 0 2006.232.08:06:00.28#ibcon#about to read 6, iclass 40, count 0 2006.232.08:06:00.28#ibcon#read 6, iclass 40, count 0 2006.232.08:06:00.28#ibcon#end of sib2, iclass 40, count 0 2006.232.08:06:00.28#ibcon#*mode == 0, iclass 40, count 0 2006.232.08:06:00.28#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.232.08:06:00.28#ibcon#[26=FRQ=08,852.99\r\n] 2006.232.08:06:00.28#ibcon#*before write, iclass 40, count 0 2006.232.08:06:00.28#ibcon#enter sib2, iclass 40, count 0 2006.232.08:06:00.28#ibcon#flushed, iclass 40, count 0 2006.232.08:06:00.28#ibcon#about to write, iclass 40, count 0 2006.232.08:06:00.28#ibcon#wrote, iclass 40, count 0 2006.232.08:06:00.28#ibcon#about to read 3, iclass 40, count 0 2006.232.08:06:00.32#ibcon#read 3, iclass 40, count 0 2006.232.08:06:00.32#ibcon#about to read 4, iclass 40, count 0 2006.232.08:06:00.32#ibcon#read 4, iclass 40, count 0 2006.232.08:06:00.32#ibcon#about to read 5, iclass 40, count 0 2006.232.08:06:00.32#ibcon#read 5, iclass 40, count 0 2006.232.08:06:00.32#ibcon#about to read 6, iclass 40, count 0 2006.232.08:06:00.32#ibcon#read 6, iclass 40, count 0 2006.232.08:06:00.32#ibcon#end of sib2, iclass 40, count 0 2006.232.08:06:00.32#ibcon#*after write, iclass 40, count 0 2006.232.08:06:00.32#ibcon#*before return 0, iclass 40, count 0 2006.232.08:06:00.32#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.232.08:06:00.32#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.232.08:06:00.32#ibcon#about to clear, iclass 40 cls_cnt 0 2006.232.08:06:00.32#ibcon#cleared, iclass 40 cls_cnt 0 2006.232.08:06:00.32$vc4f8/va=8,6 2006.232.08:06:00.32#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.232.08:06:00.32#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.232.08:06:00.32#ibcon#ireg 11 cls_cnt 2 2006.232.08:06:00.32#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.232.08:06:00.38#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.232.08:06:00.38#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.232.08:06:00.38#ibcon#enter wrdev, iclass 4, count 2 2006.232.08:06:00.38#ibcon#first serial, iclass 4, count 2 2006.232.08:06:00.38#ibcon#enter sib2, iclass 4, count 2 2006.232.08:06:00.38#ibcon#flushed, iclass 4, count 2 2006.232.08:06:00.38#ibcon#about to write, iclass 4, count 2 2006.232.08:06:00.38#ibcon#wrote, iclass 4, count 2 2006.232.08:06:00.38#ibcon#about to read 3, iclass 4, count 2 2006.232.08:06:00.40#ibcon#read 3, iclass 4, count 2 2006.232.08:06:00.40#ibcon#about to read 4, iclass 4, count 2 2006.232.08:06:00.40#ibcon#read 4, iclass 4, count 2 2006.232.08:06:00.40#ibcon#about to read 5, iclass 4, count 2 2006.232.08:06:00.40#ibcon#read 5, iclass 4, count 2 2006.232.08:06:00.40#ibcon#about to read 6, iclass 4, count 2 2006.232.08:06:00.40#ibcon#read 6, iclass 4, count 2 2006.232.08:06:00.40#ibcon#end of sib2, iclass 4, count 2 2006.232.08:06:00.40#ibcon#*mode == 0, iclass 4, count 2 2006.232.08:06:00.40#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.232.08:06:00.40#ibcon#[25=AT08-06\r\n] 2006.232.08:06:00.40#ibcon#*before write, iclass 4, count 2 2006.232.08:06:00.40#ibcon#enter sib2, iclass 4, count 2 2006.232.08:06:00.40#ibcon#flushed, iclass 4, count 2 2006.232.08:06:00.40#ibcon#about to write, iclass 4, count 2 2006.232.08:06:00.40#ibcon#wrote, iclass 4, count 2 2006.232.08:06:00.40#ibcon#about to read 3, iclass 4, count 2 2006.232.08:06:00.43#ibcon#read 3, iclass 4, count 2 2006.232.08:06:00.43#ibcon#about to read 4, iclass 4, count 2 2006.232.08:06:00.43#ibcon#read 4, iclass 4, count 2 2006.232.08:06:00.43#ibcon#about to read 5, iclass 4, count 2 2006.232.08:06:00.43#ibcon#read 5, iclass 4, count 2 2006.232.08:06:00.43#ibcon#about to read 6, iclass 4, count 2 2006.232.08:06:00.43#ibcon#read 6, iclass 4, count 2 2006.232.08:06:00.43#ibcon#end of sib2, iclass 4, count 2 2006.232.08:06:00.43#ibcon#*after write, iclass 4, count 2 2006.232.08:06:00.43#ibcon#*before return 0, iclass 4, count 2 2006.232.08:06:00.43#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.232.08:06:00.43#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.232.08:06:00.43#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.232.08:06:00.43#ibcon#ireg 7 cls_cnt 0 2006.232.08:06:00.43#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.232.08:06:00.55#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.232.08:06:00.55#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.232.08:06:00.55#ibcon#enter wrdev, iclass 4, count 0 2006.232.08:06:00.55#ibcon#first serial, iclass 4, count 0 2006.232.08:06:00.55#ibcon#enter sib2, iclass 4, count 0 2006.232.08:06:00.55#ibcon#flushed, iclass 4, count 0 2006.232.08:06:00.55#ibcon#about to write, iclass 4, count 0 2006.232.08:06:00.55#ibcon#wrote, iclass 4, count 0 2006.232.08:06:00.55#ibcon#about to read 3, iclass 4, count 0 2006.232.08:06:00.57#ibcon#read 3, iclass 4, count 0 2006.232.08:06:00.57#ibcon#about to read 4, iclass 4, count 0 2006.232.08:06:00.57#ibcon#read 4, iclass 4, count 0 2006.232.08:06:00.57#ibcon#about to read 5, iclass 4, count 0 2006.232.08:06:00.57#ibcon#read 5, iclass 4, count 0 2006.232.08:06:00.57#ibcon#about to read 6, iclass 4, count 0 2006.232.08:06:00.57#ibcon#read 6, iclass 4, count 0 2006.232.08:06:00.57#ibcon#end of sib2, iclass 4, count 0 2006.232.08:06:00.57#ibcon#*mode == 0, iclass 4, count 0 2006.232.08:06:00.57#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.232.08:06:00.57#ibcon#[25=USB\r\n] 2006.232.08:06:00.57#ibcon#*before write, iclass 4, count 0 2006.232.08:06:00.57#ibcon#enter sib2, iclass 4, count 0 2006.232.08:06:00.57#ibcon#flushed, iclass 4, count 0 2006.232.08:06:00.57#ibcon#about to write, iclass 4, count 0 2006.232.08:06:00.57#ibcon#wrote, iclass 4, count 0 2006.232.08:06:00.57#ibcon#about to read 3, iclass 4, count 0 2006.232.08:06:00.60#ibcon#read 3, iclass 4, count 0 2006.232.08:06:00.60#ibcon#about to read 4, iclass 4, count 0 2006.232.08:06:00.60#ibcon#read 4, iclass 4, count 0 2006.232.08:06:00.60#ibcon#about to read 5, iclass 4, count 0 2006.232.08:06:00.60#ibcon#read 5, iclass 4, count 0 2006.232.08:06:00.60#ibcon#about to read 6, iclass 4, count 0 2006.232.08:06:00.60#ibcon#read 6, iclass 4, count 0 2006.232.08:06:00.60#ibcon#end of sib2, iclass 4, count 0 2006.232.08:06:00.60#ibcon#*after write, iclass 4, count 0 2006.232.08:06:00.60#ibcon#*before return 0, iclass 4, count 0 2006.232.08:06:00.60#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.232.08:06:00.60#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.232.08:06:00.60#ibcon#about to clear, iclass 4 cls_cnt 0 2006.232.08:06:00.60#ibcon#cleared, iclass 4 cls_cnt 0 2006.232.08:06:00.60$vc4f8/vblo=1,632.99 2006.232.08:06:00.60#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.232.08:06:00.60#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.232.08:06:00.60#ibcon#ireg 17 cls_cnt 0 2006.232.08:06:00.60#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.232.08:06:00.60#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.232.08:06:00.60#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.232.08:06:00.60#ibcon#enter wrdev, iclass 6, count 0 2006.232.08:06:00.60#ibcon#first serial, iclass 6, count 0 2006.232.08:06:00.60#ibcon#enter sib2, iclass 6, count 0 2006.232.08:06:00.60#ibcon#flushed, iclass 6, count 0 2006.232.08:06:00.60#ibcon#about to write, iclass 6, count 0 2006.232.08:06:00.60#ibcon#wrote, iclass 6, count 0 2006.232.08:06:00.60#ibcon#about to read 3, iclass 6, count 0 2006.232.08:06:00.62#ibcon#read 3, iclass 6, count 0 2006.232.08:06:00.62#ibcon#about to read 4, iclass 6, count 0 2006.232.08:06:00.62#ibcon#read 4, iclass 6, count 0 2006.232.08:06:00.62#ibcon#about to read 5, iclass 6, count 0 2006.232.08:06:00.62#ibcon#read 5, iclass 6, count 0 2006.232.08:06:00.62#ibcon#about to read 6, iclass 6, count 0 2006.232.08:06:00.62#ibcon#read 6, iclass 6, count 0 2006.232.08:06:00.62#ibcon#end of sib2, iclass 6, count 0 2006.232.08:06:00.62#ibcon#*mode == 0, iclass 6, count 0 2006.232.08:06:00.62#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.232.08:06:00.62#ibcon#[28=FRQ=01,632.99\r\n] 2006.232.08:06:00.62#ibcon#*before write, iclass 6, count 0 2006.232.08:06:00.62#ibcon#enter sib2, iclass 6, count 0 2006.232.08:06:00.62#ibcon#flushed, iclass 6, count 0 2006.232.08:06:00.62#ibcon#about to write, iclass 6, count 0 2006.232.08:06:00.62#ibcon#wrote, iclass 6, count 0 2006.232.08:06:00.62#ibcon#about to read 3, iclass 6, count 0 2006.232.08:06:00.66#ibcon#read 3, iclass 6, count 0 2006.232.08:06:00.66#ibcon#about to read 4, iclass 6, count 0 2006.232.08:06:00.66#ibcon#read 4, iclass 6, count 0 2006.232.08:06:00.66#ibcon#about to read 5, iclass 6, count 0 2006.232.08:06:00.66#ibcon#read 5, iclass 6, count 0 2006.232.08:06:00.66#ibcon#about to read 6, iclass 6, count 0 2006.232.08:06:00.66#ibcon#read 6, iclass 6, count 0 2006.232.08:06:00.66#ibcon#end of sib2, iclass 6, count 0 2006.232.08:06:00.66#ibcon#*after write, iclass 6, count 0 2006.232.08:06:00.66#ibcon#*before return 0, iclass 6, count 0 2006.232.08:06:00.66#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.232.08:06:00.66#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.232.08:06:00.66#ibcon#about to clear, iclass 6 cls_cnt 0 2006.232.08:06:00.66#ibcon#cleared, iclass 6 cls_cnt 0 2006.232.08:06:00.66$vc4f8/vb=1,4 2006.232.08:06:00.66#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.232.08:06:00.66#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.232.08:06:00.66#ibcon#ireg 11 cls_cnt 2 2006.232.08:06:00.66#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.232.08:06:00.66#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.232.08:06:00.66#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.232.08:06:00.66#ibcon#enter wrdev, iclass 10, count 2 2006.232.08:06:00.66#ibcon#first serial, iclass 10, count 2 2006.232.08:06:00.66#ibcon#enter sib2, iclass 10, count 2 2006.232.08:06:00.66#ibcon#flushed, iclass 10, count 2 2006.232.08:06:00.66#ibcon#about to write, iclass 10, count 2 2006.232.08:06:00.66#ibcon#wrote, iclass 10, count 2 2006.232.08:06:00.66#ibcon#about to read 3, iclass 10, count 2 2006.232.08:06:00.68#ibcon#read 3, iclass 10, count 2 2006.232.08:06:00.68#ibcon#about to read 4, iclass 10, count 2 2006.232.08:06:00.68#ibcon#read 4, iclass 10, count 2 2006.232.08:06:00.68#ibcon#about to read 5, iclass 10, count 2 2006.232.08:06:00.68#ibcon#read 5, iclass 10, count 2 2006.232.08:06:00.68#ibcon#about to read 6, iclass 10, count 2 2006.232.08:06:00.68#ibcon#read 6, iclass 10, count 2 2006.232.08:06:00.68#ibcon#end of sib2, iclass 10, count 2 2006.232.08:06:00.68#ibcon#*mode == 0, iclass 10, count 2 2006.232.08:06:00.68#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.232.08:06:00.68#ibcon#[27=AT01-04\r\n] 2006.232.08:06:00.68#ibcon#*before write, iclass 10, count 2 2006.232.08:06:00.68#ibcon#enter sib2, iclass 10, count 2 2006.232.08:06:00.68#ibcon#flushed, iclass 10, count 2 2006.232.08:06:00.68#ibcon#about to write, iclass 10, count 2 2006.232.08:06:00.68#ibcon#wrote, iclass 10, count 2 2006.232.08:06:00.68#ibcon#about to read 3, iclass 10, count 2 2006.232.08:06:00.71#ibcon#read 3, iclass 10, count 2 2006.232.08:06:00.71#ibcon#about to read 4, iclass 10, count 2 2006.232.08:06:00.71#ibcon#read 4, iclass 10, count 2 2006.232.08:06:00.71#ibcon#about to read 5, iclass 10, count 2 2006.232.08:06:00.71#ibcon#read 5, iclass 10, count 2 2006.232.08:06:00.71#ibcon#about to read 6, iclass 10, count 2 2006.232.08:06:00.71#ibcon#read 6, iclass 10, count 2 2006.232.08:06:00.71#ibcon#end of sib2, iclass 10, count 2 2006.232.08:06:00.71#ibcon#*after write, iclass 10, count 2 2006.232.08:06:00.71#ibcon#*before return 0, iclass 10, count 2 2006.232.08:06:00.71#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.232.08:06:00.71#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.232.08:06:00.71#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.232.08:06:00.71#ibcon#ireg 7 cls_cnt 0 2006.232.08:06:00.71#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.232.08:06:00.83#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.232.08:06:00.83#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.232.08:06:00.83#ibcon#enter wrdev, iclass 10, count 0 2006.232.08:06:00.83#ibcon#first serial, iclass 10, count 0 2006.232.08:06:00.83#ibcon#enter sib2, iclass 10, count 0 2006.232.08:06:00.83#ibcon#flushed, iclass 10, count 0 2006.232.08:06:00.83#ibcon#about to write, iclass 10, count 0 2006.232.08:06:00.83#ibcon#wrote, iclass 10, count 0 2006.232.08:06:00.83#ibcon#about to read 3, iclass 10, count 0 2006.232.08:06:00.85#ibcon#read 3, iclass 10, count 0 2006.232.08:06:00.85#ibcon#about to read 4, iclass 10, count 0 2006.232.08:06:00.85#ibcon#read 4, iclass 10, count 0 2006.232.08:06:00.85#ibcon#about to read 5, iclass 10, count 0 2006.232.08:06:00.85#ibcon#read 5, iclass 10, count 0 2006.232.08:06:00.85#ibcon#about to read 6, iclass 10, count 0 2006.232.08:06:00.85#ibcon#read 6, iclass 10, count 0 2006.232.08:06:00.85#ibcon#end of sib2, iclass 10, count 0 2006.232.08:06:00.85#ibcon#*mode == 0, iclass 10, count 0 2006.232.08:06:00.85#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.232.08:06:00.85#ibcon#[27=USB\r\n] 2006.232.08:06:00.85#ibcon#*before write, iclass 10, count 0 2006.232.08:06:00.85#ibcon#enter sib2, iclass 10, count 0 2006.232.08:06:00.85#ibcon#flushed, iclass 10, count 0 2006.232.08:06:00.85#ibcon#about to write, iclass 10, count 0 2006.232.08:06:00.85#ibcon#wrote, iclass 10, count 0 2006.232.08:06:00.85#ibcon#about to read 3, iclass 10, count 0 2006.232.08:06:00.88#ibcon#read 3, iclass 10, count 0 2006.232.08:06:00.88#ibcon#about to read 4, iclass 10, count 0 2006.232.08:06:00.88#ibcon#read 4, iclass 10, count 0 2006.232.08:06:00.88#ibcon#about to read 5, iclass 10, count 0 2006.232.08:06:00.88#ibcon#read 5, iclass 10, count 0 2006.232.08:06:00.88#ibcon#about to read 6, iclass 10, count 0 2006.232.08:06:00.88#ibcon#read 6, iclass 10, count 0 2006.232.08:06:00.88#ibcon#end of sib2, iclass 10, count 0 2006.232.08:06:00.88#ibcon#*after write, iclass 10, count 0 2006.232.08:06:00.88#ibcon#*before return 0, iclass 10, count 0 2006.232.08:06:00.88#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.232.08:06:00.88#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.232.08:06:00.88#ibcon#about to clear, iclass 10 cls_cnt 0 2006.232.08:06:00.88#ibcon#cleared, iclass 10 cls_cnt 0 2006.232.08:06:00.88$vc4f8/vblo=2,640.99 2006.232.08:06:00.88#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.232.08:06:00.88#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.232.08:06:00.88#ibcon#ireg 17 cls_cnt 0 2006.232.08:06:00.88#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.232.08:06:00.88#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.232.08:06:00.88#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.232.08:06:00.88#ibcon#enter wrdev, iclass 12, count 0 2006.232.08:06:00.88#ibcon#first serial, iclass 12, count 0 2006.232.08:06:00.88#ibcon#enter sib2, iclass 12, count 0 2006.232.08:06:00.88#ibcon#flushed, iclass 12, count 0 2006.232.08:06:00.88#ibcon#about to write, iclass 12, count 0 2006.232.08:06:00.88#ibcon#wrote, iclass 12, count 0 2006.232.08:06:00.88#ibcon#about to read 3, iclass 12, count 0 2006.232.08:06:00.90#ibcon#read 3, iclass 12, count 0 2006.232.08:06:00.90#ibcon#about to read 4, iclass 12, count 0 2006.232.08:06:00.90#ibcon#read 4, iclass 12, count 0 2006.232.08:06:00.90#ibcon#about to read 5, iclass 12, count 0 2006.232.08:06:00.90#ibcon#read 5, iclass 12, count 0 2006.232.08:06:00.90#ibcon#about to read 6, iclass 12, count 0 2006.232.08:06:00.90#ibcon#read 6, iclass 12, count 0 2006.232.08:06:00.90#ibcon#end of sib2, iclass 12, count 0 2006.232.08:06:00.90#ibcon#*mode == 0, iclass 12, count 0 2006.232.08:06:00.90#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.232.08:06:00.90#ibcon#[28=FRQ=02,640.99\r\n] 2006.232.08:06:00.90#ibcon#*before write, iclass 12, count 0 2006.232.08:06:00.90#ibcon#enter sib2, iclass 12, count 0 2006.232.08:06:00.90#ibcon#flushed, iclass 12, count 0 2006.232.08:06:00.90#ibcon#about to write, iclass 12, count 0 2006.232.08:06:00.90#ibcon#wrote, iclass 12, count 0 2006.232.08:06:00.90#ibcon#about to read 3, iclass 12, count 0 2006.232.08:06:00.94#ibcon#read 3, iclass 12, count 0 2006.232.08:06:00.94#ibcon#about to read 4, iclass 12, count 0 2006.232.08:06:00.94#ibcon#read 4, iclass 12, count 0 2006.232.08:06:00.94#ibcon#about to read 5, iclass 12, count 0 2006.232.08:06:00.94#ibcon#read 5, iclass 12, count 0 2006.232.08:06:00.94#ibcon#about to read 6, iclass 12, count 0 2006.232.08:06:00.94#ibcon#read 6, iclass 12, count 0 2006.232.08:06:00.94#ibcon#end of sib2, iclass 12, count 0 2006.232.08:06:00.94#ibcon#*after write, iclass 12, count 0 2006.232.08:06:00.94#ibcon#*before return 0, iclass 12, count 0 2006.232.08:06:00.94#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.232.08:06:00.94#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.232.08:06:00.94#ibcon#about to clear, iclass 12 cls_cnt 0 2006.232.08:06:00.94#ibcon#cleared, iclass 12 cls_cnt 0 2006.232.08:06:00.94$vc4f8/vb=2,4 2006.232.08:06:00.94#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.232.08:06:00.94#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.232.08:06:00.94#ibcon#ireg 11 cls_cnt 2 2006.232.08:06:00.94#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.232.08:06:01.00#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.232.08:06:01.00#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.232.08:06:01.00#ibcon#enter wrdev, iclass 14, count 2 2006.232.08:06:01.00#ibcon#first serial, iclass 14, count 2 2006.232.08:06:01.00#ibcon#enter sib2, iclass 14, count 2 2006.232.08:06:01.00#ibcon#flushed, iclass 14, count 2 2006.232.08:06:01.00#ibcon#about to write, iclass 14, count 2 2006.232.08:06:01.00#ibcon#wrote, iclass 14, count 2 2006.232.08:06:01.00#ibcon#about to read 3, iclass 14, count 2 2006.232.08:06:01.02#ibcon#read 3, iclass 14, count 2 2006.232.08:06:01.02#ibcon#about to read 4, iclass 14, count 2 2006.232.08:06:01.02#ibcon#read 4, iclass 14, count 2 2006.232.08:06:01.02#ibcon#about to read 5, iclass 14, count 2 2006.232.08:06:01.02#ibcon#read 5, iclass 14, count 2 2006.232.08:06:01.02#ibcon#about to read 6, iclass 14, count 2 2006.232.08:06:01.02#ibcon#read 6, iclass 14, count 2 2006.232.08:06:01.02#ibcon#end of sib2, iclass 14, count 2 2006.232.08:06:01.02#ibcon#*mode == 0, iclass 14, count 2 2006.232.08:06:01.02#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.232.08:06:01.02#ibcon#[27=AT02-04\r\n] 2006.232.08:06:01.02#ibcon#*before write, iclass 14, count 2 2006.232.08:06:01.02#ibcon#enter sib2, iclass 14, count 2 2006.232.08:06:01.02#ibcon#flushed, iclass 14, count 2 2006.232.08:06:01.02#ibcon#about to write, iclass 14, count 2 2006.232.08:06:01.02#ibcon#wrote, iclass 14, count 2 2006.232.08:06:01.02#ibcon#about to read 3, iclass 14, count 2 2006.232.08:06:01.05#ibcon#read 3, iclass 14, count 2 2006.232.08:06:01.05#ibcon#about to read 4, iclass 14, count 2 2006.232.08:06:01.05#ibcon#read 4, iclass 14, count 2 2006.232.08:06:01.05#ibcon#about to read 5, iclass 14, count 2 2006.232.08:06:01.05#ibcon#read 5, iclass 14, count 2 2006.232.08:06:01.05#ibcon#about to read 6, iclass 14, count 2 2006.232.08:06:01.05#ibcon#read 6, iclass 14, count 2 2006.232.08:06:01.05#ibcon#end of sib2, iclass 14, count 2 2006.232.08:06:01.05#ibcon#*after write, iclass 14, count 2 2006.232.08:06:01.05#ibcon#*before return 0, iclass 14, count 2 2006.232.08:06:01.05#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.232.08:06:01.05#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.232.08:06:01.05#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.232.08:06:01.05#ibcon#ireg 7 cls_cnt 0 2006.232.08:06:01.05#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.232.08:06:01.17#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.232.08:06:01.17#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.232.08:06:01.17#ibcon#enter wrdev, iclass 14, count 0 2006.232.08:06:01.17#ibcon#first serial, iclass 14, count 0 2006.232.08:06:01.17#ibcon#enter sib2, iclass 14, count 0 2006.232.08:06:01.17#ibcon#flushed, iclass 14, count 0 2006.232.08:06:01.17#ibcon#about to write, iclass 14, count 0 2006.232.08:06:01.17#ibcon#wrote, iclass 14, count 0 2006.232.08:06:01.17#ibcon#about to read 3, iclass 14, count 0 2006.232.08:06:01.19#ibcon#read 3, iclass 14, count 0 2006.232.08:06:01.19#ibcon#about to read 4, iclass 14, count 0 2006.232.08:06:01.19#ibcon#read 4, iclass 14, count 0 2006.232.08:06:01.19#ibcon#about to read 5, iclass 14, count 0 2006.232.08:06:01.19#ibcon#read 5, iclass 14, count 0 2006.232.08:06:01.19#ibcon#about to read 6, iclass 14, count 0 2006.232.08:06:01.19#ibcon#read 6, iclass 14, count 0 2006.232.08:06:01.19#ibcon#end of sib2, iclass 14, count 0 2006.232.08:06:01.19#ibcon#*mode == 0, iclass 14, count 0 2006.232.08:06:01.19#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.232.08:06:01.19#ibcon#[27=USB\r\n] 2006.232.08:06:01.19#ibcon#*before write, iclass 14, count 0 2006.232.08:06:01.19#ibcon#enter sib2, iclass 14, count 0 2006.232.08:06:01.19#ibcon#flushed, iclass 14, count 0 2006.232.08:06:01.19#ibcon#about to write, iclass 14, count 0 2006.232.08:06:01.19#ibcon#wrote, iclass 14, count 0 2006.232.08:06:01.19#ibcon#about to read 3, iclass 14, count 0 2006.232.08:06:01.22#ibcon#read 3, iclass 14, count 0 2006.232.08:06:01.22#ibcon#about to read 4, iclass 14, count 0 2006.232.08:06:01.22#ibcon#read 4, iclass 14, count 0 2006.232.08:06:01.22#ibcon#about to read 5, iclass 14, count 0 2006.232.08:06:01.22#ibcon#read 5, iclass 14, count 0 2006.232.08:06:01.22#ibcon#about to read 6, iclass 14, count 0 2006.232.08:06:01.22#ibcon#read 6, iclass 14, count 0 2006.232.08:06:01.22#ibcon#end of sib2, iclass 14, count 0 2006.232.08:06:01.22#ibcon#*after write, iclass 14, count 0 2006.232.08:06:01.22#ibcon#*before return 0, iclass 14, count 0 2006.232.08:06:01.22#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.232.08:06:01.22#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.232.08:06:01.22#ibcon#about to clear, iclass 14 cls_cnt 0 2006.232.08:06:01.22#ibcon#cleared, iclass 14 cls_cnt 0 2006.232.08:06:01.22$vc4f8/vblo=3,656.99 2006.232.08:06:01.22#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.232.08:06:01.22#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.232.08:06:01.22#ibcon#ireg 17 cls_cnt 0 2006.232.08:06:01.22#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.232.08:06:01.22#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.232.08:06:01.22#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.232.08:06:01.22#ibcon#enter wrdev, iclass 16, count 0 2006.232.08:06:01.22#ibcon#first serial, iclass 16, count 0 2006.232.08:06:01.22#ibcon#enter sib2, iclass 16, count 0 2006.232.08:06:01.22#ibcon#flushed, iclass 16, count 0 2006.232.08:06:01.22#ibcon#about to write, iclass 16, count 0 2006.232.08:06:01.22#ibcon#wrote, iclass 16, count 0 2006.232.08:06:01.22#ibcon#about to read 3, iclass 16, count 0 2006.232.08:06:01.24#ibcon#read 3, iclass 16, count 0 2006.232.08:06:01.24#ibcon#about to read 4, iclass 16, count 0 2006.232.08:06:01.24#ibcon#read 4, iclass 16, count 0 2006.232.08:06:01.24#ibcon#about to read 5, iclass 16, count 0 2006.232.08:06:01.24#ibcon#read 5, iclass 16, count 0 2006.232.08:06:01.24#ibcon#about to read 6, iclass 16, count 0 2006.232.08:06:01.24#ibcon#read 6, iclass 16, count 0 2006.232.08:06:01.24#ibcon#end of sib2, iclass 16, count 0 2006.232.08:06:01.24#ibcon#*mode == 0, iclass 16, count 0 2006.232.08:06:01.24#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.232.08:06:01.24#ibcon#[28=FRQ=03,656.99\r\n] 2006.232.08:06:01.24#ibcon#*before write, iclass 16, count 0 2006.232.08:06:01.24#ibcon#enter sib2, iclass 16, count 0 2006.232.08:06:01.24#ibcon#flushed, iclass 16, count 0 2006.232.08:06:01.24#ibcon#about to write, iclass 16, count 0 2006.232.08:06:01.24#ibcon#wrote, iclass 16, count 0 2006.232.08:06:01.24#ibcon#about to read 3, iclass 16, count 0 2006.232.08:06:01.28#ibcon#read 3, iclass 16, count 0 2006.232.08:06:01.28#ibcon#about to read 4, iclass 16, count 0 2006.232.08:06:01.28#ibcon#read 4, iclass 16, count 0 2006.232.08:06:01.28#ibcon#about to read 5, iclass 16, count 0 2006.232.08:06:01.28#ibcon#read 5, iclass 16, count 0 2006.232.08:06:01.28#ibcon#about to read 6, iclass 16, count 0 2006.232.08:06:01.28#ibcon#read 6, iclass 16, count 0 2006.232.08:06:01.28#ibcon#end of sib2, iclass 16, count 0 2006.232.08:06:01.28#ibcon#*after write, iclass 16, count 0 2006.232.08:06:01.28#ibcon#*before return 0, iclass 16, count 0 2006.232.08:06:01.28#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.232.08:06:01.28#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.232.08:06:01.28#ibcon#about to clear, iclass 16 cls_cnt 0 2006.232.08:06:01.28#ibcon#cleared, iclass 16 cls_cnt 0 2006.232.08:06:01.28$vc4f8/vb=3,4 2006.232.08:06:01.28#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.232.08:06:01.28#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.232.08:06:01.28#ibcon#ireg 11 cls_cnt 2 2006.232.08:06:01.28#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.232.08:06:01.34#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.232.08:06:01.34#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.232.08:06:01.34#ibcon#enter wrdev, iclass 18, count 2 2006.232.08:06:01.34#ibcon#first serial, iclass 18, count 2 2006.232.08:06:01.34#ibcon#enter sib2, iclass 18, count 2 2006.232.08:06:01.34#ibcon#flushed, iclass 18, count 2 2006.232.08:06:01.34#ibcon#about to write, iclass 18, count 2 2006.232.08:06:01.34#ibcon#wrote, iclass 18, count 2 2006.232.08:06:01.34#ibcon#about to read 3, iclass 18, count 2 2006.232.08:06:01.36#ibcon#read 3, iclass 18, count 2 2006.232.08:06:01.36#ibcon#about to read 4, iclass 18, count 2 2006.232.08:06:01.36#ibcon#read 4, iclass 18, count 2 2006.232.08:06:01.36#ibcon#about to read 5, iclass 18, count 2 2006.232.08:06:01.36#ibcon#read 5, iclass 18, count 2 2006.232.08:06:01.36#ibcon#about to read 6, iclass 18, count 2 2006.232.08:06:01.36#ibcon#read 6, iclass 18, count 2 2006.232.08:06:01.36#ibcon#end of sib2, iclass 18, count 2 2006.232.08:06:01.36#ibcon#*mode == 0, iclass 18, count 2 2006.232.08:06:01.36#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.232.08:06:01.36#ibcon#[27=AT03-04\r\n] 2006.232.08:06:01.36#ibcon#*before write, iclass 18, count 2 2006.232.08:06:01.36#ibcon#enter sib2, iclass 18, count 2 2006.232.08:06:01.36#ibcon#flushed, iclass 18, count 2 2006.232.08:06:01.36#ibcon#about to write, iclass 18, count 2 2006.232.08:06:01.36#ibcon#wrote, iclass 18, count 2 2006.232.08:06:01.36#ibcon#about to read 3, iclass 18, count 2 2006.232.08:06:01.39#ibcon#read 3, iclass 18, count 2 2006.232.08:06:01.39#ibcon#about to read 4, iclass 18, count 2 2006.232.08:06:01.39#ibcon#read 4, iclass 18, count 2 2006.232.08:06:01.39#ibcon#about to read 5, iclass 18, count 2 2006.232.08:06:01.39#ibcon#read 5, iclass 18, count 2 2006.232.08:06:01.39#ibcon#about to read 6, iclass 18, count 2 2006.232.08:06:01.39#ibcon#read 6, iclass 18, count 2 2006.232.08:06:01.39#ibcon#end of sib2, iclass 18, count 2 2006.232.08:06:01.39#ibcon#*after write, iclass 18, count 2 2006.232.08:06:01.39#ibcon#*before return 0, iclass 18, count 2 2006.232.08:06:01.39#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.232.08:06:01.39#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.232.08:06:01.39#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.232.08:06:01.39#ibcon#ireg 7 cls_cnt 0 2006.232.08:06:01.39#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.232.08:06:01.51#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.232.08:06:01.51#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.232.08:06:01.51#ibcon#enter wrdev, iclass 18, count 0 2006.232.08:06:01.51#ibcon#first serial, iclass 18, count 0 2006.232.08:06:01.51#ibcon#enter sib2, iclass 18, count 0 2006.232.08:06:01.51#ibcon#flushed, iclass 18, count 0 2006.232.08:06:01.51#ibcon#about to write, iclass 18, count 0 2006.232.08:06:01.51#ibcon#wrote, iclass 18, count 0 2006.232.08:06:01.51#ibcon#about to read 3, iclass 18, count 0 2006.232.08:06:01.53#ibcon#read 3, iclass 18, count 0 2006.232.08:06:01.53#ibcon#about to read 4, iclass 18, count 0 2006.232.08:06:01.53#ibcon#read 4, iclass 18, count 0 2006.232.08:06:01.53#ibcon#about to read 5, iclass 18, count 0 2006.232.08:06:01.53#ibcon#read 5, iclass 18, count 0 2006.232.08:06:01.53#ibcon#about to read 6, iclass 18, count 0 2006.232.08:06:01.53#ibcon#read 6, iclass 18, count 0 2006.232.08:06:01.53#ibcon#end of sib2, iclass 18, count 0 2006.232.08:06:01.53#ibcon#*mode == 0, iclass 18, count 0 2006.232.08:06:01.53#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.232.08:06:01.53#ibcon#[27=USB\r\n] 2006.232.08:06:01.53#ibcon#*before write, iclass 18, count 0 2006.232.08:06:01.53#ibcon#enter sib2, iclass 18, count 0 2006.232.08:06:01.53#ibcon#flushed, iclass 18, count 0 2006.232.08:06:01.53#ibcon#about to write, iclass 18, count 0 2006.232.08:06:01.53#ibcon#wrote, iclass 18, count 0 2006.232.08:06:01.53#ibcon#about to read 3, iclass 18, count 0 2006.232.08:06:01.56#ibcon#read 3, iclass 18, count 0 2006.232.08:06:01.56#ibcon#about to read 4, iclass 18, count 0 2006.232.08:06:01.56#ibcon#read 4, iclass 18, count 0 2006.232.08:06:01.56#ibcon#about to read 5, iclass 18, count 0 2006.232.08:06:01.56#ibcon#read 5, iclass 18, count 0 2006.232.08:06:01.56#ibcon#about to read 6, iclass 18, count 0 2006.232.08:06:01.56#ibcon#read 6, iclass 18, count 0 2006.232.08:06:01.56#ibcon#end of sib2, iclass 18, count 0 2006.232.08:06:01.56#ibcon#*after write, iclass 18, count 0 2006.232.08:06:01.56#ibcon#*before return 0, iclass 18, count 0 2006.232.08:06:01.56#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.232.08:06:01.56#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.232.08:06:01.56#ibcon#about to clear, iclass 18 cls_cnt 0 2006.232.08:06:01.56#ibcon#cleared, iclass 18 cls_cnt 0 2006.232.08:06:01.56$vc4f8/vblo=4,712.99 2006.232.08:06:01.56#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.232.08:06:01.56#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.232.08:06:01.56#ibcon#ireg 17 cls_cnt 0 2006.232.08:06:01.56#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.232.08:06:01.56#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.232.08:06:01.56#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.232.08:06:01.56#ibcon#enter wrdev, iclass 20, count 0 2006.232.08:06:01.56#ibcon#first serial, iclass 20, count 0 2006.232.08:06:01.56#ibcon#enter sib2, iclass 20, count 0 2006.232.08:06:01.56#ibcon#flushed, iclass 20, count 0 2006.232.08:06:01.56#ibcon#about to write, iclass 20, count 0 2006.232.08:06:01.56#ibcon#wrote, iclass 20, count 0 2006.232.08:06:01.56#ibcon#about to read 3, iclass 20, count 0 2006.232.08:06:01.58#ibcon#read 3, iclass 20, count 0 2006.232.08:06:01.58#ibcon#about to read 4, iclass 20, count 0 2006.232.08:06:01.58#ibcon#read 4, iclass 20, count 0 2006.232.08:06:01.58#ibcon#about to read 5, iclass 20, count 0 2006.232.08:06:01.58#ibcon#read 5, iclass 20, count 0 2006.232.08:06:01.58#ibcon#about to read 6, iclass 20, count 0 2006.232.08:06:01.58#ibcon#read 6, iclass 20, count 0 2006.232.08:06:01.58#ibcon#end of sib2, iclass 20, count 0 2006.232.08:06:01.58#ibcon#*mode == 0, iclass 20, count 0 2006.232.08:06:01.58#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.232.08:06:01.58#ibcon#[28=FRQ=04,712.99\r\n] 2006.232.08:06:01.58#ibcon#*before write, iclass 20, count 0 2006.232.08:06:01.58#ibcon#enter sib2, iclass 20, count 0 2006.232.08:06:01.58#ibcon#flushed, iclass 20, count 0 2006.232.08:06:01.58#ibcon#about to write, iclass 20, count 0 2006.232.08:06:01.58#ibcon#wrote, iclass 20, count 0 2006.232.08:06:01.58#ibcon#about to read 3, iclass 20, count 0 2006.232.08:06:01.62#ibcon#read 3, iclass 20, count 0 2006.232.08:06:01.62#ibcon#about to read 4, iclass 20, count 0 2006.232.08:06:01.62#ibcon#read 4, iclass 20, count 0 2006.232.08:06:01.62#ibcon#about to read 5, iclass 20, count 0 2006.232.08:06:01.62#ibcon#read 5, iclass 20, count 0 2006.232.08:06:01.62#ibcon#about to read 6, iclass 20, count 0 2006.232.08:06:01.62#ibcon#read 6, iclass 20, count 0 2006.232.08:06:01.62#ibcon#end of sib2, iclass 20, count 0 2006.232.08:06:01.62#ibcon#*after write, iclass 20, count 0 2006.232.08:06:01.62#ibcon#*before return 0, iclass 20, count 0 2006.232.08:06:01.62#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.232.08:06:01.62#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.232.08:06:01.62#ibcon#about to clear, iclass 20 cls_cnt 0 2006.232.08:06:01.62#ibcon#cleared, iclass 20 cls_cnt 0 2006.232.08:06:01.62$vc4f8/vb=4,4 2006.232.08:06:01.62#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.232.08:06:01.62#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.232.08:06:01.62#ibcon#ireg 11 cls_cnt 2 2006.232.08:06:01.62#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.232.08:06:01.68#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.232.08:06:01.68#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.232.08:06:01.68#ibcon#enter wrdev, iclass 22, count 2 2006.232.08:06:01.68#ibcon#first serial, iclass 22, count 2 2006.232.08:06:01.68#ibcon#enter sib2, iclass 22, count 2 2006.232.08:06:01.68#ibcon#flushed, iclass 22, count 2 2006.232.08:06:01.68#ibcon#about to write, iclass 22, count 2 2006.232.08:06:01.68#ibcon#wrote, iclass 22, count 2 2006.232.08:06:01.68#ibcon#about to read 3, iclass 22, count 2 2006.232.08:06:01.70#ibcon#read 3, iclass 22, count 2 2006.232.08:06:01.70#ibcon#about to read 4, iclass 22, count 2 2006.232.08:06:01.70#ibcon#read 4, iclass 22, count 2 2006.232.08:06:01.70#ibcon#about to read 5, iclass 22, count 2 2006.232.08:06:01.70#ibcon#read 5, iclass 22, count 2 2006.232.08:06:01.70#ibcon#about to read 6, iclass 22, count 2 2006.232.08:06:01.70#ibcon#read 6, iclass 22, count 2 2006.232.08:06:01.70#ibcon#end of sib2, iclass 22, count 2 2006.232.08:06:01.70#ibcon#*mode == 0, iclass 22, count 2 2006.232.08:06:01.70#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.232.08:06:01.70#ibcon#[27=AT04-04\r\n] 2006.232.08:06:01.70#ibcon#*before write, iclass 22, count 2 2006.232.08:06:01.70#ibcon#enter sib2, iclass 22, count 2 2006.232.08:06:01.70#ibcon#flushed, iclass 22, count 2 2006.232.08:06:01.70#ibcon#about to write, iclass 22, count 2 2006.232.08:06:01.70#ibcon#wrote, iclass 22, count 2 2006.232.08:06:01.70#ibcon#about to read 3, iclass 22, count 2 2006.232.08:06:01.73#ibcon#read 3, iclass 22, count 2 2006.232.08:06:01.73#ibcon#about to read 4, iclass 22, count 2 2006.232.08:06:01.73#ibcon#read 4, iclass 22, count 2 2006.232.08:06:01.73#ibcon#about to read 5, iclass 22, count 2 2006.232.08:06:01.73#ibcon#read 5, iclass 22, count 2 2006.232.08:06:01.73#ibcon#about to read 6, iclass 22, count 2 2006.232.08:06:01.73#ibcon#read 6, iclass 22, count 2 2006.232.08:06:01.73#ibcon#end of sib2, iclass 22, count 2 2006.232.08:06:01.73#ibcon#*after write, iclass 22, count 2 2006.232.08:06:01.73#ibcon#*before return 0, iclass 22, count 2 2006.232.08:06:01.73#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.232.08:06:01.73#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.232.08:06:01.73#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.232.08:06:01.73#ibcon#ireg 7 cls_cnt 0 2006.232.08:06:01.73#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.232.08:06:01.85#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.232.08:06:01.85#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.232.08:06:01.85#ibcon#enter wrdev, iclass 22, count 0 2006.232.08:06:01.85#ibcon#first serial, iclass 22, count 0 2006.232.08:06:01.85#ibcon#enter sib2, iclass 22, count 0 2006.232.08:06:01.85#ibcon#flushed, iclass 22, count 0 2006.232.08:06:01.85#ibcon#about to write, iclass 22, count 0 2006.232.08:06:01.85#ibcon#wrote, iclass 22, count 0 2006.232.08:06:01.85#ibcon#about to read 3, iclass 22, count 0 2006.232.08:06:01.87#ibcon#read 3, iclass 22, count 0 2006.232.08:06:01.87#ibcon#about to read 4, iclass 22, count 0 2006.232.08:06:01.87#ibcon#read 4, iclass 22, count 0 2006.232.08:06:01.87#ibcon#about to read 5, iclass 22, count 0 2006.232.08:06:01.87#ibcon#read 5, iclass 22, count 0 2006.232.08:06:01.87#ibcon#about to read 6, iclass 22, count 0 2006.232.08:06:01.87#ibcon#read 6, iclass 22, count 0 2006.232.08:06:01.87#ibcon#end of sib2, iclass 22, count 0 2006.232.08:06:01.87#ibcon#*mode == 0, iclass 22, count 0 2006.232.08:06:01.87#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.232.08:06:01.87#ibcon#[27=USB\r\n] 2006.232.08:06:01.87#ibcon#*before write, iclass 22, count 0 2006.232.08:06:01.87#ibcon#enter sib2, iclass 22, count 0 2006.232.08:06:01.87#ibcon#flushed, iclass 22, count 0 2006.232.08:06:01.87#ibcon#about to write, iclass 22, count 0 2006.232.08:06:01.87#ibcon#wrote, iclass 22, count 0 2006.232.08:06:01.87#ibcon#about to read 3, iclass 22, count 0 2006.232.08:06:01.90#ibcon#read 3, iclass 22, count 0 2006.232.08:06:01.90#ibcon#about to read 4, iclass 22, count 0 2006.232.08:06:01.90#ibcon#read 4, iclass 22, count 0 2006.232.08:06:01.90#ibcon#about to read 5, iclass 22, count 0 2006.232.08:06:01.90#ibcon#read 5, iclass 22, count 0 2006.232.08:06:01.90#ibcon#about to read 6, iclass 22, count 0 2006.232.08:06:01.90#ibcon#read 6, iclass 22, count 0 2006.232.08:06:01.90#ibcon#end of sib2, iclass 22, count 0 2006.232.08:06:01.90#ibcon#*after write, iclass 22, count 0 2006.232.08:06:01.90#ibcon#*before return 0, iclass 22, count 0 2006.232.08:06:01.90#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.232.08:06:01.90#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.232.08:06:01.90#ibcon#about to clear, iclass 22 cls_cnt 0 2006.232.08:06:01.90#ibcon#cleared, iclass 22 cls_cnt 0 2006.232.08:06:01.90$vc4f8/vblo=5,744.99 2006.232.08:06:01.90#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.232.08:06:01.90#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.232.08:06:01.90#ibcon#ireg 17 cls_cnt 0 2006.232.08:06:01.90#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.232.08:06:01.90#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.232.08:06:01.90#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.232.08:06:01.90#ibcon#enter wrdev, iclass 24, count 0 2006.232.08:06:01.90#ibcon#first serial, iclass 24, count 0 2006.232.08:06:01.90#ibcon#enter sib2, iclass 24, count 0 2006.232.08:06:01.90#ibcon#flushed, iclass 24, count 0 2006.232.08:06:01.90#ibcon#about to write, iclass 24, count 0 2006.232.08:06:01.90#ibcon#wrote, iclass 24, count 0 2006.232.08:06:01.90#ibcon#about to read 3, iclass 24, count 0 2006.232.08:06:01.92#ibcon#read 3, iclass 24, count 0 2006.232.08:06:01.92#ibcon#about to read 4, iclass 24, count 0 2006.232.08:06:01.92#ibcon#read 4, iclass 24, count 0 2006.232.08:06:01.92#ibcon#about to read 5, iclass 24, count 0 2006.232.08:06:01.92#ibcon#read 5, iclass 24, count 0 2006.232.08:06:01.92#ibcon#about to read 6, iclass 24, count 0 2006.232.08:06:01.92#ibcon#read 6, iclass 24, count 0 2006.232.08:06:01.92#ibcon#end of sib2, iclass 24, count 0 2006.232.08:06:01.92#ibcon#*mode == 0, iclass 24, count 0 2006.232.08:06:01.92#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.232.08:06:01.92#ibcon#[28=FRQ=05,744.99\r\n] 2006.232.08:06:01.92#ibcon#*before write, iclass 24, count 0 2006.232.08:06:01.92#ibcon#enter sib2, iclass 24, count 0 2006.232.08:06:01.92#ibcon#flushed, iclass 24, count 0 2006.232.08:06:01.92#ibcon#about to write, iclass 24, count 0 2006.232.08:06:01.92#ibcon#wrote, iclass 24, count 0 2006.232.08:06:01.92#ibcon#about to read 3, iclass 24, count 0 2006.232.08:06:01.96#ibcon#read 3, iclass 24, count 0 2006.232.08:06:01.96#ibcon#about to read 4, iclass 24, count 0 2006.232.08:06:01.96#ibcon#read 4, iclass 24, count 0 2006.232.08:06:01.96#ibcon#about to read 5, iclass 24, count 0 2006.232.08:06:01.96#ibcon#read 5, iclass 24, count 0 2006.232.08:06:01.96#ibcon#about to read 6, iclass 24, count 0 2006.232.08:06:01.96#ibcon#read 6, iclass 24, count 0 2006.232.08:06:01.96#ibcon#end of sib2, iclass 24, count 0 2006.232.08:06:01.96#ibcon#*after write, iclass 24, count 0 2006.232.08:06:01.96#ibcon#*before return 0, iclass 24, count 0 2006.232.08:06:01.96#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.232.08:06:01.96#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.232.08:06:01.96#ibcon#about to clear, iclass 24 cls_cnt 0 2006.232.08:06:01.96#ibcon#cleared, iclass 24 cls_cnt 0 2006.232.08:06:01.96$vc4f8/vb=5,3 2006.232.08:06:01.96#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.232.08:06:01.96#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.232.08:06:01.96#ibcon#ireg 11 cls_cnt 2 2006.232.08:06:01.96#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.232.08:06:02.02#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.232.08:06:02.02#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.232.08:06:02.02#ibcon#enter wrdev, iclass 26, count 2 2006.232.08:06:02.02#ibcon#first serial, iclass 26, count 2 2006.232.08:06:02.02#ibcon#enter sib2, iclass 26, count 2 2006.232.08:06:02.02#ibcon#flushed, iclass 26, count 2 2006.232.08:06:02.02#ibcon#about to write, iclass 26, count 2 2006.232.08:06:02.02#ibcon#wrote, iclass 26, count 2 2006.232.08:06:02.02#ibcon#about to read 3, iclass 26, count 2 2006.232.08:06:02.04#ibcon#read 3, iclass 26, count 2 2006.232.08:06:02.04#ibcon#about to read 4, iclass 26, count 2 2006.232.08:06:02.04#ibcon#read 4, iclass 26, count 2 2006.232.08:06:02.04#ibcon#about to read 5, iclass 26, count 2 2006.232.08:06:02.04#ibcon#read 5, iclass 26, count 2 2006.232.08:06:02.04#ibcon#about to read 6, iclass 26, count 2 2006.232.08:06:02.04#ibcon#read 6, iclass 26, count 2 2006.232.08:06:02.04#ibcon#end of sib2, iclass 26, count 2 2006.232.08:06:02.04#ibcon#*mode == 0, iclass 26, count 2 2006.232.08:06:02.04#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.232.08:06:02.04#ibcon#[27=AT05-03\r\n] 2006.232.08:06:02.04#ibcon#*before write, iclass 26, count 2 2006.232.08:06:02.04#ibcon#enter sib2, iclass 26, count 2 2006.232.08:06:02.04#ibcon#flushed, iclass 26, count 2 2006.232.08:06:02.04#ibcon#about to write, iclass 26, count 2 2006.232.08:06:02.04#ibcon#wrote, iclass 26, count 2 2006.232.08:06:02.04#ibcon#about to read 3, iclass 26, count 2 2006.232.08:06:02.07#abcon#<5=/05 3.5 7.0 29.38 871007.3\r\n> 2006.232.08:06:02.07#ibcon#read 3, iclass 26, count 2 2006.232.08:06:02.07#ibcon#about to read 4, iclass 26, count 2 2006.232.08:06:02.07#ibcon#read 4, iclass 26, count 2 2006.232.08:06:02.07#ibcon#about to read 5, iclass 26, count 2 2006.232.08:06:02.07#ibcon#read 5, iclass 26, count 2 2006.232.08:06:02.07#ibcon#about to read 6, iclass 26, count 2 2006.232.08:06:02.07#ibcon#read 6, iclass 26, count 2 2006.232.08:06:02.07#ibcon#end of sib2, iclass 26, count 2 2006.232.08:06:02.07#ibcon#*after write, iclass 26, count 2 2006.232.08:06:02.07#ibcon#*before return 0, iclass 26, count 2 2006.232.08:06:02.07#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.232.08:06:02.07#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.232.08:06:02.07#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.232.08:06:02.07#ibcon#ireg 7 cls_cnt 0 2006.232.08:06:02.07#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.232.08:06:02.09#abcon#{5=INTERFACE CLEAR} 2006.232.08:06:02.15#abcon#[5=S1D000X0/0*\r\n] 2006.232.08:06:02.19#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.232.08:06:02.19#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.232.08:06:02.19#ibcon#enter wrdev, iclass 26, count 0 2006.232.08:06:02.19#ibcon#first serial, iclass 26, count 0 2006.232.08:06:02.19#ibcon#enter sib2, iclass 26, count 0 2006.232.08:06:02.19#ibcon#flushed, iclass 26, count 0 2006.232.08:06:02.19#ibcon#about to write, iclass 26, count 0 2006.232.08:06:02.19#ibcon#wrote, iclass 26, count 0 2006.232.08:06:02.19#ibcon#about to read 3, iclass 26, count 0 2006.232.08:06:02.21#ibcon#read 3, iclass 26, count 0 2006.232.08:06:02.21#ibcon#about to read 4, iclass 26, count 0 2006.232.08:06:02.21#ibcon#read 4, iclass 26, count 0 2006.232.08:06:02.21#ibcon#about to read 5, iclass 26, count 0 2006.232.08:06:02.21#ibcon#read 5, iclass 26, count 0 2006.232.08:06:02.21#ibcon#about to read 6, iclass 26, count 0 2006.232.08:06:02.21#ibcon#read 6, iclass 26, count 0 2006.232.08:06:02.21#ibcon#end of sib2, iclass 26, count 0 2006.232.08:06:02.21#ibcon#*mode == 0, iclass 26, count 0 2006.232.08:06:02.21#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.232.08:06:02.21#ibcon#[27=USB\r\n] 2006.232.08:06:02.21#ibcon#*before write, iclass 26, count 0 2006.232.08:06:02.21#ibcon#enter sib2, iclass 26, count 0 2006.232.08:06:02.21#ibcon#flushed, iclass 26, count 0 2006.232.08:06:02.21#ibcon#about to write, iclass 26, count 0 2006.232.08:06:02.21#ibcon#wrote, iclass 26, count 0 2006.232.08:06:02.21#ibcon#about to read 3, iclass 26, count 0 2006.232.08:06:02.24#ibcon#read 3, iclass 26, count 0 2006.232.08:06:02.24#ibcon#about to read 4, iclass 26, count 0 2006.232.08:06:02.24#ibcon#read 4, iclass 26, count 0 2006.232.08:06:02.24#ibcon#about to read 5, iclass 26, count 0 2006.232.08:06:02.24#ibcon#read 5, iclass 26, count 0 2006.232.08:06:02.24#ibcon#about to read 6, iclass 26, count 0 2006.232.08:06:02.24#ibcon#read 6, iclass 26, count 0 2006.232.08:06:02.24#ibcon#end of sib2, iclass 26, count 0 2006.232.08:06:02.24#ibcon#*after write, iclass 26, count 0 2006.232.08:06:02.24#ibcon#*before return 0, iclass 26, count 0 2006.232.08:06:02.24#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.232.08:06:02.24#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.232.08:06:02.24#ibcon#about to clear, iclass 26 cls_cnt 0 2006.232.08:06:02.24#ibcon#cleared, iclass 26 cls_cnt 0 2006.232.08:06:02.24$vc4f8/vblo=6,752.99 2006.232.08:06:02.24#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.232.08:06:02.24#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.232.08:06:02.24#ibcon#ireg 17 cls_cnt 0 2006.232.08:06:02.24#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.232.08:06:02.24#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.232.08:06:02.24#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.232.08:06:02.24#ibcon#enter wrdev, iclass 32, count 0 2006.232.08:06:02.24#ibcon#first serial, iclass 32, count 0 2006.232.08:06:02.24#ibcon#enter sib2, iclass 32, count 0 2006.232.08:06:02.24#ibcon#flushed, iclass 32, count 0 2006.232.08:06:02.24#ibcon#about to write, iclass 32, count 0 2006.232.08:06:02.24#ibcon#wrote, iclass 32, count 0 2006.232.08:06:02.24#ibcon#about to read 3, iclass 32, count 0 2006.232.08:06:02.26#ibcon#read 3, iclass 32, count 0 2006.232.08:06:02.26#ibcon#about to read 4, iclass 32, count 0 2006.232.08:06:02.26#ibcon#read 4, iclass 32, count 0 2006.232.08:06:02.26#ibcon#about to read 5, iclass 32, count 0 2006.232.08:06:02.26#ibcon#read 5, iclass 32, count 0 2006.232.08:06:02.26#ibcon#about to read 6, iclass 32, count 0 2006.232.08:06:02.26#ibcon#read 6, iclass 32, count 0 2006.232.08:06:02.26#ibcon#end of sib2, iclass 32, count 0 2006.232.08:06:02.26#ibcon#*mode == 0, iclass 32, count 0 2006.232.08:06:02.26#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.232.08:06:02.26#ibcon#[28=FRQ=06,752.99\r\n] 2006.232.08:06:02.26#ibcon#*before write, iclass 32, count 0 2006.232.08:06:02.26#ibcon#enter sib2, iclass 32, count 0 2006.232.08:06:02.26#ibcon#flushed, iclass 32, count 0 2006.232.08:06:02.26#ibcon#about to write, iclass 32, count 0 2006.232.08:06:02.26#ibcon#wrote, iclass 32, count 0 2006.232.08:06:02.26#ibcon#about to read 3, iclass 32, count 0 2006.232.08:06:02.30#ibcon#read 3, iclass 32, count 0 2006.232.08:06:02.30#ibcon#about to read 4, iclass 32, count 0 2006.232.08:06:02.30#ibcon#read 4, iclass 32, count 0 2006.232.08:06:02.30#ibcon#about to read 5, iclass 32, count 0 2006.232.08:06:02.30#ibcon#read 5, iclass 32, count 0 2006.232.08:06:02.30#ibcon#about to read 6, iclass 32, count 0 2006.232.08:06:02.30#ibcon#read 6, iclass 32, count 0 2006.232.08:06:02.30#ibcon#end of sib2, iclass 32, count 0 2006.232.08:06:02.30#ibcon#*after write, iclass 32, count 0 2006.232.08:06:02.30#ibcon#*before return 0, iclass 32, count 0 2006.232.08:06:02.30#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.232.08:06:02.30#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.232.08:06:02.30#ibcon#about to clear, iclass 32 cls_cnt 0 2006.232.08:06:02.30#ibcon#cleared, iclass 32 cls_cnt 0 2006.232.08:06:02.30$vc4f8/vb=6,4 2006.232.08:06:02.30#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.232.08:06:02.30#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.232.08:06:02.30#ibcon#ireg 11 cls_cnt 2 2006.232.08:06:02.30#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.232.08:06:02.36#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.232.08:06:02.36#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.232.08:06:02.36#ibcon#enter wrdev, iclass 34, count 2 2006.232.08:06:02.36#ibcon#first serial, iclass 34, count 2 2006.232.08:06:02.36#ibcon#enter sib2, iclass 34, count 2 2006.232.08:06:02.36#ibcon#flushed, iclass 34, count 2 2006.232.08:06:02.36#ibcon#about to write, iclass 34, count 2 2006.232.08:06:02.36#ibcon#wrote, iclass 34, count 2 2006.232.08:06:02.36#ibcon#about to read 3, iclass 34, count 2 2006.232.08:06:02.38#ibcon#read 3, iclass 34, count 2 2006.232.08:06:02.38#ibcon#about to read 4, iclass 34, count 2 2006.232.08:06:02.38#ibcon#read 4, iclass 34, count 2 2006.232.08:06:02.38#ibcon#about to read 5, iclass 34, count 2 2006.232.08:06:02.38#ibcon#read 5, iclass 34, count 2 2006.232.08:06:02.38#ibcon#about to read 6, iclass 34, count 2 2006.232.08:06:02.38#ibcon#read 6, iclass 34, count 2 2006.232.08:06:02.38#ibcon#end of sib2, iclass 34, count 2 2006.232.08:06:02.38#ibcon#*mode == 0, iclass 34, count 2 2006.232.08:06:02.38#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.232.08:06:02.38#ibcon#[27=AT06-04\r\n] 2006.232.08:06:02.38#ibcon#*before write, iclass 34, count 2 2006.232.08:06:02.38#ibcon#enter sib2, iclass 34, count 2 2006.232.08:06:02.38#ibcon#flushed, iclass 34, count 2 2006.232.08:06:02.38#ibcon#about to write, iclass 34, count 2 2006.232.08:06:02.38#ibcon#wrote, iclass 34, count 2 2006.232.08:06:02.38#ibcon#about to read 3, iclass 34, count 2 2006.232.08:06:02.41#ibcon#read 3, iclass 34, count 2 2006.232.08:06:02.41#ibcon#about to read 4, iclass 34, count 2 2006.232.08:06:02.41#ibcon#read 4, iclass 34, count 2 2006.232.08:06:02.41#ibcon#about to read 5, iclass 34, count 2 2006.232.08:06:02.41#ibcon#read 5, iclass 34, count 2 2006.232.08:06:02.41#ibcon#about to read 6, iclass 34, count 2 2006.232.08:06:02.41#ibcon#read 6, iclass 34, count 2 2006.232.08:06:02.41#ibcon#end of sib2, iclass 34, count 2 2006.232.08:06:02.41#ibcon#*after write, iclass 34, count 2 2006.232.08:06:02.41#ibcon#*before return 0, iclass 34, count 2 2006.232.08:06:02.41#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.232.08:06:02.41#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.232.08:06:02.41#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.232.08:06:02.41#ibcon#ireg 7 cls_cnt 0 2006.232.08:06:02.41#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.232.08:06:02.53#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.232.08:06:02.53#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.232.08:06:02.53#ibcon#enter wrdev, iclass 34, count 0 2006.232.08:06:02.53#ibcon#first serial, iclass 34, count 0 2006.232.08:06:02.53#ibcon#enter sib2, iclass 34, count 0 2006.232.08:06:02.53#ibcon#flushed, iclass 34, count 0 2006.232.08:06:02.53#ibcon#about to write, iclass 34, count 0 2006.232.08:06:02.53#ibcon#wrote, iclass 34, count 0 2006.232.08:06:02.53#ibcon#about to read 3, iclass 34, count 0 2006.232.08:06:02.55#ibcon#read 3, iclass 34, count 0 2006.232.08:06:02.55#ibcon#about to read 4, iclass 34, count 0 2006.232.08:06:02.55#ibcon#read 4, iclass 34, count 0 2006.232.08:06:02.55#ibcon#about to read 5, iclass 34, count 0 2006.232.08:06:02.55#ibcon#read 5, iclass 34, count 0 2006.232.08:06:02.55#ibcon#about to read 6, iclass 34, count 0 2006.232.08:06:02.55#ibcon#read 6, iclass 34, count 0 2006.232.08:06:02.55#ibcon#end of sib2, iclass 34, count 0 2006.232.08:06:02.55#ibcon#*mode == 0, iclass 34, count 0 2006.232.08:06:02.55#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.232.08:06:02.55#ibcon#[27=USB\r\n] 2006.232.08:06:02.55#ibcon#*before write, iclass 34, count 0 2006.232.08:06:02.55#ibcon#enter sib2, iclass 34, count 0 2006.232.08:06:02.55#ibcon#flushed, iclass 34, count 0 2006.232.08:06:02.55#ibcon#about to write, iclass 34, count 0 2006.232.08:06:02.55#ibcon#wrote, iclass 34, count 0 2006.232.08:06:02.55#ibcon#about to read 3, iclass 34, count 0 2006.232.08:06:02.58#ibcon#read 3, iclass 34, count 0 2006.232.08:06:02.58#ibcon#about to read 4, iclass 34, count 0 2006.232.08:06:02.58#ibcon#read 4, iclass 34, count 0 2006.232.08:06:02.58#ibcon#about to read 5, iclass 34, count 0 2006.232.08:06:02.58#ibcon#read 5, iclass 34, count 0 2006.232.08:06:02.58#ibcon#about to read 6, iclass 34, count 0 2006.232.08:06:02.58#ibcon#read 6, iclass 34, count 0 2006.232.08:06:02.58#ibcon#end of sib2, iclass 34, count 0 2006.232.08:06:02.58#ibcon#*after write, iclass 34, count 0 2006.232.08:06:02.58#ibcon#*before return 0, iclass 34, count 0 2006.232.08:06:02.58#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.232.08:06:02.58#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.232.08:06:02.58#ibcon#about to clear, iclass 34 cls_cnt 0 2006.232.08:06:02.58#ibcon#cleared, iclass 34 cls_cnt 0 2006.232.08:06:02.58$vc4f8/vabw=wide 2006.232.08:06:02.58#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.232.08:06:02.58#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.232.08:06:02.58#ibcon#ireg 8 cls_cnt 0 2006.232.08:06:02.58#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.232.08:06:02.58#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.232.08:06:02.58#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.232.08:06:02.58#ibcon#enter wrdev, iclass 36, count 0 2006.232.08:06:02.58#ibcon#first serial, iclass 36, count 0 2006.232.08:06:02.58#ibcon#enter sib2, iclass 36, count 0 2006.232.08:06:02.58#ibcon#flushed, iclass 36, count 0 2006.232.08:06:02.58#ibcon#about to write, iclass 36, count 0 2006.232.08:06:02.58#ibcon#wrote, iclass 36, count 0 2006.232.08:06:02.58#ibcon#about to read 3, iclass 36, count 0 2006.232.08:06:02.60#ibcon#read 3, iclass 36, count 0 2006.232.08:06:02.60#ibcon#about to read 4, iclass 36, count 0 2006.232.08:06:02.60#ibcon#read 4, iclass 36, count 0 2006.232.08:06:02.60#ibcon#about to read 5, iclass 36, count 0 2006.232.08:06:02.60#ibcon#read 5, iclass 36, count 0 2006.232.08:06:02.60#ibcon#about to read 6, iclass 36, count 0 2006.232.08:06:02.60#ibcon#read 6, iclass 36, count 0 2006.232.08:06:02.60#ibcon#end of sib2, iclass 36, count 0 2006.232.08:06:02.60#ibcon#*mode == 0, iclass 36, count 0 2006.232.08:06:02.60#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.232.08:06:02.60#ibcon#[25=BW32\r\n] 2006.232.08:06:02.60#ibcon#*before write, iclass 36, count 0 2006.232.08:06:02.60#ibcon#enter sib2, iclass 36, count 0 2006.232.08:06:02.60#ibcon#flushed, iclass 36, count 0 2006.232.08:06:02.60#ibcon#about to write, iclass 36, count 0 2006.232.08:06:02.60#ibcon#wrote, iclass 36, count 0 2006.232.08:06:02.60#ibcon#about to read 3, iclass 36, count 0 2006.232.08:06:02.64#ibcon#read 3, iclass 36, count 0 2006.232.08:06:02.64#ibcon#about to read 4, iclass 36, count 0 2006.232.08:06:02.64#ibcon#read 4, iclass 36, count 0 2006.232.08:06:02.64#ibcon#about to read 5, iclass 36, count 0 2006.232.08:06:02.64#ibcon#read 5, iclass 36, count 0 2006.232.08:06:02.64#ibcon#about to read 6, iclass 36, count 0 2006.232.08:06:02.64#ibcon#read 6, iclass 36, count 0 2006.232.08:06:02.64#ibcon#end of sib2, iclass 36, count 0 2006.232.08:06:02.64#ibcon#*after write, iclass 36, count 0 2006.232.08:06:02.64#ibcon#*before return 0, iclass 36, count 0 2006.232.08:06:02.64#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.232.08:06:02.64#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.232.08:06:02.64#ibcon#about to clear, iclass 36 cls_cnt 0 2006.232.08:06:02.64#ibcon#cleared, iclass 36 cls_cnt 0 2006.232.08:06:02.64$vc4f8/vbbw=wide 2006.232.08:06:02.64#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.232.08:06:02.64#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.232.08:06:02.64#ibcon#ireg 8 cls_cnt 0 2006.232.08:06:02.64#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.232.08:06:02.70#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.232.08:06:02.70#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.232.08:06:02.70#ibcon#enter wrdev, iclass 38, count 0 2006.232.08:06:02.70#ibcon#first serial, iclass 38, count 0 2006.232.08:06:02.70#ibcon#enter sib2, iclass 38, count 0 2006.232.08:06:02.70#ibcon#flushed, iclass 38, count 0 2006.232.08:06:02.70#ibcon#about to write, iclass 38, count 0 2006.232.08:06:02.70#ibcon#wrote, iclass 38, count 0 2006.232.08:06:02.70#ibcon#about to read 3, iclass 38, count 0 2006.232.08:06:02.72#ibcon#read 3, iclass 38, count 0 2006.232.08:06:02.72#ibcon#about to read 4, iclass 38, count 0 2006.232.08:06:02.72#ibcon#read 4, iclass 38, count 0 2006.232.08:06:02.72#ibcon#about to read 5, iclass 38, count 0 2006.232.08:06:02.72#ibcon#read 5, iclass 38, count 0 2006.232.08:06:02.72#ibcon#about to read 6, iclass 38, count 0 2006.232.08:06:02.72#ibcon#read 6, iclass 38, count 0 2006.232.08:06:02.72#ibcon#end of sib2, iclass 38, count 0 2006.232.08:06:02.72#ibcon#*mode == 0, iclass 38, count 0 2006.232.08:06:02.72#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.232.08:06:02.72#ibcon#[27=BW32\r\n] 2006.232.08:06:02.72#ibcon#*before write, iclass 38, count 0 2006.232.08:06:02.72#ibcon#enter sib2, iclass 38, count 0 2006.232.08:06:02.72#ibcon#flushed, iclass 38, count 0 2006.232.08:06:02.72#ibcon#about to write, iclass 38, count 0 2006.232.08:06:02.72#ibcon#wrote, iclass 38, count 0 2006.232.08:06:02.72#ibcon#about to read 3, iclass 38, count 0 2006.232.08:06:02.75#ibcon#read 3, iclass 38, count 0 2006.232.08:06:02.75#ibcon#about to read 4, iclass 38, count 0 2006.232.08:06:02.75#ibcon#read 4, iclass 38, count 0 2006.232.08:06:02.75#ibcon#about to read 5, iclass 38, count 0 2006.232.08:06:02.75#ibcon#read 5, iclass 38, count 0 2006.232.08:06:02.75#ibcon#about to read 6, iclass 38, count 0 2006.232.08:06:02.75#ibcon#read 6, iclass 38, count 0 2006.232.08:06:02.75#ibcon#end of sib2, iclass 38, count 0 2006.232.08:06:02.75#ibcon#*after write, iclass 38, count 0 2006.232.08:06:02.75#ibcon#*before return 0, iclass 38, count 0 2006.232.08:06:02.75#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.232.08:06:02.75#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.232.08:06:02.75#ibcon#about to clear, iclass 38 cls_cnt 0 2006.232.08:06:02.75#ibcon#cleared, iclass 38 cls_cnt 0 2006.232.08:06:02.75$4f8m12a/ifd4f 2006.232.08:06:02.75$ifd4f/lo= 2006.232.08:06:02.75$ifd4f/lo=lo1,7680.00,usb,rcp,1 2006.232.08:06:02.75$ifd4f/lo=lo2,1600.00,usb,rcp,1 2006.232.08:06:02.75$ifd4f/lo=lo3,8080.00,usb,rcp,1 2006.232.08:06:02.75$ifd4f/patch= 2006.232.08:06:02.75$ifd4f/patch=lo1,a1,a2,a3,a4 2006.232.08:06:02.75$ifd4f/patch=lo2,b1,b2,b3,b4,b5,b6 2006.232.08:06:02.75$ifd4f/patch=lo3,a5,a6,a7,a8 2006.232.08:06:02.75$4f8m12a/"form=m,16.000,1:2 2006.232.08:06:02.75$4f8m12a/"tpicd 2006.232.08:06:02.75$4f8m12a/echo=off 2006.232.08:06:02.75$4f8m12a/xlog=off 2006.232.08:06:02.75:!2006.232.08:06:30 2006.232.08:06:10.13#trakl#Source acquired 2006.232.08:06:12.14#flagr#flagr/antenna,acquired 2006.232.08:06:30.00:preob 2006.232.08:06:31.13/onsource/TRACKING 2006.232.08:06:31.13:!2006.232.08:06:40 2006.232.08:06:40.00:data_valid=on 2006.232.08:06:40.00:midob 2006.232.08:06:40.13/onsource/TRACKING 2006.232.08:06:40.13/wx/29.37,1007.3,87 2006.232.08:06:40.23/cable/+6.3870E-03 2006.232.08:06:41.32/va/01,08,usb,yes,31,33 2006.232.08:06:41.32/va/02,07,usb,yes,31,33 2006.232.08:06:41.32/va/03,08,usb,yes,24,24 2006.232.08:06:41.32/va/04,07,usb,yes,33,35 2006.232.08:06:41.32/va/05,07,usb,yes,36,38 2006.232.08:06:41.32/va/06,06,usb,yes,35,35 2006.232.08:06:41.32/va/07,06,usb,yes,36,36 2006.232.08:06:41.32/va/08,06,usb,yes,39,38 2006.232.08:06:41.55/valo/01,532.99,yes,locked 2006.232.08:06:41.55/valo/02,572.99,yes,locked 2006.232.08:06:41.55/valo/03,672.99,yes,locked 2006.232.08:06:41.55/valo/04,832.99,yes,locked 2006.232.08:06:41.55/valo/05,652.99,yes,locked 2006.232.08:06:41.55/valo/06,772.99,yes,locked 2006.232.08:06:41.55/valo/07,832.99,yes,locked 2006.232.08:06:41.55/valo/08,852.99,yes,locked 2006.232.08:06:42.64/vb/01,04,usb,yes,31,29 2006.232.08:06:42.64/vb/02,04,usb,yes,33,34 2006.232.08:06:42.64/vb/03,04,usb,yes,29,33 2006.232.08:06:42.64/vb/04,04,usb,yes,30,30 2006.232.08:06:42.64/vb/05,03,usb,yes,35,40 2006.232.08:06:42.64/vb/06,04,usb,yes,29,32 2006.232.08:06:42.64/vb/07,04,usb,yes,31,31 2006.232.08:06:42.64/vb/08,04,usb,yes,29,32 2006.232.08:06:42.87/vblo/01,632.99,yes,locked 2006.232.08:06:42.87/vblo/02,640.99,yes,locked 2006.232.08:06:42.87/vblo/03,656.99,yes,locked 2006.232.08:06:42.87/vblo/04,712.99,yes,locked 2006.232.08:06:42.87/vblo/05,744.99,yes,locked 2006.232.08:06:42.87/vblo/06,752.99,yes,locked 2006.232.08:06:42.87/vblo/07,734.99,yes,locked 2006.232.08:06:42.87/vblo/08,744.99,yes,locked 2006.232.08:06:43.02/vabw/8 2006.232.08:06:43.17/vbbw/8 2006.232.08:06:43.26/xfe/off,on,13.5 2006.232.08:06:43.64/ifatt/23,28,28,28 2006.232.08:06:44.08/fmout-gps/S +4.49E-07 2006.232.08:06:44.12:!2006.232.08:07:50 2006.232.08:07:50.00:data_valid=off 2006.232.08:07:50.00:postob 2006.232.08:07:50.22/cable/+6.3902E-03 2006.232.08:07:50.22/wx/29.36,1007.3,87 2006.232.08:07:51.08/fmout-gps/S +4.48E-07 2006.232.08:07:51.08:scan_name=232-0809,k06232,60 2006.232.08:07:51.08:source=1357+769,135755.37,764321.1,2000.0,neutral 2006.232.08:07:52.13#flagr#flagr/antenna,new-source 2006.232.08:07:52.13:checkk5 2006.232.08:07:52.47/chk_autoobs//k5ts1/ autoobs is running! 2006.232.08:07:52.84/chk_autoobs//k5ts2/ autoobs is running! 2006.232.08:07:53.22/chk_autoobs//k5ts3/ autoobs is running! 2006.232.08:07:53.59/chk_autoobs//k5ts4/ autoobs is running! 2006.232.08:07:53.96/chk_obsdata//k5ts1/T2320806??a.dat file size is correct (nominal:560MB, actual:552MB). 2006.232.08:07:54.33/chk_obsdata//k5ts2/T2320806??b.dat file size is correct (nominal:560MB, actual:552MB). 2006.232.08:07:54.70/chk_obsdata//k5ts3/T2320806??c.dat file size is correct (nominal:560MB, actual:552MB). 2006.232.08:07:55.07/chk_obsdata//k5ts4/T2320806??d.dat file size is correct (nominal:560MB, actual:552MB). 2006.232.08:07:55.75/k5log//k5ts1_log_newline 2006.232.08:07:56.44/k5log//k5ts2_log_newline 2006.232.08:07:57.13/k5log//k5ts3_log_newline 2006.232.08:07:57.81/k5log//k5ts4_log_newline 2006.232.08:07:57.84/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.232.08:07:57.84:4f8m12a=2 2006.232.08:07:57.84$4f8m12a/echo=on 2006.232.08:07:57.84$4f8m12a/pcalon 2006.232.08:07:57.84$pcalon/"no phase cal control is implemented here 2006.232.08:07:57.84$4f8m12a/"tpicd=stop 2006.232.08:07:57.84$4f8m12a/vc4f8 2006.232.08:07:57.84$vc4f8/valo=1,532.99 2006.232.08:07:57.84#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.232.08:07:57.84#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.232.08:07:57.84#ibcon#ireg 17 cls_cnt 0 2006.232.08:07:57.84#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.232.08:07:57.84#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.232.08:07:57.84#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.232.08:07:57.84#ibcon#enter wrdev, iclass 13, count 0 2006.232.08:07:57.84#ibcon#first serial, iclass 13, count 0 2006.232.08:07:57.84#ibcon#enter sib2, iclass 13, count 0 2006.232.08:07:57.84#ibcon#flushed, iclass 13, count 0 2006.232.08:07:57.84#ibcon#about to write, iclass 13, count 0 2006.232.08:07:57.84#ibcon#wrote, iclass 13, count 0 2006.232.08:07:57.84#ibcon#about to read 3, iclass 13, count 0 2006.232.08:07:57.88#ibcon#read 3, iclass 13, count 0 2006.232.08:07:57.88#ibcon#about to read 4, iclass 13, count 0 2006.232.08:07:57.88#ibcon#read 4, iclass 13, count 0 2006.232.08:07:57.88#ibcon#about to read 5, iclass 13, count 0 2006.232.08:07:57.88#ibcon#read 5, iclass 13, count 0 2006.232.08:07:57.88#ibcon#about to read 6, iclass 13, count 0 2006.232.08:07:57.88#ibcon#read 6, iclass 13, count 0 2006.232.08:07:57.88#ibcon#end of sib2, iclass 13, count 0 2006.232.08:07:57.88#ibcon#*mode == 0, iclass 13, count 0 2006.232.08:07:57.88#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.232.08:07:57.88#ibcon#[26=FRQ=01,532.99\r\n] 2006.232.08:07:57.88#ibcon#*before write, iclass 13, count 0 2006.232.08:07:57.88#ibcon#enter sib2, iclass 13, count 0 2006.232.08:07:57.88#ibcon#flushed, iclass 13, count 0 2006.232.08:07:57.88#ibcon#about to write, iclass 13, count 0 2006.232.08:07:57.88#ibcon#wrote, iclass 13, count 0 2006.232.08:07:57.88#ibcon#about to read 3, iclass 13, count 0 2006.232.08:07:57.93#ibcon#read 3, iclass 13, count 0 2006.232.08:07:57.93#ibcon#about to read 4, iclass 13, count 0 2006.232.08:07:57.93#ibcon#read 4, iclass 13, count 0 2006.232.08:07:57.93#ibcon#about to read 5, iclass 13, count 0 2006.232.08:07:57.93#ibcon#read 5, iclass 13, count 0 2006.232.08:07:57.93#ibcon#about to read 6, iclass 13, count 0 2006.232.08:07:57.93#ibcon#read 6, iclass 13, count 0 2006.232.08:07:57.93#ibcon#end of sib2, iclass 13, count 0 2006.232.08:07:57.93#ibcon#*after write, iclass 13, count 0 2006.232.08:07:57.93#ibcon#*before return 0, iclass 13, count 0 2006.232.08:07:57.93#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.232.08:07:57.93#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.232.08:07:57.93#ibcon#about to clear, iclass 13 cls_cnt 0 2006.232.08:07:57.93#ibcon#cleared, iclass 13 cls_cnt 0 2006.232.08:07:57.93$vc4f8/va=1,8 2006.232.08:07:57.93#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.232.08:07:57.93#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.232.08:07:57.93#ibcon#ireg 11 cls_cnt 2 2006.232.08:07:57.93#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.232.08:07:57.93#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.232.08:07:57.93#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.232.08:07:57.93#ibcon#enter wrdev, iclass 15, count 2 2006.232.08:07:57.93#ibcon#first serial, iclass 15, count 2 2006.232.08:07:57.93#ibcon#enter sib2, iclass 15, count 2 2006.232.08:07:57.93#ibcon#flushed, iclass 15, count 2 2006.232.08:07:57.93#ibcon#about to write, iclass 15, count 2 2006.232.08:07:57.93#ibcon#wrote, iclass 15, count 2 2006.232.08:07:57.93#ibcon#about to read 3, iclass 15, count 2 2006.232.08:07:57.95#ibcon#read 3, iclass 15, count 2 2006.232.08:07:57.95#ibcon#about to read 4, iclass 15, count 2 2006.232.08:07:57.95#ibcon#read 4, iclass 15, count 2 2006.232.08:07:57.95#ibcon#about to read 5, iclass 15, count 2 2006.232.08:07:57.95#ibcon#read 5, iclass 15, count 2 2006.232.08:07:57.95#ibcon#about to read 6, iclass 15, count 2 2006.232.08:07:57.95#ibcon#read 6, iclass 15, count 2 2006.232.08:07:57.95#ibcon#end of sib2, iclass 15, count 2 2006.232.08:07:57.95#ibcon#*mode == 0, iclass 15, count 2 2006.232.08:07:57.95#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.232.08:07:57.95#ibcon#[25=AT01-08\r\n] 2006.232.08:07:57.95#ibcon#*before write, iclass 15, count 2 2006.232.08:07:57.95#ibcon#enter sib2, iclass 15, count 2 2006.232.08:07:57.95#ibcon#flushed, iclass 15, count 2 2006.232.08:07:57.95#ibcon#about to write, iclass 15, count 2 2006.232.08:07:57.95#ibcon#wrote, iclass 15, count 2 2006.232.08:07:57.95#ibcon#about to read 3, iclass 15, count 2 2006.232.08:07:57.98#ibcon#read 3, iclass 15, count 2 2006.232.08:07:57.98#ibcon#about to read 4, iclass 15, count 2 2006.232.08:07:57.98#ibcon#read 4, iclass 15, count 2 2006.232.08:07:57.98#ibcon#about to read 5, iclass 15, count 2 2006.232.08:07:57.98#ibcon#read 5, iclass 15, count 2 2006.232.08:07:57.98#ibcon#about to read 6, iclass 15, count 2 2006.232.08:07:57.98#ibcon#read 6, iclass 15, count 2 2006.232.08:07:57.98#ibcon#end of sib2, iclass 15, count 2 2006.232.08:07:57.98#ibcon#*after write, iclass 15, count 2 2006.232.08:07:57.98#ibcon#*before return 0, iclass 15, count 2 2006.232.08:07:57.98#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.232.08:07:57.98#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.232.08:07:57.98#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.232.08:07:57.98#ibcon#ireg 7 cls_cnt 0 2006.232.08:07:57.98#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.232.08:07:58.10#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.232.08:07:58.10#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.232.08:07:58.10#ibcon#enter wrdev, iclass 15, count 0 2006.232.08:07:58.10#ibcon#first serial, iclass 15, count 0 2006.232.08:07:58.10#ibcon#enter sib2, iclass 15, count 0 2006.232.08:07:58.10#ibcon#flushed, iclass 15, count 0 2006.232.08:07:58.10#ibcon#about to write, iclass 15, count 0 2006.232.08:07:58.10#ibcon#wrote, iclass 15, count 0 2006.232.08:07:58.10#ibcon#about to read 3, iclass 15, count 0 2006.232.08:07:58.12#ibcon#read 3, iclass 15, count 0 2006.232.08:07:58.12#ibcon#about to read 4, iclass 15, count 0 2006.232.08:07:58.12#ibcon#read 4, iclass 15, count 0 2006.232.08:07:58.12#ibcon#about to read 5, iclass 15, count 0 2006.232.08:07:58.12#ibcon#read 5, iclass 15, count 0 2006.232.08:07:58.12#ibcon#about to read 6, iclass 15, count 0 2006.232.08:07:58.12#ibcon#read 6, iclass 15, count 0 2006.232.08:07:58.12#ibcon#end of sib2, iclass 15, count 0 2006.232.08:07:58.12#ibcon#*mode == 0, iclass 15, count 0 2006.232.08:07:58.12#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.232.08:07:58.12#ibcon#[25=USB\r\n] 2006.232.08:07:58.12#ibcon#*before write, iclass 15, count 0 2006.232.08:07:58.12#ibcon#enter sib2, iclass 15, count 0 2006.232.08:07:58.12#ibcon#flushed, iclass 15, count 0 2006.232.08:07:58.12#ibcon#about to write, iclass 15, count 0 2006.232.08:07:58.12#ibcon#wrote, iclass 15, count 0 2006.232.08:07:58.12#ibcon#about to read 3, iclass 15, count 0 2006.232.08:07:58.15#ibcon#read 3, iclass 15, count 0 2006.232.08:07:58.15#ibcon#about to read 4, iclass 15, count 0 2006.232.08:07:58.15#ibcon#read 4, iclass 15, count 0 2006.232.08:07:58.15#ibcon#about to read 5, iclass 15, count 0 2006.232.08:07:58.15#ibcon#read 5, iclass 15, count 0 2006.232.08:07:58.15#ibcon#about to read 6, iclass 15, count 0 2006.232.08:07:58.15#ibcon#read 6, iclass 15, count 0 2006.232.08:07:58.15#ibcon#end of sib2, iclass 15, count 0 2006.232.08:07:58.15#ibcon#*after write, iclass 15, count 0 2006.232.08:07:58.15#ibcon#*before return 0, iclass 15, count 0 2006.232.08:07:58.15#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.232.08:07:58.15#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.232.08:07:58.15#ibcon#about to clear, iclass 15 cls_cnt 0 2006.232.08:07:58.15#ibcon#cleared, iclass 15 cls_cnt 0 2006.232.08:07:58.15$vc4f8/valo=2,572.99 2006.232.08:07:58.15#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.232.08:07:58.15#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.232.08:07:58.15#ibcon#ireg 17 cls_cnt 0 2006.232.08:07:58.15#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.232.08:07:58.15#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.232.08:07:58.15#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.232.08:07:58.15#ibcon#enter wrdev, iclass 17, count 0 2006.232.08:07:58.15#ibcon#first serial, iclass 17, count 0 2006.232.08:07:58.15#ibcon#enter sib2, iclass 17, count 0 2006.232.08:07:58.15#ibcon#flushed, iclass 17, count 0 2006.232.08:07:58.15#ibcon#about to write, iclass 17, count 0 2006.232.08:07:58.15#ibcon#wrote, iclass 17, count 0 2006.232.08:07:58.15#ibcon#about to read 3, iclass 17, count 0 2006.232.08:07:58.17#ibcon#read 3, iclass 17, count 0 2006.232.08:07:58.17#ibcon#about to read 4, iclass 17, count 0 2006.232.08:07:58.17#ibcon#read 4, iclass 17, count 0 2006.232.08:07:58.17#ibcon#about to read 5, iclass 17, count 0 2006.232.08:07:58.17#ibcon#read 5, iclass 17, count 0 2006.232.08:07:58.17#ibcon#about to read 6, iclass 17, count 0 2006.232.08:07:58.17#ibcon#read 6, iclass 17, count 0 2006.232.08:07:58.17#ibcon#end of sib2, iclass 17, count 0 2006.232.08:07:58.17#ibcon#*mode == 0, iclass 17, count 0 2006.232.08:07:58.17#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.232.08:07:58.17#ibcon#[26=FRQ=02,572.99\r\n] 2006.232.08:07:58.17#ibcon#*before write, iclass 17, count 0 2006.232.08:07:58.17#ibcon#enter sib2, iclass 17, count 0 2006.232.08:07:58.17#ibcon#flushed, iclass 17, count 0 2006.232.08:07:58.17#ibcon#about to write, iclass 17, count 0 2006.232.08:07:58.17#ibcon#wrote, iclass 17, count 0 2006.232.08:07:58.17#ibcon#about to read 3, iclass 17, count 0 2006.232.08:07:58.21#ibcon#read 3, iclass 17, count 0 2006.232.08:07:58.21#ibcon#about to read 4, iclass 17, count 0 2006.232.08:07:58.21#ibcon#read 4, iclass 17, count 0 2006.232.08:07:58.21#ibcon#about to read 5, iclass 17, count 0 2006.232.08:07:58.21#ibcon#read 5, iclass 17, count 0 2006.232.08:07:58.21#ibcon#about to read 6, iclass 17, count 0 2006.232.08:07:58.21#ibcon#read 6, iclass 17, count 0 2006.232.08:07:58.21#ibcon#end of sib2, iclass 17, count 0 2006.232.08:07:58.21#ibcon#*after write, iclass 17, count 0 2006.232.08:07:58.21#ibcon#*before return 0, iclass 17, count 0 2006.232.08:07:58.21#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.232.08:07:58.21#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.232.08:07:58.21#ibcon#about to clear, iclass 17 cls_cnt 0 2006.232.08:07:58.21#ibcon#cleared, iclass 17 cls_cnt 0 2006.232.08:07:58.21$vc4f8/va=2,7 2006.232.08:07:58.21#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.232.08:07:58.21#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.232.08:07:58.21#ibcon#ireg 11 cls_cnt 2 2006.232.08:07:58.21#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.232.08:07:58.27#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.232.08:07:58.27#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.232.08:07:58.27#ibcon#enter wrdev, iclass 19, count 2 2006.232.08:07:58.27#ibcon#first serial, iclass 19, count 2 2006.232.08:07:58.27#ibcon#enter sib2, iclass 19, count 2 2006.232.08:07:58.27#ibcon#flushed, iclass 19, count 2 2006.232.08:07:58.27#ibcon#about to write, iclass 19, count 2 2006.232.08:07:58.27#ibcon#wrote, iclass 19, count 2 2006.232.08:07:58.27#ibcon#about to read 3, iclass 19, count 2 2006.232.08:07:58.29#ibcon#read 3, iclass 19, count 2 2006.232.08:07:58.29#ibcon#about to read 4, iclass 19, count 2 2006.232.08:07:58.29#ibcon#read 4, iclass 19, count 2 2006.232.08:07:58.29#ibcon#about to read 5, iclass 19, count 2 2006.232.08:07:58.29#ibcon#read 5, iclass 19, count 2 2006.232.08:07:58.29#ibcon#about to read 6, iclass 19, count 2 2006.232.08:07:58.29#ibcon#read 6, iclass 19, count 2 2006.232.08:07:58.29#ibcon#end of sib2, iclass 19, count 2 2006.232.08:07:58.29#ibcon#*mode == 0, iclass 19, count 2 2006.232.08:07:58.29#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.232.08:07:58.29#ibcon#[25=AT02-07\r\n] 2006.232.08:07:58.29#ibcon#*before write, iclass 19, count 2 2006.232.08:07:58.29#ibcon#enter sib2, iclass 19, count 2 2006.232.08:07:58.29#ibcon#flushed, iclass 19, count 2 2006.232.08:07:58.29#ibcon#about to write, iclass 19, count 2 2006.232.08:07:58.29#ibcon#wrote, iclass 19, count 2 2006.232.08:07:58.29#ibcon#about to read 3, iclass 19, count 2 2006.232.08:07:58.32#ibcon#read 3, iclass 19, count 2 2006.232.08:07:58.32#ibcon#about to read 4, iclass 19, count 2 2006.232.08:07:58.32#ibcon#read 4, iclass 19, count 2 2006.232.08:07:58.32#ibcon#about to read 5, iclass 19, count 2 2006.232.08:07:58.32#ibcon#read 5, iclass 19, count 2 2006.232.08:07:58.32#ibcon#about to read 6, iclass 19, count 2 2006.232.08:07:58.32#ibcon#read 6, iclass 19, count 2 2006.232.08:07:58.32#ibcon#end of sib2, iclass 19, count 2 2006.232.08:07:58.32#ibcon#*after write, iclass 19, count 2 2006.232.08:07:58.32#ibcon#*before return 0, iclass 19, count 2 2006.232.08:07:58.32#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.232.08:07:58.32#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.232.08:07:58.32#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.232.08:07:58.32#ibcon#ireg 7 cls_cnt 0 2006.232.08:07:58.32#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.232.08:07:58.44#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.232.08:07:58.44#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.232.08:07:58.44#ibcon#enter wrdev, iclass 19, count 0 2006.232.08:07:58.44#ibcon#first serial, iclass 19, count 0 2006.232.08:07:58.44#ibcon#enter sib2, iclass 19, count 0 2006.232.08:07:58.44#ibcon#flushed, iclass 19, count 0 2006.232.08:07:58.44#ibcon#about to write, iclass 19, count 0 2006.232.08:07:58.44#ibcon#wrote, iclass 19, count 0 2006.232.08:07:58.44#ibcon#about to read 3, iclass 19, count 0 2006.232.08:07:58.46#ibcon#read 3, iclass 19, count 0 2006.232.08:07:58.46#ibcon#about to read 4, iclass 19, count 0 2006.232.08:07:58.46#ibcon#read 4, iclass 19, count 0 2006.232.08:07:58.46#ibcon#about to read 5, iclass 19, count 0 2006.232.08:07:58.46#ibcon#read 5, iclass 19, count 0 2006.232.08:07:58.46#ibcon#about to read 6, iclass 19, count 0 2006.232.08:07:58.46#ibcon#read 6, iclass 19, count 0 2006.232.08:07:58.46#ibcon#end of sib2, iclass 19, count 0 2006.232.08:07:58.46#ibcon#*mode == 0, iclass 19, count 0 2006.232.08:07:58.46#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.232.08:07:58.46#ibcon#[25=USB\r\n] 2006.232.08:07:58.46#ibcon#*before write, iclass 19, count 0 2006.232.08:07:58.46#ibcon#enter sib2, iclass 19, count 0 2006.232.08:07:58.46#ibcon#flushed, iclass 19, count 0 2006.232.08:07:58.46#ibcon#about to write, iclass 19, count 0 2006.232.08:07:58.46#ibcon#wrote, iclass 19, count 0 2006.232.08:07:58.46#ibcon#about to read 3, iclass 19, count 0 2006.232.08:07:58.49#ibcon#read 3, iclass 19, count 0 2006.232.08:07:58.49#ibcon#about to read 4, iclass 19, count 0 2006.232.08:07:58.49#ibcon#read 4, iclass 19, count 0 2006.232.08:07:58.49#ibcon#about to read 5, iclass 19, count 0 2006.232.08:07:58.49#ibcon#read 5, iclass 19, count 0 2006.232.08:07:58.49#ibcon#about to read 6, iclass 19, count 0 2006.232.08:07:58.49#ibcon#read 6, iclass 19, count 0 2006.232.08:07:58.49#ibcon#end of sib2, iclass 19, count 0 2006.232.08:07:58.49#ibcon#*after write, iclass 19, count 0 2006.232.08:07:58.49#ibcon#*before return 0, iclass 19, count 0 2006.232.08:07:58.49#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.232.08:07:58.49#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.232.08:07:58.49#ibcon#about to clear, iclass 19 cls_cnt 0 2006.232.08:07:58.49#ibcon#cleared, iclass 19 cls_cnt 0 2006.232.08:07:58.49$vc4f8/valo=3,672.99 2006.232.08:07:58.49#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.232.08:07:58.49#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.232.08:07:58.49#ibcon#ireg 17 cls_cnt 0 2006.232.08:07:58.49#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.232.08:07:58.49#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.232.08:07:58.49#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.232.08:07:58.49#ibcon#enter wrdev, iclass 21, count 0 2006.232.08:07:58.49#ibcon#first serial, iclass 21, count 0 2006.232.08:07:58.49#ibcon#enter sib2, iclass 21, count 0 2006.232.08:07:58.49#ibcon#flushed, iclass 21, count 0 2006.232.08:07:58.49#ibcon#about to write, iclass 21, count 0 2006.232.08:07:58.49#ibcon#wrote, iclass 21, count 0 2006.232.08:07:58.49#ibcon#about to read 3, iclass 21, count 0 2006.232.08:07:58.51#ibcon#read 3, iclass 21, count 0 2006.232.08:07:58.51#ibcon#about to read 4, iclass 21, count 0 2006.232.08:07:58.51#ibcon#read 4, iclass 21, count 0 2006.232.08:07:58.51#ibcon#about to read 5, iclass 21, count 0 2006.232.08:07:58.51#ibcon#read 5, iclass 21, count 0 2006.232.08:07:58.51#ibcon#about to read 6, iclass 21, count 0 2006.232.08:07:58.51#ibcon#read 6, iclass 21, count 0 2006.232.08:07:58.51#ibcon#end of sib2, iclass 21, count 0 2006.232.08:07:58.51#ibcon#*mode == 0, iclass 21, count 0 2006.232.08:07:58.51#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.232.08:07:58.51#ibcon#[26=FRQ=03,672.99\r\n] 2006.232.08:07:58.51#ibcon#*before write, iclass 21, count 0 2006.232.08:07:58.51#ibcon#enter sib2, iclass 21, count 0 2006.232.08:07:58.51#ibcon#flushed, iclass 21, count 0 2006.232.08:07:58.51#ibcon#about to write, iclass 21, count 0 2006.232.08:07:58.51#ibcon#wrote, iclass 21, count 0 2006.232.08:07:58.51#ibcon#about to read 3, iclass 21, count 0 2006.232.08:07:58.55#ibcon#read 3, iclass 21, count 0 2006.232.08:07:58.55#ibcon#about to read 4, iclass 21, count 0 2006.232.08:07:58.55#ibcon#read 4, iclass 21, count 0 2006.232.08:07:58.55#ibcon#about to read 5, iclass 21, count 0 2006.232.08:07:58.55#ibcon#read 5, iclass 21, count 0 2006.232.08:07:58.55#ibcon#about to read 6, iclass 21, count 0 2006.232.08:07:58.55#ibcon#read 6, iclass 21, count 0 2006.232.08:07:58.55#ibcon#end of sib2, iclass 21, count 0 2006.232.08:07:58.55#ibcon#*after write, iclass 21, count 0 2006.232.08:07:58.55#ibcon#*before return 0, iclass 21, count 0 2006.232.08:07:58.55#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.232.08:07:58.55#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.232.08:07:58.55#ibcon#about to clear, iclass 21 cls_cnt 0 2006.232.08:07:58.55#ibcon#cleared, iclass 21 cls_cnt 0 2006.232.08:07:58.55$vc4f8/va=3,8 2006.232.08:07:58.55#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.232.08:07:58.55#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.232.08:07:58.55#ibcon#ireg 11 cls_cnt 2 2006.232.08:07:58.55#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.232.08:07:58.61#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.232.08:07:58.61#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.232.08:07:58.61#ibcon#enter wrdev, iclass 23, count 2 2006.232.08:07:58.61#ibcon#first serial, iclass 23, count 2 2006.232.08:07:58.61#ibcon#enter sib2, iclass 23, count 2 2006.232.08:07:58.61#ibcon#flushed, iclass 23, count 2 2006.232.08:07:58.61#ibcon#about to write, iclass 23, count 2 2006.232.08:07:58.61#ibcon#wrote, iclass 23, count 2 2006.232.08:07:58.61#ibcon#about to read 3, iclass 23, count 2 2006.232.08:07:58.63#ibcon#read 3, iclass 23, count 2 2006.232.08:07:58.63#ibcon#about to read 4, iclass 23, count 2 2006.232.08:07:58.63#ibcon#read 4, iclass 23, count 2 2006.232.08:07:58.63#ibcon#about to read 5, iclass 23, count 2 2006.232.08:07:58.63#ibcon#read 5, iclass 23, count 2 2006.232.08:07:58.63#ibcon#about to read 6, iclass 23, count 2 2006.232.08:07:58.63#ibcon#read 6, iclass 23, count 2 2006.232.08:07:58.63#ibcon#end of sib2, iclass 23, count 2 2006.232.08:07:58.63#ibcon#*mode == 0, iclass 23, count 2 2006.232.08:07:58.63#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.232.08:07:58.63#ibcon#[25=AT03-08\r\n] 2006.232.08:07:58.63#ibcon#*before write, iclass 23, count 2 2006.232.08:07:58.63#ibcon#enter sib2, iclass 23, count 2 2006.232.08:07:58.63#ibcon#flushed, iclass 23, count 2 2006.232.08:07:58.63#ibcon#about to write, iclass 23, count 2 2006.232.08:07:58.63#ibcon#wrote, iclass 23, count 2 2006.232.08:07:58.63#ibcon#about to read 3, iclass 23, count 2 2006.232.08:07:58.66#ibcon#read 3, iclass 23, count 2 2006.232.08:07:58.66#ibcon#about to read 4, iclass 23, count 2 2006.232.08:07:58.66#ibcon#read 4, iclass 23, count 2 2006.232.08:07:58.66#ibcon#about to read 5, iclass 23, count 2 2006.232.08:07:58.66#ibcon#read 5, iclass 23, count 2 2006.232.08:07:58.66#ibcon#about to read 6, iclass 23, count 2 2006.232.08:07:58.66#ibcon#read 6, iclass 23, count 2 2006.232.08:07:58.66#ibcon#end of sib2, iclass 23, count 2 2006.232.08:07:58.66#ibcon#*after write, iclass 23, count 2 2006.232.08:07:58.66#ibcon#*before return 0, iclass 23, count 2 2006.232.08:07:58.66#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.232.08:07:58.66#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.232.08:07:58.66#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.232.08:07:58.66#ibcon#ireg 7 cls_cnt 0 2006.232.08:07:58.66#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.232.08:07:58.78#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.232.08:07:58.78#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.232.08:07:58.78#ibcon#enter wrdev, iclass 23, count 0 2006.232.08:07:58.78#ibcon#first serial, iclass 23, count 0 2006.232.08:07:58.78#ibcon#enter sib2, iclass 23, count 0 2006.232.08:07:58.78#ibcon#flushed, iclass 23, count 0 2006.232.08:07:58.78#ibcon#about to write, iclass 23, count 0 2006.232.08:07:58.78#ibcon#wrote, iclass 23, count 0 2006.232.08:07:58.78#ibcon#about to read 3, iclass 23, count 0 2006.232.08:07:58.80#ibcon#read 3, iclass 23, count 0 2006.232.08:07:58.80#ibcon#about to read 4, iclass 23, count 0 2006.232.08:07:58.80#ibcon#read 4, iclass 23, count 0 2006.232.08:07:58.80#ibcon#about to read 5, iclass 23, count 0 2006.232.08:07:58.80#ibcon#read 5, iclass 23, count 0 2006.232.08:07:58.80#ibcon#about to read 6, iclass 23, count 0 2006.232.08:07:58.80#ibcon#read 6, iclass 23, count 0 2006.232.08:07:58.80#ibcon#end of sib2, iclass 23, count 0 2006.232.08:07:58.80#ibcon#*mode == 0, iclass 23, count 0 2006.232.08:07:58.80#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.232.08:07:58.80#ibcon#[25=USB\r\n] 2006.232.08:07:58.80#ibcon#*before write, iclass 23, count 0 2006.232.08:07:58.80#ibcon#enter sib2, iclass 23, count 0 2006.232.08:07:58.80#ibcon#flushed, iclass 23, count 0 2006.232.08:07:58.80#ibcon#about to write, iclass 23, count 0 2006.232.08:07:58.80#ibcon#wrote, iclass 23, count 0 2006.232.08:07:58.80#ibcon#about to read 3, iclass 23, count 0 2006.232.08:07:58.83#ibcon#read 3, iclass 23, count 0 2006.232.08:07:58.83#ibcon#about to read 4, iclass 23, count 0 2006.232.08:07:58.83#ibcon#read 4, iclass 23, count 0 2006.232.08:07:58.83#ibcon#about to read 5, iclass 23, count 0 2006.232.08:07:58.83#ibcon#read 5, iclass 23, count 0 2006.232.08:07:58.83#ibcon#about to read 6, iclass 23, count 0 2006.232.08:07:58.83#ibcon#read 6, iclass 23, count 0 2006.232.08:07:58.83#ibcon#end of sib2, iclass 23, count 0 2006.232.08:07:58.83#ibcon#*after write, iclass 23, count 0 2006.232.08:07:58.83#ibcon#*before return 0, iclass 23, count 0 2006.232.08:07:58.83#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.232.08:07:58.83#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.232.08:07:58.83#ibcon#about to clear, iclass 23 cls_cnt 0 2006.232.08:07:58.83#ibcon#cleared, iclass 23 cls_cnt 0 2006.232.08:07:58.83$vc4f8/valo=4,832.99 2006.232.08:07:58.83#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.232.08:07:58.83#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.232.08:07:58.83#ibcon#ireg 17 cls_cnt 0 2006.232.08:07:58.83#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:07:58.83#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:07:58.83#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:07:58.83#ibcon#enter wrdev, iclass 25, count 0 2006.232.08:07:58.83#ibcon#first serial, iclass 25, count 0 2006.232.08:07:58.83#ibcon#enter sib2, iclass 25, count 0 2006.232.08:07:58.83#ibcon#flushed, iclass 25, count 0 2006.232.08:07:58.83#ibcon#about to write, iclass 25, count 0 2006.232.08:07:58.83#ibcon#wrote, iclass 25, count 0 2006.232.08:07:58.83#ibcon#about to read 3, iclass 25, count 0 2006.232.08:07:58.85#ibcon#read 3, iclass 25, count 0 2006.232.08:07:58.85#ibcon#about to read 4, iclass 25, count 0 2006.232.08:07:58.85#ibcon#read 4, iclass 25, count 0 2006.232.08:07:58.85#ibcon#about to read 5, iclass 25, count 0 2006.232.08:07:58.85#ibcon#read 5, iclass 25, count 0 2006.232.08:07:58.85#ibcon#about to read 6, iclass 25, count 0 2006.232.08:07:58.85#ibcon#read 6, iclass 25, count 0 2006.232.08:07:58.85#ibcon#end of sib2, iclass 25, count 0 2006.232.08:07:58.85#ibcon#*mode == 0, iclass 25, count 0 2006.232.08:07:58.85#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.232.08:07:58.85#ibcon#[26=FRQ=04,832.99\r\n] 2006.232.08:07:58.85#ibcon#*before write, iclass 25, count 0 2006.232.08:07:58.85#ibcon#enter sib2, iclass 25, count 0 2006.232.08:07:58.85#ibcon#flushed, iclass 25, count 0 2006.232.08:07:58.85#ibcon#about to write, iclass 25, count 0 2006.232.08:07:58.85#ibcon#wrote, iclass 25, count 0 2006.232.08:07:58.85#ibcon#about to read 3, iclass 25, count 0 2006.232.08:07:58.89#ibcon#read 3, iclass 25, count 0 2006.232.08:07:58.89#ibcon#about to read 4, iclass 25, count 0 2006.232.08:07:58.89#ibcon#read 4, iclass 25, count 0 2006.232.08:07:58.89#ibcon#about to read 5, iclass 25, count 0 2006.232.08:07:58.89#ibcon#read 5, iclass 25, count 0 2006.232.08:07:58.89#ibcon#about to read 6, iclass 25, count 0 2006.232.08:07:58.89#ibcon#read 6, iclass 25, count 0 2006.232.08:07:58.89#ibcon#end of sib2, iclass 25, count 0 2006.232.08:07:58.89#ibcon#*after write, iclass 25, count 0 2006.232.08:07:58.89#ibcon#*before return 0, iclass 25, count 0 2006.232.08:07:58.89#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:07:58.89#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:07:58.89#ibcon#about to clear, iclass 25 cls_cnt 0 2006.232.08:07:58.89#ibcon#cleared, iclass 25 cls_cnt 0 2006.232.08:07:58.89$vc4f8/va=4,7 2006.232.08:07:58.89#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.232.08:07:58.89#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.232.08:07:58.89#ibcon#ireg 11 cls_cnt 2 2006.232.08:07:58.89#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:07:58.95#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:07:58.95#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:07:58.95#ibcon#enter wrdev, iclass 27, count 2 2006.232.08:07:58.95#ibcon#first serial, iclass 27, count 2 2006.232.08:07:58.95#ibcon#enter sib2, iclass 27, count 2 2006.232.08:07:58.95#ibcon#flushed, iclass 27, count 2 2006.232.08:07:58.95#ibcon#about to write, iclass 27, count 2 2006.232.08:07:58.95#ibcon#wrote, iclass 27, count 2 2006.232.08:07:58.95#ibcon#about to read 3, iclass 27, count 2 2006.232.08:07:58.97#ibcon#read 3, iclass 27, count 2 2006.232.08:07:58.97#ibcon#about to read 4, iclass 27, count 2 2006.232.08:07:58.97#ibcon#read 4, iclass 27, count 2 2006.232.08:07:58.97#ibcon#about to read 5, iclass 27, count 2 2006.232.08:07:58.97#ibcon#read 5, iclass 27, count 2 2006.232.08:07:58.97#ibcon#about to read 6, iclass 27, count 2 2006.232.08:07:58.97#ibcon#read 6, iclass 27, count 2 2006.232.08:07:58.97#ibcon#end of sib2, iclass 27, count 2 2006.232.08:07:58.97#ibcon#*mode == 0, iclass 27, count 2 2006.232.08:07:58.97#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.232.08:07:58.97#ibcon#[25=AT04-07\r\n] 2006.232.08:07:58.97#ibcon#*before write, iclass 27, count 2 2006.232.08:07:58.97#ibcon#enter sib2, iclass 27, count 2 2006.232.08:07:58.97#ibcon#flushed, iclass 27, count 2 2006.232.08:07:58.97#ibcon#about to write, iclass 27, count 2 2006.232.08:07:58.97#ibcon#wrote, iclass 27, count 2 2006.232.08:07:58.97#ibcon#about to read 3, iclass 27, count 2 2006.232.08:07:59.00#ibcon#read 3, iclass 27, count 2 2006.232.08:07:59.00#ibcon#about to read 4, iclass 27, count 2 2006.232.08:07:59.00#ibcon#read 4, iclass 27, count 2 2006.232.08:07:59.00#ibcon#about to read 5, iclass 27, count 2 2006.232.08:07:59.00#ibcon#read 5, iclass 27, count 2 2006.232.08:07:59.00#ibcon#about to read 6, iclass 27, count 2 2006.232.08:07:59.00#ibcon#read 6, iclass 27, count 2 2006.232.08:07:59.00#ibcon#end of sib2, iclass 27, count 2 2006.232.08:07:59.00#ibcon#*after write, iclass 27, count 2 2006.232.08:07:59.00#ibcon#*before return 0, iclass 27, count 2 2006.232.08:07:59.00#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:07:59.00#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:07:59.00#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.232.08:07:59.00#ibcon#ireg 7 cls_cnt 0 2006.232.08:07:59.00#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:07:59.12#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:07:59.12#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:07:59.12#ibcon#enter wrdev, iclass 27, count 0 2006.232.08:07:59.12#ibcon#first serial, iclass 27, count 0 2006.232.08:07:59.12#ibcon#enter sib2, iclass 27, count 0 2006.232.08:07:59.12#ibcon#flushed, iclass 27, count 0 2006.232.08:07:59.12#ibcon#about to write, iclass 27, count 0 2006.232.08:07:59.12#ibcon#wrote, iclass 27, count 0 2006.232.08:07:59.12#ibcon#about to read 3, iclass 27, count 0 2006.232.08:07:59.14#ibcon#read 3, iclass 27, count 0 2006.232.08:07:59.14#ibcon#about to read 4, iclass 27, count 0 2006.232.08:07:59.14#ibcon#read 4, iclass 27, count 0 2006.232.08:07:59.14#ibcon#about to read 5, iclass 27, count 0 2006.232.08:07:59.14#ibcon#read 5, iclass 27, count 0 2006.232.08:07:59.14#ibcon#about to read 6, iclass 27, count 0 2006.232.08:07:59.14#ibcon#read 6, iclass 27, count 0 2006.232.08:07:59.14#ibcon#end of sib2, iclass 27, count 0 2006.232.08:07:59.14#ibcon#*mode == 0, iclass 27, count 0 2006.232.08:07:59.14#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.232.08:07:59.14#ibcon#[25=USB\r\n] 2006.232.08:07:59.14#ibcon#*before write, iclass 27, count 0 2006.232.08:07:59.14#ibcon#enter sib2, iclass 27, count 0 2006.232.08:07:59.14#ibcon#flushed, iclass 27, count 0 2006.232.08:07:59.14#ibcon#about to write, iclass 27, count 0 2006.232.08:07:59.14#ibcon#wrote, iclass 27, count 0 2006.232.08:07:59.14#ibcon#about to read 3, iclass 27, count 0 2006.232.08:07:59.17#ibcon#read 3, iclass 27, count 0 2006.232.08:07:59.17#ibcon#about to read 4, iclass 27, count 0 2006.232.08:07:59.17#ibcon#read 4, iclass 27, count 0 2006.232.08:07:59.17#ibcon#about to read 5, iclass 27, count 0 2006.232.08:07:59.17#ibcon#read 5, iclass 27, count 0 2006.232.08:07:59.17#ibcon#about to read 6, iclass 27, count 0 2006.232.08:07:59.17#ibcon#read 6, iclass 27, count 0 2006.232.08:07:59.17#ibcon#end of sib2, iclass 27, count 0 2006.232.08:07:59.17#ibcon#*after write, iclass 27, count 0 2006.232.08:07:59.17#ibcon#*before return 0, iclass 27, count 0 2006.232.08:07:59.17#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:07:59.17#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:07:59.17#ibcon#about to clear, iclass 27 cls_cnt 0 2006.232.08:07:59.17#ibcon#cleared, iclass 27 cls_cnt 0 2006.232.08:07:59.17$vc4f8/valo=5,652.99 2006.232.08:07:59.17#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.232.08:07:59.17#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.232.08:07:59.17#ibcon#ireg 17 cls_cnt 0 2006.232.08:07:59.17#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:07:59.17#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:07:59.17#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:07:59.17#ibcon#enter wrdev, iclass 29, count 0 2006.232.08:07:59.17#ibcon#first serial, iclass 29, count 0 2006.232.08:07:59.17#ibcon#enter sib2, iclass 29, count 0 2006.232.08:07:59.17#ibcon#flushed, iclass 29, count 0 2006.232.08:07:59.17#ibcon#about to write, iclass 29, count 0 2006.232.08:07:59.17#ibcon#wrote, iclass 29, count 0 2006.232.08:07:59.17#ibcon#about to read 3, iclass 29, count 0 2006.232.08:07:59.19#ibcon#read 3, iclass 29, count 0 2006.232.08:07:59.19#ibcon#about to read 4, iclass 29, count 0 2006.232.08:07:59.19#ibcon#read 4, iclass 29, count 0 2006.232.08:07:59.19#ibcon#about to read 5, iclass 29, count 0 2006.232.08:07:59.19#ibcon#read 5, iclass 29, count 0 2006.232.08:07:59.19#ibcon#about to read 6, iclass 29, count 0 2006.232.08:07:59.19#ibcon#read 6, iclass 29, count 0 2006.232.08:07:59.19#ibcon#end of sib2, iclass 29, count 0 2006.232.08:07:59.19#ibcon#*mode == 0, iclass 29, count 0 2006.232.08:07:59.19#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.232.08:07:59.19#ibcon#[26=FRQ=05,652.99\r\n] 2006.232.08:07:59.19#ibcon#*before write, iclass 29, count 0 2006.232.08:07:59.19#ibcon#enter sib2, iclass 29, count 0 2006.232.08:07:59.19#ibcon#flushed, iclass 29, count 0 2006.232.08:07:59.19#ibcon#about to write, iclass 29, count 0 2006.232.08:07:59.19#ibcon#wrote, iclass 29, count 0 2006.232.08:07:59.19#ibcon#about to read 3, iclass 29, count 0 2006.232.08:07:59.23#ibcon#read 3, iclass 29, count 0 2006.232.08:07:59.23#ibcon#about to read 4, iclass 29, count 0 2006.232.08:07:59.23#ibcon#read 4, iclass 29, count 0 2006.232.08:07:59.23#ibcon#about to read 5, iclass 29, count 0 2006.232.08:07:59.23#ibcon#read 5, iclass 29, count 0 2006.232.08:07:59.23#ibcon#about to read 6, iclass 29, count 0 2006.232.08:07:59.23#ibcon#read 6, iclass 29, count 0 2006.232.08:07:59.23#ibcon#end of sib2, iclass 29, count 0 2006.232.08:07:59.23#ibcon#*after write, iclass 29, count 0 2006.232.08:07:59.23#ibcon#*before return 0, iclass 29, count 0 2006.232.08:07:59.23#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:07:59.23#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:07:59.23#ibcon#about to clear, iclass 29 cls_cnt 0 2006.232.08:07:59.23#ibcon#cleared, iclass 29 cls_cnt 0 2006.232.08:07:59.23$vc4f8/va=5,7 2006.232.08:07:59.23#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.232.08:07:59.23#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.232.08:07:59.23#ibcon#ireg 11 cls_cnt 2 2006.232.08:07:59.23#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.232.08:07:59.29#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.232.08:07:59.29#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.232.08:07:59.29#ibcon#enter wrdev, iclass 31, count 2 2006.232.08:07:59.29#ibcon#first serial, iclass 31, count 2 2006.232.08:07:59.29#ibcon#enter sib2, iclass 31, count 2 2006.232.08:07:59.29#ibcon#flushed, iclass 31, count 2 2006.232.08:07:59.29#ibcon#about to write, iclass 31, count 2 2006.232.08:07:59.29#ibcon#wrote, iclass 31, count 2 2006.232.08:07:59.29#ibcon#about to read 3, iclass 31, count 2 2006.232.08:07:59.31#ibcon#read 3, iclass 31, count 2 2006.232.08:07:59.31#ibcon#about to read 4, iclass 31, count 2 2006.232.08:07:59.31#ibcon#read 4, iclass 31, count 2 2006.232.08:07:59.31#ibcon#about to read 5, iclass 31, count 2 2006.232.08:07:59.31#ibcon#read 5, iclass 31, count 2 2006.232.08:07:59.31#ibcon#about to read 6, iclass 31, count 2 2006.232.08:07:59.31#ibcon#read 6, iclass 31, count 2 2006.232.08:07:59.31#ibcon#end of sib2, iclass 31, count 2 2006.232.08:07:59.31#ibcon#*mode == 0, iclass 31, count 2 2006.232.08:07:59.31#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.232.08:07:59.31#ibcon#[25=AT05-07\r\n] 2006.232.08:07:59.31#ibcon#*before write, iclass 31, count 2 2006.232.08:07:59.31#ibcon#enter sib2, iclass 31, count 2 2006.232.08:07:59.31#ibcon#flushed, iclass 31, count 2 2006.232.08:07:59.31#ibcon#about to write, iclass 31, count 2 2006.232.08:07:59.31#ibcon#wrote, iclass 31, count 2 2006.232.08:07:59.31#ibcon#about to read 3, iclass 31, count 2 2006.232.08:07:59.34#ibcon#read 3, iclass 31, count 2 2006.232.08:07:59.34#ibcon#about to read 4, iclass 31, count 2 2006.232.08:07:59.34#ibcon#read 4, iclass 31, count 2 2006.232.08:07:59.34#ibcon#about to read 5, iclass 31, count 2 2006.232.08:07:59.34#ibcon#read 5, iclass 31, count 2 2006.232.08:07:59.34#ibcon#about to read 6, iclass 31, count 2 2006.232.08:07:59.34#ibcon#read 6, iclass 31, count 2 2006.232.08:07:59.34#ibcon#end of sib2, iclass 31, count 2 2006.232.08:07:59.34#ibcon#*after write, iclass 31, count 2 2006.232.08:07:59.34#ibcon#*before return 0, iclass 31, count 2 2006.232.08:07:59.34#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.232.08:07:59.34#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.232.08:07:59.34#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.232.08:07:59.34#ibcon#ireg 7 cls_cnt 0 2006.232.08:07:59.34#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.232.08:07:59.46#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.232.08:07:59.46#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.232.08:07:59.46#ibcon#enter wrdev, iclass 31, count 0 2006.232.08:07:59.46#ibcon#first serial, iclass 31, count 0 2006.232.08:07:59.46#ibcon#enter sib2, iclass 31, count 0 2006.232.08:07:59.46#ibcon#flushed, iclass 31, count 0 2006.232.08:07:59.46#ibcon#about to write, iclass 31, count 0 2006.232.08:07:59.46#ibcon#wrote, iclass 31, count 0 2006.232.08:07:59.46#ibcon#about to read 3, iclass 31, count 0 2006.232.08:07:59.48#ibcon#read 3, iclass 31, count 0 2006.232.08:07:59.48#ibcon#about to read 4, iclass 31, count 0 2006.232.08:07:59.48#ibcon#read 4, iclass 31, count 0 2006.232.08:07:59.48#ibcon#about to read 5, iclass 31, count 0 2006.232.08:07:59.48#ibcon#read 5, iclass 31, count 0 2006.232.08:07:59.48#ibcon#about to read 6, iclass 31, count 0 2006.232.08:07:59.48#ibcon#read 6, iclass 31, count 0 2006.232.08:07:59.48#ibcon#end of sib2, iclass 31, count 0 2006.232.08:07:59.48#ibcon#*mode == 0, iclass 31, count 0 2006.232.08:07:59.48#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.232.08:07:59.48#ibcon#[25=USB\r\n] 2006.232.08:07:59.48#ibcon#*before write, iclass 31, count 0 2006.232.08:07:59.48#ibcon#enter sib2, iclass 31, count 0 2006.232.08:07:59.48#ibcon#flushed, iclass 31, count 0 2006.232.08:07:59.48#ibcon#about to write, iclass 31, count 0 2006.232.08:07:59.48#ibcon#wrote, iclass 31, count 0 2006.232.08:07:59.48#ibcon#about to read 3, iclass 31, count 0 2006.232.08:07:59.51#ibcon#read 3, iclass 31, count 0 2006.232.08:07:59.51#ibcon#about to read 4, iclass 31, count 0 2006.232.08:07:59.51#ibcon#read 4, iclass 31, count 0 2006.232.08:07:59.51#ibcon#about to read 5, iclass 31, count 0 2006.232.08:07:59.51#ibcon#read 5, iclass 31, count 0 2006.232.08:07:59.51#ibcon#about to read 6, iclass 31, count 0 2006.232.08:07:59.51#ibcon#read 6, iclass 31, count 0 2006.232.08:07:59.51#ibcon#end of sib2, iclass 31, count 0 2006.232.08:07:59.51#ibcon#*after write, iclass 31, count 0 2006.232.08:07:59.51#ibcon#*before return 0, iclass 31, count 0 2006.232.08:07:59.51#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.232.08:07:59.51#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.232.08:07:59.51#ibcon#about to clear, iclass 31 cls_cnt 0 2006.232.08:07:59.51#ibcon#cleared, iclass 31 cls_cnt 0 2006.232.08:07:59.51$vc4f8/valo=6,772.99 2006.232.08:07:59.51#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.232.08:07:59.51#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.232.08:07:59.51#ibcon#ireg 17 cls_cnt 0 2006.232.08:07:59.51#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.232.08:07:59.51#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.232.08:07:59.51#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.232.08:07:59.51#ibcon#enter wrdev, iclass 33, count 0 2006.232.08:07:59.51#ibcon#first serial, iclass 33, count 0 2006.232.08:07:59.51#ibcon#enter sib2, iclass 33, count 0 2006.232.08:07:59.51#ibcon#flushed, iclass 33, count 0 2006.232.08:07:59.51#ibcon#about to write, iclass 33, count 0 2006.232.08:07:59.51#ibcon#wrote, iclass 33, count 0 2006.232.08:07:59.51#ibcon#about to read 3, iclass 33, count 0 2006.232.08:07:59.53#ibcon#read 3, iclass 33, count 0 2006.232.08:07:59.53#ibcon#about to read 4, iclass 33, count 0 2006.232.08:07:59.53#ibcon#read 4, iclass 33, count 0 2006.232.08:07:59.53#ibcon#about to read 5, iclass 33, count 0 2006.232.08:07:59.53#ibcon#read 5, iclass 33, count 0 2006.232.08:07:59.53#ibcon#about to read 6, iclass 33, count 0 2006.232.08:07:59.53#ibcon#read 6, iclass 33, count 0 2006.232.08:07:59.53#ibcon#end of sib2, iclass 33, count 0 2006.232.08:07:59.53#ibcon#*mode == 0, iclass 33, count 0 2006.232.08:07:59.53#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.232.08:07:59.53#ibcon#[26=FRQ=06,772.99\r\n] 2006.232.08:07:59.53#ibcon#*before write, iclass 33, count 0 2006.232.08:07:59.53#ibcon#enter sib2, iclass 33, count 0 2006.232.08:07:59.53#ibcon#flushed, iclass 33, count 0 2006.232.08:07:59.53#ibcon#about to write, iclass 33, count 0 2006.232.08:07:59.53#ibcon#wrote, iclass 33, count 0 2006.232.08:07:59.53#ibcon#about to read 3, iclass 33, count 0 2006.232.08:07:59.58#ibcon#read 3, iclass 33, count 0 2006.232.08:07:59.58#ibcon#about to read 4, iclass 33, count 0 2006.232.08:07:59.58#ibcon#read 4, iclass 33, count 0 2006.232.08:07:59.58#ibcon#about to read 5, iclass 33, count 0 2006.232.08:07:59.58#ibcon#read 5, iclass 33, count 0 2006.232.08:07:59.58#ibcon#about to read 6, iclass 33, count 0 2006.232.08:07:59.58#ibcon#read 6, iclass 33, count 0 2006.232.08:07:59.58#ibcon#end of sib2, iclass 33, count 0 2006.232.08:07:59.58#ibcon#*after write, iclass 33, count 0 2006.232.08:07:59.58#ibcon#*before return 0, iclass 33, count 0 2006.232.08:07:59.58#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.232.08:07:59.58#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.232.08:07:59.58#ibcon#about to clear, iclass 33 cls_cnt 0 2006.232.08:07:59.58#ibcon#cleared, iclass 33 cls_cnt 0 2006.232.08:07:59.58$vc4f8/va=6,6 2006.232.08:07:59.58#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.232.08:07:59.58#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.232.08:07:59.58#ibcon#ireg 11 cls_cnt 2 2006.232.08:07:59.58#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.232.08:07:59.63#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.232.08:07:59.63#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.232.08:07:59.63#ibcon#enter wrdev, iclass 35, count 2 2006.232.08:07:59.63#ibcon#first serial, iclass 35, count 2 2006.232.08:07:59.63#ibcon#enter sib2, iclass 35, count 2 2006.232.08:07:59.63#ibcon#flushed, iclass 35, count 2 2006.232.08:07:59.63#ibcon#about to write, iclass 35, count 2 2006.232.08:07:59.63#ibcon#wrote, iclass 35, count 2 2006.232.08:07:59.63#ibcon#about to read 3, iclass 35, count 2 2006.232.08:07:59.65#ibcon#read 3, iclass 35, count 2 2006.232.08:07:59.65#ibcon#about to read 4, iclass 35, count 2 2006.232.08:07:59.65#ibcon#read 4, iclass 35, count 2 2006.232.08:07:59.65#ibcon#about to read 5, iclass 35, count 2 2006.232.08:07:59.65#ibcon#read 5, iclass 35, count 2 2006.232.08:07:59.65#ibcon#about to read 6, iclass 35, count 2 2006.232.08:07:59.65#ibcon#read 6, iclass 35, count 2 2006.232.08:07:59.65#ibcon#end of sib2, iclass 35, count 2 2006.232.08:07:59.65#ibcon#*mode == 0, iclass 35, count 2 2006.232.08:07:59.65#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.232.08:07:59.65#ibcon#[25=AT06-06\r\n] 2006.232.08:07:59.65#ibcon#*before write, iclass 35, count 2 2006.232.08:07:59.65#ibcon#enter sib2, iclass 35, count 2 2006.232.08:07:59.65#ibcon#flushed, iclass 35, count 2 2006.232.08:07:59.65#ibcon#about to write, iclass 35, count 2 2006.232.08:07:59.65#ibcon#wrote, iclass 35, count 2 2006.232.08:07:59.65#ibcon#about to read 3, iclass 35, count 2 2006.232.08:07:59.68#ibcon#read 3, iclass 35, count 2 2006.232.08:07:59.68#ibcon#about to read 4, iclass 35, count 2 2006.232.08:07:59.68#ibcon#read 4, iclass 35, count 2 2006.232.08:07:59.68#ibcon#about to read 5, iclass 35, count 2 2006.232.08:07:59.68#ibcon#read 5, iclass 35, count 2 2006.232.08:07:59.68#ibcon#about to read 6, iclass 35, count 2 2006.232.08:07:59.68#ibcon#read 6, iclass 35, count 2 2006.232.08:07:59.68#ibcon#end of sib2, iclass 35, count 2 2006.232.08:07:59.68#ibcon#*after write, iclass 35, count 2 2006.232.08:07:59.68#ibcon#*before return 0, iclass 35, count 2 2006.232.08:07:59.68#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.232.08:07:59.68#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.232.08:07:59.68#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.232.08:07:59.68#ibcon#ireg 7 cls_cnt 0 2006.232.08:07:59.68#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.232.08:07:59.80#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.232.08:07:59.80#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.232.08:07:59.80#ibcon#enter wrdev, iclass 35, count 0 2006.232.08:07:59.80#ibcon#first serial, iclass 35, count 0 2006.232.08:07:59.80#ibcon#enter sib2, iclass 35, count 0 2006.232.08:07:59.80#ibcon#flushed, iclass 35, count 0 2006.232.08:07:59.80#ibcon#about to write, iclass 35, count 0 2006.232.08:07:59.80#ibcon#wrote, iclass 35, count 0 2006.232.08:07:59.80#ibcon#about to read 3, iclass 35, count 0 2006.232.08:07:59.82#ibcon#read 3, iclass 35, count 0 2006.232.08:07:59.82#ibcon#about to read 4, iclass 35, count 0 2006.232.08:07:59.82#ibcon#read 4, iclass 35, count 0 2006.232.08:07:59.82#ibcon#about to read 5, iclass 35, count 0 2006.232.08:07:59.82#ibcon#read 5, iclass 35, count 0 2006.232.08:07:59.82#ibcon#about to read 6, iclass 35, count 0 2006.232.08:07:59.82#ibcon#read 6, iclass 35, count 0 2006.232.08:07:59.82#ibcon#end of sib2, iclass 35, count 0 2006.232.08:07:59.82#ibcon#*mode == 0, iclass 35, count 0 2006.232.08:07:59.82#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.232.08:07:59.82#ibcon#[25=USB\r\n] 2006.232.08:07:59.82#ibcon#*before write, iclass 35, count 0 2006.232.08:07:59.82#ibcon#enter sib2, iclass 35, count 0 2006.232.08:07:59.82#ibcon#flushed, iclass 35, count 0 2006.232.08:07:59.82#ibcon#about to write, iclass 35, count 0 2006.232.08:07:59.82#ibcon#wrote, iclass 35, count 0 2006.232.08:07:59.82#ibcon#about to read 3, iclass 35, count 0 2006.232.08:07:59.85#ibcon#read 3, iclass 35, count 0 2006.232.08:07:59.85#ibcon#about to read 4, iclass 35, count 0 2006.232.08:07:59.85#ibcon#read 4, iclass 35, count 0 2006.232.08:07:59.85#ibcon#about to read 5, iclass 35, count 0 2006.232.08:07:59.85#ibcon#read 5, iclass 35, count 0 2006.232.08:07:59.85#ibcon#about to read 6, iclass 35, count 0 2006.232.08:07:59.85#ibcon#read 6, iclass 35, count 0 2006.232.08:07:59.85#ibcon#end of sib2, iclass 35, count 0 2006.232.08:07:59.85#ibcon#*after write, iclass 35, count 0 2006.232.08:07:59.85#ibcon#*before return 0, iclass 35, count 0 2006.232.08:07:59.85#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.232.08:07:59.85#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.232.08:07:59.85#ibcon#about to clear, iclass 35 cls_cnt 0 2006.232.08:07:59.85#ibcon#cleared, iclass 35 cls_cnt 0 2006.232.08:07:59.85$vc4f8/valo=7,832.99 2006.232.08:07:59.85#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.232.08:07:59.85#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.232.08:07:59.85#ibcon#ireg 17 cls_cnt 0 2006.232.08:07:59.85#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.232.08:07:59.85#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.232.08:07:59.85#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.232.08:07:59.85#ibcon#enter wrdev, iclass 37, count 0 2006.232.08:07:59.85#ibcon#first serial, iclass 37, count 0 2006.232.08:07:59.85#ibcon#enter sib2, iclass 37, count 0 2006.232.08:07:59.85#ibcon#flushed, iclass 37, count 0 2006.232.08:07:59.85#ibcon#about to write, iclass 37, count 0 2006.232.08:07:59.85#ibcon#wrote, iclass 37, count 0 2006.232.08:07:59.85#ibcon#about to read 3, iclass 37, count 0 2006.232.08:07:59.87#ibcon#read 3, iclass 37, count 0 2006.232.08:07:59.87#ibcon#about to read 4, iclass 37, count 0 2006.232.08:07:59.87#ibcon#read 4, iclass 37, count 0 2006.232.08:07:59.87#ibcon#about to read 5, iclass 37, count 0 2006.232.08:07:59.87#ibcon#read 5, iclass 37, count 0 2006.232.08:07:59.87#ibcon#about to read 6, iclass 37, count 0 2006.232.08:07:59.87#ibcon#read 6, iclass 37, count 0 2006.232.08:07:59.87#ibcon#end of sib2, iclass 37, count 0 2006.232.08:07:59.87#ibcon#*mode == 0, iclass 37, count 0 2006.232.08:07:59.87#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.232.08:07:59.87#ibcon#[26=FRQ=07,832.99\r\n] 2006.232.08:07:59.87#ibcon#*before write, iclass 37, count 0 2006.232.08:07:59.87#ibcon#enter sib2, iclass 37, count 0 2006.232.08:07:59.87#ibcon#flushed, iclass 37, count 0 2006.232.08:07:59.87#ibcon#about to write, iclass 37, count 0 2006.232.08:07:59.87#ibcon#wrote, iclass 37, count 0 2006.232.08:07:59.87#ibcon#about to read 3, iclass 37, count 0 2006.232.08:07:59.91#ibcon#read 3, iclass 37, count 0 2006.232.08:07:59.91#ibcon#about to read 4, iclass 37, count 0 2006.232.08:07:59.91#ibcon#read 4, iclass 37, count 0 2006.232.08:07:59.91#ibcon#about to read 5, iclass 37, count 0 2006.232.08:07:59.91#ibcon#read 5, iclass 37, count 0 2006.232.08:07:59.91#ibcon#about to read 6, iclass 37, count 0 2006.232.08:07:59.91#ibcon#read 6, iclass 37, count 0 2006.232.08:07:59.91#ibcon#end of sib2, iclass 37, count 0 2006.232.08:07:59.91#ibcon#*after write, iclass 37, count 0 2006.232.08:07:59.91#ibcon#*before return 0, iclass 37, count 0 2006.232.08:07:59.91#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.232.08:07:59.91#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.232.08:07:59.91#ibcon#about to clear, iclass 37 cls_cnt 0 2006.232.08:07:59.91#ibcon#cleared, iclass 37 cls_cnt 0 2006.232.08:07:59.91$vc4f8/va=7,6 2006.232.08:07:59.91#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.232.08:07:59.91#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.232.08:07:59.91#ibcon#ireg 11 cls_cnt 2 2006.232.08:07:59.91#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.232.08:07:59.97#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.232.08:07:59.97#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.232.08:07:59.97#ibcon#enter wrdev, iclass 39, count 2 2006.232.08:07:59.97#ibcon#first serial, iclass 39, count 2 2006.232.08:07:59.97#ibcon#enter sib2, iclass 39, count 2 2006.232.08:07:59.97#ibcon#flushed, iclass 39, count 2 2006.232.08:07:59.97#ibcon#about to write, iclass 39, count 2 2006.232.08:07:59.97#ibcon#wrote, iclass 39, count 2 2006.232.08:07:59.97#ibcon#about to read 3, iclass 39, count 2 2006.232.08:07:59.99#ibcon#read 3, iclass 39, count 2 2006.232.08:07:59.99#ibcon#about to read 4, iclass 39, count 2 2006.232.08:07:59.99#ibcon#read 4, iclass 39, count 2 2006.232.08:07:59.99#ibcon#about to read 5, iclass 39, count 2 2006.232.08:07:59.99#ibcon#read 5, iclass 39, count 2 2006.232.08:07:59.99#ibcon#about to read 6, iclass 39, count 2 2006.232.08:07:59.99#ibcon#read 6, iclass 39, count 2 2006.232.08:07:59.99#ibcon#end of sib2, iclass 39, count 2 2006.232.08:07:59.99#ibcon#*mode == 0, iclass 39, count 2 2006.232.08:07:59.99#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.232.08:07:59.99#ibcon#[25=AT07-06\r\n] 2006.232.08:07:59.99#ibcon#*before write, iclass 39, count 2 2006.232.08:07:59.99#ibcon#enter sib2, iclass 39, count 2 2006.232.08:07:59.99#ibcon#flushed, iclass 39, count 2 2006.232.08:07:59.99#ibcon#about to write, iclass 39, count 2 2006.232.08:07:59.99#ibcon#wrote, iclass 39, count 2 2006.232.08:07:59.99#ibcon#about to read 3, iclass 39, count 2 2006.232.08:08:00.02#ibcon#read 3, iclass 39, count 2 2006.232.08:08:00.02#ibcon#about to read 4, iclass 39, count 2 2006.232.08:08:00.02#ibcon#read 4, iclass 39, count 2 2006.232.08:08:00.02#ibcon#about to read 5, iclass 39, count 2 2006.232.08:08:00.02#ibcon#read 5, iclass 39, count 2 2006.232.08:08:00.02#ibcon#about to read 6, iclass 39, count 2 2006.232.08:08:00.02#ibcon#read 6, iclass 39, count 2 2006.232.08:08:00.02#ibcon#end of sib2, iclass 39, count 2 2006.232.08:08:00.02#ibcon#*after write, iclass 39, count 2 2006.232.08:08:00.02#ibcon#*before return 0, iclass 39, count 2 2006.232.08:08:00.02#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.232.08:08:00.02#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.232.08:08:00.02#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.232.08:08:00.02#ibcon#ireg 7 cls_cnt 0 2006.232.08:08:00.02#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.232.08:08:00.14#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.232.08:08:00.14#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.232.08:08:00.14#ibcon#enter wrdev, iclass 39, count 0 2006.232.08:08:00.14#ibcon#first serial, iclass 39, count 0 2006.232.08:08:00.14#ibcon#enter sib2, iclass 39, count 0 2006.232.08:08:00.14#ibcon#flushed, iclass 39, count 0 2006.232.08:08:00.14#ibcon#about to write, iclass 39, count 0 2006.232.08:08:00.14#ibcon#wrote, iclass 39, count 0 2006.232.08:08:00.14#ibcon#about to read 3, iclass 39, count 0 2006.232.08:08:00.16#ibcon#read 3, iclass 39, count 0 2006.232.08:08:00.16#ibcon#about to read 4, iclass 39, count 0 2006.232.08:08:00.16#ibcon#read 4, iclass 39, count 0 2006.232.08:08:00.16#ibcon#about to read 5, iclass 39, count 0 2006.232.08:08:00.16#ibcon#read 5, iclass 39, count 0 2006.232.08:08:00.16#ibcon#about to read 6, iclass 39, count 0 2006.232.08:08:00.16#ibcon#read 6, iclass 39, count 0 2006.232.08:08:00.16#ibcon#end of sib2, iclass 39, count 0 2006.232.08:08:00.16#ibcon#*mode == 0, iclass 39, count 0 2006.232.08:08:00.16#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.232.08:08:00.16#ibcon#[25=USB\r\n] 2006.232.08:08:00.16#ibcon#*before write, iclass 39, count 0 2006.232.08:08:00.16#ibcon#enter sib2, iclass 39, count 0 2006.232.08:08:00.16#ibcon#flushed, iclass 39, count 0 2006.232.08:08:00.16#ibcon#about to write, iclass 39, count 0 2006.232.08:08:00.16#ibcon#wrote, iclass 39, count 0 2006.232.08:08:00.16#ibcon#about to read 3, iclass 39, count 0 2006.232.08:08:00.19#ibcon#read 3, iclass 39, count 0 2006.232.08:08:00.19#ibcon#about to read 4, iclass 39, count 0 2006.232.08:08:00.19#ibcon#read 4, iclass 39, count 0 2006.232.08:08:00.19#ibcon#about to read 5, iclass 39, count 0 2006.232.08:08:00.19#ibcon#read 5, iclass 39, count 0 2006.232.08:08:00.19#ibcon#about to read 6, iclass 39, count 0 2006.232.08:08:00.19#ibcon#read 6, iclass 39, count 0 2006.232.08:08:00.19#ibcon#end of sib2, iclass 39, count 0 2006.232.08:08:00.19#ibcon#*after write, iclass 39, count 0 2006.232.08:08:00.19#ibcon#*before return 0, iclass 39, count 0 2006.232.08:08:00.19#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.232.08:08:00.19#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.232.08:08:00.19#ibcon#about to clear, iclass 39 cls_cnt 0 2006.232.08:08:00.19#ibcon#cleared, iclass 39 cls_cnt 0 2006.232.08:08:00.19$vc4f8/valo=8,852.99 2006.232.08:08:00.19#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.232.08:08:00.19#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.232.08:08:00.19#ibcon#ireg 17 cls_cnt 0 2006.232.08:08:00.19#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:08:00.19#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:08:00.19#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:08:00.19#ibcon#enter wrdev, iclass 3, count 0 2006.232.08:08:00.19#ibcon#first serial, iclass 3, count 0 2006.232.08:08:00.19#ibcon#enter sib2, iclass 3, count 0 2006.232.08:08:00.19#ibcon#flushed, iclass 3, count 0 2006.232.08:08:00.19#ibcon#about to write, iclass 3, count 0 2006.232.08:08:00.19#ibcon#wrote, iclass 3, count 0 2006.232.08:08:00.19#ibcon#about to read 3, iclass 3, count 0 2006.232.08:08:00.21#ibcon#read 3, iclass 3, count 0 2006.232.08:08:00.21#ibcon#about to read 4, iclass 3, count 0 2006.232.08:08:00.21#ibcon#read 4, iclass 3, count 0 2006.232.08:08:00.21#ibcon#about to read 5, iclass 3, count 0 2006.232.08:08:00.21#ibcon#read 5, iclass 3, count 0 2006.232.08:08:00.21#ibcon#about to read 6, iclass 3, count 0 2006.232.08:08:00.21#ibcon#read 6, iclass 3, count 0 2006.232.08:08:00.21#ibcon#end of sib2, iclass 3, count 0 2006.232.08:08:00.21#ibcon#*mode == 0, iclass 3, count 0 2006.232.08:08:00.21#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.232.08:08:00.21#ibcon#[26=FRQ=08,852.99\r\n] 2006.232.08:08:00.21#ibcon#*before write, iclass 3, count 0 2006.232.08:08:00.21#ibcon#enter sib2, iclass 3, count 0 2006.232.08:08:00.21#ibcon#flushed, iclass 3, count 0 2006.232.08:08:00.21#ibcon#about to write, iclass 3, count 0 2006.232.08:08:00.21#ibcon#wrote, iclass 3, count 0 2006.232.08:08:00.21#ibcon#about to read 3, iclass 3, count 0 2006.232.08:08:00.25#ibcon#read 3, iclass 3, count 0 2006.232.08:08:00.25#ibcon#about to read 4, iclass 3, count 0 2006.232.08:08:00.25#ibcon#read 4, iclass 3, count 0 2006.232.08:08:00.25#ibcon#about to read 5, iclass 3, count 0 2006.232.08:08:00.25#ibcon#read 5, iclass 3, count 0 2006.232.08:08:00.25#ibcon#about to read 6, iclass 3, count 0 2006.232.08:08:00.25#ibcon#read 6, iclass 3, count 0 2006.232.08:08:00.25#ibcon#end of sib2, iclass 3, count 0 2006.232.08:08:00.25#ibcon#*after write, iclass 3, count 0 2006.232.08:08:00.25#ibcon#*before return 0, iclass 3, count 0 2006.232.08:08:00.25#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:08:00.25#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:08:00.25#ibcon#about to clear, iclass 3 cls_cnt 0 2006.232.08:08:00.25#ibcon#cleared, iclass 3 cls_cnt 0 2006.232.08:08:00.25$vc4f8/va=8,6 2006.232.08:08:00.25#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.232.08:08:00.25#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.232.08:08:00.25#ibcon#ireg 11 cls_cnt 2 2006.232.08:08:00.25#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.232.08:08:00.31#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.232.08:08:00.31#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.232.08:08:00.31#ibcon#enter wrdev, iclass 5, count 2 2006.232.08:08:00.31#ibcon#first serial, iclass 5, count 2 2006.232.08:08:00.31#ibcon#enter sib2, iclass 5, count 2 2006.232.08:08:00.31#ibcon#flushed, iclass 5, count 2 2006.232.08:08:00.31#ibcon#about to write, iclass 5, count 2 2006.232.08:08:00.31#ibcon#wrote, iclass 5, count 2 2006.232.08:08:00.31#ibcon#about to read 3, iclass 5, count 2 2006.232.08:08:00.33#ibcon#read 3, iclass 5, count 2 2006.232.08:08:00.33#ibcon#about to read 4, iclass 5, count 2 2006.232.08:08:00.33#ibcon#read 4, iclass 5, count 2 2006.232.08:08:00.33#ibcon#about to read 5, iclass 5, count 2 2006.232.08:08:00.33#ibcon#read 5, iclass 5, count 2 2006.232.08:08:00.33#ibcon#about to read 6, iclass 5, count 2 2006.232.08:08:00.33#ibcon#read 6, iclass 5, count 2 2006.232.08:08:00.33#ibcon#end of sib2, iclass 5, count 2 2006.232.08:08:00.33#ibcon#*mode == 0, iclass 5, count 2 2006.232.08:08:00.33#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.232.08:08:00.33#ibcon#[25=AT08-06\r\n] 2006.232.08:08:00.33#ibcon#*before write, iclass 5, count 2 2006.232.08:08:00.33#ibcon#enter sib2, iclass 5, count 2 2006.232.08:08:00.33#ibcon#flushed, iclass 5, count 2 2006.232.08:08:00.33#ibcon#about to write, iclass 5, count 2 2006.232.08:08:00.33#ibcon#wrote, iclass 5, count 2 2006.232.08:08:00.33#ibcon#about to read 3, iclass 5, count 2 2006.232.08:08:00.36#ibcon#read 3, iclass 5, count 2 2006.232.08:08:00.36#ibcon#about to read 4, iclass 5, count 2 2006.232.08:08:00.36#ibcon#read 4, iclass 5, count 2 2006.232.08:08:00.36#ibcon#about to read 5, iclass 5, count 2 2006.232.08:08:00.36#ibcon#read 5, iclass 5, count 2 2006.232.08:08:00.36#ibcon#about to read 6, iclass 5, count 2 2006.232.08:08:00.36#ibcon#read 6, iclass 5, count 2 2006.232.08:08:00.36#ibcon#end of sib2, iclass 5, count 2 2006.232.08:08:00.36#ibcon#*after write, iclass 5, count 2 2006.232.08:08:00.36#ibcon#*before return 0, iclass 5, count 2 2006.232.08:08:00.36#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.232.08:08:00.36#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.232.08:08:00.36#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.232.08:08:00.36#ibcon#ireg 7 cls_cnt 0 2006.232.08:08:00.36#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.232.08:08:00.48#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.232.08:08:00.48#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.232.08:08:00.48#ibcon#enter wrdev, iclass 5, count 0 2006.232.08:08:00.48#ibcon#first serial, iclass 5, count 0 2006.232.08:08:00.48#ibcon#enter sib2, iclass 5, count 0 2006.232.08:08:00.48#ibcon#flushed, iclass 5, count 0 2006.232.08:08:00.48#ibcon#about to write, iclass 5, count 0 2006.232.08:08:00.48#ibcon#wrote, iclass 5, count 0 2006.232.08:08:00.48#ibcon#about to read 3, iclass 5, count 0 2006.232.08:08:00.50#ibcon#read 3, iclass 5, count 0 2006.232.08:08:00.50#ibcon#about to read 4, iclass 5, count 0 2006.232.08:08:00.50#ibcon#read 4, iclass 5, count 0 2006.232.08:08:00.50#ibcon#about to read 5, iclass 5, count 0 2006.232.08:08:00.50#ibcon#read 5, iclass 5, count 0 2006.232.08:08:00.50#ibcon#about to read 6, iclass 5, count 0 2006.232.08:08:00.50#ibcon#read 6, iclass 5, count 0 2006.232.08:08:00.50#ibcon#end of sib2, iclass 5, count 0 2006.232.08:08:00.50#ibcon#*mode == 0, iclass 5, count 0 2006.232.08:08:00.50#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.232.08:08:00.50#ibcon#[25=USB\r\n] 2006.232.08:08:00.50#ibcon#*before write, iclass 5, count 0 2006.232.08:08:00.50#ibcon#enter sib2, iclass 5, count 0 2006.232.08:08:00.50#ibcon#flushed, iclass 5, count 0 2006.232.08:08:00.50#ibcon#about to write, iclass 5, count 0 2006.232.08:08:00.50#ibcon#wrote, iclass 5, count 0 2006.232.08:08:00.50#ibcon#about to read 3, iclass 5, count 0 2006.232.08:08:00.53#ibcon#read 3, iclass 5, count 0 2006.232.08:08:00.53#ibcon#about to read 4, iclass 5, count 0 2006.232.08:08:00.53#ibcon#read 4, iclass 5, count 0 2006.232.08:08:00.53#ibcon#about to read 5, iclass 5, count 0 2006.232.08:08:00.53#ibcon#read 5, iclass 5, count 0 2006.232.08:08:00.53#ibcon#about to read 6, iclass 5, count 0 2006.232.08:08:00.53#ibcon#read 6, iclass 5, count 0 2006.232.08:08:00.53#ibcon#end of sib2, iclass 5, count 0 2006.232.08:08:00.53#ibcon#*after write, iclass 5, count 0 2006.232.08:08:00.53#ibcon#*before return 0, iclass 5, count 0 2006.232.08:08:00.53#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.232.08:08:00.53#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.232.08:08:00.53#ibcon#about to clear, iclass 5 cls_cnt 0 2006.232.08:08:00.53#ibcon#cleared, iclass 5 cls_cnt 0 2006.232.08:08:00.53$vc4f8/vblo=1,632.99 2006.232.08:08:00.53#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.232.08:08:00.53#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.232.08:08:00.53#ibcon#ireg 17 cls_cnt 0 2006.232.08:08:00.53#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.232.08:08:00.53#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.232.08:08:00.53#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.232.08:08:00.53#ibcon#enter wrdev, iclass 7, count 0 2006.232.08:08:00.53#ibcon#first serial, iclass 7, count 0 2006.232.08:08:00.53#ibcon#enter sib2, iclass 7, count 0 2006.232.08:08:00.53#ibcon#flushed, iclass 7, count 0 2006.232.08:08:00.53#ibcon#about to write, iclass 7, count 0 2006.232.08:08:00.53#ibcon#wrote, iclass 7, count 0 2006.232.08:08:00.53#ibcon#about to read 3, iclass 7, count 0 2006.232.08:08:00.55#ibcon#read 3, iclass 7, count 0 2006.232.08:08:00.55#ibcon#about to read 4, iclass 7, count 0 2006.232.08:08:00.55#ibcon#read 4, iclass 7, count 0 2006.232.08:08:00.55#ibcon#about to read 5, iclass 7, count 0 2006.232.08:08:00.55#ibcon#read 5, iclass 7, count 0 2006.232.08:08:00.55#ibcon#about to read 6, iclass 7, count 0 2006.232.08:08:00.55#ibcon#read 6, iclass 7, count 0 2006.232.08:08:00.55#ibcon#end of sib2, iclass 7, count 0 2006.232.08:08:00.55#ibcon#*mode == 0, iclass 7, count 0 2006.232.08:08:00.55#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.232.08:08:00.55#ibcon#[28=FRQ=01,632.99\r\n] 2006.232.08:08:00.55#ibcon#*before write, iclass 7, count 0 2006.232.08:08:00.55#ibcon#enter sib2, iclass 7, count 0 2006.232.08:08:00.55#ibcon#flushed, iclass 7, count 0 2006.232.08:08:00.55#ibcon#about to write, iclass 7, count 0 2006.232.08:08:00.55#ibcon#wrote, iclass 7, count 0 2006.232.08:08:00.55#ibcon#about to read 3, iclass 7, count 0 2006.232.08:08:00.59#ibcon#read 3, iclass 7, count 0 2006.232.08:08:00.59#ibcon#about to read 4, iclass 7, count 0 2006.232.08:08:00.59#ibcon#read 4, iclass 7, count 0 2006.232.08:08:00.59#ibcon#about to read 5, iclass 7, count 0 2006.232.08:08:00.59#ibcon#read 5, iclass 7, count 0 2006.232.08:08:00.59#ibcon#about to read 6, iclass 7, count 0 2006.232.08:08:00.59#ibcon#read 6, iclass 7, count 0 2006.232.08:08:00.59#ibcon#end of sib2, iclass 7, count 0 2006.232.08:08:00.59#ibcon#*after write, iclass 7, count 0 2006.232.08:08:00.59#ibcon#*before return 0, iclass 7, count 0 2006.232.08:08:00.59#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.232.08:08:00.59#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.232.08:08:00.59#ibcon#about to clear, iclass 7 cls_cnt 0 2006.232.08:08:00.59#ibcon#cleared, iclass 7 cls_cnt 0 2006.232.08:08:00.59$vc4f8/vb=1,4 2006.232.08:08:00.59#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.232.08:08:00.59#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.232.08:08:00.59#ibcon#ireg 11 cls_cnt 2 2006.232.08:08:00.59#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.232.08:08:00.59#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.232.08:08:00.59#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.232.08:08:00.59#ibcon#enter wrdev, iclass 11, count 2 2006.232.08:08:00.59#ibcon#first serial, iclass 11, count 2 2006.232.08:08:00.59#ibcon#enter sib2, iclass 11, count 2 2006.232.08:08:00.59#ibcon#flushed, iclass 11, count 2 2006.232.08:08:00.59#ibcon#about to write, iclass 11, count 2 2006.232.08:08:00.59#ibcon#wrote, iclass 11, count 2 2006.232.08:08:00.59#ibcon#about to read 3, iclass 11, count 2 2006.232.08:08:00.61#ibcon#read 3, iclass 11, count 2 2006.232.08:08:00.61#ibcon#about to read 4, iclass 11, count 2 2006.232.08:08:00.61#ibcon#read 4, iclass 11, count 2 2006.232.08:08:00.61#ibcon#about to read 5, iclass 11, count 2 2006.232.08:08:00.61#ibcon#read 5, iclass 11, count 2 2006.232.08:08:00.61#ibcon#about to read 6, iclass 11, count 2 2006.232.08:08:00.61#ibcon#read 6, iclass 11, count 2 2006.232.08:08:00.61#ibcon#end of sib2, iclass 11, count 2 2006.232.08:08:00.61#ibcon#*mode == 0, iclass 11, count 2 2006.232.08:08:00.61#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.232.08:08:00.61#ibcon#[27=AT01-04\r\n] 2006.232.08:08:00.61#ibcon#*before write, iclass 11, count 2 2006.232.08:08:00.61#ibcon#enter sib2, iclass 11, count 2 2006.232.08:08:00.61#ibcon#flushed, iclass 11, count 2 2006.232.08:08:00.61#ibcon#about to write, iclass 11, count 2 2006.232.08:08:00.61#ibcon#wrote, iclass 11, count 2 2006.232.08:08:00.61#ibcon#about to read 3, iclass 11, count 2 2006.232.08:08:00.64#ibcon#read 3, iclass 11, count 2 2006.232.08:08:00.64#ibcon#about to read 4, iclass 11, count 2 2006.232.08:08:00.64#ibcon#read 4, iclass 11, count 2 2006.232.08:08:00.64#ibcon#about to read 5, iclass 11, count 2 2006.232.08:08:00.64#ibcon#read 5, iclass 11, count 2 2006.232.08:08:00.64#ibcon#about to read 6, iclass 11, count 2 2006.232.08:08:00.64#ibcon#read 6, iclass 11, count 2 2006.232.08:08:00.64#ibcon#end of sib2, iclass 11, count 2 2006.232.08:08:00.64#ibcon#*after write, iclass 11, count 2 2006.232.08:08:00.64#ibcon#*before return 0, iclass 11, count 2 2006.232.08:08:00.64#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.232.08:08:00.64#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.232.08:08:00.64#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.232.08:08:00.64#ibcon#ireg 7 cls_cnt 0 2006.232.08:08:00.64#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.232.08:08:00.76#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.232.08:08:00.76#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.232.08:08:00.76#ibcon#enter wrdev, iclass 11, count 0 2006.232.08:08:00.76#ibcon#first serial, iclass 11, count 0 2006.232.08:08:00.76#ibcon#enter sib2, iclass 11, count 0 2006.232.08:08:00.76#ibcon#flushed, iclass 11, count 0 2006.232.08:08:00.76#ibcon#about to write, iclass 11, count 0 2006.232.08:08:00.76#ibcon#wrote, iclass 11, count 0 2006.232.08:08:00.76#ibcon#about to read 3, iclass 11, count 0 2006.232.08:08:00.78#ibcon#read 3, iclass 11, count 0 2006.232.08:08:00.78#ibcon#about to read 4, iclass 11, count 0 2006.232.08:08:00.78#ibcon#read 4, iclass 11, count 0 2006.232.08:08:00.78#ibcon#about to read 5, iclass 11, count 0 2006.232.08:08:00.78#ibcon#read 5, iclass 11, count 0 2006.232.08:08:00.78#ibcon#about to read 6, iclass 11, count 0 2006.232.08:08:00.78#ibcon#read 6, iclass 11, count 0 2006.232.08:08:00.78#ibcon#end of sib2, iclass 11, count 0 2006.232.08:08:00.78#ibcon#*mode == 0, iclass 11, count 0 2006.232.08:08:00.78#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.232.08:08:00.78#ibcon#[27=USB\r\n] 2006.232.08:08:00.78#ibcon#*before write, iclass 11, count 0 2006.232.08:08:00.78#ibcon#enter sib2, iclass 11, count 0 2006.232.08:08:00.78#ibcon#flushed, iclass 11, count 0 2006.232.08:08:00.78#ibcon#about to write, iclass 11, count 0 2006.232.08:08:00.78#ibcon#wrote, iclass 11, count 0 2006.232.08:08:00.78#ibcon#about to read 3, iclass 11, count 0 2006.232.08:08:00.81#ibcon#read 3, iclass 11, count 0 2006.232.08:08:00.81#ibcon#about to read 4, iclass 11, count 0 2006.232.08:08:00.81#ibcon#read 4, iclass 11, count 0 2006.232.08:08:00.81#ibcon#about to read 5, iclass 11, count 0 2006.232.08:08:00.81#ibcon#read 5, iclass 11, count 0 2006.232.08:08:00.81#ibcon#about to read 6, iclass 11, count 0 2006.232.08:08:00.81#ibcon#read 6, iclass 11, count 0 2006.232.08:08:00.81#ibcon#end of sib2, iclass 11, count 0 2006.232.08:08:00.81#ibcon#*after write, iclass 11, count 0 2006.232.08:08:00.81#ibcon#*before return 0, iclass 11, count 0 2006.232.08:08:00.81#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.232.08:08:00.81#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.232.08:08:00.81#ibcon#about to clear, iclass 11 cls_cnt 0 2006.232.08:08:00.81#ibcon#cleared, iclass 11 cls_cnt 0 2006.232.08:08:00.81$vc4f8/vblo=2,640.99 2006.232.08:08:00.81#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.232.08:08:00.81#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.232.08:08:00.81#ibcon#ireg 17 cls_cnt 0 2006.232.08:08:00.81#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.232.08:08:00.81#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.232.08:08:00.81#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.232.08:08:00.81#ibcon#enter wrdev, iclass 13, count 0 2006.232.08:08:00.81#ibcon#first serial, iclass 13, count 0 2006.232.08:08:00.81#ibcon#enter sib2, iclass 13, count 0 2006.232.08:08:00.81#ibcon#flushed, iclass 13, count 0 2006.232.08:08:00.81#ibcon#about to write, iclass 13, count 0 2006.232.08:08:00.81#ibcon#wrote, iclass 13, count 0 2006.232.08:08:00.81#ibcon#about to read 3, iclass 13, count 0 2006.232.08:08:00.83#ibcon#read 3, iclass 13, count 0 2006.232.08:08:00.83#ibcon#about to read 4, iclass 13, count 0 2006.232.08:08:00.83#ibcon#read 4, iclass 13, count 0 2006.232.08:08:00.83#ibcon#about to read 5, iclass 13, count 0 2006.232.08:08:00.83#ibcon#read 5, iclass 13, count 0 2006.232.08:08:00.83#ibcon#about to read 6, iclass 13, count 0 2006.232.08:08:00.83#ibcon#read 6, iclass 13, count 0 2006.232.08:08:00.83#ibcon#end of sib2, iclass 13, count 0 2006.232.08:08:00.83#ibcon#*mode == 0, iclass 13, count 0 2006.232.08:08:00.83#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.232.08:08:00.83#ibcon#[28=FRQ=02,640.99\r\n] 2006.232.08:08:00.83#ibcon#*before write, iclass 13, count 0 2006.232.08:08:00.83#ibcon#enter sib2, iclass 13, count 0 2006.232.08:08:00.83#ibcon#flushed, iclass 13, count 0 2006.232.08:08:00.83#ibcon#about to write, iclass 13, count 0 2006.232.08:08:00.83#ibcon#wrote, iclass 13, count 0 2006.232.08:08:00.83#ibcon#about to read 3, iclass 13, count 0 2006.232.08:08:00.87#ibcon#read 3, iclass 13, count 0 2006.232.08:08:00.87#ibcon#about to read 4, iclass 13, count 0 2006.232.08:08:00.87#ibcon#read 4, iclass 13, count 0 2006.232.08:08:00.87#ibcon#about to read 5, iclass 13, count 0 2006.232.08:08:00.87#ibcon#read 5, iclass 13, count 0 2006.232.08:08:00.87#ibcon#about to read 6, iclass 13, count 0 2006.232.08:08:00.87#ibcon#read 6, iclass 13, count 0 2006.232.08:08:00.87#ibcon#end of sib2, iclass 13, count 0 2006.232.08:08:00.87#ibcon#*after write, iclass 13, count 0 2006.232.08:08:00.87#ibcon#*before return 0, iclass 13, count 0 2006.232.08:08:00.87#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.232.08:08:00.87#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.232.08:08:00.87#ibcon#about to clear, iclass 13 cls_cnt 0 2006.232.08:08:00.87#ibcon#cleared, iclass 13 cls_cnt 0 2006.232.08:08:00.87$vc4f8/vb=2,4 2006.232.08:08:00.87#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.232.08:08:00.87#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.232.08:08:00.87#ibcon#ireg 11 cls_cnt 2 2006.232.08:08:00.87#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.232.08:08:00.93#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.232.08:08:00.93#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.232.08:08:00.93#ibcon#enter wrdev, iclass 15, count 2 2006.232.08:08:00.93#ibcon#first serial, iclass 15, count 2 2006.232.08:08:00.93#ibcon#enter sib2, iclass 15, count 2 2006.232.08:08:00.93#ibcon#flushed, iclass 15, count 2 2006.232.08:08:00.93#ibcon#about to write, iclass 15, count 2 2006.232.08:08:00.93#ibcon#wrote, iclass 15, count 2 2006.232.08:08:00.93#ibcon#about to read 3, iclass 15, count 2 2006.232.08:08:00.95#ibcon#read 3, iclass 15, count 2 2006.232.08:08:00.95#ibcon#about to read 4, iclass 15, count 2 2006.232.08:08:00.95#ibcon#read 4, iclass 15, count 2 2006.232.08:08:00.95#ibcon#about to read 5, iclass 15, count 2 2006.232.08:08:00.95#ibcon#read 5, iclass 15, count 2 2006.232.08:08:00.95#ibcon#about to read 6, iclass 15, count 2 2006.232.08:08:00.95#ibcon#read 6, iclass 15, count 2 2006.232.08:08:00.95#ibcon#end of sib2, iclass 15, count 2 2006.232.08:08:00.95#ibcon#*mode == 0, iclass 15, count 2 2006.232.08:08:00.95#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.232.08:08:00.95#ibcon#[27=AT02-04\r\n] 2006.232.08:08:00.95#ibcon#*before write, iclass 15, count 2 2006.232.08:08:00.95#ibcon#enter sib2, iclass 15, count 2 2006.232.08:08:00.95#ibcon#flushed, iclass 15, count 2 2006.232.08:08:00.95#ibcon#about to write, iclass 15, count 2 2006.232.08:08:00.95#ibcon#wrote, iclass 15, count 2 2006.232.08:08:00.95#ibcon#about to read 3, iclass 15, count 2 2006.232.08:08:00.98#ibcon#read 3, iclass 15, count 2 2006.232.08:08:00.98#ibcon#about to read 4, iclass 15, count 2 2006.232.08:08:00.98#ibcon#read 4, iclass 15, count 2 2006.232.08:08:00.98#ibcon#about to read 5, iclass 15, count 2 2006.232.08:08:00.98#ibcon#read 5, iclass 15, count 2 2006.232.08:08:00.98#ibcon#about to read 6, iclass 15, count 2 2006.232.08:08:00.98#ibcon#read 6, iclass 15, count 2 2006.232.08:08:00.98#ibcon#end of sib2, iclass 15, count 2 2006.232.08:08:00.98#ibcon#*after write, iclass 15, count 2 2006.232.08:08:00.98#ibcon#*before return 0, iclass 15, count 2 2006.232.08:08:00.98#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.232.08:08:00.98#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.232.08:08:00.98#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.232.08:08:00.98#ibcon#ireg 7 cls_cnt 0 2006.232.08:08:00.98#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.232.08:08:01.10#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.232.08:08:01.10#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.232.08:08:01.10#ibcon#enter wrdev, iclass 15, count 0 2006.232.08:08:01.10#ibcon#first serial, iclass 15, count 0 2006.232.08:08:01.10#ibcon#enter sib2, iclass 15, count 0 2006.232.08:08:01.10#ibcon#flushed, iclass 15, count 0 2006.232.08:08:01.10#ibcon#about to write, iclass 15, count 0 2006.232.08:08:01.10#ibcon#wrote, iclass 15, count 0 2006.232.08:08:01.10#ibcon#about to read 3, iclass 15, count 0 2006.232.08:08:01.12#ibcon#read 3, iclass 15, count 0 2006.232.08:08:01.12#ibcon#about to read 4, iclass 15, count 0 2006.232.08:08:01.12#ibcon#read 4, iclass 15, count 0 2006.232.08:08:01.12#ibcon#about to read 5, iclass 15, count 0 2006.232.08:08:01.12#ibcon#read 5, iclass 15, count 0 2006.232.08:08:01.12#ibcon#about to read 6, iclass 15, count 0 2006.232.08:08:01.12#ibcon#read 6, iclass 15, count 0 2006.232.08:08:01.12#ibcon#end of sib2, iclass 15, count 0 2006.232.08:08:01.12#ibcon#*mode == 0, iclass 15, count 0 2006.232.08:08:01.12#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.232.08:08:01.12#ibcon#[27=USB\r\n] 2006.232.08:08:01.12#ibcon#*before write, iclass 15, count 0 2006.232.08:08:01.12#ibcon#enter sib2, iclass 15, count 0 2006.232.08:08:01.12#ibcon#flushed, iclass 15, count 0 2006.232.08:08:01.12#ibcon#about to write, iclass 15, count 0 2006.232.08:08:01.12#ibcon#wrote, iclass 15, count 0 2006.232.08:08:01.12#ibcon#about to read 3, iclass 15, count 0 2006.232.08:08:01.15#ibcon#read 3, iclass 15, count 0 2006.232.08:08:01.15#ibcon#about to read 4, iclass 15, count 0 2006.232.08:08:01.15#ibcon#read 4, iclass 15, count 0 2006.232.08:08:01.15#ibcon#about to read 5, iclass 15, count 0 2006.232.08:08:01.15#ibcon#read 5, iclass 15, count 0 2006.232.08:08:01.15#ibcon#about to read 6, iclass 15, count 0 2006.232.08:08:01.15#ibcon#read 6, iclass 15, count 0 2006.232.08:08:01.15#ibcon#end of sib2, iclass 15, count 0 2006.232.08:08:01.15#ibcon#*after write, iclass 15, count 0 2006.232.08:08:01.15#ibcon#*before return 0, iclass 15, count 0 2006.232.08:08:01.15#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.232.08:08:01.15#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.232.08:08:01.15#ibcon#about to clear, iclass 15 cls_cnt 0 2006.232.08:08:01.15#ibcon#cleared, iclass 15 cls_cnt 0 2006.232.08:08:01.15$vc4f8/vblo=3,656.99 2006.232.08:08:01.15#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.232.08:08:01.15#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.232.08:08:01.15#ibcon#ireg 17 cls_cnt 0 2006.232.08:08:01.15#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.232.08:08:01.15#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.232.08:08:01.15#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.232.08:08:01.15#ibcon#enter wrdev, iclass 17, count 0 2006.232.08:08:01.15#ibcon#first serial, iclass 17, count 0 2006.232.08:08:01.15#ibcon#enter sib2, iclass 17, count 0 2006.232.08:08:01.15#ibcon#flushed, iclass 17, count 0 2006.232.08:08:01.15#ibcon#about to write, iclass 17, count 0 2006.232.08:08:01.15#ibcon#wrote, iclass 17, count 0 2006.232.08:08:01.15#ibcon#about to read 3, iclass 17, count 0 2006.232.08:08:01.17#ibcon#read 3, iclass 17, count 0 2006.232.08:08:01.17#ibcon#about to read 4, iclass 17, count 0 2006.232.08:08:01.17#ibcon#read 4, iclass 17, count 0 2006.232.08:08:01.17#ibcon#about to read 5, iclass 17, count 0 2006.232.08:08:01.17#ibcon#read 5, iclass 17, count 0 2006.232.08:08:01.17#ibcon#about to read 6, iclass 17, count 0 2006.232.08:08:01.17#ibcon#read 6, iclass 17, count 0 2006.232.08:08:01.17#ibcon#end of sib2, iclass 17, count 0 2006.232.08:08:01.17#ibcon#*mode == 0, iclass 17, count 0 2006.232.08:08:01.17#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.232.08:08:01.17#ibcon#[28=FRQ=03,656.99\r\n] 2006.232.08:08:01.17#ibcon#*before write, iclass 17, count 0 2006.232.08:08:01.17#ibcon#enter sib2, iclass 17, count 0 2006.232.08:08:01.17#ibcon#flushed, iclass 17, count 0 2006.232.08:08:01.17#ibcon#about to write, iclass 17, count 0 2006.232.08:08:01.17#ibcon#wrote, iclass 17, count 0 2006.232.08:08:01.17#ibcon#about to read 3, iclass 17, count 0 2006.232.08:08:01.21#ibcon#read 3, iclass 17, count 0 2006.232.08:08:01.21#ibcon#about to read 4, iclass 17, count 0 2006.232.08:08:01.21#ibcon#read 4, iclass 17, count 0 2006.232.08:08:01.21#ibcon#about to read 5, iclass 17, count 0 2006.232.08:08:01.21#ibcon#read 5, iclass 17, count 0 2006.232.08:08:01.21#ibcon#about to read 6, iclass 17, count 0 2006.232.08:08:01.21#ibcon#read 6, iclass 17, count 0 2006.232.08:08:01.21#ibcon#end of sib2, iclass 17, count 0 2006.232.08:08:01.21#ibcon#*after write, iclass 17, count 0 2006.232.08:08:01.21#ibcon#*before return 0, iclass 17, count 0 2006.232.08:08:01.21#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.232.08:08:01.21#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.232.08:08:01.21#ibcon#about to clear, iclass 17 cls_cnt 0 2006.232.08:08:01.21#ibcon#cleared, iclass 17 cls_cnt 0 2006.232.08:08:01.21$vc4f8/vb=3,4 2006.232.08:08:01.21#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.232.08:08:01.21#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.232.08:08:01.21#ibcon#ireg 11 cls_cnt 2 2006.232.08:08:01.21#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.232.08:08:01.27#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.232.08:08:01.27#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.232.08:08:01.27#ibcon#enter wrdev, iclass 19, count 2 2006.232.08:08:01.27#ibcon#first serial, iclass 19, count 2 2006.232.08:08:01.27#ibcon#enter sib2, iclass 19, count 2 2006.232.08:08:01.27#ibcon#flushed, iclass 19, count 2 2006.232.08:08:01.27#ibcon#about to write, iclass 19, count 2 2006.232.08:08:01.27#ibcon#wrote, iclass 19, count 2 2006.232.08:08:01.27#ibcon#about to read 3, iclass 19, count 2 2006.232.08:08:01.29#ibcon#read 3, iclass 19, count 2 2006.232.08:08:01.29#ibcon#about to read 4, iclass 19, count 2 2006.232.08:08:01.29#ibcon#read 4, iclass 19, count 2 2006.232.08:08:01.29#ibcon#about to read 5, iclass 19, count 2 2006.232.08:08:01.29#ibcon#read 5, iclass 19, count 2 2006.232.08:08:01.29#ibcon#about to read 6, iclass 19, count 2 2006.232.08:08:01.29#ibcon#read 6, iclass 19, count 2 2006.232.08:08:01.29#ibcon#end of sib2, iclass 19, count 2 2006.232.08:08:01.29#ibcon#*mode == 0, iclass 19, count 2 2006.232.08:08:01.29#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.232.08:08:01.29#ibcon#[27=AT03-04\r\n] 2006.232.08:08:01.29#ibcon#*before write, iclass 19, count 2 2006.232.08:08:01.29#ibcon#enter sib2, iclass 19, count 2 2006.232.08:08:01.29#ibcon#flushed, iclass 19, count 2 2006.232.08:08:01.29#ibcon#about to write, iclass 19, count 2 2006.232.08:08:01.29#ibcon#wrote, iclass 19, count 2 2006.232.08:08:01.29#ibcon#about to read 3, iclass 19, count 2 2006.232.08:08:01.32#ibcon#read 3, iclass 19, count 2 2006.232.08:08:01.32#ibcon#about to read 4, iclass 19, count 2 2006.232.08:08:01.32#ibcon#read 4, iclass 19, count 2 2006.232.08:08:01.32#ibcon#about to read 5, iclass 19, count 2 2006.232.08:08:01.32#ibcon#read 5, iclass 19, count 2 2006.232.08:08:01.32#ibcon#about to read 6, iclass 19, count 2 2006.232.08:08:01.32#ibcon#read 6, iclass 19, count 2 2006.232.08:08:01.32#ibcon#end of sib2, iclass 19, count 2 2006.232.08:08:01.32#ibcon#*after write, iclass 19, count 2 2006.232.08:08:01.32#ibcon#*before return 0, iclass 19, count 2 2006.232.08:08:01.32#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.232.08:08:01.32#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.232.08:08:01.32#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.232.08:08:01.32#ibcon#ireg 7 cls_cnt 0 2006.232.08:08:01.32#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.232.08:08:01.44#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.232.08:08:01.44#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.232.08:08:01.44#ibcon#enter wrdev, iclass 19, count 0 2006.232.08:08:01.44#ibcon#first serial, iclass 19, count 0 2006.232.08:08:01.44#ibcon#enter sib2, iclass 19, count 0 2006.232.08:08:01.44#ibcon#flushed, iclass 19, count 0 2006.232.08:08:01.44#ibcon#about to write, iclass 19, count 0 2006.232.08:08:01.44#ibcon#wrote, iclass 19, count 0 2006.232.08:08:01.44#ibcon#about to read 3, iclass 19, count 0 2006.232.08:08:01.46#ibcon#read 3, iclass 19, count 0 2006.232.08:08:01.46#ibcon#about to read 4, iclass 19, count 0 2006.232.08:08:01.46#ibcon#read 4, iclass 19, count 0 2006.232.08:08:01.46#ibcon#about to read 5, iclass 19, count 0 2006.232.08:08:01.46#ibcon#read 5, iclass 19, count 0 2006.232.08:08:01.46#ibcon#about to read 6, iclass 19, count 0 2006.232.08:08:01.46#ibcon#read 6, iclass 19, count 0 2006.232.08:08:01.46#ibcon#end of sib2, iclass 19, count 0 2006.232.08:08:01.46#ibcon#*mode == 0, iclass 19, count 0 2006.232.08:08:01.46#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.232.08:08:01.46#ibcon#[27=USB\r\n] 2006.232.08:08:01.46#ibcon#*before write, iclass 19, count 0 2006.232.08:08:01.46#ibcon#enter sib2, iclass 19, count 0 2006.232.08:08:01.46#ibcon#flushed, iclass 19, count 0 2006.232.08:08:01.46#ibcon#about to write, iclass 19, count 0 2006.232.08:08:01.46#ibcon#wrote, iclass 19, count 0 2006.232.08:08:01.46#ibcon#about to read 3, iclass 19, count 0 2006.232.08:08:01.49#ibcon#read 3, iclass 19, count 0 2006.232.08:08:01.49#ibcon#about to read 4, iclass 19, count 0 2006.232.08:08:01.49#ibcon#read 4, iclass 19, count 0 2006.232.08:08:01.49#ibcon#about to read 5, iclass 19, count 0 2006.232.08:08:01.49#ibcon#read 5, iclass 19, count 0 2006.232.08:08:01.49#ibcon#about to read 6, iclass 19, count 0 2006.232.08:08:01.49#ibcon#read 6, iclass 19, count 0 2006.232.08:08:01.49#ibcon#end of sib2, iclass 19, count 0 2006.232.08:08:01.49#ibcon#*after write, iclass 19, count 0 2006.232.08:08:01.49#ibcon#*before return 0, iclass 19, count 0 2006.232.08:08:01.49#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.232.08:08:01.49#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.232.08:08:01.49#ibcon#about to clear, iclass 19 cls_cnt 0 2006.232.08:08:01.49#ibcon#cleared, iclass 19 cls_cnt 0 2006.232.08:08:01.49$vc4f8/vblo=4,712.99 2006.232.08:08:01.49#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.232.08:08:01.49#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.232.08:08:01.49#ibcon#ireg 17 cls_cnt 0 2006.232.08:08:01.49#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.232.08:08:01.49#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.232.08:08:01.49#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.232.08:08:01.49#ibcon#enter wrdev, iclass 21, count 0 2006.232.08:08:01.49#ibcon#first serial, iclass 21, count 0 2006.232.08:08:01.49#ibcon#enter sib2, iclass 21, count 0 2006.232.08:08:01.49#ibcon#flushed, iclass 21, count 0 2006.232.08:08:01.49#ibcon#about to write, iclass 21, count 0 2006.232.08:08:01.49#ibcon#wrote, iclass 21, count 0 2006.232.08:08:01.49#ibcon#about to read 3, iclass 21, count 0 2006.232.08:08:01.51#ibcon#read 3, iclass 21, count 0 2006.232.08:08:01.51#ibcon#about to read 4, iclass 21, count 0 2006.232.08:08:01.51#ibcon#read 4, iclass 21, count 0 2006.232.08:08:01.51#ibcon#about to read 5, iclass 21, count 0 2006.232.08:08:01.51#ibcon#read 5, iclass 21, count 0 2006.232.08:08:01.51#ibcon#about to read 6, iclass 21, count 0 2006.232.08:08:01.51#ibcon#read 6, iclass 21, count 0 2006.232.08:08:01.51#ibcon#end of sib2, iclass 21, count 0 2006.232.08:08:01.51#ibcon#*mode == 0, iclass 21, count 0 2006.232.08:08:01.51#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.232.08:08:01.51#ibcon#[28=FRQ=04,712.99\r\n] 2006.232.08:08:01.51#ibcon#*before write, iclass 21, count 0 2006.232.08:08:01.51#ibcon#enter sib2, iclass 21, count 0 2006.232.08:08:01.51#ibcon#flushed, iclass 21, count 0 2006.232.08:08:01.51#ibcon#about to write, iclass 21, count 0 2006.232.08:08:01.51#ibcon#wrote, iclass 21, count 0 2006.232.08:08:01.51#ibcon#about to read 3, iclass 21, count 0 2006.232.08:08:01.55#ibcon#read 3, iclass 21, count 0 2006.232.08:08:01.55#ibcon#about to read 4, iclass 21, count 0 2006.232.08:08:01.55#ibcon#read 4, iclass 21, count 0 2006.232.08:08:01.55#ibcon#about to read 5, iclass 21, count 0 2006.232.08:08:01.55#ibcon#read 5, iclass 21, count 0 2006.232.08:08:01.55#ibcon#about to read 6, iclass 21, count 0 2006.232.08:08:01.55#ibcon#read 6, iclass 21, count 0 2006.232.08:08:01.55#ibcon#end of sib2, iclass 21, count 0 2006.232.08:08:01.55#ibcon#*after write, iclass 21, count 0 2006.232.08:08:01.55#ibcon#*before return 0, iclass 21, count 0 2006.232.08:08:01.55#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.232.08:08:01.55#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.232.08:08:01.55#ibcon#about to clear, iclass 21 cls_cnt 0 2006.232.08:08:01.55#ibcon#cleared, iclass 21 cls_cnt 0 2006.232.08:08:01.55$vc4f8/vb=4,4 2006.232.08:08:01.55#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.232.08:08:01.55#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.232.08:08:01.55#ibcon#ireg 11 cls_cnt 2 2006.232.08:08:01.55#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.232.08:08:01.61#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.232.08:08:01.61#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.232.08:08:01.61#ibcon#enter wrdev, iclass 23, count 2 2006.232.08:08:01.61#ibcon#first serial, iclass 23, count 2 2006.232.08:08:01.61#ibcon#enter sib2, iclass 23, count 2 2006.232.08:08:01.61#ibcon#flushed, iclass 23, count 2 2006.232.08:08:01.61#ibcon#about to write, iclass 23, count 2 2006.232.08:08:01.61#ibcon#wrote, iclass 23, count 2 2006.232.08:08:01.61#ibcon#about to read 3, iclass 23, count 2 2006.232.08:08:01.63#ibcon#read 3, iclass 23, count 2 2006.232.08:08:01.63#ibcon#about to read 4, iclass 23, count 2 2006.232.08:08:01.63#ibcon#read 4, iclass 23, count 2 2006.232.08:08:01.63#ibcon#about to read 5, iclass 23, count 2 2006.232.08:08:01.63#ibcon#read 5, iclass 23, count 2 2006.232.08:08:01.63#ibcon#about to read 6, iclass 23, count 2 2006.232.08:08:01.63#ibcon#read 6, iclass 23, count 2 2006.232.08:08:01.63#ibcon#end of sib2, iclass 23, count 2 2006.232.08:08:01.63#ibcon#*mode == 0, iclass 23, count 2 2006.232.08:08:01.63#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.232.08:08:01.63#ibcon#[27=AT04-04\r\n] 2006.232.08:08:01.63#ibcon#*before write, iclass 23, count 2 2006.232.08:08:01.63#ibcon#enter sib2, iclass 23, count 2 2006.232.08:08:01.63#ibcon#flushed, iclass 23, count 2 2006.232.08:08:01.63#ibcon#about to write, iclass 23, count 2 2006.232.08:08:01.63#ibcon#wrote, iclass 23, count 2 2006.232.08:08:01.63#ibcon#about to read 3, iclass 23, count 2 2006.232.08:08:01.66#ibcon#read 3, iclass 23, count 2 2006.232.08:08:01.66#ibcon#about to read 4, iclass 23, count 2 2006.232.08:08:01.66#ibcon#read 4, iclass 23, count 2 2006.232.08:08:01.66#ibcon#about to read 5, iclass 23, count 2 2006.232.08:08:01.66#ibcon#read 5, iclass 23, count 2 2006.232.08:08:01.66#ibcon#about to read 6, iclass 23, count 2 2006.232.08:08:01.66#ibcon#read 6, iclass 23, count 2 2006.232.08:08:01.66#ibcon#end of sib2, iclass 23, count 2 2006.232.08:08:01.66#ibcon#*after write, iclass 23, count 2 2006.232.08:08:01.66#ibcon#*before return 0, iclass 23, count 2 2006.232.08:08:01.66#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.232.08:08:01.66#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.232.08:08:01.66#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.232.08:08:01.66#ibcon#ireg 7 cls_cnt 0 2006.232.08:08:01.66#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.232.08:08:01.78#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.232.08:08:01.78#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.232.08:08:01.78#ibcon#enter wrdev, iclass 23, count 0 2006.232.08:08:01.78#ibcon#first serial, iclass 23, count 0 2006.232.08:08:01.78#ibcon#enter sib2, iclass 23, count 0 2006.232.08:08:01.78#ibcon#flushed, iclass 23, count 0 2006.232.08:08:01.78#ibcon#about to write, iclass 23, count 0 2006.232.08:08:01.78#ibcon#wrote, iclass 23, count 0 2006.232.08:08:01.78#ibcon#about to read 3, iclass 23, count 0 2006.232.08:08:01.80#ibcon#read 3, iclass 23, count 0 2006.232.08:08:01.80#ibcon#about to read 4, iclass 23, count 0 2006.232.08:08:01.80#ibcon#read 4, iclass 23, count 0 2006.232.08:08:01.80#ibcon#about to read 5, iclass 23, count 0 2006.232.08:08:01.80#ibcon#read 5, iclass 23, count 0 2006.232.08:08:01.80#ibcon#about to read 6, iclass 23, count 0 2006.232.08:08:01.80#ibcon#read 6, iclass 23, count 0 2006.232.08:08:01.80#ibcon#end of sib2, iclass 23, count 0 2006.232.08:08:01.80#ibcon#*mode == 0, iclass 23, count 0 2006.232.08:08:01.80#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.232.08:08:01.80#ibcon#[27=USB\r\n] 2006.232.08:08:01.80#ibcon#*before write, iclass 23, count 0 2006.232.08:08:01.80#ibcon#enter sib2, iclass 23, count 0 2006.232.08:08:01.80#ibcon#flushed, iclass 23, count 0 2006.232.08:08:01.80#ibcon#about to write, iclass 23, count 0 2006.232.08:08:01.80#ibcon#wrote, iclass 23, count 0 2006.232.08:08:01.80#ibcon#about to read 3, iclass 23, count 0 2006.232.08:08:01.83#ibcon#read 3, iclass 23, count 0 2006.232.08:08:01.83#ibcon#about to read 4, iclass 23, count 0 2006.232.08:08:01.83#ibcon#read 4, iclass 23, count 0 2006.232.08:08:01.83#ibcon#about to read 5, iclass 23, count 0 2006.232.08:08:01.83#ibcon#read 5, iclass 23, count 0 2006.232.08:08:01.83#ibcon#about to read 6, iclass 23, count 0 2006.232.08:08:01.83#ibcon#read 6, iclass 23, count 0 2006.232.08:08:01.83#ibcon#end of sib2, iclass 23, count 0 2006.232.08:08:01.83#ibcon#*after write, iclass 23, count 0 2006.232.08:08:01.83#ibcon#*before return 0, iclass 23, count 0 2006.232.08:08:01.83#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.232.08:08:01.83#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.232.08:08:01.83#ibcon#about to clear, iclass 23 cls_cnt 0 2006.232.08:08:01.83#ibcon#cleared, iclass 23 cls_cnt 0 2006.232.08:08:01.83$vc4f8/vblo=5,744.99 2006.232.08:08:01.83#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.232.08:08:01.83#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.232.08:08:01.83#ibcon#ireg 17 cls_cnt 0 2006.232.08:08:01.83#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:08:01.83#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:08:01.83#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:08:01.83#ibcon#enter wrdev, iclass 25, count 0 2006.232.08:08:01.83#ibcon#first serial, iclass 25, count 0 2006.232.08:08:01.83#ibcon#enter sib2, iclass 25, count 0 2006.232.08:08:01.83#ibcon#flushed, iclass 25, count 0 2006.232.08:08:01.83#ibcon#about to write, iclass 25, count 0 2006.232.08:08:01.83#ibcon#wrote, iclass 25, count 0 2006.232.08:08:01.83#ibcon#about to read 3, iclass 25, count 0 2006.232.08:08:01.85#ibcon#read 3, iclass 25, count 0 2006.232.08:08:01.85#ibcon#about to read 4, iclass 25, count 0 2006.232.08:08:01.85#ibcon#read 4, iclass 25, count 0 2006.232.08:08:01.85#ibcon#about to read 5, iclass 25, count 0 2006.232.08:08:01.85#ibcon#read 5, iclass 25, count 0 2006.232.08:08:01.85#ibcon#about to read 6, iclass 25, count 0 2006.232.08:08:01.85#ibcon#read 6, iclass 25, count 0 2006.232.08:08:01.85#ibcon#end of sib2, iclass 25, count 0 2006.232.08:08:01.85#ibcon#*mode == 0, iclass 25, count 0 2006.232.08:08:01.85#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.232.08:08:01.85#ibcon#[28=FRQ=05,744.99\r\n] 2006.232.08:08:01.85#ibcon#*before write, iclass 25, count 0 2006.232.08:08:01.85#ibcon#enter sib2, iclass 25, count 0 2006.232.08:08:01.85#ibcon#flushed, iclass 25, count 0 2006.232.08:08:01.85#ibcon#about to write, iclass 25, count 0 2006.232.08:08:01.85#ibcon#wrote, iclass 25, count 0 2006.232.08:08:01.85#ibcon#about to read 3, iclass 25, count 0 2006.232.08:08:01.89#ibcon#read 3, iclass 25, count 0 2006.232.08:08:01.89#ibcon#about to read 4, iclass 25, count 0 2006.232.08:08:01.89#ibcon#read 4, iclass 25, count 0 2006.232.08:08:01.89#ibcon#about to read 5, iclass 25, count 0 2006.232.08:08:01.89#ibcon#read 5, iclass 25, count 0 2006.232.08:08:01.89#ibcon#about to read 6, iclass 25, count 0 2006.232.08:08:01.89#ibcon#read 6, iclass 25, count 0 2006.232.08:08:01.89#ibcon#end of sib2, iclass 25, count 0 2006.232.08:08:01.89#ibcon#*after write, iclass 25, count 0 2006.232.08:08:01.89#ibcon#*before return 0, iclass 25, count 0 2006.232.08:08:01.89#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:08:01.89#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:08:01.89#ibcon#about to clear, iclass 25 cls_cnt 0 2006.232.08:08:01.89#ibcon#cleared, iclass 25 cls_cnt 0 2006.232.08:08:01.89$vc4f8/vb=5,3 2006.232.08:08:01.89#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.232.08:08:01.89#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.232.08:08:01.89#ibcon#ireg 11 cls_cnt 2 2006.232.08:08:01.89#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:08:01.95#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:08:01.95#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:08:01.95#ibcon#enter wrdev, iclass 27, count 2 2006.232.08:08:01.95#ibcon#first serial, iclass 27, count 2 2006.232.08:08:01.95#ibcon#enter sib2, iclass 27, count 2 2006.232.08:08:01.95#ibcon#flushed, iclass 27, count 2 2006.232.08:08:01.95#ibcon#about to write, iclass 27, count 2 2006.232.08:08:01.95#ibcon#wrote, iclass 27, count 2 2006.232.08:08:01.95#ibcon#about to read 3, iclass 27, count 2 2006.232.08:08:01.97#ibcon#read 3, iclass 27, count 2 2006.232.08:08:01.97#ibcon#about to read 4, iclass 27, count 2 2006.232.08:08:01.97#ibcon#read 4, iclass 27, count 2 2006.232.08:08:01.97#ibcon#about to read 5, iclass 27, count 2 2006.232.08:08:01.97#ibcon#read 5, iclass 27, count 2 2006.232.08:08:01.97#ibcon#about to read 6, iclass 27, count 2 2006.232.08:08:01.97#ibcon#read 6, iclass 27, count 2 2006.232.08:08:01.97#ibcon#end of sib2, iclass 27, count 2 2006.232.08:08:01.97#ibcon#*mode == 0, iclass 27, count 2 2006.232.08:08:01.97#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.232.08:08:01.97#ibcon#[27=AT05-03\r\n] 2006.232.08:08:01.97#ibcon#*before write, iclass 27, count 2 2006.232.08:08:01.97#ibcon#enter sib2, iclass 27, count 2 2006.232.08:08:01.97#ibcon#flushed, iclass 27, count 2 2006.232.08:08:01.97#ibcon#about to write, iclass 27, count 2 2006.232.08:08:01.97#ibcon#wrote, iclass 27, count 2 2006.232.08:08:01.97#ibcon#about to read 3, iclass 27, count 2 2006.232.08:08:02.00#ibcon#read 3, iclass 27, count 2 2006.232.08:08:02.00#ibcon#about to read 4, iclass 27, count 2 2006.232.08:08:02.00#ibcon#read 4, iclass 27, count 2 2006.232.08:08:02.00#ibcon#about to read 5, iclass 27, count 2 2006.232.08:08:02.00#ibcon#read 5, iclass 27, count 2 2006.232.08:08:02.00#ibcon#about to read 6, iclass 27, count 2 2006.232.08:08:02.00#ibcon#read 6, iclass 27, count 2 2006.232.08:08:02.00#ibcon#end of sib2, iclass 27, count 2 2006.232.08:08:02.00#ibcon#*after write, iclass 27, count 2 2006.232.08:08:02.00#ibcon#*before return 0, iclass 27, count 2 2006.232.08:08:02.00#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:08:02.00#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:08:02.00#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.232.08:08:02.00#ibcon#ireg 7 cls_cnt 0 2006.232.08:08:02.00#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:08:02.12#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:08:02.12#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:08:02.12#ibcon#enter wrdev, iclass 27, count 0 2006.232.08:08:02.12#ibcon#first serial, iclass 27, count 0 2006.232.08:08:02.12#ibcon#enter sib2, iclass 27, count 0 2006.232.08:08:02.12#ibcon#flushed, iclass 27, count 0 2006.232.08:08:02.12#ibcon#about to write, iclass 27, count 0 2006.232.08:08:02.12#ibcon#wrote, iclass 27, count 0 2006.232.08:08:02.12#ibcon#about to read 3, iclass 27, count 0 2006.232.08:08:02.14#ibcon#read 3, iclass 27, count 0 2006.232.08:08:02.14#ibcon#about to read 4, iclass 27, count 0 2006.232.08:08:02.14#ibcon#read 4, iclass 27, count 0 2006.232.08:08:02.14#ibcon#about to read 5, iclass 27, count 0 2006.232.08:08:02.14#ibcon#read 5, iclass 27, count 0 2006.232.08:08:02.14#ibcon#about to read 6, iclass 27, count 0 2006.232.08:08:02.14#ibcon#read 6, iclass 27, count 0 2006.232.08:08:02.14#ibcon#end of sib2, iclass 27, count 0 2006.232.08:08:02.14#ibcon#*mode == 0, iclass 27, count 0 2006.232.08:08:02.14#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.232.08:08:02.14#ibcon#[27=USB\r\n] 2006.232.08:08:02.14#ibcon#*before write, iclass 27, count 0 2006.232.08:08:02.14#ibcon#enter sib2, iclass 27, count 0 2006.232.08:08:02.14#ibcon#flushed, iclass 27, count 0 2006.232.08:08:02.14#ibcon#about to write, iclass 27, count 0 2006.232.08:08:02.14#ibcon#wrote, iclass 27, count 0 2006.232.08:08:02.14#ibcon#about to read 3, iclass 27, count 0 2006.232.08:08:02.17#ibcon#read 3, iclass 27, count 0 2006.232.08:08:02.17#ibcon#about to read 4, iclass 27, count 0 2006.232.08:08:02.17#ibcon#read 4, iclass 27, count 0 2006.232.08:08:02.17#ibcon#about to read 5, iclass 27, count 0 2006.232.08:08:02.17#ibcon#read 5, iclass 27, count 0 2006.232.08:08:02.17#ibcon#about to read 6, iclass 27, count 0 2006.232.08:08:02.17#ibcon#read 6, iclass 27, count 0 2006.232.08:08:02.17#ibcon#end of sib2, iclass 27, count 0 2006.232.08:08:02.17#ibcon#*after write, iclass 27, count 0 2006.232.08:08:02.17#ibcon#*before return 0, iclass 27, count 0 2006.232.08:08:02.17#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:08:02.17#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:08:02.17#ibcon#about to clear, iclass 27 cls_cnt 0 2006.232.08:08:02.17#ibcon#cleared, iclass 27 cls_cnt 0 2006.232.08:08:02.17$vc4f8/vblo=6,752.99 2006.232.08:08:02.17#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.232.08:08:02.17#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.232.08:08:02.17#ibcon#ireg 17 cls_cnt 0 2006.232.08:08:02.17#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:08:02.17#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:08:02.17#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:08:02.17#ibcon#enter wrdev, iclass 29, count 0 2006.232.08:08:02.17#ibcon#first serial, iclass 29, count 0 2006.232.08:08:02.17#ibcon#enter sib2, iclass 29, count 0 2006.232.08:08:02.17#ibcon#flushed, iclass 29, count 0 2006.232.08:08:02.17#ibcon#about to write, iclass 29, count 0 2006.232.08:08:02.17#ibcon#wrote, iclass 29, count 0 2006.232.08:08:02.17#ibcon#about to read 3, iclass 29, count 0 2006.232.08:08:02.19#ibcon#read 3, iclass 29, count 0 2006.232.08:08:02.19#ibcon#about to read 4, iclass 29, count 0 2006.232.08:08:02.19#ibcon#read 4, iclass 29, count 0 2006.232.08:08:02.19#ibcon#about to read 5, iclass 29, count 0 2006.232.08:08:02.19#ibcon#read 5, iclass 29, count 0 2006.232.08:08:02.19#ibcon#about to read 6, iclass 29, count 0 2006.232.08:08:02.19#ibcon#read 6, iclass 29, count 0 2006.232.08:08:02.19#ibcon#end of sib2, iclass 29, count 0 2006.232.08:08:02.19#ibcon#*mode == 0, iclass 29, count 0 2006.232.08:08:02.19#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.232.08:08:02.19#ibcon#[28=FRQ=06,752.99\r\n] 2006.232.08:08:02.19#ibcon#*before write, iclass 29, count 0 2006.232.08:08:02.19#ibcon#enter sib2, iclass 29, count 0 2006.232.08:08:02.19#ibcon#flushed, iclass 29, count 0 2006.232.08:08:02.19#ibcon#about to write, iclass 29, count 0 2006.232.08:08:02.19#ibcon#wrote, iclass 29, count 0 2006.232.08:08:02.19#ibcon#about to read 3, iclass 29, count 0 2006.232.08:08:02.23#ibcon#read 3, iclass 29, count 0 2006.232.08:08:02.23#ibcon#about to read 4, iclass 29, count 0 2006.232.08:08:02.23#ibcon#read 4, iclass 29, count 0 2006.232.08:08:02.23#ibcon#about to read 5, iclass 29, count 0 2006.232.08:08:02.23#ibcon#read 5, iclass 29, count 0 2006.232.08:08:02.23#ibcon#about to read 6, iclass 29, count 0 2006.232.08:08:02.23#ibcon#read 6, iclass 29, count 0 2006.232.08:08:02.23#ibcon#end of sib2, iclass 29, count 0 2006.232.08:08:02.23#ibcon#*after write, iclass 29, count 0 2006.232.08:08:02.23#ibcon#*before return 0, iclass 29, count 0 2006.232.08:08:02.23#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:08:02.23#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:08:02.23#ibcon#about to clear, iclass 29 cls_cnt 0 2006.232.08:08:02.23#ibcon#cleared, iclass 29 cls_cnt 0 2006.232.08:08:02.23$vc4f8/vb=6,4 2006.232.08:08:02.23#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.232.08:08:02.23#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.232.08:08:02.23#ibcon#ireg 11 cls_cnt 2 2006.232.08:08:02.23#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.232.08:08:02.29#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.232.08:08:02.29#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.232.08:08:02.29#ibcon#enter wrdev, iclass 31, count 2 2006.232.08:08:02.29#ibcon#first serial, iclass 31, count 2 2006.232.08:08:02.29#ibcon#enter sib2, iclass 31, count 2 2006.232.08:08:02.29#ibcon#flushed, iclass 31, count 2 2006.232.08:08:02.29#ibcon#about to write, iclass 31, count 2 2006.232.08:08:02.29#ibcon#wrote, iclass 31, count 2 2006.232.08:08:02.29#ibcon#about to read 3, iclass 31, count 2 2006.232.08:08:02.31#ibcon#read 3, iclass 31, count 2 2006.232.08:08:02.31#ibcon#about to read 4, iclass 31, count 2 2006.232.08:08:02.31#ibcon#read 4, iclass 31, count 2 2006.232.08:08:02.31#ibcon#about to read 5, iclass 31, count 2 2006.232.08:08:02.31#ibcon#read 5, iclass 31, count 2 2006.232.08:08:02.31#ibcon#about to read 6, iclass 31, count 2 2006.232.08:08:02.31#ibcon#read 6, iclass 31, count 2 2006.232.08:08:02.31#ibcon#end of sib2, iclass 31, count 2 2006.232.08:08:02.31#ibcon#*mode == 0, iclass 31, count 2 2006.232.08:08:02.31#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.232.08:08:02.31#ibcon#[27=AT06-04\r\n] 2006.232.08:08:02.31#ibcon#*before write, iclass 31, count 2 2006.232.08:08:02.31#ibcon#enter sib2, iclass 31, count 2 2006.232.08:08:02.31#ibcon#flushed, iclass 31, count 2 2006.232.08:08:02.31#ibcon#about to write, iclass 31, count 2 2006.232.08:08:02.31#ibcon#wrote, iclass 31, count 2 2006.232.08:08:02.31#ibcon#about to read 3, iclass 31, count 2 2006.232.08:08:02.34#ibcon#read 3, iclass 31, count 2 2006.232.08:08:02.34#ibcon#about to read 4, iclass 31, count 2 2006.232.08:08:02.34#ibcon#read 4, iclass 31, count 2 2006.232.08:08:02.34#ibcon#about to read 5, iclass 31, count 2 2006.232.08:08:02.34#ibcon#read 5, iclass 31, count 2 2006.232.08:08:02.34#ibcon#about to read 6, iclass 31, count 2 2006.232.08:08:02.34#ibcon#read 6, iclass 31, count 2 2006.232.08:08:02.34#ibcon#end of sib2, iclass 31, count 2 2006.232.08:08:02.34#ibcon#*after write, iclass 31, count 2 2006.232.08:08:02.34#ibcon#*before return 0, iclass 31, count 2 2006.232.08:08:02.34#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.232.08:08:02.34#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.232.08:08:02.34#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.232.08:08:02.34#ibcon#ireg 7 cls_cnt 0 2006.232.08:08:02.34#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.232.08:08:02.46#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.232.08:08:02.46#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.232.08:08:02.46#ibcon#enter wrdev, iclass 31, count 0 2006.232.08:08:02.46#ibcon#first serial, iclass 31, count 0 2006.232.08:08:02.46#ibcon#enter sib2, iclass 31, count 0 2006.232.08:08:02.46#ibcon#flushed, iclass 31, count 0 2006.232.08:08:02.46#ibcon#about to write, iclass 31, count 0 2006.232.08:08:02.46#ibcon#wrote, iclass 31, count 0 2006.232.08:08:02.46#ibcon#about to read 3, iclass 31, count 0 2006.232.08:08:02.48#ibcon#read 3, iclass 31, count 0 2006.232.08:08:02.48#ibcon#about to read 4, iclass 31, count 0 2006.232.08:08:02.48#ibcon#read 4, iclass 31, count 0 2006.232.08:08:02.48#ibcon#about to read 5, iclass 31, count 0 2006.232.08:08:02.48#ibcon#read 5, iclass 31, count 0 2006.232.08:08:02.48#ibcon#about to read 6, iclass 31, count 0 2006.232.08:08:02.48#ibcon#read 6, iclass 31, count 0 2006.232.08:08:02.48#ibcon#end of sib2, iclass 31, count 0 2006.232.08:08:02.48#ibcon#*mode == 0, iclass 31, count 0 2006.232.08:08:02.48#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.232.08:08:02.48#ibcon#[27=USB\r\n] 2006.232.08:08:02.48#ibcon#*before write, iclass 31, count 0 2006.232.08:08:02.48#ibcon#enter sib2, iclass 31, count 0 2006.232.08:08:02.48#ibcon#flushed, iclass 31, count 0 2006.232.08:08:02.48#ibcon#about to write, iclass 31, count 0 2006.232.08:08:02.48#ibcon#wrote, iclass 31, count 0 2006.232.08:08:02.48#ibcon#about to read 3, iclass 31, count 0 2006.232.08:08:02.51#ibcon#read 3, iclass 31, count 0 2006.232.08:08:02.51#ibcon#about to read 4, iclass 31, count 0 2006.232.08:08:02.51#ibcon#read 4, iclass 31, count 0 2006.232.08:08:02.51#ibcon#about to read 5, iclass 31, count 0 2006.232.08:08:02.51#ibcon#read 5, iclass 31, count 0 2006.232.08:08:02.51#ibcon#about to read 6, iclass 31, count 0 2006.232.08:08:02.51#ibcon#read 6, iclass 31, count 0 2006.232.08:08:02.51#ibcon#end of sib2, iclass 31, count 0 2006.232.08:08:02.51#ibcon#*after write, iclass 31, count 0 2006.232.08:08:02.51#ibcon#*before return 0, iclass 31, count 0 2006.232.08:08:02.51#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.232.08:08:02.51#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.232.08:08:02.51#ibcon#about to clear, iclass 31 cls_cnt 0 2006.232.08:08:02.51#ibcon#cleared, iclass 31 cls_cnt 0 2006.232.08:08:02.51$vc4f8/vabw=wide 2006.232.08:08:02.51#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.232.08:08:02.51#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.232.08:08:02.51#ibcon#ireg 8 cls_cnt 0 2006.232.08:08:02.51#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.232.08:08:02.51#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.232.08:08:02.51#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.232.08:08:02.51#ibcon#enter wrdev, iclass 33, count 0 2006.232.08:08:02.51#ibcon#first serial, iclass 33, count 0 2006.232.08:08:02.51#ibcon#enter sib2, iclass 33, count 0 2006.232.08:08:02.51#ibcon#flushed, iclass 33, count 0 2006.232.08:08:02.51#ibcon#about to write, iclass 33, count 0 2006.232.08:08:02.51#ibcon#wrote, iclass 33, count 0 2006.232.08:08:02.51#ibcon#about to read 3, iclass 33, count 0 2006.232.08:08:02.53#ibcon#read 3, iclass 33, count 0 2006.232.08:08:02.53#ibcon#about to read 4, iclass 33, count 0 2006.232.08:08:02.53#ibcon#read 4, iclass 33, count 0 2006.232.08:08:02.53#ibcon#about to read 5, iclass 33, count 0 2006.232.08:08:02.53#ibcon#read 5, iclass 33, count 0 2006.232.08:08:02.53#ibcon#about to read 6, iclass 33, count 0 2006.232.08:08:02.53#ibcon#read 6, iclass 33, count 0 2006.232.08:08:02.53#ibcon#end of sib2, iclass 33, count 0 2006.232.08:08:02.53#ibcon#*mode == 0, iclass 33, count 0 2006.232.08:08:02.53#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.232.08:08:02.53#ibcon#[25=BW32\r\n] 2006.232.08:08:02.53#ibcon#*before write, iclass 33, count 0 2006.232.08:08:02.53#ibcon#enter sib2, iclass 33, count 0 2006.232.08:08:02.53#ibcon#flushed, iclass 33, count 0 2006.232.08:08:02.53#ibcon#about to write, iclass 33, count 0 2006.232.08:08:02.53#ibcon#wrote, iclass 33, count 0 2006.232.08:08:02.53#ibcon#about to read 3, iclass 33, count 0 2006.232.08:08:02.56#ibcon#read 3, iclass 33, count 0 2006.232.08:08:02.56#ibcon#about to read 4, iclass 33, count 0 2006.232.08:08:02.56#ibcon#read 4, iclass 33, count 0 2006.232.08:08:02.56#ibcon#about to read 5, iclass 33, count 0 2006.232.08:08:02.56#ibcon#read 5, iclass 33, count 0 2006.232.08:08:02.56#ibcon#about to read 6, iclass 33, count 0 2006.232.08:08:02.56#ibcon#read 6, iclass 33, count 0 2006.232.08:08:02.56#ibcon#end of sib2, iclass 33, count 0 2006.232.08:08:02.56#ibcon#*after write, iclass 33, count 0 2006.232.08:08:02.56#ibcon#*before return 0, iclass 33, count 0 2006.232.08:08:02.56#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.232.08:08:02.56#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.232.08:08:02.56#ibcon#about to clear, iclass 33 cls_cnt 0 2006.232.08:08:02.56#ibcon#cleared, iclass 33 cls_cnt 0 2006.232.08:08:02.56$vc4f8/vbbw=wide 2006.232.08:08:02.56#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.232.08:08:02.56#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.232.08:08:02.56#ibcon#ireg 8 cls_cnt 0 2006.232.08:08:02.56#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.232.08:08:02.63#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.232.08:08:02.63#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.232.08:08:02.63#ibcon#enter wrdev, iclass 35, count 0 2006.232.08:08:02.63#ibcon#first serial, iclass 35, count 0 2006.232.08:08:02.63#ibcon#enter sib2, iclass 35, count 0 2006.232.08:08:02.63#ibcon#flushed, iclass 35, count 0 2006.232.08:08:02.63#ibcon#about to write, iclass 35, count 0 2006.232.08:08:02.63#ibcon#wrote, iclass 35, count 0 2006.232.08:08:02.63#ibcon#about to read 3, iclass 35, count 0 2006.232.08:08:02.65#ibcon#read 3, iclass 35, count 0 2006.232.08:08:02.65#ibcon#about to read 4, iclass 35, count 0 2006.232.08:08:02.65#ibcon#read 4, iclass 35, count 0 2006.232.08:08:02.65#ibcon#about to read 5, iclass 35, count 0 2006.232.08:08:02.65#ibcon#read 5, iclass 35, count 0 2006.232.08:08:02.65#ibcon#about to read 6, iclass 35, count 0 2006.232.08:08:02.65#ibcon#read 6, iclass 35, count 0 2006.232.08:08:02.65#ibcon#end of sib2, iclass 35, count 0 2006.232.08:08:02.65#ibcon#*mode == 0, iclass 35, count 0 2006.232.08:08:02.65#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.232.08:08:02.65#ibcon#[27=BW32\r\n] 2006.232.08:08:02.65#ibcon#*before write, iclass 35, count 0 2006.232.08:08:02.65#ibcon#enter sib2, iclass 35, count 0 2006.232.08:08:02.65#ibcon#flushed, iclass 35, count 0 2006.232.08:08:02.65#ibcon#about to write, iclass 35, count 0 2006.232.08:08:02.65#ibcon#wrote, iclass 35, count 0 2006.232.08:08:02.65#ibcon#about to read 3, iclass 35, count 0 2006.232.08:08:02.68#ibcon#read 3, iclass 35, count 0 2006.232.08:08:02.68#ibcon#about to read 4, iclass 35, count 0 2006.232.08:08:02.68#ibcon#read 4, iclass 35, count 0 2006.232.08:08:02.68#ibcon#about to read 5, iclass 35, count 0 2006.232.08:08:02.68#ibcon#read 5, iclass 35, count 0 2006.232.08:08:02.68#ibcon#about to read 6, iclass 35, count 0 2006.232.08:08:02.68#ibcon#read 6, iclass 35, count 0 2006.232.08:08:02.68#ibcon#end of sib2, iclass 35, count 0 2006.232.08:08:02.68#ibcon#*after write, iclass 35, count 0 2006.232.08:08:02.68#ibcon#*before return 0, iclass 35, count 0 2006.232.08:08:02.68#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.232.08:08:02.68#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.232.08:08:02.68#ibcon#about to clear, iclass 35 cls_cnt 0 2006.232.08:08:02.68#ibcon#cleared, iclass 35 cls_cnt 0 2006.232.08:08:02.68$4f8m12a/ifd4f 2006.232.08:08:02.68$ifd4f/lo= 2006.232.08:08:02.68$ifd4f/lo=lo1,7680.00,usb,rcp,1 2006.232.08:08:02.68$ifd4f/lo=lo2,1600.00,usb,rcp,1 2006.232.08:08:02.68$ifd4f/lo=lo3,8080.00,usb,rcp,1 2006.232.08:08:02.68$ifd4f/patch= 2006.232.08:08:02.68$ifd4f/patch=lo1,a1,a2,a3,a4 2006.232.08:08:02.68$ifd4f/patch=lo2,b1,b2,b3,b4,b5,b6 2006.232.08:08:02.69$ifd4f/patch=lo3,a5,a6,a7,a8 2006.232.08:08:02.69$4f8m12a/"form=m,16.000,1:2 2006.232.08:08:02.69$4f8m12a/"tpicd 2006.232.08:08:02.69$4f8m12a/echo=off 2006.232.08:08:02.69$4f8m12a/xlog=off 2006.232.08:08:02.69:!2006.232.08:08:50 2006.232.08:08:29.14#trakl#Source acquired 2006.232.08:08:29.14#flagr#flagr/antenna,acquired 2006.232.08:08:50.01:preob 2006.232.08:08:51.14/onsource/TRACKING 2006.232.08:08:51.14:!2006.232.08:09:00 2006.232.08:09:00.00:data_valid=on 2006.232.08:09:00.00:midob 2006.232.08:09:00.14/onsource/TRACKING 2006.232.08:09:00.14/wx/29.36,1007.3,87 2006.232.08:09:00.30/cable/+6.3873E-03 2006.232.08:09:01.39/va/01,08,usb,yes,31,32 2006.232.08:09:01.39/va/02,07,usb,yes,30,32 2006.232.08:09:01.39/va/03,08,usb,yes,23,23 2006.232.08:09:01.39/va/04,07,usb,yes,32,34 2006.232.08:09:01.39/va/05,07,usb,yes,35,37 2006.232.08:09:01.39/va/06,06,usb,yes,35,34 2006.232.08:09:01.39/va/07,06,usb,yes,36,35 2006.232.08:09:01.39/va/08,06,usb,yes,38,37 2006.232.08:09:01.62/valo/01,532.99,yes,locked 2006.232.08:09:01.62/valo/02,572.99,yes,locked 2006.232.08:09:01.62/valo/03,672.99,yes,locked 2006.232.08:09:01.62/valo/04,832.99,yes,locked 2006.232.08:09:01.62/valo/05,652.99,yes,locked 2006.232.08:09:01.62/valo/06,772.99,yes,locked 2006.232.08:09:01.62/valo/07,832.99,yes,locked 2006.232.08:09:01.62/valo/08,852.99,yes,locked 2006.232.08:09:02.71/vb/01,04,usb,yes,30,29 2006.232.08:09:02.71/vb/02,04,usb,yes,32,33 2006.232.08:09:02.71/vb/03,04,usb,yes,28,32 2006.232.08:09:02.71/vb/04,04,usb,yes,29,29 2006.232.08:09:02.71/vb/05,03,usb,yes,35,39 2006.232.08:09:02.71/vb/06,04,usb,yes,29,31 2006.232.08:09:02.71/vb/07,04,usb,yes,31,31 2006.232.08:09:02.71/vb/08,04,usb,yes,28,32 2006.232.08:09:02.95/vblo/01,632.99,yes,locked 2006.232.08:09:02.95/vblo/02,640.99,yes,locked 2006.232.08:09:02.95/vblo/03,656.99,yes,locked 2006.232.08:09:02.95/vblo/04,712.99,yes,locked 2006.232.08:09:02.95/vblo/05,744.99,yes,locked 2006.232.08:09:02.95/vblo/06,752.99,yes,locked 2006.232.08:09:02.95/vblo/07,734.99,yes,locked 2006.232.08:09:02.95/vblo/08,744.99,yes,locked 2006.232.08:09:03.10/vabw/8 2006.232.08:09:03.25/vbbw/8 2006.232.08:09:03.34/xfe/off,on,13.5 2006.232.08:09:03.72/ifatt/23,28,28,28 2006.232.08:09:04.07/fmout-gps/S +4.47E-07 2006.232.08:09:04.11:!2006.232.08:10:00 2006.232.08:10:00.00:data_valid=off 2006.232.08:10:00.00:postob 2006.232.08:10:00.15/cable/+6.3867E-03 2006.232.08:10:00.15/wx/29.35,1007.4,88 2006.232.08:10:01.08/fmout-gps/S +4.48E-07 2006.232.08:10:01.08:scan_name=232-0810,k06232,60 2006.232.08:10:01.08:source=1803+784,180045.68,782804.0,2000.0,cw 2006.232.08:10:01.14#flagr#flagr/antenna,new-source 2006.232.08:10:02.14:checkk5 2006.232.08:10:02.51/chk_autoobs//k5ts1/ autoobs is running! 2006.232.08:10:02.88/chk_autoobs//k5ts2/ autoobs is running! 2006.232.08:10:03.25/chk_autoobs//k5ts3/ autoobs is running! 2006.232.08:10:03.62/chk_autoobs//k5ts4/ autoobs is running! 2006.232.08:10:03.99/chk_obsdata//k5ts1/T2320809??a.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.08:10:04.36/chk_obsdata//k5ts2/T2320809??b.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.08:10:04.73/chk_obsdata//k5ts3/T2320809??c.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.08:10:05.10/chk_obsdata//k5ts4/T2320809??d.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.08:10:05.79/k5log//k5ts1_log_newline 2006.232.08:10:06.48/k5log//k5ts2_log_newline 2006.232.08:10:07.17/k5log//k5ts3_log_newline 2006.232.08:10:07.85/k5log//k5ts4_log_newline 2006.232.08:10:07.88/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.232.08:10:07.88:4f8m12a=2 2006.232.08:10:07.88$4f8m12a/echo=on 2006.232.08:10:07.88$4f8m12a/pcalon 2006.232.08:10:07.88$pcalon/"no phase cal control is implemented here 2006.232.08:10:07.88$4f8m12a/"tpicd=stop 2006.232.08:10:07.88$4f8m12a/vc4f8 2006.232.08:10:07.88$vc4f8/valo=1,532.99 2006.232.08:10:07.88#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.232.08:10:07.88#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.232.08:10:07.88#ibcon#ireg 17 cls_cnt 0 2006.232.08:10:07.88#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.232.08:10:07.88#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.232.08:10:07.88#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.232.08:10:07.88#ibcon#enter wrdev, iclass 18, count 0 2006.232.08:10:07.88#ibcon#first serial, iclass 18, count 0 2006.232.08:10:07.88#ibcon#enter sib2, iclass 18, count 0 2006.232.08:10:07.88#ibcon#flushed, iclass 18, count 0 2006.232.08:10:07.88#ibcon#about to write, iclass 18, count 0 2006.232.08:10:07.88#ibcon#wrote, iclass 18, count 0 2006.232.08:10:07.88#ibcon#about to read 3, iclass 18, count 0 2006.232.08:10:07.92#ibcon#read 3, iclass 18, count 0 2006.232.08:10:07.92#ibcon#about to read 4, iclass 18, count 0 2006.232.08:10:07.92#ibcon#read 4, iclass 18, count 0 2006.232.08:10:07.92#ibcon#about to read 5, iclass 18, count 0 2006.232.08:10:07.92#ibcon#read 5, iclass 18, count 0 2006.232.08:10:07.92#ibcon#about to read 6, iclass 18, count 0 2006.232.08:10:07.92#ibcon#read 6, iclass 18, count 0 2006.232.08:10:07.92#ibcon#end of sib2, iclass 18, count 0 2006.232.08:10:07.92#ibcon#*mode == 0, iclass 18, count 0 2006.232.08:10:07.92#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.232.08:10:07.92#ibcon#[26=FRQ=01,532.99\r\n] 2006.232.08:10:07.92#ibcon#*before write, iclass 18, count 0 2006.232.08:10:07.92#ibcon#enter sib2, iclass 18, count 0 2006.232.08:10:07.92#ibcon#flushed, iclass 18, count 0 2006.232.08:10:07.92#ibcon#about to write, iclass 18, count 0 2006.232.08:10:07.92#ibcon#wrote, iclass 18, count 0 2006.232.08:10:07.92#ibcon#about to read 3, iclass 18, count 0 2006.232.08:10:07.97#ibcon#read 3, iclass 18, count 0 2006.232.08:10:07.97#ibcon#about to read 4, iclass 18, count 0 2006.232.08:10:07.97#ibcon#read 4, iclass 18, count 0 2006.232.08:10:07.97#ibcon#about to read 5, iclass 18, count 0 2006.232.08:10:07.97#ibcon#read 5, iclass 18, count 0 2006.232.08:10:07.97#ibcon#about to read 6, iclass 18, count 0 2006.232.08:10:07.97#ibcon#read 6, iclass 18, count 0 2006.232.08:10:07.97#ibcon#end of sib2, iclass 18, count 0 2006.232.08:10:07.97#ibcon#*after write, iclass 18, count 0 2006.232.08:10:07.97#ibcon#*before return 0, iclass 18, count 0 2006.232.08:10:07.97#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.232.08:10:07.97#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.232.08:10:07.97#ibcon#about to clear, iclass 18 cls_cnt 0 2006.232.08:10:07.97#ibcon#cleared, iclass 18 cls_cnt 0 2006.232.08:10:07.97$vc4f8/va=1,8 2006.232.08:10:07.97#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.232.08:10:07.97#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.232.08:10:07.97#ibcon#ireg 11 cls_cnt 2 2006.232.08:10:07.97#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.232.08:10:07.97#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.232.08:10:07.97#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.232.08:10:07.97#ibcon#enter wrdev, iclass 20, count 2 2006.232.08:10:07.97#ibcon#first serial, iclass 20, count 2 2006.232.08:10:07.97#ibcon#enter sib2, iclass 20, count 2 2006.232.08:10:07.97#ibcon#flushed, iclass 20, count 2 2006.232.08:10:07.97#ibcon#about to write, iclass 20, count 2 2006.232.08:10:07.97#ibcon#wrote, iclass 20, count 2 2006.232.08:10:07.97#ibcon#about to read 3, iclass 20, count 2 2006.232.08:10:07.99#ibcon#read 3, iclass 20, count 2 2006.232.08:10:07.99#ibcon#about to read 4, iclass 20, count 2 2006.232.08:10:07.99#ibcon#read 4, iclass 20, count 2 2006.232.08:10:07.99#ibcon#about to read 5, iclass 20, count 2 2006.232.08:10:07.99#ibcon#read 5, iclass 20, count 2 2006.232.08:10:07.99#ibcon#about to read 6, iclass 20, count 2 2006.232.08:10:07.99#ibcon#read 6, iclass 20, count 2 2006.232.08:10:07.99#ibcon#end of sib2, iclass 20, count 2 2006.232.08:10:07.99#ibcon#*mode == 0, iclass 20, count 2 2006.232.08:10:07.99#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.232.08:10:07.99#ibcon#[25=AT01-08\r\n] 2006.232.08:10:07.99#ibcon#*before write, iclass 20, count 2 2006.232.08:10:07.99#ibcon#enter sib2, iclass 20, count 2 2006.232.08:10:07.99#ibcon#flushed, iclass 20, count 2 2006.232.08:10:07.99#ibcon#about to write, iclass 20, count 2 2006.232.08:10:07.99#ibcon#wrote, iclass 20, count 2 2006.232.08:10:07.99#ibcon#about to read 3, iclass 20, count 2 2006.232.08:10:08.02#ibcon#read 3, iclass 20, count 2 2006.232.08:10:08.02#ibcon#about to read 4, iclass 20, count 2 2006.232.08:10:08.02#ibcon#read 4, iclass 20, count 2 2006.232.08:10:08.02#ibcon#about to read 5, iclass 20, count 2 2006.232.08:10:08.02#ibcon#read 5, iclass 20, count 2 2006.232.08:10:08.02#ibcon#about to read 6, iclass 20, count 2 2006.232.08:10:08.02#ibcon#read 6, iclass 20, count 2 2006.232.08:10:08.02#ibcon#end of sib2, iclass 20, count 2 2006.232.08:10:08.02#ibcon#*after write, iclass 20, count 2 2006.232.08:10:08.02#ibcon#*before return 0, iclass 20, count 2 2006.232.08:10:08.02#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.232.08:10:08.02#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.232.08:10:08.02#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.232.08:10:08.02#ibcon#ireg 7 cls_cnt 0 2006.232.08:10:08.02#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.232.08:10:08.14#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.232.08:10:08.14#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.232.08:10:08.14#ibcon#enter wrdev, iclass 20, count 0 2006.232.08:10:08.14#ibcon#first serial, iclass 20, count 0 2006.232.08:10:08.14#ibcon#enter sib2, iclass 20, count 0 2006.232.08:10:08.14#ibcon#flushed, iclass 20, count 0 2006.232.08:10:08.14#ibcon#about to write, iclass 20, count 0 2006.232.08:10:08.14#ibcon#wrote, iclass 20, count 0 2006.232.08:10:08.14#ibcon#about to read 3, iclass 20, count 0 2006.232.08:10:08.16#ibcon#read 3, iclass 20, count 0 2006.232.08:10:08.16#ibcon#about to read 4, iclass 20, count 0 2006.232.08:10:08.16#ibcon#read 4, iclass 20, count 0 2006.232.08:10:08.16#ibcon#about to read 5, iclass 20, count 0 2006.232.08:10:08.16#ibcon#read 5, iclass 20, count 0 2006.232.08:10:08.16#ibcon#about to read 6, iclass 20, count 0 2006.232.08:10:08.16#ibcon#read 6, iclass 20, count 0 2006.232.08:10:08.16#ibcon#end of sib2, iclass 20, count 0 2006.232.08:10:08.16#ibcon#*mode == 0, iclass 20, count 0 2006.232.08:10:08.16#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.232.08:10:08.16#ibcon#[25=USB\r\n] 2006.232.08:10:08.16#ibcon#*before write, iclass 20, count 0 2006.232.08:10:08.16#ibcon#enter sib2, iclass 20, count 0 2006.232.08:10:08.16#ibcon#flushed, iclass 20, count 0 2006.232.08:10:08.16#ibcon#about to write, iclass 20, count 0 2006.232.08:10:08.16#ibcon#wrote, iclass 20, count 0 2006.232.08:10:08.16#ibcon#about to read 3, iclass 20, count 0 2006.232.08:10:08.19#ibcon#read 3, iclass 20, count 0 2006.232.08:10:08.19#ibcon#about to read 4, iclass 20, count 0 2006.232.08:10:08.19#ibcon#read 4, iclass 20, count 0 2006.232.08:10:08.19#ibcon#about to read 5, iclass 20, count 0 2006.232.08:10:08.19#ibcon#read 5, iclass 20, count 0 2006.232.08:10:08.19#ibcon#about to read 6, iclass 20, count 0 2006.232.08:10:08.19#ibcon#read 6, iclass 20, count 0 2006.232.08:10:08.19#ibcon#end of sib2, iclass 20, count 0 2006.232.08:10:08.19#ibcon#*after write, iclass 20, count 0 2006.232.08:10:08.19#ibcon#*before return 0, iclass 20, count 0 2006.232.08:10:08.19#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.232.08:10:08.19#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.232.08:10:08.19#ibcon#about to clear, iclass 20 cls_cnt 0 2006.232.08:10:08.19#ibcon#cleared, iclass 20 cls_cnt 0 2006.232.08:10:08.19$vc4f8/valo=2,572.99 2006.232.08:10:08.19#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.232.08:10:08.19#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.232.08:10:08.19#ibcon#ireg 17 cls_cnt 0 2006.232.08:10:08.19#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.232.08:10:08.19#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.232.08:10:08.19#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.232.08:10:08.19#ibcon#enter wrdev, iclass 22, count 0 2006.232.08:10:08.19#ibcon#first serial, iclass 22, count 0 2006.232.08:10:08.19#ibcon#enter sib2, iclass 22, count 0 2006.232.08:10:08.19#ibcon#flushed, iclass 22, count 0 2006.232.08:10:08.19#ibcon#about to write, iclass 22, count 0 2006.232.08:10:08.19#ibcon#wrote, iclass 22, count 0 2006.232.08:10:08.19#ibcon#about to read 3, iclass 22, count 0 2006.232.08:10:08.21#ibcon#read 3, iclass 22, count 0 2006.232.08:10:08.21#ibcon#about to read 4, iclass 22, count 0 2006.232.08:10:08.21#ibcon#read 4, iclass 22, count 0 2006.232.08:10:08.21#ibcon#about to read 5, iclass 22, count 0 2006.232.08:10:08.21#ibcon#read 5, iclass 22, count 0 2006.232.08:10:08.21#ibcon#about to read 6, iclass 22, count 0 2006.232.08:10:08.21#ibcon#read 6, iclass 22, count 0 2006.232.08:10:08.21#ibcon#end of sib2, iclass 22, count 0 2006.232.08:10:08.21#ibcon#*mode == 0, iclass 22, count 0 2006.232.08:10:08.21#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.232.08:10:08.21#ibcon#[26=FRQ=02,572.99\r\n] 2006.232.08:10:08.21#ibcon#*before write, iclass 22, count 0 2006.232.08:10:08.21#ibcon#enter sib2, iclass 22, count 0 2006.232.08:10:08.21#ibcon#flushed, iclass 22, count 0 2006.232.08:10:08.21#ibcon#about to write, iclass 22, count 0 2006.232.08:10:08.21#ibcon#wrote, iclass 22, count 0 2006.232.08:10:08.21#ibcon#about to read 3, iclass 22, count 0 2006.232.08:10:08.25#ibcon#read 3, iclass 22, count 0 2006.232.08:10:08.25#ibcon#about to read 4, iclass 22, count 0 2006.232.08:10:08.25#ibcon#read 4, iclass 22, count 0 2006.232.08:10:08.25#ibcon#about to read 5, iclass 22, count 0 2006.232.08:10:08.25#ibcon#read 5, iclass 22, count 0 2006.232.08:10:08.25#ibcon#about to read 6, iclass 22, count 0 2006.232.08:10:08.25#ibcon#read 6, iclass 22, count 0 2006.232.08:10:08.25#ibcon#end of sib2, iclass 22, count 0 2006.232.08:10:08.25#ibcon#*after write, iclass 22, count 0 2006.232.08:10:08.25#ibcon#*before return 0, iclass 22, count 0 2006.232.08:10:08.25#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.232.08:10:08.25#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.232.08:10:08.25#ibcon#about to clear, iclass 22 cls_cnt 0 2006.232.08:10:08.25#ibcon#cleared, iclass 22 cls_cnt 0 2006.232.08:10:08.25$vc4f8/va=2,7 2006.232.08:10:08.25#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.232.08:10:08.25#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.232.08:10:08.25#ibcon#ireg 11 cls_cnt 2 2006.232.08:10:08.25#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.232.08:10:08.31#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.232.08:10:08.31#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.232.08:10:08.31#ibcon#enter wrdev, iclass 24, count 2 2006.232.08:10:08.31#ibcon#first serial, iclass 24, count 2 2006.232.08:10:08.31#ibcon#enter sib2, iclass 24, count 2 2006.232.08:10:08.31#ibcon#flushed, iclass 24, count 2 2006.232.08:10:08.31#ibcon#about to write, iclass 24, count 2 2006.232.08:10:08.31#ibcon#wrote, iclass 24, count 2 2006.232.08:10:08.31#ibcon#about to read 3, iclass 24, count 2 2006.232.08:10:08.33#ibcon#read 3, iclass 24, count 2 2006.232.08:10:08.33#ibcon#about to read 4, iclass 24, count 2 2006.232.08:10:08.33#ibcon#read 4, iclass 24, count 2 2006.232.08:10:08.33#ibcon#about to read 5, iclass 24, count 2 2006.232.08:10:08.33#ibcon#read 5, iclass 24, count 2 2006.232.08:10:08.33#ibcon#about to read 6, iclass 24, count 2 2006.232.08:10:08.33#ibcon#read 6, iclass 24, count 2 2006.232.08:10:08.33#ibcon#end of sib2, iclass 24, count 2 2006.232.08:10:08.33#ibcon#*mode == 0, iclass 24, count 2 2006.232.08:10:08.33#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.232.08:10:08.33#ibcon#[25=AT02-07\r\n] 2006.232.08:10:08.33#ibcon#*before write, iclass 24, count 2 2006.232.08:10:08.33#ibcon#enter sib2, iclass 24, count 2 2006.232.08:10:08.33#ibcon#flushed, iclass 24, count 2 2006.232.08:10:08.33#ibcon#about to write, iclass 24, count 2 2006.232.08:10:08.33#ibcon#wrote, iclass 24, count 2 2006.232.08:10:08.33#ibcon#about to read 3, iclass 24, count 2 2006.232.08:10:08.36#ibcon#read 3, iclass 24, count 2 2006.232.08:10:08.36#ibcon#about to read 4, iclass 24, count 2 2006.232.08:10:08.36#ibcon#read 4, iclass 24, count 2 2006.232.08:10:08.36#ibcon#about to read 5, iclass 24, count 2 2006.232.08:10:08.36#ibcon#read 5, iclass 24, count 2 2006.232.08:10:08.36#ibcon#about to read 6, iclass 24, count 2 2006.232.08:10:08.36#ibcon#read 6, iclass 24, count 2 2006.232.08:10:08.36#ibcon#end of sib2, iclass 24, count 2 2006.232.08:10:08.36#ibcon#*after write, iclass 24, count 2 2006.232.08:10:08.36#ibcon#*before return 0, iclass 24, count 2 2006.232.08:10:08.36#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.232.08:10:08.36#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.232.08:10:08.36#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.232.08:10:08.36#ibcon#ireg 7 cls_cnt 0 2006.232.08:10:08.36#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.232.08:10:08.48#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.232.08:10:08.48#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.232.08:10:08.48#ibcon#enter wrdev, iclass 24, count 0 2006.232.08:10:08.48#ibcon#first serial, iclass 24, count 0 2006.232.08:10:08.48#ibcon#enter sib2, iclass 24, count 0 2006.232.08:10:08.48#ibcon#flushed, iclass 24, count 0 2006.232.08:10:08.48#ibcon#about to write, iclass 24, count 0 2006.232.08:10:08.48#ibcon#wrote, iclass 24, count 0 2006.232.08:10:08.48#ibcon#about to read 3, iclass 24, count 0 2006.232.08:10:08.50#ibcon#read 3, iclass 24, count 0 2006.232.08:10:08.50#ibcon#about to read 4, iclass 24, count 0 2006.232.08:10:08.50#ibcon#read 4, iclass 24, count 0 2006.232.08:10:08.50#ibcon#about to read 5, iclass 24, count 0 2006.232.08:10:08.50#ibcon#read 5, iclass 24, count 0 2006.232.08:10:08.50#ibcon#about to read 6, iclass 24, count 0 2006.232.08:10:08.50#ibcon#read 6, iclass 24, count 0 2006.232.08:10:08.50#ibcon#end of sib2, iclass 24, count 0 2006.232.08:10:08.50#ibcon#*mode == 0, iclass 24, count 0 2006.232.08:10:08.50#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.232.08:10:08.50#ibcon#[25=USB\r\n] 2006.232.08:10:08.50#ibcon#*before write, iclass 24, count 0 2006.232.08:10:08.50#ibcon#enter sib2, iclass 24, count 0 2006.232.08:10:08.50#ibcon#flushed, iclass 24, count 0 2006.232.08:10:08.50#ibcon#about to write, iclass 24, count 0 2006.232.08:10:08.50#ibcon#wrote, iclass 24, count 0 2006.232.08:10:08.50#ibcon#about to read 3, iclass 24, count 0 2006.232.08:10:08.53#ibcon#read 3, iclass 24, count 0 2006.232.08:10:08.53#ibcon#about to read 4, iclass 24, count 0 2006.232.08:10:08.53#ibcon#read 4, iclass 24, count 0 2006.232.08:10:08.53#ibcon#about to read 5, iclass 24, count 0 2006.232.08:10:08.53#ibcon#read 5, iclass 24, count 0 2006.232.08:10:08.53#ibcon#about to read 6, iclass 24, count 0 2006.232.08:10:08.53#ibcon#read 6, iclass 24, count 0 2006.232.08:10:08.53#ibcon#end of sib2, iclass 24, count 0 2006.232.08:10:08.53#ibcon#*after write, iclass 24, count 0 2006.232.08:10:08.53#ibcon#*before return 0, iclass 24, count 0 2006.232.08:10:08.53#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.232.08:10:08.53#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.232.08:10:08.53#ibcon#about to clear, iclass 24 cls_cnt 0 2006.232.08:10:08.53#ibcon#cleared, iclass 24 cls_cnt 0 2006.232.08:10:08.53$vc4f8/valo=3,672.99 2006.232.08:10:08.53#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.232.08:10:08.53#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.232.08:10:08.53#ibcon#ireg 17 cls_cnt 0 2006.232.08:10:08.53#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.232.08:10:08.53#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.232.08:10:08.53#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.232.08:10:08.53#ibcon#enter wrdev, iclass 26, count 0 2006.232.08:10:08.53#ibcon#first serial, iclass 26, count 0 2006.232.08:10:08.53#ibcon#enter sib2, iclass 26, count 0 2006.232.08:10:08.53#ibcon#flushed, iclass 26, count 0 2006.232.08:10:08.53#ibcon#about to write, iclass 26, count 0 2006.232.08:10:08.53#ibcon#wrote, iclass 26, count 0 2006.232.08:10:08.53#ibcon#about to read 3, iclass 26, count 0 2006.232.08:10:08.55#ibcon#read 3, iclass 26, count 0 2006.232.08:10:08.55#ibcon#about to read 4, iclass 26, count 0 2006.232.08:10:08.55#ibcon#read 4, iclass 26, count 0 2006.232.08:10:08.55#ibcon#about to read 5, iclass 26, count 0 2006.232.08:10:08.55#ibcon#read 5, iclass 26, count 0 2006.232.08:10:08.55#ibcon#about to read 6, iclass 26, count 0 2006.232.08:10:08.55#ibcon#read 6, iclass 26, count 0 2006.232.08:10:08.55#ibcon#end of sib2, iclass 26, count 0 2006.232.08:10:08.55#ibcon#*mode == 0, iclass 26, count 0 2006.232.08:10:08.55#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.232.08:10:08.55#ibcon#[26=FRQ=03,672.99\r\n] 2006.232.08:10:08.55#ibcon#*before write, iclass 26, count 0 2006.232.08:10:08.55#ibcon#enter sib2, iclass 26, count 0 2006.232.08:10:08.55#ibcon#flushed, iclass 26, count 0 2006.232.08:10:08.55#ibcon#about to write, iclass 26, count 0 2006.232.08:10:08.55#ibcon#wrote, iclass 26, count 0 2006.232.08:10:08.55#ibcon#about to read 3, iclass 26, count 0 2006.232.08:10:08.59#ibcon#read 3, iclass 26, count 0 2006.232.08:10:08.59#ibcon#about to read 4, iclass 26, count 0 2006.232.08:10:08.59#ibcon#read 4, iclass 26, count 0 2006.232.08:10:08.59#ibcon#about to read 5, iclass 26, count 0 2006.232.08:10:08.59#ibcon#read 5, iclass 26, count 0 2006.232.08:10:08.59#ibcon#about to read 6, iclass 26, count 0 2006.232.08:10:08.59#ibcon#read 6, iclass 26, count 0 2006.232.08:10:08.59#ibcon#end of sib2, iclass 26, count 0 2006.232.08:10:08.59#ibcon#*after write, iclass 26, count 0 2006.232.08:10:08.59#ibcon#*before return 0, iclass 26, count 0 2006.232.08:10:08.59#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.232.08:10:08.59#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.232.08:10:08.59#ibcon#about to clear, iclass 26 cls_cnt 0 2006.232.08:10:08.59#ibcon#cleared, iclass 26 cls_cnt 0 2006.232.08:10:08.59$vc4f8/va=3,8 2006.232.08:10:08.59#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.232.08:10:08.59#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.232.08:10:08.59#ibcon#ireg 11 cls_cnt 2 2006.232.08:10:08.59#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.232.08:10:08.65#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.232.08:10:08.65#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.232.08:10:08.65#ibcon#enter wrdev, iclass 28, count 2 2006.232.08:10:08.65#ibcon#first serial, iclass 28, count 2 2006.232.08:10:08.65#ibcon#enter sib2, iclass 28, count 2 2006.232.08:10:08.65#ibcon#flushed, iclass 28, count 2 2006.232.08:10:08.65#ibcon#about to write, iclass 28, count 2 2006.232.08:10:08.65#ibcon#wrote, iclass 28, count 2 2006.232.08:10:08.65#ibcon#about to read 3, iclass 28, count 2 2006.232.08:10:08.67#ibcon#read 3, iclass 28, count 2 2006.232.08:10:08.67#ibcon#about to read 4, iclass 28, count 2 2006.232.08:10:08.67#ibcon#read 4, iclass 28, count 2 2006.232.08:10:08.67#ibcon#about to read 5, iclass 28, count 2 2006.232.08:10:08.67#ibcon#read 5, iclass 28, count 2 2006.232.08:10:08.67#ibcon#about to read 6, iclass 28, count 2 2006.232.08:10:08.67#ibcon#read 6, iclass 28, count 2 2006.232.08:10:08.67#ibcon#end of sib2, iclass 28, count 2 2006.232.08:10:08.67#ibcon#*mode == 0, iclass 28, count 2 2006.232.08:10:08.67#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.232.08:10:08.67#ibcon#[25=AT03-08\r\n] 2006.232.08:10:08.67#ibcon#*before write, iclass 28, count 2 2006.232.08:10:08.67#ibcon#enter sib2, iclass 28, count 2 2006.232.08:10:08.67#ibcon#flushed, iclass 28, count 2 2006.232.08:10:08.67#ibcon#about to write, iclass 28, count 2 2006.232.08:10:08.67#ibcon#wrote, iclass 28, count 2 2006.232.08:10:08.67#ibcon#about to read 3, iclass 28, count 2 2006.232.08:10:08.70#ibcon#read 3, iclass 28, count 2 2006.232.08:10:08.70#ibcon#about to read 4, iclass 28, count 2 2006.232.08:10:08.70#ibcon#read 4, iclass 28, count 2 2006.232.08:10:08.70#ibcon#about to read 5, iclass 28, count 2 2006.232.08:10:08.70#ibcon#read 5, iclass 28, count 2 2006.232.08:10:08.70#ibcon#about to read 6, iclass 28, count 2 2006.232.08:10:08.70#ibcon#read 6, iclass 28, count 2 2006.232.08:10:08.70#ibcon#end of sib2, iclass 28, count 2 2006.232.08:10:08.70#ibcon#*after write, iclass 28, count 2 2006.232.08:10:08.70#ibcon#*before return 0, iclass 28, count 2 2006.232.08:10:08.70#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.232.08:10:08.70#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.232.08:10:08.70#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.232.08:10:08.70#ibcon#ireg 7 cls_cnt 0 2006.232.08:10:08.70#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.232.08:10:08.82#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.232.08:10:08.82#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.232.08:10:08.82#ibcon#enter wrdev, iclass 28, count 0 2006.232.08:10:08.82#ibcon#first serial, iclass 28, count 0 2006.232.08:10:08.82#ibcon#enter sib2, iclass 28, count 0 2006.232.08:10:08.82#ibcon#flushed, iclass 28, count 0 2006.232.08:10:08.82#ibcon#about to write, iclass 28, count 0 2006.232.08:10:08.82#ibcon#wrote, iclass 28, count 0 2006.232.08:10:08.82#ibcon#about to read 3, iclass 28, count 0 2006.232.08:10:08.84#ibcon#read 3, iclass 28, count 0 2006.232.08:10:08.84#ibcon#about to read 4, iclass 28, count 0 2006.232.08:10:08.84#ibcon#read 4, iclass 28, count 0 2006.232.08:10:08.84#ibcon#about to read 5, iclass 28, count 0 2006.232.08:10:08.84#ibcon#read 5, iclass 28, count 0 2006.232.08:10:08.84#ibcon#about to read 6, iclass 28, count 0 2006.232.08:10:08.84#ibcon#read 6, iclass 28, count 0 2006.232.08:10:08.84#ibcon#end of sib2, iclass 28, count 0 2006.232.08:10:08.84#ibcon#*mode == 0, iclass 28, count 0 2006.232.08:10:08.84#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.232.08:10:08.84#ibcon#[25=USB\r\n] 2006.232.08:10:08.84#ibcon#*before write, iclass 28, count 0 2006.232.08:10:08.84#ibcon#enter sib2, iclass 28, count 0 2006.232.08:10:08.84#ibcon#flushed, iclass 28, count 0 2006.232.08:10:08.84#ibcon#about to write, iclass 28, count 0 2006.232.08:10:08.84#ibcon#wrote, iclass 28, count 0 2006.232.08:10:08.84#ibcon#about to read 3, iclass 28, count 0 2006.232.08:10:08.87#ibcon#read 3, iclass 28, count 0 2006.232.08:10:08.87#ibcon#about to read 4, iclass 28, count 0 2006.232.08:10:08.87#ibcon#read 4, iclass 28, count 0 2006.232.08:10:08.87#ibcon#about to read 5, iclass 28, count 0 2006.232.08:10:08.87#ibcon#read 5, iclass 28, count 0 2006.232.08:10:08.87#ibcon#about to read 6, iclass 28, count 0 2006.232.08:10:08.87#ibcon#read 6, iclass 28, count 0 2006.232.08:10:08.87#ibcon#end of sib2, iclass 28, count 0 2006.232.08:10:08.87#ibcon#*after write, iclass 28, count 0 2006.232.08:10:08.87#ibcon#*before return 0, iclass 28, count 0 2006.232.08:10:08.87#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.232.08:10:08.87#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.232.08:10:08.87#ibcon#about to clear, iclass 28 cls_cnt 0 2006.232.08:10:08.87#ibcon#cleared, iclass 28 cls_cnt 0 2006.232.08:10:08.87$vc4f8/valo=4,832.99 2006.232.08:10:08.87#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.232.08:10:08.87#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.232.08:10:08.87#ibcon#ireg 17 cls_cnt 0 2006.232.08:10:08.87#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.232.08:10:08.87#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.232.08:10:08.87#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.232.08:10:08.87#ibcon#enter wrdev, iclass 30, count 0 2006.232.08:10:08.87#ibcon#first serial, iclass 30, count 0 2006.232.08:10:08.87#ibcon#enter sib2, iclass 30, count 0 2006.232.08:10:08.87#ibcon#flushed, iclass 30, count 0 2006.232.08:10:08.87#ibcon#about to write, iclass 30, count 0 2006.232.08:10:08.87#ibcon#wrote, iclass 30, count 0 2006.232.08:10:08.87#ibcon#about to read 3, iclass 30, count 0 2006.232.08:10:08.89#ibcon#read 3, iclass 30, count 0 2006.232.08:10:08.89#ibcon#about to read 4, iclass 30, count 0 2006.232.08:10:08.89#ibcon#read 4, iclass 30, count 0 2006.232.08:10:08.89#ibcon#about to read 5, iclass 30, count 0 2006.232.08:10:08.89#ibcon#read 5, iclass 30, count 0 2006.232.08:10:08.89#ibcon#about to read 6, iclass 30, count 0 2006.232.08:10:08.89#ibcon#read 6, iclass 30, count 0 2006.232.08:10:08.89#ibcon#end of sib2, iclass 30, count 0 2006.232.08:10:08.89#ibcon#*mode == 0, iclass 30, count 0 2006.232.08:10:08.89#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.232.08:10:08.89#ibcon#[26=FRQ=04,832.99\r\n] 2006.232.08:10:08.89#ibcon#*before write, iclass 30, count 0 2006.232.08:10:08.89#ibcon#enter sib2, iclass 30, count 0 2006.232.08:10:08.89#ibcon#flushed, iclass 30, count 0 2006.232.08:10:08.89#ibcon#about to write, iclass 30, count 0 2006.232.08:10:08.89#ibcon#wrote, iclass 30, count 0 2006.232.08:10:08.89#ibcon#about to read 3, iclass 30, count 0 2006.232.08:10:08.93#ibcon#read 3, iclass 30, count 0 2006.232.08:10:08.93#ibcon#about to read 4, iclass 30, count 0 2006.232.08:10:08.93#ibcon#read 4, iclass 30, count 0 2006.232.08:10:08.93#ibcon#about to read 5, iclass 30, count 0 2006.232.08:10:08.93#ibcon#read 5, iclass 30, count 0 2006.232.08:10:08.93#ibcon#about to read 6, iclass 30, count 0 2006.232.08:10:08.93#ibcon#read 6, iclass 30, count 0 2006.232.08:10:08.93#ibcon#end of sib2, iclass 30, count 0 2006.232.08:10:08.93#ibcon#*after write, iclass 30, count 0 2006.232.08:10:08.93#ibcon#*before return 0, iclass 30, count 0 2006.232.08:10:08.93#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.232.08:10:08.93#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.232.08:10:08.93#ibcon#about to clear, iclass 30 cls_cnt 0 2006.232.08:10:08.93#ibcon#cleared, iclass 30 cls_cnt 0 2006.232.08:10:08.93$vc4f8/va=4,7 2006.232.08:10:08.93#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.232.08:10:08.93#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.232.08:10:08.93#ibcon#ireg 11 cls_cnt 2 2006.232.08:10:08.93#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.232.08:10:08.99#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.232.08:10:08.99#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.232.08:10:08.99#ibcon#enter wrdev, iclass 32, count 2 2006.232.08:10:08.99#ibcon#first serial, iclass 32, count 2 2006.232.08:10:08.99#ibcon#enter sib2, iclass 32, count 2 2006.232.08:10:08.99#ibcon#flushed, iclass 32, count 2 2006.232.08:10:08.99#ibcon#about to write, iclass 32, count 2 2006.232.08:10:08.99#ibcon#wrote, iclass 32, count 2 2006.232.08:10:08.99#ibcon#about to read 3, iclass 32, count 2 2006.232.08:10:09.01#ibcon#read 3, iclass 32, count 2 2006.232.08:10:09.01#ibcon#about to read 4, iclass 32, count 2 2006.232.08:10:09.01#ibcon#read 4, iclass 32, count 2 2006.232.08:10:09.01#ibcon#about to read 5, iclass 32, count 2 2006.232.08:10:09.01#ibcon#read 5, iclass 32, count 2 2006.232.08:10:09.01#ibcon#about to read 6, iclass 32, count 2 2006.232.08:10:09.01#ibcon#read 6, iclass 32, count 2 2006.232.08:10:09.01#ibcon#end of sib2, iclass 32, count 2 2006.232.08:10:09.01#ibcon#*mode == 0, iclass 32, count 2 2006.232.08:10:09.01#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.232.08:10:09.01#ibcon#[25=AT04-07\r\n] 2006.232.08:10:09.01#ibcon#*before write, iclass 32, count 2 2006.232.08:10:09.01#ibcon#enter sib2, iclass 32, count 2 2006.232.08:10:09.01#ibcon#flushed, iclass 32, count 2 2006.232.08:10:09.01#ibcon#about to write, iclass 32, count 2 2006.232.08:10:09.01#ibcon#wrote, iclass 32, count 2 2006.232.08:10:09.01#ibcon#about to read 3, iclass 32, count 2 2006.232.08:10:09.04#ibcon#read 3, iclass 32, count 2 2006.232.08:10:09.04#ibcon#about to read 4, iclass 32, count 2 2006.232.08:10:09.04#ibcon#read 4, iclass 32, count 2 2006.232.08:10:09.04#ibcon#about to read 5, iclass 32, count 2 2006.232.08:10:09.04#ibcon#read 5, iclass 32, count 2 2006.232.08:10:09.04#ibcon#about to read 6, iclass 32, count 2 2006.232.08:10:09.04#ibcon#read 6, iclass 32, count 2 2006.232.08:10:09.04#ibcon#end of sib2, iclass 32, count 2 2006.232.08:10:09.04#ibcon#*after write, iclass 32, count 2 2006.232.08:10:09.04#ibcon#*before return 0, iclass 32, count 2 2006.232.08:10:09.04#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.232.08:10:09.04#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.232.08:10:09.04#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.232.08:10:09.04#ibcon#ireg 7 cls_cnt 0 2006.232.08:10:09.04#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.232.08:10:09.16#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.232.08:10:09.16#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.232.08:10:09.16#ibcon#enter wrdev, iclass 32, count 0 2006.232.08:10:09.16#ibcon#first serial, iclass 32, count 0 2006.232.08:10:09.16#ibcon#enter sib2, iclass 32, count 0 2006.232.08:10:09.16#ibcon#flushed, iclass 32, count 0 2006.232.08:10:09.16#ibcon#about to write, iclass 32, count 0 2006.232.08:10:09.16#ibcon#wrote, iclass 32, count 0 2006.232.08:10:09.16#ibcon#about to read 3, iclass 32, count 0 2006.232.08:10:09.18#ibcon#read 3, iclass 32, count 0 2006.232.08:10:09.18#ibcon#about to read 4, iclass 32, count 0 2006.232.08:10:09.18#ibcon#read 4, iclass 32, count 0 2006.232.08:10:09.18#ibcon#about to read 5, iclass 32, count 0 2006.232.08:10:09.18#ibcon#read 5, iclass 32, count 0 2006.232.08:10:09.18#ibcon#about to read 6, iclass 32, count 0 2006.232.08:10:09.18#ibcon#read 6, iclass 32, count 0 2006.232.08:10:09.18#ibcon#end of sib2, iclass 32, count 0 2006.232.08:10:09.18#ibcon#*mode == 0, iclass 32, count 0 2006.232.08:10:09.18#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.232.08:10:09.18#ibcon#[25=USB\r\n] 2006.232.08:10:09.18#ibcon#*before write, iclass 32, count 0 2006.232.08:10:09.18#ibcon#enter sib2, iclass 32, count 0 2006.232.08:10:09.18#ibcon#flushed, iclass 32, count 0 2006.232.08:10:09.18#ibcon#about to write, iclass 32, count 0 2006.232.08:10:09.18#ibcon#wrote, iclass 32, count 0 2006.232.08:10:09.18#ibcon#about to read 3, iclass 32, count 0 2006.232.08:10:09.21#ibcon#read 3, iclass 32, count 0 2006.232.08:10:09.21#ibcon#about to read 4, iclass 32, count 0 2006.232.08:10:09.21#ibcon#read 4, iclass 32, count 0 2006.232.08:10:09.21#ibcon#about to read 5, iclass 32, count 0 2006.232.08:10:09.21#ibcon#read 5, iclass 32, count 0 2006.232.08:10:09.21#ibcon#about to read 6, iclass 32, count 0 2006.232.08:10:09.21#ibcon#read 6, iclass 32, count 0 2006.232.08:10:09.21#ibcon#end of sib2, iclass 32, count 0 2006.232.08:10:09.21#ibcon#*after write, iclass 32, count 0 2006.232.08:10:09.21#ibcon#*before return 0, iclass 32, count 0 2006.232.08:10:09.21#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.232.08:10:09.21#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.232.08:10:09.21#ibcon#about to clear, iclass 32 cls_cnt 0 2006.232.08:10:09.21#ibcon#cleared, iclass 32 cls_cnt 0 2006.232.08:10:09.21$vc4f8/valo=5,652.99 2006.232.08:10:09.21#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.232.08:10:09.21#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.232.08:10:09.21#ibcon#ireg 17 cls_cnt 0 2006.232.08:10:09.21#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.232.08:10:09.21#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.232.08:10:09.21#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.232.08:10:09.21#ibcon#enter wrdev, iclass 34, count 0 2006.232.08:10:09.21#ibcon#first serial, iclass 34, count 0 2006.232.08:10:09.21#ibcon#enter sib2, iclass 34, count 0 2006.232.08:10:09.21#ibcon#flushed, iclass 34, count 0 2006.232.08:10:09.21#ibcon#about to write, iclass 34, count 0 2006.232.08:10:09.21#ibcon#wrote, iclass 34, count 0 2006.232.08:10:09.21#ibcon#about to read 3, iclass 34, count 0 2006.232.08:10:09.23#ibcon#read 3, iclass 34, count 0 2006.232.08:10:09.23#ibcon#about to read 4, iclass 34, count 0 2006.232.08:10:09.23#ibcon#read 4, iclass 34, count 0 2006.232.08:10:09.23#ibcon#about to read 5, iclass 34, count 0 2006.232.08:10:09.23#ibcon#read 5, iclass 34, count 0 2006.232.08:10:09.23#ibcon#about to read 6, iclass 34, count 0 2006.232.08:10:09.23#ibcon#read 6, iclass 34, count 0 2006.232.08:10:09.23#ibcon#end of sib2, iclass 34, count 0 2006.232.08:10:09.23#ibcon#*mode == 0, iclass 34, count 0 2006.232.08:10:09.23#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.232.08:10:09.23#ibcon#[26=FRQ=05,652.99\r\n] 2006.232.08:10:09.23#ibcon#*before write, iclass 34, count 0 2006.232.08:10:09.23#ibcon#enter sib2, iclass 34, count 0 2006.232.08:10:09.23#ibcon#flushed, iclass 34, count 0 2006.232.08:10:09.23#ibcon#about to write, iclass 34, count 0 2006.232.08:10:09.23#ibcon#wrote, iclass 34, count 0 2006.232.08:10:09.23#ibcon#about to read 3, iclass 34, count 0 2006.232.08:10:09.27#ibcon#read 3, iclass 34, count 0 2006.232.08:10:09.27#ibcon#about to read 4, iclass 34, count 0 2006.232.08:10:09.27#ibcon#read 4, iclass 34, count 0 2006.232.08:10:09.27#ibcon#about to read 5, iclass 34, count 0 2006.232.08:10:09.27#ibcon#read 5, iclass 34, count 0 2006.232.08:10:09.27#ibcon#about to read 6, iclass 34, count 0 2006.232.08:10:09.27#ibcon#read 6, iclass 34, count 0 2006.232.08:10:09.27#ibcon#end of sib2, iclass 34, count 0 2006.232.08:10:09.27#ibcon#*after write, iclass 34, count 0 2006.232.08:10:09.27#ibcon#*before return 0, iclass 34, count 0 2006.232.08:10:09.27#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.232.08:10:09.27#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.232.08:10:09.27#ibcon#about to clear, iclass 34 cls_cnt 0 2006.232.08:10:09.27#ibcon#cleared, iclass 34 cls_cnt 0 2006.232.08:10:09.27$vc4f8/va=5,7 2006.232.08:10:09.27#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.232.08:10:09.27#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.232.08:10:09.27#ibcon#ireg 11 cls_cnt 2 2006.232.08:10:09.27#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.232.08:10:09.33#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.232.08:10:09.33#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.232.08:10:09.33#ibcon#enter wrdev, iclass 36, count 2 2006.232.08:10:09.33#ibcon#first serial, iclass 36, count 2 2006.232.08:10:09.33#ibcon#enter sib2, iclass 36, count 2 2006.232.08:10:09.33#ibcon#flushed, iclass 36, count 2 2006.232.08:10:09.33#ibcon#about to write, iclass 36, count 2 2006.232.08:10:09.33#ibcon#wrote, iclass 36, count 2 2006.232.08:10:09.33#ibcon#about to read 3, iclass 36, count 2 2006.232.08:10:09.35#ibcon#read 3, iclass 36, count 2 2006.232.08:10:09.35#ibcon#about to read 4, iclass 36, count 2 2006.232.08:10:09.35#ibcon#read 4, iclass 36, count 2 2006.232.08:10:09.35#ibcon#about to read 5, iclass 36, count 2 2006.232.08:10:09.35#ibcon#read 5, iclass 36, count 2 2006.232.08:10:09.35#ibcon#about to read 6, iclass 36, count 2 2006.232.08:10:09.35#ibcon#read 6, iclass 36, count 2 2006.232.08:10:09.35#ibcon#end of sib2, iclass 36, count 2 2006.232.08:10:09.35#ibcon#*mode == 0, iclass 36, count 2 2006.232.08:10:09.35#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.232.08:10:09.35#ibcon#[25=AT05-07\r\n] 2006.232.08:10:09.35#ibcon#*before write, iclass 36, count 2 2006.232.08:10:09.35#ibcon#enter sib2, iclass 36, count 2 2006.232.08:10:09.35#ibcon#flushed, iclass 36, count 2 2006.232.08:10:09.35#ibcon#about to write, iclass 36, count 2 2006.232.08:10:09.35#ibcon#wrote, iclass 36, count 2 2006.232.08:10:09.35#ibcon#about to read 3, iclass 36, count 2 2006.232.08:10:09.39#ibcon#read 3, iclass 36, count 2 2006.232.08:10:09.39#ibcon#about to read 4, iclass 36, count 2 2006.232.08:10:09.39#ibcon#read 4, iclass 36, count 2 2006.232.08:10:09.39#ibcon#about to read 5, iclass 36, count 2 2006.232.08:10:09.39#ibcon#read 5, iclass 36, count 2 2006.232.08:10:09.39#ibcon#about to read 6, iclass 36, count 2 2006.232.08:10:09.39#ibcon#read 6, iclass 36, count 2 2006.232.08:10:09.39#ibcon#end of sib2, iclass 36, count 2 2006.232.08:10:09.39#ibcon#*after write, iclass 36, count 2 2006.232.08:10:09.39#ibcon#*before return 0, iclass 36, count 2 2006.232.08:10:09.39#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.232.08:10:09.39#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.232.08:10:09.39#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.232.08:10:09.39#ibcon#ireg 7 cls_cnt 0 2006.232.08:10:09.39#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.232.08:10:09.51#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.232.08:10:09.51#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.232.08:10:09.51#ibcon#enter wrdev, iclass 36, count 0 2006.232.08:10:09.51#ibcon#first serial, iclass 36, count 0 2006.232.08:10:09.51#ibcon#enter sib2, iclass 36, count 0 2006.232.08:10:09.51#ibcon#flushed, iclass 36, count 0 2006.232.08:10:09.51#ibcon#about to write, iclass 36, count 0 2006.232.08:10:09.51#ibcon#wrote, iclass 36, count 0 2006.232.08:10:09.51#ibcon#about to read 3, iclass 36, count 0 2006.232.08:10:09.53#ibcon#read 3, iclass 36, count 0 2006.232.08:10:09.53#ibcon#about to read 4, iclass 36, count 0 2006.232.08:10:09.53#ibcon#read 4, iclass 36, count 0 2006.232.08:10:09.53#ibcon#about to read 5, iclass 36, count 0 2006.232.08:10:09.53#ibcon#read 5, iclass 36, count 0 2006.232.08:10:09.53#ibcon#about to read 6, iclass 36, count 0 2006.232.08:10:09.53#ibcon#read 6, iclass 36, count 0 2006.232.08:10:09.53#ibcon#end of sib2, iclass 36, count 0 2006.232.08:10:09.53#ibcon#*mode == 0, iclass 36, count 0 2006.232.08:10:09.53#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.232.08:10:09.53#ibcon#[25=USB\r\n] 2006.232.08:10:09.53#ibcon#*before write, iclass 36, count 0 2006.232.08:10:09.53#ibcon#enter sib2, iclass 36, count 0 2006.232.08:10:09.53#ibcon#flushed, iclass 36, count 0 2006.232.08:10:09.53#ibcon#about to write, iclass 36, count 0 2006.232.08:10:09.53#ibcon#wrote, iclass 36, count 0 2006.232.08:10:09.53#ibcon#about to read 3, iclass 36, count 0 2006.232.08:10:09.56#ibcon#read 3, iclass 36, count 0 2006.232.08:10:09.56#ibcon#about to read 4, iclass 36, count 0 2006.232.08:10:09.56#ibcon#read 4, iclass 36, count 0 2006.232.08:10:09.56#ibcon#about to read 5, iclass 36, count 0 2006.232.08:10:09.56#ibcon#read 5, iclass 36, count 0 2006.232.08:10:09.56#ibcon#about to read 6, iclass 36, count 0 2006.232.08:10:09.56#ibcon#read 6, iclass 36, count 0 2006.232.08:10:09.56#ibcon#end of sib2, iclass 36, count 0 2006.232.08:10:09.56#ibcon#*after write, iclass 36, count 0 2006.232.08:10:09.56#ibcon#*before return 0, iclass 36, count 0 2006.232.08:10:09.56#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.232.08:10:09.56#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.232.08:10:09.56#ibcon#about to clear, iclass 36 cls_cnt 0 2006.232.08:10:09.56#ibcon#cleared, iclass 36 cls_cnt 0 2006.232.08:10:09.56$vc4f8/valo=6,772.99 2006.232.08:10:09.56#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.232.08:10:09.56#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.232.08:10:09.56#ibcon#ireg 17 cls_cnt 0 2006.232.08:10:09.56#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.232.08:10:09.56#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.232.08:10:09.56#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.232.08:10:09.56#ibcon#enter wrdev, iclass 38, count 0 2006.232.08:10:09.56#ibcon#first serial, iclass 38, count 0 2006.232.08:10:09.56#ibcon#enter sib2, iclass 38, count 0 2006.232.08:10:09.56#ibcon#flushed, iclass 38, count 0 2006.232.08:10:09.56#ibcon#about to write, iclass 38, count 0 2006.232.08:10:09.56#ibcon#wrote, iclass 38, count 0 2006.232.08:10:09.56#ibcon#about to read 3, iclass 38, count 0 2006.232.08:10:09.58#ibcon#read 3, iclass 38, count 0 2006.232.08:10:09.58#ibcon#about to read 4, iclass 38, count 0 2006.232.08:10:09.58#ibcon#read 4, iclass 38, count 0 2006.232.08:10:09.58#ibcon#about to read 5, iclass 38, count 0 2006.232.08:10:09.58#ibcon#read 5, iclass 38, count 0 2006.232.08:10:09.58#ibcon#about to read 6, iclass 38, count 0 2006.232.08:10:09.58#ibcon#read 6, iclass 38, count 0 2006.232.08:10:09.58#ibcon#end of sib2, iclass 38, count 0 2006.232.08:10:09.58#ibcon#*mode == 0, iclass 38, count 0 2006.232.08:10:09.58#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.232.08:10:09.58#ibcon#[26=FRQ=06,772.99\r\n] 2006.232.08:10:09.58#ibcon#*before write, iclass 38, count 0 2006.232.08:10:09.58#ibcon#enter sib2, iclass 38, count 0 2006.232.08:10:09.58#ibcon#flushed, iclass 38, count 0 2006.232.08:10:09.58#ibcon#about to write, iclass 38, count 0 2006.232.08:10:09.58#ibcon#wrote, iclass 38, count 0 2006.232.08:10:09.58#ibcon#about to read 3, iclass 38, count 0 2006.232.08:10:09.62#ibcon#read 3, iclass 38, count 0 2006.232.08:10:09.62#ibcon#about to read 4, iclass 38, count 0 2006.232.08:10:09.62#ibcon#read 4, iclass 38, count 0 2006.232.08:10:09.62#ibcon#about to read 5, iclass 38, count 0 2006.232.08:10:09.62#ibcon#read 5, iclass 38, count 0 2006.232.08:10:09.62#ibcon#about to read 6, iclass 38, count 0 2006.232.08:10:09.62#ibcon#read 6, iclass 38, count 0 2006.232.08:10:09.62#ibcon#end of sib2, iclass 38, count 0 2006.232.08:10:09.62#ibcon#*after write, iclass 38, count 0 2006.232.08:10:09.62#ibcon#*before return 0, iclass 38, count 0 2006.232.08:10:09.62#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.232.08:10:09.62#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.232.08:10:09.62#ibcon#about to clear, iclass 38 cls_cnt 0 2006.232.08:10:09.62#ibcon#cleared, iclass 38 cls_cnt 0 2006.232.08:10:09.62$vc4f8/va=6,6 2006.232.08:10:09.62#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.232.08:10:09.62#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.232.08:10:09.62#ibcon#ireg 11 cls_cnt 2 2006.232.08:10:09.62#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.232.08:10:09.68#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.232.08:10:09.68#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.232.08:10:09.68#ibcon#enter wrdev, iclass 40, count 2 2006.232.08:10:09.68#ibcon#first serial, iclass 40, count 2 2006.232.08:10:09.68#ibcon#enter sib2, iclass 40, count 2 2006.232.08:10:09.68#ibcon#flushed, iclass 40, count 2 2006.232.08:10:09.68#ibcon#about to write, iclass 40, count 2 2006.232.08:10:09.68#ibcon#wrote, iclass 40, count 2 2006.232.08:10:09.68#ibcon#about to read 3, iclass 40, count 2 2006.232.08:10:09.70#ibcon#read 3, iclass 40, count 2 2006.232.08:10:09.70#ibcon#about to read 4, iclass 40, count 2 2006.232.08:10:09.70#ibcon#read 4, iclass 40, count 2 2006.232.08:10:09.70#ibcon#about to read 5, iclass 40, count 2 2006.232.08:10:09.70#ibcon#read 5, iclass 40, count 2 2006.232.08:10:09.70#ibcon#about to read 6, iclass 40, count 2 2006.232.08:10:09.70#ibcon#read 6, iclass 40, count 2 2006.232.08:10:09.70#ibcon#end of sib2, iclass 40, count 2 2006.232.08:10:09.70#ibcon#*mode == 0, iclass 40, count 2 2006.232.08:10:09.70#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.232.08:10:09.70#ibcon#[25=AT06-06\r\n] 2006.232.08:10:09.70#ibcon#*before write, iclass 40, count 2 2006.232.08:10:09.70#ibcon#enter sib2, iclass 40, count 2 2006.232.08:10:09.70#ibcon#flushed, iclass 40, count 2 2006.232.08:10:09.70#ibcon#about to write, iclass 40, count 2 2006.232.08:10:09.70#ibcon#wrote, iclass 40, count 2 2006.232.08:10:09.70#ibcon#about to read 3, iclass 40, count 2 2006.232.08:10:09.73#ibcon#read 3, iclass 40, count 2 2006.232.08:10:09.73#ibcon#about to read 4, iclass 40, count 2 2006.232.08:10:09.73#ibcon#read 4, iclass 40, count 2 2006.232.08:10:09.73#ibcon#about to read 5, iclass 40, count 2 2006.232.08:10:09.73#ibcon#read 5, iclass 40, count 2 2006.232.08:10:09.73#ibcon#about to read 6, iclass 40, count 2 2006.232.08:10:09.73#ibcon#read 6, iclass 40, count 2 2006.232.08:10:09.73#ibcon#end of sib2, iclass 40, count 2 2006.232.08:10:09.73#ibcon#*after write, iclass 40, count 2 2006.232.08:10:09.73#ibcon#*before return 0, iclass 40, count 2 2006.232.08:10:09.73#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.232.08:10:09.73#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.232.08:10:09.73#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.232.08:10:09.73#ibcon#ireg 7 cls_cnt 0 2006.232.08:10:09.73#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.232.08:10:09.85#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.232.08:10:09.85#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.232.08:10:09.85#ibcon#enter wrdev, iclass 40, count 0 2006.232.08:10:09.85#ibcon#first serial, iclass 40, count 0 2006.232.08:10:09.85#ibcon#enter sib2, iclass 40, count 0 2006.232.08:10:09.85#ibcon#flushed, iclass 40, count 0 2006.232.08:10:09.85#ibcon#about to write, iclass 40, count 0 2006.232.08:10:09.85#ibcon#wrote, iclass 40, count 0 2006.232.08:10:09.85#ibcon#about to read 3, iclass 40, count 0 2006.232.08:10:09.87#ibcon#read 3, iclass 40, count 0 2006.232.08:10:09.87#ibcon#about to read 4, iclass 40, count 0 2006.232.08:10:09.87#ibcon#read 4, iclass 40, count 0 2006.232.08:10:09.87#ibcon#about to read 5, iclass 40, count 0 2006.232.08:10:09.87#ibcon#read 5, iclass 40, count 0 2006.232.08:10:09.87#ibcon#about to read 6, iclass 40, count 0 2006.232.08:10:09.87#ibcon#read 6, iclass 40, count 0 2006.232.08:10:09.87#ibcon#end of sib2, iclass 40, count 0 2006.232.08:10:09.87#ibcon#*mode == 0, iclass 40, count 0 2006.232.08:10:09.87#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.232.08:10:09.87#ibcon#[25=USB\r\n] 2006.232.08:10:09.87#ibcon#*before write, iclass 40, count 0 2006.232.08:10:09.87#ibcon#enter sib2, iclass 40, count 0 2006.232.08:10:09.87#ibcon#flushed, iclass 40, count 0 2006.232.08:10:09.87#ibcon#about to write, iclass 40, count 0 2006.232.08:10:09.87#ibcon#wrote, iclass 40, count 0 2006.232.08:10:09.87#ibcon#about to read 3, iclass 40, count 0 2006.232.08:10:09.90#ibcon#read 3, iclass 40, count 0 2006.232.08:10:09.90#ibcon#about to read 4, iclass 40, count 0 2006.232.08:10:09.90#ibcon#read 4, iclass 40, count 0 2006.232.08:10:09.90#ibcon#about to read 5, iclass 40, count 0 2006.232.08:10:09.90#ibcon#read 5, iclass 40, count 0 2006.232.08:10:09.90#ibcon#about to read 6, iclass 40, count 0 2006.232.08:10:09.90#ibcon#read 6, iclass 40, count 0 2006.232.08:10:09.90#ibcon#end of sib2, iclass 40, count 0 2006.232.08:10:09.90#ibcon#*after write, iclass 40, count 0 2006.232.08:10:09.90#ibcon#*before return 0, iclass 40, count 0 2006.232.08:10:09.90#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.232.08:10:09.90#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.232.08:10:09.90#ibcon#about to clear, iclass 40 cls_cnt 0 2006.232.08:10:09.90#ibcon#cleared, iclass 40 cls_cnt 0 2006.232.08:10:09.90$vc4f8/valo=7,832.99 2006.232.08:10:09.90#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.232.08:10:09.90#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.232.08:10:09.90#ibcon#ireg 17 cls_cnt 0 2006.232.08:10:09.90#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.232.08:10:09.90#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.232.08:10:09.90#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.232.08:10:09.90#ibcon#enter wrdev, iclass 4, count 0 2006.232.08:10:09.90#ibcon#first serial, iclass 4, count 0 2006.232.08:10:09.90#ibcon#enter sib2, iclass 4, count 0 2006.232.08:10:09.90#ibcon#flushed, iclass 4, count 0 2006.232.08:10:09.90#ibcon#about to write, iclass 4, count 0 2006.232.08:10:09.90#ibcon#wrote, iclass 4, count 0 2006.232.08:10:09.90#ibcon#about to read 3, iclass 4, count 0 2006.232.08:10:09.92#ibcon#read 3, iclass 4, count 0 2006.232.08:10:09.92#ibcon#about to read 4, iclass 4, count 0 2006.232.08:10:09.92#ibcon#read 4, iclass 4, count 0 2006.232.08:10:09.92#ibcon#about to read 5, iclass 4, count 0 2006.232.08:10:09.92#ibcon#read 5, iclass 4, count 0 2006.232.08:10:09.92#ibcon#about to read 6, iclass 4, count 0 2006.232.08:10:09.92#ibcon#read 6, iclass 4, count 0 2006.232.08:10:09.92#ibcon#end of sib2, iclass 4, count 0 2006.232.08:10:09.92#ibcon#*mode == 0, iclass 4, count 0 2006.232.08:10:09.92#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.232.08:10:09.92#ibcon#[26=FRQ=07,832.99\r\n] 2006.232.08:10:09.92#ibcon#*before write, iclass 4, count 0 2006.232.08:10:09.92#ibcon#enter sib2, iclass 4, count 0 2006.232.08:10:09.92#ibcon#flushed, iclass 4, count 0 2006.232.08:10:09.92#ibcon#about to write, iclass 4, count 0 2006.232.08:10:09.92#ibcon#wrote, iclass 4, count 0 2006.232.08:10:09.92#ibcon#about to read 3, iclass 4, count 0 2006.232.08:10:09.96#ibcon#read 3, iclass 4, count 0 2006.232.08:10:09.96#ibcon#about to read 4, iclass 4, count 0 2006.232.08:10:09.96#ibcon#read 4, iclass 4, count 0 2006.232.08:10:09.96#ibcon#about to read 5, iclass 4, count 0 2006.232.08:10:09.96#ibcon#read 5, iclass 4, count 0 2006.232.08:10:09.96#ibcon#about to read 6, iclass 4, count 0 2006.232.08:10:09.96#ibcon#read 6, iclass 4, count 0 2006.232.08:10:09.96#ibcon#end of sib2, iclass 4, count 0 2006.232.08:10:09.96#ibcon#*after write, iclass 4, count 0 2006.232.08:10:09.96#ibcon#*before return 0, iclass 4, count 0 2006.232.08:10:09.96#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.232.08:10:09.96#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.232.08:10:09.96#ibcon#about to clear, iclass 4 cls_cnt 0 2006.232.08:10:09.96#ibcon#cleared, iclass 4 cls_cnt 0 2006.232.08:10:09.96$vc4f8/va=7,6 2006.232.08:10:09.96#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.232.08:10:09.96#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.232.08:10:09.96#ibcon#ireg 11 cls_cnt 2 2006.232.08:10:09.96#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.232.08:10:10.02#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.232.08:10:10.02#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.232.08:10:10.02#ibcon#enter wrdev, iclass 6, count 2 2006.232.08:10:10.02#ibcon#first serial, iclass 6, count 2 2006.232.08:10:10.02#ibcon#enter sib2, iclass 6, count 2 2006.232.08:10:10.02#ibcon#flushed, iclass 6, count 2 2006.232.08:10:10.02#ibcon#about to write, iclass 6, count 2 2006.232.08:10:10.02#ibcon#wrote, iclass 6, count 2 2006.232.08:10:10.02#ibcon#about to read 3, iclass 6, count 2 2006.232.08:10:10.04#ibcon#read 3, iclass 6, count 2 2006.232.08:10:10.04#ibcon#about to read 4, iclass 6, count 2 2006.232.08:10:10.04#ibcon#read 4, iclass 6, count 2 2006.232.08:10:10.04#ibcon#about to read 5, iclass 6, count 2 2006.232.08:10:10.04#ibcon#read 5, iclass 6, count 2 2006.232.08:10:10.04#ibcon#about to read 6, iclass 6, count 2 2006.232.08:10:10.04#ibcon#read 6, iclass 6, count 2 2006.232.08:10:10.04#ibcon#end of sib2, iclass 6, count 2 2006.232.08:10:10.04#ibcon#*mode == 0, iclass 6, count 2 2006.232.08:10:10.04#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.232.08:10:10.04#ibcon#[25=AT07-06\r\n] 2006.232.08:10:10.04#ibcon#*before write, iclass 6, count 2 2006.232.08:10:10.04#ibcon#enter sib2, iclass 6, count 2 2006.232.08:10:10.04#ibcon#flushed, iclass 6, count 2 2006.232.08:10:10.04#ibcon#about to write, iclass 6, count 2 2006.232.08:10:10.04#ibcon#wrote, iclass 6, count 2 2006.232.08:10:10.04#ibcon#about to read 3, iclass 6, count 2 2006.232.08:10:10.07#ibcon#read 3, iclass 6, count 2 2006.232.08:10:10.07#ibcon#about to read 4, iclass 6, count 2 2006.232.08:10:10.07#ibcon#read 4, iclass 6, count 2 2006.232.08:10:10.07#ibcon#about to read 5, iclass 6, count 2 2006.232.08:10:10.07#ibcon#read 5, iclass 6, count 2 2006.232.08:10:10.07#ibcon#about to read 6, iclass 6, count 2 2006.232.08:10:10.07#ibcon#read 6, iclass 6, count 2 2006.232.08:10:10.07#ibcon#end of sib2, iclass 6, count 2 2006.232.08:10:10.07#ibcon#*after write, iclass 6, count 2 2006.232.08:10:10.07#ibcon#*before return 0, iclass 6, count 2 2006.232.08:10:10.07#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.232.08:10:10.07#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.232.08:10:10.07#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.232.08:10:10.07#ibcon#ireg 7 cls_cnt 0 2006.232.08:10:10.07#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.232.08:10:10.19#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.232.08:10:10.19#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.232.08:10:10.19#ibcon#enter wrdev, iclass 6, count 0 2006.232.08:10:10.19#ibcon#first serial, iclass 6, count 0 2006.232.08:10:10.19#ibcon#enter sib2, iclass 6, count 0 2006.232.08:10:10.19#ibcon#flushed, iclass 6, count 0 2006.232.08:10:10.19#ibcon#about to write, iclass 6, count 0 2006.232.08:10:10.19#ibcon#wrote, iclass 6, count 0 2006.232.08:10:10.19#ibcon#about to read 3, iclass 6, count 0 2006.232.08:10:10.21#ibcon#read 3, iclass 6, count 0 2006.232.08:10:10.21#ibcon#about to read 4, iclass 6, count 0 2006.232.08:10:10.21#ibcon#read 4, iclass 6, count 0 2006.232.08:10:10.21#ibcon#about to read 5, iclass 6, count 0 2006.232.08:10:10.21#ibcon#read 5, iclass 6, count 0 2006.232.08:10:10.21#ibcon#about to read 6, iclass 6, count 0 2006.232.08:10:10.21#ibcon#read 6, iclass 6, count 0 2006.232.08:10:10.21#ibcon#end of sib2, iclass 6, count 0 2006.232.08:10:10.21#ibcon#*mode == 0, iclass 6, count 0 2006.232.08:10:10.21#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.232.08:10:10.21#ibcon#[25=USB\r\n] 2006.232.08:10:10.21#ibcon#*before write, iclass 6, count 0 2006.232.08:10:10.21#ibcon#enter sib2, iclass 6, count 0 2006.232.08:10:10.21#ibcon#flushed, iclass 6, count 0 2006.232.08:10:10.21#ibcon#about to write, iclass 6, count 0 2006.232.08:10:10.21#ibcon#wrote, iclass 6, count 0 2006.232.08:10:10.21#ibcon#about to read 3, iclass 6, count 0 2006.232.08:10:10.24#ibcon#read 3, iclass 6, count 0 2006.232.08:10:10.24#ibcon#about to read 4, iclass 6, count 0 2006.232.08:10:10.24#ibcon#read 4, iclass 6, count 0 2006.232.08:10:10.24#ibcon#about to read 5, iclass 6, count 0 2006.232.08:10:10.24#ibcon#read 5, iclass 6, count 0 2006.232.08:10:10.24#ibcon#about to read 6, iclass 6, count 0 2006.232.08:10:10.24#ibcon#read 6, iclass 6, count 0 2006.232.08:10:10.24#ibcon#end of sib2, iclass 6, count 0 2006.232.08:10:10.24#ibcon#*after write, iclass 6, count 0 2006.232.08:10:10.24#ibcon#*before return 0, iclass 6, count 0 2006.232.08:10:10.24#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.232.08:10:10.24#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.232.08:10:10.24#ibcon#about to clear, iclass 6 cls_cnt 0 2006.232.08:10:10.24#ibcon#cleared, iclass 6 cls_cnt 0 2006.232.08:10:10.24$vc4f8/valo=8,852.99 2006.232.08:10:10.24#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.232.08:10:10.24#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.232.08:10:10.24#ibcon#ireg 17 cls_cnt 0 2006.232.08:10:10.24#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.232.08:10:10.24#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.232.08:10:10.24#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.232.08:10:10.24#ibcon#enter wrdev, iclass 10, count 0 2006.232.08:10:10.24#ibcon#first serial, iclass 10, count 0 2006.232.08:10:10.24#ibcon#enter sib2, iclass 10, count 0 2006.232.08:10:10.24#ibcon#flushed, iclass 10, count 0 2006.232.08:10:10.24#ibcon#about to write, iclass 10, count 0 2006.232.08:10:10.24#ibcon#wrote, iclass 10, count 0 2006.232.08:10:10.24#ibcon#about to read 3, iclass 10, count 0 2006.232.08:10:10.26#ibcon#read 3, iclass 10, count 0 2006.232.08:10:10.26#ibcon#about to read 4, iclass 10, count 0 2006.232.08:10:10.26#ibcon#read 4, iclass 10, count 0 2006.232.08:10:10.26#ibcon#about to read 5, iclass 10, count 0 2006.232.08:10:10.26#ibcon#read 5, iclass 10, count 0 2006.232.08:10:10.26#ibcon#about to read 6, iclass 10, count 0 2006.232.08:10:10.26#ibcon#read 6, iclass 10, count 0 2006.232.08:10:10.26#ibcon#end of sib2, iclass 10, count 0 2006.232.08:10:10.26#ibcon#*mode == 0, iclass 10, count 0 2006.232.08:10:10.26#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.232.08:10:10.26#ibcon#[26=FRQ=08,852.99\r\n] 2006.232.08:10:10.26#ibcon#*before write, iclass 10, count 0 2006.232.08:10:10.26#ibcon#enter sib2, iclass 10, count 0 2006.232.08:10:10.26#ibcon#flushed, iclass 10, count 0 2006.232.08:10:10.26#ibcon#about to write, iclass 10, count 0 2006.232.08:10:10.26#ibcon#wrote, iclass 10, count 0 2006.232.08:10:10.26#ibcon#about to read 3, iclass 10, count 0 2006.232.08:10:10.30#ibcon#read 3, iclass 10, count 0 2006.232.08:10:10.30#ibcon#about to read 4, iclass 10, count 0 2006.232.08:10:10.30#ibcon#read 4, iclass 10, count 0 2006.232.08:10:10.30#ibcon#about to read 5, iclass 10, count 0 2006.232.08:10:10.30#ibcon#read 5, iclass 10, count 0 2006.232.08:10:10.30#ibcon#about to read 6, iclass 10, count 0 2006.232.08:10:10.30#ibcon#read 6, iclass 10, count 0 2006.232.08:10:10.30#ibcon#end of sib2, iclass 10, count 0 2006.232.08:10:10.30#ibcon#*after write, iclass 10, count 0 2006.232.08:10:10.30#ibcon#*before return 0, iclass 10, count 0 2006.232.08:10:10.30#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.232.08:10:10.30#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.232.08:10:10.30#ibcon#about to clear, iclass 10 cls_cnt 0 2006.232.08:10:10.30#ibcon#cleared, iclass 10 cls_cnt 0 2006.232.08:10:10.30$vc4f8/va=8,6 2006.232.08:10:10.30#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.232.08:10:10.30#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.232.08:10:10.30#ibcon#ireg 11 cls_cnt 2 2006.232.08:10:10.30#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.232.08:10:10.36#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.232.08:10:10.36#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.232.08:10:10.36#ibcon#enter wrdev, iclass 12, count 2 2006.232.08:10:10.36#ibcon#first serial, iclass 12, count 2 2006.232.08:10:10.36#ibcon#enter sib2, iclass 12, count 2 2006.232.08:10:10.36#ibcon#flushed, iclass 12, count 2 2006.232.08:10:10.36#ibcon#about to write, iclass 12, count 2 2006.232.08:10:10.36#ibcon#wrote, iclass 12, count 2 2006.232.08:10:10.36#ibcon#about to read 3, iclass 12, count 2 2006.232.08:10:10.38#ibcon#read 3, iclass 12, count 2 2006.232.08:10:10.38#ibcon#about to read 4, iclass 12, count 2 2006.232.08:10:10.38#ibcon#read 4, iclass 12, count 2 2006.232.08:10:10.38#ibcon#about to read 5, iclass 12, count 2 2006.232.08:10:10.38#ibcon#read 5, iclass 12, count 2 2006.232.08:10:10.38#ibcon#about to read 6, iclass 12, count 2 2006.232.08:10:10.38#ibcon#read 6, iclass 12, count 2 2006.232.08:10:10.38#ibcon#end of sib2, iclass 12, count 2 2006.232.08:10:10.38#ibcon#*mode == 0, iclass 12, count 2 2006.232.08:10:10.38#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.232.08:10:10.38#ibcon#[25=AT08-06\r\n] 2006.232.08:10:10.38#ibcon#*before write, iclass 12, count 2 2006.232.08:10:10.38#ibcon#enter sib2, iclass 12, count 2 2006.232.08:10:10.38#ibcon#flushed, iclass 12, count 2 2006.232.08:10:10.38#ibcon#about to write, iclass 12, count 2 2006.232.08:10:10.38#ibcon#wrote, iclass 12, count 2 2006.232.08:10:10.38#ibcon#about to read 3, iclass 12, count 2 2006.232.08:10:10.41#ibcon#read 3, iclass 12, count 2 2006.232.08:10:10.41#ibcon#about to read 4, iclass 12, count 2 2006.232.08:10:10.41#ibcon#read 4, iclass 12, count 2 2006.232.08:10:10.41#ibcon#about to read 5, iclass 12, count 2 2006.232.08:10:10.41#ibcon#read 5, iclass 12, count 2 2006.232.08:10:10.41#ibcon#about to read 6, iclass 12, count 2 2006.232.08:10:10.41#ibcon#read 6, iclass 12, count 2 2006.232.08:10:10.41#ibcon#end of sib2, iclass 12, count 2 2006.232.08:10:10.41#ibcon#*after write, iclass 12, count 2 2006.232.08:10:10.41#ibcon#*before return 0, iclass 12, count 2 2006.232.08:10:10.41#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.232.08:10:10.41#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.232.08:10:10.41#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.232.08:10:10.41#ibcon#ireg 7 cls_cnt 0 2006.232.08:10:10.41#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.232.08:10:10.53#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.232.08:10:10.53#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.232.08:10:10.53#ibcon#enter wrdev, iclass 12, count 0 2006.232.08:10:10.53#ibcon#first serial, iclass 12, count 0 2006.232.08:10:10.53#ibcon#enter sib2, iclass 12, count 0 2006.232.08:10:10.53#ibcon#flushed, iclass 12, count 0 2006.232.08:10:10.53#ibcon#about to write, iclass 12, count 0 2006.232.08:10:10.53#ibcon#wrote, iclass 12, count 0 2006.232.08:10:10.53#ibcon#about to read 3, iclass 12, count 0 2006.232.08:10:10.55#ibcon#read 3, iclass 12, count 0 2006.232.08:10:10.55#ibcon#about to read 4, iclass 12, count 0 2006.232.08:10:10.55#ibcon#read 4, iclass 12, count 0 2006.232.08:10:10.55#ibcon#about to read 5, iclass 12, count 0 2006.232.08:10:10.55#ibcon#read 5, iclass 12, count 0 2006.232.08:10:10.55#ibcon#about to read 6, iclass 12, count 0 2006.232.08:10:10.55#ibcon#read 6, iclass 12, count 0 2006.232.08:10:10.55#ibcon#end of sib2, iclass 12, count 0 2006.232.08:10:10.55#ibcon#*mode == 0, iclass 12, count 0 2006.232.08:10:10.55#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.232.08:10:10.55#ibcon#[25=USB\r\n] 2006.232.08:10:10.55#ibcon#*before write, iclass 12, count 0 2006.232.08:10:10.55#ibcon#enter sib2, iclass 12, count 0 2006.232.08:10:10.55#ibcon#flushed, iclass 12, count 0 2006.232.08:10:10.55#ibcon#about to write, iclass 12, count 0 2006.232.08:10:10.55#ibcon#wrote, iclass 12, count 0 2006.232.08:10:10.55#ibcon#about to read 3, iclass 12, count 0 2006.232.08:10:10.58#ibcon#read 3, iclass 12, count 0 2006.232.08:10:10.58#ibcon#about to read 4, iclass 12, count 0 2006.232.08:10:10.58#ibcon#read 4, iclass 12, count 0 2006.232.08:10:10.58#ibcon#about to read 5, iclass 12, count 0 2006.232.08:10:10.58#ibcon#read 5, iclass 12, count 0 2006.232.08:10:10.58#ibcon#about to read 6, iclass 12, count 0 2006.232.08:10:10.58#ibcon#read 6, iclass 12, count 0 2006.232.08:10:10.58#ibcon#end of sib2, iclass 12, count 0 2006.232.08:10:10.58#ibcon#*after write, iclass 12, count 0 2006.232.08:10:10.58#ibcon#*before return 0, iclass 12, count 0 2006.232.08:10:10.58#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.232.08:10:10.58#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.232.08:10:10.58#ibcon#about to clear, iclass 12 cls_cnt 0 2006.232.08:10:10.58#ibcon#cleared, iclass 12 cls_cnt 0 2006.232.08:10:10.58$vc4f8/vblo=1,632.99 2006.232.08:10:10.58#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.232.08:10:10.58#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.232.08:10:10.58#ibcon#ireg 17 cls_cnt 0 2006.232.08:10:10.58#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.232.08:10:10.58#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.232.08:10:10.58#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.232.08:10:10.58#ibcon#enter wrdev, iclass 14, count 0 2006.232.08:10:10.58#ibcon#first serial, iclass 14, count 0 2006.232.08:10:10.58#ibcon#enter sib2, iclass 14, count 0 2006.232.08:10:10.58#ibcon#flushed, iclass 14, count 0 2006.232.08:10:10.58#ibcon#about to write, iclass 14, count 0 2006.232.08:10:10.58#ibcon#wrote, iclass 14, count 0 2006.232.08:10:10.58#ibcon#about to read 3, iclass 14, count 0 2006.232.08:10:10.60#ibcon#read 3, iclass 14, count 0 2006.232.08:10:10.60#ibcon#about to read 4, iclass 14, count 0 2006.232.08:10:10.60#ibcon#read 4, iclass 14, count 0 2006.232.08:10:10.60#ibcon#about to read 5, iclass 14, count 0 2006.232.08:10:10.60#ibcon#read 5, iclass 14, count 0 2006.232.08:10:10.60#ibcon#about to read 6, iclass 14, count 0 2006.232.08:10:10.60#ibcon#read 6, iclass 14, count 0 2006.232.08:10:10.60#ibcon#end of sib2, iclass 14, count 0 2006.232.08:10:10.60#ibcon#*mode == 0, iclass 14, count 0 2006.232.08:10:10.60#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.232.08:10:10.60#ibcon#[28=FRQ=01,632.99\r\n] 2006.232.08:10:10.60#ibcon#*before write, iclass 14, count 0 2006.232.08:10:10.60#ibcon#enter sib2, iclass 14, count 0 2006.232.08:10:10.60#ibcon#flushed, iclass 14, count 0 2006.232.08:10:10.60#ibcon#about to write, iclass 14, count 0 2006.232.08:10:10.60#ibcon#wrote, iclass 14, count 0 2006.232.08:10:10.60#ibcon#about to read 3, iclass 14, count 0 2006.232.08:10:10.64#ibcon#read 3, iclass 14, count 0 2006.232.08:10:10.64#ibcon#about to read 4, iclass 14, count 0 2006.232.08:10:10.64#ibcon#read 4, iclass 14, count 0 2006.232.08:10:10.64#ibcon#about to read 5, iclass 14, count 0 2006.232.08:10:10.64#ibcon#read 5, iclass 14, count 0 2006.232.08:10:10.64#ibcon#about to read 6, iclass 14, count 0 2006.232.08:10:10.64#ibcon#read 6, iclass 14, count 0 2006.232.08:10:10.64#ibcon#end of sib2, iclass 14, count 0 2006.232.08:10:10.64#ibcon#*after write, iclass 14, count 0 2006.232.08:10:10.64#ibcon#*before return 0, iclass 14, count 0 2006.232.08:10:10.64#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.232.08:10:10.64#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.232.08:10:10.64#ibcon#about to clear, iclass 14 cls_cnt 0 2006.232.08:10:10.64#ibcon#cleared, iclass 14 cls_cnt 0 2006.232.08:10:10.64$vc4f8/vb=1,4 2006.232.08:10:10.64#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.232.08:10:10.64#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.232.08:10:10.64#ibcon#ireg 11 cls_cnt 2 2006.232.08:10:10.64#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.232.08:10:10.64#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.232.08:10:10.64#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.232.08:10:10.64#ibcon#enter wrdev, iclass 16, count 2 2006.232.08:10:10.64#ibcon#first serial, iclass 16, count 2 2006.232.08:10:10.64#ibcon#enter sib2, iclass 16, count 2 2006.232.08:10:10.64#ibcon#flushed, iclass 16, count 2 2006.232.08:10:10.64#ibcon#about to write, iclass 16, count 2 2006.232.08:10:10.64#ibcon#wrote, iclass 16, count 2 2006.232.08:10:10.64#ibcon#about to read 3, iclass 16, count 2 2006.232.08:10:10.66#ibcon#read 3, iclass 16, count 2 2006.232.08:10:10.66#ibcon#about to read 4, iclass 16, count 2 2006.232.08:10:10.66#ibcon#read 4, iclass 16, count 2 2006.232.08:10:10.66#ibcon#about to read 5, iclass 16, count 2 2006.232.08:10:10.66#ibcon#read 5, iclass 16, count 2 2006.232.08:10:10.66#ibcon#about to read 6, iclass 16, count 2 2006.232.08:10:10.66#ibcon#read 6, iclass 16, count 2 2006.232.08:10:10.66#ibcon#end of sib2, iclass 16, count 2 2006.232.08:10:10.66#ibcon#*mode == 0, iclass 16, count 2 2006.232.08:10:10.66#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.232.08:10:10.66#ibcon#[27=AT01-04\r\n] 2006.232.08:10:10.66#ibcon#*before write, iclass 16, count 2 2006.232.08:10:10.66#ibcon#enter sib2, iclass 16, count 2 2006.232.08:10:10.66#ibcon#flushed, iclass 16, count 2 2006.232.08:10:10.66#ibcon#about to write, iclass 16, count 2 2006.232.08:10:10.66#ibcon#wrote, iclass 16, count 2 2006.232.08:10:10.66#ibcon#about to read 3, iclass 16, count 2 2006.232.08:10:10.69#ibcon#read 3, iclass 16, count 2 2006.232.08:10:10.69#ibcon#about to read 4, iclass 16, count 2 2006.232.08:10:10.69#ibcon#read 4, iclass 16, count 2 2006.232.08:10:10.69#ibcon#about to read 5, iclass 16, count 2 2006.232.08:10:10.69#ibcon#read 5, iclass 16, count 2 2006.232.08:10:10.69#ibcon#about to read 6, iclass 16, count 2 2006.232.08:10:10.69#ibcon#read 6, iclass 16, count 2 2006.232.08:10:10.69#ibcon#end of sib2, iclass 16, count 2 2006.232.08:10:10.69#ibcon#*after write, iclass 16, count 2 2006.232.08:10:10.69#ibcon#*before return 0, iclass 16, count 2 2006.232.08:10:10.69#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.232.08:10:10.69#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.232.08:10:10.69#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.232.08:10:10.69#ibcon#ireg 7 cls_cnt 0 2006.232.08:10:10.69#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.232.08:10:10.81#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.232.08:10:10.81#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.232.08:10:10.81#ibcon#enter wrdev, iclass 16, count 0 2006.232.08:10:10.81#ibcon#first serial, iclass 16, count 0 2006.232.08:10:10.81#ibcon#enter sib2, iclass 16, count 0 2006.232.08:10:10.81#ibcon#flushed, iclass 16, count 0 2006.232.08:10:10.81#ibcon#about to write, iclass 16, count 0 2006.232.08:10:10.81#ibcon#wrote, iclass 16, count 0 2006.232.08:10:10.81#ibcon#about to read 3, iclass 16, count 0 2006.232.08:10:10.83#ibcon#read 3, iclass 16, count 0 2006.232.08:10:10.83#ibcon#about to read 4, iclass 16, count 0 2006.232.08:10:10.83#ibcon#read 4, iclass 16, count 0 2006.232.08:10:10.83#ibcon#about to read 5, iclass 16, count 0 2006.232.08:10:10.83#ibcon#read 5, iclass 16, count 0 2006.232.08:10:10.83#ibcon#about to read 6, iclass 16, count 0 2006.232.08:10:10.83#ibcon#read 6, iclass 16, count 0 2006.232.08:10:10.83#ibcon#end of sib2, iclass 16, count 0 2006.232.08:10:10.83#ibcon#*mode == 0, iclass 16, count 0 2006.232.08:10:10.83#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.232.08:10:10.83#ibcon#[27=USB\r\n] 2006.232.08:10:10.83#ibcon#*before write, iclass 16, count 0 2006.232.08:10:10.83#ibcon#enter sib2, iclass 16, count 0 2006.232.08:10:10.83#ibcon#flushed, iclass 16, count 0 2006.232.08:10:10.83#ibcon#about to write, iclass 16, count 0 2006.232.08:10:10.83#ibcon#wrote, iclass 16, count 0 2006.232.08:10:10.83#ibcon#about to read 3, iclass 16, count 0 2006.232.08:10:10.86#ibcon#read 3, iclass 16, count 0 2006.232.08:10:10.86#ibcon#about to read 4, iclass 16, count 0 2006.232.08:10:10.86#ibcon#read 4, iclass 16, count 0 2006.232.08:10:10.86#ibcon#about to read 5, iclass 16, count 0 2006.232.08:10:10.86#ibcon#read 5, iclass 16, count 0 2006.232.08:10:10.86#ibcon#about to read 6, iclass 16, count 0 2006.232.08:10:10.86#ibcon#read 6, iclass 16, count 0 2006.232.08:10:10.86#ibcon#end of sib2, iclass 16, count 0 2006.232.08:10:10.86#ibcon#*after write, iclass 16, count 0 2006.232.08:10:10.86#ibcon#*before return 0, iclass 16, count 0 2006.232.08:10:10.86#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.232.08:10:10.86#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.232.08:10:10.86#ibcon#about to clear, iclass 16 cls_cnt 0 2006.232.08:10:10.86#ibcon#cleared, iclass 16 cls_cnt 0 2006.232.08:10:10.86$vc4f8/vblo=2,640.99 2006.232.08:10:10.86#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.232.08:10:10.86#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.232.08:10:10.86#ibcon#ireg 17 cls_cnt 0 2006.232.08:10:10.86#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.232.08:10:10.86#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.232.08:10:10.86#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.232.08:10:10.86#ibcon#enter wrdev, iclass 18, count 0 2006.232.08:10:10.86#ibcon#first serial, iclass 18, count 0 2006.232.08:10:10.86#ibcon#enter sib2, iclass 18, count 0 2006.232.08:10:10.86#ibcon#flushed, iclass 18, count 0 2006.232.08:10:10.86#ibcon#about to write, iclass 18, count 0 2006.232.08:10:10.86#ibcon#wrote, iclass 18, count 0 2006.232.08:10:10.86#ibcon#about to read 3, iclass 18, count 0 2006.232.08:10:10.88#ibcon#read 3, iclass 18, count 0 2006.232.08:10:10.88#ibcon#about to read 4, iclass 18, count 0 2006.232.08:10:10.88#ibcon#read 4, iclass 18, count 0 2006.232.08:10:10.88#ibcon#about to read 5, iclass 18, count 0 2006.232.08:10:10.88#ibcon#read 5, iclass 18, count 0 2006.232.08:10:10.88#ibcon#about to read 6, iclass 18, count 0 2006.232.08:10:10.88#ibcon#read 6, iclass 18, count 0 2006.232.08:10:10.88#ibcon#end of sib2, iclass 18, count 0 2006.232.08:10:10.88#ibcon#*mode == 0, iclass 18, count 0 2006.232.08:10:10.88#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.232.08:10:10.88#ibcon#[28=FRQ=02,640.99\r\n] 2006.232.08:10:10.88#ibcon#*before write, iclass 18, count 0 2006.232.08:10:10.88#ibcon#enter sib2, iclass 18, count 0 2006.232.08:10:10.88#ibcon#flushed, iclass 18, count 0 2006.232.08:10:10.88#ibcon#about to write, iclass 18, count 0 2006.232.08:10:10.88#ibcon#wrote, iclass 18, count 0 2006.232.08:10:10.88#ibcon#about to read 3, iclass 18, count 0 2006.232.08:10:10.93#ibcon#read 3, iclass 18, count 0 2006.232.08:10:10.93#ibcon#about to read 4, iclass 18, count 0 2006.232.08:10:10.93#ibcon#read 4, iclass 18, count 0 2006.232.08:10:10.93#ibcon#about to read 5, iclass 18, count 0 2006.232.08:10:10.93#ibcon#read 5, iclass 18, count 0 2006.232.08:10:10.93#ibcon#about to read 6, iclass 18, count 0 2006.232.08:10:10.93#ibcon#read 6, iclass 18, count 0 2006.232.08:10:10.93#ibcon#end of sib2, iclass 18, count 0 2006.232.08:10:10.93#ibcon#*after write, iclass 18, count 0 2006.232.08:10:10.93#ibcon#*before return 0, iclass 18, count 0 2006.232.08:10:10.93#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.232.08:10:10.93#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.232.08:10:10.93#ibcon#about to clear, iclass 18 cls_cnt 0 2006.232.08:10:10.93#ibcon#cleared, iclass 18 cls_cnt 0 2006.232.08:10:10.93$vc4f8/vb=2,4 2006.232.08:10:10.93#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.232.08:10:10.93#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.232.08:10:10.93#ibcon#ireg 11 cls_cnt 2 2006.232.08:10:10.93#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.232.08:10:10.98#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.232.08:10:10.98#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.232.08:10:10.98#ibcon#enter wrdev, iclass 20, count 2 2006.232.08:10:10.98#ibcon#first serial, iclass 20, count 2 2006.232.08:10:10.98#ibcon#enter sib2, iclass 20, count 2 2006.232.08:10:10.98#ibcon#flushed, iclass 20, count 2 2006.232.08:10:10.98#ibcon#about to write, iclass 20, count 2 2006.232.08:10:10.98#ibcon#wrote, iclass 20, count 2 2006.232.08:10:10.98#ibcon#about to read 3, iclass 20, count 2 2006.232.08:10:11.00#ibcon#read 3, iclass 20, count 2 2006.232.08:10:11.00#ibcon#about to read 4, iclass 20, count 2 2006.232.08:10:11.00#ibcon#read 4, iclass 20, count 2 2006.232.08:10:11.00#ibcon#about to read 5, iclass 20, count 2 2006.232.08:10:11.00#ibcon#read 5, iclass 20, count 2 2006.232.08:10:11.00#ibcon#about to read 6, iclass 20, count 2 2006.232.08:10:11.00#ibcon#read 6, iclass 20, count 2 2006.232.08:10:11.00#ibcon#end of sib2, iclass 20, count 2 2006.232.08:10:11.00#ibcon#*mode == 0, iclass 20, count 2 2006.232.08:10:11.00#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.232.08:10:11.00#ibcon#[27=AT02-04\r\n] 2006.232.08:10:11.00#ibcon#*before write, iclass 20, count 2 2006.232.08:10:11.00#ibcon#enter sib2, iclass 20, count 2 2006.232.08:10:11.00#ibcon#flushed, iclass 20, count 2 2006.232.08:10:11.00#ibcon#about to write, iclass 20, count 2 2006.232.08:10:11.00#ibcon#wrote, iclass 20, count 2 2006.232.08:10:11.00#ibcon#about to read 3, iclass 20, count 2 2006.232.08:10:11.03#ibcon#read 3, iclass 20, count 2 2006.232.08:10:11.03#ibcon#about to read 4, iclass 20, count 2 2006.232.08:10:11.03#ibcon#read 4, iclass 20, count 2 2006.232.08:10:11.03#ibcon#about to read 5, iclass 20, count 2 2006.232.08:10:11.03#ibcon#read 5, iclass 20, count 2 2006.232.08:10:11.03#ibcon#about to read 6, iclass 20, count 2 2006.232.08:10:11.03#ibcon#read 6, iclass 20, count 2 2006.232.08:10:11.03#ibcon#end of sib2, iclass 20, count 2 2006.232.08:10:11.03#ibcon#*after write, iclass 20, count 2 2006.232.08:10:11.03#ibcon#*before return 0, iclass 20, count 2 2006.232.08:10:11.03#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.232.08:10:11.03#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.232.08:10:11.03#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.232.08:10:11.03#ibcon#ireg 7 cls_cnt 0 2006.232.08:10:11.03#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.232.08:10:11.15#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.232.08:10:11.15#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.232.08:10:11.15#ibcon#enter wrdev, iclass 20, count 0 2006.232.08:10:11.15#ibcon#first serial, iclass 20, count 0 2006.232.08:10:11.15#ibcon#enter sib2, iclass 20, count 0 2006.232.08:10:11.15#ibcon#flushed, iclass 20, count 0 2006.232.08:10:11.15#ibcon#about to write, iclass 20, count 0 2006.232.08:10:11.15#ibcon#wrote, iclass 20, count 0 2006.232.08:10:11.15#ibcon#about to read 3, iclass 20, count 0 2006.232.08:10:11.17#ibcon#read 3, iclass 20, count 0 2006.232.08:10:11.17#ibcon#about to read 4, iclass 20, count 0 2006.232.08:10:11.17#ibcon#read 4, iclass 20, count 0 2006.232.08:10:11.17#ibcon#about to read 5, iclass 20, count 0 2006.232.08:10:11.17#ibcon#read 5, iclass 20, count 0 2006.232.08:10:11.17#ibcon#about to read 6, iclass 20, count 0 2006.232.08:10:11.17#ibcon#read 6, iclass 20, count 0 2006.232.08:10:11.17#ibcon#end of sib2, iclass 20, count 0 2006.232.08:10:11.17#ibcon#*mode == 0, iclass 20, count 0 2006.232.08:10:11.17#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.232.08:10:11.17#ibcon#[27=USB\r\n] 2006.232.08:10:11.17#ibcon#*before write, iclass 20, count 0 2006.232.08:10:11.17#ibcon#enter sib2, iclass 20, count 0 2006.232.08:10:11.17#ibcon#flushed, iclass 20, count 0 2006.232.08:10:11.17#ibcon#about to write, iclass 20, count 0 2006.232.08:10:11.17#ibcon#wrote, iclass 20, count 0 2006.232.08:10:11.17#ibcon#about to read 3, iclass 20, count 0 2006.232.08:10:11.20#ibcon#read 3, iclass 20, count 0 2006.232.08:10:11.20#ibcon#about to read 4, iclass 20, count 0 2006.232.08:10:11.20#ibcon#read 4, iclass 20, count 0 2006.232.08:10:11.20#ibcon#about to read 5, iclass 20, count 0 2006.232.08:10:11.20#ibcon#read 5, iclass 20, count 0 2006.232.08:10:11.20#ibcon#about to read 6, iclass 20, count 0 2006.232.08:10:11.20#ibcon#read 6, iclass 20, count 0 2006.232.08:10:11.20#ibcon#end of sib2, iclass 20, count 0 2006.232.08:10:11.20#ibcon#*after write, iclass 20, count 0 2006.232.08:10:11.20#ibcon#*before return 0, iclass 20, count 0 2006.232.08:10:11.20#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.232.08:10:11.20#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.232.08:10:11.20#ibcon#about to clear, iclass 20 cls_cnt 0 2006.232.08:10:11.20#ibcon#cleared, iclass 20 cls_cnt 0 2006.232.08:10:11.20$vc4f8/vblo=3,656.99 2006.232.08:10:11.20#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.232.08:10:11.20#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.232.08:10:11.20#ibcon#ireg 17 cls_cnt 0 2006.232.08:10:11.20#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.232.08:10:11.20#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.232.08:10:11.20#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.232.08:10:11.20#ibcon#enter wrdev, iclass 22, count 0 2006.232.08:10:11.20#ibcon#first serial, iclass 22, count 0 2006.232.08:10:11.20#ibcon#enter sib2, iclass 22, count 0 2006.232.08:10:11.20#ibcon#flushed, iclass 22, count 0 2006.232.08:10:11.20#ibcon#about to write, iclass 22, count 0 2006.232.08:10:11.20#ibcon#wrote, iclass 22, count 0 2006.232.08:10:11.20#ibcon#about to read 3, iclass 22, count 0 2006.232.08:10:11.22#ibcon#read 3, iclass 22, count 0 2006.232.08:10:11.22#ibcon#about to read 4, iclass 22, count 0 2006.232.08:10:11.22#ibcon#read 4, iclass 22, count 0 2006.232.08:10:11.22#ibcon#about to read 5, iclass 22, count 0 2006.232.08:10:11.22#ibcon#read 5, iclass 22, count 0 2006.232.08:10:11.22#ibcon#about to read 6, iclass 22, count 0 2006.232.08:10:11.22#ibcon#read 6, iclass 22, count 0 2006.232.08:10:11.22#ibcon#end of sib2, iclass 22, count 0 2006.232.08:10:11.22#ibcon#*mode == 0, iclass 22, count 0 2006.232.08:10:11.22#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.232.08:10:11.22#ibcon#[28=FRQ=03,656.99\r\n] 2006.232.08:10:11.22#ibcon#*before write, iclass 22, count 0 2006.232.08:10:11.22#ibcon#enter sib2, iclass 22, count 0 2006.232.08:10:11.22#ibcon#flushed, iclass 22, count 0 2006.232.08:10:11.22#ibcon#about to write, iclass 22, count 0 2006.232.08:10:11.22#ibcon#wrote, iclass 22, count 0 2006.232.08:10:11.22#ibcon#about to read 3, iclass 22, count 0 2006.232.08:10:11.26#ibcon#read 3, iclass 22, count 0 2006.232.08:10:11.26#ibcon#about to read 4, iclass 22, count 0 2006.232.08:10:11.26#ibcon#read 4, iclass 22, count 0 2006.232.08:10:11.26#ibcon#about to read 5, iclass 22, count 0 2006.232.08:10:11.26#ibcon#read 5, iclass 22, count 0 2006.232.08:10:11.26#ibcon#about to read 6, iclass 22, count 0 2006.232.08:10:11.26#ibcon#read 6, iclass 22, count 0 2006.232.08:10:11.26#ibcon#end of sib2, iclass 22, count 0 2006.232.08:10:11.26#ibcon#*after write, iclass 22, count 0 2006.232.08:10:11.26#ibcon#*before return 0, iclass 22, count 0 2006.232.08:10:11.26#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.232.08:10:11.26#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.232.08:10:11.26#ibcon#about to clear, iclass 22 cls_cnt 0 2006.232.08:10:11.26#ibcon#cleared, iclass 22 cls_cnt 0 2006.232.08:10:11.26$vc4f8/vb=3,4 2006.232.08:10:11.26#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.232.08:10:11.26#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.232.08:10:11.26#ibcon#ireg 11 cls_cnt 2 2006.232.08:10:11.26#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.232.08:10:11.32#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.232.08:10:11.32#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.232.08:10:11.32#ibcon#enter wrdev, iclass 24, count 2 2006.232.08:10:11.32#ibcon#first serial, iclass 24, count 2 2006.232.08:10:11.32#ibcon#enter sib2, iclass 24, count 2 2006.232.08:10:11.32#ibcon#flushed, iclass 24, count 2 2006.232.08:10:11.32#ibcon#about to write, iclass 24, count 2 2006.232.08:10:11.32#ibcon#wrote, iclass 24, count 2 2006.232.08:10:11.32#ibcon#about to read 3, iclass 24, count 2 2006.232.08:10:11.34#ibcon#read 3, iclass 24, count 2 2006.232.08:10:11.34#ibcon#about to read 4, iclass 24, count 2 2006.232.08:10:11.34#ibcon#read 4, iclass 24, count 2 2006.232.08:10:11.34#ibcon#about to read 5, iclass 24, count 2 2006.232.08:10:11.34#ibcon#read 5, iclass 24, count 2 2006.232.08:10:11.34#ibcon#about to read 6, iclass 24, count 2 2006.232.08:10:11.34#ibcon#read 6, iclass 24, count 2 2006.232.08:10:11.34#ibcon#end of sib2, iclass 24, count 2 2006.232.08:10:11.34#ibcon#*mode == 0, iclass 24, count 2 2006.232.08:10:11.34#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.232.08:10:11.34#ibcon#[27=AT03-04\r\n] 2006.232.08:10:11.34#ibcon#*before write, iclass 24, count 2 2006.232.08:10:11.34#ibcon#enter sib2, iclass 24, count 2 2006.232.08:10:11.34#ibcon#flushed, iclass 24, count 2 2006.232.08:10:11.34#ibcon#about to write, iclass 24, count 2 2006.232.08:10:11.34#ibcon#wrote, iclass 24, count 2 2006.232.08:10:11.34#ibcon#about to read 3, iclass 24, count 2 2006.232.08:10:11.37#ibcon#read 3, iclass 24, count 2 2006.232.08:10:11.37#ibcon#about to read 4, iclass 24, count 2 2006.232.08:10:11.37#ibcon#read 4, iclass 24, count 2 2006.232.08:10:11.37#ibcon#about to read 5, iclass 24, count 2 2006.232.08:10:11.37#ibcon#read 5, iclass 24, count 2 2006.232.08:10:11.37#ibcon#about to read 6, iclass 24, count 2 2006.232.08:10:11.37#ibcon#read 6, iclass 24, count 2 2006.232.08:10:11.37#ibcon#end of sib2, iclass 24, count 2 2006.232.08:10:11.37#ibcon#*after write, iclass 24, count 2 2006.232.08:10:11.37#ibcon#*before return 0, iclass 24, count 2 2006.232.08:10:11.37#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.232.08:10:11.37#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.232.08:10:11.37#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.232.08:10:11.37#ibcon#ireg 7 cls_cnt 0 2006.232.08:10:11.37#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.232.08:10:11.49#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.232.08:10:11.49#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.232.08:10:11.49#ibcon#enter wrdev, iclass 24, count 0 2006.232.08:10:11.49#ibcon#first serial, iclass 24, count 0 2006.232.08:10:11.49#ibcon#enter sib2, iclass 24, count 0 2006.232.08:10:11.49#ibcon#flushed, iclass 24, count 0 2006.232.08:10:11.49#ibcon#about to write, iclass 24, count 0 2006.232.08:10:11.49#ibcon#wrote, iclass 24, count 0 2006.232.08:10:11.49#ibcon#about to read 3, iclass 24, count 0 2006.232.08:10:11.51#ibcon#read 3, iclass 24, count 0 2006.232.08:10:11.51#ibcon#about to read 4, iclass 24, count 0 2006.232.08:10:11.51#ibcon#read 4, iclass 24, count 0 2006.232.08:10:11.51#ibcon#about to read 5, iclass 24, count 0 2006.232.08:10:11.51#ibcon#read 5, iclass 24, count 0 2006.232.08:10:11.51#ibcon#about to read 6, iclass 24, count 0 2006.232.08:10:11.51#ibcon#read 6, iclass 24, count 0 2006.232.08:10:11.51#ibcon#end of sib2, iclass 24, count 0 2006.232.08:10:11.51#ibcon#*mode == 0, iclass 24, count 0 2006.232.08:10:11.51#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.232.08:10:11.51#ibcon#[27=USB\r\n] 2006.232.08:10:11.51#ibcon#*before write, iclass 24, count 0 2006.232.08:10:11.51#ibcon#enter sib2, iclass 24, count 0 2006.232.08:10:11.51#ibcon#flushed, iclass 24, count 0 2006.232.08:10:11.51#ibcon#about to write, iclass 24, count 0 2006.232.08:10:11.51#ibcon#wrote, iclass 24, count 0 2006.232.08:10:11.51#ibcon#about to read 3, iclass 24, count 0 2006.232.08:10:11.54#ibcon#read 3, iclass 24, count 0 2006.232.08:10:11.54#ibcon#about to read 4, iclass 24, count 0 2006.232.08:10:11.54#ibcon#read 4, iclass 24, count 0 2006.232.08:10:11.54#ibcon#about to read 5, iclass 24, count 0 2006.232.08:10:11.54#ibcon#read 5, iclass 24, count 0 2006.232.08:10:11.54#ibcon#about to read 6, iclass 24, count 0 2006.232.08:10:11.54#ibcon#read 6, iclass 24, count 0 2006.232.08:10:11.54#ibcon#end of sib2, iclass 24, count 0 2006.232.08:10:11.54#ibcon#*after write, iclass 24, count 0 2006.232.08:10:11.54#ibcon#*before return 0, iclass 24, count 0 2006.232.08:10:11.54#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.232.08:10:11.54#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.232.08:10:11.54#ibcon#about to clear, iclass 24 cls_cnt 0 2006.232.08:10:11.54#ibcon#cleared, iclass 24 cls_cnt 0 2006.232.08:10:11.54$vc4f8/vblo=4,712.99 2006.232.08:10:11.54#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.232.08:10:11.54#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.232.08:10:11.54#ibcon#ireg 17 cls_cnt 0 2006.232.08:10:11.54#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.232.08:10:11.54#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.232.08:10:11.54#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.232.08:10:11.54#ibcon#enter wrdev, iclass 26, count 0 2006.232.08:10:11.54#ibcon#first serial, iclass 26, count 0 2006.232.08:10:11.54#ibcon#enter sib2, iclass 26, count 0 2006.232.08:10:11.54#ibcon#flushed, iclass 26, count 0 2006.232.08:10:11.54#ibcon#about to write, iclass 26, count 0 2006.232.08:10:11.54#ibcon#wrote, iclass 26, count 0 2006.232.08:10:11.54#ibcon#about to read 3, iclass 26, count 0 2006.232.08:10:11.56#ibcon#read 3, iclass 26, count 0 2006.232.08:10:11.56#ibcon#about to read 4, iclass 26, count 0 2006.232.08:10:11.56#ibcon#read 4, iclass 26, count 0 2006.232.08:10:11.56#ibcon#about to read 5, iclass 26, count 0 2006.232.08:10:11.56#ibcon#read 5, iclass 26, count 0 2006.232.08:10:11.56#ibcon#about to read 6, iclass 26, count 0 2006.232.08:10:11.56#ibcon#read 6, iclass 26, count 0 2006.232.08:10:11.56#ibcon#end of sib2, iclass 26, count 0 2006.232.08:10:11.56#ibcon#*mode == 0, iclass 26, count 0 2006.232.08:10:11.56#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.232.08:10:11.56#ibcon#[28=FRQ=04,712.99\r\n] 2006.232.08:10:11.56#ibcon#*before write, iclass 26, count 0 2006.232.08:10:11.56#ibcon#enter sib2, iclass 26, count 0 2006.232.08:10:11.56#ibcon#flushed, iclass 26, count 0 2006.232.08:10:11.56#ibcon#about to write, iclass 26, count 0 2006.232.08:10:11.56#ibcon#wrote, iclass 26, count 0 2006.232.08:10:11.56#ibcon#about to read 3, iclass 26, count 0 2006.232.08:10:11.60#ibcon#read 3, iclass 26, count 0 2006.232.08:10:11.60#ibcon#about to read 4, iclass 26, count 0 2006.232.08:10:11.60#ibcon#read 4, iclass 26, count 0 2006.232.08:10:11.60#ibcon#about to read 5, iclass 26, count 0 2006.232.08:10:11.60#ibcon#read 5, iclass 26, count 0 2006.232.08:10:11.60#ibcon#about to read 6, iclass 26, count 0 2006.232.08:10:11.60#ibcon#read 6, iclass 26, count 0 2006.232.08:10:11.60#ibcon#end of sib2, iclass 26, count 0 2006.232.08:10:11.60#ibcon#*after write, iclass 26, count 0 2006.232.08:10:11.60#ibcon#*before return 0, iclass 26, count 0 2006.232.08:10:11.60#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.232.08:10:11.60#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.232.08:10:11.60#ibcon#about to clear, iclass 26 cls_cnt 0 2006.232.08:10:11.60#ibcon#cleared, iclass 26 cls_cnt 0 2006.232.08:10:11.60$vc4f8/vb=4,4 2006.232.08:10:11.60#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.232.08:10:11.60#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.232.08:10:11.60#ibcon#ireg 11 cls_cnt 2 2006.232.08:10:11.60#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.232.08:10:11.66#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.232.08:10:11.66#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.232.08:10:11.66#ibcon#enter wrdev, iclass 28, count 2 2006.232.08:10:11.66#ibcon#first serial, iclass 28, count 2 2006.232.08:10:11.66#ibcon#enter sib2, iclass 28, count 2 2006.232.08:10:11.66#ibcon#flushed, iclass 28, count 2 2006.232.08:10:11.66#ibcon#about to write, iclass 28, count 2 2006.232.08:10:11.66#ibcon#wrote, iclass 28, count 2 2006.232.08:10:11.66#ibcon#about to read 3, iclass 28, count 2 2006.232.08:10:11.68#ibcon#read 3, iclass 28, count 2 2006.232.08:10:11.68#ibcon#about to read 4, iclass 28, count 2 2006.232.08:10:11.68#ibcon#read 4, iclass 28, count 2 2006.232.08:10:11.68#ibcon#about to read 5, iclass 28, count 2 2006.232.08:10:11.68#ibcon#read 5, iclass 28, count 2 2006.232.08:10:11.68#ibcon#about to read 6, iclass 28, count 2 2006.232.08:10:11.68#ibcon#read 6, iclass 28, count 2 2006.232.08:10:11.68#ibcon#end of sib2, iclass 28, count 2 2006.232.08:10:11.68#ibcon#*mode == 0, iclass 28, count 2 2006.232.08:10:11.68#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.232.08:10:11.68#ibcon#[27=AT04-04\r\n] 2006.232.08:10:11.68#ibcon#*before write, iclass 28, count 2 2006.232.08:10:11.68#ibcon#enter sib2, iclass 28, count 2 2006.232.08:10:11.68#ibcon#flushed, iclass 28, count 2 2006.232.08:10:11.68#ibcon#about to write, iclass 28, count 2 2006.232.08:10:11.68#ibcon#wrote, iclass 28, count 2 2006.232.08:10:11.68#ibcon#about to read 3, iclass 28, count 2 2006.232.08:10:11.71#ibcon#read 3, iclass 28, count 2 2006.232.08:10:11.71#ibcon#about to read 4, iclass 28, count 2 2006.232.08:10:11.71#ibcon#read 4, iclass 28, count 2 2006.232.08:10:11.71#ibcon#about to read 5, iclass 28, count 2 2006.232.08:10:11.71#ibcon#read 5, iclass 28, count 2 2006.232.08:10:11.71#ibcon#about to read 6, iclass 28, count 2 2006.232.08:10:11.71#ibcon#read 6, iclass 28, count 2 2006.232.08:10:11.71#ibcon#end of sib2, iclass 28, count 2 2006.232.08:10:11.71#ibcon#*after write, iclass 28, count 2 2006.232.08:10:11.71#ibcon#*before return 0, iclass 28, count 2 2006.232.08:10:11.71#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.232.08:10:11.71#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.232.08:10:11.71#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.232.08:10:11.71#ibcon#ireg 7 cls_cnt 0 2006.232.08:10:11.71#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.232.08:10:11.83#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.232.08:10:11.83#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.232.08:10:11.83#ibcon#enter wrdev, iclass 28, count 0 2006.232.08:10:11.83#ibcon#first serial, iclass 28, count 0 2006.232.08:10:11.83#ibcon#enter sib2, iclass 28, count 0 2006.232.08:10:11.83#ibcon#flushed, iclass 28, count 0 2006.232.08:10:11.83#ibcon#about to write, iclass 28, count 0 2006.232.08:10:11.83#ibcon#wrote, iclass 28, count 0 2006.232.08:10:11.83#ibcon#about to read 3, iclass 28, count 0 2006.232.08:10:11.85#ibcon#read 3, iclass 28, count 0 2006.232.08:10:11.85#ibcon#about to read 4, iclass 28, count 0 2006.232.08:10:11.85#ibcon#read 4, iclass 28, count 0 2006.232.08:10:11.85#ibcon#about to read 5, iclass 28, count 0 2006.232.08:10:11.85#ibcon#read 5, iclass 28, count 0 2006.232.08:10:11.85#ibcon#about to read 6, iclass 28, count 0 2006.232.08:10:11.85#ibcon#read 6, iclass 28, count 0 2006.232.08:10:11.85#ibcon#end of sib2, iclass 28, count 0 2006.232.08:10:11.85#ibcon#*mode == 0, iclass 28, count 0 2006.232.08:10:11.85#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.232.08:10:11.85#ibcon#[27=USB\r\n] 2006.232.08:10:11.85#ibcon#*before write, iclass 28, count 0 2006.232.08:10:11.85#ibcon#enter sib2, iclass 28, count 0 2006.232.08:10:11.85#ibcon#flushed, iclass 28, count 0 2006.232.08:10:11.85#ibcon#about to write, iclass 28, count 0 2006.232.08:10:11.85#ibcon#wrote, iclass 28, count 0 2006.232.08:10:11.85#ibcon#about to read 3, iclass 28, count 0 2006.232.08:10:11.88#ibcon#read 3, iclass 28, count 0 2006.232.08:10:11.88#ibcon#about to read 4, iclass 28, count 0 2006.232.08:10:11.88#ibcon#read 4, iclass 28, count 0 2006.232.08:10:11.88#ibcon#about to read 5, iclass 28, count 0 2006.232.08:10:11.88#ibcon#read 5, iclass 28, count 0 2006.232.08:10:11.88#ibcon#about to read 6, iclass 28, count 0 2006.232.08:10:11.88#ibcon#read 6, iclass 28, count 0 2006.232.08:10:11.88#ibcon#end of sib2, iclass 28, count 0 2006.232.08:10:11.88#ibcon#*after write, iclass 28, count 0 2006.232.08:10:11.88#ibcon#*before return 0, iclass 28, count 0 2006.232.08:10:11.88#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.232.08:10:11.88#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.232.08:10:11.88#ibcon#about to clear, iclass 28 cls_cnt 0 2006.232.08:10:11.88#ibcon#cleared, iclass 28 cls_cnt 0 2006.232.08:10:11.88$vc4f8/vblo=5,744.99 2006.232.08:10:11.88#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.232.08:10:11.88#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.232.08:10:11.88#ibcon#ireg 17 cls_cnt 0 2006.232.08:10:11.88#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.232.08:10:11.88#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.232.08:10:11.88#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.232.08:10:11.88#ibcon#enter wrdev, iclass 30, count 0 2006.232.08:10:11.88#ibcon#first serial, iclass 30, count 0 2006.232.08:10:11.88#ibcon#enter sib2, iclass 30, count 0 2006.232.08:10:11.88#ibcon#flushed, iclass 30, count 0 2006.232.08:10:11.88#ibcon#about to write, iclass 30, count 0 2006.232.08:10:11.88#ibcon#wrote, iclass 30, count 0 2006.232.08:10:11.88#ibcon#about to read 3, iclass 30, count 0 2006.232.08:10:11.90#ibcon#read 3, iclass 30, count 0 2006.232.08:10:11.90#ibcon#about to read 4, iclass 30, count 0 2006.232.08:10:11.90#ibcon#read 4, iclass 30, count 0 2006.232.08:10:11.90#ibcon#about to read 5, iclass 30, count 0 2006.232.08:10:11.90#ibcon#read 5, iclass 30, count 0 2006.232.08:10:11.90#ibcon#about to read 6, iclass 30, count 0 2006.232.08:10:11.90#ibcon#read 6, iclass 30, count 0 2006.232.08:10:11.90#ibcon#end of sib2, iclass 30, count 0 2006.232.08:10:11.90#ibcon#*mode == 0, iclass 30, count 0 2006.232.08:10:11.90#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.232.08:10:11.90#ibcon#[28=FRQ=05,744.99\r\n] 2006.232.08:10:11.90#ibcon#*before write, iclass 30, count 0 2006.232.08:10:11.90#ibcon#enter sib2, iclass 30, count 0 2006.232.08:10:11.90#ibcon#flushed, iclass 30, count 0 2006.232.08:10:11.90#ibcon#about to write, iclass 30, count 0 2006.232.08:10:11.90#ibcon#wrote, iclass 30, count 0 2006.232.08:10:11.90#ibcon#about to read 3, iclass 30, count 0 2006.232.08:10:11.95#ibcon#read 3, iclass 30, count 0 2006.232.08:10:11.95#ibcon#about to read 4, iclass 30, count 0 2006.232.08:10:11.95#ibcon#read 4, iclass 30, count 0 2006.232.08:10:11.95#ibcon#about to read 5, iclass 30, count 0 2006.232.08:10:11.95#ibcon#read 5, iclass 30, count 0 2006.232.08:10:11.95#ibcon#about to read 6, iclass 30, count 0 2006.232.08:10:11.95#ibcon#read 6, iclass 30, count 0 2006.232.08:10:11.95#ibcon#end of sib2, iclass 30, count 0 2006.232.08:10:11.95#ibcon#*after write, iclass 30, count 0 2006.232.08:10:11.95#ibcon#*before return 0, iclass 30, count 0 2006.232.08:10:11.95#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.232.08:10:11.95#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.232.08:10:11.95#ibcon#about to clear, iclass 30 cls_cnt 0 2006.232.08:10:11.95#ibcon#cleared, iclass 30 cls_cnt 0 2006.232.08:10:11.95$vc4f8/vb=5,3 2006.232.08:10:11.95#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.232.08:10:11.95#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.232.08:10:11.95#ibcon#ireg 11 cls_cnt 2 2006.232.08:10:11.95#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.232.08:10:12.00#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.232.08:10:12.00#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.232.08:10:12.00#ibcon#enter wrdev, iclass 32, count 2 2006.232.08:10:12.00#ibcon#first serial, iclass 32, count 2 2006.232.08:10:12.00#ibcon#enter sib2, iclass 32, count 2 2006.232.08:10:12.00#ibcon#flushed, iclass 32, count 2 2006.232.08:10:12.00#ibcon#about to write, iclass 32, count 2 2006.232.08:10:12.00#ibcon#wrote, iclass 32, count 2 2006.232.08:10:12.00#ibcon#about to read 3, iclass 32, count 2 2006.232.08:10:12.02#ibcon#read 3, iclass 32, count 2 2006.232.08:10:12.02#ibcon#about to read 4, iclass 32, count 2 2006.232.08:10:12.02#ibcon#read 4, iclass 32, count 2 2006.232.08:10:12.02#ibcon#about to read 5, iclass 32, count 2 2006.232.08:10:12.02#ibcon#read 5, iclass 32, count 2 2006.232.08:10:12.02#ibcon#about to read 6, iclass 32, count 2 2006.232.08:10:12.02#ibcon#read 6, iclass 32, count 2 2006.232.08:10:12.02#ibcon#end of sib2, iclass 32, count 2 2006.232.08:10:12.02#ibcon#*mode == 0, iclass 32, count 2 2006.232.08:10:12.02#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.232.08:10:12.02#ibcon#[27=AT05-03\r\n] 2006.232.08:10:12.02#ibcon#*before write, iclass 32, count 2 2006.232.08:10:12.02#ibcon#enter sib2, iclass 32, count 2 2006.232.08:10:12.02#ibcon#flushed, iclass 32, count 2 2006.232.08:10:12.02#ibcon#about to write, iclass 32, count 2 2006.232.08:10:12.02#ibcon#wrote, iclass 32, count 2 2006.232.08:10:12.02#ibcon#about to read 3, iclass 32, count 2 2006.232.08:10:12.05#ibcon#read 3, iclass 32, count 2 2006.232.08:10:12.05#ibcon#about to read 4, iclass 32, count 2 2006.232.08:10:12.05#ibcon#read 4, iclass 32, count 2 2006.232.08:10:12.05#ibcon#about to read 5, iclass 32, count 2 2006.232.08:10:12.05#ibcon#read 5, iclass 32, count 2 2006.232.08:10:12.05#ibcon#about to read 6, iclass 32, count 2 2006.232.08:10:12.05#ibcon#read 6, iclass 32, count 2 2006.232.08:10:12.05#ibcon#end of sib2, iclass 32, count 2 2006.232.08:10:12.05#ibcon#*after write, iclass 32, count 2 2006.232.08:10:12.05#ibcon#*before return 0, iclass 32, count 2 2006.232.08:10:12.05#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.232.08:10:12.05#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.232.08:10:12.05#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.232.08:10:12.05#ibcon#ireg 7 cls_cnt 0 2006.232.08:10:12.05#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.232.08:10:12.17#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.232.08:10:12.17#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.232.08:10:12.17#ibcon#enter wrdev, iclass 32, count 0 2006.232.08:10:12.17#ibcon#first serial, iclass 32, count 0 2006.232.08:10:12.17#ibcon#enter sib2, iclass 32, count 0 2006.232.08:10:12.17#ibcon#flushed, iclass 32, count 0 2006.232.08:10:12.17#ibcon#about to write, iclass 32, count 0 2006.232.08:10:12.17#ibcon#wrote, iclass 32, count 0 2006.232.08:10:12.17#ibcon#about to read 3, iclass 32, count 0 2006.232.08:10:12.19#ibcon#read 3, iclass 32, count 0 2006.232.08:10:12.19#ibcon#about to read 4, iclass 32, count 0 2006.232.08:10:12.19#ibcon#read 4, iclass 32, count 0 2006.232.08:10:12.19#ibcon#about to read 5, iclass 32, count 0 2006.232.08:10:12.19#ibcon#read 5, iclass 32, count 0 2006.232.08:10:12.19#ibcon#about to read 6, iclass 32, count 0 2006.232.08:10:12.19#ibcon#read 6, iclass 32, count 0 2006.232.08:10:12.19#ibcon#end of sib2, iclass 32, count 0 2006.232.08:10:12.19#ibcon#*mode == 0, iclass 32, count 0 2006.232.08:10:12.19#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.232.08:10:12.19#ibcon#[27=USB\r\n] 2006.232.08:10:12.19#ibcon#*before write, iclass 32, count 0 2006.232.08:10:12.19#ibcon#enter sib2, iclass 32, count 0 2006.232.08:10:12.19#ibcon#flushed, iclass 32, count 0 2006.232.08:10:12.19#ibcon#about to write, iclass 32, count 0 2006.232.08:10:12.19#ibcon#wrote, iclass 32, count 0 2006.232.08:10:12.19#ibcon#about to read 3, iclass 32, count 0 2006.232.08:10:12.22#ibcon#read 3, iclass 32, count 0 2006.232.08:10:12.22#ibcon#about to read 4, iclass 32, count 0 2006.232.08:10:12.22#ibcon#read 4, iclass 32, count 0 2006.232.08:10:12.22#ibcon#about to read 5, iclass 32, count 0 2006.232.08:10:12.22#ibcon#read 5, iclass 32, count 0 2006.232.08:10:12.22#ibcon#about to read 6, iclass 32, count 0 2006.232.08:10:12.22#ibcon#read 6, iclass 32, count 0 2006.232.08:10:12.22#ibcon#end of sib2, iclass 32, count 0 2006.232.08:10:12.22#ibcon#*after write, iclass 32, count 0 2006.232.08:10:12.22#ibcon#*before return 0, iclass 32, count 0 2006.232.08:10:12.22#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.232.08:10:12.22#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.232.08:10:12.22#ibcon#about to clear, iclass 32 cls_cnt 0 2006.232.08:10:12.22#ibcon#cleared, iclass 32 cls_cnt 0 2006.232.08:10:12.22$vc4f8/vblo=6,752.99 2006.232.08:10:12.22#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.232.08:10:12.22#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.232.08:10:12.22#ibcon#ireg 17 cls_cnt 0 2006.232.08:10:12.22#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.232.08:10:12.22#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.232.08:10:12.22#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.232.08:10:12.22#ibcon#enter wrdev, iclass 34, count 0 2006.232.08:10:12.22#ibcon#first serial, iclass 34, count 0 2006.232.08:10:12.22#ibcon#enter sib2, iclass 34, count 0 2006.232.08:10:12.22#ibcon#flushed, iclass 34, count 0 2006.232.08:10:12.22#ibcon#about to write, iclass 34, count 0 2006.232.08:10:12.22#ibcon#wrote, iclass 34, count 0 2006.232.08:10:12.22#ibcon#about to read 3, iclass 34, count 0 2006.232.08:10:12.24#ibcon#read 3, iclass 34, count 0 2006.232.08:10:12.24#ibcon#about to read 4, iclass 34, count 0 2006.232.08:10:12.24#ibcon#read 4, iclass 34, count 0 2006.232.08:10:12.24#ibcon#about to read 5, iclass 34, count 0 2006.232.08:10:12.24#ibcon#read 5, iclass 34, count 0 2006.232.08:10:12.24#ibcon#about to read 6, iclass 34, count 0 2006.232.08:10:12.24#ibcon#read 6, iclass 34, count 0 2006.232.08:10:12.24#ibcon#end of sib2, iclass 34, count 0 2006.232.08:10:12.24#ibcon#*mode == 0, iclass 34, count 0 2006.232.08:10:12.24#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.232.08:10:12.24#ibcon#[28=FRQ=06,752.99\r\n] 2006.232.08:10:12.24#ibcon#*before write, iclass 34, count 0 2006.232.08:10:12.24#ibcon#enter sib2, iclass 34, count 0 2006.232.08:10:12.24#ibcon#flushed, iclass 34, count 0 2006.232.08:10:12.24#ibcon#about to write, iclass 34, count 0 2006.232.08:10:12.24#ibcon#wrote, iclass 34, count 0 2006.232.08:10:12.24#ibcon#about to read 3, iclass 34, count 0 2006.232.08:10:12.28#ibcon#read 3, iclass 34, count 0 2006.232.08:10:12.28#ibcon#about to read 4, iclass 34, count 0 2006.232.08:10:12.28#ibcon#read 4, iclass 34, count 0 2006.232.08:10:12.28#ibcon#about to read 5, iclass 34, count 0 2006.232.08:10:12.28#ibcon#read 5, iclass 34, count 0 2006.232.08:10:12.28#ibcon#about to read 6, iclass 34, count 0 2006.232.08:10:12.28#ibcon#read 6, iclass 34, count 0 2006.232.08:10:12.28#ibcon#end of sib2, iclass 34, count 0 2006.232.08:10:12.28#ibcon#*after write, iclass 34, count 0 2006.232.08:10:12.28#ibcon#*before return 0, iclass 34, count 0 2006.232.08:10:12.28#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.232.08:10:12.28#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.232.08:10:12.28#ibcon#about to clear, iclass 34 cls_cnt 0 2006.232.08:10:12.28#ibcon#cleared, iclass 34 cls_cnt 0 2006.232.08:10:12.28$vc4f8/vb=6,4 2006.232.08:10:12.28#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.232.08:10:12.28#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.232.08:10:12.28#ibcon#ireg 11 cls_cnt 2 2006.232.08:10:12.28#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.232.08:10:12.34#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.232.08:10:12.34#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.232.08:10:12.34#ibcon#enter wrdev, iclass 36, count 2 2006.232.08:10:12.34#ibcon#first serial, iclass 36, count 2 2006.232.08:10:12.34#ibcon#enter sib2, iclass 36, count 2 2006.232.08:10:12.34#ibcon#flushed, iclass 36, count 2 2006.232.08:10:12.34#ibcon#about to write, iclass 36, count 2 2006.232.08:10:12.34#ibcon#wrote, iclass 36, count 2 2006.232.08:10:12.34#ibcon#about to read 3, iclass 36, count 2 2006.232.08:10:12.36#ibcon#read 3, iclass 36, count 2 2006.232.08:10:12.36#ibcon#about to read 4, iclass 36, count 2 2006.232.08:10:12.36#ibcon#read 4, iclass 36, count 2 2006.232.08:10:12.36#ibcon#about to read 5, iclass 36, count 2 2006.232.08:10:12.36#ibcon#read 5, iclass 36, count 2 2006.232.08:10:12.36#ibcon#about to read 6, iclass 36, count 2 2006.232.08:10:12.36#ibcon#read 6, iclass 36, count 2 2006.232.08:10:12.36#ibcon#end of sib2, iclass 36, count 2 2006.232.08:10:12.36#ibcon#*mode == 0, iclass 36, count 2 2006.232.08:10:12.36#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.232.08:10:12.36#ibcon#[27=AT06-04\r\n] 2006.232.08:10:12.36#ibcon#*before write, iclass 36, count 2 2006.232.08:10:12.36#ibcon#enter sib2, iclass 36, count 2 2006.232.08:10:12.36#ibcon#flushed, iclass 36, count 2 2006.232.08:10:12.36#ibcon#about to write, iclass 36, count 2 2006.232.08:10:12.36#ibcon#wrote, iclass 36, count 2 2006.232.08:10:12.36#ibcon#about to read 3, iclass 36, count 2 2006.232.08:10:12.39#ibcon#read 3, iclass 36, count 2 2006.232.08:10:12.39#ibcon#about to read 4, iclass 36, count 2 2006.232.08:10:12.39#ibcon#read 4, iclass 36, count 2 2006.232.08:10:12.39#ibcon#about to read 5, iclass 36, count 2 2006.232.08:10:12.39#ibcon#read 5, iclass 36, count 2 2006.232.08:10:12.39#ibcon#about to read 6, iclass 36, count 2 2006.232.08:10:12.39#ibcon#read 6, iclass 36, count 2 2006.232.08:10:12.39#ibcon#end of sib2, iclass 36, count 2 2006.232.08:10:12.39#ibcon#*after write, iclass 36, count 2 2006.232.08:10:12.39#ibcon#*before return 0, iclass 36, count 2 2006.232.08:10:12.39#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.232.08:10:12.39#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.232.08:10:12.39#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.232.08:10:12.39#ibcon#ireg 7 cls_cnt 0 2006.232.08:10:12.39#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.232.08:10:12.51#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.232.08:10:12.51#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.232.08:10:12.51#ibcon#enter wrdev, iclass 36, count 0 2006.232.08:10:12.51#ibcon#first serial, iclass 36, count 0 2006.232.08:10:12.51#ibcon#enter sib2, iclass 36, count 0 2006.232.08:10:12.51#ibcon#flushed, iclass 36, count 0 2006.232.08:10:12.51#ibcon#about to write, iclass 36, count 0 2006.232.08:10:12.51#ibcon#wrote, iclass 36, count 0 2006.232.08:10:12.51#ibcon#about to read 3, iclass 36, count 0 2006.232.08:10:12.53#ibcon#read 3, iclass 36, count 0 2006.232.08:10:12.53#ibcon#about to read 4, iclass 36, count 0 2006.232.08:10:12.53#ibcon#read 4, iclass 36, count 0 2006.232.08:10:12.53#ibcon#about to read 5, iclass 36, count 0 2006.232.08:10:12.53#ibcon#read 5, iclass 36, count 0 2006.232.08:10:12.53#ibcon#about to read 6, iclass 36, count 0 2006.232.08:10:12.53#ibcon#read 6, iclass 36, count 0 2006.232.08:10:12.53#ibcon#end of sib2, iclass 36, count 0 2006.232.08:10:12.53#ibcon#*mode == 0, iclass 36, count 0 2006.232.08:10:12.53#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.232.08:10:12.53#ibcon#[27=USB\r\n] 2006.232.08:10:12.53#ibcon#*before write, iclass 36, count 0 2006.232.08:10:12.53#ibcon#enter sib2, iclass 36, count 0 2006.232.08:10:12.53#ibcon#flushed, iclass 36, count 0 2006.232.08:10:12.53#ibcon#about to write, iclass 36, count 0 2006.232.08:10:12.53#ibcon#wrote, iclass 36, count 0 2006.232.08:10:12.53#ibcon#about to read 3, iclass 36, count 0 2006.232.08:10:12.56#ibcon#read 3, iclass 36, count 0 2006.232.08:10:12.56#ibcon#about to read 4, iclass 36, count 0 2006.232.08:10:12.56#ibcon#read 4, iclass 36, count 0 2006.232.08:10:12.56#ibcon#about to read 5, iclass 36, count 0 2006.232.08:10:12.56#ibcon#read 5, iclass 36, count 0 2006.232.08:10:12.56#ibcon#about to read 6, iclass 36, count 0 2006.232.08:10:12.56#ibcon#read 6, iclass 36, count 0 2006.232.08:10:12.56#ibcon#end of sib2, iclass 36, count 0 2006.232.08:10:12.56#ibcon#*after write, iclass 36, count 0 2006.232.08:10:12.56#ibcon#*before return 0, iclass 36, count 0 2006.232.08:10:12.56#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.232.08:10:12.56#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.232.08:10:12.56#ibcon#about to clear, iclass 36 cls_cnt 0 2006.232.08:10:12.56#ibcon#cleared, iclass 36 cls_cnt 0 2006.232.08:10:12.56$vc4f8/vabw=wide 2006.232.08:10:12.56#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.232.08:10:12.56#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.232.08:10:12.56#ibcon#ireg 8 cls_cnt 0 2006.232.08:10:12.56#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.232.08:10:12.56#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.232.08:10:12.56#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.232.08:10:12.56#ibcon#enter wrdev, iclass 38, count 0 2006.232.08:10:12.56#ibcon#first serial, iclass 38, count 0 2006.232.08:10:12.56#ibcon#enter sib2, iclass 38, count 0 2006.232.08:10:12.56#ibcon#flushed, iclass 38, count 0 2006.232.08:10:12.56#ibcon#about to write, iclass 38, count 0 2006.232.08:10:12.56#ibcon#wrote, iclass 38, count 0 2006.232.08:10:12.56#ibcon#about to read 3, iclass 38, count 0 2006.232.08:10:12.58#ibcon#read 3, iclass 38, count 0 2006.232.08:10:12.58#ibcon#about to read 4, iclass 38, count 0 2006.232.08:10:12.58#ibcon#read 4, iclass 38, count 0 2006.232.08:10:12.58#ibcon#about to read 5, iclass 38, count 0 2006.232.08:10:12.58#ibcon#read 5, iclass 38, count 0 2006.232.08:10:12.58#ibcon#about to read 6, iclass 38, count 0 2006.232.08:10:12.58#ibcon#read 6, iclass 38, count 0 2006.232.08:10:12.58#ibcon#end of sib2, iclass 38, count 0 2006.232.08:10:12.58#ibcon#*mode == 0, iclass 38, count 0 2006.232.08:10:12.58#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.232.08:10:12.58#ibcon#[25=BW32\r\n] 2006.232.08:10:12.58#ibcon#*before write, iclass 38, count 0 2006.232.08:10:12.58#ibcon#enter sib2, iclass 38, count 0 2006.232.08:10:12.58#ibcon#flushed, iclass 38, count 0 2006.232.08:10:12.58#ibcon#about to write, iclass 38, count 0 2006.232.08:10:12.58#ibcon#wrote, iclass 38, count 0 2006.232.08:10:12.58#ibcon#about to read 3, iclass 38, count 0 2006.232.08:10:12.61#ibcon#read 3, iclass 38, count 0 2006.232.08:10:12.61#ibcon#about to read 4, iclass 38, count 0 2006.232.08:10:12.61#ibcon#read 4, iclass 38, count 0 2006.232.08:10:12.61#ibcon#about to read 5, iclass 38, count 0 2006.232.08:10:12.61#ibcon#read 5, iclass 38, count 0 2006.232.08:10:12.61#ibcon#about to read 6, iclass 38, count 0 2006.232.08:10:12.61#ibcon#read 6, iclass 38, count 0 2006.232.08:10:12.61#ibcon#end of sib2, iclass 38, count 0 2006.232.08:10:12.61#ibcon#*after write, iclass 38, count 0 2006.232.08:10:12.61#ibcon#*before return 0, iclass 38, count 0 2006.232.08:10:12.61#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.232.08:10:12.61#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.232.08:10:12.61#ibcon#about to clear, iclass 38 cls_cnt 0 2006.232.08:10:12.61#ibcon#cleared, iclass 38 cls_cnt 0 2006.232.08:10:12.61$vc4f8/vbbw=wide 2006.232.08:10:12.61#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.232.08:10:12.61#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.232.08:10:12.61#ibcon#ireg 8 cls_cnt 0 2006.232.08:10:12.61#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.232.08:10:12.68#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.232.08:10:12.68#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.232.08:10:12.68#ibcon#enter wrdev, iclass 40, count 0 2006.232.08:10:12.68#ibcon#first serial, iclass 40, count 0 2006.232.08:10:12.68#ibcon#enter sib2, iclass 40, count 0 2006.232.08:10:12.68#ibcon#flushed, iclass 40, count 0 2006.232.08:10:12.68#ibcon#about to write, iclass 40, count 0 2006.232.08:10:12.68#ibcon#wrote, iclass 40, count 0 2006.232.08:10:12.68#ibcon#about to read 3, iclass 40, count 0 2006.232.08:10:12.70#ibcon#read 3, iclass 40, count 0 2006.232.08:10:12.70#ibcon#about to read 4, iclass 40, count 0 2006.232.08:10:12.70#ibcon#read 4, iclass 40, count 0 2006.232.08:10:12.70#ibcon#about to read 5, iclass 40, count 0 2006.232.08:10:12.70#ibcon#read 5, iclass 40, count 0 2006.232.08:10:12.70#ibcon#about to read 6, iclass 40, count 0 2006.232.08:10:12.70#ibcon#read 6, iclass 40, count 0 2006.232.08:10:12.70#ibcon#end of sib2, iclass 40, count 0 2006.232.08:10:12.70#ibcon#*mode == 0, iclass 40, count 0 2006.232.08:10:12.70#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.232.08:10:12.70#ibcon#[27=BW32\r\n] 2006.232.08:10:12.70#ibcon#*before write, iclass 40, count 0 2006.232.08:10:12.70#ibcon#enter sib2, iclass 40, count 0 2006.232.08:10:12.70#ibcon#flushed, iclass 40, count 0 2006.232.08:10:12.70#ibcon#about to write, iclass 40, count 0 2006.232.08:10:12.70#ibcon#wrote, iclass 40, count 0 2006.232.08:10:12.70#ibcon#about to read 3, iclass 40, count 0 2006.232.08:10:12.73#ibcon#read 3, iclass 40, count 0 2006.232.08:10:12.73#ibcon#about to read 4, iclass 40, count 0 2006.232.08:10:12.73#ibcon#read 4, iclass 40, count 0 2006.232.08:10:12.73#ibcon#about to read 5, iclass 40, count 0 2006.232.08:10:12.73#ibcon#read 5, iclass 40, count 0 2006.232.08:10:12.73#ibcon#about to read 6, iclass 40, count 0 2006.232.08:10:12.73#ibcon#read 6, iclass 40, count 0 2006.232.08:10:12.73#ibcon#end of sib2, iclass 40, count 0 2006.232.08:10:12.73#ibcon#*after write, iclass 40, count 0 2006.232.08:10:12.73#ibcon#*before return 0, iclass 40, count 0 2006.232.08:10:12.73#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.232.08:10:12.73#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.232.08:10:12.73#ibcon#about to clear, iclass 40 cls_cnt 0 2006.232.08:10:12.73#ibcon#cleared, iclass 40 cls_cnt 0 2006.232.08:10:12.73$4f8m12a/ifd4f 2006.232.08:10:12.73$ifd4f/lo= 2006.232.08:10:12.73$ifd4f/lo=lo1,7680.00,usb,rcp,1 2006.232.08:10:12.73$ifd4f/lo=lo2,1600.00,usb,rcp,1 2006.232.08:10:12.73$ifd4f/lo=lo3,8080.00,usb,rcp,1 2006.232.08:10:12.73$ifd4f/patch= 2006.232.08:10:12.73$ifd4f/patch=lo1,a1,a2,a3,a4 2006.232.08:10:12.73$ifd4f/patch=lo2,b1,b2,b3,b4,b5,b6 2006.232.08:10:12.73$ifd4f/patch=lo3,a5,a6,a7,a8 2006.232.08:10:12.73$4f8m12a/"form=m,16.000,1:2 2006.232.08:10:12.73$4f8m12a/"tpicd 2006.232.08:10:12.73$4f8m12a/echo=off 2006.232.08:10:12.73$4f8m12a/xlog=off 2006.232.08:10:12.73:!2006.232.08:10:40 2006.232.08:10:17.14#trakl#Source acquired 2006.232.08:10:19.14#flagr#flagr/antenna,acquired 2006.232.08:10:40.00:preob 2006.232.08:10:41.14/onsource/TRACKING 2006.232.08:10:41.14:!2006.232.08:10:50 2006.232.08:10:50.00:data_valid=on 2006.232.08:10:50.00:midob 2006.232.08:10:50.14/onsource/TRACKING 2006.232.08:10:50.14/wx/29.34,1007.4,88 2006.232.08:10:50.23/cable/+6.3869E-03 2006.232.08:10:51.32/va/01,08,usb,yes,31,32 2006.232.08:10:51.32/va/02,07,usb,yes,31,32 2006.232.08:10:51.32/va/03,08,usb,yes,23,23 2006.232.08:10:51.32/va/04,07,usb,yes,32,35 2006.232.08:10:51.32/va/05,07,usb,yes,36,38 2006.232.08:10:51.32/va/06,06,usb,yes,35,35 2006.232.08:10:51.32/va/07,06,usb,yes,36,36 2006.232.08:10:51.32/va/08,06,usb,yes,38,37 2006.232.08:10:51.55/valo/01,532.99,yes,locked 2006.232.08:10:51.55/valo/02,572.99,yes,locked 2006.232.08:10:51.55/valo/03,672.99,yes,locked 2006.232.08:10:51.55/valo/04,832.99,yes,locked 2006.232.08:10:51.55/valo/05,652.99,yes,locked 2006.232.08:10:51.55/valo/06,772.99,yes,locked 2006.232.08:10:51.55/valo/07,832.99,yes,locked 2006.232.08:10:51.55/valo/08,852.99,yes,locked 2006.232.08:10:52.64/vb/01,04,usb,yes,31,29 2006.232.08:10:52.64/vb/02,04,usb,yes,32,34 2006.232.08:10:52.64/vb/03,04,usb,yes,29,33 2006.232.08:10:52.64/vb/04,04,usb,yes,30,30 2006.232.08:10:52.64/vb/05,03,usb,yes,35,39 2006.232.08:10:52.64/vb/06,04,usb,yes,29,32 2006.232.08:10:52.64/vb/07,04,usb,yes,31,31 2006.232.08:10:52.64/vb/08,04,usb,yes,29,32 2006.232.08:10:52.87/vblo/01,632.99,yes,locked 2006.232.08:10:52.87/vblo/02,640.99,yes,locked 2006.232.08:10:52.87/vblo/03,656.99,yes,locked 2006.232.08:10:52.87/vblo/04,712.99,yes,locked 2006.232.08:10:52.87/vblo/05,744.99,yes,locked 2006.232.08:10:52.87/vblo/06,752.99,yes,locked 2006.232.08:10:52.87/vblo/07,734.99,yes,locked 2006.232.08:10:52.87/vblo/08,744.99,yes,locked 2006.232.08:10:53.02/vabw/8 2006.232.08:10:53.17/vbbw/8 2006.232.08:10:53.26/xfe/off,on,13.5 2006.232.08:10:53.63/ifatt/23,28,28,28 2006.232.08:10:54.08/fmout-gps/S +4.48E-07 2006.232.08:10:54.12:!2006.232.08:11:50 2006.232.08:11:50.00:data_valid=off 2006.232.08:11:50.00:postob 2006.232.08:11:50.15/cable/+6.3867E-03 2006.232.08:11:50.15/wx/29.33,1007.4,88 2006.232.08:11:51.08/fmout-gps/S +4.48E-07 2006.232.08:11:51.08:scan_name=232-0812,k06232,60 2006.232.08:11:51.08:source=3c418,203837.03,511912.7,2000.0,cw 2006.232.08:11:51.14#flagr#flagr/antenna,new-source 2006.232.08:11:52.14:checkk5 2006.232.08:11:52.50/chk_autoobs//k5ts1/ autoobs is running! 2006.232.08:11:52.92/chk_autoobs//k5ts2/ autoobs is running! 2006.232.08:11:53.30/chk_autoobs//k5ts3/ autoobs is running! 2006.232.08:11:53.68/chk_autoobs//k5ts4/ autoobs is running! 2006.232.08:11:54.04/chk_obsdata//k5ts1/T2320810??a.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.08:11:54.41/chk_obsdata//k5ts2/T2320810??b.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.08:11:54.81/chk_obsdata//k5ts3/T2320810??c.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.08:11:55.18/chk_obsdata//k5ts4/T2320810??d.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.08:11:55.89/k5log//k5ts1_log_newline 2006.232.08:11:56.59/k5log//k5ts2_log_newline 2006.232.08:11:57.28/k5log//k5ts3_log_newline 2006.232.08:11:57.96/k5log//k5ts4_log_newline 2006.232.08:11:57.99/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.232.08:11:57.99:4f8m12a=2 2006.232.08:11:57.99$4f8m12a/echo=on 2006.232.08:11:57.99$4f8m12a/pcalon 2006.232.08:11:57.99$pcalon/"no phase cal control is implemented here 2006.232.08:11:57.99$4f8m12a/"tpicd=stop 2006.232.08:11:57.99$4f8m12a/vc4f8 2006.232.08:11:57.99$vc4f8/valo=1,532.99 2006.232.08:11:57.99#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.232.08:11:57.99#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.232.08:11:57.99#ibcon#ireg 17 cls_cnt 0 2006.232.08:11:57.99#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.232.08:11:57.99#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.232.08:11:57.99#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.232.08:11:57.99#ibcon#enter wrdev, iclass 11, count 0 2006.232.08:11:57.99#ibcon#first serial, iclass 11, count 0 2006.232.08:11:57.99#ibcon#enter sib2, iclass 11, count 0 2006.232.08:11:57.99#ibcon#flushed, iclass 11, count 0 2006.232.08:11:57.99#ibcon#about to write, iclass 11, count 0 2006.232.08:11:57.99#ibcon#wrote, iclass 11, count 0 2006.232.08:11:57.99#ibcon#about to read 3, iclass 11, count 0 2006.232.08:11:58.03#ibcon#read 3, iclass 11, count 0 2006.232.08:11:58.03#ibcon#about to read 4, iclass 11, count 0 2006.232.08:11:58.03#ibcon#read 4, iclass 11, count 0 2006.232.08:11:58.03#ibcon#about to read 5, iclass 11, count 0 2006.232.08:11:58.03#ibcon#read 5, iclass 11, count 0 2006.232.08:11:58.03#ibcon#about to read 6, iclass 11, count 0 2006.232.08:11:58.03#ibcon#read 6, iclass 11, count 0 2006.232.08:11:58.03#ibcon#end of sib2, iclass 11, count 0 2006.232.08:11:58.03#ibcon#*mode == 0, iclass 11, count 0 2006.232.08:11:58.03#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.232.08:11:58.03#ibcon#[26=FRQ=01,532.99\r\n] 2006.232.08:11:58.03#ibcon#*before write, iclass 11, count 0 2006.232.08:11:58.03#ibcon#enter sib2, iclass 11, count 0 2006.232.08:11:58.03#ibcon#flushed, iclass 11, count 0 2006.232.08:11:58.03#ibcon#about to write, iclass 11, count 0 2006.232.08:11:58.03#ibcon#wrote, iclass 11, count 0 2006.232.08:11:58.03#ibcon#about to read 3, iclass 11, count 0 2006.232.08:11:58.09#ibcon#read 3, iclass 11, count 0 2006.232.08:11:58.09#ibcon#about to read 4, iclass 11, count 0 2006.232.08:11:58.09#ibcon#read 4, iclass 11, count 0 2006.232.08:11:58.09#ibcon#about to read 5, iclass 11, count 0 2006.232.08:11:58.09#ibcon#read 5, iclass 11, count 0 2006.232.08:11:58.09#ibcon#about to read 6, iclass 11, count 0 2006.232.08:11:58.09#ibcon#read 6, iclass 11, count 0 2006.232.08:11:58.09#ibcon#end of sib2, iclass 11, count 0 2006.232.08:11:58.09#ibcon#*after write, iclass 11, count 0 2006.232.08:11:58.09#ibcon#*before return 0, iclass 11, count 0 2006.232.08:11:58.09#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.232.08:11:58.09#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.232.08:11:58.09#ibcon#about to clear, iclass 11 cls_cnt 0 2006.232.08:11:58.09#ibcon#cleared, iclass 11 cls_cnt 0 2006.232.08:11:58.09$vc4f8/va=1,8 2006.232.08:11:58.09#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.232.08:11:58.09#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.232.08:11:58.09#ibcon#ireg 11 cls_cnt 2 2006.232.08:11:58.09#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.232.08:11:58.09#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.232.08:11:58.09#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.232.08:11:58.09#ibcon#enter wrdev, iclass 13, count 2 2006.232.08:11:58.09#ibcon#first serial, iclass 13, count 2 2006.232.08:11:58.09#ibcon#enter sib2, iclass 13, count 2 2006.232.08:11:58.09#ibcon#flushed, iclass 13, count 2 2006.232.08:11:58.09#ibcon#about to write, iclass 13, count 2 2006.232.08:11:58.09#ibcon#wrote, iclass 13, count 2 2006.232.08:11:58.09#ibcon#about to read 3, iclass 13, count 2 2006.232.08:11:58.11#ibcon#read 3, iclass 13, count 2 2006.232.08:11:58.11#ibcon#about to read 4, iclass 13, count 2 2006.232.08:11:58.11#ibcon#read 4, iclass 13, count 2 2006.232.08:11:58.11#ibcon#about to read 5, iclass 13, count 2 2006.232.08:11:58.11#ibcon#read 5, iclass 13, count 2 2006.232.08:11:58.11#ibcon#about to read 6, iclass 13, count 2 2006.232.08:11:58.11#ibcon#read 6, iclass 13, count 2 2006.232.08:11:58.11#ibcon#end of sib2, iclass 13, count 2 2006.232.08:11:58.11#ibcon#*mode == 0, iclass 13, count 2 2006.232.08:11:58.11#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.232.08:11:58.11#ibcon#[25=AT01-08\r\n] 2006.232.08:11:58.11#ibcon#*before write, iclass 13, count 2 2006.232.08:11:58.11#ibcon#enter sib2, iclass 13, count 2 2006.232.08:11:58.11#ibcon#flushed, iclass 13, count 2 2006.232.08:11:58.11#ibcon#about to write, iclass 13, count 2 2006.232.08:11:58.11#ibcon#wrote, iclass 13, count 2 2006.232.08:11:58.11#ibcon#about to read 3, iclass 13, count 2 2006.232.08:11:58.15#ibcon#read 3, iclass 13, count 2 2006.232.08:11:58.15#ibcon#about to read 4, iclass 13, count 2 2006.232.08:11:58.15#ibcon#read 4, iclass 13, count 2 2006.232.08:11:58.15#ibcon#about to read 5, iclass 13, count 2 2006.232.08:11:58.15#ibcon#read 5, iclass 13, count 2 2006.232.08:11:58.15#ibcon#about to read 6, iclass 13, count 2 2006.232.08:11:58.15#ibcon#read 6, iclass 13, count 2 2006.232.08:11:58.15#ibcon#end of sib2, iclass 13, count 2 2006.232.08:11:58.15#ibcon#*after write, iclass 13, count 2 2006.232.08:11:58.15#ibcon#*before return 0, iclass 13, count 2 2006.232.08:11:58.15#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.232.08:11:58.15#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.232.08:11:58.15#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.232.08:11:58.15#ibcon#ireg 7 cls_cnt 0 2006.232.08:11:58.15#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.232.08:11:58.24#abcon#<5=/05 3.2 5.7 29.33 881007.4\r\n> 2006.232.08:11:58.26#abcon#{5=INTERFACE CLEAR} 2006.232.08:11:58.27#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.232.08:11:58.27#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.232.08:11:58.27#ibcon#enter wrdev, iclass 13, count 0 2006.232.08:11:58.27#ibcon#first serial, iclass 13, count 0 2006.232.08:11:58.27#ibcon#enter sib2, iclass 13, count 0 2006.232.08:11:58.27#ibcon#flushed, iclass 13, count 0 2006.232.08:11:58.27#ibcon#about to write, iclass 13, count 0 2006.232.08:11:58.27#ibcon#wrote, iclass 13, count 0 2006.232.08:11:58.27#ibcon#about to read 3, iclass 13, count 0 2006.232.08:11:58.29#ibcon#read 3, iclass 13, count 0 2006.232.08:11:58.29#ibcon#about to read 4, iclass 13, count 0 2006.232.08:11:58.29#ibcon#read 4, iclass 13, count 0 2006.232.08:11:58.29#ibcon#about to read 5, iclass 13, count 0 2006.232.08:11:58.29#ibcon#read 5, iclass 13, count 0 2006.232.08:11:58.29#ibcon#about to read 6, iclass 13, count 0 2006.232.08:11:58.29#ibcon#read 6, iclass 13, count 0 2006.232.08:11:58.29#ibcon#end of sib2, iclass 13, count 0 2006.232.08:11:58.29#ibcon#*mode == 0, iclass 13, count 0 2006.232.08:11:58.29#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.232.08:11:58.29#ibcon#[25=USB\r\n] 2006.232.08:11:58.29#ibcon#*before write, iclass 13, count 0 2006.232.08:11:58.29#ibcon#enter sib2, iclass 13, count 0 2006.232.08:11:58.29#ibcon#flushed, iclass 13, count 0 2006.232.08:11:58.29#ibcon#about to write, iclass 13, count 0 2006.232.08:11:58.29#ibcon#wrote, iclass 13, count 0 2006.232.08:11:58.29#ibcon#about to read 3, iclass 13, count 0 2006.232.08:11:58.32#ibcon#read 3, iclass 13, count 0 2006.232.08:11:58.32#ibcon#about to read 4, iclass 13, count 0 2006.232.08:11:58.32#ibcon#read 4, iclass 13, count 0 2006.232.08:11:58.32#ibcon#about to read 5, iclass 13, count 0 2006.232.08:11:58.32#ibcon#read 5, iclass 13, count 0 2006.232.08:11:58.32#ibcon#about to read 6, iclass 13, count 0 2006.232.08:11:58.32#ibcon#read 6, iclass 13, count 0 2006.232.08:11:58.32#ibcon#end of sib2, iclass 13, count 0 2006.232.08:11:58.32#ibcon#*after write, iclass 13, count 0 2006.232.08:11:58.32#ibcon#*before return 0, iclass 13, count 0 2006.232.08:11:58.32#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.232.08:11:58.32#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.232.08:11:58.32#ibcon#about to clear, iclass 13 cls_cnt 0 2006.232.08:11:58.32#ibcon#cleared, iclass 13 cls_cnt 0 2006.232.08:11:58.32$vc4f8/valo=2,572.99 2006.232.08:11:58.32#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.232.08:11:58.32#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.232.08:11:58.32#ibcon#ireg 17 cls_cnt 0 2006.232.08:11:58.32#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.232.08:11:58.32#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.232.08:11:58.32#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.232.08:11:58.32#ibcon#enter wrdev, iclass 19, count 0 2006.232.08:11:58.32#ibcon#first serial, iclass 19, count 0 2006.232.08:11:58.32#ibcon#enter sib2, iclass 19, count 0 2006.232.08:11:58.32#ibcon#flushed, iclass 19, count 0 2006.232.08:11:58.32#ibcon#about to write, iclass 19, count 0 2006.232.08:11:58.32#ibcon#wrote, iclass 19, count 0 2006.232.08:11:58.32#ibcon#about to read 3, iclass 19, count 0 2006.232.08:11:58.33#abcon#[5=S1D000X0/0*\r\n] 2006.232.08:11:58.34#ibcon#read 3, iclass 19, count 0 2006.232.08:11:58.34#ibcon#about to read 4, iclass 19, count 0 2006.232.08:11:58.34#ibcon#read 4, iclass 19, count 0 2006.232.08:11:58.34#ibcon#about to read 5, iclass 19, count 0 2006.232.08:11:58.34#ibcon#read 5, iclass 19, count 0 2006.232.08:11:58.34#ibcon#about to read 6, iclass 19, count 0 2006.232.08:11:58.34#ibcon#read 6, iclass 19, count 0 2006.232.08:11:58.34#ibcon#end of sib2, iclass 19, count 0 2006.232.08:11:58.34#ibcon#*mode == 0, iclass 19, count 0 2006.232.08:11:58.34#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.232.08:11:58.34#ibcon#[26=FRQ=02,572.99\r\n] 2006.232.08:11:58.34#ibcon#*before write, iclass 19, count 0 2006.232.08:11:58.34#ibcon#enter sib2, iclass 19, count 0 2006.232.08:11:58.34#ibcon#flushed, iclass 19, count 0 2006.232.08:11:58.34#ibcon#about to write, iclass 19, count 0 2006.232.08:11:58.34#ibcon#wrote, iclass 19, count 0 2006.232.08:11:58.34#ibcon#about to read 3, iclass 19, count 0 2006.232.08:11:58.38#ibcon#read 3, iclass 19, count 0 2006.232.08:11:58.38#ibcon#about to read 4, iclass 19, count 0 2006.232.08:11:58.38#ibcon#read 4, iclass 19, count 0 2006.232.08:11:58.38#ibcon#about to read 5, iclass 19, count 0 2006.232.08:11:58.38#ibcon#read 5, iclass 19, count 0 2006.232.08:11:58.38#ibcon#about to read 6, iclass 19, count 0 2006.232.08:11:58.38#ibcon#read 6, iclass 19, count 0 2006.232.08:11:58.38#ibcon#end of sib2, iclass 19, count 0 2006.232.08:11:58.38#ibcon#*after write, iclass 19, count 0 2006.232.08:11:58.38#ibcon#*before return 0, iclass 19, count 0 2006.232.08:11:58.38#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.232.08:11:58.38#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.232.08:11:58.38#ibcon#about to clear, iclass 19 cls_cnt 0 2006.232.08:11:58.38#ibcon#cleared, iclass 19 cls_cnt 0 2006.232.08:11:58.38$vc4f8/va=2,7 2006.232.08:11:58.38#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.232.08:11:58.38#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.232.08:11:58.38#ibcon#ireg 11 cls_cnt 2 2006.232.08:11:58.38#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.232.08:11:58.44#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.232.08:11:58.44#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.232.08:11:58.44#ibcon#enter wrdev, iclass 21, count 2 2006.232.08:11:58.44#ibcon#first serial, iclass 21, count 2 2006.232.08:11:58.44#ibcon#enter sib2, iclass 21, count 2 2006.232.08:11:58.44#ibcon#flushed, iclass 21, count 2 2006.232.08:11:58.44#ibcon#about to write, iclass 21, count 2 2006.232.08:11:58.44#ibcon#wrote, iclass 21, count 2 2006.232.08:11:58.44#ibcon#about to read 3, iclass 21, count 2 2006.232.08:11:58.46#ibcon#read 3, iclass 21, count 2 2006.232.08:11:58.46#ibcon#about to read 4, iclass 21, count 2 2006.232.08:11:58.46#ibcon#read 4, iclass 21, count 2 2006.232.08:11:58.46#ibcon#about to read 5, iclass 21, count 2 2006.232.08:11:58.46#ibcon#read 5, iclass 21, count 2 2006.232.08:11:58.46#ibcon#about to read 6, iclass 21, count 2 2006.232.08:11:58.46#ibcon#read 6, iclass 21, count 2 2006.232.08:11:58.46#ibcon#end of sib2, iclass 21, count 2 2006.232.08:11:58.46#ibcon#*mode == 0, iclass 21, count 2 2006.232.08:11:58.46#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.232.08:11:58.46#ibcon#[25=AT02-07\r\n] 2006.232.08:11:58.46#ibcon#*before write, iclass 21, count 2 2006.232.08:11:58.46#ibcon#enter sib2, iclass 21, count 2 2006.232.08:11:58.46#ibcon#flushed, iclass 21, count 2 2006.232.08:11:58.46#ibcon#about to write, iclass 21, count 2 2006.232.08:11:58.46#ibcon#wrote, iclass 21, count 2 2006.232.08:11:58.46#ibcon#about to read 3, iclass 21, count 2 2006.232.08:11:58.49#ibcon#read 3, iclass 21, count 2 2006.232.08:11:58.49#ibcon#about to read 4, iclass 21, count 2 2006.232.08:11:58.49#ibcon#read 4, iclass 21, count 2 2006.232.08:11:58.49#ibcon#about to read 5, iclass 21, count 2 2006.232.08:11:58.49#ibcon#read 5, iclass 21, count 2 2006.232.08:11:58.49#ibcon#about to read 6, iclass 21, count 2 2006.232.08:11:58.49#ibcon#read 6, iclass 21, count 2 2006.232.08:11:58.49#ibcon#end of sib2, iclass 21, count 2 2006.232.08:11:58.49#ibcon#*after write, iclass 21, count 2 2006.232.08:11:58.49#ibcon#*before return 0, iclass 21, count 2 2006.232.08:11:58.49#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.232.08:11:58.49#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.232.08:11:58.49#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.232.08:11:58.49#ibcon#ireg 7 cls_cnt 0 2006.232.08:11:58.49#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.232.08:11:58.60#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.232.08:11:58.61#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.232.08:11:58.61#ibcon#enter wrdev, iclass 21, count 0 2006.232.08:11:58.61#ibcon#first serial, iclass 21, count 0 2006.232.08:11:58.61#ibcon#enter sib2, iclass 21, count 0 2006.232.08:11:58.61#ibcon#flushed, iclass 21, count 0 2006.232.08:11:58.61#ibcon#about to write, iclass 21, count 0 2006.232.08:11:58.61#ibcon#wrote, iclass 21, count 0 2006.232.08:11:58.61#ibcon#about to read 3, iclass 21, count 0 2006.232.08:11:58.63#ibcon#read 3, iclass 21, count 0 2006.232.08:11:58.63#ibcon#about to read 4, iclass 21, count 0 2006.232.08:11:58.63#ibcon#read 4, iclass 21, count 0 2006.232.08:11:58.63#ibcon#about to read 5, iclass 21, count 0 2006.232.08:11:58.63#ibcon#read 5, iclass 21, count 0 2006.232.08:11:58.63#ibcon#about to read 6, iclass 21, count 0 2006.232.08:11:58.63#ibcon#read 6, iclass 21, count 0 2006.232.08:11:58.63#ibcon#end of sib2, iclass 21, count 0 2006.232.08:11:58.63#ibcon#*mode == 0, iclass 21, count 0 2006.232.08:11:58.63#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.232.08:11:58.63#ibcon#[25=USB\r\n] 2006.232.08:11:58.63#ibcon#*before write, iclass 21, count 0 2006.232.08:11:58.63#ibcon#enter sib2, iclass 21, count 0 2006.232.08:11:58.63#ibcon#flushed, iclass 21, count 0 2006.232.08:11:58.63#ibcon#about to write, iclass 21, count 0 2006.232.08:11:58.63#ibcon#wrote, iclass 21, count 0 2006.232.08:11:58.63#ibcon#about to read 3, iclass 21, count 0 2006.232.08:11:58.66#ibcon#read 3, iclass 21, count 0 2006.232.08:11:58.66#ibcon#about to read 4, iclass 21, count 0 2006.232.08:11:58.66#ibcon#read 4, iclass 21, count 0 2006.232.08:11:58.66#ibcon#about to read 5, iclass 21, count 0 2006.232.08:11:58.66#ibcon#read 5, iclass 21, count 0 2006.232.08:11:58.66#ibcon#about to read 6, iclass 21, count 0 2006.232.08:11:58.66#ibcon#read 6, iclass 21, count 0 2006.232.08:11:58.66#ibcon#end of sib2, iclass 21, count 0 2006.232.08:11:58.66#ibcon#*after write, iclass 21, count 0 2006.232.08:11:58.66#ibcon#*before return 0, iclass 21, count 0 2006.232.08:11:58.66#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.232.08:11:58.66#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.232.08:11:58.66#ibcon#about to clear, iclass 21 cls_cnt 0 2006.232.08:11:58.66#ibcon#cleared, iclass 21 cls_cnt 0 2006.232.08:11:58.66$vc4f8/valo=3,672.99 2006.232.08:11:58.66#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.232.08:11:58.66#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.232.08:11:58.66#ibcon#ireg 17 cls_cnt 0 2006.232.08:11:58.66#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.232.08:11:58.66#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.232.08:11:58.66#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.232.08:11:58.66#ibcon#enter wrdev, iclass 23, count 0 2006.232.08:11:58.66#ibcon#first serial, iclass 23, count 0 2006.232.08:11:58.66#ibcon#enter sib2, iclass 23, count 0 2006.232.08:11:58.66#ibcon#flushed, iclass 23, count 0 2006.232.08:11:58.66#ibcon#about to write, iclass 23, count 0 2006.232.08:11:58.66#ibcon#wrote, iclass 23, count 0 2006.232.08:11:58.66#ibcon#about to read 3, iclass 23, count 0 2006.232.08:11:58.68#ibcon#read 3, iclass 23, count 0 2006.232.08:11:58.68#ibcon#about to read 4, iclass 23, count 0 2006.232.08:11:58.68#ibcon#read 4, iclass 23, count 0 2006.232.08:11:58.68#ibcon#about to read 5, iclass 23, count 0 2006.232.08:11:58.68#ibcon#read 5, iclass 23, count 0 2006.232.08:11:58.68#ibcon#about to read 6, iclass 23, count 0 2006.232.08:11:58.68#ibcon#read 6, iclass 23, count 0 2006.232.08:11:58.68#ibcon#end of sib2, iclass 23, count 0 2006.232.08:11:58.68#ibcon#*mode == 0, iclass 23, count 0 2006.232.08:11:58.68#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.232.08:11:58.68#ibcon#[26=FRQ=03,672.99\r\n] 2006.232.08:11:58.68#ibcon#*before write, iclass 23, count 0 2006.232.08:11:58.68#ibcon#enter sib2, iclass 23, count 0 2006.232.08:11:58.68#ibcon#flushed, iclass 23, count 0 2006.232.08:11:58.68#ibcon#about to write, iclass 23, count 0 2006.232.08:11:58.68#ibcon#wrote, iclass 23, count 0 2006.232.08:11:58.68#ibcon#about to read 3, iclass 23, count 0 2006.232.08:11:58.72#ibcon#read 3, iclass 23, count 0 2006.232.08:11:58.72#ibcon#about to read 4, iclass 23, count 0 2006.232.08:11:58.72#ibcon#read 4, iclass 23, count 0 2006.232.08:11:58.72#ibcon#about to read 5, iclass 23, count 0 2006.232.08:11:58.72#ibcon#read 5, iclass 23, count 0 2006.232.08:11:58.72#ibcon#about to read 6, iclass 23, count 0 2006.232.08:11:58.72#ibcon#read 6, iclass 23, count 0 2006.232.08:11:58.72#ibcon#end of sib2, iclass 23, count 0 2006.232.08:11:58.72#ibcon#*after write, iclass 23, count 0 2006.232.08:11:58.72#ibcon#*before return 0, iclass 23, count 0 2006.232.08:11:58.72#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.232.08:11:58.72#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.232.08:11:58.72#ibcon#about to clear, iclass 23 cls_cnt 0 2006.232.08:11:58.72#ibcon#cleared, iclass 23 cls_cnt 0 2006.232.08:11:58.72$vc4f8/va=3,8 2006.232.08:11:58.72#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.232.08:11:58.72#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.232.08:11:58.72#ibcon#ireg 11 cls_cnt 2 2006.232.08:11:58.72#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.232.08:11:58.78#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.232.08:11:58.78#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.232.08:11:58.78#ibcon#enter wrdev, iclass 25, count 2 2006.232.08:11:58.78#ibcon#first serial, iclass 25, count 2 2006.232.08:11:58.78#ibcon#enter sib2, iclass 25, count 2 2006.232.08:11:58.78#ibcon#flushed, iclass 25, count 2 2006.232.08:11:58.78#ibcon#about to write, iclass 25, count 2 2006.232.08:11:58.78#ibcon#wrote, iclass 25, count 2 2006.232.08:11:58.78#ibcon#about to read 3, iclass 25, count 2 2006.232.08:11:58.80#ibcon#read 3, iclass 25, count 2 2006.232.08:11:58.80#ibcon#about to read 4, iclass 25, count 2 2006.232.08:11:58.80#ibcon#read 4, iclass 25, count 2 2006.232.08:11:58.80#ibcon#about to read 5, iclass 25, count 2 2006.232.08:11:58.80#ibcon#read 5, iclass 25, count 2 2006.232.08:11:58.80#ibcon#about to read 6, iclass 25, count 2 2006.232.08:11:58.80#ibcon#read 6, iclass 25, count 2 2006.232.08:11:58.80#ibcon#end of sib2, iclass 25, count 2 2006.232.08:11:58.80#ibcon#*mode == 0, iclass 25, count 2 2006.232.08:11:58.80#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.232.08:11:58.80#ibcon#[25=AT03-08\r\n] 2006.232.08:11:58.80#ibcon#*before write, iclass 25, count 2 2006.232.08:11:58.80#ibcon#enter sib2, iclass 25, count 2 2006.232.08:11:58.80#ibcon#flushed, iclass 25, count 2 2006.232.08:11:58.80#ibcon#about to write, iclass 25, count 2 2006.232.08:11:58.80#ibcon#wrote, iclass 25, count 2 2006.232.08:11:58.80#ibcon#about to read 3, iclass 25, count 2 2006.232.08:11:58.83#ibcon#read 3, iclass 25, count 2 2006.232.08:11:58.83#ibcon#about to read 4, iclass 25, count 2 2006.232.08:11:58.83#ibcon#read 4, iclass 25, count 2 2006.232.08:11:58.83#ibcon#about to read 5, iclass 25, count 2 2006.232.08:11:58.83#ibcon#read 5, iclass 25, count 2 2006.232.08:11:58.83#ibcon#about to read 6, iclass 25, count 2 2006.232.08:11:58.83#ibcon#read 6, iclass 25, count 2 2006.232.08:11:58.83#ibcon#end of sib2, iclass 25, count 2 2006.232.08:11:58.83#ibcon#*after write, iclass 25, count 2 2006.232.08:11:58.83#ibcon#*before return 0, iclass 25, count 2 2006.232.08:11:58.83#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.232.08:11:58.83#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.232.08:11:58.83#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.232.08:11:58.83#ibcon#ireg 7 cls_cnt 0 2006.232.08:11:58.83#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.232.08:11:58.94#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.232.08:11:58.95#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.232.08:11:58.95#ibcon#enter wrdev, iclass 25, count 0 2006.232.08:11:58.95#ibcon#first serial, iclass 25, count 0 2006.232.08:11:58.95#ibcon#enter sib2, iclass 25, count 0 2006.232.08:11:58.95#ibcon#flushed, iclass 25, count 0 2006.232.08:11:58.95#ibcon#about to write, iclass 25, count 0 2006.232.08:11:58.95#ibcon#wrote, iclass 25, count 0 2006.232.08:11:58.95#ibcon#about to read 3, iclass 25, count 0 2006.232.08:11:58.97#ibcon#read 3, iclass 25, count 0 2006.232.08:11:58.97#ibcon#about to read 4, iclass 25, count 0 2006.232.08:11:58.97#ibcon#read 4, iclass 25, count 0 2006.232.08:11:58.97#ibcon#about to read 5, iclass 25, count 0 2006.232.08:11:58.97#ibcon#read 5, iclass 25, count 0 2006.232.08:11:58.97#ibcon#about to read 6, iclass 25, count 0 2006.232.08:11:58.97#ibcon#read 6, iclass 25, count 0 2006.232.08:11:58.97#ibcon#end of sib2, iclass 25, count 0 2006.232.08:11:58.97#ibcon#*mode == 0, iclass 25, count 0 2006.232.08:11:58.97#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.232.08:11:58.97#ibcon#[25=USB\r\n] 2006.232.08:11:58.97#ibcon#*before write, iclass 25, count 0 2006.232.08:11:58.97#ibcon#enter sib2, iclass 25, count 0 2006.232.08:11:58.97#ibcon#flushed, iclass 25, count 0 2006.232.08:11:58.97#ibcon#about to write, iclass 25, count 0 2006.232.08:11:58.97#ibcon#wrote, iclass 25, count 0 2006.232.08:11:58.97#ibcon#about to read 3, iclass 25, count 0 2006.232.08:11:59.00#ibcon#read 3, iclass 25, count 0 2006.232.08:11:59.00#ibcon#about to read 4, iclass 25, count 0 2006.232.08:11:59.00#ibcon#read 4, iclass 25, count 0 2006.232.08:11:59.00#ibcon#about to read 5, iclass 25, count 0 2006.232.08:11:59.00#ibcon#read 5, iclass 25, count 0 2006.232.08:11:59.00#ibcon#about to read 6, iclass 25, count 0 2006.232.08:11:59.00#ibcon#read 6, iclass 25, count 0 2006.232.08:11:59.00#ibcon#end of sib2, iclass 25, count 0 2006.232.08:11:59.00#ibcon#*after write, iclass 25, count 0 2006.232.08:11:59.00#ibcon#*before return 0, iclass 25, count 0 2006.232.08:11:59.00#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.232.08:11:59.00#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.232.08:11:59.00#ibcon#about to clear, iclass 25 cls_cnt 0 2006.232.08:11:59.00#ibcon#cleared, iclass 25 cls_cnt 0 2006.232.08:11:59.00$vc4f8/valo=4,832.99 2006.232.08:11:59.00#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.232.08:11:59.00#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.232.08:11:59.00#ibcon#ireg 17 cls_cnt 0 2006.232.08:11:59.00#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.232.08:11:59.00#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.232.08:11:59.00#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.232.08:11:59.00#ibcon#enter wrdev, iclass 27, count 0 2006.232.08:11:59.00#ibcon#first serial, iclass 27, count 0 2006.232.08:11:59.00#ibcon#enter sib2, iclass 27, count 0 2006.232.08:11:59.00#ibcon#flushed, iclass 27, count 0 2006.232.08:11:59.00#ibcon#about to write, iclass 27, count 0 2006.232.08:11:59.00#ibcon#wrote, iclass 27, count 0 2006.232.08:11:59.00#ibcon#about to read 3, iclass 27, count 0 2006.232.08:11:59.02#ibcon#read 3, iclass 27, count 0 2006.232.08:11:59.02#ibcon#about to read 4, iclass 27, count 0 2006.232.08:11:59.02#ibcon#read 4, iclass 27, count 0 2006.232.08:11:59.02#ibcon#about to read 5, iclass 27, count 0 2006.232.08:11:59.02#ibcon#read 5, iclass 27, count 0 2006.232.08:11:59.02#ibcon#about to read 6, iclass 27, count 0 2006.232.08:11:59.02#ibcon#read 6, iclass 27, count 0 2006.232.08:11:59.02#ibcon#end of sib2, iclass 27, count 0 2006.232.08:11:59.02#ibcon#*mode == 0, iclass 27, count 0 2006.232.08:11:59.02#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.232.08:11:59.02#ibcon#[26=FRQ=04,832.99\r\n] 2006.232.08:11:59.02#ibcon#*before write, iclass 27, count 0 2006.232.08:11:59.02#ibcon#enter sib2, iclass 27, count 0 2006.232.08:11:59.02#ibcon#flushed, iclass 27, count 0 2006.232.08:11:59.02#ibcon#about to write, iclass 27, count 0 2006.232.08:11:59.02#ibcon#wrote, iclass 27, count 0 2006.232.08:11:59.02#ibcon#about to read 3, iclass 27, count 0 2006.232.08:11:59.06#ibcon#read 3, iclass 27, count 0 2006.232.08:11:59.06#ibcon#about to read 4, iclass 27, count 0 2006.232.08:11:59.06#ibcon#read 4, iclass 27, count 0 2006.232.08:11:59.06#ibcon#about to read 5, iclass 27, count 0 2006.232.08:11:59.06#ibcon#read 5, iclass 27, count 0 2006.232.08:11:59.06#ibcon#about to read 6, iclass 27, count 0 2006.232.08:11:59.06#ibcon#read 6, iclass 27, count 0 2006.232.08:11:59.06#ibcon#end of sib2, iclass 27, count 0 2006.232.08:11:59.06#ibcon#*after write, iclass 27, count 0 2006.232.08:11:59.06#ibcon#*before return 0, iclass 27, count 0 2006.232.08:11:59.06#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.232.08:11:59.06#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.232.08:11:59.06#ibcon#about to clear, iclass 27 cls_cnt 0 2006.232.08:11:59.06#ibcon#cleared, iclass 27 cls_cnt 0 2006.232.08:11:59.06$vc4f8/va=4,7 2006.232.08:11:59.06#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.232.08:11:59.06#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.232.08:11:59.06#ibcon#ireg 11 cls_cnt 2 2006.232.08:11:59.06#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.232.08:11:59.12#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.232.08:11:59.12#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.232.08:11:59.12#ibcon#enter wrdev, iclass 29, count 2 2006.232.08:11:59.12#ibcon#first serial, iclass 29, count 2 2006.232.08:11:59.12#ibcon#enter sib2, iclass 29, count 2 2006.232.08:11:59.12#ibcon#flushed, iclass 29, count 2 2006.232.08:11:59.12#ibcon#about to write, iclass 29, count 2 2006.232.08:11:59.12#ibcon#wrote, iclass 29, count 2 2006.232.08:11:59.12#ibcon#about to read 3, iclass 29, count 2 2006.232.08:11:59.14#ibcon#read 3, iclass 29, count 2 2006.232.08:11:59.14#ibcon#about to read 4, iclass 29, count 2 2006.232.08:11:59.14#ibcon#read 4, iclass 29, count 2 2006.232.08:11:59.14#ibcon#about to read 5, iclass 29, count 2 2006.232.08:11:59.14#ibcon#read 5, iclass 29, count 2 2006.232.08:11:59.14#ibcon#about to read 6, iclass 29, count 2 2006.232.08:11:59.14#ibcon#read 6, iclass 29, count 2 2006.232.08:11:59.14#ibcon#end of sib2, iclass 29, count 2 2006.232.08:11:59.14#ibcon#*mode == 0, iclass 29, count 2 2006.232.08:11:59.14#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.232.08:11:59.14#ibcon#[25=AT04-07\r\n] 2006.232.08:11:59.14#ibcon#*before write, iclass 29, count 2 2006.232.08:11:59.14#ibcon#enter sib2, iclass 29, count 2 2006.232.08:11:59.14#ibcon#flushed, iclass 29, count 2 2006.232.08:11:59.14#ibcon#about to write, iclass 29, count 2 2006.232.08:11:59.14#ibcon#wrote, iclass 29, count 2 2006.232.08:11:59.14#ibcon#about to read 3, iclass 29, count 2 2006.232.08:11:59.17#ibcon#read 3, iclass 29, count 2 2006.232.08:11:59.17#ibcon#about to read 4, iclass 29, count 2 2006.232.08:11:59.17#ibcon#read 4, iclass 29, count 2 2006.232.08:11:59.17#ibcon#about to read 5, iclass 29, count 2 2006.232.08:11:59.17#ibcon#read 5, iclass 29, count 2 2006.232.08:11:59.17#ibcon#about to read 6, iclass 29, count 2 2006.232.08:11:59.17#ibcon#read 6, iclass 29, count 2 2006.232.08:11:59.17#ibcon#end of sib2, iclass 29, count 2 2006.232.08:11:59.17#ibcon#*after write, iclass 29, count 2 2006.232.08:11:59.17#ibcon#*before return 0, iclass 29, count 2 2006.232.08:11:59.17#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.232.08:11:59.17#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.232.08:11:59.17#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.232.08:11:59.17#ibcon#ireg 7 cls_cnt 0 2006.232.08:11:59.17#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.232.08:11:59.29#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.232.08:11:59.29#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.232.08:11:59.29#ibcon#enter wrdev, iclass 29, count 0 2006.232.08:11:59.29#ibcon#first serial, iclass 29, count 0 2006.232.08:11:59.29#ibcon#enter sib2, iclass 29, count 0 2006.232.08:11:59.29#ibcon#flushed, iclass 29, count 0 2006.232.08:11:59.29#ibcon#about to write, iclass 29, count 0 2006.232.08:11:59.29#ibcon#wrote, iclass 29, count 0 2006.232.08:11:59.29#ibcon#about to read 3, iclass 29, count 0 2006.232.08:11:59.31#ibcon#read 3, iclass 29, count 0 2006.232.08:11:59.31#ibcon#about to read 4, iclass 29, count 0 2006.232.08:11:59.31#ibcon#read 4, iclass 29, count 0 2006.232.08:11:59.31#ibcon#about to read 5, iclass 29, count 0 2006.232.08:11:59.31#ibcon#read 5, iclass 29, count 0 2006.232.08:11:59.31#ibcon#about to read 6, iclass 29, count 0 2006.232.08:11:59.31#ibcon#read 6, iclass 29, count 0 2006.232.08:11:59.31#ibcon#end of sib2, iclass 29, count 0 2006.232.08:11:59.31#ibcon#*mode == 0, iclass 29, count 0 2006.232.08:11:59.31#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.232.08:11:59.31#ibcon#[25=USB\r\n] 2006.232.08:11:59.31#ibcon#*before write, iclass 29, count 0 2006.232.08:11:59.31#ibcon#enter sib2, iclass 29, count 0 2006.232.08:11:59.31#ibcon#flushed, iclass 29, count 0 2006.232.08:11:59.31#ibcon#about to write, iclass 29, count 0 2006.232.08:11:59.31#ibcon#wrote, iclass 29, count 0 2006.232.08:11:59.31#ibcon#about to read 3, iclass 29, count 0 2006.232.08:11:59.34#ibcon#read 3, iclass 29, count 0 2006.232.08:11:59.34#ibcon#about to read 4, iclass 29, count 0 2006.232.08:11:59.34#ibcon#read 4, iclass 29, count 0 2006.232.08:11:59.34#ibcon#about to read 5, iclass 29, count 0 2006.232.08:11:59.34#ibcon#read 5, iclass 29, count 0 2006.232.08:11:59.34#ibcon#about to read 6, iclass 29, count 0 2006.232.08:11:59.34#ibcon#read 6, iclass 29, count 0 2006.232.08:11:59.34#ibcon#end of sib2, iclass 29, count 0 2006.232.08:11:59.34#ibcon#*after write, iclass 29, count 0 2006.232.08:11:59.34#ibcon#*before return 0, iclass 29, count 0 2006.232.08:11:59.34#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.232.08:11:59.34#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.232.08:11:59.34#ibcon#about to clear, iclass 29 cls_cnt 0 2006.232.08:11:59.34#ibcon#cleared, iclass 29 cls_cnt 0 2006.232.08:11:59.34$vc4f8/valo=5,652.99 2006.232.08:11:59.34#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.232.08:11:59.34#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.232.08:11:59.34#ibcon#ireg 17 cls_cnt 0 2006.232.08:11:59.34#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.232.08:11:59.34#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.232.08:11:59.34#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.232.08:11:59.34#ibcon#enter wrdev, iclass 31, count 0 2006.232.08:11:59.34#ibcon#first serial, iclass 31, count 0 2006.232.08:11:59.34#ibcon#enter sib2, iclass 31, count 0 2006.232.08:11:59.34#ibcon#flushed, iclass 31, count 0 2006.232.08:11:59.34#ibcon#about to write, iclass 31, count 0 2006.232.08:11:59.34#ibcon#wrote, iclass 31, count 0 2006.232.08:11:59.34#ibcon#about to read 3, iclass 31, count 0 2006.232.08:11:59.36#ibcon#read 3, iclass 31, count 0 2006.232.08:11:59.36#ibcon#about to read 4, iclass 31, count 0 2006.232.08:11:59.36#ibcon#read 4, iclass 31, count 0 2006.232.08:11:59.36#ibcon#about to read 5, iclass 31, count 0 2006.232.08:11:59.36#ibcon#read 5, iclass 31, count 0 2006.232.08:11:59.36#ibcon#about to read 6, iclass 31, count 0 2006.232.08:11:59.36#ibcon#read 6, iclass 31, count 0 2006.232.08:11:59.36#ibcon#end of sib2, iclass 31, count 0 2006.232.08:11:59.36#ibcon#*mode == 0, iclass 31, count 0 2006.232.08:11:59.36#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.232.08:11:59.36#ibcon#[26=FRQ=05,652.99\r\n] 2006.232.08:11:59.36#ibcon#*before write, iclass 31, count 0 2006.232.08:11:59.36#ibcon#enter sib2, iclass 31, count 0 2006.232.08:11:59.36#ibcon#flushed, iclass 31, count 0 2006.232.08:11:59.36#ibcon#about to write, iclass 31, count 0 2006.232.08:11:59.36#ibcon#wrote, iclass 31, count 0 2006.232.08:11:59.36#ibcon#about to read 3, iclass 31, count 0 2006.232.08:11:59.40#ibcon#read 3, iclass 31, count 0 2006.232.08:11:59.40#ibcon#about to read 4, iclass 31, count 0 2006.232.08:11:59.40#ibcon#read 4, iclass 31, count 0 2006.232.08:11:59.40#ibcon#about to read 5, iclass 31, count 0 2006.232.08:11:59.40#ibcon#read 5, iclass 31, count 0 2006.232.08:11:59.40#ibcon#about to read 6, iclass 31, count 0 2006.232.08:11:59.40#ibcon#read 6, iclass 31, count 0 2006.232.08:11:59.40#ibcon#end of sib2, iclass 31, count 0 2006.232.08:11:59.40#ibcon#*after write, iclass 31, count 0 2006.232.08:11:59.40#ibcon#*before return 0, iclass 31, count 0 2006.232.08:11:59.40#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.232.08:11:59.40#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.232.08:11:59.40#ibcon#about to clear, iclass 31 cls_cnt 0 2006.232.08:11:59.40#ibcon#cleared, iclass 31 cls_cnt 0 2006.232.08:11:59.40$vc4f8/va=5,7 2006.232.08:11:59.40#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.232.08:11:59.40#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.232.08:11:59.40#ibcon#ireg 11 cls_cnt 2 2006.232.08:11:59.40#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.232.08:11:59.45#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.232.08:11:59.46#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.232.08:11:59.46#ibcon#enter wrdev, iclass 33, count 2 2006.232.08:11:59.46#ibcon#first serial, iclass 33, count 2 2006.232.08:11:59.46#ibcon#enter sib2, iclass 33, count 2 2006.232.08:11:59.46#ibcon#flushed, iclass 33, count 2 2006.232.08:11:59.46#ibcon#about to write, iclass 33, count 2 2006.232.08:11:59.46#ibcon#wrote, iclass 33, count 2 2006.232.08:11:59.46#ibcon#about to read 3, iclass 33, count 2 2006.232.08:11:59.48#ibcon#read 3, iclass 33, count 2 2006.232.08:11:59.48#ibcon#about to read 4, iclass 33, count 2 2006.232.08:11:59.48#ibcon#read 4, iclass 33, count 2 2006.232.08:11:59.48#ibcon#about to read 5, iclass 33, count 2 2006.232.08:11:59.48#ibcon#read 5, iclass 33, count 2 2006.232.08:11:59.48#ibcon#about to read 6, iclass 33, count 2 2006.232.08:11:59.48#ibcon#read 6, iclass 33, count 2 2006.232.08:11:59.48#ibcon#end of sib2, iclass 33, count 2 2006.232.08:11:59.48#ibcon#*mode == 0, iclass 33, count 2 2006.232.08:11:59.48#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.232.08:11:59.48#ibcon#[25=AT05-07\r\n] 2006.232.08:11:59.48#ibcon#*before write, iclass 33, count 2 2006.232.08:11:59.48#ibcon#enter sib2, iclass 33, count 2 2006.232.08:11:59.48#ibcon#flushed, iclass 33, count 2 2006.232.08:11:59.48#ibcon#about to write, iclass 33, count 2 2006.232.08:11:59.48#ibcon#wrote, iclass 33, count 2 2006.232.08:11:59.48#ibcon#about to read 3, iclass 33, count 2 2006.232.08:11:59.51#ibcon#read 3, iclass 33, count 2 2006.232.08:11:59.51#ibcon#about to read 4, iclass 33, count 2 2006.232.08:11:59.51#ibcon#read 4, iclass 33, count 2 2006.232.08:11:59.51#ibcon#about to read 5, iclass 33, count 2 2006.232.08:11:59.51#ibcon#read 5, iclass 33, count 2 2006.232.08:11:59.51#ibcon#about to read 6, iclass 33, count 2 2006.232.08:11:59.51#ibcon#read 6, iclass 33, count 2 2006.232.08:11:59.51#ibcon#end of sib2, iclass 33, count 2 2006.232.08:11:59.51#ibcon#*after write, iclass 33, count 2 2006.232.08:11:59.51#ibcon#*before return 0, iclass 33, count 2 2006.232.08:11:59.51#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.232.08:11:59.51#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.232.08:11:59.51#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.232.08:11:59.51#ibcon#ireg 7 cls_cnt 0 2006.232.08:11:59.51#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.232.08:11:59.63#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.232.08:11:59.63#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.232.08:11:59.63#ibcon#enter wrdev, iclass 33, count 0 2006.232.08:11:59.63#ibcon#first serial, iclass 33, count 0 2006.232.08:11:59.63#ibcon#enter sib2, iclass 33, count 0 2006.232.08:11:59.63#ibcon#flushed, iclass 33, count 0 2006.232.08:11:59.63#ibcon#about to write, iclass 33, count 0 2006.232.08:11:59.63#ibcon#wrote, iclass 33, count 0 2006.232.08:11:59.63#ibcon#about to read 3, iclass 33, count 0 2006.232.08:11:59.65#ibcon#read 3, iclass 33, count 0 2006.232.08:11:59.65#ibcon#about to read 4, iclass 33, count 0 2006.232.08:11:59.65#ibcon#read 4, iclass 33, count 0 2006.232.08:11:59.65#ibcon#about to read 5, iclass 33, count 0 2006.232.08:11:59.65#ibcon#read 5, iclass 33, count 0 2006.232.08:11:59.65#ibcon#about to read 6, iclass 33, count 0 2006.232.08:11:59.65#ibcon#read 6, iclass 33, count 0 2006.232.08:11:59.65#ibcon#end of sib2, iclass 33, count 0 2006.232.08:11:59.65#ibcon#*mode == 0, iclass 33, count 0 2006.232.08:11:59.65#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.232.08:11:59.65#ibcon#[25=USB\r\n] 2006.232.08:11:59.65#ibcon#*before write, iclass 33, count 0 2006.232.08:11:59.65#ibcon#enter sib2, iclass 33, count 0 2006.232.08:11:59.65#ibcon#flushed, iclass 33, count 0 2006.232.08:11:59.65#ibcon#about to write, iclass 33, count 0 2006.232.08:11:59.65#ibcon#wrote, iclass 33, count 0 2006.232.08:11:59.65#ibcon#about to read 3, iclass 33, count 0 2006.232.08:11:59.68#ibcon#read 3, iclass 33, count 0 2006.232.08:11:59.68#ibcon#about to read 4, iclass 33, count 0 2006.232.08:11:59.68#ibcon#read 4, iclass 33, count 0 2006.232.08:11:59.68#ibcon#about to read 5, iclass 33, count 0 2006.232.08:11:59.68#ibcon#read 5, iclass 33, count 0 2006.232.08:11:59.68#ibcon#about to read 6, iclass 33, count 0 2006.232.08:11:59.68#ibcon#read 6, iclass 33, count 0 2006.232.08:11:59.68#ibcon#end of sib2, iclass 33, count 0 2006.232.08:11:59.68#ibcon#*after write, iclass 33, count 0 2006.232.08:11:59.68#ibcon#*before return 0, iclass 33, count 0 2006.232.08:11:59.68#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.232.08:11:59.68#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.232.08:11:59.68#ibcon#about to clear, iclass 33 cls_cnt 0 2006.232.08:11:59.68#ibcon#cleared, iclass 33 cls_cnt 0 2006.232.08:11:59.68$vc4f8/valo=6,772.99 2006.232.08:11:59.68#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.232.08:11:59.68#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.232.08:11:59.68#ibcon#ireg 17 cls_cnt 0 2006.232.08:11:59.68#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.232.08:11:59.68#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.232.08:11:59.68#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.232.08:11:59.68#ibcon#enter wrdev, iclass 35, count 0 2006.232.08:11:59.68#ibcon#first serial, iclass 35, count 0 2006.232.08:11:59.68#ibcon#enter sib2, iclass 35, count 0 2006.232.08:11:59.68#ibcon#flushed, iclass 35, count 0 2006.232.08:11:59.68#ibcon#about to write, iclass 35, count 0 2006.232.08:11:59.68#ibcon#wrote, iclass 35, count 0 2006.232.08:11:59.68#ibcon#about to read 3, iclass 35, count 0 2006.232.08:11:59.70#ibcon#read 3, iclass 35, count 0 2006.232.08:11:59.70#ibcon#about to read 4, iclass 35, count 0 2006.232.08:11:59.70#ibcon#read 4, iclass 35, count 0 2006.232.08:11:59.70#ibcon#about to read 5, iclass 35, count 0 2006.232.08:11:59.70#ibcon#read 5, iclass 35, count 0 2006.232.08:11:59.70#ibcon#about to read 6, iclass 35, count 0 2006.232.08:11:59.70#ibcon#read 6, iclass 35, count 0 2006.232.08:11:59.70#ibcon#end of sib2, iclass 35, count 0 2006.232.08:11:59.70#ibcon#*mode == 0, iclass 35, count 0 2006.232.08:11:59.70#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.232.08:11:59.70#ibcon#[26=FRQ=06,772.99\r\n] 2006.232.08:11:59.70#ibcon#*before write, iclass 35, count 0 2006.232.08:11:59.70#ibcon#enter sib2, iclass 35, count 0 2006.232.08:11:59.70#ibcon#flushed, iclass 35, count 0 2006.232.08:11:59.70#ibcon#about to write, iclass 35, count 0 2006.232.08:11:59.70#ibcon#wrote, iclass 35, count 0 2006.232.08:11:59.70#ibcon#about to read 3, iclass 35, count 0 2006.232.08:11:59.74#ibcon#read 3, iclass 35, count 0 2006.232.08:11:59.74#ibcon#about to read 4, iclass 35, count 0 2006.232.08:11:59.74#ibcon#read 4, iclass 35, count 0 2006.232.08:11:59.74#ibcon#about to read 5, iclass 35, count 0 2006.232.08:11:59.74#ibcon#read 5, iclass 35, count 0 2006.232.08:11:59.74#ibcon#about to read 6, iclass 35, count 0 2006.232.08:11:59.74#ibcon#read 6, iclass 35, count 0 2006.232.08:11:59.74#ibcon#end of sib2, iclass 35, count 0 2006.232.08:11:59.74#ibcon#*after write, iclass 35, count 0 2006.232.08:11:59.74#ibcon#*before return 0, iclass 35, count 0 2006.232.08:11:59.74#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.232.08:11:59.74#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.232.08:11:59.74#ibcon#about to clear, iclass 35 cls_cnt 0 2006.232.08:11:59.74#ibcon#cleared, iclass 35 cls_cnt 0 2006.232.08:11:59.74$vc4f8/va=6,6 2006.232.08:11:59.74#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.232.08:11:59.74#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.232.08:11:59.74#ibcon#ireg 11 cls_cnt 2 2006.232.08:11:59.74#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.232.08:11:59.80#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.232.08:11:59.80#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.232.08:11:59.80#ibcon#enter wrdev, iclass 37, count 2 2006.232.08:11:59.80#ibcon#first serial, iclass 37, count 2 2006.232.08:11:59.80#ibcon#enter sib2, iclass 37, count 2 2006.232.08:11:59.80#ibcon#flushed, iclass 37, count 2 2006.232.08:11:59.80#ibcon#about to write, iclass 37, count 2 2006.232.08:11:59.80#ibcon#wrote, iclass 37, count 2 2006.232.08:11:59.80#ibcon#about to read 3, iclass 37, count 2 2006.232.08:11:59.82#ibcon#read 3, iclass 37, count 2 2006.232.08:11:59.82#ibcon#about to read 4, iclass 37, count 2 2006.232.08:11:59.82#ibcon#read 4, iclass 37, count 2 2006.232.08:11:59.82#ibcon#about to read 5, iclass 37, count 2 2006.232.08:11:59.82#ibcon#read 5, iclass 37, count 2 2006.232.08:11:59.82#ibcon#about to read 6, iclass 37, count 2 2006.232.08:11:59.82#ibcon#read 6, iclass 37, count 2 2006.232.08:11:59.82#ibcon#end of sib2, iclass 37, count 2 2006.232.08:11:59.82#ibcon#*mode == 0, iclass 37, count 2 2006.232.08:11:59.82#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.232.08:11:59.82#ibcon#[25=AT06-06\r\n] 2006.232.08:11:59.82#ibcon#*before write, iclass 37, count 2 2006.232.08:11:59.82#ibcon#enter sib2, iclass 37, count 2 2006.232.08:11:59.82#ibcon#flushed, iclass 37, count 2 2006.232.08:11:59.82#ibcon#about to write, iclass 37, count 2 2006.232.08:11:59.82#ibcon#wrote, iclass 37, count 2 2006.232.08:11:59.82#ibcon#about to read 3, iclass 37, count 2 2006.232.08:11:59.85#ibcon#read 3, iclass 37, count 2 2006.232.08:11:59.85#ibcon#about to read 4, iclass 37, count 2 2006.232.08:11:59.85#ibcon#read 4, iclass 37, count 2 2006.232.08:11:59.85#ibcon#about to read 5, iclass 37, count 2 2006.232.08:11:59.85#ibcon#read 5, iclass 37, count 2 2006.232.08:11:59.85#ibcon#about to read 6, iclass 37, count 2 2006.232.08:11:59.85#ibcon#read 6, iclass 37, count 2 2006.232.08:11:59.85#ibcon#end of sib2, iclass 37, count 2 2006.232.08:11:59.85#ibcon#*after write, iclass 37, count 2 2006.232.08:11:59.85#ibcon#*before return 0, iclass 37, count 2 2006.232.08:11:59.85#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.232.08:11:59.85#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.232.08:11:59.85#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.232.08:11:59.85#ibcon#ireg 7 cls_cnt 0 2006.232.08:11:59.85#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.232.08:11:59.97#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.232.08:11:59.97#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.232.08:11:59.97#ibcon#enter wrdev, iclass 37, count 0 2006.232.08:11:59.97#ibcon#first serial, iclass 37, count 0 2006.232.08:11:59.97#ibcon#enter sib2, iclass 37, count 0 2006.232.08:11:59.97#ibcon#flushed, iclass 37, count 0 2006.232.08:11:59.97#ibcon#about to write, iclass 37, count 0 2006.232.08:11:59.97#ibcon#wrote, iclass 37, count 0 2006.232.08:11:59.97#ibcon#about to read 3, iclass 37, count 0 2006.232.08:11:59.99#ibcon#read 3, iclass 37, count 0 2006.232.08:11:59.99#ibcon#about to read 4, iclass 37, count 0 2006.232.08:11:59.99#ibcon#read 4, iclass 37, count 0 2006.232.08:11:59.99#ibcon#about to read 5, iclass 37, count 0 2006.232.08:11:59.99#ibcon#read 5, iclass 37, count 0 2006.232.08:11:59.99#ibcon#about to read 6, iclass 37, count 0 2006.232.08:11:59.99#ibcon#read 6, iclass 37, count 0 2006.232.08:11:59.99#ibcon#end of sib2, iclass 37, count 0 2006.232.08:11:59.99#ibcon#*mode == 0, iclass 37, count 0 2006.232.08:11:59.99#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.232.08:11:59.99#ibcon#[25=USB\r\n] 2006.232.08:11:59.99#ibcon#*before write, iclass 37, count 0 2006.232.08:11:59.99#ibcon#enter sib2, iclass 37, count 0 2006.232.08:11:59.99#ibcon#flushed, iclass 37, count 0 2006.232.08:11:59.99#ibcon#about to write, iclass 37, count 0 2006.232.08:11:59.99#ibcon#wrote, iclass 37, count 0 2006.232.08:11:59.99#ibcon#about to read 3, iclass 37, count 0 2006.232.08:12:00.01#ibcon#read 3, iclass 37, count 0 2006.232.08:12:00.02#ibcon#about to read 4, iclass 37, count 0 2006.232.08:12:00.02#ibcon#read 4, iclass 37, count 0 2006.232.08:12:00.02#ibcon#about to read 5, iclass 37, count 0 2006.232.08:12:00.02#ibcon#read 5, iclass 37, count 0 2006.232.08:12:00.02#ibcon#about to read 6, iclass 37, count 0 2006.232.08:12:00.02#ibcon#read 6, iclass 37, count 0 2006.232.08:12:00.02#ibcon#end of sib2, iclass 37, count 0 2006.232.08:12:00.02#ibcon#*after write, iclass 37, count 0 2006.232.08:12:00.02#ibcon#*before return 0, iclass 37, count 0 2006.232.08:12:00.02#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.232.08:12:00.02#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.232.08:12:00.02#ibcon#about to clear, iclass 37 cls_cnt 0 2006.232.08:12:00.02#ibcon#cleared, iclass 37 cls_cnt 0 2006.232.08:12:00.02$vc4f8/valo=7,832.99 2006.232.08:12:00.02#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.232.08:12:00.02#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.232.08:12:00.02#ibcon#ireg 17 cls_cnt 0 2006.232.08:12:00.02#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.232.08:12:00.02#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.232.08:12:00.02#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.232.08:12:00.02#ibcon#enter wrdev, iclass 39, count 0 2006.232.08:12:00.02#ibcon#first serial, iclass 39, count 0 2006.232.08:12:00.02#ibcon#enter sib2, iclass 39, count 0 2006.232.08:12:00.02#ibcon#flushed, iclass 39, count 0 2006.232.08:12:00.02#ibcon#about to write, iclass 39, count 0 2006.232.08:12:00.02#ibcon#wrote, iclass 39, count 0 2006.232.08:12:00.02#ibcon#about to read 3, iclass 39, count 0 2006.232.08:12:00.04#ibcon#read 3, iclass 39, count 0 2006.232.08:12:00.04#ibcon#about to read 4, iclass 39, count 0 2006.232.08:12:00.04#ibcon#read 4, iclass 39, count 0 2006.232.08:12:00.04#ibcon#about to read 5, iclass 39, count 0 2006.232.08:12:00.04#ibcon#read 5, iclass 39, count 0 2006.232.08:12:00.04#ibcon#about to read 6, iclass 39, count 0 2006.232.08:12:00.04#ibcon#read 6, iclass 39, count 0 2006.232.08:12:00.04#ibcon#end of sib2, iclass 39, count 0 2006.232.08:12:00.04#ibcon#*mode == 0, iclass 39, count 0 2006.232.08:12:00.04#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.232.08:12:00.04#ibcon#[26=FRQ=07,832.99\r\n] 2006.232.08:12:00.04#ibcon#*before write, iclass 39, count 0 2006.232.08:12:00.04#ibcon#enter sib2, iclass 39, count 0 2006.232.08:12:00.04#ibcon#flushed, iclass 39, count 0 2006.232.08:12:00.04#ibcon#about to write, iclass 39, count 0 2006.232.08:12:00.04#ibcon#wrote, iclass 39, count 0 2006.232.08:12:00.04#ibcon#about to read 3, iclass 39, count 0 2006.232.08:12:00.08#ibcon#read 3, iclass 39, count 0 2006.232.08:12:00.08#ibcon#about to read 4, iclass 39, count 0 2006.232.08:12:00.08#ibcon#read 4, iclass 39, count 0 2006.232.08:12:00.08#ibcon#about to read 5, iclass 39, count 0 2006.232.08:12:00.08#ibcon#read 5, iclass 39, count 0 2006.232.08:12:00.08#ibcon#about to read 6, iclass 39, count 0 2006.232.08:12:00.08#ibcon#read 6, iclass 39, count 0 2006.232.08:12:00.08#ibcon#end of sib2, iclass 39, count 0 2006.232.08:12:00.08#ibcon#*after write, iclass 39, count 0 2006.232.08:12:00.08#ibcon#*before return 0, iclass 39, count 0 2006.232.08:12:00.08#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.232.08:12:00.08#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.232.08:12:00.08#ibcon#about to clear, iclass 39 cls_cnt 0 2006.232.08:12:00.08#ibcon#cleared, iclass 39 cls_cnt 0 2006.232.08:12:00.08$vc4f8/va=7,6 2006.232.08:12:00.08#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.232.08:12:00.08#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.232.08:12:00.08#ibcon#ireg 11 cls_cnt 2 2006.232.08:12:00.08#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.232.08:12:00.14#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.232.08:12:00.14#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.232.08:12:00.14#ibcon#enter wrdev, iclass 3, count 2 2006.232.08:12:00.14#ibcon#first serial, iclass 3, count 2 2006.232.08:12:00.14#ibcon#enter sib2, iclass 3, count 2 2006.232.08:12:00.14#ibcon#flushed, iclass 3, count 2 2006.232.08:12:00.14#ibcon#about to write, iclass 3, count 2 2006.232.08:12:00.14#ibcon#wrote, iclass 3, count 2 2006.232.08:12:00.14#ibcon#about to read 3, iclass 3, count 2 2006.232.08:12:00.16#ibcon#read 3, iclass 3, count 2 2006.232.08:12:00.16#ibcon#about to read 4, iclass 3, count 2 2006.232.08:12:00.16#ibcon#read 4, iclass 3, count 2 2006.232.08:12:00.16#ibcon#about to read 5, iclass 3, count 2 2006.232.08:12:00.16#ibcon#read 5, iclass 3, count 2 2006.232.08:12:00.16#ibcon#about to read 6, iclass 3, count 2 2006.232.08:12:00.16#ibcon#read 6, iclass 3, count 2 2006.232.08:12:00.16#ibcon#end of sib2, iclass 3, count 2 2006.232.08:12:00.16#ibcon#*mode == 0, iclass 3, count 2 2006.232.08:12:00.16#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.232.08:12:00.16#ibcon#[25=AT07-06\r\n] 2006.232.08:12:00.16#ibcon#*before write, iclass 3, count 2 2006.232.08:12:00.16#ibcon#enter sib2, iclass 3, count 2 2006.232.08:12:00.16#ibcon#flushed, iclass 3, count 2 2006.232.08:12:00.16#ibcon#about to write, iclass 3, count 2 2006.232.08:12:00.16#ibcon#wrote, iclass 3, count 2 2006.232.08:12:00.16#ibcon#about to read 3, iclass 3, count 2 2006.232.08:12:00.19#ibcon#read 3, iclass 3, count 2 2006.232.08:12:00.19#ibcon#about to read 4, iclass 3, count 2 2006.232.08:12:00.19#ibcon#read 4, iclass 3, count 2 2006.232.08:12:00.19#ibcon#about to read 5, iclass 3, count 2 2006.232.08:12:00.19#ibcon#read 5, iclass 3, count 2 2006.232.08:12:00.19#ibcon#about to read 6, iclass 3, count 2 2006.232.08:12:00.19#ibcon#read 6, iclass 3, count 2 2006.232.08:12:00.19#ibcon#end of sib2, iclass 3, count 2 2006.232.08:12:00.19#ibcon#*after write, iclass 3, count 2 2006.232.08:12:00.19#ibcon#*before return 0, iclass 3, count 2 2006.232.08:12:00.19#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.232.08:12:00.19#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.232.08:12:00.19#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.232.08:12:00.19#ibcon#ireg 7 cls_cnt 0 2006.232.08:12:00.19#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.232.08:12:00.30#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.232.08:12:00.31#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.232.08:12:00.31#ibcon#enter wrdev, iclass 3, count 0 2006.232.08:12:00.31#ibcon#first serial, iclass 3, count 0 2006.232.08:12:00.31#ibcon#enter sib2, iclass 3, count 0 2006.232.08:12:00.31#ibcon#flushed, iclass 3, count 0 2006.232.08:12:00.31#ibcon#about to write, iclass 3, count 0 2006.232.08:12:00.31#ibcon#wrote, iclass 3, count 0 2006.232.08:12:00.31#ibcon#about to read 3, iclass 3, count 0 2006.232.08:12:00.33#ibcon#read 3, iclass 3, count 0 2006.232.08:12:00.33#ibcon#about to read 4, iclass 3, count 0 2006.232.08:12:00.33#ibcon#read 4, iclass 3, count 0 2006.232.08:12:00.33#ibcon#about to read 5, iclass 3, count 0 2006.232.08:12:00.33#ibcon#read 5, iclass 3, count 0 2006.232.08:12:00.33#ibcon#about to read 6, iclass 3, count 0 2006.232.08:12:00.33#ibcon#read 6, iclass 3, count 0 2006.232.08:12:00.33#ibcon#end of sib2, iclass 3, count 0 2006.232.08:12:00.33#ibcon#*mode == 0, iclass 3, count 0 2006.232.08:12:00.33#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.232.08:12:00.33#ibcon#[25=USB\r\n] 2006.232.08:12:00.33#ibcon#*before write, iclass 3, count 0 2006.232.08:12:00.33#ibcon#enter sib2, iclass 3, count 0 2006.232.08:12:00.33#ibcon#flushed, iclass 3, count 0 2006.232.08:12:00.33#ibcon#about to write, iclass 3, count 0 2006.232.08:12:00.33#ibcon#wrote, iclass 3, count 0 2006.232.08:12:00.33#ibcon#about to read 3, iclass 3, count 0 2006.232.08:12:00.36#ibcon#read 3, iclass 3, count 0 2006.232.08:12:00.36#ibcon#about to read 4, iclass 3, count 0 2006.232.08:12:00.36#ibcon#read 4, iclass 3, count 0 2006.232.08:12:00.36#ibcon#about to read 5, iclass 3, count 0 2006.232.08:12:00.36#ibcon#read 5, iclass 3, count 0 2006.232.08:12:00.36#ibcon#about to read 6, iclass 3, count 0 2006.232.08:12:00.36#ibcon#read 6, iclass 3, count 0 2006.232.08:12:00.36#ibcon#end of sib2, iclass 3, count 0 2006.232.08:12:00.36#ibcon#*after write, iclass 3, count 0 2006.232.08:12:00.36#ibcon#*before return 0, iclass 3, count 0 2006.232.08:12:00.36#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.232.08:12:00.36#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.232.08:12:00.36#ibcon#about to clear, iclass 3 cls_cnt 0 2006.232.08:12:00.36#ibcon#cleared, iclass 3 cls_cnt 0 2006.232.08:12:00.36$vc4f8/valo=8,852.99 2006.232.08:12:00.36#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.232.08:12:00.36#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.232.08:12:00.36#ibcon#ireg 17 cls_cnt 0 2006.232.08:12:00.36#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.232.08:12:00.36#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.232.08:12:00.36#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.232.08:12:00.36#ibcon#enter wrdev, iclass 5, count 0 2006.232.08:12:00.36#ibcon#first serial, iclass 5, count 0 2006.232.08:12:00.36#ibcon#enter sib2, iclass 5, count 0 2006.232.08:12:00.36#ibcon#flushed, iclass 5, count 0 2006.232.08:12:00.36#ibcon#about to write, iclass 5, count 0 2006.232.08:12:00.36#ibcon#wrote, iclass 5, count 0 2006.232.08:12:00.36#ibcon#about to read 3, iclass 5, count 0 2006.232.08:12:00.38#ibcon#read 3, iclass 5, count 0 2006.232.08:12:00.38#ibcon#about to read 4, iclass 5, count 0 2006.232.08:12:00.38#ibcon#read 4, iclass 5, count 0 2006.232.08:12:00.38#ibcon#about to read 5, iclass 5, count 0 2006.232.08:12:00.38#ibcon#read 5, iclass 5, count 0 2006.232.08:12:00.38#ibcon#about to read 6, iclass 5, count 0 2006.232.08:12:00.38#ibcon#read 6, iclass 5, count 0 2006.232.08:12:00.38#ibcon#end of sib2, iclass 5, count 0 2006.232.08:12:00.38#ibcon#*mode == 0, iclass 5, count 0 2006.232.08:12:00.38#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.232.08:12:00.38#ibcon#[26=FRQ=08,852.99\r\n] 2006.232.08:12:00.38#ibcon#*before write, iclass 5, count 0 2006.232.08:12:00.38#ibcon#enter sib2, iclass 5, count 0 2006.232.08:12:00.38#ibcon#flushed, iclass 5, count 0 2006.232.08:12:00.38#ibcon#about to write, iclass 5, count 0 2006.232.08:12:00.38#ibcon#wrote, iclass 5, count 0 2006.232.08:12:00.38#ibcon#about to read 3, iclass 5, count 0 2006.232.08:12:00.42#ibcon#read 3, iclass 5, count 0 2006.232.08:12:00.42#ibcon#about to read 4, iclass 5, count 0 2006.232.08:12:00.42#ibcon#read 4, iclass 5, count 0 2006.232.08:12:00.42#ibcon#about to read 5, iclass 5, count 0 2006.232.08:12:00.42#ibcon#read 5, iclass 5, count 0 2006.232.08:12:00.42#ibcon#about to read 6, iclass 5, count 0 2006.232.08:12:00.42#ibcon#read 6, iclass 5, count 0 2006.232.08:12:00.42#ibcon#end of sib2, iclass 5, count 0 2006.232.08:12:00.42#ibcon#*after write, iclass 5, count 0 2006.232.08:12:00.42#ibcon#*before return 0, iclass 5, count 0 2006.232.08:12:00.42#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.232.08:12:00.42#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.232.08:12:00.42#ibcon#about to clear, iclass 5 cls_cnt 0 2006.232.08:12:00.42#ibcon#cleared, iclass 5 cls_cnt 0 2006.232.08:12:00.42$vc4f8/va=8,6 2006.232.08:12:00.42#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.232.08:12:00.42#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.232.08:12:00.42#ibcon#ireg 11 cls_cnt 2 2006.232.08:12:00.42#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.232.08:12:00.47#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.232.08:12:00.48#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.232.08:12:00.48#ibcon#enter wrdev, iclass 7, count 2 2006.232.08:12:00.48#ibcon#first serial, iclass 7, count 2 2006.232.08:12:00.48#ibcon#enter sib2, iclass 7, count 2 2006.232.08:12:00.48#ibcon#flushed, iclass 7, count 2 2006.232.08:12:00.48#ibcon#about to write, iclass 7, count 2 2006.232.08:12:00.48#ibcon#wrote, iclass 7, count 2 2006.232.08:12:00.48#ibcon#about to read 3, iclass 7, count 2 2006.232.08:12:00.50#ibcon#read 3, iclass 7, count 2 2006.232.08:12:00.50#ibcon#about to read 4, iclass 7, count 2 2006.232.08:12:00.50#ibcon#read 4, iclass 7, count 2 2006.232.08:12:00.50#ibcon#about to read 5, iclass 7, count 2 2006.232.08:12:00.50#ibcon#read 5, iclass 7, count 2 2006.232.08:12:00.50#ibcon#about to read 6, iclass 7, count 2 2006.232.08:12:00.50#ibcon#read 6, iclass 7, count 2 2006.232.08:12:00.50#ibcon#end of sib2, iclass 7, count 2 2006.232.08:12:00.50#ibcon#*mode == 0, iclass 7, count 2 2006.232.08:12:00.50#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.232.08:12:00.50#ibcon#[25=AT08-06\r\n] 2006.232.08:12:00.50#ibcon#*before write, iclass 7, count 2 2006.232.08:12:00.50#ibcon#enter sib2, iclass 7, count 2 2006.232.08:12:00.50#ibcon#flushed, iclass 7, count 2 2006.232.08:12:00.50#ibcon#about to write, iclass 7, count 2 2006.232.08:12:00.50#ibcon#wrote, iclass 7, count 2 2006.232.08:12:00.50#ibcon#about to read 3, iclass 7, count 2 2006.232.08:12:00.53#ibcon#read 3, iclass 7, count 2 2006.232.08:12:00.53#ibcon#about to read 4, iclass 7, count 2 2006.232.08:12:00.53#ibcon#read 4, iclass 7, count 2 2006.232.08:12:00.53#ibcon#about to read 5, iclass 7, count 2 2006.232.08:12:00.53#ibcon#read 5, iclass 7, count 2 2006.232.08:12:00.53#ibcon#about to read 6, iclass 7, count 2 2006.232.08:12:00.53#ibcon#read 6, iclass 7, count 2 2006.232.08:12:00.53#ibcon#end of sib2, iclass 7, count 2 2006.232.08:12:00.53#ibcon#*after write, iclass 7, count 2 2006.232.08:12:00.53#ibcon#*before return 0, iclass 7, count 2 2006.232.08:12:00.53#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.232.08:12:00.53#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.232.08:12:00.53#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.232.08:12:00.53#ibcon#ireg 7 cls_cnt 0 2006.232.08:12:00.53#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.232.08:12:00.64#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.232.08:12:00.65#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.232.08:12:00.65#ibcon#enter wrdev, iclass 7, count 0 2006.232.08:12:00.65#ibcon#first serial, iclass 7, count 0 2006.232.08:12:00.65#ibcon#enter sib2, iclass 7, count 0 2006.232.08:12:00.65#ibcon#flushed, iclass 7, count 0 2006.232.08:12:00.65#ibcon#about to write, iclass 7, count 0 2006.232.08:12:00.65#ibcon#wrote, iclass 7, count 0 2006.232.08:12:00.65#ibcon#about to read 3, iclass 7, count 0 2006.232.08:12:00.66#ibcon#read 3, iclass 7, count 0 2006.232.08:12:00.67#ibcon#about to read 4, iclass 7, count 0 2006.232.08:12:00.67#ibcon#read 4, iclass 7, count 0 2006.232.08:12:00.67#ibcon#about to read 5, iclass 7, count 0 2006.232.08:12:00.67#ibcon#read 5, iclass 7, count 0 2006.232.08:12:00.67#ibcon#about to read 6, iclass 7, count 0 2006.232.08:12:00.67#ibcon#read 6, iclass 7, count 0 2006.232.08:12:00.67#ibcon#end of sib2, iclass 7, count 0 2006.232.08:12:00.67#ibcon#*mode == 0, iclass 7, count 0 2006.232.08:12:00.67#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.232.08:12:00.67#ibcon#[25=USB\r\n] 2006.232.08:12:00.67#ibcon#*before write, iclass 7, count 0 2006.232.08:12:00.67#ibcon#enter sib2, iclass 7, count 0 2006.232.08:12:00.67#ibcon#flushed, iclass 7, count 0 2006.232.08:12:00.67#ibcon#about to write, iclass 7, count 0 2006.232.08:12:00.67#ibcon#wrote, iclass 7, count 0 2006.232.08:12:00.67#ibcon#about to read 3, iclass 7, count 0 2006.232.08:12:00.70#ibcon#read 3, iclass 7, count 0 2006.232.08:12:00.70#ibcon#about to read 4, iclass 7, count 0 2006.232.08:12:00.70#ibcon#read 4, iclass 7, count 0 2006.232.08:12:00.70#ibcon#about to read 5, iclass 7, count 0 2006.232.08:12:00.70#ibcon#read 5, iclass 7, count 0 2006.232.08:12:00.70#ibcon#about to read 6, iclass 7, count 0 2006.232.08:12:00.70#ibcon#read 6, iclass 7, count 0 2006.232.08:12:00.70#ibcon#end of sib2, iclass 7, count 0 2006.232.08:12:00.70#ibcon#*after write, iclass 7, count 0 2006.232.08:12:00.70#ibcon#*before return 0, iclass 7, count 0 2006.232.08:12:00.70#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.232.08:12:00.70#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.232.08:12:00.70#ibcon#about to clear, iclass 7 cls_cnt 0 2006.232.08:12:00.70#ibcon#cleared, iclass 7 cls_cnt 0 2006.232.08:12:00.70$vc4f8/vblo=1,632.99 2006.232.08:12:00.70#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.232.08:12:00.70#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.232.08:12:00.70#ibcon#ireg 17 cls_cnt 0 2006.232.08:12:00.70#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.232.08:12:00.70#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.232.08:12:00.70#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.232.08:12:00.70#ibcon#enter wrdev, iclass 11, count 0 2006.232.08:12:00.70#ibcon#first serial, iclass 11, count 0 2006.232.08:12:00.70#ibcon#enter sib2, iclass 11, count 0 2006.232.08:12:00.70#ibcon#flushed, iclass 11, count 0 2006.232.08:12:00.70#ibcon#about to write, iclass 11, count 0 2006.232.08:12:00.70#ibcon#wrote, iclass 11, count 0 2006.232.08:12:00.70#ibcon#about to read 3, iclass 11, count 0 2006.232.08:12:00.72#ibcon#read 3, iclass 11, count 0 2006.232.08:12:00.72#ibcon#about to read 4, iclass 11, count 0 2006.232.08:12:00.72#ibcon#read 4, iclass 11, count 0 2006.232.08:12:00.72#ibcon#about to read 5, iclass 11, count 0 2006.232.08:12:00.72#ibcon#read 5, iclass 11, count 0 2006.232.08:12:00.72#ibcon#about to read 6, iclass 11, count 0 2006.232.08:12:00.72#ibcon#read 6, iclass 11, count 0 2006.232.08:12:00.72#ibcon#end of sib2, iclass 11, count 0 2006.232.08:12:00.72#ibcon#*mode == 0, iclass 11, count 0 2006.232.08:12:00.72#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.232.08:12:00.72#ibcon#[28=FRQ=01,632.99\r\n] 2006.232.08:12:00.72#ibcon#*before write, iclass 11, count 0 2006.232.08:12:00.72#ibcon#enter sib2, iclass 11, count 0 2006.232.08:12:00.72#ibcon#flushed, iclass 11, count 0 2006.232.08:12:00.72#ibcon#about to write, iclass 11, count 0 2006.232.08:12:00.72#ibcon#wrote, iclass 11, count 0 2006.232.08:12:00.72#ibcon#about to read 3, iclass 11, count 0 2006.232.08:12:00.76#ibcon#read 3, iclass 11, count 0 2006.232.08:12:00.76#ibcon#about to read 4, iclass 11, count 0 2006.232.08:12:00.76#ibcon#read 4, iclass 11, count 0 2006.232.08:12:00.76#ibcon#about to read 5, iclass 11, count 0 2006.232.08:12:00.76#ibcon#read 5, iclass 11, count 0 2006.232.08:12:00.76#ibcon#about to read 6, iclass 11, count 0 2006.232.08:12:00.76#ibcon#read 6, iclass 11, count 0 2006.232.08:12:00.76#ibcon#end of sib2, iclass 11, count 0 2006.232.08:12:00.76#ibcon#*after write, iclass 11, count 0 2006.232.08:12:00.76#ibcon#*before return 0, iclass 11, count 0 2006.232.08:12:00.76#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.232.08:12:00.76#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.232.08:12:00.76#ibcon#about to clear, iclass 11 cls_cnt 0 2006.232.08:12:00.76#ibcon#cleared, iclass 11 cls_cnt 0 2006.232.08:12:00.76$vc4f8/vb=1,4 2006.232.08:12:00.76#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.232.08:12:00.76#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.232.08:12:00.76#ibcon#ireg 11 cls_cnt 2 2006.232.08:12:00.76#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.232.08:12:00.76#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.232.08:12:00.76#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.232.08:12:00.76#ibcon#enter wrdev, iclass 13, count 2 2006.232.08:12:00.76#ibcon#first serial, iclass 13, count 2 2006.232.08:12:00.76#ibcon#enter sib2, iclass 13, count 2 2006.232.08:12:00.76#ibcon#flushed, iclass 13, count 2 2006.232.08:12:00.76#ibcon#about to write, iclass 13, count 2 2006.232.08:12:00.76#ibcon#wrote, iclass 13, count 2 2006.232.08:12:00.76#ibcon#about to read 3, iclass 13, count 2 2006.232.08:12:00.78#ibcon#read 3, iclass 13, count 2 2006.232.08:12:00.78#ibcon#about to read 4, iclass 13, count 2 2006.232.08:12:00.78#ibcon#read 4, iclass 13, count 2 2006.232.08:12:00.78#ibcon#about to read 5, iclass 13, count 2 2006.232.08:12:00.78#ibcon#read 5, iclass 13, count 2 2006.232.08:12:00.78#ibcon#about to read 6, iclass 13, count 2 2006.232.08:12:00.78#ibcon#read 6, iclass 13, count 2 2006.232.08:12:00.78#ibcon#end of sib2, iclass 13, count 2 2006.232.08:12:00.78#ibcon#*mode == 0, iclass 13, count 2 2006.232.08:12:00.78#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.232.08:12:00.78#ibcon#[27=AT01-04\r\n] 2006.232.08:12:00.78#ibcon#*before write, iclass 13, count 2 2006.232.08:12:00.78#ibcon#enter sib2, iclass 13, count 2 2006.232.08:12:00.78#ibcon#flushed, iclass 13, count 2 2006.232.08:12:00.78#ibcon#about to write, iclass 13, count 2 2006.232.08:12:00.78#ibcon#wrote, iclass 13, count 2 2006.232.08:12:00.78#ibcon#about to read 3, iclass 13, count 2 2006.232.08:12:00.81#ibcon#read 3, iclass 13, count 2 2006.232.08:12:00.81#ibcon#about to read 4, iclass 13, count 2 2006.232.08:12:00.81#ibcon#read 4, iclass 13, count 2 2006.232.08:12:00.81#ibcon#about to read 5, iclass 13, count 2 2006.232.08:12:00.81#ibcon#read 5, iclass 13, count 2 2006.232.08:12:00.81#ibcon#about to read 6, iclass 13, count 2 2006.232.08:12:00.81#ibcon#read 6, iclass 13, count 2 2006.232.08:12:00.81#ibcon#end of sib2, iclass 13, count 2 2006.232.08:12:00.81#ibcon#*after write, iclass 13, count 2 2006.232.08:12:00.81#ibcon#*before return 0, iclass 13, count 2 2006.232.08:12:00.81#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.232.08:12:00.81#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.232.08:12:00.81#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.232.08:12:00.81#ibcon#ireg 7 cls_cnt 0 2006.232.08:12:00.81#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.232.08:12:00.92#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.232.08:12:00.93#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.232.08:12:00.93#ibcon#enter wrdev, iclass 13, count 0 2006.232.08:12:00.93#ibcon#first serial, iclass 13, count 0 2006.232.08:12:00.93#ibcon#enter sib2, iclass 13, count 0 2006.232.08:12:00.93#ibcon#flushed, iclass 13, count 0 2006.232.08:12:00.93#ibcon#about to write, iclass 13, count 0 2006.232.08:12:00.93#ibcon#wrote, iclass 13, count 0 2006.232.08:12:00.93#ibcon#about to read 3, iclass 13, count 0 2006.232.08:12:00.95#ibcon#read 3, iclass 13, count 0 2006.232.08:12:00.95#ibcon#about to read 4, iclass 13, count 0 2006.232.08:12:00.95#ibcon#read 4, iclass 13, count 0 2006.232.08:12:00.95#ibcon#about to read 5, iclass 13, count 0 2006.232.08:12:00.95#ibcon#read 5, iclass 13, count 0 2006.232.08:12:00.95#ibcon#about to read 6, iclass 13, count 0 2006.232.08:12:00.95#ibcon#read 6, iclass 13, count 0 2006.232.08:12:00.95#ibcon#end of sib2, iclass 13, count 0 2006.232.08:12:00.95#ibcon#*mode == 0, iclass 13, count 0 2006.232.08:12:00.95#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.232.08:12:00.95#ibcon#[27=USB\r\n] 2006.232.08:12:00.95#ibcon#*before write, iclass 13, count 0 2006.232.08:12:00.95#ibcon#enter sib2, iclass 13, count 0 2006.232.08:12:00.95#ibcon#flushed, iclass 13, count 0 2006.232.08:12:00.95#ibcon#about to write, iclass 13, count 0 2006.232.08:12:00.95#ibcon#wrote, iclass 13, count 0 2006.232.08:12:00.95#ibcon#about to read 3, iclass 13, count 0 2006.232.08:12:00.98#ibcon#read 3, iclass 13, count 0 2006.232.08:12:00.98#ibcon#about to read 4, iclass 13, count 0 2006.232.08:12:00.98#ibcon#read 4, iclass 13, count 0 2006.232.08:12:00.98#ibcon#about to read 5, iclass 13, count 0 2006.232.08:12:00.98#ibcon#read 5, iclass 13, count 0 2006.232.08:12:00.98#ibcon#about to read 6, iclass 13, count 0 2006.232.08:12:00.98#ibcon#read 6, iclass 13, count 0 2006.232.08:12:00.98#ibcon#end of sib2, iclass 13, count 0 2006.232.08:12:00.98#ibcon#*after write, iclass 13, count 0 2006.232.08:12:00.98#ibcon#*before return 0, iclass 13, count 0 2006.232.08:12:00.98#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.232.08:12:00.98#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.232.08:12:00.98#ibcon#about to clear, iclass 13 cls_cnt 0 2006.232.08:12:00.98#ibcon#cleared, iclass 13 cls_cnt 0 2006.232.08:12:00.98$vc4f8/vblo=2,640.99 2006.232.08:12:00.98#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.232.08:12:00.98#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.232.08:12:00.98#ibcon#ireg 17 cls_cnt 0 2006.232.08:12:00.98#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.232.08:12:00.98#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.232.08:12:00.98#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.232.08:12:00.98#ibcon#enter wrdev, iclass 15, count 0 2006.232.08:12:00.98#ibcon#first serial, iclass 15, count 0 2006.232.08:12:00.98#ibcon#enter sib2, iclass 15, count 0 2006.232.08:12:00.98#ibcon#flushed, iclass 15, count 0 2006.232.08:12:00.98#ibcon#about to write, iclass 15, count 0 2006.232.08:12:00.98#ibcon#wrote, iclass 15, count 0 2006.232.08:12:00.98#ibcon#about to read 3, iclass 15, count 0 2006.232.08:12:01.00#ibcon#read 3, iclass 15, count 0 2006.232.08:12:01.00#ibcon#about to read 4, iclass 15, count 0 2006.232.08:12:01.00#ibcon#read 4, iclass 15, count 0 2006.232.08:12:01.00#ibcon#about to read 5, iclass 15, count 0 2006.232.08:12:01.00#ibcon#read 5, iclass 15, count 0 2006.232.08:12:01.00#ibcon#about to read 6, iclass 15, count 0 2006.232.08:12:01.00#ibcon#read 6, iclass 15, count 0 2006.232.08:12:01.00#ibcon#end of sib2, iclass 15, count 0 2006.232.08:12:01.00#ibcon#*mode == 0, iclass 15, count 0 2006.232.08:12:01.00#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.232.08:12:01.00#ibcon#[28=FRQ=02,640.99\r\n] 2006.232.08:12:01.00#ibcon#*before write, iclass 15, count 0 2006.232.08:12:01.00#ibcon#enter sib2, iclass 15, count 0 2006.232.08:12:01.00#ibcon#flushed, iclass 15, count 0 2006.232.08:12:01.00#ibcon#about to write, iclass 15, count 0 2006.232.08:12:01.00#ibcon#wrote, iclass 15, count 0 2006.232.08:12:01.00#ibcon#about to read 3, iclass 15, count 0 2006.232.08:12:01.04#ibcon#read 3, iclass 15, count 0 2006.232.08:12:01.04#ibcon#about to read 4, iclass 15, count 0 2006.232.08:12:01.04#ibcon#read 4, iclass 15, count 0 2006.232.08:12:01.04#ibcon#about to read 5, iclass 15, count 0 2006.232.08:12:01.04#ibcon#read 5, iclass 15, count 0 2006.232.08:12:01.04#ibcon#about to read 6, iclass 15, count 0 2006.232.08:12:01.04#ibcon#read 6, iclass 15, count 0 2006.232.08:12:01.04#ibcon#end of sib2, iclass 15, count 0 2006.232.08:12:01.04#ibcon#*after write, iclass 15, count 0 2006.232.08:12:01.04#ibcon#*before return 0, iclass 15, count 0 2006.232.08:12:01.04#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.232.08:12:01.04#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.232.08:12:01.04#ibcon#about to clear, iclass 15 cls_cnt 0 2006.232.08:12:01.04#ibcon#cleared, iclass 15 cls_cnt 0 2006.232.08:12:01.04$vc4f8/vb=2,4 2006.232.08:12:01.04#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.232.08:12:01.04#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.232.08:12:01.04#ibcon#ireg 11 cls_cnt 2 2006.232.08:12:01.04#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.232.08:12:01.09#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.232.08:12:01.10#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.232.08:12:01.10#ibcon#enter wrdev, iclass 17, count 2 2006.232.08:12:01.10#ibcon#first serial, iclass 17, count 2 2006.232.08:12:01.10#ibcon#enter sib2, iclass 17, count 2 2006.232.08:12:01.10#ibcon#flushed, iclass 17, count 2 2006.232.08:12:01.10#ibcon#about to write, iclass 17, count 2 2006.232.08:12:01.10#ibcon#wrote, iclass 17, count 2 2006.232.08:12:01.10#ibcon#about to read 3, iclass 17, count 2 2006.232.08:12:01.12#ibcon#read 3, iclass 17, count 2 2006.232.08:12:01.12#ibcon#about to read 4, iclass 17, count 2 2006.232.08:12:01.12#ibcon#read 4, iclass 17, count 2 2006.232.08:12:01.12#ibcon#about to read 5, iclass 17, count 2 2006.232.08:12:01.12#ibcon#read 5, iclass 17, count 2 2006.232.08:12:01.12#ibcon#about to read 6, iclass 17, count 2 2006.232.08:12:01.12#ibcon#read 6, iclass 17, count 2 2006.232.08:12:01.12#ibcon#end of sib2, iclass 17, count 2 2006.232.08:12:01.12#ibcon#*mode == 0, iclass 17, count 2 2006.232.08:12:01.12#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.232.08:12:01.12#ibcon#[27=AT02-04\r\n] 2006.232.08:12:01.12#ibcon#*before write, iclass 17, count 2 2006.232.08:12:01.12#ibcon#enter sib2, iclass 17, count 2 2006.232.08:12:01.12#ibcon#flushed, iclass 17, count 2 2006.232.08:12:01.12#ibcon#about to write, iclass 17, count 2 2006.232.08:12:01.12#ibcon#wrote, iclass 17, count 2 2006.232.08:12:01.12#ibcon#about to read 3, iclass 17, count 2 2006.232.08:12:01.15#ibcon#read 3, iclass 17, count 2 2006.232.08:12:01.15#ibcon#about to read 4, iclass 17, count 2 2006.232.08:12:01.15#ibcon#read 4, iclass 17, count 2 2006.232.08:12:01.15#ibcon#about to read 5, iclass 17, count 2 2006.232.08:12:01.15#ibcon#read 5, iclass 17, count 2 2006.232.08:12:01.15#ibcon#about to read 6, iclass 17, count 2 2006.232.08:12:01.15#ibcon#read 6, iclass 17, count 2 2006.232.08:12:01.15#ibcon#end of sib2, iclass 17, count 2 2006.232.08:12:01.15#ibcon#*after write, iclass 17, count 2 2006.232.08:12:01.15#ibcon#*before return 0, iclass 17, count 2 2006.232.08:12:01.15#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.232.08:12:01.15#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.232.08:12:01.15#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.232.08:12:01.15#ibcon#ireg 7 cls_cnt 0 2006.232.08:12:01.15#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.232.08:12:01.26#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.232.08:12:01.27#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.232.08:12:01.27#ibcon#enter wrdev, iclass 17, count 0 2006.232.08:12:01.27#ibcon#first serial, iclass 17, count 0 2006.232.08:12:01.27#ibcon#enter sib2, iclass 17, count 0 2006.232.08:12:01.27#ibcon#flushed, iclass 17, count 0 2006.232.08:12:01.27#ibcon#about to write, iclass 17, count 0 2006.232.08:12:01.27#ibcon#wrote, iclass 17, count 0 2006.232.08:12:01.27#ibcon#about to read 3, iclass 17, count 0 2006.232.08:12:01.29#ibcon#read 3, iclass 17, count 0 2006.232.08:12:01.29#ibcon#about to read 4, iclass 17, count 0 2006.232.08:12:01.29#ibcon#read 4, iclass 17, count 0 2006.232.08:12:01.29#ibcon#about to read 5, iclass 17, count 0 2006.232.08:12:01.29#ibcon#read 5, iclass 17, count 0 2006.232.08:12:01.29#ibcon#about to read 6, iclass 17, count 0 2006.232.08:12:01.29#ibcon#read 6, iclass 17, count 0 2006.232.08:12:01.29#ibcon#end of sib2, iclass 17, count 0 2006.232.08:12:01.29#ibcon#*mode == 0, iclass 17, count 0 2006.232.08:12:01.29#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.232.08:12:01.29#ibcon#[27=USB\r\n] 2006.232.08:12:01.29#ibcon#*before write, iclass 17, count 0 2006.232.08:12:01.29#ibcon#enter sib2, iclass 17, count 0 2006.232.08:12:01.29#ibcon#flushed, iclass 17, count 0 2006.232.08:12:01.29#ibcon#about to write, iclass 17, count 0 2006.232.08:12:01.29#ibcon#wrote, iclass 17, count 0 2006.232.08:12:01.29#ibcon#about to read 3, iclass 17, count 0 2006.232.08:12:01.32#ibcon#read 3, iclass 17, count 0 2006.232.08:12:01.32#ibcon#about to read 4, iclass 17, count 0 2006.232.08:12:01.32#ibcon#read 4, iclass 17, count 0 2006.232.08:12:01.32#ibcon#about to read 5, iclass 17, count 0 2006.232.08:12:01.32#ibcon#read 5, iclass 17, count 0 2006.232.08:12:01.32#ibcon#about to read 6, iclass 17, count 0 2006.232.08:12:01.32#ibcon#read 6, iclass 17, count 0 2006.232.08:12:01.32#ibcon#end of sib2, iclass 17, count 0 2006.232.08:12:01.32#ibcon#*after write, iclass 17, count 0 2006.232.08:12:01.32#ibcon#*before return 0, iclass 17, count 0 2006.232.08:12:01.32#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.232.08:12:01.32#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.232.08:12:01.32#ibcon#about to clear, iclass 17 cls_cnt 0 2006.232.08:12:01.32#ibcon#cleared, iclass 17 cls_cnt 0 2006.232.08:12:01.32$vc4f8/vblo=3,656.99 2006.232.08:12:01.32#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.232.08:12:01.32#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.232.08:12:01.32#ibcon#ireg 17 cls_cnt 0 2006.232.08:12:01.32#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.232.08:12:01.32#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.232.08:12:01.32#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.232.08:12:01.32#ibcon#enter wrdev, iclass 19, count 0 2006.232.08:12:01.32#ibcon#first serial, iclass 19, count 0 2006.232.08:12:01.32#ibcon#enter sib2, iclass 19, count 0 2006.232.08:12:01.32#ibcon#flushed, iclass 19, count 0 2006.232.08:12:01.32#ibcon#about to write, iclass 19, count 0 2006.232.08:12:01.32#ibcon#wrote, iclass 19, count 0 2006.232.08:12:01.32#ibcon#about to read 3, iclass 19, count 0 2006.232.08:12:01.34#ibcon#read 3, iclass 19, count 0 2006.232.08:12:01.34#ibcon#about to read 4, iclass 19, count 0 2006.232.08:12:01.34#ibcon#read 4, iclass 19, count 0 2006.232.08:12:01.34#ibcon#about to read 5, iclass 19, count 0 2006.232.08:12:01.34#ibcon#read 5, iclass 19, count 0 2006.232.08:12:01.34#ibcon#about to read 6, iclass 19, count 0 2006.232.08:12:01.34#ibcon#read 6, iclass 19, count 0 2006.232.08:12:01.34#ibcon#end of sib2, iclass 19, count 0 2006.232.08:12:01.34#ibcon#*mode == 0, iclass 19, count 0 2006.232.08:12:01.34#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.232.08:12:01.34#ibcon#[28=FRQ=03,656.99\r\n] 2006.232.08:12:01.34#ibcon#*before write, iclass 19, count 0 2006.232.08:12:01.34#ibcon#enter sib2, iclass 19, count 0 2006.232.08:12:01.34#ibcon#flushed, iclass 19, count 0 2006.232.08:12:01.34#ibcon#about to write, iclass 19, count 0 2006.232.08:12:01.34#ibcon#wrote, iclass 19, count 0 2006.232.08:12:01.34#ibcon#about to read 3, iclass 19, count 0 2006.232.08:12:01.38#ibcon#read 3, iclass 19, count 0 2006.232.08:12:01.38#ibcon#about to read 4, iclass 19, count 0 2006.232.08:12:01.38#ibcon#read 4, iclass 19, count 0 2006.232.08:12:01.38#ibcon#about to read 5, iclass 19, count 0 2006.232.08:12:01.38#ibcon#read 5, iclass 19, count 0 2006.232.08:12:01.38#ibcon#about to read 6, iclass 19, count 0 2006.232.08:12:01.38#ibcon#read 6, iclass 19, count 0 2006.232.08:12:01.38#ibcon#end of sib2, iclass 19, count 0 2006.232.08:12:01.38#ibcon#*after write, iclass 19, count 0 2006.232.08:12:01.38#ibcon#*before return 0, iclass 19, count 0 2006.232.08:12:01.38#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.232.08:12:01.38#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.232.08:12:01.38#ibcon#about to clear, iclass 19 cls_cnt 0 2006.232.08:12:01.38#ibcon#cleared, iclass 19 cls_cnt 0 2006.232.08:12:01.38$vc4f8/vb=3,4 2006.232.08:12:01.38#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.232.08:12:01.38#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.232.08:12:01.38#ibcon#ireg 11 cls_cnt 2 2006.232.08:12:01.38#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.232.08:12:01.43#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.232.08:12:01.44#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.232.08:12:01.44#ibcon#enter wrdev, iclass 21, count 2 2006.232.08:12:01.44#ibcon#first serial, iclass 21, count 2 2006.232.08:12:01.44#ibcon#enter sib2, iclass 21, count 2 2006.232.08:12:01.44#ibcon#flushed, iclass 21, count 2 2006.232.08:12:01.44#ibcon#about to write, iclass 21, count 2 2006.232.08:12:01.44#ibcon#wrote, iclass 21, count 2 2006.232.08:12:01.44#ibcon#about to read 3, iclass 21, count 2 2006.232.08:12:01.46#ibcon#read 3, iclass 21, count 2 2006.232.08:12:01.46#ibcon#about to read 4, iclass 21, count 2 2006.232.08:12:01.46#ibcon#read 4, iclass 21, count 2 2006.232.08:12:01.46#ibcon#about to read 5, iclass 21, count 2 2006.232.08:12:01.46#ibcon#read 5, iclass 21, count 2 2006.232.08:12:01.46#ibcon#about to read 6, iclass 21, count 2 2006.232.08:12:01.46#ibcon#read 6, iclass 21, count 2 2006.232.08:12:01.46#ibcon#end of sib2, iclass 21, count 2 2006.232.08:12:01.46#ibcon#*mode == 0, iclass 21, count 2 2006.232.08:12:01.46#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.232.08:12:01.46#ibcon#[27=AT03-04\r\n] 2006.232.08:12:01.46#ibcon#*before write, iclass 21, count 2 2006.232.08:12:01.46#ibcon#enter sib2, iclass 21, count 2 2006.232.08:12:01.46#ibcon#flushed, iclass 21, count 2 2006.232.08:12:01.46#ibcon#about to write, iclass 21, count 2 2006.232.08:12:01.46#ibcon#wrote, iclass 21, count 2 2006.232.08:12:01.46#ibcon#about to read 3, iclass 21, count 2 2006.232.08:12:01.50#ibcon#read 3, iclass 21, count 2 2006.232.08:12:01.50#ibcon#about to read 4, iclass 21, count 2 2006.232.08:12:01.50#ibcon#read 4, iclass 21, count 2 2006.232.08:12:01.50#ibcon#about to read 5, iclass 21, count 2 2006.232.08:12:01.50#ibcon#read 5, iclass 21, count 2 2006.232.08:12:01.50#ibcon#about to read 6, iclass 21, count 2 2006.232.08:12:01.50#ibcon#read 6, iclass 21, count 2 2006.232.08:12:01.50#ibcon#end of sib2, iclass 21, count 2 2006.232.08:12:01.50#ibcon#*after write, iclass 21, count 2 2006.232.08:12:01.50#ibcon#*before return 0, iclass 21, count 2 2006.232.08:12:01.50#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.232.08:12:01.50#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.232.08:12:01.50#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.232.08:12:01.50#ibcon#ireg 7 cls_cnt 0 2006.232.08:12:01.50#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.232.08:12:01.61#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.232.08:12:01.62#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.232.08:12:01.62#ibcon#enter wrdev, iclass 21, count 0 2006.232.08:12:01.62#ibcon#first serial, iclass 21, count 0 2006.232.08:12:01.62#ibcon#enter sib2, iclass 21, count 0 2006.232.08:12:01.62#ibcon#flushed, iclass 21, count 0 2006.232.08:12:01.62#ibcon#about to write, iclass 21, count 0 2006.232.08:12:01.62#ibcon#wrote, iclass 21, count 0 2006.232.08:12:01.62#ibcon#about to read 3, iclass 21, count 0 2006.232.08:12:01.64#ibcon#read 3, iclass 21, count 0 2006.232.08:12:01.64#ibcon#about to read 4, iclass 21, count 0 2006.232.08:12:01.64#ibcon#read 4, iclass 21, count 0 2006.232.08:12:01.64#ibcon#about to read 5, iclass 21, count 0 2006.232.08:12:01.64#ibcon#read 5, iclass 21, count 0 2006.232.08:12:01.64#ibcon#about to read 6, iclass 21, count 0 2006.232.08:12:01.64#ibcon#read 6, iclass 21, count 0 2006.232.08:12:01.64#ibcon#end of sib2, iclass 21, count 0 2006.232.08:12:01.64#ibcon#*mode == 0, iclass 21, count 0 2006.232.08:12:01.64#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.232.08:12:01.64#ibcon#[27=USB\r\n] 2006.232.08:12:01.64#ibcon#*before write, iclass 21, count 0 2006.232.08:12:01.64#ibcon#enter sib2, iclass 21, count 0 2006.232.08:12:01.64#ibcon#flushed, iclass 21, count 0 2006.232.08:12:01.64#ibcon#about to write, iclass 21, count 0 2006.232.08:12:01.64#ibcon#wrote, iclass 21, count 0 2006.232.08:12:01.64#ibcon#about to read 3, iclass 21, count 0 2006.232.08:12:01.67#ibcon#read 3, iclass 21, count 0 2006.232.08:12:01.67#ibcon#about to read 4, iclass 21, count 0 2006.232.08:12:01.67#ibcon#read 4, iclass 21, count 0 2006.232.08:12:01.67#ibcon#about to read 5, iclass 21, count 0 2006.232.08:12:01.67#ibcon#read 5, iclass 21, count 0 2006.232.08:12:01.67#ibcon#about to read 6, iclass 21, count 0 2006.232.08:12:01.67#ibcon#read 6, iclass 21, count 0 2006.232.08:12:01.67#ibcon#end of sib2, iclass 21, count 0 2006.232.08:12:01.67#ibcon#*after write, iclass 21, count 0 2006.232.08:12:01.67#ibcon#*before return 0, iclass 21, count 0 2006.232.08:12:01.67#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.232.08:12:01.67#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.232.08:12:01.67#ibcon#about to clear, iclass 21 cls_cnt 0 2006.232.08:12:01.67#ibcon#cleared, iclass 21 cls_cnt 0 2006.232.08:12:01.67$vc4f8/vblo=4,712.99 2006.232.08:12:01.67#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.232.08:12:01.67#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.232.08:12:01.67#ibcon#ireg 17 cls_cnt 0 2006.232.08:12:01.67#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.232.08:12:01.67#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.232.08:12:01.67#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.232.08:12:01.67#ibcon#enter wrdev, iclass 23, count 0 2006.232.08:12:01.67#ibcon#first serial, iclass 23, count 0 2006.232.08:12:01.67#ibcon#enter sib2, iclass 23, count 0 2006.232.08:12:01.67#ibcon#flushed, iclass 23, count 0 2006.232.08:12:01.67#ibcon#about to write, iclass 23, count 0 2006.232.08:12:01.67#ibcon#wrote, iclass 23, count 0 2006.232.08:12:01.67#ibcon#about to read 3, iclass 23, count 0 2006.232.08:12:01.69#ibcon#read 3, iclass 23, count 0 2006.232.08:12:01.69#ibcon#about to read 4, iclass 23, count 0 2006.232.08:12:01.69#ibcon#read 4, iclass 23, count 0 2006.232.08:12:01.69#ibcon#about to read 5, iclass 23, count 0 2006.232.08:12:01.69#ibcon#read 5, iclass 23, count 0 2006.232.08:12:01.69#ibcon#about to read 6, iclass 23, count 0 2006.232.08:12:01.69#ibcon#read 6, iclass 23, count 0 2006.232.08:12:01.69#ibcon#end of sib2, iclass 23, count 0 2006.232.08:12:01.69#ibcon#*mode == 0, iclass 23, count 0 2006.232.08:12:01.69#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.232.08:12:01.69#ibcon#[28=FRQ=04,712.99\r\n] 2006.232.08:12:01.69#ibcon#*before write, iclass 23, count 0 2006.232.08:12:01.69#ibcon#enter sib2, iclass 23, count 0 2006.232.08:12:01.69#ibcon#flushed, iclass 23, count 0 2006.232.08:12:01.69#ibcon#about to write, iclass 23, count 0 2006.232.08:12:01.69#ibcon#wrote, iclass 23, count 0 2006.232.08:12:01.69#ibcon#about to read 3, iclass 23, count 0 2006.232.08:12:01.73#ibcon#read 3, iclass 23, count 0 2006.232.08:12:01.73#ibcon#about to read 4, iclass 23, count 0 2006.232.08:12:01.73#ibcon#read 4, iclass 23, count 0 2006.232.08:12:01.73#ibcon#about to read 5, iclass 23, count 0 2006.232.08:12:01.73#ibcon#read 5, iclass 23, count 0 2006.232.08:12:01.73#ibcon#about to read 6, iclass 23, count 0 2006.232.08:12:01.73#ibcon#read 6, iclass 23, count 0 2006.232.08:12:01.73#ibcon#end of sib2, iclass 23, count 0 2006.232.08:12:01.73#ibcon#*after write, iclass 23, count 0 2006.232.08:12:01.73#ibcon#*before return 0, iclass 23, count 0 2006.232.08:12:01.73#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.232.08:12:01.73#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.232.08:12:01.73#ibcon#about to clear, iclass 23 cls_cnt 0 2006.232.08:12:01.73#ibcon#cleared, iclass 23 cls_cnt 0 2006.232.08:12:01.73$vc4f8/vb=4,4 2006.232.08:12:01.73#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.232.08:12:01.73#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.232.08:12:01.73#ibcon#ireg 11 cls_cnt 2 2006.232.08:12:01.73#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.232.08:12:01.79#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.232.08:12:01.79#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.232.08:12:01.79#ibcon#enter wrdev, iclass 25, count 2 2006.232.08:12:01.79#ibcon#first serial, iclass 25, count 2 2006.232.08:12:01.79#ibcon#enter sib2, iclass 25, count 2 2006.232.08:12:01.79#ibcon#flushed, iclass 25, count 2 2006.232.08:12:01.79#ibcon#about to write, iclass 25, count 2 2006.232.08:12:01.79#ibcon#wrote, iclass 25, count 2 2006.232.08:12:01.79#ibcon#about to read 3, iclass 25, count 2 2006.232.08:12:01.81#ibcon#read 3, iclass 25, count 2 2006.232.08:12:01.81#ibcon#about to read 4, iclass 25, count 2 2006.232.08:12:01.81#ibcon#read 4, iclass 25, count 2 2006.232.08:12:01.81#ibcon#about to read 5, iclass 25, count 2 2006.232.08:12:01.81#ibcon#read 5, iclass 25, count 2 2006.232.08:12:01.81#ibcon#about to read 6, iclass 25, count 2 2006.232.08:12:01.81#ibcon#read 6, iclass 25, count 2 2006.232.08:12:01.81#ibcon#end of sib2, iclass 25, count 2 2006.232.08:12:01.81#ibcon#*mode == 0, iclass 25, count 2 2006.232.08:12:01.81#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.232.08:12:01.81#ibcon#[27=AT04-04\r\n] 2006.232.08:12:01.81#ibcon#*before write, iclass 25, count 2 2006.232.08:12:01.81#ibcon#enter sib2, iclass 25, count 2 2006.232.08:12:01.81#ibcon#flushed, iclass 25, count 2 2006.232.08:12:01.81#ibcon#about to write, iclass 25, count 2 2006.232.08:12:01.81#ibcon#wrote, iclass 25, count 2 2006.232.08:12:01.81#ibcon#about to read 3, iclass 25, count 2 2006.232.08:12:01.84#ibcon#read 3, iclass 25, count 2 2006.232.08:12:01.84#ibcon#about to read 4, iclass 25, count 2 2006.232.08:12:01.84#ibcon#read 4, iclass 25, count 2 2006.232.08:12:01.84#ibcon#about to read 5, iclass 25, count 2 2006.232.08:12:01.84#ibcon#read 5, iclass 25, count 2 2006.232.08:12:01.84#ibcon#about to read 6, iclass 25, count 2 2006.232.08:12:01.84#ibcon#read 6, iclass 25, count 2 2006.232.08:12:01.84#ibcon#end of sib2, iclass 25, count 2 2006.232.08:12:01.84#ibcon#*after write, iclass 25, count 2 2006.232.08:12:01.84#ibcon#*before return 0, iclass 25, count 2 2006.232.08:12:01.84#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.232.08:12:01.84#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.232.08:12:01.84#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.232.08:12:01.84#ibcon#ireg 7 cls_cnt 0 2006.232.08:12:01.84#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.232.08:12:01.95#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.232.08:12:01.96#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.232.08:12:01.96#ibcon#enter wrdev, iclass 25, count 0 2006.232.08:12:01.96#ibcon#first serial, iclass 25, count 0 2006.232.08:12:01.96#ibcon#enter sib2, iclass 25, count 0 2006.232.08:12:01.96#ibcon#flushed, iclass 25, count 0 2006.232.08:12:01.96#ibcon#about to write, iclass 25, count 0 2006.232.08:12:01.96#ibcon#wrote, iclass 25, count 0 2006.232.08:12:01.96#ibcon#about to read 3, iclass 25, count 0 2006.232.08:12:01.98#ibcon#read 3, iclass 25, count 0 2006.232.08:12:01.98#ibcon#about to read 4, iclass 25, count 0 2006.232.08:12:01.98#ibcon#read 4, iclass 25, count 0 2006.232.08:12:01.98#ibcon#about to read 5, iclass 25, count 0 2006.232.08:12:01.98#ibcon#read 5, iclass 25, count 0 2006.232.08:12:01.98#ibcon#about to read 6, iclass 25, count 0 2006.232.08:12:01.98#ibcon#read 6, iclass 25, count 0 2006.232.08:12:01.98#ibcon#end of sib2, iclass 25, count 0 2006.232.08:12:01.98#ibcon#*mode == 0, iclass 25, count 0 2006.232.08:12:01.98#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.232.08:12:01.98#ibcon#[27=USB\r\n] 2006.232.08:12:01.98#ibcon#*before write, iclass 25, count 0 2006.232.08:12:01.98#ibcon#enter sib2, iclass 25, count 0 2006.232.08:12:01.98#ibcon#flushed, iclass 25, count 0 2006.232.08:12:01.98#ibcon#about to write, iclass 25, count 0 2006.232.08:12:01.98#ibcon#wrote, iclass 25, count 0 2006.232.08:12:01.98#ibcon#about to read 3, iclass 25, count 0 2006.232.08:12:02.01#ibcon#read 3, iclass 25, count 0 2006.232.08:12:02.01#ibcon#about to read 4, iclass 25, count 0 2006.232.08:12:02.01#ibcon#read 4, iclass 25, count 0 2006.232.08:12:02.01#ibcon#about to read 5, iclass 25, count 0 2006.232.08:12:02.01#ibcon#read 5, iclass 25, count 0 2006.232.08:12:02.01#ibcon#about to read 6, iclass 25, count 0 2006.232.08:12:02.01#ibcon#read 6, iclass 25, count 0 2006.232.08:12:02.01#ibcon#end of sib2, iclass 25, count 0 2006.232.08:12:02.01#ibcon#*after write, iclass 25, count 0 2006.232.08:12:02.01#ibcon#*before return 0, iclass 25, count 0 2006.232.08:12:02.01#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.232.08:12:02.01#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.232.08:12:02.01#ibcon#about to clear, iclass 25 cls_cnt 0 2006.232.08:12:02.01#ibcon#cleared, iclass 25 cls_cnt 0 2006.232.08:12:02.01$vc4f8/vblo=5,744.99 2006.232.08:12:02.01#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.232.08:12:02.01#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.232.08:12:02.01#ibcon#ireg 17 cls_cnt 0 2006.232.08:12:02.01#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.232.08:12:02.01#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.232.08:12:02.01#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.232.08:12:02.01#ibcon#enter wrdev, iclass 27, count 0 2006.232.08:12:02.01#ibcon#first serial, iclass 27, count 0 2006.232.08:12:02.01#ibcon#enter sib2, iclass 27, count 0 2006.232.08:12:02.01#ibcon#flushed, iclass 27, count 0 2006.232.08:12:02.01#ibcon#about to write, iclass 27, count 0 2006.232.08:12:02.01#ibcon#wrote, iclass 27, count 0 2006.232.08:12:02.01#ibcon#about to read 3, iclass 27, count 0 2006.232.08:12:02.03#ibcon#read 3, iclass 27, count 0 2006.232.08:12:02.03#ibcon#about to read 4, iclass 27, count 0 2006.232.08:12:02.03#ibcon#read 4, iclass 27, count 0 2006.232.08:12:02.03#ibcon#about to read 5, iclass 27, count 0 2006.232.08:12:02.03#ibcon#read 5, iclass 27, count 0 2006.232.08:12:02.03#ibcon#about to read 6, iclass 27, count 0 2006.232.08:12:02.03#ibcon#read 6, iclass 27, count 0 2006.232.08:12:02.03#ibcon#end of sib2, iclass 27, count 0 2006.232.08:12:02.03#ibcon#*mode == 0, iclass 27, count 0 2006.232.08:12:02.03#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.232.08:12:02.03#ibcon#[28=FRQ=05,744.99\r\n] 2006.232.08:12:02.03#ibcon#*before write, iclass 27, count 0 2006.232.08:12:02.03#ibcon#enter sib2, iclass 27, count 0 2006.232.08:12:02.03#ibcon#flushed, iclass 27, count 0 2006.232.08:12:02.03#ibcon#about to write, iclass 27, count 0 2006.232.08:12:02.03#ibcon#wrote, iclass 27, count 0 2006.232.08:12:02.03#ibcon#about to read 3, iclass 27, count 0 2006.232.08:12:02.07#ibcon#read 3, iclass 27, count 0 2006.232.08:12:02.07#ibcon#about to read 4, iclass 27, count 0 2006.232.08:12:02.07#ibcon#read 4, iclass 27, count 0 2006.232.08:12:02.07#ibcon#about to read 5, iclass 27, count 0 2006.232.08:12:02.07#ibcon#read 5, iclass 27, count 0 2006.232.08:12:02.07#ibcon#about to read 6, iclass 27, count 0 2006.232.08:12:02.07#ibcon#read 6, iclass 27, count 0 2006.232.08:12:02.07#ibcon#end of sib2, iclass 27, count 0 2006.232.08:12:02.07#ibcon#*after write, iclass 27, count 0 2006.232.08:12:02.07#ibcon#*before return 0, iclass 27, count 0 2006.232.08:12:02.07#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.232.08:12:02.07#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.232.08:12:02.07#ibcon#about to clear, iclass 27 cls_cnt 0 2006.232.08:12:02.07#ibcon#cleared, iclass 27 cls_cnt 0 2006.232.08:12:02.07$vc4f8/vb=5,3 2006.232.08:12:02.07#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.232.08:12:02.07#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.232.08:12:02.07#ibcon#ireg 11 cls_cnt 2 2006.232.08:12:02.07#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.232.08:12:02.13#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.232.08:12:02.13#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.232.08:12:02.13#ibcon#enter wrdev, iclass 29, count 2 2006.232.08:12:02.13#ibcon#first serial, iclass 29, count 2 2006.232.08:12:02.13#ibcon#enter sib2, iclass 29, count 2 2006.232.08:12:02.13#ibcon#flushed, iclass 29, count 2 2006.232.08:12:02.13#ibcon#about to write, iclass 29, count 2 2006.232.08:12:02.13#ibcon#wrote, iclass 29, count 2 2006.232.08:12:02.13#ibcon#about to read 3, iclass 29, count 2 2006.232.08:12:02.15#ibcon#read 3, iclass 29, count 2 2006.232.08:12:02.15#ibcon#about to read 4, iclass 29, count 2 2006.232.08:12:02.15#ibcon#read 4, iclass 29, count 2 2006.232.08:12:02.15#ibcon#about to read 5, iclass 29, count 2 2006.232.08:12:02.15#ibcon#read 5, iclass 29, count 2 2006.232.08:12:02.15#ibcon#about to read 6, iclass 29, count 2 2006.232.08:12:02.15#ibcon#read 6, iclass 29, count 2 2006.232.08:12:02.15#ibcon#end of sib2, iclass 29, count 2 2006.232.08:12:02.15#ibcon#*mode == 0, iclass 29, count 2 2006.232.08:12:02.15#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.232.08:12:02.15#ibcon#[27=AT05-03\r\n] 2006.232.08:12:02.15#ibcon#*before write, iclass 29, count 2 2006.232.08:12:02.15#ibcon#enter sib2, iclass 29, count 2 2006.232.08:12:02.15#ibcon#flushed, iclass 29, count 2 2006.232.08:12:02.15#ibcon#about to write, iclass 29, count 2 2006.232.08:12:02.15#ibcon#wrote, iclass 29, count 2 2006.232.08:12:02.15#ibcon#about to read 3, iclass 29, count 2 2006.232.08:12:02.18#ibcon#read 3, iclass 29, count 2 2006.232.08:12:02.18#ibcon#about to read 4, iclass 29, count 2 2006.232.08:12:02.18#ibcon#read 4, iclass 29, count 2 2006.232.08:12:02.18#ibcon#about to read 5, iclass 29, count 2 2006.232.08:12:02.18#ibcon#read 5, iclass 29, count 2 2006.232.08:12:02.18#ibcon#about to read 6, iclass 29, count 2 2006.232.08:12:02.18#ibcon#read 6, iclass 29, count 2 2006.232.08:12:02.18#ibcon#end of sib2, iclass 29, count 2 2006.232.08:12:02.18#ibcon#*after write, iclass 29, count 2 2006.232.08:12:02.18#ibcon#*before return 0, iclass 29, count 2 2006.232.08:12:02.18#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.232.08:12:02.18#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.232.08:12:02.18#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.232.08:12:02.18#ibcon#ireg 7 cls_cnt 0 2006.232.08:12:02.18#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.232.08:12:02.29#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.232.08:12:02.30#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.232.08:12:02.30#ibcon#enter wrdev, iclass 29, count 0 2006.232.08:12:02.30#ibcon#first serial, iclass 29, count 0 2006.232.08:12:02.30#ibcon#enter sib2, iclass 29, count 0 2006.232.08:12:02.30#ibcon#flushed, iclass 29, count 0 2006.232.08:12:02.30#ibcon#about to write, iclass 29, count 0 2006.232.08:12:02.30#ibcon#wrote, iclass 29, count 0 2006.232.08:12:02.30#ibcon#about to read 3, iclass 29, count 0 2006.232.08:12:02.31#ibcon#read 3, iclass 29, count 0 2006.232.08:12:02.32#ibcon#about to read 4, iclass 29, count 0 2006.232.08:12:02.32#ibcon#read 4, iclass 29, count 0 2006.232.08:12:02.32#ibcon#about to read 5, iclass 29, count 0 2006.232.08:12:02.32#ibcon#read 5, iclass 29, count 0 2006.232.08:12:02.32#ibcon#about to read 6, iclass 29, count 0 2006.232.08:12:02.32#ibcon#read 6, iclass 29, count 0 2006.232.08:12:02.32#ibcon#end of sib2, iclass 29, count 0 2006.232.08:12:02.32#ibcon#*mode == 0, iclass 29, count 0 2006.232.08:12:02.32#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.232.08:12:02.32#ibcon#[27=USB\r\n] 2006.232.08:12:02.32#ibcon#*before write, iclass 29, count 0 2006.232.08:12:02.32#ibcon#enter sib2, iclass 29, count 0 2006.232.08:12:02.32#ibcon#flushed, iclass 29, count 0 2006.232.08:12:02.32#ibcon#about to write, iclass 29, count 0 2006.232.08:12:02.32#ibcon#wrote, iclass 29, count 0 2006.232.08:12:02.32#ibcon#about to read 3, iclass 29, count 0 2006.232.08:12:02.35#ibcon#read 3, iclass 29, count 0 2006.232.08:12:02.35#ibcon#about to read 4, iclass 29, count 0 2006.232.08:12:02.35#ibcon#read 4, iclass 29, count 0 2006.232.08:12:02.35#ibcon#about to read 5, iclass 29, count 0 2006.232.08:12:02.35#ibcon#read 5, iclass 29, count 0 2006.232.08:12:02.35#ibcon#about to read 6, iclass 29, count 0 2006.232.08:12:02.35#ibcon#read 6, iclass 29, count 0 2006.232.08:12:02.35#ibcon#end of sib2, iclass 29, count 0 2006.232.08:12:02.35#ibcon#*after write, iclass 29, count 0 2006.232.08:12:02.35#ibcon#*before return 0, iclass 29, count 0 2006.232.08:12:02.35#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.232.08:12:02.35#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.232.08:12:02.35#ibcon#about to clear, iclass 29 cls_cnt 0 2006.232.08:12:02.35#ibcon#cleared, iclass 29 cls_cnt 0 2006.232.08:12:02.35$vc4f8/vblo=6,752.99 2006.232.08:12:02.35#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.232.08:12:02.35#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.232.08:12:02.35#ibcon#ireg 17 cls_cnt 0 2006.232.08:12:02.35#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.232.08:12:02.35#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.232.08:12:02.35#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.232.08:12:02.35#ibcon#enter wrdev, iclass 31, count 0 2006.232.08:12:02.35#ibcon#first serial, iclass 31, count 0 2006.232.08:12:02.35#ibcon#enter sib2, iclass 31, count 0 2006.232.08:12:02.35#ibcon#flushed, iclass 31, count 0 2006.232.08:12:02.35#ibcon#about to write, iclass 31, count 0 2006.232.08:12:02.35#ibcon#wrote, iclass 31, count 0 2006.232.08:12:02.35#ibcon#about to read 3, iclass 31, count 0 2006.232.08:12:02.37#ibcon#read 3, iclass 31, count 0 2006.232.08:12:02.37#ibcon#about to read 4, iclass 31, count 0 2006.232.08:12:02.37#ibcon#read 4, iclass 31, count 0 2006.232.08:12:02.37#ibcon#about to read 5, iclass 31, count 0 2006.232.08:12:02.37#ibcon#read 5, iclass 31, count 0 2006.232.08:12:02.37#ibcon#about to read 6, iclass 31, count 0 2006.232.08:12:02.37#ibcon#read 6, iclass 31, count 0 2006.232.08:12:02.37#ibcon#end of sib2, iclass 31, count 0 2006.232.08:12:02.37#ibcon#*mode == 0, iclass 31, count 0 2006.232.08:12:02.37#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.232.08:12:02.37#ibcon#[28=FRQ=06,752.99\r\n] 2006.232.08:12:02.37#ibcon#*before write, iclass 31, count 0 2006.232.08:12:02.37#ibcon#enter sib2, iclass 31, count 0 2006.232.08:12:02.37#ibcon#flushed, iclass 31, count 0 2006.232.08:12:02.37#ibcon#about to write, iclass 31, count 0 2006.232.08:12:02.37#ibcon#wrote, iclass 31, count 0 2006.232.08:12:02.37#ibcon#about to read 3, iclass 31, count 0 2006.232.08:12:02.40#ibcon#read 3, iclass 31, count 0 2006.232.08:12:02.41#ibcon#about to read 4, iclass 31, count 0 2006.232.08:12:02.41#ibcon#read 4, iclass 31, count 0 2006.232.08:12:02.41#ibcon#about to read 5, iclass 31, count 0 2006.232.08:12:02.41#ibcon#read 5, iclass 31, count 0 2006.232.08:12:02.41#ibcon#about to read 6, iclass 31, count 0 2006.232.08:12:02.41#ibcon#read 6, iclass 31, count 0 2006.232.08:12:02.41#ibcon#end of sib2, iclass 31, count 0 2006.232.08:12:02.41#ibcon#*after write, iclass 31, count 0 2006.232.08:12:02.41#ibcon#*before return 0, iclass 31, count 0 2006.232.08:12:02.41#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.232.08:12:02.41#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.232.08:12:02.41#ibcon#about to clear, iclass 31 cls_cnt 0 2006.232.08:12:02.41#ibcon#cleared, iclass 31 cls_cnt 0 2006.232.08:12:02.41$vc4f8/vb=6,4 2006.232.08:12:02.41#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.232.08:12:02.41#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.232.08:12:02.41#ibcon#ireg 11 cls_cnt 2 2006.232.08:12:02.41#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.232.08:12:02.46#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.232.08:12:02.47#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.232.08:12:02.47#ibcon#enter wrdev, iclass 33, count 2 2006.232.08:12:02.47#ibcon#first serial, iclass 33, count 2 2006.232.08:12:02.47#ibcon#enter sib2, iclass 33, count 2 2006.232.08:12:02.47#ibcon#flushed, iclass 33, count 2 2006.232.08:12:02.47#ibcon#about to write, iclass 33, count 2 2006.232.08:12:02.47#ibcon#wrote, iclass 33, count 2 2006.232.08:12:02.47#ibcon#about to read 3, iclass 33, count 2 2006.232.08:12:02.48#ibcon#read 3, iclass 33, count 2 2006.232.08:12:02.49#ibcon#about to read 4, iclass 33, count 2 2006.232.08:12:02.49#ibcon#read 4, iclass 33, count 2 2006.232.08:12:02.49#ibcon#about to read 5, iclass 33, count 2 2006.232.08:12:02.49#ibcon#read 5, iclass 33, count 2 2006.232.08:12:02.49#ibcon#about to read 6, iclass 33, count 2 2006.232.08:12:02.49#ibcon#read 6, iclass 33, count 2 2006.232.08:12:02.49#ibcon#end of sib2, iclass 33, count 2 2006.232.08:12:02.49#ibcon#*mode == 0, iclass 33, count 2 2006.232.08:12:02.49#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.232.08:12:02.49#ibcon#[27=AT06-04\r\n] 2006.232.08:12:02.49#ibcon#*before write, iclass 33, count 2 2006.232.08:12:02.49#ibcon#enter sib2, iclass 33, count 2 2006.232.08:12:02.49#ibcon#flushed, iclass 33, count 2 2006.232.08:12:02.49#ibcon#about to write, iclass 33, count 2 2006.232.08:12:02.49#ibcon#wrote, iclass 33, count 2 2006.232.08:12:02.49#ibcon#about to read 3, iclass 33, count 2 2006.232.08:12:02.51#ibcon#read 3, iclass 33, count 2 2006.232.08:12:02.52#ibcon#about to read 4, iclass 33, count 2 2006.232.08:12:02.52#ibcon#read 4, iclass 33, count 2 2006.232.08:12:02.52#ibcon#about to read 5, iclass 33, count 2 2006.232.08:12:02.52#ibcon#read 5, iclass 33, count 2 2006.232.08:12:02.52#ibcon#about to read 6, iclass 33, count 2 2006.232.08:12:02.52#ibcon#read 6, iclass 33, count 2 2006.232.08:12:02.52#ibcon#end of sib2, iclass 33, count 2 2006.232.08:12:02.52#ibcon#*after write, iclass 33, count 2 2006.232.08:12:02.52#ibcon#*before return 0, iclass 33, count 2 2006.232.08:12:02.52#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.232.08:12:02.52#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.232.08:12:02.52#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.232.08:12:02.52#ibcon#ireg 7 cls_cnt 0 2006.232.08:12:02.52#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.232.08:12:02.63#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.232.08:12:02.64#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.232.08:12:02.64#ibcon#enter wrdev, iclass 33, count 0 2006.232.08:12:02.64#ibcon#first serial, iclass 33, count 0 2006.232.08:12:02.64#ibcon#enter sib2, iclass 33, count 0 2006.232.08:12:02.64#ibcon#flushed, iclass 33, count 0 2006.232.08:12:02.64#ibcon#about to write, iclass 33, count 0 2006.232.08:12:02.64#ibcon#wrote, iclass 33, count 0 2006.232.08:12:02.64#ibcon#about to read 3, iclass 33, count 0 2006.232.08:12:02.66#ibcon#read 3, iclass 33, count 0 2006.232.08:12:02.66#ibcon#about to read 4, iclass 33, count 0 2006.232.08:12:02.66#ibcon#read 4, iclass 33, count 0 2006.232.08:12:02.66#ibcon#about to read 5, iclass 33, count 0 2006.232.08:12:02.66#ibcon#read 5, iclass 33, count 0 2006.232.08:12:02.66#ibcon#about to read 6, iclass 33, count 0 2006.232.08:12:02.66#ibcon#read 6, iclass 33, count 0 2006.232.08:12:02.66#ibcon#end of sib2, iclass 33, count 0 2006.232.08:12:02.66#ibcon#*mode == 0, iclass 33, count 0 2006.232.08:12:02.66#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.232.08:12:02.66#ibcon#[27=USB\r\n] 2006.232.08:12:02.66#ibcon#*before write, iclass 33, count 0 2006.232.08:12:02.66#ibcon#enter sib2, iclass 33, count 0 2006.232.08:12:02.66#ibcon#flushed, iclass 33, count 0 2006.232.08:12:02.66#ibcon#about to write, iclass 33, count 0 2006.232.08:12:02.66#ibcon#wrote, iclass 33, count 0 2006.232.08:12:02.66#ibcon#about to read 3, iclass 33, count 0 2006.232.08:12:02.69#ibcon#read 3, iclass 33, count 0 2006.232.08:12:02.69#ibcon#about to read 4, iclass 33, count 0 2006.232.08:12:02.69#ibcon#read 4, iclass 33, count 0 2006.232.08:12:02.69#ibcon#about to read 5, iclass 33, count 0 2006.232.08:12:02.69#ibcon#read 5, iclass 33, count 0 2006.232.08:12:02.69#ibcon#about to read 6, iclass 33, count 0 2006.232.08:12:02.69#ibcon#read 6, iclass 33, count 0 2006.232.08:12:02.69#ibcon#end of sib2, iclass 33, count 0 2006.232.08:12:02.69#ibcon#*after write, iclass 33, count 0 2006.232.08:12:02.69#ibcon#*before return 0, iclass 33, count 0 2006.232.08:12:02.69#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.232.08:12:02.69#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.232.08:12:02.69#ibcon#about to clear, iclass 33 cls_cnt 0 2006.232.08:12:02.69#ibcon#cleared, iclass 33 cls_cnt 0 2006.232.08:12:02.69$vc4f8/vabw=wide 2006.232.08:12:02.69#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.232.08:12:02.69#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.232.08:12:02.69#ibcon#ireg 8 cls_cnt 0 2006.232.08:12:02.69#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.232.08:12:02.69#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.232.08:12:02.69#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.232.08:12:02.69#ibcon#enter wrdev, iclass 35, count 0 2006.232.08:12:02.69#ibcon#first serial, iclass 35, count 0 2006.232.08:12:02.69#ibcon#enter sib2, iclass 35, count 0 2006.232.08:12:02.69#ibcon#flushed, iclass 35, count 0 2006.232.08:12:02.69#ibcon#about to write, iclass 35, count 0 2006.232.08:12:02.69#ibcon#wrote, iclass 35, count 0 2006.232.08:12:02.69#ibcon#about to read 3, iclass 35, count 0 2006.232.08:12:02.71#ibcon#read 3, iclass 35, count 0 2006.232.08:12:02.71#ibcon#about to read 4, iclass 35, count 0 2006.232.08:12:02.71#ibcon#read 4, iclass 35, count 0 2006.232.08:12:02.71#ibcon#about to read 5, iclass 35, count 0 2006.232.08:12:02.71#ibcon#read 5, iclass 35, count 0 2006.232.08:12:02.71#ibcon#about to read 6, iclass 35, count 0 2006.232.08:12:02.71#ibcon#read 6, iclass 35, count 0 2006.232.08:12:02.71#ibcon#end of sib2, iclass 35, count 0 2006.232.08:12:02.71#ibcon#*mode == 0, iclass 35, count 0 2006.232.08:12:02.71#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.232.08:12:02.71#ibcon#[25=BW32\r\n] 2006.232.08:12:02.71#ibcon#*before write, iclass 35, count 0 2006.232.08:12:02.71#ibcon#enter sib2, iclass 35, count 0 2006.232.08:12:02.71#ibcon#flushed, iclass 35, count 0 2006.232.08:12:02.71#ibcon#about to write, iclass 35, count 0 2006.232.08:12:02.71#ibcon#wrote, iclass 35, count 0 2006.232.08:12:02.71#ibcon#about to read 3, iclass 35, count 0 2006.232.08:12:02.73#ibcon#read 3, iclass 35, count 0 2006.232.08:12:02.74#ibcon#about to read 4, iclass 35, count 0 2006.232.08:12:02.74#ibcon#read 4, iclass 35, count 0 2006.232.08:12:02.74#ibcon#about to read 5, iclass 35, count 0 2006.232.08:12:02.74#ibcon#read 5, iclass 35, count 0 2006.232.08:12:02.74#ibcon#about to read 6, iclass 35, count 0 2006.232.08:12:02.74#ibcon#read 6, iclass 35, count 0 2006.232.08:12:02.74#ibcon#end of sib2, iclass 35, count 0 2006.232.08:12:02.74#ibcon#*after write, iclass 35, count 0 2006.232.08:12:02.74#ibcon#*before return 0, iclass 35, count 0 2006.232.08:12:02.74#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.232.08:12:02.74#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.232.08:12:02.74#ibcon#about to clear, iclass 35 cls_cnt 0 2006.232.08:12:02.74#ibcon#cleared, iclass 35 cls_cnt 0 2006.232.08:12:02.74$vc4f8/vbbw=wide 2006.232.08:12:02.74#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.232.08:12:02.74#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.232.08:12:02.74#ibcon#ireg 8 cls_cnt 0 2006.232.08:12:02.74#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.232.08:12:02.80#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.232.08:12:02.81#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.232.08:12:02.81#ibcon#enter wrdev, iclass 37, count 0 2006.232.08:12:02.81#ibcon#first serial, iclass 37, count 0 2006.232.08:12:02.81#ibcon#enter sib2, iclass 37, count 0 2006.232.08:12:02.81#ibcon#flushed, iclass 37, count 0 2006.232.08:12:02.81#ibcon#about to write, iclass 37, count 0 2006.232.08:12:02.81#ibcon#wrote, iclass 37, count 0 2006.232.08:12:02.81#ibcon#about to read 3, iclass 37, count 0 2006.232.08:12:02.82#ibcon#read 3, iclass 37, count 0 2006.232.08:12:02.83#ibcon#about to read 4, iclass 37, count 0 2006.232.08:12:02.83#ibcon#read 4, iclass 37, count 0 2006.232.08:12:02.83#ibcon#about to read 5, iclass 37, count 0 2006.232.08:12:02.83#ibcon#read 5, iclass 37, count 0 2006.232.08:12:02.83#ibcon#about to read 6, iclass 37, count 0 2006.232.08:12:02.83#ibcon#read 6, iclass 37, count 0 2006.232.08:12:02.83#ibcon#end of sib2, iclass 37, count 0 2006.232.08:12:02.83#ibcon#*mode == 0, iclass 37, count 0 2006.232.08:12:02.83#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.232.08:12:02.83#ibcon#[27=BW32\r\n] 2006.232.08:12:02.83#ibcon#*before write, iclass 37, count 0 2006.232.08:12:02.83#ibcon#enter sib2, iclass 37, count 0 2006.232.08:12:02.83#ibcon#flushed, iclass 37, count 0 2006.232.08:12:02.83#ibcon#about to write, iclass 37, count 0 2006.232.08:12:02.83#ibcon#wrote, iclass 37, count 0 2006.232.08:12:02.83#ibcon#about to read 3, iclass 37, count 0 2006.232.08:12:02.85#ibcon#read 3, iclass 37, count 0 2006.232.08:12:02.86#ibcon#about to read 4, iclass 37, count 0 2006.232.08:12:02.86#ibcon#read 4, iclass 37, count 0 2006.232.08:12:02.86#ibcon#about to read 5, iclass 37, count 0 2006.232.08:12:02.86#ibcon#read 5, iclass 37, count 0 2006.232.08:12:02.86#ibcon#about to read 6, iclass 37, count 0 2006.232.08:12:02.86#ibcon#read 6, iclass 37, count 0 2006.232.08:12:02.86#ibcon#end of sib2, iclass 37, count 0 2006.232.08:12:02.86#ibcon#*after write, iclass 37, count 0 2006.232.08:12:02.86#ibcon#*before return 0, iclass 37, count 0 2006.232.08:12:02.86#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.232.08:12:02.86#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.232.08:12:02.86#ibcon#about to clear, iclass 37 cls_cnt 0 2006.232.08:12:02.86#ibcon#cleared, iclass 37 cls_cnt 0 2006.232.08:12:02.86$4f8m12a/ifd4f 2006.232.08:12:02.86$ifd4f/lo= 2006.232.08:12:02.86$ifd4f/lo=lo1,7680.00,usb,rcp,1 2006.232.08:12:02.86$ifd4f/lo=lo2,1600.00,usb,rcp,1 2006.232.08:12:02.86$ifd4f/lo=lo3,8080.00,usb,rcp,1 2006.232.08:12:02.86$ifd4f/patch= 2006.232.08:12:02.86$ifd4f/patch=lo1,a1,a2,a3,a4 2006.232.08:12:02.86$ifd4f/patch=lo2,b1,b2,b3,b4,b5,b6 2006.232.08:12:02.86$ifd4f/patch=lo3,a5,a6,a7,a8 2006.232.08:12:02.86$4f8m12a/"form=m,16.000,1:2 2006.232.08:12:02.86$4f8m12a/"tpicd 2006.232.08:12:02.86$4f8m12a/echo=off 2006.232.08:12:02.86$4f8m12a/xlog=off 2006.232.08:12:02.86:!2006.232.08:12:30 2006.232.08:12:13.13#trakl#Source acquired 2006.232.08:12:15.14#flagr#flagr/antenna,acquired 2006.232.08:12:30.02:preob 2006.232.08:12:31.14/onsource/TRACKING 2006.232.08:12:31.14:!2006.232.08:12:40 2006.232.08:12:40.02:data_valid=on 2006.232.08:12:40.02:midob 2006.232.08:12:41.15/onsource/TRACKING 2006.232.08:12:41.15/wx/29.32,1007.4,89 2006.232.08:12:41.38/cable/+6.3879E-03 2006.232.08:12:42.47/va/01,08,usb,yes,31,33 2006.232.08:12:42.47/va/02,07,usb,yes,31,33 2006.232.08:12:42.47/va/03,08,usb,yes,23,24 2006.232.08:12:42.47/va/04,07,usb,yes,32,35 2006.232.08:12:42.47/va/05,07,usb,yes,37,39 2006.232.08:12:42.47/va/06,06,usb,yes,36,36 2006.232.08:12:42.47/va/07,06,usb,yes,37,37 2006.232.08:12:42.47/va/08,06,usb,yes,39,39 2006.232.08:12:42.70/valo/01,532.99,yes,locked 2006.232.08:12:42.70/valo/02,572.99,yes,locked 2006.232.08:12:42.70/valo/03,672.99,yes,locked 2006.232.08:12:42.70/valo/04,832.99,yes,locked 2006.232.08:12:42.70/valo/05,652.99,yes,locked 2006.232.08:12:42.70/valo/06,772.99,yes,locked 2006.232.08:12:42.70/valo/07,832.99,yes,locked 2006.232.08:12:42.70/valo/08,852.99,yes,locked 2006.232.08:12:43.78/vb/01,04,usb,yes,31,30 2006.232.08:12:43.79/vb/02,04,usb,yes,33,34 2006.232.08:12:43.79/vb/03,04,usb,yes,29,33 2006.232.08:12:43.79/vb/04,04,usb,yes,30,30 2006.232.08:12:43.79/vb/05,03,usb,yes,36,40 2006.232.08:12:43.79/vb/06,04,usb,yes,29,32 2006.232.08:12:43.79/vb/07,04,usb,yes,32,32 2006.232.08:12:43.79/vb/08,04,usb,yes,29,33 2006.232.08:12:44.02/vblo/01,632.99,yes,locked 2006.232.08:12:44.02/vblo/02,640.99,yes,locked 2006.232.08:12:44.02/vblo/03,656.99,yes,locked 2006.232.08:12:44.02/vblo/04,712.99,yes,locked 2006.232.08:12:44.02/vblo/05,744.99,yes,locked 2006.232.08:12:44.02/vblo/06,752.99,yes,locked 2006.232.08:12:44.02/vblo/07,734.99,yes,locked 2006.232.08:12:44.02/vblo/08,744.99,yes,locked 2006.232.08:12:44.16/vabw/8 2006.232.08:12:44.31/vbbw/8 2006.232.08:12:44.41/xfe/off,on,13.5 2006.232.08:12:44.79/ifatt/23,28,28,28 2006.232.08:12:45.08/fmout-gps/S +4.49E-07 2006.232.08:12:45.12:!2006.232.08:13:40 2006.232.08:13:40.02:data_valid=off 2006.232.08:13:40.02:postob 2006.232.08:13:40.18/cable/+6.3869E-03 2006.232.08:13:40.22/wx/29.31,1007.4,89 2006.232.08:13:41.07/fmout-gps/S +4.51E-07 2006.232.08:13:41.08:scan_name=232-0814,k06232,60 2006.232.08:13:41.08:source=0059+581,010245.76,582411.1,2000.0,cw 2006.232.08:13:42.15#flagr#flagr/antenna,new-source 2006.232.08:13:42.15:checkk5 2006.232.08:13:42.52/chk_autoobs//k5ts1/ autoobs is running! 2006.232.08:13:42.90/chk_autoobs//k5ts2/ autoobs is running! 2006.232.08:13:43.27/chk_autoobs//k5ts3/ autoobs is running! 2006.232.08:13:43.64/chk_autoobs//k5ts4/ autoobs is running! 2006.232.08:13:44.01/chk_obsdata//k5ts1/T2320812??a.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.08:13:44.38/chk_obsdata//k5ts2/T2320812??b.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.08:13:44.75/chk_obsdata//k5ts3/T2320812??c.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.08:13:45.12/chk_obsdata//k5ts4/T2320812??d.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.08:13:45.81/k5log//k5ts1_log_newline 2006.232.08:13:46.49/k5log//k5ts2_log_newline 2006.232.08:13:47.19/k5log//k5ts3_log_newline 2006.232.08:13:47.87/k5log//k5ts4_log_newline 2006.232.08:13:47.90/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.232.08:13:47.90:4f8m12a=2 2006.232.08:13:47.90$4f8m12a/echo=on 2006.232.08:13:47.90$4f8m12a/pcalon 2006.232.08:13:47.90$pcalon/"no phase cal control is implemented here 2006.232.08:13:47.90$4f8m12a/"tpicd=stop 2006.232.08:13:47.90$4f8m12a/vc4f8 2006.232.08:13:47.90$vc4f8/valo=1,532.99 2006.232.08:13:47.90#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.232.08:13:47.90#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.232.08:13:47.90#ibcon#ireg 17 cls_cnt 0 2006.232.08:13:47.90#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.232.08:13:47.90#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.232.08:13:47.90#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.232.08:13:47.90#ibcon#enter wrdev, iclass 6, count 0 2006.232.08:13:47.90#ibcon#first serial, iclass 6, count 0 2006.232.08:13:47.90#ibcon#enter sib2, iclass 6, count 0 2006.232.08:13:47.90#ibcon#flushed, iclass 6, count 0 2006.232.08:13:47.90#ibcon#about to write, iclass 6, count 0 2006.232.08:13:47.90#ibcon#wrote, iclass 6, count 0 2006.232.08:13:47.90#ibcon#about to read 3, iclass 6, count 0 2006.232.08:13:47.91#ibcon#read 3, iclass 6, count 0 2006.232.08:13:47.91#ibcon#about to read 4, iclass 6, count 0 2006.232.08:13:47.91#ibcon#read 4, iclass 6, count 0 2006.232.08:13:47.91#ibcon#about to read 5, iclass 6, count 0 2006.232.08:13:47.91#ibcon#read 5, iclass 6, count 0 2006.232.08:13:47.91#ibcon#about to read 6, iclass 6, count 0 2006.232.08:13:47.91#ibcon#read 6, iclass 6, count 0 2006.232.08:13:47.91#ibcon#end of sib2, iclass 6, count 0 2006.232.08:13:47.91#ibcon#*mode == 0, iclass 6, count 0 2006.232.08:13:47.91#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.232.08:13:47.91#ibcon#[26=FRQ=01,532.99\r\n] 2006.232.08:13:47.91#ibcon#*before write, iclass 6, count 0 2006.232.08:13:47.91#ibcon#enter sib2, iclass 6, count 0 2006.232.08:13:47.91#ibcon#flushed, iclass 6, count 0 2006.232.08:13:47.91#ibcon#about to write, iclass 6, count 0 2006.232.08:13:47.91#ibcon#wrote, iclass 6, count 0 2006.232.08:13:47.91#ibcon#about to read 3, iclass 6, count 0 2006.232.08:13:47.96#ibcon#read 3, iclass 6, count 0 2006.232.08:13:47.96#ibcon#about to read 4, iclass 6, count 0 2006.232.08:13:47.96#ibcon#read 4, iclass 6, count 0 2006.232.08:13:47.96#ibcon#about to read 5, iclass 6, count 0 2006.232.08:13:47.96#ibcon#read 5, iclass 6, count 0 2006.232.08:13:47.96#ibcon#about to read 6, iclass 6, count 0 2006.232.08:13:47.96#ibcon#read 6, iclass 6, count 0 2006.232.08:13:47.96#ibcon#end of sib2, iclass 6, count 0 2006.232.08:13:47.96#ibcon#*after write, iclass 6, count 0 2006.232.08:13:47.96#ibcon#*before return 0, iclass 6, count 0 2006.232.08:13:47.96#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.232.08:13:47.96#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.232.08:13:47.96#ibcon#about to clear, iclass 6 cls_cnt 0 2006.232.08:13:47.96#ibcon#cleared, iclass 6 cls_cnt 0 2006.232.08:13:47.97$vc4f8/va=1,8 2006.232.08:13:47.97#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.232.08:13:47.97#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.232.08:13:47.97#ibcon#ireg 11 cls_cnt 2 2006.232.08:13:47.97#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.232.08:13:47.97#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.232.08:13:47.97#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.232.08:13:47.97#ibcon#enter wrdev, iclass 10, count 2 2006.232.08:13:47.97#ibcon#first serial, iclass 10, count 2 2006.232.08:13:47.97#ibcon#enter sib2, iclass 10, count 2 2006.232.08:13:47.97#ibcon#flushed, iclass 10, count 2 2006.232.08:13:47.97#ibcon#about to write, iclass 10, count 2 2006.232.08:13:47.97#ibcon#wrote, iclass 10, count 2 2006.232.08:13:47.97#ibcon#about to read 3, iclass 10, count 2 2006.232.08:13:47.98#ibcon#read 3, iclass 10, count 2 2006.232.08:13:47.98#ibcon#about to read 4, iclass 10, count 2 2006.232.08:13:47.98#ibcon#read 4, iclass 10, count 2 2006.232.08:13:47.98#ibcon#about to read 5, iclass 10, count 2 2006.232.08:13:47.98#ibcon#read 5, iclass 10, count 2 2006.232.08:13:47.98#ibcon#about to read 6, iclass 10, count 2 2006.232.08:13:47.98#ibcon#read 6, iclass 10, count 2 2006.232.08:13:47.98#ibcon#end of sib2, iclass 10, count 2 2006.232.08:13:47.98#ibcon#*mode == 0, iclass 10, count 2 2006.232.08:13:47.98#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.232.08:13:47.98#ibcon#[25=AT01-08\r\n] 2006.232.08:13:47.98#ibcon#*before write, iclass 10, count 2 2006.232.08:13:47.98#ibcon#enter sib2, iclass 10, count 2 2006.232.08:13:47.98#ibcon#flushed, iclass 10, count 2 2006.232.08:13:47.98#ibcon#about to write, iclass 10, count 2 2006.232.08:13:47.98#ibcon#wrote, iclass 10, count 2 2006.232.08:13:47.98#ibcon#about to read 3, iclass 10, count 2 2006.232.08:13:48.02#ibcon#read 3, iclass 10, count 2 2006.232.08:13:48.02#ibcon#about to read 4, iclass 10, count 2 2006.232.08:13:48.02#ibcon#read 4, iclass 10, count 2 2006.232.08:13:48.02#ibcon#about to read 5, iclass 10, count 2 2006.232.08:13:48.02#ibcon#read 5, iclass 10, count 2 2006.232.08:13:48.02#ibcon#about to read 6, iclass 10, count 2 2006.232.08:13:48.02#ibcon#read 6, iclass 10, count 2 2006.232.08:13:48.02#ibcon#end of sib2, iclass 10, count 2 2006.232.08:13:48.02#ibcon#*after write, iclass 10, count 2 2006.232.08:13:48.02#ibcon#*before return 0, iclass 10, count 2 2006.232.08:13:48.02#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.232.08:13:48.02#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.232.08:13:48.02#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.232.08:13:48.02#ibcon#ireg 7 cls_cnt 0 2006.232.08:13:48.02#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.232.08:13:48.13#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.232.08:13:48.13#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.232.08:13:48.13#ibcon#enter wrdev, iclass 10, count 0 2006.232.08:13:48.13#ibcon#first serial, iclass 10, count 0 2006.232.08:13:48.13#ibcon#enter sib2, iclass 10, count 0 2006.232.08:13:48.13#ibcon#flushed, iclass 10, count 0 2006.232.08:13:48.13#ibcon#about to write, iclass 10, count 0 2006.232.08:13:48.13#ibcon#wrote, iclass 10, count 0 2006.232.08:13:48.13#ibcon#about to read 3, iclass 10, count 0 2006.232.08:13:48.15#ibcon#read 3, iclass 10, count 0 2006.232.08:13:48.15#ibcon#about to read 4, iclass 10, count 0 2006.232.08:13:48.15#ibcon#read 4, iclass 10, count 0 2006.232.08:13:48.15#ibcon#about to read 5, iclass 10, count 0 2006.232.08:13:48.15#ibcon#read 5, iclass 10, count 0 2006.232.08:13:48.15#ibcon#about to read 6, iclass 10, count 0 2006.232.08:13:48.15#ibcon#read 6, iclass 10, count 0 2006.232.08:13:48.15#ibcon#end of sib2, iclass 10, count 0 2006.232.08:13:48.15#ibcon#*mode == 0, iclass 10, count 0 2006.232.08:13:48.15#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.232.08:13:48.15#ibcon#[25=USB\r\n] 2006.232.08:13:48.15#ibcon#*before write, iclass 10, count 0 2006.232.08:13:48.15#ibcon#enter sib2, iclass 10, count 0 2006.232.08:13:48.15#ibcon#flushed, iclass 10, count 0 2006.232.08:13:48.15#ibcon#about to write, iclass 10, count 0 2006.232.08:13:48.15#ibcon#wrote, iclass 10, count 0 2006.232.08:13:48.15#ibcon#about to read 3, iclass 10, count 0 2006.232.08:13:48.18#ibcon#read 3, iclass 10, count 0 2006.232.08:13:48.18#ibcon#about to read 4, iclass 10, count 0 2006.232.08:13:48.18#ibcon#read 4, iclass 10, count 0 2006.232.08:13:48.18#ibcon#about to read 5, iclass 10, count 0 2006.232.08:13:48.18#ibcon#read 5, iclass 10, count 0 2006.232.08:13:48.18#ibcon#about to read 6, iclass 10, count 0 2006.232.08:13:48.18#ibcon#read 6, iclass 10, count 0 2006.232.08:13:48.18#ibcon#end of sib2, iclass 10, count 0 2006.232.08:13:48.18#ibcon#*after write, iclass 10, count 0 2006.232.08:13:48.18#ibcon#*before return 0, iclass 10, count 0 2006.232.08:13:48.18#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.232.08:13:48.18#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.232.08:13:48.18#ibcon#about to clear, iclass 10 cls_cnt 0 2006.232.08:13:48.18#ibcon#cleared, iclass 10 cls_cnt 0 2006.232.08:13:48.19$vc4f8/valo=2,572.99 2006.232.08:13:48.19#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.232.08:13:48.19#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.232.08:13:48.19#ibcon#ireg 17 cls_cnt 0 2006.232.08:13:48.19#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.232.08:13:48.19#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.232.08:13:48.19#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.232.08:13:48.19#ibcon#enter wrdev, iclass 12, count 0 2006.232.08:13:48.19#ibcon#first serial, iclass 12, count 0 2006.232.08:13:48.19#ibcon#enter sib2, iclass 12, count 0 2006.232.08:13:48.19#ibcon#flushed, iclass 12, count 0 2006.232.08:13:48.19#ibcon#about to write, iclass 12, count 0 2006.232.08:13:48.19#ibcon#wrote, iclass 12, count 0 2006.232.08:13:48.19#ibcon#about to read 3, iclass 12, count 0 2006.232.08:13:48.21#ibcon#read 3, iclass 12, count 0 2006.232.08:13:48.21#ibcon#about to read 4, iclass 12, count 0 2006.232.08:13:48.21#ibcon#read 4, iclass 12, count 0 2006.232.08:13:48.21#ibcon#about to read 5, iclass 12, count 0 2006.232.08:13:48.21#ibcon#read 5, iclass 12, count 0 2006.232.08:13:48.21#ibcon#about to read 6, iclass 12, count 0 2006.232.08:13:48.21#ibcon#read 6, iclass 12, count 0 2006.232.08:13:48.21#ibcon#end of sib2, iclass 12, count 0 2006.232.08:13:48.21#ibcon#*mode == 0, iclass 12, count 0 2006.232.08:13:48.21#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.232.08:13:48.21#ibcon#[26=FRQ=02,572.99\r\n] 2006.232.08:13:48.21#ibcon#*before write, iclass 12, count 0 2006.232.08:13:48.21#ibcon#enter sib2, iclass 12, count 0 2006.232.08:13:48.21#ibcon#flushed, iclass 12, count 0 2006.232.08:13:48.21#ibcon#about to write, iclass 12, count 0 2006.232.08:13:48.21#ibcon#wrote, iclass 12, count 0 2006.232.08:13:48.21#ibcon#about to read 3, iclass 12, count 0 2006.232.08:13:48.24#ibcon#read 3, iclass 12, count 0 2006.232.08:13:48.24#ibcon#about to read 4, iclass 12, count 0 2006.232.08:13:48.24#ibcon#read 4, iclass 12, count 0 2006.232.08:13:48.24#ibcon#about to read 5, iclass 12, count 0 2006.232.08:13:48.24#ibcon#read 5, iclass 12, count 0 2006.232.08:13:48.24#ibcon#about to read 6, iclass 12, count 0 2006.232.08:13:48.24#ibcon#read 6, iclass 12, count 0 2006.232.08:13:48.24#ibcon#end of sib2, iclass 12, count 0 2006.232.08:13:48.24#ibcon#*after write, iclass 12, count 0 2006.232.08:13:48.24#ibcon#*before return 0, iclass 12, count 0 2006.232.08:13:48.24#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.232.08:13:48.24#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.232.08:13:48.24#ibcon#about to clear, iclass 12 cls_cnt 0 2006.232.08:13:48.24#ibcon#cleared, iclass 12 cls_cnt 0 2006.232.08:13:48.25$vc4f8/va=2,7 2006.232.08:13:48.25#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.232.08:13:48.25#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.232.08:13:48.25#ibcon#ireg 11 cls_cnt 2 2006.232.08:13:48.25#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.232.08:13:48.29#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.232.08:13:48.29#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.232.08:13:48.29#ibcon#enter wrdev, iclass 14, count 2 2006.232.08:13:48.29#ibcon#first serial, iclass 14, count 2 2006.232.08:13:48.29#ibcon#enter sib2, iclass 14, count 2 2006.232.08:13:48.29#ibcon#flushed, iclass 14, count 2 2006.232.08:13:48.29#ibcon#about to write, iclass 14, count 2 2006.232.08:13:48.29#ibcon#wrote, iclass 14, count 2 2006.232.08:13:48.29#ibcon#about to read 3, iclass 14, count 2 2006.232.08:13:48.32#ibcon#read 3, iclass 14, count 2 2006.232.08:13:48.32#ibcon#about to read 4, iclass 14, count 2 2006.232.08:13:48.32#ibcon#read 4, iclass 14, count 2 2006.232.08:13:48.32#ibcon#about to read 5, iclass 14, count 2 2006.232.08:13:48.32#ibcon#read 5, iclass 14, count 2 2006.232.08:13:48.32#ibcon#about to read 6, iclass 14, count 2 2006.232.08:13:48.32#ibcon#read 6, iclass 14, count 2 2006.232.08:13:48.32#ibcon#end of sib2, iclass 14, count 2 2006.232.08:13:48.32#ibcon#*mode == 0, iclass 14, count 2 2006.232.08:13:48.32#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.232.08:13:48.32#ibcon#[25=AT02-07\r\n] 2006.232.08:13:48.32#ibcon#*before write, iclass 14, count 2 2006.232.08:13:48.32#ibcon#enter sib2, iclass 14, count 2 2006.232.08:13:48.32#ibcon#flushed, iclass 14, count 2 2006.232.08:13:48.32#ibcon#about to write, iclass 14, count 2 2006.232.08:13:48.32#ibcon#wrote, iclass 14, count 2 2006.232.08:13:48.32#ibcon#about to read 3, iclass 14, count 2 2006.232.08:13:48.35#ibcon#read 3, iclass 14, count 2 2006.232.08:13:48.35#ibcon#about to read 4, iclass 14, count 2 2006.232.08:13:48.35#ibcon#read 4, iclass 14, count 2 2006.232.08:13:48.35#ibcon#about to read 5, iclass 14, count 2 2006.232.08:13:48.35#ibcon#read 5, iclass 14, count 2 2006.232.08:13:48.35#ibcon#about to read 6, iclass 14, count 2 2006.232.08:13:48.35#ibcon#read 6, iclass 14, count 2 2006.232.08:13:48.35#ibcon#end of sib2, iclass 14, count 2 2006.232.08:13:48.35#ibcon#*after write, iclass 14, count 2 2006.232.08:13:48.35#ibcon#*before return 0, iclass 14, count 2 2006.232.08:13:48.35#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.232.08:13:48.35#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.232.08:13:48.35#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.232.08:13:48.35#ibcon#ireg 7 cls_cnt 0 2006.232.08:13:48.35#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.232.08:13:48.47#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.232.08:13:48.47#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.232.08:13:48.47#ibcon#enter wrdev, iclass 14, count 0 2006.232.08:13:48.47#ibcon#first serial, iclass 14, count 0 2006.232.08:13:48.47#ibcon#enter sib2, iclass 14, count 0 2006.232.08:13:48.47#ibcon#flushed, iclass 14, count 0 2006.232.08:13:48.47#ibcon#about to write, iclass 14, count 0 2006.232.08:13:48.47#ibcon#wrote, iclass 14, count 0 2006.232.08:13:48.47#ibcon#about to read 3, iclass 14, count 0 2006.232.08:13:48.49#ibcon#read 3, iclass 14, count 0 2006.232.08:13:48.49#ibcon#about to read 4, iclass 14, count 0 2006.232.08:13:48.49#ibcon#read 4, iclass 14, count 0 2006.232.08:13:48.49#ibcon#about to read 5, iclass 14, count 0 2006.232.08:13:48.49#ibcon#read 5, iclass 14, count 0 2006.232.08:13:48.49#ibcon#about to read 6, iclass 14, count 0 2006.232.08:13:48.49#ibcon#read 6, iclass 14, count 0 2006.232.08:13:48.49#ibcon#end of sib2, iclass 14, count 0 2006.232.08:13:48.49#ibcon#*mode == 0, iclass 14, count 0 2006.232.08:13:48.49#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.232.08:13:48.49#ibcon#[25=USB\r\n] 2006.232.08:13:48.49#ibcon#*before write, iclass 14, count 0 2006.232.08:13:48.49#ibcon#enter sib2, iclass 14, count 0 2006.232.08:13:48.49#ibcon#flushed, iclass 14, count 0 2006.232.08:13:48.49#ibcon#about to write, iclass 14, count 0 2006.232.08:13:48.49#ibcon#wrote, iclass 14, count 0 2006.232.08:13:48.49#ibcon#about to read 3, iclass 14, count 0 2006.232.08:13:48.52#ibcon#read 3, iclass 14, count 0 2006.232.08:13:48.52#ibcon#about to read 4, iclass 14, count 0 2006.232.08:13:48.52#ibcon#read 4, iclass 14, count 0 2006.232.08:13:48.52#ibcon#about to read 5, iclass 14, count 0 2006.232.08:13:48.52#ibcon#read 5, iclass 14, count 0 2006.232.08:13:48.52#ibcon#about to read 6, iclass 14, count 0 2006.232.08:13:48.52#ibcon#read 6, iclass 14, count 0 2006.232.08:13:48.52#ibcon#end of sib2, iclass 14, count 0 2006.232.08:13:48.52#ibcon#*after write, iclass 14, count 0 2006.232.08:13:48.52#ibcon#*before return 0, iclass 14, count 0 2006.232.08:13:48.52#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.232.08:13:48.52#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.232.08:13:48.52#ibcon#about to clear, iclass 14 cls_cnt 0 2006.232.08:13:48.52#ibcon#cleared, iclass 14 cls_cnt 0 2006.232.08:13:48.53$vc4f8/valo=3,672.99 2006.232.08:13:48.53#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.232.08:13:48.53#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.232.08:13:48.53#ibcon#ireg 17 cls_cnt 0 2006.232.08:13:48.53#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.232.08:13:48.53#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.232.08:13:48.53#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.232.08:13:48.53#ibcon#enter wrdev, iclass 16, count 0 2006.232.08:13:48.53#ibcon#first serial, iclass 16, count 0 2006.232.08:13:48.53#ibcon#enter sib2, iclass 16, count 0 2006.232.08:13:48.53#ibcon#flushed, iclass 16, count 0 2006.232.08:13:48.53#ibcon#about to write, iclass 16, count 0 2006.232.08:13:48.53#ibcon#wrote, iclass 16, count 0 2006.232.08:13:48.53#ibcon#about to read 3, iclass 16, count 0 2006.232.08:13:48.55#ibcon#read 3, iclass 16, count 0 2006.232.08:13:48.55#ibcon#about to read 4, iclass 16, count 0 2006.232.08:13:48.55#ibcon#read 4, iclass 16, count 0 2006.232.08:13:48.55#ibcon#about to read 5, iclass 16, count 0 2006.232.08:13:48.55#ibcon#read 5, iclass 16, count 0 2006.232.08:13:48.55#ibcon#about to read 6, iclass 16, count 0 2006.232.08:13:48.55#ibcon#read 6, iclass 16, count 0 2006.232.08:13:48.55#ibcon#end of sib2, iclass 16, count 0 2006.232.08:13:48.55#ibcon#*mode == 0, iclass 16, count 0 2006.232.08:13:48.55#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.232.08:13:48.55#ibcon#[26=FRQ=03,672.99\r\n] 2006.232.08:13:48.55#ibcon#*before write, iclass 16, count 0 2006.232.08:13:48.55#ibcon#enter sib2, iclass 16, count 0 2006.232.08:13:48.55#ibcon#flushed, iclass 16, count 0 2006.232.08:13:48.55#ibcon#about to write, iclass 16, count 0 2006.232.08:13:48.55#ibcon#wrote, iclass 16, count 0 2006.232.08:13:48.55#ibcon#about to read 3, iclass 16, count 0 2006.232.08:13:48.59#ibcon#read 3, iclass 16, count 0 2006.232.08:13:48.59#ibcon#about to read 4, iclass 16, count 0 2006.232.08:13:48.59#ibcon#read 4, iclass 16, count 0 2006.232.08:13:48.59#ibcon#about to read 5, iclass 16, count 0 2006.232.08:13:48.59#ibcon#read 5, iclass 16, count 0 2006.232.08:13:48.59#ibcon#about to read 6, iclass 16, count 0 2006.232.08:13:48.59#ibcon#read 6, iclass 16, count 0 2006.232.08:13:48.59#ibcon#end of sib2, iclass 16, count 0 2006.232.08:13:48.59#ibcon#*after write, iclass 16, count 0 2006.232.08:13:48.59#ibcon#*before return 0, iclass 16, count 0 2006.232.08:13:48.59#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.232.08:13:48.59#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.232.08:13:48.59#ibcon#about to clear, iclass 16 cls_cnt 0 2006.232.08:13:48.59#ibcon#cleared, iclass 16 cls_cnt 0 2006.232.08:13:48.60$vc4f8/va=3,8 2006.232.08:13:48.60#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.232.08:13:48.60#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.232.08:13:48.60#ibcon#ireg 11 cls_cnt 2 2006.232.08:13:48.60#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.232.08:13:48.63#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.232.08:13:48.63#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.232.08:13:48.63#ibcon#enter wrdev, iclass 18, count 2 2006.232.08:13:48.63#ibcon#first serial, iclass 18, count 2 2006.232.08:13:48.63#ibcon#enter sib2, iclass 18, count 2 2006.232.08:13:48.63#ibcon#flushed, iclass 18, count 2 2006.232.08:13:48.63#ibcon#about to write, iclass 18, count 2 2006.232.08:13:48.63#ibcon#wrote, iclass 18, count 2 2006.232.08:13:48.63#ibcon#about to read 3, iclass 18, count 2 2006.232.08:13:48.66#ibcon#read 3, iclass 18, count 2 2006.232.08:13:48.66#ibcon#about to read 4, iclass 18, count 2 2006.232.08:13:48.66#ibcon#read 4, iclass 18, count 2 2006.232.08:13:48.66#ibcon#about to read 5, iclass 18, count 2 2006.232.08:13:48.66#ibcon#read 5, iclass 18, count 2 2006.232.08:13:48.66#ibcon#about to read 6, iclass 18, count 2 2006.232.08:13:48.66#ibcon#read 6, iclass 18, count 2 2006.232.08:13:48.66#ibcon#end of sib2, iclass 18, count 2 2006.232.08:13:48.66#ibcon#*mode == 0, iclass 18, count 2 2006.232.08:13:48.66#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.232.08:13:48.66#ibcon#[25=AT03-08\r\n] 2006.232.08:13:48.66#ibcon#*before write, iclass 18, count 2 2006.232.08:13:48.66#ibcon#enter sib2, iclass 18, count 2 2006.232.08:13:48.66#ibcon#flushed, iclass 18, count 2 2006.232.08:13:48.66#ibcon#about to write, iclass 18, count 2 2006.232.08:13:48.66#ibcon#wrote, iclass 18, count 2 2006.232.08:13:48.66#ibcon#about to read 3, iclass 18, count 2 2006.232.08:13:48.69#ibcon#read 3, iclass 18, count 2 2006.232.08:13:48.69#ibcon#about to read 4, iclass 18, count 2 2006.232.08:13:48.69#ibcon#read 4, iclass 18, count 2 2006.232.08:13:48.69#ibcon#about to read 5, iclass 18, count 2 2006.232.08:13:48.69#ibcon#read 5, iclass 18, count 2 2006.232.08:13:48.69#ibcon#about to read 6, iclass 18, count 2 2006.232.08:13:48.69#ibcon#read 6, iclass 18, count 2 2006.232.08:13:48.69#ibcon#end of sib2, iclass 18, count 2 2006.232.08:13:48.69#ibcon#*after write, iclass 18, count 2 2006.232.08:13:48.69#ibcon#*before return 0, iclass 18, count 2 2006.232.08:13:48.69#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.232.08:13:48.69#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.232.08:13:48.69#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.232.08:13:48.69#ibcon#ireg 7 cls_cnt 0 2006.232.08:13:48.69#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.232.08:13:48.81#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.232.08:13:48.81#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.232.08:13:48.81#ibcon#enter wrdev, iclass 18, count 0 2006.232.08:13:48.81#ibcon#first serial, iclass 18, count 0 2006.232.08:13:48.81#ibcon#enter sib2, iclass 18, count 0 2006.232.08:13:48.81#ibcon#flushed, iclass 18, count 0 2006.232.08:13:48.81#ibcon#about to write, iclass 18, count 0 2006.232.08:13:48.81#ibcon#wrote, iclass 18, count 0 2006.232.08:13:48.81#ibcon#about to read 3, iclass 18, count 0 2006.232.08:13:48.83#ibcon#read 3, iclass 18, count 0 2006.232.08:13:48.83#ibcon#about to read 4, iclass 18, count 0 2006.232.08:13:48.83#ibcon#read 4, iclass 18, count 0 2006.232.08:13:48.83#ibcon#about to read 5, iclass 18, count 0 2006.232.08:13:48.83#ibcon#read 5, iclass 18, count 0 2006.232.08:13:48.83#ibcon#about to read 6, iclass 18, count 0 2006.232.08:13:48.83#ibcon#read 6, iclass 18, count 0 2006.232.08:13:48.83#ibcon#end of sib2, iclass 18, count 0 2006.232.08:13:48.83#ibcon#*mode == 0, iclass 18, count 0 2006.232.08:13:48.83#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.232.08:13:48.83#ibcon#[25=USB\r\n] 2006.232.08:13:48.83#ibcon#*before write, iclass 18, count 0 2006.232.08:13:48.83#ibcon#enter sib2, iclass 18, count 0 2006.232.08:13:48.83#ibcon#flushed, iclass 18, count 0 2006.232.08:13:48.83#ibcon#about to write, iclass 18, count 0 2006.232.08:13:48.83#ibcon#wrote, iclass 18, count 0 2006.232.08:13:48.83#ibcon#about to read 3, iclass 18, count 0 2006.232.08:13:48.86#ibcon#read 3, iclass 18, count 0 2006.232.08:13:48.86#ibcon#about to read 4, iclass 18, count 0 2006.232.08:13:48.86#ibcon#read 4, iclass 18, count 0 2006.232.08:13:48.86#ibcon#about to read 5, iclass 18, count 0 2006.232.08:13:48.86#ibcon#read 5, iclass 18, count 0 2006.232.08:13:48.86#ibcon#about to read 6, iclass 18, count 0 2006.232.08:13:48.86#ibcon#read 6, iclass 18, count 0 2006.232.08:13:48.86#ibcon#end of sib2, iclass 18, count 0 2006.232.08:13:48.86#ibcon#*after write, iclass 18, count 0 2006.232.08:13:48.86#ibcon#*before return 0, iclass 18, count 0 2006.232.08:13:48.86#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.232.08:13:48.86#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.232.08:13:48.86#ibcon#about to clear, iclass 18 cls_cnt 0 2006.232.08:13:48.86#ibcon#cleared, iclass 18 cls_cnt 0 2006.232.08:13:48.87$vc4f8/valo=4,832.99 2006.232.08:13:48.87#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.232.08:13:48.87#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.232.08:13:48.87#ibcon#ireg 17 cls_cnt 0 2006.232.08:13:48.87#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.232.08:13:48.87#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.232.08:13:48.87#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.232.08:13:48.87#ibcon#enter wrdev, iclass 20, count 0 2006.232.08:13:48.87#ibcon#first serial, iclass 20, count 0 2006.232.08:13:48.87#ibcon#enter sib2, iclass 20, count 0 2006.232.08:13:48.87#ibcon#flushed, iclass 20, count 0 2006.232.08:13:48.87#ibcon#about to write, iclass 20, count 0 2006.232.08:13:48.87#ibcon#wrote, iclass 20, count 0 2006.232.08:13:48.87#ibcon#about to read 3, iclass 20, count 0 2006.232.08:13:48.88#ibcon#read 3, iclass 20, count 0 2006.232.08:13:48.88#ibcon#about to read 4, iclass 20, count 0 2006.232.08:13:48.88#ibcon#read 4, iclass 20, count 0 2006.232.08:13:48.88#ibcon#about to read 5, iclass 20, count 0 2006.232.08:13:48.88#ibcon#read 5, iclass 20, count 0 2006.232.08:13:48.88#ibcon#about to read 6, iclass 20, count 0 2006.232.08:13:48.88#ibcon#read 6, iclass 20, count 0 2006.232.08:13:48.88#ibcon#end of sib2, iclass 20, count 0 2006.232.08:13:48.88#ibcon#*mode == 0, iclass 20, count 0 2006.232.08:13:48.88#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.232.08:13:48.88#ibcon#[26=FRQ=04,832.99\r\n] 2006.232.08:13:48.88#ibcon#*before write, iclass 20, count 0 2006.232.08:13:48.88#ibcon#enter sib2, iclass 20, count 0 2006.232.08:13:48.88#ibcon#flushed, iclass 20, count 0 2006.232.08:13:48.88#ibcon#about to write, iclass 20, count 0 2006.232.08:13:48.88#ibcon#wrote, iclass 20, count 0 2006.232.08:13:48.88#ibcon#about to read 3, iclass 20, count 0 2006.232.08:13:48.92#ibcon#read 3, iclass 20, count 0 2006.232.08:13:48.92#ibcon#about to read 4, iclass 20, count 0 2006.232.08:13:48.92#ibcon#read 4, iclass 20, count 0 2006.232.08:13:48.92#ibcon#about to read 5, iclass 20, count 0 2006.232.08:13:48.92#ibcon#read 5, iclass 20, count 0 2006.232.08:13:48.92#ibcon#about to read 6, iclass 20, count 0 2006.232.08:13:48.92#ibcon#read 6, iclass 20, count 0 2006.232.08:13:48.92#ibcon#end of sib2, iclass 20, count 0 2006.232.08:13:48.92#ibcon#*after write, iclass 20, count 0 2006.232.08:13:48.92#ibcon#*before return 0, iclass 20, count 0 2006.232.08:13:48.92#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.232.08:13:48.92#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.232.08:13:48.92#ibcon#about to clear, iclass 20 cls_cnt 0 2006.232.08:13:48.92#ibcon#cleared, iclass 20 cls_cnt 0 2006.232.08:13:48.93$vc4f8/va=4,7 2006.232.08:13:48.93#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.232.08:13:48.93#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.232.08:13:48.93#ibcon#ireg 11 cls_cnt 2 2006.232.08:13:48.93#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.232.08:13:48.97#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.232.08:13:48.97#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.232.08:13:48.97#ibcon#enter wrdev, iclass 22, count 2 2006.232.08:13:48.97#ibcon#first serial, iclass 22, count 2 2006.232.08:13:48.97#ibcon#enter sib2, iclass 22, count 2 2006.232.08:13:48.97#ibcon#flushed, iclass 22, count 2 2006.232.08:13:48.97#ibcon#about to write, iclass 22, count 2 2006.232.08:13:48.97#ibcon#wrote, iclass 22, count 2 2006.232.08:13:48.97#ibcon#about to read 3, iclass 22, count 2 2006.232.08:13:48.99#ibcon#read 3, iclass 22, count 2 2006.232.08:13:48.99#ibcon#about to read 4, iclass 22, count 2 2006.232.08:13:48.99#ibcon#read 4, iclass 22, count 2 2006.232.08:13:48.99#ibcon#about to read 5, iclass 22, count 2 2006.232.08:13:48.99#ibcon#read 5, iclass 22, count 2 2006.232.08:13:48.99#ibcon#about to read 6, iclass 22, count 2 2006.232.08:13:48.99#ibcon#read 6, iclass 22, count 2 2006.232.08:13:48.99#ibcon#end of sib2, iclass 22, count 2 2006.232.08:13:48.99#ibcon#*mode == 0, iclass 22, count 2 2006.232.08:13:48.99#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.232.08:13:48.99#ibcon#[25=AT04-07\r\n] 2006.232.08:13:48.99#ibcon#*before write, iclass 22, count 2 2006.232.08:13:48.99#ibcon#enter sib2, iclass 22, count 2 2006.232.08:13:48.99#ibcon#flushed, iclass 22, count 2 2006.232.08:13:48.99#ibcon#about to write, iclass 22, count 2 2006.232.08:13:48.99#ibcon#wrote, iclass 22, count 2 2006.232.08:13:48.99#ibcon#about to read 3, iclass 22, count 2 2006.232.08:13:49.02#ibcon#read 3, iclass 22, count 2 2006.232.08:13:49.02#ibcon#about to read 4, iclass 22, count 2 2006.232.08:13:49.02#ibcon#read 4, iclass 22, count 2 2006.232.08:13:49.02#ibcon#about to read 5, iclass 22, count 2 2006.232.08:13:49.02#ibcon#read 5, iclass 22, count 2 2006.232.08:13:49.02#ibcon#about to read 6, iclass 22, count 2 2006.232.08:13:49.02#ibcon#read 6, iclass 22, count 2 2006.232.08:13:49.02#ibcon#end of sib2, iclass 22, count 2 2006.232.08:13:49.02#ibcon#*after write, iclass 22, count 2 2006.232.08:13:49.02#ibcon#*before return 0, iclass 22, count 2 2006.232.08:13:49.02#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.232.08:13:49.02#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.232.08:13:49.02#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.232.08:13:49.02#ibcon#ireg 7 cls_cnt 0 2006.232.08:13:49.02#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.232.08:13:49.14#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.232.08:13:49.14#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.232.08:13:49.14#ibcon#enter wrdev, iclass 22, count 0 2006.232.08:13:49.14#ibcon#first serial, iclass 22, count 0 2006.232.08:13:49.14#ibcon#enter sib2, iclass 22, count 0 2006.232.08:13:49.14#ibcon#flushed, iclass 22, count 0 2006.232.08:13:49.14#ibcon#about to write, iclass 22, count 0 2006.232.08:13:49.15#ibcon#wrote, iclass 22, count 0 2006.232.08:13:49.15#ibcon#about to read 3, iclass 22, count 0 2006.232.08:13:49.16#ibcon#read 3, iclass 22, count 0 2006.232.08:13:49.16#ibcon#about to read 4, iclass 22, count 0 2006.232.08:13:49.16#ibcon#read 4, iclass 22, count 0 2006.232.08:13:49.16#ibcon#about to read 5, iclass 22, count 0 2006.232.08:13:49.16#ibcon#read 5, iclass 22, count 0 2006.232.08:13:49.16#ibcon#about to read 6, iclass 22, count 0 2006.232.08:13:49.16#ibcon#read 6, iclass 22, count 0 2006.232.08:13:49.16#ibcon#end of sib2, iclass 22, count 0 2006.232.08:13:49.16#ibcon#*mode == 0, iclass 22, count 0 2006.232.08:13:49.16#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.232.08:13:49.16#ibcon#[25=USB\r\n] 2006.232.08:13:49.16#ibcon#*before write, iclass 22, count 0 2006.232.08:13:49.16#ibcon#enter sib2, iclass 22, count 0 2006.232.08:13:49.16#ibcon#flushed, iclass 22, count 0 2006.232.08:13:49.16#ibcon#about to write, iclass 22, count 0 2006.232.08:13:49.16#ibcon#wrote, iclass 22, count 0 2006.232.08:13:49.16#ibcon#about to read 3, iclass 22, count 0 2006.232.08:13:49.19#ibcon#read 3, iclass 22, count 0 2006.232.08:13:49.19#ibcon#about to read 4, iclass 22, count 0 2006.232.08:13:49.19#ibcon#read 4, iclass 22, count 0 2006.232.08:13:49.19#ibcon#about to read 5, iclass 22, count 0 2006.232.08:13:49.19#ibcon#read 5, iclass 22, count 0 2006.232.08:13:49.19#ibcon#about to read 6, iclass 22, count 0 2006.232.08:13:49.19#ibcon#read 6, iclass 22, count 0 2006.232.08:13:49.19#ibcon#end of sib2, iclass 22, count 0 2006.232.08:13:49.19#ibcon#*after write, iclass 22, count 0 2006.232.08:13:49.19#ibcon#*before return 0, iclass 22, count 0 2006.232.08:13:49.19#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.232.08:13:49.19#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.232.08:13:49.19#ibcon#about to clear, iclass 22 cls_cnt 0 2006.232.08:13:49.19#ibcon#cleared, iclass 22 cls_cnt 0 2006.232.08:13:49.20$vc4f8/valo=5,652.99 2006.232.08:13:49.20#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.232.08:13:49.20#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.232.08:13:49.20#ibcon#ireg 17 cls_cnt 0 2006.232.08:13:49.20#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.232.08:13:49.20#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.232.08:13:49.20#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.232.08:13:49.20#ibcon#enter wrdev, iclass 24, count 0 2006.232.08:13:49.20#ibcon#first serial, iclass 24, count 0 2006.232.08:13:49.20#ibcon#enter sib2, iclass 24, count 0 2006.232.08:13:49.20#ibcon#flushed, iclass 24, count 0 2006.232.08:13:49.20#ibcon#about to write, iclass 24, count 0 2006.232.08:13:49.20#ibcon#wrote, iclass 24, count 0 2006.232.08:13:49.20#ibcon#about to read 3, iclass 24, count 0 2006.232.08:13:49.21#ibcon#read 3, iclass 24, count 0 2006.232.08:13:49.21#ibcon#about to read 4, iclass 24, count 0 2006.232.08:13:49.21#ibcon#read 4, iclass 24, count 0 2006.232.08:13:49.21#ibcon#about to read 5, iclass 24, count 0 2006.232.08:13:49.21#ibcon#read 5, iclass 24, count 0 2006.232.08:13:49.21#ibcon#about to read 6, iclass 24, count 0 2006.232.08:13:49.21#ibcon#read 6, iclass 24, count 0 2006.232.08:13:49.21#ibcon#end of sib2, iclass 24, count 0 2006.232.08:13:49.21#ibcon#*mode == 0, iclass 24, count 0 2006.232.08:13:49.21#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.232.08:13:49.21#ibcon#[26=FRQ=05,652.99\r\n] 2006.232.08:13:49.21#ibcon#*before write, iclass 24, count 0 2006.232.08:13:49.21#ibcon#enter sib2, iclass 24, count 0 2006.232.08:13:49.21#ibcon#flushed, iclass 24, count 0 2006.232.08:13:49.21#ibcon#about to write, iclass 24, count 0 2006.232.08:13:49.21#ibcon#wrote, iclass 24, count 0 2006.232.08:13:49.21#ibcon#about to read 3, iclass 24, count 0 2006.232.08:13:49.25#ibcon#read 3, iclass 24, count 0 2006.232.08:13:49.25#ibcon#about to read 4, iclass 24, count 0 2006.232.08:13:49.25#ibcon#read 4, iclass 24, count 0 2006.232.08:13:49.25#ibcon#about to read 5, iclass 24, count 0 2006.232.08:13:49.25#ibcon#read 5, iclass 24, count 0 2006.232.08:13:49.25#ibcon#about to read 6, iclass 24, count 0 2006.232.08:13:49.25#ibcon#read 6, iclass 24, count 0 2006.232.08:13:49.25#ibcon#end of sib2, iclass 24, count 0 2006.232.08:13:49.25#ibcon#*after write, iclass 24, count 0 2006.232.08:13:49.25#ibcon#*before return 0, iclass 24, count 0 2006.232.08:13:49.25#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.232.08:13:49.25#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.232.08:13:49.25#ibcon#about to clear, iclass 24 cls_cnt 0 2006.232.08:13:49.25#ibcon#cleared, iclass 24 cls_cnt 0 2006.232.08:13:49.26$vc4f8/va=5,7 2006.232.08:13:49.26#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.232.08:13:49.26#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.232.08:13:49.26#ibcon#ireg 11 cls_cnt 2 2006.232.08:13:49.26#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.232.08:13:49.30#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.232.08:13:49.30#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.232.08:13:49.30#ibcon#enter wrdev, iclass 26, count 2 2006.232.08:13:49.30#ibcon#first serial, iclass 26, count 2 2006.232.08:13:49.30#ibcon#enter sib2, iclass 26, count 2 2006.232.08:13:49.30#ibcon#flushed, iclass 26, count 2 2006.232.08:13:49.30#ibcon#about to write, iclass 26, count 2 2006.232.08:13:49.30#ibcon#wrote, iclass 26, count 2 2006.232.08:13:49.30#ibcon#about to read 3, iclass 26, count 2 2006.232.08:13:49.32#ibcon#read 3, iclass 26, count 2 2006.232.08:13:49.32#ibcon#about to read 4, iclass 26, count 2 2006.232.08:13:49.32#ibcon#read 4, iclass 26, count 2 2006.232.08:13:49.32#ibcon#about to read 5, iclass 26, count 2 2006.232.08:13:49.32#ibcon#read 5, iclass 26, count 2 2006.232.08:13:49.32#ibcon#about to read 6, iclass 26, count 2 2006.232.08:13:49.32#ibcon#read 6, iclass 26, count 2 2006.232.08:13:49.32#ibcon#end of sib2, iclass 26, count 2 2006.232.08:13:49.32#ibcon#*mode == 0, iclass 26, count 2 2006.232.08:13:49.32#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.232.08:13:49.32#ibcon#[25=AT05-07\r\n] 2006.232.08:13:49.32#ibcon#*before write, iclass 26, count 2 2006.232.08:13:49.32#ibcon#enter sib2, iclass 26, count 2 2006.232.08:13:49.32#ibcon#flushed, iclass 26, count 2 2006.232.08:13:49.32#ibcon#about to write, iclass 26, count 2 2006.232.08:13:49.32#ibcon#wrote, iclass 26, count 2 2006.232.08:13:49.32#ibcon#about to read 3, iclass 26, count 2 2006.232.08:13:49.35#ibcon#read 3, iclass 26, count 2 2006.232.08:13:49.35#ibcon#about to read 4, iclass 26, count 2 2006.232.08:13:49.35#ibcon#read 4, iclass 26, count 2 2006.232.08:13:49.35#ibcon#about to read 5, iclass 26, count 2 2006.232.08:13:49.35#ibcon#read 5, iclass 26, count 2 2006.232.08:13:49.35#ibcon#about to read 6, iclass 26, count 2 2006.232.08:13:49.35#ibcon#read 6, iclass 26, count 2 2006.232.08:13:49.35#ibcon#end of sib2, iclass 26, count 2 2006.232.08:13:49.35#ibcon#*after write, iclass 26, count 2 2006.232.08:13:49.35#ibcon#*before return 0, iclass 26, count 2 2006.232.08:13:49.35#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.232.08:13:49.35#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.232.08:13:49.35#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.232.08:13:49.35#ibcon#ireg 7 cls_cnt 0 2006.232.08:13:49.35#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.232.08:13:49.48#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.232.08:13:49.48#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.232.08:13:49.48#ibcon#enter wrdev, iclass 26, count 0 2006.232.08:13:49.48#ibcon#first serial, iclass 26, count 0 2006.232.08:13:49.48#ibcon#enter sib2, iclass 26, count 0 2006.232.08:13:49.48#ibcon#flushed, iclass 26, count 0 2006.232.08:13:49.48#ibcon#about to write, iclass 26, count 0 2006.232.08:13:49.48#ibcon#wrote, iclass 26, count 0 2006.232.08:13:49.48#ibcon#about to read 3, iclass 26, count 0 2006.232.08:13:49.50#ibcon#read 3, iclass 26, count 0 2006.232.08:13:49.50#ibcon#about to read 4, iclass 26, count 0 2006.232.08:13:49.50#ibcon#read 4, iclass 26, count 0 2006.232.08:13:49.50#ibcon#about to read 5, iclass 26, count 0 2006.232.08:13:49.50#ibcon#read 5, iclass 26, count 0 2006.232.08:13:49.50#ibcon#about to read 6, iclass 26, count 0 2006.232.08:13:49.50#ibcon#read 6, iclass 26, count 0 2006.232.08:13:49.50#ibcon#end of sib2, iclass 26, count 0 2006.232.08:13:49.50#ibcon#*mode == 0, iclass 26, count 0 2006.232.08:13:49.50#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.232.08:13:49.50#ibcon#[25=USB\r\n] 2006.232.08:13:49.50#ibcon#*before write, iclass 26, count 0 2006.232.08:13:49.50#ibcon#enter sib2, iclass 26, count 0 2006.232.08:13:49.50#ibcon#flushed, iclass 26, count 0 2006.232.08:13:49.50#ibcon#about to write, iclass 26, count 0 2006.232.08:13:49.50#ibcon#wrote, iclass 26, count 0 2006.232.08:13:49.50#ibcon#about to read 3, iclass 26, count 0 2006.232.08:13:49.52#ibcon#read 3, iclass 26, count 0 2006.232.08:13:49.52#ibcon#about to read 4, iclass 26, count 0 2006.232.08:13:49.52#ibcon#read 4, iclass 26, count 0 2006.232.08:13:49.52#ibcon#about to read 5, iclass 26, count 0 2006.232.08:13:49.52#ibcon#read 5, iclass 26, count 0 2006.232.08:13:49.52#ibcon#about to read 6, iclass 26, count 0 2006.232.08:13:49.52#ibcon#read 6, iclass 26, count 0 2006.232.08:13:49.52#ibcon#end of sib2, iclass 26, count 0 2006.232.08:13:49.52#ibcon#*after write, iclass 26, count 0 2006.232.08:13:49.52#ibcon#*before return 0, iclass 26, count 0 2006.232.08:13:49.52#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.232.08:13:49.52#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.232.08:13:49.52#ibcon#about to clear, iclass 26 cls_cnt 0 2006.232.08:13:49.52#ibcon#cleared, iclass 26 cls_cnt 0 2006.232.08:13:49.53$vc4f8/valo=6,772.99 2006.232.08:13:49.53#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.232.08:13:49.53#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.232.08:13:49.53#ibcon#ireg 17 cls_cnt 0 2006.232.08:13:49.53#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.232.08:13:49.53#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.232.08:13:49.53#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.232.08:13:49.53#ibcon#enter wrdev, iclass 28, count 0 2006.232.08:13:49.53#ibcon#first serial, iclass 28, count 0 2006.232.08:13:49.53#ibcon#enter sib2, iclass 28, count 0 2006.232.08:13:49.53#ibcon#flushed, iclass 28, count 0 2006.232.08:13:49.53#ibcon#about to write, iclass 28, count 0 2006.232.08:13:49.53#ibcon#wrote, iclass 28, count 0 2006.232.08:13:49.53#ibcon#about to read 3, iclass 28, count 0 2006.232.08:13:49.54#ibcon#read 3, iclass 28, count 0 2006.232.08:13:49.54#ibcon#about to read 4, iclass 28, count 0 2006.232.08:13:49.54#ibcon#read 4, iclass 28, count 0 2006.232.08:13:49.54#ibcon#about to read 5, iclass 28, count 0 2006.232.08:13:49.54#ibcon#read 5, iclass 28, count 0 2006.232.08:13:49.54#ibcon#about to read 6, iclass 28, count 0 2006.232.08:13:49.54#ibcon#read 6, iclass 28, count 0 2006.232.08:13:49.54#ibcon#end of sib2, iclass 28, count 0 2006.232.08:13:49.54#ibcon#*mode == 0, iclass 28, count 0 2006.232.08:13:49.54#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.232.08:13:49.54#ibcon#[26=FRQ=06,772.99\r\n] 2006.232.08:13:49.54#ibcon#*before write, iclass 28, count 0 2006.232.08:13:49.54#ibcon#enter sib2, iclass 28, count 0 2006.232.08:13:49.54#ibcon#flushed, iclass 28, count 0 2006.232.08:13:49.54#ibcon#about to write, iclass 28, count 0 2006.232.08:13:49.54#ibcon#wrote, iclass 28, count 0 2006.232.08:13:49.54#ibcon#about to read 3, iclass 28, count 0 2006.232.08:13:49.59#ibcon#read 3, iclass 28, count 0 2006.232.08:13:49.59#ibcon#about to read 4, iclass 28, count 0 2006.232.08:13:49.59#ibcon#read 4, iclass 28, count 0 2006.232.08:13:49.59#ibcon#about to read 5, iclass 28, count 0 2006.232.08:13:49.59#ibcon#read 5, iclass 28, count 0 2006.232.08:13:49.59#ibcon#about to read 6, iclass 28, count 0 2006.232.08:13:49.59#ibcon#read 6, iclass 28, count 0 2006.232.08:13:49.59#ibcon#end of sib2, iclass 28, count 0 2006.232.08:13:49.59#ibcon#*after write, iclass 28, count 0 2006.232.08:13:49.59#ibcon#*before return 0, iclass 28, count 0 2006.232.08:13:49.59#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.232.08:13:49.59#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.232.08:13:49.59#ibcon#about to clear, iclass 28 cls_cnt 0 2006.232.08:13:49.59#ibcon#cleared, iclass 28 cls_cnt 0 2006.232.08:13:49.59$vc4f8/va=6,6 2006.232.08:13:49.59#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.232.08:13:49.59#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.232.08:13:49.59#ibcon#ireg 11 cls_cnt 2 2006.232.08:13:49.59#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.232.08:13:49.63#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.232.08:13:49.63#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.232.08:13:49.63#ibcon#enter wrdev, iclass 30, count 2 2006.232.08:13:49.63#ibcon#first serial, iclass 30, count 2 2006.232.08:13:49.63#ibcon#enter sib2, iclass 30, count 2 2006.232.08:13:49.63#ibcon#flushed, iclass 30, count 2 2006.232.08:13:49.63#ibcon#about to write, iclass 30, count 2 2006.232.08:13:49.63#ibcon#wrote, iclass 30, count 2 2006.232.08:13:49.63#ibcon#about to read 3, iclass 30, count 2 2006.232.08:13:49.65#ibcon#read 3, iclass 30, count 2 2006.232.08:13:49.65#ibcon#about to read 4, iclass 30, count 2 2006.232.08:13:49.65#ibcon#read 4, iclass 30, count 2 2006.232.08:13:49.65#ibcon#about to read 5, iclass 30, count 2 2006.232.08:13:49.65#ibcon#read 5, iclass 30, count 2 2006.232.08:13:49.65#ibcon#about to read 6, iclass 30, count 2 2006.232.08:13:49.65#ibcon#read 6, iclass 30, count 2 2006.232.08:13:49.65#ibcon#end of sib2, iclass 30, count 2 2006.232.08:13:49.65#ibcon#*mode == 0, iclass 30, count 2 2006.232.08:13:49.65#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.232.08:13:49.65#ibcon#[25=AT06-06\r\n] 2006.232.08:13:49.65#ibcon#*before write, iclass 30, count 2 2006.232.08:13:49.65#ibcon#enter sib2, iclass 30, count 2 2006.232.08:13:49.65#ibcon#flushed, iclass 30, count 2 2006.232.08:13:49.65#ibcon#about to write, iclass 30, count 2 2006.232.08:13:49.65#ibcon#wrote, iclass 30, count 2 2006.232.08:13:49.65#ibcon#about to read 3, iclass 30, count 2 2006.232.08:13:49.68#ibcon#read 3, iclass 30, count 2 2006.232.08:13:49.68#ibcon#about to read 4, iclass 30, count 2 2006.232.08:13:49.68#ibcon#read 4, iclass 30, count 2 2006.232.08:13:49.68#ibcon#about to read 5, iclass 30, count 2 2006.232.08:13:49.68#ibcon#read 5, iclass 30, count 2 2006.232.08:13:49.68#ibcon#about to read 6, iclass 30, count 2 2006.232.08:13:49.68#ibcon#read 6, iclass 30, count 2 2006.232.08:13:49.68#ibcon#end of sib2, iclass 30, count 2 2006.232.08:13:49.68#ibcon#*after write, iclass 30, count 2 2006.232.08:13:49.68#ibcon#*before return 0, iclass 30, count 2 2006.232.08:13:49.68#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.232.08:13:49.68#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.232.08:13:49.68#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.232.08:13:49.68#ibcon#ireg 7 cls_cnt 0 2006.232.08:13:49.68#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.232.08:13:49.80#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.232.08:13:49.80#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.232.08:13:49.80#ibcon#enter wrdev, iclass 30, count 0 2006.232.08:13:49.80#ibcon#first serial, iclass 30, count 0 2006.232.08:13:49.80#ibcon#enter sib2, iclass 30, count 0 2006.232.08:13:49.80#ibcon#flushed, iclass 30, count 0 2006.232.08:13:49.80#ibcon#about to write, iclass 30, count 0 2006.232.08:13:49.80#ibcon#wrote, iclass 30, count 0 2006.232.08:13:49.80#ibcon#about to read 3, iclass 30, count 0 2006.232.08:13:49.82#ibcon#read 3, iclass 30, count 0 2006.232.08:13:49.82#ibcon#about to read 4, iclass 30, count 0 2006.232.08:13:49.82#ibcon#read 4, iclass 30, count 0 2006.232.08:13:49.82#ibcon#about to read 5, iclass 30, count 0 2006.232.08:13:49.82#ibcon#read 5, iclass 30, count 0 2006.232.08:13:49.82#ibcon#about to read 6, iclass 30, count 0 2006.232.08:13:49.82#ibcon#read 6, iclass 30, count 0 2006.232.08:13:49.82#ibcon#end of sib2, iclass 30, count 0 2006.232.08:13:49.82#ibcon#*mode == 0, iclass 30, count 0 2006.232.08:13:49.82#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.232.08:13:49.82#ibcon#[25=USB\r\n] 2006.232.08:13:49.82#ibcon#*before write, iclass 30, count 0 2006.232.08:13:49.82#ibcon#enter sib2, iclass 30, count 0 2006.232.08:13:49.82#ibcon#flushed, iclass 30, count 0 2006.232.08:13:49.82#ibcon#about to write, iclass 30, count 0 2006.232.08:13:49.82#ibcon#wrote, iclass 30, count 0 2006.232.08:13:49.82#ibcon#about to read 3, iclass 30, count 0 2006.232.08:13:49.85#ibcon#read 3, iclass 30, count 0 2006.232.08:13:49.85#ibcon#about to read 4, iclass 30, count 0 2006.232.08:13:49.85#ibcon#read 4, iclass 30, count 0 2006.232.08:13:49.85#ibcon#about to read 5, iclass 30, count 0 2006.232.08:13:49.85#ibcon#read 5, iclass 30, count 0 2006.232.08:13:49.85#ibcon#about to read 6, iclass 30, count 0 2006.232.08:13:49.85#ibcon#read 6, iclass 30, count 0 2006.232.08:13:49.85#ibcon#end of sib2, iclass 30, count 0 2006.232.08:13:49.85#ibcon#*after write, iclass 30, count 0 2006.232.08:13:49.85#ibcon#*before return 0, iclass 30, count 0 2006.232.08:13:49.85#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.232.08:13:49.85#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.232.08:13:49.85#ibcon#about to clear, iclass 30 cls_cnt 0 2006.232.08:13:49.85#ibcon#cleared, iclass 30 cls_cnt 0 2006.232.08:13:49.86$vc4f8/valo=7,832.99 2006.232.08:13:49.86#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.232.08:13:49.86#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.232.08:13:49.86#ibcon#ireg 17 cls_cnt 0 2006.232.08:13:49.86#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.232.08:13:49.86#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.232.08:13:49.86#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.232.08:13:49.86#ibcon#enter wrdev, iclass 32, count 0 2006.232.08:13:49.86#ibcon#first serial, iclass 32, count 0 2006.232.08:13:49.86#ibcon#enter sib2, iclass 32, count 0 2006.232.08:13:49.86#ibcon#flushed, iclass 32, count 0 2006.232.08:13:49.86#ibcon#about to write, iclass 32, count 0 2006.232.08:13:49.86#ibcon#wrote, iclass 32, count 0 2006.232.08:13:49.86#ibcon#about to read 3, iclass 32, count 0 2006.232.08:13:49.87#ibcon#read 3, iclass 32, count 0 2006.232.08:13:49.87#ibcon#about to read 4, iclass 32, count 0 2006.232.08:13:49.87#ibcon#read 4, iclass 32, count 0 2006.232.08:13:49.87#ibcon#about to read 5, iclass 32, count 0 2006.232.08:13:49.87#ibcon#read 5, iclass 32, count 0 2006.232.08:13:49.87#ibcon#about to read 6, iclass 32, count 0 2006.232.08:13:49.87#ibcon#read 6, iclass 32, count 0 2006.232.08:13:49.87#ibcon#end of sib2, iclass 32, count 0 2006.232.08:13:49.87#ibcon#*mode == 0, iclass 32, count 0 2006.232.08:13:49.87#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.232.08:13:49.87#ibcon#[26=FRQ=07,832.99\r\n] 2006.232.08:13:49.87#ibcon#*before write, iclass 32, count 0 2006.232.08:13:49.87#ibcon#enter sib2, iclass 32, count 0 2006.232.08:13:49.87#ibcon#flushed, iclass 32, count 0 2006.232.08:13:49.87#ibcon#about to write, iclass 32, count 0 2006.232.08:13:49.87#ibcon#wrote, iclass 32, count 0 2006.232.08:13:49.87#ibcon#about to read 3, iclass 32, count 0 2006.232.08:13:49.91#ibcon#read 3, iclass 32, count 0 2006.232.08:13:49.91#ibcon#about to read 4, iclass 32, count 0 2006.232.08:13:49.91#ibcon#read 4, iclass 32, count 0 2006.232.08:13:49.91#ibcon#about to read 5, iclass 32, count 0 2006.232.08:13:49.91#ibcon#read 5, iclass 32, count 0 2006.232.08:13:49.91#ibcon#about to read 6, iclass 32, count 0 2006.232.08:13:49.91#ibcon#read 6, iclass 32, count 0 2006.232.08:13:49.91#ibcon#end of sib2, iclass 32, count 0 2006.232.08:13:49.91#ibcon#*after write, iclass 32, count 0 2006.232.08:13:49.91#ibcon#*before return 0, iclass 32, count 0 2006.232.08:13:49.91#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.232.08:13:49.91#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.232.08:13:49.91#ibcon#about to clear, iclass 32 cls_cnt 0 2006.232.08:13:49.91#ibcon#cleared, iclass 32 cls_cnt 0 2006.232.08:13:49.92$vc4f8/va=7,6 2006.232.08:13:49.92#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.232.08:13:49.92#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.232.08:13:49.92#ibcon#ireg 11 cls_cnt 2 2006.232.08:13:49.92#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.232.08:13:49.96#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.232.08:13:49.96#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.232.08:13:49.96#ibcon#enter wrdev, iclass 34, count 2 2006.232.08:13:49.96#ibcon#first serial, iclass 34, count 2 2006.232.08:13:49.96#ibcon#enter sib2, iclass 34, count 2 2006.232.08:13:49.96#ibcon#flushed, iclass 34, count 2 2006.232.08:13:49.96#ibcon#about to write, iclass 34, count 2 2006.232.08:13:49.96#ibcon#wrote, iclass 34, count 2 2006.232.08:13:49.96#ibcon#about to read 3, iclass 34, count 2 2006.232.08:13:49.98#ibcon#read 3, iclass 34, count 2 2006.232.08:13:49.98#ibcon#about to read 4, iclass 34, count 2 2006.232.08:13:49.98#ibcon#read 4, iclass 34, count 2 2006.232.08:13:49.98#ibcon#about to read 5, iclass 34, count 2 2006.232.08:13:49.98#ibcon#read 5, iclass 34, count 2 2006.232.08:13:49.98#ibcon#about to read 6, iclass 34, count 2 2006.232.08:13:49.98#ibcon#read 6, iclass 34, count 2 2006.232.08:13:49.98#ibcon#end of sib2, iclass 34, count 2 2006.232.08:13:49.98#ibcon#*mode == 0, iclass 34, count 2 2006.232.08:13:49.98#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.232.08:13:49.98#ibcon#[25=AT07-06\r\n] 2006.232.08:13:49.98#ibcon#*before write, iclass 34, count 2 2006.232.08:13:49.98#ibcon#enter sib2, iclass 34, count 2 2006.232.08:13:49.98#ibcon#flushed, iclass 34, count 2 2006.232.08:13:49.98#ibcon#about to write, iclass 34, count 2 2006.232.08:13:49.98#ibcon#wrote, iclass 34, count 2 2006.232.08:13:49.98#ibcon#about to read 3, iclass 34, count 2 2006.232.08:13:50.01#ibcon#read 3, iclass 34, count 2 2006.232.08:13:50.01#ibcon#about to read 4, iclass 34, count 2 2006.232.08:13:50.01#ibcon#read 4, iclass 34, count 2 2006.232.08:13:50.01#ibcon#about to read 5, iclass 34, count 2 2006.232.08:13:50.01#ibcon#read 5, iclass 34, count 2 2006.232.08:13:50.01#ibcon#about to read 6, iclass 34, count 2 2006.232.08:13:50.01#ibcon#read 6, iclass 34, count 2 2006.232.08:13:50.01#ibcon#end of sib2, iclass 34, count 2 2006.232.08:13:50.01#ibcon#*after write, iclass 34, count 2 2006.232.08:13:50.01#ibcon#*before return 0, iclass 34, count 2 2006.232.08:13:50.01#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.232.08:13:50.01#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.232.08:13:50.01#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.232.08:13:50.01#ibcon#ireg 7 cls_cnt 0 2006.232.08:13:50.01#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.232.08:13:50.11#abcon#<5=/04 3.2 5.7 29.31 891007.4\r\n> 2006.232.08:13:50.13#abcon#{5=INTERFACE CLEAR} 2006.232.08:13:50.13#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.232.08:13:50.13#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.232.08:13:50.13#ibcon#enter wrdev, iclass 34, count 0 2006.232.08:13:50.13#ibcon#first serial, iclass 34, count 0 2006.232.08:13:50.13#ibcon#enter sib2, iclass 34, count 0 2006.232.08:13:50.14#ibcon#flushed, iclass 34, count 0 2006.232.08:13:50.14#ibcon#about to write, iclass 34, count 0 2006.232.08:13:50.14#ibcon#wrote, iclass 34, count 0 2006.232.08:13:50.14#ibcon#about to read 3, iclass 34, count 0 2006.232.08:13:50.15#ibcon#read 3, iclass 34, count 0 2006.232.08:13:50.15#ibcon#about to read 4, iclass 34, count 0 2006.232.08:13:50.15#ibcon#read 4, iclass 34, count 0 2006.232.08:13:50.15#ibcon#about to read 5, iclass 34, count 0 2006.232.08:13:50.15#ibcon#read 5, iclass 34, count 0 2006.232.08:13:50.15#ibcon#about to read 6, iclass 34, count 0 2006.232.08:13:50.15#ibcon#read 6, iclass 34, count 0 2006.232.08:13:50.15#ibcon#end of sib2, iclass 34, count 0 2006.232.08:13:50.15#ibcon#*mode == 0, iclass 34, count 0 2006.232.08:13:50.15#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.232.08:13:50.15#ibcon#[25=USB\r\n] 2006.232.08:13:50.15#ibcon#*before write, iclass 34, count 0 2006.232.08:13:50.15#ibcon#enter sib2, iclass 34, count 0 2006.232.08:13:50.15#ibcon#flushed, iclass 34, count 0 2006.232.08:13:50.15#ibcon#about to write, iclass 34, count 0 2006.232.08:13:50.15#ibcon#wrote, iclass 34, count 0 2006.232.08:13:50.15#ibcon#about to read 3, iclass 34, count 0 2006.232.08:13:50.18#ibcon#read 3, iclass 34, count 0 2006.232.08:13:50.18#ibcon#about to read 4, iclass 34, count 0 2006.232.08:13:50.18#ibcon#read 4, iclass 34, count 0 2006.232.08:13:50.18#ibcon#about to read 5, iclass 34, count 0 2006.232.08:13:50.18#ibcon#read 5, iclass 34, count 0 2006.232.08:13:50.18#ibcon#about to read 6, iclass 34, count 0 2006.232.08:13:50.18#ibcon#read 6, iclass 34, count 0 2006.232.08:13:50.18#ibcon#end of sib2, iclass 34, count 0 2006.232.08:13:50.18#ibcon#*after write, iclass 34, count 0 2006.232.08:13:50.18#ibcon#*before return 0, iclass 34, count 0 2006.232.08:13:50.18#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.232.08:13:50.18#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.232.08:13:50.18#ibcon#about to clear, iclass 34 cls_cnt 0 2006.232.08:13:50.18#ibcon#cleared, iclass 34 cls_cnt 0 2006.232.08:13:50.19$vc4f8/valo=8,852.99 2006.232.08:13:50.19#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.232.08:13:50.19#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.232.08:13:50.19#ibcon#ireg 17 cls_cnt 0 2006.232.08:13:50.19#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.232.08:13:50.19#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.232.08:13:50.19#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.232.08:13:50.19#ibcon#enter wrdev, iclass 40, count 0 2006.232.08:13:50.19#ibcon#first serial, iclass 40, count 0 2006.232.08:13:50.19#ibcon#enter sib2, iclass 40, count 0 2006.232.08:13:50.19#ibcon#flushed, iclass 40, count 0 2006.232.08:13:50.19#ibcon#about to write, iclass 40, count 0 2006.232.08:13:50.19#ibcon#wrote, iclass 40, count 0 2006.232.08:13:50.19#ibcon#about to read 3, iclass 40, count 0 2006.232.08:13:50.19#abcon#[5=S1D000X0/0*\r\n] 2006.232.08:13:50.20#ibcon#read 3, iclass 40, count 0 2006.232.08:13:50.20#ibcon#about to read 4, iclass 40, count 0 2006.232.08:13:50.20#ibcon#read 4, iclass 40, count 0 2006.232.08:13:50.20#ibcon#about to read 5, iclass 40, count 0 2006.232.08:13:50.20#ibcon#read 5, iclass 40, count 0 2006.232.08:13:50.20#ibcon#about to read 6, iclass 40, count 0 2006.232.08:13:50.20#ibcon#read 6, iclass 40, count 0 2006.232.08:13:50.20#ibcon#end of sib2, iclass 40, count 0 2006.232.08:13:50.20#ibcon#*mode == 0, iclass 40, count 0 2006.232.08:13:50.20#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.232.08:13:50.20#ibcon#[26=FRQ=08,852.99\r\n] 2006.232.08:13:50.20#ibcon#*before write, iclass 40, count 0 2006.232.08:13:50.20#ibcon#enter sib2, iclass 40, count 0 2006.232.08:13:50.20#ibcon#flushed, iclass 40, count 0 2006.232.08:13:50.20#ibcon#about to write, iclass 40, count 0 2006.232.08:13:50.20#ibcon#wrote, iclass 40, count 0 2006.232.08:13:50.20#ibcon#about to read 3, iclass 40, count 0 2006.232.08:13:50.24#ibcon#read 3, iclass 40, count 0 2006.232.08:13:50.24#ibcon#about to read 4, iclass 40, count 0 2006.232.08:13:50.24#ibcon#read 4, iclass 40, count 0 2006.232.08:13:50.24#ibcon#about to read 5, iclass 40, count 0 2006.232.08:13:50.24#ibcon#read 5, iclass 40, count 0 2006.232.08:13:50.24#ibcon#about to read 6, iclass 40, count 0 2006.232.08:13:50.24#ibcon#read 6, iclass 40, count 0 2006.232.08:13:50.24#ibcon#end of sib2, iclass 40, count 0 2006.232.08:13:50.24#ibcon#*after write, iclass 40, count 0 2006.232.08:13:50.24#ibcon#*before return 0, iclass 40, count 0 2006.232.08:13:50.24#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.232.08:13:50.24#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.232.08:13:50.24#ibcon#about to clear, iclass 40 cls_cnt 0 2006.232.08:13:50.24#ibcon#cleared, iclass 40 cls_cnt 0 2006.232.08:13:50.25$vc4f8/va=8,6 2006.232.08:13:50.25#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.232.08:13:50.25#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.232.08:13:50.25#ibcon#ireg 11 cls_cnt 2 2006.232.08:13:50.25#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.232.08:13:50.29#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.232.08:13:50.29#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.232.08:13:50.29#ibcon#enter wrdev, iclass 4, count 2 2006.232.08:13:50.29#ibcon#first serial, iclass 4, count 2 2006.232.08:13:50.29#ibcon#enter sib2, iclass 4, count 2 2006.232.08:13:50.29#ibcon#flushed, iclass 4, count 2 2006.232.08:13:50.29#ibcon#about to write, iclass 4, count 2 2006.232.08:13:50.29#ibcon#wrote, iclass 4, count 2 2006.232.08:13:50.29#ibcon#about to read 3, iclass 4, count 2 2006.232.08:13:50.31#ibcon#read 3, iclass 4, count 2 2006.232.08:13:50.31#ibcon#about to read 4, iclass 4, count 2 2006.232.08:13:50.31#ibcon#read 4, iclass 4, count 2 2006.232.08:13:50.31#ibcon#about to read 5, iclass 4, count 2 2006.232.08:13:50.31#ibcon#read 5, iclass 4, count 2 2006.232.08:13:50.31#ibcon#about to read 6, iclass 4, count 2 2006.232.08:13:50.31#ibcon#read 6, iclass 4, count 2 2006.232.08:13:50.31#ibcon#end of sib2, iclass 4, count 2 2006.232.08:13:50.31#ibcon#*mode == 0, iclass 4, count 2 2006.232.08:13:50.31#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.232.08:13:50.31#ibcon#[25=AT08-06\r\n] 2006.232.08:13:50.31#ibcon#*before write, iclass 4, count 2 2006.232.08:13:50.31#ibcon#enter sib2, iclass 4, count 2 2006.232.08:13:50.31#ibcon#flushed, iclass 4, count 2 2006.232.08:13:50.31#ibcon#about to write, iclass 4, count 2 2006.232.08:13:50.31#ibcon#wrote, iclass 4, count 2 2006.232.08:13:50.31#ibcon#about to read 3, iclass 4, count 2 2006.232.08:13:50.34#ibcon#read 3, iclass 4, count 2 2006.232.08:13:50.34#ibcon#about to read 4, iclass 4, count 2 2006.232.08:13:50.34#ibcon#read 4, iclass 4, count 2 2006.232.08:13:50.34#ibcon#about to read 5, iclass 4, count 2 2006.232.08:13:50.34#ibcon#read 5, iclass 4, count 2 2006.232.08:13:50.34#ibcon#about to read 6, iclass 4, count 2 2006.232.08:13:50.34#ibcon#read 6, iclass 4, count 2 2006.232.08:13:50.34#ibcon#end of sib2, iclass 4, count 2 2006.232.08:13:50.34#ibcon#*after write, iclass 4, count 2 2006.232.08:13:50.34#ibcon#*before return 0, iclass 4, count 2 2006.232.08:13:50.34#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.232.08:13:50.34#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.232.08:13:50.34#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.232.08:13:50.34#ibcon#ireg 7 cls_cnt 0 2006.232.08:13:50.34#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.232.08:13:50.46#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.232.08:13:50.46#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.232.08:13:50.46#ibcon#enter wrdev, iclass 4, count 0 2006.232.08:13:50.46#ibcon#first serial, iclass 4, count 0 2006.232.08:13:50.46#ibcon#enter sib2, iclass 4, count 0 2006.232.08:13:50.46#ibcon#flushed, iclass 4, count 0 2006.232.08:13:50.46#ibcon#about to write, iclass 4, count 0 2006.232.08:13:50.46#ibcon#wrote, iclass 4, count 0 2006.232.08:13:50.46#ibcon#about to read 3, iclass 4, count 0 2006.232.08:13:50.48#ibcon#read 3, iclass 4, count 0 2006.232.08:13:50.48#ibcon#about to read 4, iclass 4, count 0 2006.232.08:13:50.48#ibcon#read 4, iclass 4, count 0 2006.232.08:13:50.48#ibcon#about to read 5, iclass 4, count 0 2006.232.08:13:50.48#ibcon#read 5, iclass 4, count 0 2006.232.08:13:50.48#ibcon#about to read 6, iclass 4, count 0 2006.232.08:13:50.48#ibcon#read 6, iclass 4, count 0 2006.232.08:13:50.48#ibcon#end of sib2, iclass 4, count 0 2006.232.08:13:50.48#ibcon#*mode == 0, iclass 4, count 0 2006.232.08:13:50.48#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.232.08:13:50.48#ibcon#[25=USB\r\n] 2006.232.08:13:50.48#ibcon#*before write, iclass 4, count 0 2006.232.08:13:50.48#ibcon#enter sib2, iclass 4, count 0 2006.232.08:13:50.48#ibcon#flushed, iclass 4, count 0 2006.232.08:13:50.48#ibcon#about to write, iclass 4, count 0 2006.232.08:13:50.48#ibcon#wrote, iclass 4, count 0 2006.232.08:13:50.48#ibcon#about to read 3, iclass 4, count 0 2006.232.08:13:50.51#ibcon#read 3, iclass 4, count 0 2006.232.08:13:50.51#ibcon#about to read 4, iclass 4, count 0 2006.232.08:13:50.51#ibcon#read 4, iclass 4, count 0 2006.232.08:13:50.51#ibcon#about to read 5, iclass 4, count 0 2006.232.08:13:50.51#ibcon#read 5, iclass 4, count 0 2006.232.08:13:50.51#ibcon#about to read 6, iclass 4, count 0 2006.232.08:13:50.51#ibcon#read 6, iclass 4, count 0 2006.232.08:13:50.51#ibcon#end of sib2, iclass 4, count 0 2006.232.08:13:50.51#ibcon#*after write, iclass 4, count 0 2006.232.08:13:50.51#ibcon#*before return 0, iclass 4, count 0 2006.232.08:13:50.51#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.232.08:13:50.51#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.232.08:13:50.51#ibcon#about to clear, iclass 4 cls_cnt 0 2006.232.08:13:50.51#ibcon#cleared, iclass 4 cls_cnt 0 2006.232.08:13:50.52$vc4f8/vblo=1,632.99 2006.232.08:13:50.52#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.232.08:13:50.52#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.232.08:13:50.52#ibcon#ireg 17 cls_cnt 0 2006.232.08:13:50.52#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.232.08:13:50.52#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.232.08:13:50.52#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.232.08:13:50.52#ibcon#enter wrdev, iclass 6, count 0 2006.232.08:13:50.52#ibcon#first serial, iclass 6, count 0 2006.232.08:13:50.52#ibcon#enter sib2, iclass 6, count 0 2006.232.08:13:50.52#ibcon#flushed, iclass 6, count 0 2006.232.08:13:50.52#ibcon#about to write, iclass 6, count 0 2006.232.08:13:50.52#ibcon#wrote, iclass 6, count 0 2006.232.08:13:50.52#ibcon#about to read 3, iclass 6, count 0 2006.232.08:13:50.53#ibcon#read 3, iclass 6, count 0 2006.232.08:13:50.53#ibcon#about to read 4, iclass 6, count 0 2006.232.08:13:50.53#ibcon#read 4, iclass 6, count 0 2006.232.08:13:50.53#ibcon#about to read 5, iclass 6, count 0 2006.232.08:13:50.53#ibcon#read 5, iclass 6, count 0 2006.232.08:13:50.53#ibcon#about to read 6, iclass 6, count 0 2006.232.08:13:50.53#ibcon#read 6, iclass 6, count 0 2006.232.08:13:50.53#ibcon#end of sib2, iclass 6, count 0 2006.232.08:13:50.53#ibcon#*mode == 0, iclass 6, count 0 2006.232.08:13:50.53#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.232.08:13:50.53#ibcon#[28=FRQ=01,632.99\r\n] 2006.232.08:13:50.53#ibcon#*before write, iclass 6, count 0 2006.232.08:13:50.53#ibcon#enter sib2, iclass 6, count 0 2006.232.08:13:50.53#ibcon#flushed, iclass 6, count 0 2006.232.08:13:50.53#ibcon#about to write, iclass 6, count 0 2006.232.08:13:50.53#ibcon#wrote, iclass 6, count 0 2006.232.08:13:50.53#ibcon#about to read 3, iclass 6, count 0 2006.232.08:13:50.57#ibcon#read 3, iclass 6, count 0 2006.232.08:13:50.57#ibcon#about to read 4, iclass 6, count 0 2006.232.08:13:50.57#ibcon#read 4, iclass 6, count 0 2006.232.08:13:50.57#ibcon#about to read 5, iclass 6, count 0 2006.232.08:13:50.57#ibcon#read 5, iclass 6, count 0 2006.232.08:13:50.57#ibcon#about to read 6, iclass 6, count 0 2006.232.08:13:50.57#ibcon#read 6, iclass 6, count 0 2006.232.08:13:50.57#ibcon#end of sib2, iclass 6, count 0 2006.232.08:13:50.57#ibcon#*after write, iclass 6, count 0 2006.232.08:13:50.57#ibcon#*before return 0, iclass 6, count 0 2006.232.08:13:50.57#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.232.08:13:50.57#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.232.08:13:50.57#ibcon#about to clear, iclass 6 cls_cnt 0 2006.232.08:13:50.57#ibcon#cleared, iclass 6 cls_cnt 0 2006.232.08:13:50.58$vc4f8/vb=1,4 2006.232.08:13:50.58#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.232.08:13:50.58#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.232.08:13:50.58#ibcon#ireg 11 cls_cnt 2 2006.232.08:13:50.58#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.232.08:13:50.58#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.232.08:13:50.58#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.232.08:13:50.58#ibcon#enter wrdev, iclass 10, count 2 2006.232.08:13:50.58#ibcon#first serial, iclass 10, count 2 2006.232.08:13:50.58#ibcon#enter sib2, iclass 10, count 2 2006.232.08:13:50.58#ibcon#flushed, iclass 10, count 2 2006.232.08:13:50.58#ibcon#about to write, iclass 10, count 2 2006.232.08:13:50.58#ibcon#wrote, iclass 10, count 2 2006.232.08:13:50.58#ibcon#about to read 3, iclass 10, count 2 2006.232.08:13:50.59#ibcon#read 3, iclass 10, count 2 2006.232.08:13:50.59#ibcon#about to read 4, iclass 10, count 2 2006.232.08:13:50.59#ibcon#read 4, iclass 10, count 2 2006.232.08:13:50.59#ibcon#about to read 5, iclass 10, count 2 2006.232.08:13:50.59#ibcon#read 5, iclass 10, count 2 2006.232.08:13:50.59#ibcon#about to read 6, iclass 10, count 2 2006.232.08:13:50.59#ibcon#read 6, iclass 10, count 2 2006.232.08:13:50.59#ibcon#end of sib2, iclass 10, count 2 2006.232.08:13:50.59#ibcon#*mode == 0, iclass 10, count 2 2006.232.08:13:50.59#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.232.08:13:50.59#ibcon#[27=AT01-04\r\n] 2006.232.08:13:50.59#ibcon#*before write, iclass 10, count 2 2006.232.08:13:50.59#ibcon#enter sib2, iclass 10, count 2 2006.232.08:13:50.59#ibcon#flushed, iclass 10, count 2 2006.232.08:13:50.59#ibcon#about to write, iclass 10, count 2 2006.232.08:13:50.59#ibcon#wrote, iclass 10, count 2 2006.232.08:13:50.59#ibcon#about to read 3, iclass 10, count 2 2006.232.08:13:50.62#ibcon#read 3, iclass 10, count 2 2006.232.08:13:50.62#ibcon#about to read 4, iclass 10, count 2 2006.232.08:13:50.62#ibcon#read 4, iclass 10, count 2 2006.232.08:13:50.62#ibcon#about to read 5, iclass 10, count 2 2006.232.08:13:50.62#ibcon#read 5, iclass 10, count 2 2006.232.08:13:50.62#ibcon#about to read 6, iclass 10, count 2 2006.232.08:13:50.62#ibcon#read 6, iclass 10, count 2 2006.232.08:13:50.62#ibcon#end of sib2, iclass 10, count 2 2006.232.08:13:50.62#ibcon#*after write, iclass 10, count 2 2006.232.08:13:50.62#ibcon#*before return 0, iclass 10, count 2 2006.232.08:13:50.62#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.232.08:13:50.62#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.232.08:13:50.62#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.232.08:13:50.62#ibcon#ireg 7 cls_cnt 0 2006.232.08:13:50.62#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.232.08:13:50.74#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.232.08:13:50.74#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.232.08:13:50.74#ibcon#enter wrdev, iclass 10, count 0 2006.232.08:13:50.74#ibcon#first serial, iclass 10, count 0 2006.232.08:13:50.74#ibcon#enter sib2, iclass 10, count 0 2006.232.08:13:50.74#ibcon#flushed, iclass 10, count 0 2006.232.08:13:50.74#ibcon#about to write, iclass 10, count 0 2006.232.08:13:50.74#ibcon#wrote, iclass 10, count 0 2006.232.08:13:50.74#ibcon#about to read 3, iclass 10, count 0 2006.232.08:13:50.76#ibcon#read 3, iclass 10, count 0 2006.232.08:13:50.76#ibcon#about to read 4, iclass 10, count 0 2006.232.08:13:50.76#ibcon#read 4, iclass 10, count 0 2006.232.08:13:50.76#ibcon#about to read 5, iclass 10, count 0 2006.232.08:13:50.76#ibcon#read 5, iclass 10, count 0 2006.232.08:13:50.76#ibcon#about to read 6, iclass 10, count 0 2006.232.08:13:50.76#ibcon#read 6, iclass 10, count 0 2006.232.08:13:50.76#ibcon#end of sib2, iclass 10, count 0 2006.232.08:13:50.76#ibcon#*mode == 0, iclass 10, count 0 2006.232.08:13:50.76#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.232.08:13:50.76#ibcon#[27=USB\r\n] 2006.232.08:13:50.76#ibcon#*before write, iclass 10, count 0 2006.232.08:13:50.76#ibcon#enter sib2, iclass 10, count 0 2006.232.08:13:50.76#ibcon#flushed, iclass 10, count 0 2006.232.08:13:50.76#ibcon#about to write, iclass 10, count 0 2006.232.08:13:50.76#ibcon#wrote, iclass 10, count 0 2006.232.08:13:50.76#ibcon#about to read 3, iclass 10, count 0 2006.232.08:13:50.79#ibcon#read 3, iclass 10, count 0 2006.232.08:13:50.79#ibcon#about to read 4, iclass 10, count 0 2006.232.08:13:50.79#ibcon#read 4, iclass 10, count 0 2006.232.08:13:50.79#ibcon#about to read 5, iclass 10, count 0 2006.232.08:13:50.79#ibcon#read 5, iclass 10, count 0 2006.232.08:13:50.79#ibcon#about to read 6, iclass 10, count 0 2006.232.08:13:50.79#ibcon#read 6, iclass 10, count 0 2006.232.08:13:50.79#ibcon#end of sib2, iclass 10, count 0 2006.232.08:13:50.79#ibcon#*after write, iclass 10, count 0 2006.232.08:13:50.79#ibcon#*before return 0, iclass 10, count 0 2006.232.08:13:50.79#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.232.08:13:50.79#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.232.08:13:50.79#ibcon#about to clear, iclass 10 cls_cnt 0 2006.232.08:13:50.79#ibcon#cleared, iclass 10 cls_cnt 0 2006.232.08:13:50.80$vc4f8/vblo=2,640.99 2006.232.08:13:50.80#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.232.08:13:50.80#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.232.08:13:50.80#ibcon#ireg 17 cls_cnt 0 2006.232.08:13:50.80#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.232.08:13:50.80#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.232.08:13:50.80#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.232.08:13:50.80#ibcon#enter wrdev, iclass 12, count 0 2006.232.08:13:50.80#ibcon#first serial, iclass 12, count 0 2006.232.08:13:50.80#ibcon#enter sib2, iclass 12, count 0 2006.232.08:13:50.80#ibcon#flushed, iclass 12, count 0 2006.232.08:13:50.80#ibcon#about to write, iclass 12, count 0 2006.232.08:13:50.80#ibcon#wrote, iclass 12, count 0 2006.232.08:13:50.80#ibcon#about to read 3, iclass 12, count 0 2006.232.08:13:50.81#ibcon#read 3, iclass 12, count 0 2006.232.08:13:50.81#ibcon#about to read 4, iclass 12, count 0 2006.232.08:13:50.81#ibcon#read 4, iclass 12, count 0 2006.232.08:13:50.81#ibcon#about to read 5, iclass 12, count 0 2006.232.08:13:50.81#ibcon#read 5, iclass 12, count 0 2006.232.08:13:50.81#ibcon#about to read 6, iclass 12, count 0 2006.232.08:13:50.81#ibcon#read 6, iclass 12, count 0 2006.232.08:13:50.81#ibcon#end of sib2, iclass 12, count 0 2006.232.08:13:50.81#ibcon#*mode == 0, iclass 12, count 0 2006.232.08:13:50.81#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.232.08:13:50.81#ibcon#[28=FRQ=02,640.99\r\n] 2006.232.08:13:50.81#ibcon#*before write, iclass 12, count 0 2006.232.08:13:50.81#ibcon#enter sib2, iclass 12, count 0 2006.232.08:13:50.81#ibcon#flushed, iclass 12, count 0 2006.232.08:13:50.81#ibcon#about to write, iclass 12, count 0 2006.232.08:13:50.81#ibcon#wrote, iclass 12, count 0 2006.232.08:13:50.81#ibcon#about to read 3, iclass 12, count 0 2006.232.08:13:50.85#ibcon#read 3, iclass 12, count 0 2006.232.08:13:50.85#ibcon#about to read 4, iclass 12, count 0 2006.232.08:13:50.85#ibcon#read 4, iclass 12, count 0 2006.232.08:13:50.85#ibcon#about to read 5, iclass 12, count 0 2006.232.08:13:50.85#ibcon#read 5, iclass 12, count 0 2006.232.08:13:50.85#ibcon#about to read 6, iclass 12, count 0 2006.232.08:13:50.85#ibcon#read 6, iclass 12, count 0 2006.232.08:13:50.85#ibcon#end of sib2, iclass 12, count 0 2006.232.08:13:50.85#ibcon#*after write, iclass 12, count 0 2006.232.08:13:50.85#ibcon#*before return 0, iclass 12, count 0 2006.232.08:13:50.85#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.232.08:13:50.85#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.232.08:13:50.85#ibcon#about to clear, iclass 12 cls_cnt 0 2006.232.08:13:50.85#ibcon#cleared, iclass 12 cls_cnt 0 2006.232.08:13:50.86$vc4f8/vb=2,4 2006.232.08:13:50.86#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.232.08:13:50.86#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.232.08:13:50.86#ibcon#ireg 11 cls_cnt 2 2006.232.08:13:50.86#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.232.08:13:50.90#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.232.08:13:50.90#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.232.08:13:50.90#ibcon#enter wrdev, iclass 14, count 2 2006.232.08:13:50.90#ibcon#first serial, iclass 14, count 2 2006.232.08:13:50.90#ibcon#enter sib2, iclass 14, count 2 2006.232.08:13:50.90#ibcon#flushed, iclass 14, count 2 2006.232.08:13:50.90#ibcon#about to write, iclass 14, count 2 2006.232.08:13:50.90#ibcon#wrote, iclass 14, count 2 2006.232.08:13:50.90#ibcon#about to read 3, iclass 14, count 2 2006.232.08:13:50.92#ibcon#read 3, iclass 14, count 2 2006.232.08:13:50.92#ibcon#about to read 4, iclass 14, count 2 2006.232.08:13:50.92#ibcon#read 4, iclass 14, count 2 2006.232.08:13:50.92#ibcon#about to read 5, iclass 14, count 2 2006.232.08:13:50.92#ibcon#read 5, iclass 14, count 2 2006.232.08:13:50.92#ibcon#about to read 6, iclass 14, count 2 2006.232.08:13:50.92#ibcon#read 6, iclass 14, count 2 2006.232.08:13:50.92#ibcon#end of sib2, iclass 14, count 2 2006.232.08:13:50.92#ibcon#*mode == 0, iclass 14, count 2 2006.232.08:13:50.92#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.232.08:13:50.92#ibcon#[27=AT02-04\r\n] 2006.232.08:13:50.92#ibcon#*before write, iclass 14, count 2 2006.232.08:13:50.92#ibcon#enter sib2, iclass 14, count 2 2006.232.08:13:50.92#ibcon#flushed, iclass 14, count 2 2006.232.08:13:50.92#ibcon#about to write, iclass 14, count 2 2006.232.08:13:50.92#ibcon#wrote, iclass 14, count 2 2006.232.08:13:50.92#ibcon#about to read 3, iclass 14, count 2 2006.232.08:13:50.95#ibcon#read 3, iclass 14, count 2 2006.232.08:13:50.95#ibcon#about to read 4, iclass 14, count 2 2006.232.08:13:50.95#ibcon#read 4, iclass 14, count 2 2006.232.08:13:50.95#ibcon#about to read 5, iclass 14, count 2 2006.232.08:13:50.95#ibcon#read 5, iclass 14, count 2 2006.232.08:13:50.95#ibcon#about to read 6, iclass 14, count 2 2006.232.08:13:50.95#ibcon#read 6, iclass 14, count 2 2006.232.08:13:50.95#ibcon#end of sib2, iclass 14, count 2 2006.232.08:13:50.95#ibcon#*after write, iclass 14, count 2 2006.232.08:13:50.95#ibcon#*before return 0, iclass 14, count 2 2006.232.08:13:50.95#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.232.08:13:50.95#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.232.08:13:50.95#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.232.08:13:50.95#ibcon#ireg 7 cls_cnt 0 2006.232.08:13:50.95#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.232.08:13:51.07#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.232.08:13:51.07#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.232.08:13:51.07#ibcon#enter wrdev, iclass 14, count 0 2006.232.08:13:51.07#ibcon#first serial, iclass 14, count 0 2006.232.08:13:51.07#ibcon#enter sib2, iclass 14, count 0 2006.232.08:13:51.07#ibcon#flushed, iclass 14, count 0 2006.232.08:13:51.07#ibcon#about to write, iclass 14, count 0 2006.232.08:13:51.07#ibcon#wrote, iclass 14, count 0 2006.232.08:13:51.07#ibcon#about to read 3, iclass 14, count 0 2006.232.08:13:51.09#ibcon#read 3, iclass 14, count 0 2006.232.08:13:51.09#ibcon#about to read 4, iclass 14, count 0 2006.232.08:13:51.09#ibcon#read 4, iclass 14, count 0 2006.232.08:13:51.09#ibcon#about to read 5, iclass 14, count 0 2006.232.08:13:51.09#ibcon#read 5, iclass 14, count 0 2006.232.08:13:51.09#ibcon#about to read 6, iclass 14, count 0 2006.232.08:13:51.09#ibcon#read 6, iclass 14, count 0 2006.232.08:13:51.09#ibcon#end of sib2, iclass 14, count 0 2006.232.08:13:51.09#ibcon#*mode == 0, iclass 14, count 0 2006.232.08:13:51.09#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.232.08:13:51.09#ibcon#[27=USB\r\n] 2006.232.08:13:51.09#ibcon#*before write, iclass 14, count 0 2006.232.08:13:51.09#ibcon#enter sib2, iclass 14, count 0 2006.232.08:13:51.09#ibcon#flushed, iclass 14, count 0 2006.232.08:13:51.09#ibcon#about to write, iclass 14, count 0 2006.232.08:13:51.09#ibcon#wrote, iclass 14, count 0 2006.232.08:13:51.09#ibcon#about to read 3, iclass 14, count 0 2006.232.08:13:51.13#ibcon#read 3, iclass 14, count 0 2006.232.08:13:51.13#ibcon#about to read 4, iclass 14, count 0 2006.232.08:13:51.13#ibcon#read 4, iclass 14, count 0 2006.232.08:13:51.13#ibcon#about to read 5, iclass 14, count 0 2006.232.08:13:51.13#ibcon#read 5, iclass 14, count 0 2006.232.08:13:51.13#ibcon#about to read 6, iclass 14, count 0 2006.232.08:13:51.13#ibcon#read 6, iclass 14, count 0 2006.232.08:13:51.13#ibcon#end of sib2, iclass 14, count 0 2006.232.08:13:51.13#ibcon#*after write, iclass 14, count 0 2006.232.08:13:51.13#ibcon#*before return 0, iclass 14, count 0 2006.232.08:13:51.13#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.232.08:13:51.13#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.232.08:13:51.13#ibcon#about to clear, iclass 14 cls_cnt 0 2006.232.08:13:51.13#ibcon#cleared, iclass 14 cls_cnt 0 2006.232.08:13:51.13$vc4f8/vblo=3,656.99 2006.232.08:13:51.13#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.232.08:13:51.13#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.232.08:13:51.13#ibcon#ireg 17 cls_cnt 0 2006.232.08:13:51.13#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.232.08:13:51.13#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.232.08:13:51.13#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.232.08:13:51.13#ibcon#enter wrdev, iclass 16, count 0 2006.232.08:13:51.13#ibcon#first serial, iclass 16, count 0 2006.232.08:13:51.13#ibcon#enter sib2, iclass 16, count 0 2006.232.08:13:51.13#ibcon#flushed, iclass 16, count 0 2006.232.08:13:51.13#ibcon#about to write, iclass 16, count 0 2006.232.08:13:51.13#ibcon#wrote, iclass 16, count 0 2006.232.08:13:51.13#ibcon#about to read 3, iclass 16, count 0 2006.232.08:13:51.15#ibcon#read 3, iclass 16, count 0 2006.232.08:13:51.15#ibcon#about to read 4, iclass 16, count 0 2006.232.08:13:51.15#ibcon#read 4, iclass 16, count 0 2006.232.08:13:51.15#ibcon#about to read 5, iclass 16, count 0 2006.232.08:13:51.15#ibcon#read 5, iclass 16, count 0 2006.232.08:13:51.15#ibcon#about to read 6, iclass 16, count 0 2006.232.08:13:51.15#ibcon#read 6, iclass 16, count 0 2006.232.08:13:51.15#ibcon#end of sib2, iclass 16, count 0 2006.232.08:13:51.15#ibcon#*mode == 0, iclass 16, count 0 2006.232.08:13:51.15#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.232.08:13:51.15#ibcon#[28=FRQ=03,656.99\r\n] 2006.232.08:13:51.15#ibcon#*before write, iclass 16, count 0 2006.232.08:13:51.15#ibcon#enter sib2, iclass 16, count 0 2006.232.08:13:51.15#ibcon#flushed, iclass 16, count 0 2006.232.08:13:51.15#ibcon#about to write, iclass 16, count 0 2006.232.08:13:51.15#ibcon#wrote, iclass 16, count 0 2006.232.08:13:51.15#ibcon#about to read 3, iclass 16, count 0 2006.232.08:13:51.18#ibcon#read 3, iclass 16, count 0 2006.232.08:13:51.18#ibcon#about to read 4, iclass 16, count 0 2006.232.08:13:51.18#ibcon#read 4, iclass 16, count 0 2006.232.08:13:51.18#ibcon#about to read 5, iclass 16, count 0 2006.232.08:13:51.18#ibcon#read 5, iclass 16, count 0 2006.232.08:13:51.18#ibcon#about to read 6, iclass 16, count 0 2006.232.08:13:51.18#ibcon#read 6, iclass 16, count 0 2006.232.08:13:51.18#ibcon#end of sib2, iclass 16, count 0 2006.232.08:13:51.18#ibcon#*after write, iclass 16, count 0 2006.232.08:13:51.18#ibcon#*before return 0, iclass 16, count 0 2006.232.08:13:51.18#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.232.08:13:51.18#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.232.08:13:51.18#ibcon#about to clear, iclass 16 cls_cnt 0 2006.232.08:13:51.18#ibcon#cleared, iclass 16 cls_cnt 0 2006.232.08:13:51.19$vc4f8/vb=3,4 2006.232.08:13:51.19#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.232.08:13:51.19#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.232.08:13:51.19#ibcon#ireg 11 cls_cnt 2 2006.232.08:13:51.19#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.232.08:13:51.24#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.232.08:13:51.24#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.232.08:13:51.24#ibcon#enter wrdev, iclass 18, count 2 2006.232.08:13:51.24#ibcon#first serial, iclass 18, count 2 2006.232.08:13:51.24#ibcon#enter sib2, iclass 18, count 2 2006.232.08:13:51.24#ibcon#flushed, iclass 18, count 2 2006.232.08:13:51.24#ibcon#about to write, iclass 18, count 2 2006.232.08:13:51.24#ibcon#wrote, iclass 18, count 2 2006.232.08:13:51.24#ibcon#about to read 3, iclass 18, count 2 2006.232.08:13:51.26#ibcon#read 3, iclass 18, count 2 2006.232.08:13:51.26#ibcon#about to read 4, iclass 18, count 2 2006.232.08:13:51.26#ibcon#read 4, iclass 18, count 2 2006.232.08:13:51.26#ibcon#about to read 5, iclass 18, count 2 2006.232.08:13:51.26#ibcon#read 5, iclass 18, count 2 2006.232.08:13:51.26#ibcon#about to read 6, iclass 18, count 2 2006.232.08:13:51.26#ibcon#read 6, iclass 18, count 2 2006.232.08:13:51.26#ibcon#end of sib2, iclass 18, count 2 2006.232.08:13:51.26#ibcon#*mode == 0, iclass 18, count 2 2006.232.08:13:51.26#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.232.08:13:51.26#ibcon#[27=AT03-04\r\n] 2006.232.08:13:51.26#ibcon#*before write, iclass 18, count 2 2006.232.08:13:51.26#ibcon#enter sib2, iclass 18, count 2 2006.232.08:13:51.26#ibcon#flushed, iclass 18, count 2 2006.232.08:13:51.26#ibcon#about to write, iclass 18, count 2 2006.232.08:13:51.26#ibcon#wrote, iclass 18, count 2 2006.232.08:13:51.26#ibcon#about to read 3, iclass 18, count 2 2006.232.08:13:51.29#ibcon#read 3, iclass 18, count 2 2006.232.08:13:51.29#ibcon#about to read 4, iclass 18, count 2 2006.232.08:13:51.29#ibcon#read 4, iclass 18, count 2 2006.232.08:13:51.29#ibcon#about to read 5, iclass 18, count 2 2006.232.08:13:51.29#ibcon#read 5, iclass 18, count 2 2006.232.08:13:51.29#ibcon#about to read 6, iclass 18, count 2 2006.232.08:13:51.29#ibcon#read 6, iclass 18, count 2 2006.232.08:13:51.29#ibcon#end of sib2, iclass 18, count 2 2006.232.08:13:51.29#ibcon#*after write, iclass 18, count 2 2006.232.08:13:51.29#ibcon#*before return 0, iclass 18, count 2 2006.232.08:13:51.29#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.232.08:13:51.29#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.232.08:13:51.29#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.232.08:13:51.29#ibcon#ireg 7 cls_cnt 0 2006.232.08:13:51.29#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.232.08:13:51.41#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.232.08:13:51.41#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.232.08:13:51.41#ibcon#enter wrdev, iclass 18, count 0 2006.232.08:13:51.41#ibcon#first serial, iclass 18, count 0 2006.232.08:13:51.41#ibcon#enter sib2, iclass 18, count 0 2006.232.08:13:51.41#ibcon#flushed, iclass 18, count 0 2006.232.08:13:51.41#ibcon#about to write, iclass 18, count 0 2006.232.08:13:51.41#ibcon#wrote, iclass 18, count 0 2006.232.08:13:51.41#ibcon#about to read 3, iclass 18, count 0 2006.232.08:13:51.43#ibcon#read 3, iclass 18, count 0 2006.232.08:13:51.43#ibcon#about to read 4, iclass 18, count 0 2006.232.08:13:51.43#ibcon#read 4, iclass 18, count 0 2006.232.08:13:51.43#ibcon#about to read 5, iclass 18, count 0 2006.232.08:13:51.43#ibcon#read 5, iclass 18, count 0 2006.232.08:13:51.43#ibcon#about to read 6, iclass 18, count 0 2006.232.08:13:51.43#ibcon#read 6, iclass 18, count 0 2006.232.08:13:51.43#ibcon#end of sib2, iclass 18, count 0 2006.232.08:13:51.43#ibcon#*mode == 0, iclass 18, count 0 2006.232.08:13:51.43#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.232.08:13:51.43#ibcon#[27=USB\r\n] 2006.232.08:13:51.43#ibcon#*before write, iclass 18, count 0 2006.232.08:13:51.43#ibcon#enter sib2, iclass 18, count 0 2006.232.08:13:51.43#ibcon#flushed, iclass 18, count 0 2006.232.08:13:51.43#ibcon#about to write, iclass 18, count 0 2006.232.08:13:51.43#ibcon#wrote, iclass 18, count 0 2006.232.08:13:51.43#ibcon#about to read 3, iclass 18, count 0 2006.232.08:13:51.46#ibcon#read 3, iclass 18, count 0 2006.232.08:13:51.46#ibcon#about to read 4, iclass 18, count 0 2006.232.08:13:51.46#ibcon#read 4, iclass 18, count 0 2006.232.08:13:51.46#ibcon#about to read 5, iclass 18, count 0 2006.232.08:13:51.46#ibcon#read 5, iclass 18, count 0 2006.232.08:13:51.46#ibcon#about to read 6, iclass 18, count 0 2006.232.08:13:51.46#ibcon#read 6, iclass 18, count 0 2006.232.08:13:51.46#ibcon#end of sib2, iclass 18, count 0 2006.232.08:13:51.46#ibcon#*after write, iclass 18, count 0 2006.232.08:13:51.46#ibcon#*before return 0, iclass 18, count 0 2006.232.08:13:51.46#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.232.08:13:51.46#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.232.08:13:51.46#ibcon#about to clear, iclass 18 cls_cnt 0 2006.232.08:13:51.46#ibcon#cleared, iclass 18 cls_cnt 0 2006.232.08:13:51.47$vc4f8/vblo=4,712.99 2006.232.08:13:51.47#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.232.08:13:51.47#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.232.08:13:51.47#ibcon#ireg 17 cls_cnt 0 2006.232.08:13:51.47#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.232.08:13:51.47#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.232.08:13:51.47#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.232.08:13:51.47#ibcon#enter wrdev, iclass 20, count 0 2006.232.08:13:51.47#ibcon#first serial, iclass 20, count 0 2006.232.08:13:51.47#ibcon#enter sib2, iclass 20, count 0 2006.232.08:13:51.47#ibcon#flushed, iclass 20, count 0 2006.232.08:13:51.47#ibcon#about to write, iclass 20, count 0 2006.232.08:13:51.47#ibcon#wrote, iclass 20, count 0 2006.232.08:13:51.47#ibcon#about to read 3, iclass 20, count 0 2006.232.08:13:51.48#ibcon#read 3, iclass 20, count 0 2006.232.08:13:51.48#ibcon#about to read 4, iclass 20, count 0 2006.232.08:13:51.48#ibcon#read 4, iclass 20, count 0 2006.232.08:13:51.48#ibcon#about to read 5, iclass 20, count 0 2006.232.08:13:51.48#ibcon#read 5, iclass 20, count 0 2006.232.08:13:51.48#ibcon#about to read 6, iclass 20, count 0 2006.232.08:13:51.48#ibcon#read 6, iclass 20, count 0 2006.232.08:13:51.48#ibcon#end of sib2, iclass 20, count 0 2006.232.08:13:51.48#ibcon#*mode == 0, iclass 20, count 0 2006.232.08:13:51.48#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.232.08:13:51.48#ibcon#[28=FRQ=04,712.99\r\n] 2006.232.08:13:51.48#ibcon#*before write, iclass 20, count 0 2006.232.08:13:51.48#ibcon#enter sib2, iclass 20, count 0 2006.232.08:13:51.48#ibcon#flushed, iclass 20, count 0 2006.232.08:13:51.48#ibcon#about to write, iclass 20, count 0 2006.232.08:13:51.48#ibcon#wrote, iclass 20, count 0 2006.232.08:13:51.48#ibcon#about to read 3, iclass 20, count 0 2006.232.08:13:51.52#ibcon#read 3, iclass 20, count 0 2006.232.08:13:51.52#ibcon#about to read 4, iclass 20, count 0 2006.232.08:13:51.52#ibcon#read 4, iclass 20, count 0 2006.232.08:13:51.52#ibcon#about to read 5, iclass 20, count 0 2006.232.08:13:51.52#ibcon#read 5, iclass 20, count 0 2006.232.08:13:51.52#ibcon#about to read 6, iclass 20, count 0 2006.232.08:13:51.52#ibcon#read 6, iclass 20, count 0 2006.232.08:13:51.52#ibcon#end of sib2, iclass 20, count 0 2006.232.08:13:51.52#ibcon#*after write, iclass 20, count 0 2006.232.08:13:51.52#ibcon#*before return 0, iclass 20, count 0 2006.232.08:13:51.52#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.232.08:13:51.52#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.232.08:13:51.52#ibcon#about to clear, iclass 20 cls_cnt 0 2006.232.08:13:51.52#ibcon#cleared, iclass 20 cls_cnt 0 2006.232.08:13:51.53$vc4f8/vb=4,4 2006.232.08:13:51.53#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.232.08:13:51.53#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.232.08:13:51.53#ibcon#ireg 11 cls_cnt 2 2006.232.08:13:51.53#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.232.08:13:51.57#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.232.08:13:51.57#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.232.08:13:51.57#ibcon#enter wrdev, iclass 22, count 2 2006.232.08:13:51.57#ibcon#first serial, iclass 22, count 2 2006.232.08:13:51.57#ibcon#enter sib2, iclass 22, count 2 2006.232.08:13:51.57#ibcon#flushed, iclass 22, count 2 2006.232.08:13:51.57#ibcon#about to write, iclass 22, count 2 2006.232.08:13:51.57#ibcon#wrote, iclass 22, count 2 2006.232.08:13:51.57#ibcon#about to read 3, iclass 22, count 2 2006.232.08:13:51.59#ibcon#read 3, iclass 22, count 2 2006.232.08:13:51.59#ibcon#about to read 4, iclass 22, count 2 2006.232.08:13:51.59#ibcon#read 4, iclass 22, count 2 2006.232.08:13:51.59#ibcon#about to read 5, iclass 22, count 2 2006.232.08:13:51.59#ibcon#read 5, iclass 22, count 2 2006.232.08:13:51.59#ibcon#about to read 6, iclass 22, count 2 2006.232.08:13:51.59#ibcon#read 6, iclass 22, count 2 2006.232.08:13:51.59#ibcon#end of sib2, iclass 22, count 2 2006.232.08:13:51.59#ibcon#*mode == 0, iclass 22, count 2 2006.232.08:13:51.59#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.232.08:13:51.59#ibcon#[27=AT04-04\r\n] 2006.232.08:13:51.59#ibcon#*before write, iclass 22, count 2 2006.232.08:13:51.59#ibcon#enter sib2, iclass 22, count 2 2006.232.08:13:51.59#ibcon#flushed, iclass 22, count 2 2006.232.08:13:51.59#ibcon#about to write, iclass 22, count 2 2006.232.08:13:51.59#ibcon#wrote, iclass 22, count 2 2006.232.08:13:51.59#ibcon#about to read 3, iclass 22, count 2 2006.232.08:13:51.62#ibcon#read 3, iclass 22, count 2 2006.232.08:13:51.62#ibcon#about to read 4, iclass 22, count 2 2006.232.08:13:51.62#ibcon#read 4, iclass 22, count 2 2006.232.08:13:51.62#ibcon#about to read 5, iclass 22, count 2 2006.232.08:13:51.62#ibcon#read 5, iclass 22, count 2 2006.232.08:13:51.62#ibcon#about to read 6, iclass 22, count 2 2006.232.08:13:51.62#ibcon#read 6, iclass 22, count 2 2006.232.08:13:51.62#ibcon#end of sib2, iclass 22, count 2 2006.232.08:13:51.62#ibcon#*after write, iclass 22, count 2 2006.232.08:13:51.62#ibcon#*before return 0, iclass 22, count 2 2006.232.08:13:51.62#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.232.08:13:51.62#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.232.08:13:51.62#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.232.08:13:51.62#ibcon#ireg 7 cls_cnt 0 2006.232.08:13:51.62#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.232.08:13:51.74#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.232.08:13:51.74#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.232.08:13:51.74#ibcon#enter wrdev, iclass 22, count 0 2006.232.08:13:51.74#ibcon#first serial, iclass 22, count 0 2006.232.08:13:51.74#ibcon#enter sib2, iclass 22, count 0 2006.232.08:13:51.74#ibcon#flushed, iclass 22, count 0 2006.232.08:13:51.74#ibcon#about to write, iclass 22, count 0 2006.232.08:13:51.74#ibcon#wrote, iclass 22, count 0 2006.232.08:13:51.74#ibcon#about to read 3, iclass 22, count 0 2006.232.08:13:51.76#ibcon#read 3, iclass 22, count 0 2006.232.08:13:51.76#ibcon#about to read 4, iclass 22, count 0 2006.232.08:13:51.76#ibcon#read 4, iclass 22, count 0 2006.232.08:13:51.76#ibcon#about to read 5, iclass 22, count 0 2006.232.08:13:51.76#ibcon#read 5, iclass 22, count 0 2006.232.08:13:51.76#ibcon#about to read 6, iclass 22, count 0 2006.232.08:13:51.76#ibcon#read 6, iclass 22, count 0 2006.232.08:13:51.76#ibcon#end of sib2, iclass 22, count 0 2006.232.08:13:51.76#ibcon#*mode == 0, iclass 22, count 0 2006.232.08:13:51.76#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.232.08:13:51.76#ibcon#[27=USB\r\n] 2006.232.08:13:51.76#ibcon#*before write, iclass 22, count 0 2006.232.08:13:51.76#ibcon#enter sib2, iclass 22, count 0 2006.232.08:13:51.76#ibcon#flushed, iclass 22, count 0 2006.232.08:13:51.76#ibcon#about to write, iclass 22, count 0 2006.232.08:13:51.76#ibcon#wrote, iclass 22, count 0 2006.232.08:13:51.76#ibcon#about to read 3, iclass 22, count 0 2006.232.08:13:51.81#ibcon#read 3, iclass 22, count 0 2006.232.08:13:51.81#ibcon#about to read 4, iclass 22, count 0 2006.232.08:13:51.81#ibcon#read 4, iclass 22, count 0 2006.232.08:13:51.81#ibcon#about to read 5, iclass 22, count 0 2006.232.08:13:51.81#ibcon#read 5, iclass 22, count 0 2006.232.08:13:51.81#ibcon#about to read 6, iclass 22, count 0 2006.232.08:13:51.81#ibcon#read 6, iclass 22, count 0 2006.232.08:13:51.81#ibcon#end of sib2, iclass 22, count 0 2006.232.08:13:51.81#ibcon#*after write, iclass 22, count 0 2006.232.08:13:51.81#ibcon#*before return 0, iclass 22, count 0 2006.232.08:13:51.81#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.232.08:13:51.81#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.232.08:13:51.81#ibcon#about to clear, iclass 22 cls_cnt 0 2006.232.08:13:51.81#ibcon#cleared, iclass 22 cls_cnt 0 2006.232.08:13:51.81$vc4f8/vblo=5,744.99 2006.232.08:13:51.81#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.232.08:13:51.81#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.232.08:13:51.81#ibcon#ireg 17 cls_cnt 0 2006.232.08:13:51.81#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.232.08:13:51.81#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.232.08:13:51.81#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.232.08:13:51.81#ibcon#enter wrdev, iclass 24, count 0 2006.232.08:13:51.81#ibcon#first serial, iclass 24, count 0 2006.232.08:13:51.81#ibcon#enter sib2, iclass 24, count 0 2006.232.08:13:51.81#ibcon#flushed, iclass 24, count 0 2006.232.08:13:51.81#ibcon#about to write, iclass 24, count 0 2006.232.08:13:51.81#ibcon#wrote, iclass 24, count 0 2006.232.08:13:51.81#ibcon#about to read 3, iclass 24, count 0 2006.232.08:13:51.82#ibcon#read 3, iclass 24, count 0 2006.232.08:13:51.82#ibcon#about to read 4, iclass 24, count 0 2006.232.08:13:51.82#ibcon#read 4, iclass 24, count 0 2006.232.08:13:51.82#ibcon#about to read 5, iclass 24, count 0 2006.232.08:13:51.82#ibcon#read 5, iclass 24, count 0 2006.232.08:13:51.82#ibcon#about to read 6, iclass 24, count 0 2006.232.08:13:51.82#ibcon#read 6, iclass 24, count 0 2006.232.08:13:51.82#ibcon#end of sib2, iclass 24, count 0 2006.232.08:13:51.82#ibcon#*mode == 0, iclass 24, count 0 2006.232.08:13:51.82#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.232.08:13:51.82#ibcon#[28=FRQ=05,744.99\r\n] 2006.232.08:13:51.82#ibcon#*before write, iclass 24, count 0 2006.232.08:13:51.82#ibcon#enter sib2, iclass 24, count 0 2006.232.08:13:51.82#ibcon#flushed, iclass 24, count 0 2006.232.08:13:51.82#ibcon#about to write, iclass 24, count 0 2006.232.08:13:51.82#ibcon#wrote, iclass 24, count 0 2006.232.08:13:51.82#ibcon#about to read 3, iclass 24, count 0 2006.232.08:13:51.86#ibcon#read 3, iclass 24, count 0 2006.232.08:13:51.86#ibcon#about to read 4, iclass 24, count 0 2006.232.08:13:51.86#ibcon#read 4, iclass 24, count 0 2006.232.08:13:51.86#ibcon#about to read 5, iclass 24, count 0 2006.232.08:13:51.86#ibcon#read 5, iclass 24, count 0 2006.232.08:13:51.86#ibcon#about to read 6, iclass 24, count 0 2006.232.08:13:51.86#ibcon#read 6, iclass 24, count 0 2006.232.08:13:51.86#ibcon#end of sib2, iclass 24, count 0 2006.232.08:13:51.86#ibcon#*after write, iclass 24, count 0 2006.232.08:13:51.86#ibcon#*before return 0, iclass 24, count 0 2006.232.08:13:51.86#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.232.08:13:51.86#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.232.08:13:51.86#ibcon#about to clear, iclass 24 cls_cnt 0 2006.232.08:13:51.86#ibcon#cleared, iclass 24 cls_cnt 0 2006.232.08:13:51.87$vc4f8/vb=5,3 2006.232.08:13:51.87#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.232.08:13:51.87#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.232.08:13:51.87#ibcon#ireg 11 cls_cnt 2 2006.232.08:13:51.87#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.232.08:13:51.92#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.232.08:13:51.92#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.232.08:13:51.92#ibcon#enter wrdev, iclass 26, count 2 2006.232.08:13:51.92#ibcon#first serial, iclass 26, count 2 2006.232.08:13:51.92#ibcon#enter sib2, iclass 26, count 2 2006.232.08:13:51.92#ibcon#flushed, iclass 26, count 2 2006.232.08:13:51.92#ibcon#about to write, iclass 26, count 2 2006.232.08:13:51.92#ibcon#wrote, iclass 26, count 2 2006.232.08:13:51.92#ibcon#about to read 3, iclass 26, count 2 2006.232.08:13:51.94#ibcon#read 3, iclass 26, count 2 2006.232.08:13:51.94#ibcon#about to read 4, iclass 26, count 2 2006.232.08:13:51.94#ibcon#read 4, iclass 26, count 2 2006.232.08:13:51.94#ibcon#about to read 5, iclass 26, count 2 2006.232.08:13:51.94#ibcon#read 5, iclass 26, count 2 2006.232.08:13:51.94#ibcon#about to read 6, iclass 26, count 2 2006.232.08:13:51.94#ibcon#read 6, iclass 26, count 2 2006.232.08:13:51.94#ibcon#end of sib2, iclass 26, count 2 2006.232.08:13:51.94#ibcon#*mode == 0, iclass 26, count 2 2006.232.08:13:51.94#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.232.08:13:51.94#ibcon#[27=AT05-03\r\n] 2006.232.08:13:51.94#ibcon#*before write, iclass 26, count 2 2006.232.08:13:51.94#ibcon#enter sib2, iclass 26, count 2 2006.232.08:13:51.94#ibcon#flushed, iclass 26, count 2 2006.232.08:13:51.94#ibcon#about to write, iclass 26, count 2 2006.232.08:13:51.94#ibcon#wrote, iclass 26, count 2 2006.232.08:13:51.94#ibcon#about to read 3, iclass 26, count 2 2006.232.08:13:51.98#ibcon#read 3, iclass 26, count 2 2006.232.08:13:51.98#ibcon#about to read 4, iclass 26, count 2 2006.232.08:13:51.98#ibcon#read 4, iclass 26, count 2 2006.232.08:13:51.98#ibcon#about to read 5, iclass 26, count 2 2006.232.08:13:51.98#ibcon#read 5, iclass 26, count 2 2006.232.08:13:51.98#ibcon#about to read 6, iclass 26, count 2 2006.232.08:13:51.98#ibcon#read 6, iclass 26, count 2 2006.232.08:13:51.98#ibcon#end of sib2, iclass 26, count 2 2006.232.08:13:51.98#ibcon#*after write, iclass 26, count 2 2006.232.08:13:51.98#ibcon#*before return 0, iclass 26, count 2 2006.232.08:13:51.98#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.232.08:13:51.98#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.232.08:13:51.98#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.232.08:13:51.98#ibcon#ireg 7 cls_cnt 0 2006.232.08:13:51.98#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.232.08:13:52.09#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.232.08:13:52.09#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.232.08:13:52.09#ibcon#enter wrdev, iclass 26, count 0 2006.232.08:13:52.09#ibcon#first serial, iclass 26, count 0 2006.232.08:13:52.09#ibcon#enter sib2, iclass 26, count 0 2006.232.08:13:52.09#ibcon#flushed, iclass 26, count 0 2006.232.08:13:52.09#ibcon#about to write, iclass 26, count 0 2006.232.08:13:52.09#ibcon#wrote, iclass 26, count 0 2006.232.08:13:52.09#ibcon#about to read 3, iclass 26, count 0 2006.232.08:13:52.11#ibcon#read 3, iclass 26, count 0 2006.232.08:13:52.11#ibcon#about to read 4, iclass 26, count 0 2006.232.08:13:52.11#ibcon#read 4, iclass 26, count 0 2006.232.08:13:52.11#ibcon#about to read 5, iclass 26, count 0 2006.232.08:13:52.11#ibcon#read 5, iclass 26, count 0 2006.232.08:13:52.11#ibcon#about to read 6, iclass 26, count 0 2006.232.08:13:52.11#ibcon#read 6, iclass 26, count 0 2006.232.08:13:52.11#ibcon#end of sib2, iclass 26, count 0 2006.232.08:13:52.11#ibcon#*mode == 0, iclass 26, count 0 2006.232.08:13:52.11#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.232.08:13:52.11#ibcon#[27=USB\r\n] 2006.232.08:13:52.11#ibcon#*before write, iclass 26, count 0 2006.232.08:13:52.11#ibcon#enter sib2, iclass 26, count 0 2006.232.08:13:52.11#ibcon#flushed, iclass 26, count 0 2006.232.08:13:52.11#ibcon#about to write, iclass 26, count 0 2006.232.08:13:52.11#ibcon#wrote, iclass 26, count 0 2006.232.08:13:52.11#ibcon#about to read 3, iclass 26, count 0 2006.232.08:13:52.14#ibcon#read 3, iclass 26, count 0 2006.232.08:13:52.14#ibcon#about to read 4, iclass 26, count 0 2006.232.08:13:52.14#ibcon#read 4, iclass 26, count 0 2006.232.08:13:52.14#ibcon#about to read 5, iclass 26, count 0 2006.232.08:13:52.14#ibcon#read 5, iclass 26, count 0 2006.232.08:13:52.14#ibcon#about to read 6, iclass 26, count 0 2006.232.08:13:52.14#ibcon#read 6, iclass 26, count 0 2006.232.08:13:52.14#ibcon#end of sib2, iclass 26, count 0 2006.232.08:13:52.14#ibcon#*after write, iclass 26, count 0 2006.232.08:13:52.14#ibcon#*before return 0, iclass 26, count 0 2006.232.08:13:52.14#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.232.08:13:52.14#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.232.08:13:52.14#ibcon#about to clear, iclass 26 cls_cnt 0 2006.232.08:13:52.14#ibcon#cleared, iclass 26 cls_cnt 0 2006.232.08:13:52.15$vc4f8/vblo=6,752.99 2006.232.08:13:52.15#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.232.08:13:52.15#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.232.08:13:52.15#ibcon#ireg 17 cls_cnt 0 2006.232.08:13:52.15#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.232.08:13:52.15#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.232.08:13:52.15#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.232.08:13:52.15#ibcon#enter wrdev, iclass 28, count 0 2006.232.08:13:52.15#ibcon#first serial, iclass 28, count 0 2006.232.08:13:52.15#ibcon#enter sib2, iclass 28, count 0 2006.232.08:13:52.15#ibcon#flushed, iclass 28, count 0 2006.232.08:13:52.15#ibcon#about to write, iclass 28, count 0 2006.232.08:13:52.15#ibcon#wrote, iclass 28, count 0 2006.232.08:13:52.15#ibcon#about to read 3, iclass 28, count 0 2006.232.08:13:52.16#ibcon#read 3, iclass 28, count 0 2006.232.08:13:52.16#ibcon#about to read 4, iclass 28, count 0 2006.232.08:13:52.16#ibcon#read 4, iclass 28, count 0 2006.232.08:13:52.16#ibcon#about to read 5, iclass 28, count 0 2006.232.08:13:52.16#ibcon#read 5, iclass 28, count 0 2006.232.08:13:52.16#ibcon#about to read 6, iclass 28, count 0 2006.232.08:13:52.16#ibcon#read 6, iclass 28, count 0 2006.232.08:13:52.16#ibcon#end of sib2, iclass 28, count 0 2006.232.08:13:52.16#ibcon#*mode == 0, iclass 28, count 0 2006.232.08:13:52.16#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.232.08:13:52.16#ibcon#[28=FRQ=06,752.99\r\n] 2006.232.08:13:52.16#ibcon#*before write, iclass 28, count 0 2006.232.08:13:52.16#ibcon#enter sib2, iclass 28, count 0 2006.232.08:13:52.16#ibcon#flushed, iclass 28, count 0 2006.232.08:13:52.16#ibcon#about to write, iclass 28, count 0 2006.232.08:13:52.16#ibcon#wrote, iclass 28, count 0 2006.232.08:13:52.16#ibcon#about to read 3, iclass 28, count 0 2006.232.08:13:52.20#ibcon#read 3, iclass 28, count 0 2006.232.08:13:52.20#ibcon#about to read 4, iclass 28, count 0 2006.232.08:13:52.20#ibcon#read 4, iclass 28, count 0 2006.232.08:13:52.20#ibcon#about to read 5, iclass 28, count 0 2006.232.08:13:52.20#ibcon#read 5, iclass 28, count 0 2006.232.08:13:52.20#ibcon#about to read 6, iclass 28, count 0 2006.232.08:13:52.20#ibcon#read 6, iclass 28, count 0 2006.232.08:13:52.20#ibcon#end of sib2, iclass 28, count 0 2006.232.08:13:52.20#ibcon#*after write, iclass 28, count 0 2006.232.08:13:52.20#ibcon#*before return 0, iclass 28, count 0 2006.232.08:13:52.20#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.232.08:13:52.20#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.232.08:13:52.20#ibcon#about to clear, iclass 28 cls_cnt 0 2006.232.08:13:52.20#ibcon#cleared, iclass 28 cls_cnt 0 2006.232.08:13:52.21$vc4f8/vb=6,4 2006.232.08:13:52.21#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.232.08:13:52.21#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.232.08:13:52.21#ibcon#ireg 11 cls_cnt 2 2006.232.08:13:52.21#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.232.08:13:52.25#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.232.08:13:52.25#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.232.08:13:52.25#ibcon#enter wrdev, iclass 30, count 2 2006.232.08:13:52.25#ibcon#first serial, iclass 30, count 2 2006.232.08:13:52.25#ibcon#enter sib2, iclass 30, count 2 2006.232.08:13:52.25#ibcon#flushed, iclass 30, count 2 2006.232.08:13:52.25#ibcon#about to write, iclass 30, count 2 2006.232.08:13:52.25#ibcon#wrote, iclass 30, count 2 2006.232.08:13:52.25#ibcon#about to read 3, iclass 30, count 2 2006.232.08:13:52.27#ibcon#read 3, iclass 30, count 2 2006.232.08:13:52.27#ibcon#about to read 4, iclass 30, count 2 2006.232.08:13:52.27#ibcon#read 4, iclass 30, count 2 2006.232.08:13:52.27#ibcon#about to read 5, iclass 30, count 2 2006.232.08:13:52.27#ibcon#read 5, iclass 30, count 2 2006.232.08:13:52.27#ibcon#about to read 6, iclass 30, count 2 2006.232.08:13:52.27#ibcon#read 6, iclass 30, count 2 2006.232.08:13:52.27#ibcon#end of sib2, iclass 30, count 2 2006.232.08:13:52.27#ibcon#*mode == 0, iclass 30, count 2 2006.232.08:13:52.27#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.232.08:13:52.27#ibcon#[27=AT06-04\r\n] 2006.232.08:13:52.27#ibcon#*before write, iclass 30, count 2 2006.232.08:13:52.27#ibcon#enter sib2, iclass 30, count 2 2006.232.08:13:52.27#ibcon#flushed, iclass 30, count 2 2006.232.08:13:52.27#ibcon#about to write, iclass 30, count 2 2006.232.08:13:52.27#ibcon#wrote, iclass 30, count 2 2006.232.08:13:52.27#ibcon#about to read 3, iclass 30, count 2 2006.232.08:13:52.30#ibcon#read 3, iclass 30, count 2 2006.232.08:13:52.30#ibcon#about to read 4, iclass 30, count 2 2006.232.08:13:52.30#ibcon#read 4, iclass 30, count 2 2006.232.08:13:52.30#ibcon#about to read 5, iclass 30, count 2 2006.232.08:13:52.30#ibcon#read 5, iclass 30, count 2 2006.232.08:13:52.30#ibcon#about to read 6, iclass 30, count 2 2006.232.08:13:52.30#ibcon#read 6, iclass 30, count 2 2006.232.08:13:52.30#ibcon#end of sib2, iclass 30, count 2 2006.232.08:13:52.30#ibcon#*after write, iclass 30, count 2 2006.232.08:13:52.30#ibcon#*before return 0, iclass 30, count 2 2006.232.08:13:52.30#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.232.08:13:52.30#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.232.08:13:52.30#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.232.08:13:52.30#ibcon#ireg 7 cls_cnt 0 2006.232.08:13:52.30#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.232.08:13:52.42#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.232.08:13:52.42#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.232.08:13:52.42#ibcon#enter wrdev, iclass 30, count 0 2006.232.08:13:52.42#ibcon#first serial, iclass 30, count 0 2006.232.08:13:52.42#ibcon#enter sib2, iclass 30, count 0 2006.232.08:13:52.42#ibcon#flushed, iclass 30, count 0 2006.232.08:13:52.42#ibcon#about to write, iclass 30, count 0 2006.232.08:13:52.42#ibcon#wrote, iclass 30, count 0 2006.232.08:13:52.42#ibcon#about to read 3, iclass 30, count 0 2006.232.08:13:52.44#ibcon#read 3, iclass 30, count 0 2006.232.08:13:52.44#ibcon#about to read 4, iclass 30, count 0 2006.232.08:13:52.44#ibcon#read 4, iclass 30, count 0 2006.232.08:13:52.44#ibcon#about to read 5, iclass 30, count 0 2006.232.08:13:52.44#ibcon#read 5, iclass 30, count 0 2006.232.08:13:52.44#ibcon#about to read 6, iclass 30, count 0 2006.232.08:13:52.44#ibcon#read 6, iclass 30, count 0 2006.232.08:13:52.44#ibcon#end of sib2, iclass 30, count 0 2006.232.08:13:52.44#ibcon#*mode == 0, iclass 30, count 0 2006.232.08:13:52.44#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.232.08:13:52.44#ibcon#[27=USB\r\n] 2006.232.08:13:52.44#ibcon#*before write, iclass 30, count 0 2006.232.08:13:52.44#ibcon#enter sib2, iclass 30, count 0 2006.232.08:13:52.44#ibcon#flushed, iclass 30, count 0 2006.232.08:13:52.44#ibcon#about to write, iclass 30, count 0 2006.232.08:13:52.44#ibcon#wrote, iclass 30, count 0 2006.232.08:13:52.44#ibcon#about to read 3, iclass 30, count 0 2006.232.08:13:52.47#ibcon#read 3, iclass 30, count 0 2006.232.08:13:52.47#ibcon#about to read 4, iclass 30, count 0 2006.232.08:13:52.47#ibcon#read 4, iclass 30, count 0 2006.232.08:13:52.47#ibcon#about to read 5, iclass 30, count 0 2006.232.08:13:52.47#ibcon#read 5, iclass 30, count 0 2006.232.08:13:52.47#ibcon#about to read 6, iclass 30, count 0 2006.232.08:13:52.47#ibcon#read 6, iclass 30, count 0 2006.232.08:13:52.47#ibcon#end of sib2, iclass 30, count 0 2006.232.08:13:52.47#ibcon#*after write, iclass 30, count 0 2006.232.08:13:52.47#ibcon#*before return 0, iclass 30, count 0 2006.232.08:13:52.47#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.232.08:13:52.47#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.232.08:13:52.47#ibcon#about to clear, iclass 30 cls_cnt 0 2006.232.08:13:52.47#ibcon#cleared, iclass 30 cls_cnt 0 2006.232.08:13:52.48$vc4f8/vabw=wide 2006.232.08:13:52.48#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.232.08:13:52.48#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.232.08:13:52.48#ibcon#ireg 8 cls_cnt 0 2006.232.08:13:52.48#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.232.08:13:52.48#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.232.08:13:52.48#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.232.08:13:52.48#ibcon#enter wrdev, iclass 32, count 0 2006.232.08:13:52.48#ibcon#first serial, iclass 32, count 0 2006.232.08:13:52.48#ibcon#enter sib2, iclass 32, count 0 2006.232.08:13:52.48#ibcon#flushed, iclass 32, count 0 2006.232.08:13:52.48#ibcon#about to write, iclass 32, count 0 2006.232.08:13:52.48#ibcon#wrote, iclass 32, count 0 2006.232.08:13:52.48#ibcon#about to read 3, iclass 32, count 0 2006.232.08:13:52.49#ibcon#read 3, iclass 32, count 0 2006.232.08:13:52.49#ibcon#about to read 4, iclass 32, count 0 2006.232.08:13:52.49#ibcon#read 4, iclass 32, count 0 2006.232.08:13:52.49#ibcon#about to read 5, iclass 32, count 0 2006.232.08:13:52.49#ibcon#read 5, iclass 32, count 0 2006.232.08:13:52.49#ibcon#about to read 6, iclass 32, count 0 2006.232.08:13:52.49#ibcon#read 6, iclass 32, count 0 2006.232.08:13:52.49#ibcon#end of sib2, iclass 32, count 0 2006.232.08:13:52.49#ibcon#*mode == 0, iclass 32, count 0 2006.232.08:13:52.49#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.232.08:13:52.49#ibcon#[25=BW32\r\n] 2006.232.08:13:52.49#ibcon#*before write, iclass 32, count 0 2006.232.08:13:52.49#ibcon#enter sib2, iclass 32, count 0 2006.232.08:13:52.49#ibcon#flushed, iclass 32, count 0 2006.232.08:13:52.49#ibcon#about to write, iclass 32, count 0 2006.232.08:13:52.49#ibcon#wrote, iclass 32, count 0 2006.232.08:13:52.49#ibcon#about to read 3, iclass 32, count 0 2006.232.08:13:52.52#ibcon#read 3, iclass 32, count 0 2006.232.08:13:52.52#ibcon#about to read 4, iclass 32, count 0 2006.232.08:13:52.52#ibcon#read 4, iclass 32, count 0 2006.232.08:13:52.52#ibcon#about to read 5, iclass 32, count 0 2006.232.08:13:52.52#ibcon#read 5, iclass 32, count 0 2006.232.08:13:52.52#ibcon#about to read 6, iclass 32, count 0 2006.232.08:13:52.52#ibcon#read 6, iclass 32, count 0 2006.232.08:13:52.52#ibcon#end of sib2, iclass 32, count 0 2006.232.08:13:52.52#ibcon#*after write, iclass 32, count 0 2006.232.08:13:52.52#ibcon#*before return 0, iclass 32, count 0 2006.232.08:13:52.52#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.232.08:13:52.52#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.232.08:13:52.52#ibcon#about to clear, iclass 32 cls_cnt 0 2006.232.08:13:52.52#ibcon#cleared, iclass 32 cls_cnt 0 2006.232.08:13:52.53$vc4f8/vbbw=wide 2006.232.08:13:52.53#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.232.08:13:52.53#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.232.08:13:52.53#ibcon#ireg 8 cls_cnt 0 2006.232.08:13:52.53#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.232.08:13:52.58#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.232.08:13:52.58#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.232.08:13:52.58#ibcon#enter wrdev, iclass 34, count 0 2006.232.08:13:52.58#ibcon#first serial, iclass 34, count 0 2006.232.08:13:52.58#ibcon#enter sib2, iclass 34, count 0 2006.232.08:13:52.58#ibcon#flushed, iclass 34, count 0 2006.232.08:13:52.58#ibcon#about to write, iclass 34, count 0 2006.232.08:13:52.58#ibcon#wrote, iclass 34, count 0 2006.232.08:13:52.58#ibcon#about to read 3, iclass 34, count 0 2006.232.08:13:52.60#ibcon#read 3, iclass 34, count 0 2006.232.08:13:52.60#ibcon#about to read 4, iclass 34, count 0 2006.232.08:13:52.60#ibcon#read 4, iclass 34, count 0 2006.232.08:13:52.60#ibcon#about to read 5, iclass 34, count 0 2006.232.08:13:52.60#ibcon#read 5, iclass 34, count 0 2006.232.08:13:52.60#ibcon#about to read 6, iclass 34, count 0 2006.232.08:13:52.60#ibcon#read 6, iclass 34, count 0 2006.232.08:13:52.60#ibcon#end of sib2, iclass 34, count 0 2006.232.08:13:52.60#ibcon#*mode == 0, iclass 34, count 0 2006.232.08:13:52.60#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.232.08:13:52.60#ibcon#[27=BW32\r\n] 2006.232.08:13:52.60#ibcon#*before write, iclass 34, count 0 2006.232.08:13:52.60#ibcon#enter sib2, iclass 34, count 0 2006.232.08:13:52.60#ibcon#flushed, iclass 34, count 0 2006.232.08:13:52.60#ibcon#about to write, iclass 34, count 0 2006.232.08:13:52.60#ibcon#wrote, iclass 34, count 0 2006.232.08:13:52.60#ibcon#about to read 3, iclass 34, count 0 2006.232.08:13:52.63#ibcon#read 3, iclass 34, count 0 2006.232.08:13:52.63#ibcon#about to read 4, iclass 34, count 0 2006.232.08:13:52.63#ibcon#read 4, iclass 34, count 0 2006.232.08:13:52.63#ibcon#about to read 5, iclass 34, count 0 2006.232.08:13:52.63#ibcon#read 5, iclass 34, count 0 2006.232.08:13:52.63#ibcon#about to read 6, iclass 34, count 0 2006.232.08:13:52.63#ibcon#read 6, iclass 34, count 0 2006.232.08:13:52.63#ibcon#end of sib2, iclass 34, count 0 2006.232.08:13:52.63#ibcon#*after write, iclass 34, count 0 2006.232.08:13:52.63#ibcon#*before return 0, iclass 34, count 0 2006.232.08:13:52.63#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.232.08:13:52.63#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.232.08:13:52.63#ibcon#about to clear, iclass 34 cls_cnt 0 2006.232.08:13:52.63#ibcon#cleared, iclass 34 cls_cnt 0 2006.232.08:13:52.64$4f8m12a/ifd4f 2006.232.08:13:52.64$ifd4f/lo= 2006.232.08:13:52.64$ifd4f/lo=lo1,7680.00,usb,rcp,1 2006.232.08:13:52.64$ifd4f/lo=lo2,1600.00,usb,rcp,1 2006.232.08:13:52.64$ifd4f/lo=lo3,8080.00,usb,rcp,1 2006.232.08:13:52.64$ifd4f/patch= 2006.232.08:13:52.64$ifd4f/patch=lo1,a1,a2,a3,a4 2006.232.08:13:52.64$ifd4f/patch=lo2,b1,b2,b3,b4,b5,b6 2006.232.08:13:52.64$ifd4f/patch=lo3,a5,a6,a7,a8 2006.232.08:13:52.64$4f8m12a/"form=m,16.000,1:2 2006.232.08:13:52.64$4f8m12a/"tpicd 2006.232.08:13:52.64$4f8m12a/echo=off 2006.232.08:13:52.64$4f8m12a/xlog=off 2006.232.08:13:52.64:!2006.232.08:14:20 2006.232.08:14:03.14#trakl#Source acquired 2006.232.08:14:05.15#flagr#flagr/antenna,acquired 2006.232.08:14:20.02:preob 2006.232.08:14:21.15/onsource/TRACKING 2006.232.08:14:21.15:!2006.232.08:14:30 2006.232.08:14:30.02:data_valid=on 2006.232.08:14:30.02:midob 2006.232.08:14:31.15/onsource/TRACKING 2006.232.08:14:31.15/wx/29.30,1007.4,89 2006.232.08:14:31.26/cable/+6.3886E-03 2006.232.08:14:32.35/va/01,08,usb,yes,37,38 2006.232.08:14:32.35/va/02,07,usb,yes,37,39 2006.232.08:14:32.35/va/03,08,usb,yes,28,28 2006.232.08:14:32.35/va/04,07,usb,yes,38,41 2006.232.08:14:32.35/va/05,07,usb,yes,43,46 2006.232.08:14:32.35/va/06,06,usb,yes,43,42 2006.232.08:14:32.35/va/07,06,usb,yes,43,43 2006.232.08:14:32.35/va/08,06,usb,yes,46,45 2006.232.08:14:32.58/valo/01,532.99,yes,locked 2006.232.08:14:32.58/valo/02,572.99,yes,locked 2006.232.08:14:32.58/valo/03,672.99,yes,locked 2006.232.08:14:32.58/valo/04,832.99,yes,locked 2006.232.08:14:32.58/valo/05,652.99,yes,locked 2006.232.08:14:32.58/valo/06,772.99,yes,locked 2006.232.08:14:32.58/valo/07,832.99,yes,locked 2006.232.08:14:32.58/valo/08,852.99,yes,locked 2006.232.08:14:33.67/vb/01,04,usb,yes,33,72 2006.232.08:14:33.67/vb/02,04,usb,yes,34,69 2006.232.08:14:33.67/vb/03,04,usb,yes,32,38 2006.232.08:14:33.67/vb/04,04,usb,yes,32,32 2006.232.08:14:33.67/vb/05,03,usb,yes,39,45 2006.232.08:14:33.67/vb/06,04,usb,yes,32,35 2006.232.08:14:33.67/vb/07,04,usb,yes,34,34 2006.232.08:14:33.67/vb/08,04,usb,yes,31,35 2006.232.08:14:33.91/vblo/01,632.99,yes,locked 2006.232.08:14:33.91/vblo/02,640.99,yes,locked 2006.232.08:14:33.91/vblo/03,656.99,yes,locked 2006.232.08:14:33.91/vblo/04,712.99,yes,locked 2006.232.08:14:33.91/vblo/05,744.99,yes,locked 2006.232.08:14:33.91/vblo/06,752.99,yes,locked 2006.232.08:14:33.91/vblo/07,734.99,yes,locked 2006.232.08:14:33.91/vblo/08,744.99,yes,locked 2006.232.08:14:34.06/vabw/8 2006.232.08:14:34.21/vbbw/8 2006.232.08:14:34.37/xfe/off,on,13.7 2006.232.08:14:34.74/ifatt/23,28,28,28 2006.232.08:14:35.07/fmout-gps/S +4.51E-07 2006.232.08:14:35.12:!2006.232.08:15:30 2006.232.08:15:30.01:data_valid=off 2006.232.08:15:30.02:postob 2006.232.08:15:30.21/cable/+6.3871E-03 2006.232.08:15:30.22/wx/29.29,1007.4,89 2006.232.08:15:31.07/fmout-gps/S +4.51E-07 2006.232.08:15:31.08:scan_name=232-0816,k06232,60 2006.232.08:15:31.08:source=1044+719,104827.62,714335.9,2000.0,ccw 2006.232.08:15:32.13#flagr#flagr/antenna,new-source 2006.232.08:15:32.14:checkk5 2006.232.08:15:32.51/chk_autoobs//k5ts1/ autoobs is running! 2006.232.08:15:32.89/chk_autoobs//k5ts2/ autoobs is running! 2006.232.08:15:33.26/chk_autoobs//k5ts3/ autoobs is running! 2006.232.08:15:33.63/chk_autoobs//k5ts4/ autoobs is running! 2006.232.08:15:34.00/chk_obsdata//k5ts1/T2320814??a.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.08:15:34.37/chk_obsdata//k5ts2/T2320814??b.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.08:15:34.74/chk_obsdata//k5ts3/T2320814??c.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.08:15:35.11/chk_obsdata//k5ts4/T2320814??d.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.08:15:35.80/k5log//k5ts1_log_newline 2006.232.08:15:36.50/k5log//k5ts2_log_newline 2006.232.08:15:37.22/k5log//k5ts3_log_newline 2006.232.08:15:37.91/k5log//k5ts4_log_newline 2006.232.08:15:37.93/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.232.08:15:37.93:4f8m12a=2 2006.232.08:15:37.93$4f8m12a/echo=on 2006.232.08:15:37.93$4f8m12a/pcalon 2006.232.08:15:37.93$pcalon/"no phase cal control is implemented here 2006.232.08:15:37.93$4f8m12a/"tpicd=stop 2006.232.08:15:37.93$4f8m12a/vc4f8 2006.232.08:15:37.93$vc4f8/valo=1,532.99 2006.232.08:15:37.94#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.232.08:15:37.94#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.232.08:15:37.94#ibcon#ireg 17 cls_cnt 0 2006.232.08:15:37.94#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:15:37.94#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:15:37.94#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:15:37.94#ibcon#enter wrdev, iclass 3, count 0 2006.232.08:15:37.94#ibcon#first serial, iclass 3, count 0 2006.232.08:15:37.94#ibcon#enter sib2, iclass 3, count 0 2006.232.08:15:37.94#ibcon#flushed, iclass 3, count 0 2006.232.08:15:37.94#ibcon#about to write, iclass 3, count 0 2006.232.08:15:37.94#ibcon#wrote, iclass 3, count 0 2006.232.08:15:37.94#ibcon#about to read 3, iclass 3, count 0 2006.232.08:15:37.97#ibcon#read 3, iclass 3, count 0 2006.232.08:15:37.97#ibcon#about to read 4, iclass 3, count 0 2006.232.08:15:37.97#ibcon#read 4, iclass 3, count 0 2006.232.08:15:37.97#ibcon#about to read 5, iclass 3, count 0 2006.232.08:15:37.97#ibcon#read 5, iclass 3, count 0 2006.232.08:15:37.97#ibcon#about to read 6, iclass 3, count 0 2006.232.08:15:37.97#ibcon#read 6, iclass 3, count 0 2006.232.08:15:37.97#ibcon#end of sib2, iclass 3, count 0 2006.232.08:15:37.97#ibcon#*mode == 0, iclass 3, count 0 2006.232.08:15:37.97#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.232.08:15:37.97#ibcon#[26=FRQ=01,532.99\r\n] 2006.232.08:15:37.97#ibcon#*before write, iclass 3, count 0 2006.232.08:15:37.97#ibcon#enter sib2, iclass 3, count 0 2006.232.08:15:37.97#ibcon#flushed, iclass 3, count 0 2006.232.08:15:37.97#ibcon#about to write, iclass 3, count 0 2006.232.08:15:37.97#ibcon#wrote, iclass 3, count 0 2006.232.08:15:37.97#ibcon#about to read 3, iclass 3, count 0 2006.232.08:15:38.02#ibcon#read 3, iclass 3, count 0 2006.232.08:15:38.02#ibcon#about to read 4, iclass 3, count 0 2006.232.08:15:38.02#ibcon#read 4, iclass 3, count 0 2006.232.08:15:38.02#ibcon#about to read 5, iclass 3, count 0 2006.232.08:15:38.02#ibcon#read 5, iclass 3, count 0 2006.232.08:15:38.02#ibcon#about to read 6, iclass 3, count 0 2006.232.08:15:38.02#ibcon#read 6, iclass 3, count 0 2006.232.08:15:38.02#ibcon#end of sib2, iclass 3, count 0 2006.232.08:15:38.02#ibcon#*after write, iclass 3, count 0 2006.232.08:15:38.02#ibcon#*before return 0, iclass 3, count 0 2006.232.08:15:38.02#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:15:38.02#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:15:38.02#ibcon#about to clear, iclass 3 cls_cnt 0 2006.232.08:15:38.02#ibcon#cleared, iclass 3 cls_cnt 0 2006.232.08:15:38.02$vc4f8/va=1,8 2006.232.08:15:38.02#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.232.08:15:38.02#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.232.08:15:38.02#ibcon#ireg 11 cls_cnt 2 2006.232.08:15:38.02#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.232.08:15:38.02#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.232.08:15:38.02#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.232.08:15:38.02#ibcon#enter wrdev, iclass 5, count 2 2006.232.08:15:38.02#ibcon#first serial, iclass 5, count 2 2006.232.08:15:38.02#ibcon#enter sib2, iclass 5, count 2 2006.232.08:15:38.02#ibcon#flushed, iclass 5, count 2 2006.232.08:15:38.02#ibcon#about to write, iclass 5, count 2 2006.232.08:15:38.02#ibcon#wrote, iclass 5, count 2 2006.232.08:15:38.02#ibcon#about to read 3, iclass 5, count 2 2006.232.08:15:38.04#ibcon#read 3, iclass 5, count 2 2006.232.08:15:38.04#ibcon#about to read 4, iclass 5, count 2 2006.232.08:15:38.04#ibcon#read 4, iclass 5, count 2 2006.232.08:15:38.04#ibcon#about to read 5, iclass 5, count 2 2006.232.08:15:38.04#ibcon#read 5, iclass 5, count 2 2006.232.08:15:38.04#ibcon#about to read 6, iclass 5, count 2 2006.232.08:15:38.04#ibcon#read 6, iclass 5, count 2 2006.232.08:15:38.04#ibcon#end of sib2, iclass 5, count 2 2006.232.08:15:38.04#ibcon#*mode == 0, iclass 5, count 2 2006.232.08:15:38.04#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.232.08:15:38.04#ibcon#[25=AT01-08\r\n] 2006.232.08:15:38.04#ibcon#*before write, iclass 5, count 2 2006.232.08:15:38.04#ibcon#enter sib2, iclass 5, count 2 2006.232.08:15:38.04#ibcon#flushed, iclass 5, count 2 2006.232.08:15:38.04#ibcon#about to write, iclass 5, count 2 2006.232.08:15:38.04#ibcon#wrote, iclass 5, count 2 2006.232.08:15:38.04#ibcon#about to read 3, iclass 5, count 2 2006.232.08:15:38.08#ibcon#read 3, iclass 5, count 2 2006.232.08:15:38.08#ibcon#about to read 4, iclass 5, count 2 2006.232.08:15:38.08#ibcon#read 4, iclass 5, count 2 2006.232.08:15:38.08#ibcon#about to read 5, iclass 5, count 2 2006.232.08:15:38.08#ibcon#read 5, iclass 5, count 2 2006.232.08:15:38.08#ibcon#about to read 6, iclass 5, count 2 2006.232.08:15:38.08#ibcon#read 6, iclass 5, count 2 2006.232.08:15:38.08#ibcon#end of sib2, iclass 5, count 2 2006.232.08:15:38.08#ibcon#*after write, iclass 5, count 2 2006.232.08:15:38.08#ibcon#*before return 0, iclass 5, count 2 2006.232.08:15:38.08#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.232.08:15:38.08#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.232.08:15:38.08#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.232.08:15:38.08#ibcon#ireg 7 cls_cnt 0 2006.232.08:15:38.08#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.232.08:15:38.19#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.232.08:15:38.19#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.232.08:15:38.19#ibcon#enter wrdev, iclass 5, count 0 2006.232.08:15:38.19#ibcon#first serial, iclass 5, count 0 2006.232.08:15:38.19#ibcon#enter sib2, iclass 5, count 0 2006.232.08:15:38.19#ibcon#flushed, iclass 5, count 0 2006.232.08:15:38.19#ibcon#about to write, iclass 5, count 0 2006.232.08:15:38.19#ibcon#wrote, iclass 5, count 0 2006.232.08:15:38.19#ibcon#about to read 3, iclass 5, count 0 2006.232.08:15:38.21#ibcon#read 3, iclass 5, count 0 2006.232.08:15:38.21#ibcon#about to read 4, iclass 5, count 0 2006.232.08:15:38.21#ibcon#read 4, iclass 5, count 0 2006.232.08:15:38.21#ibcon#about to read 5, iclass 5, count 0 2006.232.08:15:38.21#ibcon#read 5, iclass 5, count 0 2006.232.08:15:38.21#ibcon#about to read 6, iclass 5, count 0 2006.232.08:15:38.21#ibcon#read 6, iclass 5, count 0 2006.232.08:15:38.21#ibcon#end of sib2, iclass 5, count 0 2006.232.08:15:38.21#ibcon#*mode == 0, iclass 5, count 0 2006.232.08:15:38.21#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.232.08:15:38.21#ibcon#[25=USB\r\n] 2006.232.08:15:38.21#ibcon#*before write, iclass 5, count 0 2006.232.08:15:38.21#ibcon#enter sib2, iclass 5, count 0 2006.232.08:15:38.21#ibcon#flushed, iclass 5, count 0 2006.232.08:15:38.21#ibcon#about to write, iclass 5, count 0 2006.232.08:15:38.21#ibcon#wrote, iclass 5, count 0 2006.232.08:15:38.21#ibcon#about to read 3, iclass 5, count 0 2006.232.08:15:38.25#ibcon#read 3, iclass 5, count 0 2006.232.08:15:38.25#ibcon#about to read 4, iclass 5, count 0 2006.232.08:15:38.25#ibcon#read 4, iclass 5, count 0 2006.232.08:15:38.25#ibcon#about to read 5, iclass 5, count 0 2006.232.08:15:38.25#ibcon#read 5, iclass 5, count 0 2006.232.08:15:38.25#ibcon#about to read 6, iclass 5, count 0 2006.232.08:15:38.25#ibcon#read 6, iclass 5, count 0 2006.232.08:15:38.25#ibcon#end of sib2, iclass 5, count 0 2006.232.08:15:38.25#ibcon#*after write, iclass 5, count 0 2006.232.08:15:38.25#ibcon#*before return 0, iclass 5, count 0 2006.232.08:15:38.25#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.232.08:15:38.25#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.232.08:15:38.25#ibcon#about to clear, iclass 5 cls_cnt 0 2006.232.08:15:38.25#ibcon#cleared, iclass 5 cls_cnt 0 2006.232.08:15:38.25$vc4f8/valo=2,572.99 2006.232.08:15:38.25#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.232.08:15:38.25#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.232.08:15:38.25#ibcon#ireg 17 cls_cnt 0 2006.232.08:15:38.25#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.232.08:15:38.25#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.232.08:15:38.25#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.232.08:15:38.25#ibcon#enter wrdev, iclass 7, count 0 2006.232.08:15:38.25#ibcon#first serial, iclass 7, count 0 2006.232.08:15:38.25#ibcon#enter sib2, iclass 7, count 0 2006.232.08:15:38.25#ibcon#flushed, iclass 7, count 0 2006.232.08:15:38.25#ibcon#about to write, iclass 7, count 0 2006.232.08:15:38.25#ibcon#wrote, iclass 7, count 0 2006.232.08:15:38.25#ibcon#about to read 3, iclass 7, count 0 2006.232.08:15:38.26#ibcon#read 3, iclass 7, count 0 2006.232.08:15:38.26#ibcon#about to read 4, iclass 7, count 0 2006.232.08:15:38.26#ibcon#read 4, iclass 7, count 0 2006.232.08:15:38.26#ibcon#about to read 5, iclass 7, count 0 2006.232.08:15:38.26#ibcon#read 5, iclass 7, count 0 2006.232.08:15:38.26#ibcon#about to read 6, iclass 7, count 0 2006.232.08:15:38.26#ibcon#read 6, iclass 7, count 0 2006.232.08:15:38.26#ibcon#end of sib2, iclass 7, count 0 2006.232.08:15:38.26#ibcon#*mode == 0, iclass 7, count 0 2006.232.08:15:38.26#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.232.08:15:38.26#ibcon#[26=FRQ=02,572.99\r\n] 2006.232.08:15:38.26#ibcon#*before write, iclass 7, count 0 2006.232.08:15:38.26#ibcon#enter sib2, iclass 7, count 0 2006.232.08:15:38.26#ibcon#flushed, iclass 7, count 0 2006.232.08:15:38.26#ibcon#about to write, iclass 7, count 0 2006.232.08:15:38.26#ibcon#wrote, iclass 7, count 0 2006.232.08:15:38.26#ibcon#about to read 3, iclass 7, count 0 2006.232.08:15:38.30#ibcon#read 3, iclass 7, count 0 2006.232.08:15:38.30#ibcon#about to read 4, iclass 7, count 0 2006.232.08:15:38.30#ibcon#read 4, iclass 7, count 0 2006.232.08:15:38.30#ibcon#about to read 5, iclass 7, count 0 2006.232.08:15:38.30#ibcon#read 5, iclass 7, count 0 2006.232.08:15:38.30#ibcon#about to read 6, iclass 7, count 0 2006.232.08:15:38.30#ibcon#read 6, iclass 7, count 0 2006.232.08:15:38.30#ibcon#end of sib2, iclass 7, count 0 2006.232.08:15:38.30#ibcon#*after write, iclass 7, count 0 2006.232.08:15:38.30#ibcon#*before return 0, iclass 7, count 0 2006.232.08:15:38.30#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.232.08:15:38.30#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.232.08:15:38.30#ibcon#about to clear, iclass 7 cls_cnt 0 2006.232.08:15:38.30#ibcon#cleared, iclass 7 cls_cnt 0 2006.232.08:15:38.30$vc4f8/va=2,7 2006.232.08:15:38.30#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.232.08:15:38.30#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.232.08:15:38.30#ibcon#ireg 11 cls_cnt 2 2006.232.08:15:38.30#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.232.08:15:38.38#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.232.08:15:38.38#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.232.08:15:38.38#ibcon#enter wrdev, iclass 11, count 2 2006.232.08:15:38.38#ibcon#first serial, iclass 11, count 2 2006.232.08:15:38.38#ibcon#enter sib2, iclass 11, count 2 2006.232.08:15:38.38#ibcon#flushed, iclass 11, count 2 2006.232.08:15:38.38#ibcon#about to write, iclass 11, count 2 2006.232.08:15:38.38#ibcon#wrote, iclass 11, count 2 2006.232.08:15:38.38#ibcon#about to read 3, iclass 11, count 2 2006.232.08:15:38.39#ibcon#read 3, iclass 11, count 2 2006.232.08:15:38.39#ibcon#about to read 4, iclass 11, count 2 2006.232.08:15:38.39#ibcon#read 4, iclass 11, count 2 2006.232.08:15:38.39#ibcon#about to read 5, iclass 11, count 2 2006.232.08:15:38.39#ibcon#read 5, iclass 11, count 2 2006.232.08:15:38.39#ibcon#about to read 6, iclass 11, count 2 2006.232.08:15:38.39#ibcon#read 6, iclass 11, count 2 2006.232.08:15:38.39#ibcon#end of sib2, iclass 11, count 2 2006.232.08:15:38.39#ibcon#*mode == 0, iclass 11, count 2 2006.232.08:15:38.39#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.232.08:15:38.39#ibcon#[25=AT02-07\r\n] 2006.232.08:15:38.39#ibcon#*before write, iclass 11, count 2 2006.232.08:15:38.39#ibcon#enter sib2, iclass 11, count 2 2006.232.08:15:38.39#ibcon#flushed, iclass 11, count 2 2006.232.08:15:38.39#ibcon#about to write, iclass 11, count 2 2006.232.08:15:38.39#ibcon#wrote, iclass 11, count 2 2006.232.08:15:38.39#ibcon#about to read 3, iclass 11, count 2 2006.232.08:15:38.42#ibcon#read 3, iclass 11, count 2 2006.232.08:15:38.42#ibcon#about to read 4, iclass 11, count 2 2006.232.08:15:38.42#ibcon#read 4, iclass 11, count 2 2006.232.08:15:38.42#ibcon#about to read 5, iclass 11, count 2 2006.232.08:15:38.42#ibcon#read 5, iclass 11, count 2 2006.232.08:15:38.42#ibcon#about to read 6, iclass 11, count 2 2006.232.08:15:38.42#ibcon#read 6, iclass 11, count 2 2006.232.08:15:38.42#ibcon#end of sib2, iclass 11, count 2 2006.232.08:15:38.42#ibcon#*after write, iclass 11, count 2 2006.232.08:15:38.42#ibcon#*before return 0, iclass 11, count 2 2006.232.08:15:38.42#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.232.08:15:38.42#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.232.08:15:38.42#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.232.08:15:38.42#ibcon#ireg 7 cls_cnt 0 2006.232.08:15:38.42#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.232.08:15:38.54#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.232.08:15:38.54#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.232.08:15:38.54#ibcon#enter wrdev, iclass 11, count 0 2006.232.08:15:38.54#ibcon#first serial, iclass 11, count 0 2006.232.08:15:38.54#ibcon#enter sib2, iclass 11, count 0 2006.232.08:15:38.54#ibcon#flushed, iclass 11, count 0 2006.232.08:15:38.54#ibcon#about to write, iclass 11, count 0 2006.232.08:15:38.54#ibcon#wrote, iclass 11, count 0 2006.232.08:15:38.54#ibcon#about to read 3, iclass 11, count 0 2006.232.08:15:38.56#ibcon#read 3, iclass 11, count 0 2006.232.08:15:38.56#ibcon#about to read 4, iclass 11, count 0 2006.232.08:15:38.56#ibcon#read 4, iclass 11, count 0 2006.232.08:15:38.56#ibcon#about to read 5, iclass 11, count 0 2006.232.08:15:38.56#ibcon#read 5, iclass 11, count 0 2006.232.08:15:38.56#ibcon#about to read 6, iclass 11, count 0 2006.232.08:15:38.56#ibcon#read 6, iclass 11, count 0 2006.232.08:15:38.56#ibcon#end of sib2, iclass 11, count 0 2006.232.08:15:38.56#ibcon#*mode == 0, iclass 11, count 0 2006.232.08:15:38.56#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.232.08:15:38.56#ibcon#[25=USB\r\n] 2006.232.08:15:38.56#ibcon#*before write, iclass 11, count 0 2006.232.08:15:38.56#ibcon#enter sib2, iclass 11, count 0 2006.232.08:15:38.56#ibcon#flushed, iclass 11, count 0 2006.232.08:15:38.56#ibcon#about to write, iclass 11, count 0 2006.232.08:15:38.56#ibcon#wrote, iclass 11, count 0 2006.232.08:15:38.56#ibcon#about to read 3, iclass 11, count 0 2006.232.08:15:38.59#ibcon#read 3, iclass 11, count 0 2006.232.08:15:38.59#ibcon#about to read 4, iclass 11, count 0 2006.232.08:15:38.59#ibcon#read 4, iclass 11, count 0 2006.232.08:15:38.59#ibcon#about to read 5, iclass 11, count 0 2006.232.08:15:38.59#ibcon#read 5, iclass 11, count 0 2006.232.08:15:38.59#ibcon#about to read 6, iclass 11, count 0 2006.232.08:15:38.59#ibcon#read 6, iclass 11, count 0 2006.232.08:15:38.59#ibcon#end of sib2, iclass 11, count 0 2006.232.08:15:38.59#ibcon#*after write, iclass 11, count 0 2006.232.08:15:38.59#ibcon#*before return 0, iclass 11, count 0 2006.232.08:15:38.59#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.232.08:15:38.59#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.232.08:15:38.59#ibcon#about to clear, iclass 11 cls_cnt 0 2006.232.08:15:38.59#ibcon#cleared, iclass 11 cls_cnt 0 2006.232.08:15:38.59$vc4f8/valo=3,672.99 2006.232.08:15:38.59#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.232.08:15:38.59#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.232.08:15:38.59#ibcon#ireg 17 cls_cnt 0 2006.232.08:15:38.59#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.232.08:15:38.59#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.232.08:15:38.59#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.232.08:15:38.59#ibcon#enter wrdev, iclass 13, count 0 2006.232.08:15:38.59#ibcon#first serial, iclass 13, count 0 2006.232.08:15:38.59#ibcon#enter sib2, iclass 13, count 0 2006.232.08:15:38.59#ibcon#flushed, iclass 13, count 0 2006.232.08:15:38.59#ibcon#about to write, iclass 13, count 0 2006.232.08:15:38.59#ibcon#wrote, iclass 13, count 0 2006.232.08:15:38.59#ibcon#about to read 3, iclass 13, count 0 2006.232.08:15:38.62#ibcon#read 3, iclass 13, count 0 2006.232.08:15:38.62#ibcon#about to read 4, iclass 13, count 0 2006.232.08:15:38.62#ibcon#read 4, iclass 13, count 0 2006.232.08:15:38.62#ibcon#about to read 5, iclass 13, count 0 2006.232.08:15:38.62#ibcon#read 5, iclass 13, count 0 2006.232.08:15:38.62#ibcon#about to read 6, iclass 13, count 0 2006.232.08:15:38.62#ibcon#read 6, iclass 13, count 0 2006.232.08:15:38.62#ibcon#end of sib2, iclass 13, count 0 2006.232.08:15:38.62#ibcon#*mode == 0, iclass 13, count 0 2006.232.08:15:38.62#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.232.08:15:38.62#ibcon#[26=FRQ=03,672.99\r\n] 2006.232.08:15:38.62#ibcon#*before write, iclass 13, count 0 2006.232.08:15:38.62#ibcon#enter sib2, iclass 13, count 0 2006.232.08:15:38.62#ibcon#flushed, iclass 13, count 0 2006.232.08:15:38.62#ibcon#about to write, iclass 13, count 0 2006.232.08:15:38.62#ibcon#wrote, iclass 13, count 0 2006.232.08:15:38.62#ibcon#about to read 3, iclass 13, count 0 2006.232.08:15:38.66#ibcon#read 3, iclass 13, count 0 2006.232.08:15:38.66#ibcon#about to read 4, iclass 13, count 0 2006.232.08:15:38.66#ibcon#read 4, iclass 13, count 0 2006.232.08:15:38.66#ibcon#about to read 5, iclass 13, count 0 2006.232.08:15:38.66#ibcon#read 5, iclass 13, count 0 2006.232.08:15:38.66#ibcon#about to read 6, iclass 13, count 0 2006.232.08:15:38.66#ibcon#read 6, iclass 13, count 0 2006.232.08:15:38.66#ibcon#end of sib2, iclass 13, count 0 2006.232.08:15:38.66#ibcon#*after write, iclass 13, count 0 2006.232.08:15:38.66#ibcon#*before return 0, iclass 13, count 0 2006.232.08:15:38.66#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.232.08:15:38.66#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.232.08:15:38.66#ibcon#about to clear, iclass 13 cls_cnt 0 2006.232.08:15:38.66#ibcon#cleared, iclass 13 cls_cnt 0 2006.232.08:15:38.66$vc4f8/va=3,8 2006.232.08:15:38.66#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.232.08:15:38.66#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.232.08:15:38.66#ibcon#ireg 11 cls_cnt 2 2006.232.08:15:38.66#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.232.08:15:38.71#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.232.08:15:38.71#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.232.08:15:38.71#ibcon#enter wrdev, iclass 15, count 2 2006.232.08:15:38.71#ibcon#first serial, iclass 15, count 2 2006.232.08:15:38.71#ibcon#enter sib2, iclass 15, count 2 2006.232.08:15:38.71#ibcon#flushed, iclass 15, count 2 2006.232.08:15:38.71#ibcon#about to write, iclass 15, count 2 2006.232.08:15:38.71#ibcon#wrote, iclass 15, count 2 2006.232.08:15:38.71#ibcon#about to read 3, iclass 15, count 2 2006.232.08:15:38.73#ibcon#read 3, iclass 15, count 2 2006.232.08:15:38.73#ibcon#about to read 4, iclass 15, count 2 2006.232.08:15:38.73#ibcon#read 4, iclass 15, count 2 2006.232.08:15:38.73#ibcon#about to read 5, iclass 15, count 2 2006.232.08:15:38.73#ibcon#read 5, iclass 15, count 2 2006.232.08:15:38.73#ibcon#about to read 6, iclass 15, count 2 2006.232.08:15:38.73#ibcon#read 6, iclass 15, count 2 2006.232.08:15:38.73#ibcon#end of sib2, iclass 15, count 2 2006.232.08:15:38.73#ibcon#*mode == 0, iclass 15, count 2 2006.232.08:15:38.73#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.232.08:15:38.73#ibcon#[25=AT03-08\r\n] 2006.232.08:15:38.73#ibcon#*before write, iclass 15, count 2 2006.232.08:15:38.73#ibcon#enter sib2, iclass 15, count 2 2006.232.08:15:38.73#ibcon#flushed, iclass 15, count 2 2006.232.08:15:38.73#ibcon#about to write, iclass 15, count 2 2006.232.08:15:38.73#ibcon#wrote, iclass 15, count 2 2006.232.08:15:38.73#ibcon#about to read 3, iclass 15, count 2 2006.232.08:15:38.76#ibcon#read 3, iclass 15, count 2 2006.232.08:15:38.76#ibcon#about to read 4, iclass 15, count 2 2006.232.08:15:38.76#ibcon#read 4, iclass 15, count 2 2006.232.08:15:38.76#ibcon#about to read 5, iclass 15, count 2 2006.232.08:15:38.76#ibcon#read 5, iclass 15, count 2 2006.232.08:15:38.76#ibcon#about to read 6, iclass 15, count 2 2006.232.08:15:38.76#ibcon#read 6, iclass 15, count 2 2006.232.08:15:38.76#ibcon#end of sib2, iclass 15, count 2 2006.232.08:15:38.76#ibcon#*after write, iclass 15, count 2 2006.232.08:15:38.76#ibcon#*before return 0, iclass 15, count 2 2006.232.08:15:38.76#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.232.08:15:38.76#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.232.08:15:38.76#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.232.08:15:38.76#ibcon#ireg 7 cls_cnt 0 2006.232.08:15:38.76#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.232.08:15:38.88#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.232.08:15:38.88#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.232.08:15:38.88#ibcon#enter wrdev, iclass 15, count 0 2006.232.08:15:38.88#ibcon#first serial, iclass 15, count 0 2006.232.08:15:38.88#ibcon#enter sib2, iclass 15, count 0 2006.232.08:15:38.88#ibcon#flushed, iclass 15, count 0 2006.232.08:15:38.88#ibcon#about to write, iclass 15, count 0 2006.232.08:15:38.88#ibcon#wrote, iclass 15, count 0 2006.232.08:15:38.88#ibcon#about to read 3, iclass 15, count 0 2006.232.08:15:38.90#ibcon#read 3, iclass 15, count 0 2006.232.08:15:38.90#ibcon#about to read 4, iclass 15, count 0 2006.232.08:15:38.90#ibcon#read 4, iclass 15, count 0 2006.232.08:15:38.90#ibcon#about to read 5, iclass 15, count 0 2006.232.08:15:38.90#ibcon#read 5, iclass 15, count 0 2006.232.08:15:38.90#ibcon#about to read 6, iclass 15, count 0 2006.232.08:15:38.90#ibcon#read 6, iclass 15, count 0 2006.232.08:15:38.90#ibcon#end of sib2, iclass 15, count 0 2006.232.08:15:38.90#ibcon#*mode == 0, iclass 15, count 0 2006.232.08:15:38.90#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.232.08:15:38.90#ibcon#[25=USB\r\n] 2006.232.08:15:38.90#ibcon#*before write, iclass 15, count 0 2006.232.08:15:38.90#ibcon#enter sib2, iclass 15, count 0 2006.232.08:15:38.90#ibcon#flushed, iclass 15, count 0 2006.232.08:15:38.90#ibcon#about to write, iclass 15, count 0 2006.232.08:15:38.90#ibcon#wrote, iclass 15, count 0 2006.232.08:15:38.90#ibcon#about to read 3, iclass 15, count 0 2006.232.08:15:38.94#ibcon#read 3, iclass 15, count 0 2006.232.08:15:38.94#ibcon#about to read 4, iclass 15, count 0 2006.232.08:15:38.94#ibcon#read 4, iclass 15, count 0 2006.232.08:15:38.94#ibcon#about to read 5, iclass 15, count 0 2006.232.08:15:38.94#ibcon#read 5, iclass 15, count 0 2006.232.08:15:38.94#ibcon#about to read 6, iclass 15, count 0 2006.232.08:15:38.94#ibcon#read 6, iclass 15, count 0 2006.232.08:15:38.94#ibcon#end of sib2, iclass 15, count 0 2006.232.08:15:38.94#ibcon#*after write, iclass 15, count 0 2006.232.08:15:38.94#ibcon#*before return 0, iclass 15, count 0 2006.232.08:15:38.94#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.232.08:15:38.94#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.232.08:15:38.94#ibcon#about to clear, iclass 15 cls_cnt 0 2006.232.08:15:38.94#ibcon#cleared, iclass 15 cls_cnt 0 2006.232.08:15:38.94$vc4f8/valo=4,832.99 2006.232.08:15:38.94#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.232.08:15:38.94#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.232.08:15:38.94#ibcon#ireg 17 cls_cnt 0 2006.232.08:15:38.94#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.232.08:15:38.94#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.232.08:15:38.94#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.232.08:15:38.94#ibcon#enter wrdev, iclass 17, count 0 2006.232.08:15:38.94#ibcon#first serial, iclass 17, count 0 2006.232.08:15:38.94#ibcon#enter sib2, iclass 17, count 0 2006.232.08:15:38.94#ibcon#flushed, iclass 17, count 0 2006.232.08:15:38.94#ibcon#about to write, iclass 17, count 0 2006.232.08:15:38.94#ibcon#wrote, iclass 17, count 0 2006.232.08:15:38.94#ibcon#about to read 3, iclass 17, count 0 2006.232.08:15:38.95#ibcon#read 3, iclass 17, count 0 2006.232.08:15:38.95#ibcon#about to read 4, iclass 17, count 0 2006.232.08:15:38.95#ibcon#read 4, iclass 17, count 0 2006.232.08:15:38.95#ibcon#about to read 5, iclass 17, count 0 2006.232.08:15:38.95#ibcon#read 5, iclass 17, count 0 2006.232.08:15:38.95#ibcon#about to read 6, iclass 17, count 0 2006.232.08:15:38.95#ibcon#read 6, iclass 17, count 0 2006.232.08:15:38.95#ibcon#end of sib2, iclass 17, count 0 2006.232.08:15:38.95#ibcon#*mode == 0, iclass 17, count 0 2006.232.08:15:38.95#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.232.08:15:38.95#ibcon#[26=FRQ=04,832.99\r\n] 2006.232.08:15:38.95#ibcon#*before write, iclass 17, count 0 2006.232.08:15:38.95#ibcon#enter sib2, iclass 17, count 0 2006.232.08:15:38.95#ibcon#flushed, iclass 17, count 0 2006.232.08:15:38.95#ibcon#about to write, iclass 17, count 0 2006.232.08:15:38.95#ibcon#wrote, iclass 17, count 0 2006.232.08:15:38.95#ibcon#about to read 3, iclass 17, count 0 2006.232.08:15:38.99#ibcon#read 3, iclass 17, count 0 2006.232.08:15:38.99#ibcon#about to read 4, iclass 17, count 0 2006.232.08:15:38.99#ibcon#read 4, iclass 17, count 0 2006.232.08:15:38.99#ibcon#about to read 5, iclass 17, count 0 2006.232.08:15:38.99#ibcon#read 5, iclass 17, count 0 2006.232.08:15:38.99#ibcon#about to read 6, iclass 17, count 0 2006.232.08:15:38.99#ibcon#read 6, iclass 17, count 0 2006.232.08:15:38.99#ibcon#end of sib2, iclass 17, count 0 2006.232.08:15:38.99#ibcon#*after write, iclass 17, count 0 2006.232.08:15:38.99#ibcon#*before return 0, iclass 17, count 0 2006.232.08:15:38.99#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.232.08:15:38.99#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.232.08:15:38.99#ibcon#about to clear, iclass 17 cls_cnt 0 2006.232.08:15:38.99#ibcon#cleared, iclass 17 cls_cnt 0 2006.232.08:15:38.99$vc4f8/va=4,7 2006.232.08:15:38.99#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.232.08:15:38.99#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.232.08:15:38.99#ibcon#ireg 11 cls_cnt 2 2006.232.08:15:38.99#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.232.08:15:39.06#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.232.08:15:39.06#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.232.08:15:39.06#ibcon#enter wrdev, iclass 19, count 2 2006.232.08:15:39.06#ibcon#first serial, iclass 19, count 2 2006.232.08:15:39.06#ibcon#enter sib2, iclass 19, count 2 2006.232.08:15:39.06#ibcon#flushed, iclass 19, count 2 2006.232.08:15:39.06#ibcon#about to write, iclass 19, count 2 2006.232.08:15:39.06#ibcon#wrote, iclass 19, count 2 2006.232.08:15:39.06#ibcon#about to read 3, iclass 19, count 2 2006.232.08:15:39.08#ibcon#read 3, iclass 19, count 2 2006.232.08:15:39.08#ibcon#about to read 4, iclass 19, count 2 2006.232.08:15:39.08#ibcon#read 4, iclass 19, count 2 2006.232.08:15:39.08#ibcon#about to read 5, iclass 19, count 2 2006.232.08:15:39.08#ibcon#read 5, iclass 19, count 2 2006.232.08:15:39.08#ibcon#about to read 6, iclass 19, count 2 2006.232.08:15:39.08#ibcon#read 6, iclass 19, count 2 2006.232.08:15:39.08#ibcon#end of sib2, iclass 19, count 2 2006.232.08:15:39.08#ibcon#*mode == 0, iclass 19, count 2 2006.232.08:15:39.08#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.232.08:15:39.08#ibcon#[25=AT04-07\r\n] 2006.232.08:15:39.08#ibcon#*before write, iclass 19, count 2 2006.232.08:15:39.08#ibcon#enter sib2, iclass 19, count 2 2006.232.08:15:39.08#ibcon#flushed, iclass 19, count 2 2006.232.08:15:39.08#ibcon#about to write, iclass 19, count 2 2006.232.08:15:39.08#ibcon#wrote, iclass 19, count 2 2006.232.08:15:39.08#ibcon#about to read 3, iclass 19, count 2 2006.232.08:15:39.11#ibcon#read 3, iclass 19, count 2 2006.232.08:15:39.11#ibcon#about to read 4, iclass 19, count 2 2006.232.08:15:39.11#ibcon#read 4, iclass 19, count 2 2006.232.08:15:39.11#ibcon#about to read 5, iclass 19, count 2 2006.232.08:15:39.11#ibcon#read 5, iclass 19, count 2 2006.232.08:15:39.11#ibcon#about to read 6, iclass 19, count 2 2006.232.08:15:39.11#ibcon#read 6, iclass 19, count 2 2006.232.08:15:39.11#ibcon#end of sib2, iclass 19, count 2 2006.232.08:15:39.11#ibcon#*after write, iclass 19, count 2 2006.232.08:15:39.11#ibcon#*before return 0, iclass 19, count 2 2006.232.08:15:39.11#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.232.08:15:39.11#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.232.08:15:39.11#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.232.08:15:39.11#ibcon#ireg 7 cls_cnt 0 2006.232.08:15:39.11#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.232.08:15:39.23#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.232.08:15:39.23#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.232.08:15:39.23#ibcon#enter wrdev, iclass 19, count 0 2006.232.08:15:39.23#ibcon#first serial, iclass 19, count 0 2006.232.08:15:39.23#ibcon#enter sib2, iclass 19, count 0 2006.232.08:15:39.23#ibcon#flushed, iclass 19, count 0 2006.232.08:15:39.23#ibcon#about to write, iclass 19, count 0 2006.232.08:15:39.23#ibcon#wrote, iclass 19, count 0 2006.232.08:15:39.23#ibcon#about to read 3, iclass 19, count 0 2006.232.08:15:39.25#ibcon#read 3, iclass 19, count 0 2006.232.08:15:39.25#ibcon#about to read 4, iclass 19, count 0 2006.232.08:15:39.25#ibcon#read 4, iclass 19, count 0 2006.232.08:15:39.25#ibcon#about to read 5, iclass 19, count 0 2006.232.08:15:39.25#ibcon#read 5, iclass 19, count 0 2006.232.08:15:39.25#ibcon#about to read 6, iclass 19, count 0 2006.232.08:15:39.25#ibcon#read 6, iclass 19, count 0 2006.232.08:15:39.25#ibcon#end of sib2, iclass 19, count 0 2006.232.08:15:39.25#ibcon#*mode == 0, iclass 19, count 0 2006.232.08:15:39.25#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.232.08:15:39.25#ibcon#[25=USB\r\n] 2006.232.08:15:39.25#ibcon#*before write, iclass 19, count 0 2006.232.08:15:39.25#ibcon#enter sib2, iclass 19, count 0 2006.232.08:15:39.25#ibcon#flushed, iclass 19, count 0 2006.232.08:15:39.25#ibcon#about to write, iclass 19, count 0 2006.232.08:15:39.25#ibcon#wrote, iclass 19, count 0 2006.232.08:15:39.25#ibcon#about to read 3, iclass 19, count 0 2006.232.08:15:39.28#ibcon#read 3, iclass 19, count 0 2006.232.08:15:39.28#ibcon#about to read 4, iclass 19, count 0 2006.232.08:15:39.28#ibcon#read 4, iclass 19, count 0 2006.232.08:15:39.28#ibcon#about to read 5, iclass 19, count 0 2006.232.08:15:39.28#ibcon#read 5, iclass 19, count 0 2006.232.08:15:39.28#ibcon#about to read 6, iclass 19, count 0 2006.232.08:15:39.28#ibcon#read 6, iclass 19, count 0 2006.232.08:15:39.28#ibcon#end of sib2, iclass 19, count 0 2006.232.08:15:39.28#ibcon#*after write, iclass 19, count 0 2006.232.08:15:39.28#ibcon#*before return 0, iclass 19, count 0 2006.232.08:15:39.28#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.232.08:15:39.28#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.232.08:15:39.28#ibcon#about to clear, iclass 19 cls_cnt 0 2006.232.08:15:39.28#ibcon#cleared, iclass 19 cls_cnt 0 2006.232.08:15:39.28$vc4f8/valo=5,652.99 2006.232.08:15:39.28#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.232.08:15:39.28#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.232.08:15:39.28#ibcon#ireg 17 cls_cnt 0 2006.232.08:15:39.28#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.232.08:15:39.28#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.232.08:15:39.28#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.232.08:15:39.28#ibcon#enter wrdev, iclass 21, count 0 2006.232.08:15:39.28#ibcon#first serial, iclass 21, count 0 2006.232.08:15:39.28#ibcon#enter sib2, iclass 21, count 0 2006.232.08:15:39.28#ibcon#flushed, iclass 21, count 0 2006.232.08:15:39.28#ibcon#about to write, iclass 21, count 0 2006.232.08:15:39.28#ibcon#wrote, iclass 21, count 0 2006.232.08:15:39.28#ibcon#about to read 3, iclass 21, count 0 2006.232.08:15:39.30#ibcon#read 3, iclass 21, count 0 2006.232.08:15:39.30#ibcon#about to read 4, iclass 21, count 0 2006.232.08:15:39.30#ibcon#read 4, iclass 21, count 0 2006.232.08:15:39.30#ibcon#about to read 5, iclass 21, count 0 2006.232.08:15:39.30#ibcon#read 5, iclass 21, count 0 2006.232.08:15:39.30#ibcon#about to read 6, iclass 21, count 0 2006.232.08:15:39.30#ibcon#read 6, iclass 21, count 0 2006.232.08:15:39.30#ibcon#end of sib2, iclass 21, count 0 2006.232.08:15:39.30#ibcon#*mode == 0, iclass 21, count 0 2006.232.08:15:39.30#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.232.08:15:39.30#ibcon#[26=FRQ=05,652.99\r\n] 2006.232.08:15:39.30#ibcon#*before write, iclass 21, count 0 2006.232.08:15:39.30#ibcon#enter sib2, iclass 21, count 0 2006.232.08:15:39.30#ibcon#flushed, iclass 21, count 0 2006.232.08:15:39.30#ibcon#about to write, iclass 21, count 0 2006.232.08:15:39.30#ibcon#wrote, iclass 21, count 0 2006.232.08:15:39.30#ibcon#about to read 3, iclass 21, count 0 2006.232.08:15:39.34#ibcon#read 3, iclass 21, count 0 2006.232.08:15:39.34#ibcon#about to read 4, iclass 21, count 0 2006.232.08:15:39.34#ibcon#read 4, iclass 21, count 0 2006.232.08:15:39.34#ibcon#about to read 5, iclass 21, count 0 2006.232.08:15:39.34#ibcon#read 5, iclass 21, count 0 2006.232.08:15:39.34#ibcon#about to read 6, iclass 21, count 0 2006.232.08:15:39.34#ibcon#read 6, iclass 21, count 0 2006.232.08:15:39.34#ibcon#end of sib2, iclass 21, count 0 2006.232.08:15:39.34#ibcon#*after write, iclass 21, count 0 2006.232.08:15:39.34#ibcon#*before return 0, iclass 21, count 0 2006.232.08:15:39.34#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.232.08:15:39.34#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.232.08:15:39.34#ibcon#about to clear, iclass 21 cls_cnt 0 2006.232.08:15:39.34#ibcon#cleared, iclass 21 cls_cnt 0 2006.232.08:15:39.34$vc4f8/va=5,7 2006.232.08:15:39.34#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.232.08:15:39.34#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.232.08:15:39.34#ibcon#ireg 11 cls_cnt 2 2006.232.08:15:39.34#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.232.08:15:39.40#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.232.08:15:39.40#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.232.08:15:39.40#ibcon#enter wrdev, iclass 23, count 2 2006.232.08:15:39.40#ibcon#first serial, iclass 23, count 2 2006.232.08:15:39.40#ibcon#enter sib2, iclass 23, count 2 2006.232.08:15:39.40#ibcon#flushed, iclass 23, count 2 2006.232.08:15:39.40#ibcon#about to write, iclass 23, count 2 2006.232.08:15:39.40#ibcon#wrote, iclass 23, count 2 2006.232.08:15:39.40#ibcon#about to read 3, iclass 23, count 2 2006.232.08:15:39.42#ibcon#read 3, iclass 23, count 2 2006.232.08:15:39.42#ibcon#about to read 4, iclass 23, count 2 2006.232.08:15:39.42#ibcon#read 4, iclass 23, count 2 2006.232.08:15:39.42#ibcon#about to read 5, iclass 23, count 2 2006.232.08:15:39.42#ibcon#read 5, iclass 23, count 2 2006.232.08:15:39.42#ibcon#about to read 6, iclass 23, count 2 2006.232.08:15:39.42#ibcon#read 6, iclass 23, count 2 2006.232.08:15:39.42#ibcon#end of sib2, iclass 23, count 2 2006.232.08:15:39.42#ibcon#*mode == 0, iclass 23, count 2 2006.232.08:15:39.42#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.232.08:15:39.42#ibcon#[25=AT05-07\r\n] 2006.232.08:15:39.42#ibcon#*before write, iclass 23, count 2 2006.232.08:15:39.42#ibcon#enter sib2, iclass 23, count 2 2006.232.08:15:39.42#ibcon#flushed, iclass 23, count 2 2006.232.08:15:39.42#ibcon#about to write, iclass 23, count 2 2006.232.08:15:39.42#ibcon#wrote, iclass 23, count 2 2006.232.08:15:39.42#ibcon#about to read 3, iclass 23, count 2 2006.232.08:15:39.45#ibcon#read 3, iclass 23, count 2 2006.232.08:15:39.45#ibcon#about to read 4, iclass 23, count 2 2006.232.08:15:39.45#ibcon#read 4, iclass 23, count 2 2006.232.08:15:39.45#ibcon#about to read 5, iclass 23, count 2 2006.232.08:15:39.45#ibcon#read 5, iclass 23, count 2 2006.232.08:15:39.45#ibcon#about to read 6, iclass 23, count 2 2006.232.08:15:39.45#ibcon#read 6, iclass 23, count 2 2006.232.08:15:39.45#ibcon#end of sib2, iclass 23, count 2 2006.232.08:15:39.45#ibcon#*after write, iclass 23, count 2 2006.232.08:15:39.45#ibcon#*before return 0, iclass 23, count 2 2006.232.08:15:39.45#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.232.08:15:39.45#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.232.08:15:39.45#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.232.08:15:39.45#ibcon#ireg 7 cls_cnt 0 2006.232.08:15:39.45#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.232.08:15:39.57#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.232.08:15:39.57#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.232.08:15:39.57#ibcon#enter wrdev, iclass 23, count 0 2006.232.08:15:39.57#ibcon#first serial, iclass 23, count 0 2006.232.08:15:39.57#ibcon#enter sib2, iclass 23, count 0 2006.232.08:15:39.57#ibcon#flushed, iclass 23, count 0 2006.232.08:15:39.57#ibcon#about to write, iclass 23, count 0 2006.232.08:15:39.57#ibcon#wrote, iclass 23, count 0 2006.232.08:15:39.57#ibcon#about to read 3, iclass 23, count 0 2006.232.08:15:39.60#ibcon#read 3, iclass 23, count 0 2006.232.08:15:39.60#ibcon#about to read 4, iclass 23, count 0 2006.232.08:15:39.60#ibcon#read 4, iclass 23, count 0 2006.232.08:15:39.60#ibcon#about to read 5, iclass 23, count 0 2006.232.08:15:39.60#ibcon#read 5, iclass 23, count 0 2006.232.08:15:39.60#ibcon#about to read 6, iclass 23, count 0 2006.232.08:15:39.60#ibcon#read 6, iclass 23, count 0 2006.232.08:15:39.60#ibcon#end of sib2, iclass 23, count 0 2006.232.08:15:39.60#ibcon#*mode == 0, iclass 23, count 0 2006.232.08:15:39.60#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.232.08:15:39.60#ibcon#[25=USB\r\n] 2006.232.08:15:39.60#ibcon#*before write, iclass 23, count 0 2006.232.08:15:39.60#ibcon#enter sib2, iclass 23, count 0 2006.232.08:15:39.60#ibcon#flushed, iclass 23, count 0 2006.232.08:15:39.60#ibcon#about to write, iclass 23, count 0 2006.232.08:15:39.60#ibcon#wrote, iclass 23, count 0 2006.232.08:15:39.60#ibcon#about to read 3, iclass 23, count 0 2006.232.08:15:39.62#ibcon#read 3, iclass 23, count 0 2006.232.08:15:39.62#ibcon#about to read 4, iclass 23, count 0 2006.232.08:15:39.62#ibcon#read 4, iclass 23, count 0 2006.232.08:15:39.62#ibcon#about to read 5, iclass 23, count 0 2006.232.08:15:39.62#ibcon#read 5, iclass 23, count 0 2006.232.08:15:39.62#ibcon#about to read 6, iclass 23, count 0 2006.232.08:15:39.62#ibcon#read 6, iclass 23, count 0 2006.232.08:15:39.62#ibcon#end of sib2, iclass 23, count 0 2006.232.08:15:39.62#ibcon#*after write, iclass 23, count 0 2006.232.08:15:39.62#ibcon#*before return 0, iclass 23, count 0 2006.232.08:15:39.62#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.232.08:15:39.62#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.232.08:15:39.62#ibcon#about to clear, iclass 23 cls_cnt 0 2006.232.08:15:39.62#ibcon#cleared, iclass 23 cls_cnt 0 2006.232.08:15:39.62$vc4f8/valo=6,772.99 2006.232.08:15:39.62#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.232.08:15:39.62#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.232.08:15:39.62#ibcon#ireg 17 cls_cnt 0 2006.232.08:15:39.62#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:15:39.62#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:15:39.62#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:15:39.62#ibcon#enter wrdev, iclass 25, count 0 2006.232.08:15:39.62#ibcon#first serial, iclass 25, count 0 2006.232.08:15:39.62#ibcon#enter sib2, iclass 25, count 0 2006.232.08:15:39.62#ibcon#flushed, iclass 25, count 0 2006.232.08:15:39.62#ibcon#about to write, iclass 25, count 0 2006.232.08:15:39.62#ibcon#wrote, iclass 25, count 0 2006.232.08:15:39.62#ibcon#about to read 3, iclass 25, count 0 2006.232.08:15:39.64#ibcon#read 3, iclass 25, count 0 2006.232.08:15:39.64#ibcon#about to read 4, iclass 25, count 0 2006.232.08:15:39.64#ibcon#read 4, iclass 25, count 0 2006.232.08:15:39.64#ibcon#about to read 5, iclass 25, count 0 2006.232.08:15:39.64#ibcon#read 5, iclass 25, count 0 2006.232.08:15:39.64#ibcon#about to read 6, iclass 25, count 0 2006.232.08:15:39.64#ibcon#read 6, iclass 25, count 0 2006.232.08:15:39.64#ibcon#end of sib2, iclass 25, count 0 2006.232.08:15:39.64#ibcon#*mode == 0, iclass 25, count 0 2006.232.08:15:39.64#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.232.08:15:39.64#ibcon#[26=FRQ=06,772.99\r\n] 2006.232.08:15:39.64#ibcon#*before write, iclass 25, count 0 2006.232.08:15:39.64#ibcon#enter sib2, iclass 25, count 0 2006.232.08:15:39.64#ibcon#flushed, iclass 25, count 0 2006.232.08:15:39.64#ibcon#about to write, iclass 25, count 0 2006.232.08:15:39.64#ibcon#wrote, iclass 25, count 0 2006.232.08:15:39.64#ibcon#about to read 3, iclass 25, count 0 2006.232.08:15:39.68#ibcon#read 3, iclass 25, count 0 2006.232.08:15:39.68#ibcon#about to read 4, iclass 25, count 0 2006.232.08:15:39.68#ibcon#read 4, iclass 25, count 0 2006.232.08:15:39.68#ibcon#about to read 5, iclass 25, count 0 2006.232.08:15:39.68#ibcon#read 5, iclass 25, count 0 2006.232.08:15:39.68#ibcon#about to read 6, iclass 25, count 0 2006.232.08:15:39.68#ibcon#read 6, iclass 25, count 0 2006.232.08:15:39.68#ibcon#end of sib2, iclass 25, count 0 2006.232.08:15:39.68#ibcon#*after write, iclass 25, count 0 2006.232.08:15:39.68#ibcon#*before return 0, iclass 25, count 0 2006.232.08:15:39.68#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:15:39.68#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:15:39.68#ibcon#about to clear, iclass 25 cls_cnt 0 2006.232.08:15:39.68#ibcon#cleared, iclass 25 cls_cnt 0 2006.232.08:15:39.68$vc4f8/va=6,6 2006.232.08:15:39.68#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.232.08:15:39.68#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.232.08:15:39.68#ibcon#ireg 11 cls_cnt 2 2006.232.08:15:39.68#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:15:39.74#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:15:39.74#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:15:39.74#ibcon#enter wrdev, iclass 27, count 2 2006.232.08:15:39.74#ibcon#first serial, iclass 27, count 2 2006.232.08:15:39.74#ibcon#enter sib2, iclass 27, count 2 2006.232.08:15:39.74#ibcon#flushed, iclass 27, count 2 2006.232.08:15:39.74#ibcon#about to write, iclass 27, count 2 2006.232.08:15:39.74#ibcon#wrote, iclass 27, count 2 2006.232.08:15:39.74#ibcon#about to read 3, iclass 27, count 2 2006.232.08:15:39.76#ibcon#read 3, iclass 27, count 2 2006.232.08:15:39.76#ibcon#about to read 4, iclass 27, count 2 2006.232.08:15:39.76#ibcon#read 4, iclass 27, count 2 2006.232.08:15:39.76#ibcon#about to read 5, iclass 27, count 2 2006.232.08:15:39.76#ibcon#read 5, iclass 27, count 2 2006.232.08:15:39.76#ibcon#about to read 6, iclass 27, count 2 2006.232.08:15:39.76#ibcon#read 6, iclass 27, count 2 2006.232.08:15:39.76#ibcon#end of sib2, iclass 27, count 2 2006.232.08:15:39.76#ibcon#*mode == 0, iclass 27, count 2 2006.232.08:15:39.76#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.232.08:15:39.76#ibcon#[25=AT06-06\r\n] 2006.232.08:15:39.76#ibcon#*before write, iclass 27, count 2 2006.232.08:15:39.76#ibcon#enter sib2, iclass 27, count 2 2006.232.08:15:39.76#ibcon#flushed, iclass 27, count 2 2006.232.08:15:39.76#ibcon#about to write, iclass 27, count 2 2006.232.08:15:39.76#ibcon#wrote, iclass 27, count 2 2006.232.08:15:39.76#ibcon#about to read 3, iclass 27, count 2 2006.232.08:15:39.79#ibcon#read 3, iclass 27, count 2 2006.232.08:15:39.79#ibcon#about to read 4, iclass 27, count 2 2006.232.08:15:39.79#ibcon#read 4, iclass 27, count 2 2006.232.08:15:39.79#ibcon#about to read 5, iclass 27, count 2 2006.232.08:15:39.79#ibcon#read 5, iclass 27, count 2 2006.232.08:15:39.79#ibcon#about to read 6, iclass 27, count 2 2006.232.08:15:39.79#ibcon#read 6, iclass 27, count 2 2006.232.08:15:39.79#ibcon#end of sib2, iclass 27, count 2 2006.232.08:15:39.79#ibcon#*after write, iclass 27, count 2 2006.232.08:15:39.79#ibcon#*before return 0, iclass 27, count 2 2006.232.08:15:39.79#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:15:39.79#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:15:39.79#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.232.08:15:39.79#ibcon#ireg 7 cls_cnt 0 2006.232.08:15:39.79#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:15:39.91#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:15:39.91#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:15:39.91#ibcon#enter wrdev, iclass 27, count 0 2006.232.08:15:39.91#ibcon#first serial, iclass 27, count 0 2006.232.08:15:39.91#ibcon#enter sib2, iclass 27, count 0 2006.232.08:15:39.91#ibcon#flushed, iclass 27, count 0 2006.232.08:15:39.91#ibcon#about to write, iclass 27, count 0 2006.232.08:15:39.91#ibcon#wrote, iclass 27, count 0 2006.232.08:15:39.91#ibcon#about to read 3, iclass 27, count 0 2006.232.08:15:39.93#ibcon#read 3, iclass 27, count 0 2006.232.08:15:39.93#ibcon#about to read 4, iclass 27, count 0 2006.232.08:15:39.93#ibcon#read 4, iclass 27, count 0 2006.232.08:15:39.93#ibcon#about to read 5, iclass 27, count 0 2006.232.08:15:39.93#ibcon#read 5, iclass 27, count 0 2006.232.08:15:39.93#ibcon#about to read 6, iclass 27, count 0 2006.232.08:15:39.93#ibcon#read 6, iclass 27, count 0 2006.232.08:15:39.93#ibcon#end of sib2, iclass 27, count 0 2006.232.08:15:39.93#ibcon#*mode == 0, iclass 27, count 0 2006.232.08:15:39.93#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.232.08:15:39.93#ibcon#[25=USB\r\n] 2006.232.08:15:39.93#ibcon#*before write, iclass 27, count 0 2006.232.08:15:39.93#ibcon#enter sib2, iclass 27, count 0 2006.232.08:15:39.93#ibcon#flushed, iclass 27, count 0 2006.232.08:15:39.93#ibcon#about to write, iclass 27, count 0 2006.232.08:15:39.93#ibcon#wrote, iclass 27, count 0 2006.232.08:15:39.93#ibcon#about to read 3, iclass 27, count 0 2006.232.08:15:39.96#ibcon#read 3, iclass 27, count 0 2006.232.08:15:39.96#ibcon#about to read 4, iclass 27, count 0 2006.232.08:15:39.96#ibcon#read 4, iclass 27, count 0 2006.232.08:15:39.96#ibcon#about to read 5, iclass 27, count 0 2006.232.08:15:39.96#ibcon#read 5, iclass 27, count 0 2006.232.08:15:39.96#ibcon#about to read 6, iclass 27, count 0 2006.232.08:15:39.96#ibcon#read 6, iclass 27, count 0 2006.232.08:15:39.96#ibcon#end of sib2, iclass 27, count 0 2006.232.08:15:39.96#ibcon#*after write, iclass 27, count 0 2006.232.08:15:39.96#ibcon#*before return 0, iclass 27, count 0 2006.232.08:15:39.96#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:15:39.96#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:15:39.96#ibcon#about to clear, iclass 27 cls_cnt 0 2006.232.08:15:39.96#ibcon#cleared, iclass 27 cls_cnt 0 2006.232.08:15:39.96$vc4f8/valo=7,832.99 2006.232.08:15:39.96#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.232.08:15:39.96#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.232.08:15:39.96#ibcon#ireg 17 cls_cnt 0 2006.232.08:15:39.96#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:15:39.96#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:15:39.96#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:15:39.96#ibcon#enter wrdev, iclass 29, count 0 2006.232.08:15:39.96#ibcon#first serial, iclass 29, count 0 2006.232.08:15:39.96#ibcon#enter sib2, iclass 29, count 0 2006.232.08:15:39.96#ibcon#flushed, iclass 29, count 0 2006.232.08:15:39.96#ibcon#about to write, iclass 29, count 0 2006.232.08:15:39.96#ibcon#wrote, iclass 29, count 0 2006.232.08:15:39.96#ibcon#about to read 3, iclass 29, count 0 2006.232.08:15:39.98#ibcon#read 3, iclass 29, count 0 2006.232.08:15:39.98#ibcon#about to read 4, iclass 29, count 0 2006.232.08:15:39.98#ibcon#read 4, iclass 29, count 0 2006.232.08:15:39.98#ibcon#about to read 5, iclass 29, count 0 2006.232.08:15:39.98#ibcon#read 5, iclass 29, count 0 2006.232.08:15:39.98#ibcon#about to read 6, iclass 29, count 0 2006.232.08:15:39.98#ibcon#read 6, iclass 29, count 0 2006.232.08:15:39.98#ibcon#end of sib2, iclass 29, count 0 2006.232.08:15:39.98#ibcon#*mode == 0, iclass 29, count 0 2006.232.08:15:39.98#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.232.08:15:39.98#ibcon#[26=FRQ=07,832.99\r\n] 2006.232.08:15:39.98#ibcon#*before write, iclass 29, count 0 2006.232.08:15:39.98#ibcon#enter sib2, iclass 29, count 0 2006.232.08:15:39.98#ibcon#flushed, iclass 29, count 0 2006.232.08:15:39.98#ibcon#about to write, iclass 29, count 0 2006.232.08:15:39.98#ibcon#wrote, iclass 29, count 0 2006.232.08:15:39.98#ibcon#about to read 3, iclass 29, count 0 2006.232.08:15:40.02#ibcon#read 3, iclass 29, count 0 2006.232.08:15:40.02#ibcon#about to read 4, iclass 29, count 0 2006.232.08:15:40.02#ibcon#read 4, iclass 29, count 0 2006.232.08:15:40.02#ibcon#about to read 5, iclass 29, count 0 2006.232.08:15:40.02#ibcon#read 5, iclass 29, count 0 2006.232.08:15:40.02#ibcon#about to read 6, iclass 29, count 0 2006.232.08:15:40.02#ibcon#read 6, iclass 29, count 0 2006.232.08:15:40.02#ibcon#end of sib2, iclass 29, count 0 2006.232.08:15:40.02#ibcon#*after write, iclass 29, count 0 2006.232.08:15:40.02#ibcon#*before return 0, iclass 29, count 0 2006.232.08:15:40.02#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:15:40.02#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:15:40.02#ibcon#about to clear, iclass 29 cls_cnt 0 2006.232.08:15:40.02#ibcon#cleared, iclass 29 cls_cnt 0 2006.232.08:15:40.02$vc4f8/va=7,6 2006.232.08:15:40.02#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.232.08:15:40.02#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.232.08:15:40.02#ibcon#ireg 11 cls_cnt 2 2006.232.08:15:40.02#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.232.08:15:40.08#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.232.08:15:40.08#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.232.08:15:40.08#ibcon#enter wrdev, iclass 31, count 2 2006.232.08:15:40.08#ibcon#first serial, iclass 31, count 2 2006.232.08:15:40.08#ibcon#enter sib2, iclass 31, count 2 2006.232.08:15:40.08#ibcon#flushed, iclass 31, count 2 2006.232.08:15:40.08#ibcon#about to write, iclass 31, count 2 2006.232.08:15:40.08#ibcon#wrote, iclass 31, count 2 2006.232.08:15:40.08#ibcon#about to read 3, iclass 31, count 2 2006.232.08:15:40.10#ibcon#read 3, iclass 31, count 2 2006.232.08:15:40.10#ibcon#about to read 4, iclass 31, count 2 2006.232.08:15:40.10#ibcon#read 4, iclass 31, count 2 2006.232.08:15:40.10#ibcon#about to read 5, iclass 31, count 2 2006.232.08:15:40.10#ibcon#read 5, iclass 31, count 2 2006.232.08:15:40.10#ibcon#about to read 6, iclass 31, count 2 2006.232.08:15:40.10#ibcon#read 6, iclass 31, count 2 2006.232.08:15:40.10#ibcon#end of sib2, iclass 31, count 2 2006.232.08:15:40.10#ibcon#*mode == 0, iclass 31, count 2 2006.232.08:15:40.10#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.232.08:15:40.10#ibcon#[25=AT07-06\r\n] 2006.232.08:15:40.10#ibcon#*before write, iclass 31, count 2 2006.232.08:15:40.10#ibcon#enter sib2, iclass 31, count 2 2006.232.08:15:40.10#ibcon#flushed, iclass 31, count 2 2006.232.08:15:40.10#ibcon#about to write, iclass 31, count 2 2006.232.08:15:40.10#ibcon#wrote, iclass 31, count 2 2006.232.08:15:40.10#ibcon#about to read 3, iclass 31, count 2 2006.232.08:15:40.13#ibcon#read 3, iclass 31, count 2 2006.232.08:15:40.13#ibcon#about to read 4, iclass 31, count 2 2006.232.08:15:40.13#ibcon#read 4, iclass 31, count 2 2006.232.08:15:40.13#ibcon#about to read 5, iclass 31, count 2 2006.232.08:15:40.13#ibcon#read 5, iclass 31, count 2 2006.232.08:15:40.13#ibcon#about to read 6, iclass 31, count 2 2006.232.08:15:40.13#ibcon#read 6, iclass 31, count 2 2006.232.08:15:40.13#ibcon#end of sib2, iclass 31, count 2 2006.232.08:15:40.13#ibcon#*after write, iclass 31, count 2 2006.232.08:15:40.13#ibcon#*before return 0, iclass 31, count 2 2006.232.08:15:40.13#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.232.08:15:40.13#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.232.08:15:40.13#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.232.08:15:40.13#ibcon#ireg 7 cls_cnt 0 2006.232.08:15:40.13#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.232.08:15:40.25#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.232.08:15:40.25#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.232.08:15:40.25#ibcon#enter wrdev, iclass 31, count 0 2006.232.08:15:40.25#ibcon#first serial, iclass 31, count 0 2006.232.08:15:40.25#ibcon#enter sib2, iclass 31, count 0 2006.232.08:15:40.25#ibcon#flushed, iclass 31, count 0 2006.232.08:15:40.25#ibcon#about to write, iclass 31, count 0 2006.232.08:15:40.25#ibcon#wrote, iclass 31, count 0 2006.232.08:15:40.25#ibcon#about to read 3, iclass 31, count 0 2006.232.08:15:40.27#ibcon#read 3, iclass 31, count 0 2006.232.08:15:40.27#ibcon#about to read 4, iclass 31, count 0 2006.232.08:15:40.27#ibcon#read 4, iclass 31, count 0 2006.232.08:15:40.27#ibcon#about to read 5, iclass 31, count 0 2006.232.08:15:40.27#ibcon#read 5, iclass 31, count 0 2006.232.08:15:40.27#ibcon#about to read 6, iclass 31, count 0 2006.232.08:15:40.27#ibcon#read 6, iclass 31, count 0 2006.232.08:15:40.27#ibcon#end of sib2, iclass 31, count 0 2006.232.08:15:40.27#ibcon#*mode == 0, iclass 31, count 0 2006.232.08:15:40.27#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.232.08:15:40.27#ibcon#[25=USB\r\n] 2006.232.08:15:40.27#ibcon#*before write, iclass 31, count 0 2006.232.08:15:40.27#ibcon#enter sib2, iclass 31, count 0 2006.232.08:15:40.27#ibcon#flushed, iclass 31, count 0 2006.232.08:15:40.27#ibcon#about to write, iclass 31, count 0 2006.232.08:15:40.27#ibcon#wrote, iclass 31, count 0 2006.232.08:15:40.27#ibcon#about to read 3, iclass 31, count 0 2006.232.08:15:40.30#ibcon#read 3, iclass 31, count 0 2006.232.08:15:40.30#ibcon#about to read 4, iclass 31, count 0 2006.232.08:15:40.30#ibcon#read 4, iclass 31, count 0 2006.232.08:15:40.30#ibcon#about to read 5, iclass 31, count 0 2006.232.08:15:40.30#ibcon#read 5, iclass 31, count 0 2006.232.08:15:40.30#ibcon#about to read 6, iclass 31, count 0 2006.232.08:15:40.30#ibcon#read 6, iclass 31, count 0 2006.232.08:15:40.30#ibcon#end of sib2, iclass 31, count 0 2006.232.08:15:40.30#ibcon#*after write, iclass 31, count 0 2006.232.08:15:40.30#ibcon#*before return 0, iclass 31, count 0 2006.232.08:15:40.30#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.232.08:15:40.30#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.232.08:15:40.30#ibcon#about to clear, iclass 31 cls_cnt 0 2006.232.08:15:40.30#ibcon#cleared, iclass 31 cls_cnt 0 2006.232.08:15:40.30$vc4f8/valo=8,852.99 2006.232.08:15:40.30#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.232.08:15:40.30#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.232.08:15:40.30#ibcon#ireg 17 cls_cnt 0 2006.232.08:15:40.30#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.232.08:15:40.30#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.232.08:15:40.30#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.232.08:15:40.30#ibcon#enter wrdev, iclass 33, count 0 2006.232.08:15:40.30#ibcon#first serial, iclass 33, count 0 2006.232.08:15:40.30#ibcon#enter sib2, iclass 33, count 0 2006.232.08:15:40.30#ibcon#flushed, iclass 33, count 0 2006.232.08:15:40.30#ibcon#about to write, iclass 33, count 0 2006.232.08:15:40.30#ibcon#wrote, iclass 33, count 0 2006.232.08:15:40.30#ibcon#about to read 3, iclass 33, count 0 2006.232.08:15:40.33#ibcon#read 3, iclass 33, count 0 2006.232.08:15:40.33#ibcon#about to read 4, iclass 33, count 0 2006.232.08:15:40.33#ibcon#read 4, iclass 33, count 0 2006.232.08:15:40.33#ibcon#about to read 5, iclass 33, count 0 2006.232.08:15:40.33#ibcon#read 5, iclass 33, count 0 2006.232.08:15:40.33#ibcon#about to read 6, iclass 33, count 0 2006.232.08:15:40.33#ibcon#read 6, iclass 33, count 0 2006.232.08:15:40.33#ibcon#end of sib2, iclass 33, count 0 2006.232.08:15:40.33#ibcon#*mode == 0, iclass 33, count 0 2006.232.08:15:40.33#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.232.08:15:40.33#ibcon#[26=FRQ=08,852.99\r\n] 2006.232.08:15:40.33#ibcon#*before write, iclass 33, count 0 2006.232.08:15:40.33#ibcon#enter sib2, iclass 33, count 0 2006.232.08:15:40.33#ibcon#flushed, iclass 33, count 0 2006.232.08:15:40.33#ibcon#about to write, iclass 33, count 0 2006.232.08:15:40.33#ibcon#wrote, iclass 33, count 0 2006.232.08:15:40.33#ibcon#about to read 3, iclass 33, count 0 2006.232.08:15:40.37#ibcon#read 3, iclass 33, count 0 2006.232.08:15:40.37#ibcon#about to read 4, iclass 33, count 0 2006.232.08:15:40.37#ibcon#read 4, iclass 33, count 0 2006.232.08:15:40.37#ibcon#about to read 5, iclass 33, count 0 2006.232.08:15:40.37#ibcon#read 5, iclass 33, count 0 2006.232.08:15:40.37#ibcon#about to read 6, iclass 33, count 0 2006.232.08:15:40.37#ibcon#read 6, iclass 33, count 0 2006.232.08:15:40.37#ibcon#end of sib2, iclass 33, count 0 2006.232.08:15:40.37#ibcon#*after write, iclass 33, count 0 2006.232.08:15:40.37#ibcon#*before return 0, iclass 33, count 0 2006.232.08:15:40.37#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.232.08:15:40.37#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.232.08:15:40.37#ibcon#about to clear, iclass 33 cls_cnt 0 2006.232.08:15:40.37#ibcon#cleared, iclass 33 cls_cnt 0 2006.232.08:15:40.37$vc4f8/va=8,6 2006.232.08:15:40.37#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.232.08:15:40.37#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.232.08:15:40.37#ibcon#ireg 11 cls_cnt 2 2006.232.08:15:40.37#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.232.08:15:40.42#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.232.08:15:40.42#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.232.08:15:40.42#ibcon#enter wrdev, iclass 35, count 2 2006.232.08:15:40.42#ibcon#first serial, iclass 35, count 2 2006.232.08:15:40.42#ibcon#enter sib2, iclass 35, count 2 2006.232.08:15:40.42#ibcon#flushed, iclass 35, count 2 2006.232.08:15:40.42#ibcon#about to write, iclass 35, count 2 2006.232.08:15:40.42#ibcon#wrote, iclass 35, count 2 2006.232.08:15:40.42#ibcon#about to read 3, iclass 35, count 2 2006.232.08:15:40.44#ibcon#read 3, iclass 35, count 2 2006.232.08:15:40.44#ibcon#about to read 4, iclass 35, count 2 2006.232.08:15:40.44#ibcon#read 4, iclass 35, count 2 2006.232.08:15:40.44#ibcon#about to read 5, iclass 35, count 2 2006.232.08:15:40.44#ibcon#read 5, iclass 35, count 2 2006.232.08:15:40.44#ibcon#about to read 6, iclass 35, count 2 2006.232.08:15:40.44#ibcon#read 6, iclass 35, count 2 2006.232.08:15:40.44#ibcon#end of sib2, iclass 35, count 2 2006.232.08:15:40.44#ibcon#*mode == 0, iclass 35, count 2 2006.232.08:15:40.44#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.232.08:15:40.44#ibcon#[25=AT08-06\r\n] 2006.232.08:15:40.44#ibcon#*before write, iclass 35, count 2 2006.232.08:15:40.44#ibcon#enter sib2, iclass 35, count 2 2006.232.08:15:40.44#ibcon#flushed, iclass 35, count 2 2006.232.08:15:40.44#ibcon#about to write, iclass 35, count 2 2006.232.08:15:40.44#ibcon#wrote, iclass 35, count 2 2006.232.08:15:40.44#ibcon#about to read 3, iclass 35, count 2 2006.232.08:15:40.47#ibcon#read 3, iclass 35, count 2 2006.232.08:15:40.47#ibcon#about to read 4, iclass 35, count 2 2006.232.08:15:40.47#ibcon#read 4, iclass 35, count 2 2006.232.08:15:40.47#ibcon#about to read 5, iclass 35, count 2 2006.232.08:15:40.47#ibcon#read 5, iclass 35, count 2 2006.232.08:15:40.47#ibcon#about to read 6, iclass 35, count 2 2006.232.08:15:40.47#ibcon#read 6, iclass 35, count 2 2006.232.08:15:40.47#ibcon#end of sib2, iclass 35, count 2 2006.232.08:15:40.47#ibcon#*after write, iclass 35, count 2 2006.232.08:15:40.47#ibcon#*before return 0, iclass 35, count 2 2006.232.08:15:40.47#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.232.08:15:40.47#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.232.08:15:40.47#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.232.08:15:40.47#ibcon#ireg 7 cls_cnt 0 2006.232.08:15:40.47#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.232.08:15:40.59#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.232.08:15:40.59#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.232.08:15:40.59#ibcon#enter wrdev, iclass 35, count 0 2006.232.08:15:40.59#ibcon#first serial, iclass 35, count 0 2006.232.08:15:40.59#ibcon#enter sib2, iclass 35, count 0 2006.232.08:15:40.59#ibcon#flushed, iclass 35, count 0 2006.232.08:15:40.59#ibcon#about to write, iclass 35, count 0 2006.232.08:15:40.59#ibcon#wrote, iclass 35, count 0 2006.232.08:15:40.59#ibcon#about to read 3, iclass 35, count 0 2006.232.08:15:40.61#ibcon#read 3, iclass 35, count 0 2006.232.08:15:40.61#ibcon#about to read 4, iclass 35, count 0 2006.232.08:15:40.61#ibcon#read 4, iclass 35, count 0 2006.232.08:15:40.61#ibcon#about to read 5, iclass 35, count 0 2006.232.08:15:40.61#ibcon#read 5, iclass 35, count 0 2006.232.08:15:40.61#ibcon#about to read 6, iclass 35, count 0 2006.232.08:15:40.61#ibcon#read 6, iclass 35, count 0 2006.232.08:15:40.61#ibcon#end of sib2, iclass 35, count 0 2006.232.08:15:40.61#ibcon#*mode == 0, iclass 35, count 0 2006.232.08:15:40.61#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.232.08:15:40.61#ibcon#[25=USB\r\n] 2006.232.08:15:40.61#ibcon#*before write, iclass 35, count 0 2006.232.08:15:40.61#ibcon#enter sib2, iclass 35, count 0 2006.232.08:15:40.61#ibcon#flushed, iclass 35, count 0 2006.232.08:15:40.61#ibcon#about to write, iclass 35, count 0 2006.232.08:15:40.61#ibcon#wrote, iclass 35, count 0 2006.232.08:15:40.61#ibcon#about to read 3, iclass 35, count 0 2006.232.08:15:40.64#ibcon#read 3, iclass 35, count 0 2006.232.08:15:40.64#ibcon#about to read 4, iclass 35, count 0 2006.232.08:15:40.64#ibcon#read 4, iclass 35, count 0 2006.232.08:15:40.64#ibcon#about to read 5, iclass 35, count 0 2006.232.08:15:40.64#ibcon#read 5, iclass 35, count 0 2006.232.08:15:40.64#ibcon#about to read 6, iclass 35, count 0 2006.232.08:15:40.64#ibcon#read 6, iclass 35, count 0 2006.232.08:15:40.64#ibcon#end of sib2, iclass 35, count 0 2006.232.08:15:40.64#ibcon#*after write, iclass 35, count 0 2006.232.08:15:40.64#ibcon#*before return 0, iclass 35, count 0 2006.232.08:15:40.64#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.232.08:15:40.64#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.232.08:15:40.64#ibcon#about to clear, iclass 35 cls_cnt 0 2006.232.08:15:40.64#ibcon#cleared, iclass 35 cls_cnt 0 2006.232.08:15:40.64$vc4f8/vblo=1,632.99 2006.232.08:15:40.64#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.232.08:15:40.64#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.232.08:15:40.64#ibcon#ireg 17 cls_cnt 0 2006.232.08:15:40.64#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.232.08:15:40.64#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.232.08:15:40.64#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.232.08:15:40.64#ibcon#enter wrdev, iclass 37, count 0 2006.232.08:15:40.64#ibcon#first serial, iclass 37, count 0 2006.232.08:15:40.64#ibcon#enter sib2, iclass 37, count 0 2006.232.08:15:40.64#ibcon#flushed, iclass 37, count 0 2006.232.08:15:40.64#ibcon#about to write, iclass 37, count 0 2006.232.08:15:40.64#ibcon#wrote, iclass 37, count 0 2006.232.08:15:40.64#ibcon#about to read 3, iclass 37, count 0 2006.232.08:15:40.66#ibcon#read 3, iclass 37, count 0 2006.232.08:15:40.66#ibcon#about to read 4, iclass 37, count 0 2006.232.08:15:40.66#ibcon#read 4, iclass 37, count 0 2006.232.08:15:40.66#ibcon#about to read 5, iclass 37, count 0 2006.232.08:15:40.66#ibcon#read 5, iclass 37, count 0 2006.232.08:15:40.66#ibcon#about to read 6, iclass 37, count 0 2006.232.08:15:40.66#ibcon#read 6, iclass 37, count 0 2006.232.08:15:40.66#ibcon#end of sib2, iclass 37, count 0 2006.232.08:15:40.66#ibcon#*mode == 0, iclass 37, count 0 2006.232.08:15:40.66#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.232.08:15:40.66#ibcon#[28=FRQ=01,632.99\r\n] 2006.232.08:15:40.66#ibcon#*before write, iclass 37, count 0 2006.232.08:15:40.66#ibcon#enter sib2, iclass 37, count 0 2006.232.08:15:40.66#ibcon#flushed, iclass 37, count 0 2006.232.08:15:40.66#ibcon#about to write, iclass 37, count 0 2006.232.08:15:40.66#ibcon#wrote, iclass 37, count 0 2006.232.08:15:40.66#ibcon#about to read 3, iclass 37, count 0 2006.232.08:15:40.70#ibcon#read 3, iclass 37, count 0 2006.232.08:15:40.70#ibcon#about to read 4, iclass 37, count 0 2006.232.08:15:40.70#ibcon#read 4, iclass 37, count 0 2006.232.08:15:40.70#ibcon#about to read 5, iclass 37, count 0 2006.232.08:15:40.70#ibcon#read 5, iclass 37, count 0 2006.232.08:15:40.70#ibcon#about to read 6, iclass 37, count 0 2006.232.08:15:40.70#ibcon#read 6, iclass 37, count 0 2006.232.08:15:40.70#ibcon#end of sib2, iclass 37, count 0 2006.232.08:15:40.70#ibcon#*after write, iclass 37, count 0 2006.232.08:15:40.70#ibcon#*before return 0, iclass 37, count 0 2006.232.08:15:40.70#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.232.08:15:40.70#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.232.08:15:40.70#ibcon#about to clear, iclass 37 cls_cnt 0 2006.232.08:15:40.70#ibcon#cleared, iclass 37 cls_cnt 0 2006.232.08:15:40.70$vc4f8/vb=1,4 2006.232.08:15:40.70#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.232.08:15:40.70#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.232.08:15:40.70#ibcon#ireg 11 cls_cnt 2 2006.232.08:15:40.70#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.232.08:15:40.70#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.232.08:15:40.70#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.232.08:15:40.70#ibcon#enter wrdev, iclass 39, count 2 2006.232.08:15:40.70#ibcon#first serial, iclass 39, count 2 2006.232.08:15:40.70#ibcon#enter sib2, iclass 39, count 2 2006.232.08:15:40.70#ibcon#flushed, iclass 39, count 2 2006.232.08:15:40.70#ibcon#about to write, iclass 39, count 2 2006.232.08:15:40.70#ibcon#wrote, iclass 39, count 2 2006.232.08:15:40.70#ibcon#about to read 3, iclass 39, count 2 2006.232.08:15:40.72#ibcon#read 3, iclass 39, count 2 2006.232.08:15:40.72#ibcon#about to read 4, iclass 39, count 2 2006.232.08:15:40.72#ibcon#read 4, iclass 39, count 2 2006.232.08:15:40.72#ibcon#about to read 5, iclass 39, count 2 2006.232.08:15:40.72#ibcon#read 5, iclass 39, count 2 2006.232.08:15:40.72#ibcon#about to read 6, iclass 39, count 2 2006.232.08:15:40.72#ibcon#read 6, iclass 39, count 2 2006.232.08:15:40.72#ibcon#end of sib2, iclass 39, count 2 2006.232.08:15:40.72#ibcon#*mode == 0, iclass 39, count 2 2006.232.08:15:40.72#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.232.08:15:40.72#ibcon#[27=AT01-04\r\n] 2006.232.08:15:40.72#ibcon#*before write, iclass 39, count 2 2006.232.08:15:40.72#ibcon#enter sib2, iclass 39, count 2 2006.232.08:15:40.72#ibcon#flushed, iclass 39, count 2 2006.232.08:15:40.72#ibcon#about to write, iclass 39, count 2 2006.232.08:15:40.72#ibcon#wrote, iclass 39, count 2 2006.232.08:15:40.72#ibcon#about to read 3, iclass 39, count 2 2006.232.08:15:40.75#ibcon#read 3, iclass 39, count 2 2006.232.08:15:40.75#ibcon#about to read 4, iclass 39, count 2 2006.232.08:15:40.75#ibcon#read 4, iclass 39, count 2 2006.232.08:15:40.75#ibcon#about to read 5, iclass 39, count 2 2006.232.08:15:40.75#ibcon#read 5, iclass 39, count 2 2006.232.08:15:40.75#ibcon#about to read 6, iclass 39, count 2 2006.232.08:15:40.75#ibcon#read 6, iclass 39, count 2 2006.232.08:15:40.75#ibcon#end of sib2, iclass 39, count 2 2006.232.08:15:40.75#ibcon#*after write, iclass 39, count 2 2006.232.08:15:40.75#ibcon#*before return 0, iclass 39, count 2 2006.232.08:15:40.75#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.232.08:15:40.75#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.232.08:15:40.75#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.232.08:15:40.75#ibcon#ireg 7 cls_cnt 0 2006.232.08:15:40.75#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.232.08:15:40.87#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.232.08:15:40.87#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.232.08:15:40.87#ibcon#enter wrdev, iclass 39, count 0 2006.232.08:15:40.87#ibcon#first serial, iclass 39, count 0 2006.232.08:15:40.87#ibcon#enter sib2, iclass 39, count 0 2006.232.08:15:40.87#ibcon#flushed, iclass 39, count 0 2006.232.08:15:40.87#ibcon#about to write, iclass 39, count 0 2006.232.08:15:40.87#ibcon#wrote, iclass 39, count 0 2006.232.08:15:40.87#ibcon#about to read 3, iclass 39, count 0 2006.232.08:15:40.89#ibcon#read 3, iclass 39, count 0 2006.232.08:15:40.89#ibcon#about to read 4, iclass 39, count 0 2006.232.08:15:40.89#ibcon#read 4, iclass 39, count 0 2006.232.08:15:40.89#ibcon#about to read 5, iclass 39, count 0 2006.232.08:15:40.89#ibcon#read 5, iclass 39, count 0 2006.232.08:15:40.89#ibcon#about to read 6, iclass 39, count 0 2006.232.08:15:40.89#ibcon#read 6, iclass 39, count 0 2006.232.08:15:40.89#ibcon#end of sib2, iclass 39, count 0 2006.232.08:15:40.89#ibcon#*mode == 0, iclass 39, count 0 2006.232.08:15:40.89#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.232.08:15:40.89#ibcon#[27=USB\r\n] 2006.232.08:15:40.89#ibcon#*before write, iclass 39, count 0 2006.232.08:15:40.89#ibcon#enter sib2, iclass 39, count 0 2006.232.08:15:40.89#ibcon#flushed, iclass 39, count 0 2006.232.08:15:40.89#ibcon#about to write, iclass 39, count 0 2006.232.08:15:40.89#ibcon#wrote, iclass 39, count 0 2006.232.08:15:40.89#ibcon#about to read 3, iclass 39, count 0 2006.232.08:15:40.92#ibcon#read 3, iclass 39, count 0 2006.232.08:15:40.92#ibcon#about to read 4, iclass 39, count 0 2006.232.08:15:40.92#ibcon#read 4, iclass 39, count 0 2006.232.08:15:40.92#ibcon#about to read 5, iclass 39, count 0 2006.232.08:15:40.92#ibcon#read 5, iclass 39, count 0 2006.232.08:15:40.92#ibcon#about to read 6, iclass 39, count 0 2006.232.08:15:40.92#ibcon#read 6, iclass 39, count 0 2006.232.08:15:40.92#ibcon#end of sib2, iclass 39, count 0 2006.232.08:15:40.92#ibcon#*after write, iclass 39, count 0 2006.232.08:15:40.92#ibcon#*before return 0, iclass 39, count 0 2006.232.08:15:40.92#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.232.08:15:40.92#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.232.08:15:40.92#ibcon#about to clear, iclass 39 cls_cnt 0 2006.232.08:15:40.92#ibcon#cleared, iclass 39 cls_cnt 0 2006.232.08:15:40.92$vc4f8/vblo=2,640.99 2006.232.08:15:40.92#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.232.08:15:40.92#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.232.08:15:40.92#ibcon#ireg 17 cls_cnt 0 2006.232.08:15:40.92#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:15:40.92#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:15:40.92#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:15:40.92#ibcon#enter wrdev, iclass 3, count 0 2006.232.08:15:40.92#ibcon#first serial, iclass 3, count 0 2006.232.08:15:40.92#ibcon#enter sib2, iclass 3, count 0 2006.232.08:15:40.92#ibcon#flushed, iclass 3, count 0 2006.232.08:15:40.92#ibcon#about to write, iclass 3, count 0 2006.232.08:15:40.92#ibcon#wrote, iclass 3, count 0 2006.232.08:15:40.92#ibcon#about to read 3, iclass 3, count 0 2006.232.08:15:40.94#ibcon#read 3, iclass 3, count 0 2006.232.08:15:40.94#ibcon#about to read 4, iclass 3, count 0 2006.232.08:15:40.94#ibcon#read 4, iclass 3, count 0 2006.232.08:15:40.94#ibcon#about to read 5, iclass 3, count 0 2006.232.08:15:40.94#ibcon#read 5, iclass 3, count 0 2006.232.08:15:40.94#ibcon#about to read 6, iclass 3, count 0 2006.232.08:15:40.94#ibcon#read 6, iclass 3, count 0 2006.232.08:15:40.94#ibcon#end of sib2, iclass 3, count 0 2006.232.08:15:40.94#ibcon#*mode == 0, iclass 3, count 0 2006.232.08:15:40.94#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.232.08:15:40.94#ibcon#[28=FRQ=02,640.99\r\n] 2006.232.08:15:40.94#ibcon#*before write, iclass 3, count 0 2006.232.08:15:40.94#ibcon#enter sib2, iclass 3, count 0 2006.232.08:15:40.94#ibcon#flushed, iclass 3, count 0 2006.232.08:15:40.94#ibcon#about to write, iclass 3, count 0 2006.232.08:15:40.94#ibcon#wrote, iclass 3, count 0 2006.232.08:15:40.94#ibcon#about to read 3, iclass 3, count 0 2006.232.08:15:40.98#ibcon#read 3, iclass 3, count 0 2006.232.08:15:40.98#ibcon#about to read 4, iclass 3, count 0 2006.232.08:15:40.98#ibcon#read 4, iclass 3, count 0 2006.232.08:15:40.98#ibcon#about to read 5, iclass 3, count 0 2006.232.08:15:40.98#ibcon#read 5, iclass 3, count 0 2006.232.08:15:40.98#ibcon#about to read 6, iclass 3, count 0 2006.232.08:15:40.98#ibcon#read 6, iclass 3, count 0 2006.232.08:15:40.98#ibcon#end of sib2, iclass 3, count 0 2006.232.08:15:40.98#ibcon#*after write, iclass 3, count 0 2006.232.08:15:40.98#ibcon#*before return 0, iclass 3, count 0 2006.232.08:15:40.98#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:15:40.98#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:15:40.98#ibcon#about to clear, iclass 3 cls_cnt 0 2006.232.08:15:40.98#ibcon#cleared, iclass 3 cls_cnt 0 2006.232.08:15:40.98$vc4f8/vb=2,4 2006.232.08:15:40.98#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.232.08:15:40.98#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.232.08:15:40.98#ibcon#ireg 11 cls_cnt 2 2006.232.08:15:40.98#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.232.08:15:41.04#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.232.08:15:41.04#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.232.08:15:41.04#ibcon#enter wrdev, iclass 5, count 2 2006.232.08:15:41.04#ibcon#first serial, iclass 5, count 2 2006.232.08:15:41.04#ibcon#enter sib2, iclass 5, count 2 2006.232.08:15:41.04#ibcon#flushed, iclass 5, count 2 2006.232.08:15:41.04#ibcon#about to write, iclass 5, count 2 2006.232.08:15:41.04#ibcon#wrote, iclass 5, count 2 2006.232.08:15:41.04#ibcon#about to read 3, iclass 5, count 2 2006.232.08:15:41.06#ibcon#read 3, iclass 5, count 2 2006.232.08:15:41.06#ibcon#about to read 4, iclass 5, count 2 2006.232.08:15:41.06#ibcon#read 4, iclass 5, count 2 2006.232.08:15:41.06#ibcon#about to read 5, iclass 5, count 2 2006.232.08:15:41.06#ibcon#read 5, iclass 5, count 2 2006.232.08:15:41.06#ibcon#about to read 6, iclass 5, count 2 2006.232.08:15:41.06#ibcon#read 6, iclass 5, count 2 2006.232.08:15:41.06#ibcon#end of sib2, iclass 5, count 2 2006.232.08:15:41.06#ibcon#*mode == 0, iclass 5, count 2 2006.232.08:15:41.06#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.232.08:15:41.06#ibcon#[27=AT02-04\r\n] 2006.232.08:15:41.06#ibcon#*before write, iclass 5, count 2 2006.232.08:15:41.06#ibcon#enter sib2, iclass 5, count 2 2006.232.08:15:41.06#ibcon#flushed, iclass 5, count 2 2006.232.08:15:41.06#ibcon#about to write, iclass 5, count 2 2006.232.08:15:41.06#ibcon#wrote, iclass 5, count 2 2006.232.08:15:41.06#ibcon#about to read 3, iclass 5, count 2 2006.232.08:15:41.09#ibcon#read 3, iclass 5, count 2 2006.232.08:15:41.09#ibcon#about to read 4, iclass 5, count 2 2006.232.08:15:41.09#ibcon#read 4, iclass 5, count 2 2006.232.08:15:41.09#ibcon#about to read 5, iclass 5, count 2 2006.232.08:15:41.09#ibcon#read 5, iclass 5, count 2 2006.232.08:15:41.09#ibcon#about to read 6, iclass 5, count 2 2006.232.08:15:41.09#ibcon#read 6, iclass 5, count 2 2006.232.08:15:41.09#ibcon#end of sib2, iclass 5, count 2 2006.232.08:15:41.09#ibcon#*after write, iclass 5, count 2 2006.232.08:15:41.09#ibcon#*before return 0, iclass 5, count 2 2006.232.08:15:41.09#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.232.08:15:41.09#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.232.08:15:41.09#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.232.08:15:41.09#ibcon#ireg 7 cls_cnt 0 2006.232.08:15:41.09#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.232.08:15:41.21#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.232.08:15:41.21#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.232.08:15:41.21#ibcon#enter wrdev, iclass 5, count 0 2006.232.08:15:41.21#ibcon#first serial, iclass 5, count 0 2006.232.08:15:41.21#ibcon#enter sib2, iclass 5, count 0 2006.232.08:15:41.21#ibcon#flushed, iclass 5, count 0 2006.232.08:15:41.21#ibcon#about to write, iclass 5, count 0 2006.232.08:15:41.21#ibcon#wrote, iclass 5, count 0 2006.232.08:15:41.21#ibcon#about to read 3, iclass 5, count 0 2006.232.08:15:41.23#ibcon#read 3, iclass 5, count 0 2006.232.08:15:41.23#ibcon#about to read 4, iclass 5, count 0 2006.232.08:15:41.23#ibcon#read 4, iclass 5, count 0 2006.232.08:15:41.23#ibcon#about to read 5, iclass 5, count 0 2006.232.08:15:41.23#ibcon#read 5, iclass 5, count 0 2006.232.08:15:41.23#ibcon#about to read 6, iclass 5, count 0 2006.232.08:15:41.23#ibcon#read 6, iclass 5, count 0 2006.232.08:15:41.23#ibcon#end of sib2, iclass 5, count 0 2006.232.08:15:41.23#ibcon#*mode == 0, iclass 5, count 0 2006.232.08:15:41.23#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.232.08:15:41.23#ibcon#[27=USB\r\n] 2006.232.08:15:41.23#ibcon#*before write, iclass 5, count 0 2006.232.08:15:41.23#ibcon#enter sib2, iclass 5, count 0 2006.232.08:15:41.23#ibcon#flushed, iclass 5, count 0 2006.232.08:15:41.23#ibcon#about to write, iclass 5, count 0 2006.232.08:15:41.23#ibcon#wrote, iclass 5, count 0 2006.232.08:15:41.23#ibcon#about to read 3, iclass 5, count 0 2006.232.08:15:41.26#ibcon#read 3, iclass 5, count 0 2006.232.08:15:41.26#ibcon#about to read 4, iclass 5, count 0 2006.232.08:15:41.26#ibcon#read 4, iclass 5, count 0 2006.232.08:15:41.26#ibcon#about to read 5, iclass 5, count 0 2006.232.08:15:41.26#ibcon#read 5, iclass 5, count 0 2006.232.08:15:41.26#ibcon#about to read 6, iclass 5, count 0 2006.232.08:15:41.26#ibcon#read 6, iclass 5, count 0 2006.232.08:15:41.26#ibcon#end of sib2, iclass 5, count 0 2006.232.08:15:41.26#ibcon#*after write, iclass 5, count 0 2006.232.08:15:41.26#ibcon#*before return 0, iclass 5, count 0 2006.232.08:15:41.26#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.232.08:15:41.26#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.232.08:15:41.26#ibcon#about to clear, iclass 5 cls_cnt 0 2006.232.08:15:41.26#ibcon#cleared, iclass 5 cls_cnt 0 2006.232.08:15:41.26$vc4f8/vblo=3,656.99 2006.232.08:15:41.26#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.232.08:15:41.26#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.232.08:15:41.26#ibcon#ireg 17 cls_cnt 0 2006.232.08:15:41.26#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.232.08:15:41.26#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.232.08:15:41.26#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.232.08:15:41.26#ibcon#enter wrdev, iclass 7, count 0 2006.232.08:15:41.26#ibcon#first serial, iclass 7, count 0 2006.232.08:15:41.26#ibcon#enter sib2, iclass 7, count 0 2006.232.08:15:41.26#ibcon#flushed, iclass 7, count 0 2006.232.08:15:41.26#ibcon#about to write, iclass 7, count 0 2006.232.08:15:41.26#ibcon#wrote, iclass 7, count 0 2006.232.08:15:41.26#ibcon#about to read 3, iclass 7, count 0 2006.232.08:15:41.28#ibcon#read 3, iclass 7, count 0 2006.232.08:15:41.28#ibcon#about to read 4, iclass 7, count 0 2006.232.08:15:41.28#ibcon#read 4, iclass 7, count 0 2006.232.08:15:41.28#ibcon#about to read 5, iclass 7, count 0 2006.232.08:15:41.28#ibcon#read 5, iclass 7, count 0 2006.232.08:15:41.28#ibcon#about to read 6, iclass 7, count 0 2006.232.08:15:41.28#ibcon#read 6, iclass 7, count 0 2006.232.08:15:41.28#ibcon#end of sib2, iclass 7, count 0 2006.232.08:15:41.28#ibcon#*mode == 0, iclass 7, count 0 2006.232.08:15:41.28#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.232.08:15:41.28#ibcon#[28=FRQ=03,656.99\r\n] 2006.232.08:15:41.28#ibcon#*before write, iclass 7, count 0 2006.232.08:15:41.28#ibcon#enter sib2, iclass 7, count 0 2006.232.08:15:41.28#ibcon#flushed, iclass 7, count 0 2006.232.08:15:41.28#ibcon#about to write, iclass 7, count 0 2006.232.08:15:41.28#ibcon#wrote, iclass 7, count 0 2006.232.08:15:41.28#ibcon#about to read 3, iclass 7, count 0 2006.232.08:15:41.32#ibcon#read 3, iclass 7, count 0 2006.232.08:15:41.32#ibcon#about to read 4, iclass 7, count 0 2006.232.08:15:41.32#ibcon#read 4, iclass 7, count 0 2006.232.08:15:41.32#ibcon#about to read 5, iclass 7, count 0 2006.232.08:15:41.32#ibcon#read 5, iclass 7, count 0 2006.232.08:15:41.32#ibcon#about to read 6, iclass 7, count 0 2006.232.08:15:41.32#ibcon#read 6, iclass 7, count 0 2006.232.08:15:41.32#ibcon#end of sib2, iclass 7, count 0 2006.232.08:15:41.32#ibcon#*after write, iclass 7, count 0 2006.232.08:15:41.32#ibcon#*before return 0, iclass 7, count 0 2006.232.08:15:41.32#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.232.08:15:41.32#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.232.08:15:41.32#ibcon#about to clear, iclass 7 cls_cnt 0 2006.232.08:15:41.32#ibcon#cleared, iclass 7 cls_cnt 0 2006.232.08:15:41.32$vc4f8/vb=3,4 2006.232.08:15:41.32#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.232.08:15:41.32#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.232.08:15:41.32#ibcon#ireg 11 cls_cnt 2 2006.232.08:15:41.32#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.232.08:15:41.38#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.232.08:15:41.38#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.232.08:15:41.38#ibcon#enter wrdev, iclass 11, count 2 2006.232.08:15:41.38#ibcon#first serial, iclass 11, count 2 2006.232.08:15:41.38#ibcon#enter sib2, iclass 11, count 2 2006.232.08:15:41.38#ibcon#flushed, iclass 11, count 2 2006.232.08:15:41.38#ibcon#about to write, iclass 11, count 2 2006.232.08:15:41.38#ibcon#wrote, iclass 11, count 2 2006.232.08:15:41.38#ibcon#about to read 3, iclass 11, count 2 2006.232.08:15:41.40#ibcon#read 3, iclass 11, count 2 2006.232.08:15:41.40#ibcon#about to read 4, iclass 11, count 2 2006.232.08:15:41.40#ibcon#read 4, iclass 11, count 2 2006.232.08:15:41.40#ibcon#about to read 5, iclass 11, count 2 2006.232.08:15:41.40#ibcon#read 5, iclass 11, count 2 2006.232.08:15:41.40#ibcon#about to read 6, iclass 11, count 2 2006.232.08:15:41.40#ibcon#read 6, iclass 11, count 2 2006.232.08:15:41.40#ibcon#end of sib2, iclass 11, count 2 2006.232.08:15:41.40#ibcon#*mode == 0, iclass 11, count 2 2006.232.08:15:41.40#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.232.08:15:41.40#ibcon#[27=AT03-04\r\n] 2006.232.08:15:41.40#ibcon#*before write, iclass 11, count 2 2006.232.08:15:41.40#ibcon#enter sib2, iclass 11, count 2 2006.232.08:15:41.40#ibcon#flushed, iclass 11, count 2 2006.232.08:15:41.40#ibcon#about to write, iclass 11, count 2 2006.232.08:15:41.40#ibcon#wrote, iclass 11, count 2 2006.232.08:15:41.40#ibcon#about to read 3, iclass 11, count 2 2006.232.08:15:41.43#ibcon#read 3, iclass 11, count 2 2006.232.08:15:41.43#ibcon#about to read 4, iclass 11, count 2 2006.232.08:15:41.43#ibcon#read 4, iclass 11, count 2 2006.232.08:15:41.43#ibcon#about to read 5, iclass 11, count 2 2006.232.08:15:41.43#ibcon#read 5, iclass 11, count 2 2006.232.08:15:41.43#ibcon#about to read 6, iclass 11, count 2 2006.232.08:15:41.43#ibcon#read 6, iclass 11, count 2 2006.232.08:15:41.43#ibcon#end of sib2, iclass 11, count 2 2006.232.08:15:41.43#ibcon#*after write, iclass 11, count 2 2006.232.08:15:41.43#ibcon#*before return 0, iclass 11, count 2 2006.232.08:15:41.43#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.232.08:15:41.43#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.232.08:15:41.43#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.232.08:15:41.43#ibcon#ireg 7 cls_cnt 0 2006.232.08:15:41.43#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.232.08:15:41.55#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.232.08:15:41.55#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.232.08:15:41.55#ibcon#enter wrdev, iclass 11, count 0 2006.232.08:15:41.55#ibcon#first serial, iclass 11, count 0 2006.232.08:15:41.55#ibcon#enter sib2, iclass 11, count 0 2006.232.08:15:41.55#ibcon#flushed, iclass 11, count 0 2006.232.08:15:41.55#ibcon#about to write, iclass 11, count 0 2006.232.08:15:41.55#ibcon#wrote, iclass 11, count 0 2006.232.08:15:41.55#ibcon#about to read 3, iclass 11, count 0 2006.232.08:15:41.57#ibcon#read 3, iclass 11, count 0 2006.232.08:15:41.57#ibcon#about to read 4, iclass 11, count 0 2006.232.08:15:41.57#ibcon#read 4, iclass 11, count 0 2006.232.08:15:41.57#ibcon#about to read 5, iclass 11, count 0 2006.232.08:15:41.57#ibcon#read 5, iclass 11, count 0 2006.232.08:15:41.57#ibcon#about to read 6, iclass 11, count 0 2006.232.08:15:41.57#ibcon#read 6, iclass 11, count 0 2006.232.08:15:41.57#ibcon#end of sib2, iclass 11, count 0 2006.232.08:15:41.57#ibcon#*mode == 0, iclass 11, count 0 2006.232.08:15:41.57#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.232.08:15:41.57#ibcon#[27=USB\r\n] 2006.232.08:15:41.57#ibcon#*before write, iclass 11, count 0 2006.232.08:15:41.57#ibcon#enter sib2, iclass 11, count 0 2006.232.08:15:41.57#ibcon#flushed, iclass 11, count 0 2006.232.08:15:41.57#ibcon#about to write, iclass 11, count 0 2006.232.08:15:41.57#ibcon#wrote, iclass 11, count 0 2006.232.08:15:41.57#ibcon#about to read 3, iclass 11, count 0 2006.232.08:15:41.60#ibcon#read 3, iclass 11, count 0 2006.232.08:15:41.60#ibcon#about to read 4, iclass 11, count 0 2006.232.08:15:41.60#ibcon#read 4, iclass 11, count 0 2006.232.08:15:41.60#ibcon#about to read 5, iclass 11, count 0 2006.232.08:15:41.60#ibcon#read 5, iclass 11, count 0 2006.232.08:15:41.60#ibcon#about to read 6, iclass 11, count 0 2006.232.08:15:41.60#ibcon#read 6, iclass 11, count 0 2006.232.08:15:41.60#ibcon#end of sib2, iclass 11, count 0 2006.232.08:15:41.60#ibcon#*after write, iclass 11, count 0 2006.232.08:15:41.60#ibcon#*before return 0, iclass 11, count 0 2006.232.08:15:41.60#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.232.08:15:41.60#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.232.08:15:41.60#ibcon#about to clear, iclass 11 cls_cnt 0 2006.232.08:15:41.60#ibcon#cleared, iclass 11 cls_cnt 0 2006.232.08:15:41.60$vc4f8/vblo=4,712.99 2006.232.08:15:41.60#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.232.08:15:41.60#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.232.08:15:41.60#ibcon#ireg 17 cls_cnt 0 2006.232.08:15:41.60#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.232.08:15:41.60#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.232.08:15:41.60#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.232.08:15:41.60#ibcon#enter wrdev, iclass 13, count 0 2006.232.08:15:41.60#ibcon#first serial, iclass 13, count 0 2006.232.08:15:41.60#ibcon#enter sib2, iclass 13, count 0 2006.232.08:15:41.60#ibcon#flushed, iclass 13, count 0 2006.232.08:15:41.60#ibcon#about to write, iclass 13, count 0 2006.232.08:15:41.60#ibcon#wrote, iclass 13, count 0 2006.232.08:15:41.60#ibcon#about to read 3, iclass 13, count 0 2006.232.08:15:41.62#ibcon#read 3, iclass 13, count 0 2006.232.08:15:41.62#ibcon#about to read 4, iclass 13, count 0 2006.232.08:15:41.62#ibcon#read 4, iclass 13, count 0 2006.232.08:15:41.62#ibcon#about to read 5, iclass 13, count 0 2006.232.08:15:41.62#ibcon#read 5, iclass 13, count 0 2006.232.08:15:41.62#ibcon#about to read 6, iclass 13, count 0 2006.232.08:15:41.62#ibcon#read 6, iclass 13, count 0 2006.232.08:15:41.62#ibcon#end of sib2, iclass 13, count 0 2006.232.08:15:41.62#ibcon#*mode == 0, iclass 13, count 0 2006.232.08:15:41.62#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.232.08:15:41.62#ibcon#[28=FRQ=04,712.99\r\n] 2006.232.08:15:41.62#ibcon#*before write, iclass 13, count 0 2006.232.08:15:41.62#ibcon#enter sib2, iclass 13, count 0 2006.232.08:15:41.62#ibcon#flushed, iclass 13, count 0 2006.232.08:15:41.62#ibcon#about to write, iclass 13, count 0 2006.232.08:15:41.62#ibcon#wrote, iclass 13, count 0 2006.232.08:15:41.62#ibcon#about to read 3, iclass 13, count 0 2006.232.08:15:41.66#ibcon#read 3, iclass 13, count 0 2006.232.08:15:41.66#ibcon#about to read 4, iclass 13, count 0 2006.232.08:15:41.66#ibcon#read 4, iclass 13, count 0 2006.232.08:15:41.66#ibcon#about to read 5, iclass 13, count 0 2006.232.08:15:41.66#ibcon#read 5, iclass 13, count 0 2006.232.08:15:41.66#ibcon#about to read 6, iclass 13, count 0 2006.232.08:15:41.66#ibcon#read 6, iclass 13, count 0 2006.232.08:15:41.66#ibcon#end of sib2, iclass 13, count 0 2006.232.08:15:41.66#ibcon#*after write, iclass 13, count 0 2006.232.08:15:41.66#ibcon#*before return 0, iclass 13, count 0 2006.232.08:15:41.66#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.232.08:15:41.66#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.232.08:15:41.66#ibcon#about to clear, iclass 13 cls_cnt 0 2006.232.08:15:41.66#ibcon#cleared, iclass 13 cls_cnt 0 2006.232.08:15:41.66$vc4f8/vb=4,4 2006.232.08:15:41.66#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.232.08:15:41.66#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.232.08:15:41.66#ibcon#ireg 11 cls_cnt 2 2006.232.08:15:41.66#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.232.08:15:41.72#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.232.08:15:41.72#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.232.08:15:41.72#ibcon#enter wrdev, iclass 15, count 2 2006.232.08:15:41.72#ibcon#first serial, iclass 15, count 2 2006.232.08:15:41.72#ibcon#enter sib2, iclass 15, count 2 2006.232.08:15:41.72#ibcon#flushed, iclass 15, count 2 2006.232.08:15:41.72#ibcon#about to write, iclass 15, count 2 2006.232.08:15:41.72#ibcon#wrote, iclass 15, count 2 2006.232.08:15:41.72#ibcon#about to read 3, iclass 15, count 2 2006.232.08:15:41.74#ibcon#read 3, iclass 15, count 2 2006.232.08:15:41.74#ibcon#about to read 4, iclass 15, count 2 2006.232.08:15:41.74#ibcon#read 4, iclass 15, count 2 2006.232.08:15:41.74#ibcon#about to read 5, iclass 15, count 2 2006.232.08:15:41.74#ibcon#read 5, iclass 15, count 2 2006.232.08:15:41.74#ibcon#about to read 6, iclass 15, count 2 2006.232.08:15:41.74#ibcon#read 6, iclass 15, count 2 2006.232.08:15:41.74#ibcon#end of sib2, iclass 15, count 2 2006.232.08:15:41.74#ibcon#*mode == 0, iclass 15, count 2 2006.232.08:15:41.74#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.232.08:15:41.74#ibcon#[27=AT04-04\r\n] 2006.232.08:15:41.74#ibcon#*before write, iclass 15, count 2 2006.232.08:15:41.74#ibcon#enter sib2, iclass 15, count 2 2006.232.08:15:41.74#ibcon#flushed, iclass 15, count 2 2006.232.08:15:41.74#ibcon#about to write, iclass 15, count 2 2006.232.08:15:41.74#ibcon#wrote, iclass 15, count 2 2006.232.08:15:41.74#ibcon#about to read 3, iclass 15, count 2 2006.232.08:15:41.77#ibcon#read 3, iclass 15, count 2 2006.232.08:15:41.77#ibcon#about to read 4, iclass 15, count 2 2006.232.08:15:41.77#ibcon#read 4, iclass 15, count 2 2006.232.08:15:41.77#ibcon#about to read 5, iclass 15, count 2 2006.232.08:15:41.77#ibcon#read 5, iclass 15, count 2 2006.232.08:15:41.77#ibcon#about to read 6, iclass 15, count 2 2006.232.08:15:41.77#ibcon#read 6, iclass 15, count 2 2006.232.08:15:41.77#ibcon#end of sib2, iclass 15, count 2 2006.232.08:15:41.77#ibcon#*after write, iclass 15, count 2 2006.232.08:15:41.77#ibcon#*before return 0, iclass 15, count 2 2006.232.08:15:41.77#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.232.08:15:41.77#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.232.08:15:41.77#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.232.08:15:41.77#ibcon#ireg 7 cls_cnt 0 2006.232.08:15:41.77#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.232.08:15:41.89#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.232.08:15:41.89#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.232.08:15:41.89#ibcon#enter wrdev, iclass 15, count 0 2006.232.08:15:41.89#ibcon#first serial, iclass 15, count 0 2006.232.08:15:41.89#ibcon#enter sib2, iclass 15, count 0 2006.232.08:15:41.89#ibcon#flushed, iclass 15, count 0 2006.232.08:15:41.89#ibcon#about to write, iclass 15, count 0 2006.232.08:15:41.89#ibcon#wrote, iclass 15, count 0 2006.232.08:15:41.89#ibcon#about to read 3, iclass 15, count 0 2006.232.08:15:41.91#ibcon#read 3, iclass 15, count 0 2006.232.08:15:41.91#ibcon#about to read 4, iclass 15, count 0 2006.232.08:15:41.91#ibcon#read 4, iclass 15, count 0 2006.232.08:15:41.91#ibcon#about to read 5, iclass 15, count 0 2006.232.08:15:41.91#ibcon#read 5, iclass 15, count 0 2006.232.08:15:41.91#ibcon#about to read 6, iclass 15, count 0 2006.232.08:15:41.91#ibcon#read 6, iclass 15, count 0 2006.232.08:15:41.91#ibcon#end of sib2, iclass 15, count 0 2006.232.08:15:41.91#ibcon#*mode == 0, iclass 15, count 0 2006.232.08:15:41.91#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.232.08:15:41.91#ibcon#[27=USB\r\n] 2006.232.08:15:41.91#ibcon#*before write, iclass 15, count 0 2006.232.08:15:41.91#ibcon#enter sib2, iclass 15, count 0 2006.232.08:15:41.91#ibcon#flushed, iclass 15, count 0 2006.232.08:15:41.91#ibcon#about to write, iclass 15, count 0 2006.232.08:15:41.91#ibcon#wrote, iclass 15, count 0 2006.232.08:15:41.91#ibcon#about to read 3, iclass 15, count 0 2006.232.08:15:41.94#ibcon#read 3, iclass 15, count 0 2006.232.08:15:41.94#ibcon#about to read 4, iclass 15, count 0 2006.232.08:15:41.94#ibcon#read 4, iclass 15, count 0 2006.232.08:15:41.94#ibcon#about to read 5, iclass 15, count 0 2006.232.08:15:41.94#ibcon#read 5, iclass 15, count 0 2006.232.08:15:41.94#ibcon#about to read 6, iclass 15, count 0 2006.232.08:15:41.94#ibcon#read 6, iclass 15, count 0 2006.232.08:15:41.94#ibcon#end of sib2, iclass 15, count 0 2006.232.08:15:41.94#ibcon#*after write, iclass 15, count 0 2006.232.08:15:41.94#ibcon#*before return 0, iclass 15, count 0 2006.232.08:15:41.94#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.232.08:15:41.94#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.232.08:15:41.94#ibcon#about to clear, iclass 15 cls_cnt 0 2006.232.08:15:41.94#ibcon#cleared, iclass 15 cls_cnt 0 2006.232.08:15:41.94$vc4f8/vblo=5,744.99 2006.232.08:15:41.94#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.232.08:15:41.94#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.232.08:15:41.94#ibcon#ireg 17 cls_cnt 0 2006.232.08:15:41.94#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.232.08:15:41.94#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.232.08:15:41.94#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.232.08:15:41.94#ibcon#enter wrdev, iclass 17, count 0 2006.232.08:15:41.94#ibcon#first serial, iclass 17, count 0 2006.232.08:15:41.94#ibcon#enter sib2, iclass 17, count 0 2006.232.08:15:41.94#ibcon#flushed, iclass 17, count 0 2006.232.08:15:41.94#ibcon#about to write, iclass 17, count 0 2006.232.08:15:41.94#ibcon#wrote, iclass 17, count 0 2006.232.08:15:41.94#ibcon#about to read 3, iclass 17, count 0 2006.232.08:15:41.98#ibcon#read 3, iclass 17, count 0 2006.232.08:15:41.98#ibcon#about to read 4, iclass 17, count 0 2006.232.08:15:41.98#ibcon#read 4, iclass 17, count 0 2006.232.08:15:41.98#ibcon#about to read 5, iclass 17, count 0 2006.232.08:15:41.98#ibcon#read 5, iclass 17, count 0 2006.232.08:15:41.98#ibcon#about to read 6, iclass 17, count 0 2006.232.08:15:41.98#ibcon#read 6, iclass 17, count 0 2006.232.08:15:41.98#ibcon#end of sib2, iclass 17, count 0 2006.232.08:15:41.98#ibcon#*mode == 0, iclass 17, count 0 2006.232.08:15:41.98#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.232.08:15:41.98#ibcon#[28=FRQ=05,744.99\r\n] 2006.232.08:15:41.98#ibcon#*before write, iclass 17, count 0 2006.232.08:15:41.98#ibcon#enter sib2, iclass 17, count 0 2006.232.08:15:41.98#ibcon#flushed, iclass 17, count 0 2006.232.08:15:41.98#ibcon#about to write, iclass 17, count 0 2006.232.08:15:41.98#ibcon#wrote, iclass 17, count 0 2006.232.08:15:41.98#ibcon#about to read 3, iclass 17, count 0 2006.232.08:15:42.02#ibcon#read 3, iclass 17, count 0 2006.232.08:15:42.02#ibcon#about to read 4, iclass 17, count 0 2006.232.08:15:42.02#ibcon#read 4, iclass 17, count 0 2006.232.08:15:42.02#ibcon#about to read 5, iclass 17, count 0 2006.232.08:15:42.02#ibcon#read 5, iclass 17, count 0 2006.232.08:15:42.02#ibcon#about to read 6, iclass 17, count 0 2006.232.08:15:42.02#ibcon#read 6, iclass 17, count 0 2006.232.08:15:42.02#ibcon#end of sib2, iclass 17, count 0 2006.232.08:15:42.02#ibcon#*after write, iclass 17, count 0 2006.232.08:15:42.02#ibcon#*before return 0, iclass 17, count 0 2006.232.08:15:42.02#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.232.08:15:42.02#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.232.08:15:42.02#ibcon#about to clear, iclass 17 cls_cnt 0 2006.232.08:15:42.02#ibcon#cleared, iclass 17 cls_cnt 0 2006.232.08:15:42.02$vc4f8/vb=5,3 2006.232.08:15:42.02#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.232.08:15:42.02#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.232.08:15:42.02#ibcon#ireg 11 cls_cnt 2 2006.232.08:15:42.02#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.232.08:15:42.07#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.232.08:15:42.07#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.232.08:15:42.07#ibcon#enter wrdev, iclass 19, count 2 2006.232.08:15:42.07#ibcon#first serial, iclass 19, count 2 2006.232.08:15:42.07#ibcon#enter sib2, iclass 19, count 2 2006.232.08:15:42.07#ibcon#flushed, iclass 19, count 2 2006.232.08:15:42.07#ibcon#about to write, iclass 19, count 2 2006.232.08:15:42.07#ibcon#wrote, iclass 19, count 2 2006.232.08:15:42.07#ibcon#about to read 3, iclass 19, count 2 2006.232.08:15:42.07#abcon#<5=/04 3.3 6.3 29.28 891007.3\r\n> 2006.232.08:15:42.08#ibcon#read 3, iclass 19, count 2 2006.232.08:15:42.08#ibcon#about to read 4, iclass 19, count 2 2006.232.08:15:42.08#ibcon#read 4, iclass 19, count 2 2006.232.08:15:42.08#ibcon#about to read 5, iclass 19, count 2 2006.232.08:15:42.08#ibcon#read 5, iclass 19, count 2 2006.232.08:15:42.08#ibcon#about to read 6, iclass 19, count 2 2006.232.08:15:42.08#ibcon#read 6, iclass 19, count 2 2006.232.08:15:42.08#ibcon#end of sib2, iclass 19, count 2 2006.232.08:15:42.08#ibcon#*mode == 0, iclass 19, count 2 2006.232.08:15:42.08#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.232.08:15:42.08#ibcon#[27=AT05-03\r\n] 2006.232.08:15:42.08#ibcon#*before write, iclass 19, count 2 2006.232.08:15:42.08#ibcon#enter sib2, iclass 19, count 2 2006.232.08:15:42.08#ibcon#flushed, iclass 19, count 2 2006.232.08:15:42.08#ibcon#about to write, iclass 19, count 2 2006.232.08:15:42.08#ibcon#wrote, iclass 19, count 2 2006.232.08:15:42.08#ibcon#about to read 3, iclass 19, count 2 2006.232.08:15:42.10#abcon#{5=INTERFACE CLEAR} 2006.232.08:15:42.11#ibcon#read 3, iclass 19, count 2 2006.232.08:15:42.11#ibcon#about to read 4, iclass 19, count 2 2006.232.08:15:42.11#ibcon#read 4, iclass 19, count 2 2006.232.08:15:42.11#ibcon#about to read 5, iclass 19, count 2 2006.232.08:15:42.11#ibcon#read 5, iclass 19, count 2 2006.232.08:15:42.11#ibcon#about to read 6, iclass 19, count 2 2006.232.08:15:42.11#ibcon#read 6, iclass 19, count 2 2006.232.08:15:42.11#ibcon#end of sib2, iclass 19, count 2 2006.232.08:15:42.11#ibcon#*after write, iclass 19, count 2 2006.232.08:15:42.11#ibcon#*before return 0, iclass 19, count 2 2006.232.08:15:42.11#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.232.08:15:42.11#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.232.08:15:42.11#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.232.08:15:42.11#ibcon#ireg 7 cls_cnt 0 2006.232.08:15:42.11#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.232.08:15:42.15#abcon#[5=S1D000X0/0*\r\n] 2006.232.08:15:42.23#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.232.08:15:42.23#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.232.08:15:42.23#ibcon#enter wrdev, iclass 19, count 0 2006.232.08:15:42.23#ibcon#first serial, iclass 19, count 0 2006.232.08:15:42.23#ibcon#enter sib2, iclass 19, count 0 2006.232.08:15:42.23#ibcon#flushed, iclass 19, count 0 2006.232.08:15:42.23#ibcon#about to write, iclass 19, count 0 2006.232.08:15:42.23#ibcon#wrote, iclass 19, count 0 2006.232.08:15:42.23#ibcon#about to read 3, iclass 19, count 0 2006.232.08:15:42.25#ibcon#read 3, iclass 19, count 0 2006.232.08:15:42.25#ibcon#about to read 4, iclass 19, count 0 2006.232.08:15:42.25#ibcon#read 4, iclass 19, count 0 2006.232.08:15:42.25#ibcon#about to read 5, iclass 19, count 0 2006.232.08:15:42.25#ibcon#read 5, iclass 19, count 0 2006.232.08:15:42.25#ibcon#about to read 6, iclass 19, count 0 2006.232.08:15:42.25#ibcon#read 6, iclass 19, count 0 2006.232.08:15:42.25#ibcon#end of sib2, iclass 19, count 0 2006.232.08:15:42.25#ibcon#*mode == 0, iclass 19, count 0 2006.232.08:15:42.25#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.232.08:15:42.25#ibcon#[27=USB\r\n] 2006.232.08:15:42.25#ibcon#*before write, iclass 19, count 0 2006.232.08:15:42.25#ibcon#enter sib2, iclass 19, count 0 2006.232.08:15:42.25#ibcon#flushed, iclass 19, count 0 2006.232.08:15:42.25#ibcon#about to write, iclass 19, count 0 2006.232.08:15:42.25#ibcon#wrote, iclass 19, count 0 2006.232.08:15:42.25#ibcon#about to read 3, iclass 19, count 0 2006.232.08:15:42.28#ibcon#read 3, iclass 19, count 0 2006.232.08:15:42.28#ibcon#about to read 4, iclass 19, count 0 2006.232.08:15:42.28#ibcon#read 4, iclass 19, count 0 2006.232.08:15:42.28#ibcon#about to read 5, iclass 19, count 0 2006.232.08:15:42.28#ibcon#read 5, iclass 19, count 0 2006.232.08:15:42.28#ibcon#about to read 6, iclass 19, count 0 2006.232.08:15:42.28#ibcon#read 6, iclass 19, count 0 2006.232.08:15:42.28#ibcon#end of sib2, iclass 19, count 0 2006.232.08:15:42.28#ibcon#*after write, iclass 19, count 0 2006.232.08:15:42.28#ibcon#*before return 0, iclass 19, count 0 2006.232.08:15:42.28#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.232.08:15:42.28#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.232.08:15:42.28#ibcon#about to clear, iclass 19 cls_cnt 0 2006.232.08:15:42.28#ibcon#cleared, iclass 19 cls_cnt 0 2006.232.08:15:42.28$vc4f8/vblo=6,752.99 2006.232.08:15:42.28#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.232.08:15:42.28#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.232.08:15:42.28#ibcon#ireg 17 cls_cnt 0 2006.232.08:15:42.28#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:15:42.28#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:15:42.28#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:15:42.28#ibcon#enter wrdev, iclass 25, count 0 2006.232.08:15:42.28#ibcon#first serial, iclass 25, count 0 2006.232.08:15:42.28#ibcon#enter sib2, iclass 25, count 0 2006.232.08:15:42.28#ibcon#flushed, iclass 25, count 0 2006.232.08:15:42.28#ibcon#about to write, iclass 25, count 0 2006.232.08:15:42.28#ibcon#wrote, iclass 25, count 0 2006.232.08:15:42.28#ibcon#about to read 3, iclass 25, count 0 2006.232.08:15:42.30#ibcon#read 3, iclass 25, count 0 2006.232.08:15:42.30#ibcon#about to read 4, iclass 25, count 0 2006.232.08:15:42.30#ibcon#read 4, iclass 25, count 0 2006.232.08:15:42.30#ibcon#about to read 5, iclass 25, count 0 2006.232.08:15:42.30#ibcon#read 5, iclass 25, count 0 2006.232.08:15:42.30#ibcon#about to read 6, iclass 25, count 0 2006.232.08:15:42.30#ibcon#read 6, iclass 25, count 0 2006.232.08:15:42.30#ibcon#end of sib2, iclass 25, count 0 2006.232.08:15:42.30#ibcon#*mode == 0, iclass 25, count 0 2006.232.08:15:42.30#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.232.08:15:42.30#ibcon#[28=FRQ=06,752.99\r\n] 2006.232.08:15:42.30#ibcon#*before write, iclass 25, count 0 2006.232.08:15:42.30#ibcon#enter sib2, iclass 25, count 0 2006.232.08:15:42.30#ibcon#flushed, iclass 25, count 0 2006.232.08:15:42.30#ibcon#about to write, iclass 25, count 0 2006.232.08:15:42.30#ibcon#wrote, iclass 25, count 0 2006.232.08:15:42.30#ibcon#about to read 3, iclass 25, count 0 2006.232.08:15:42.34#ibcon#read 3, iclass 25, count 0 2006.232.08:15:42.34#ibcon#about to read 4, iclass 25, count 0 2006.232.08:15:42.34#ibcon#read 4, iclass 25, count 0 2006.232.08:15:42.34#ibcon#about to read 5, iclass 25, count 0 2006.232.08:15:42.34#ibcon#read 5, iclass 25, count 0 2006.232.08:15:42.34#ibcon#about to read 6, iclass 25, count 0 2006.232.08:15:42.34#ibcon#read 6, iclass 25, count 0 2006.232.08:15:42.34#ibcon#end of sib2, iclass 25, count 0 2006.232.08:15:42.34#ibcon#*after write, iclass 25, count 0 2006.232.08:15:42.34#ibcon#*before return 0, iclass 25, count 0 2006.232.08:15:42.34#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:15:42.34#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:15:42.34#ibcon#about to clear, iclass 25 cls_cnt 0 2006.232.08:15:42.34#ibcon#cleared, iclass 25 cls_cnt 0 2006.232.08:15:42.34$vc4f8/vb=6,4 2006.232.08:15:42.34#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.232.08:15:42.34#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.232.08:15:42.34#ibcon#ireg 11 cls_cnt 2 2006.232.08:15:42.34#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:15:42.40#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:15:42.40#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:15:42.40#ibcon#enter wrdev, iclass 27, count 2 2006.232.08:15:42.40#ibcon#first serial, iclass 27, count 2 2006.232.08:15:42.40#ibcon#enter sib2, iclass 27, count 2 2006.232.08:15:42.40#ibcon#flushed, iclass 27, count 2 2006.232.08:15:42.40#ibcon#about to write, iclass 27, count 2 2006.232.08:15:42.40#ibcon#wrote, iclass 27, count 2 2006.232.08:15:42.40#ibcon#about to read 3, iclass 27, count 2 2006.232.08:15:42.42#ibcon#read 3, iclass 27, count 2 2006.232.08:15:42.42#ibcon#about to read 4, iclass 27, count 2 2006.232.08:15:42.42#ibcon#read 4, iclass 27, count 2 2006.232.08:15:42.42#ibcon#about to read 5, iclass 27, count 2 2006.232.08:15:42.42#ibcon#read 5, iclass 27, count 2 2006.232.08:15:42.42#ibcon#about to read 6, iclass 27, count 2 2006.232.08:15:42.42#ibcon#read 6, iclass 27, count 2 2006.232.08:15:42.42#ibcon#end of sib2, iclass 27, count 2 2006.232.08:15:42.42#ibcon#*mode == 0, iclass 27, count 2 2006.232.08:15:42.42#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.232.08:15:42.42#ibcon#[27=AT06-04\r\n] 2006.232.08:15:42.42#ibcon#*before write, iclass 27, count 2 2006.232.08:15:42.42#ibcon#enter sib2, iclass 27, count 2 2006.232.08:15:42.42#ibcon#flushed, iclass 27, count 2 2006.232.08:15:42.42#ibcon#about to write, iclass 27, count 2 2006.232.08:15:42.42#ibcon#wrote, iclass 27, count 2 2006.232.08:15:42.42#ibcon#about to read 3, iclass 27, count 2 2006.232.08:15:42.45#ibcon#read 3, iclass 27, count 2 2006.232.08:15:42.45#ibcon#about to read 4, iclass 27, count 2 2006.232.08:15:42.45#ibcon#read 4, iclass 27, count 2 2006.232.08:15:42.45#ibcon#about to read 5, iclass 27, count 2 2006.232.08:15:42.45#ibcon#read 5, iclass 27, count 2 2006.232.08:15:42.45#ibcon#about to read 6, iclass 27, count 2 2006.232.08:15:42.45#ibcon#read 6, iclass 27, count 2 2006.232.08:15:42.45#ibcon#end of sib2, iclass 27, count 2 2006.232.08:15:42.45#ibcon#*after write, iclass 27, count 2 2006.232.08:15:42.45#ibcon#*before return 0, iclass 27, count 2 2006.232.08:15:42.45#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:15:42.45#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:15:42.45#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.232.08:15:42.45#ibcon#ireg 7 cls_cnt 0 2006.232.08:15:42.45#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:15:42.57#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:15:42.57#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:15:42.57#ibcon#enter wrdev, iclass 27, count 0 2006.232.08:15:42.57#ibcon#first serial, iclass 27, count 0 2006.232.08:15:42.57#ibcon#enter sib2, iclass 27, count 0 2006.232.08:15:42.57#ibcon#flushed, iclass 27, count 0 2006.232.08:15:42.57#ibcon#about to write, iclass 27, count 0 2006.232.08:15:42.57#ibcon#wrote, iclass 27, count 0 2006.232.08:15:42.57#ibcon#about to read 3, iclass 27, count 0 2006.232.08:15:42.59#ibcon#read 3, iclass 27, count 0 2006.232.08:15:42.59#ibcon#about to read 4, iclass 27, count 0 2006.232.08:15:42.59#ibcon#read 4, iclass 27, count 0 2006.232.08:15:42.59#ibcon#about to read 5, iclass 27, count 0 2006.232.08:15:42.59#ibcon#read 5, iclass 27, count 0 2006.232.08:15:42.59#ibcon#about to read 6, iclass 27, count 0 2006.232.08:15:42.59#ibcon#read 6, iclass 27, count 0 2006.232.08:15:42.59#ibcon#end of sib2, iclass 27, count 0 2006.232.08:15:42.59#ibcon#*mode == 0, iclass 27, count 0 2006.232.08:15:42.59#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.232.08:15:42.59#ibcon#[27=USB\r\n] 2006.232.08:15:42.59#ibcon#*before write, iclass 27, count 0 2006.232.08:15:42.59#ibcon#enter sib2, iclass 27, count 0 2006.232.08:15:42.59#ibcon#flushed, iclass 27, count 0 2006.232.08:15:42.59#ibcon#about to write, iclass 27, count 0 2006.232.08:15:42.59#ibcon#wrote, iclass 27, count 0 2006.232.08:15:42.59#ibcon#about to read 3, iclass 27, count 0 2006.232.08:15:42.62#ibcon#read 3, iclass 27, count 0 2006.232.08:15:42.62#ibcon#about to read 4, iclass 27, count 0 2006.232.08:15:42.62#ibcon#read 4, iclass 27, count 0 2006.232.08:15:42.62#ibcon#about to read 5, iclass 27, count 0 2006.232.08:15:42.62#ibcon#read 5, iclass 27, count 0 2006.232.08:15:42.62#ibcon#about to read 6, iclass 27, count 0 2006.232.08:15:42.62#ibcon#read 6, iclass 27, count 0 2006.232.08:15:42.62#ibcon#end of sib2, iclass 27, count 0 2006.232.08:15:42.62#ibcon#*after write, iclass 27, count 0 2006.232.08:15:42.62#ibcon#*before return 0, iclass 27, count 0 2006.232.08:15:42.62#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:15:42.62#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:15:42.62#ibcon#about to clear, iclass 27 cls_cnt 0 2006.232.08:15:42.62#ibcon#cleared, iclass 27 cls_cnt 0 2006.232.08:15:42.62$vc4f8/vabw=wide 2006.232.08:15:42.62#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.232.08:15:42.62#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.232.08:15:42.62#ibcon#ireg 8 cls_cnt 0 2006.232.08:15:42.62#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:15:42.62#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:15:42.62#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:15:42.62#ibcon#enter wrdev, iclass 29, count 0 2006.232.08:15:42.62#ibcon#first serial, iclass 29, count 0 2006.232.08:15:42.62#ibcon#enter sib2, iclass 29, count 0 2006.232.08:15:42.62#ibcon#flushed, iclass 29, count 0 2006.232.08:15:42.62#ibcon#about to write, iclass 29, count 0 2006.232.08:15:42.62#ibcon#wrote, iclass 29, count 0 2006.232.08:15:42.62#ibcon#about to read 3, iclass 29, count 0 2006.232.08:15:42.65#ibcon#read 3, iclass 29, count 0 2006.232.08:15:42.65#ibcon#about to read 4, iclass 29, count 0 2006.232.08:15:42.65#ibcon#read 4, iclass 29, count 0 2006.232.08:15:42.65#ibcon#about to read 5, iclass 29, count 0 2006.232.08:15:42.65#ibcon#read 5, iclass 29, count 0 2006.232.08:15:42.65#ibcon#about to read 6, iclass 29, count 0 2006.232.08:15:42.65#ibcon#read 6, iclass 29, count 0 2006.232.08:15:42.65#ibcon#end of sib2, iclass 29, count 0 2006.232.08:15:42.65#ibcon#*mode == 0, iclass 29, count 0 2006.232.08:15:42.65#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.232.08:15:42.65#ibcon#[25=BW32\r\n] 2006.232.08:15:42.65#ibcon#*before write, iclass 29, count 0 2006.232.08:15:42.65#ibcon#enter sib2, iclass 29, count 0 2006.232.08:15:42.65#ibcon#flushed, iclass 29, count 0 2006.232.08:15:42.65#ibcon#about to write, iclass 29, count 0 2006.232.08:15:42.65#ibcon#wrote, iclass 29, count 0 2006.232.08:15:42.65#ibcon#about to read 3, iclass 29, count 0 2006.232.08:15:42.68#ibcon#read 3, iclass 29, count 0 2006.232.08:15:42.68#ibcon#about to read 4, iclass 29, count 0 2006.232.08:15:42.68#ibcon#read 4, iclass 29, count 0 2006.232.08:15:42.68#ibcon#about to read 5, iclass 29, count 0 2006.232.08:15:42.68#ibcon#read 5, iclass 29, count 0 2006.232.08:15:42.68#ibcon#about to read 6, iclass 29, count 0 2006.232.08:15:42.68#ibcon#read 6, iclass 29, count 0 2006.232.08:15:42.68#ibcon#end of sib2, iclass 29, count 0 2006.232.08:15:42.68#ibcon#*after write, iclass 29, count 0 2006.232.08:15:42.68#ibcon#*before return 0, iclass 29, count 0 2006.232.08:15:42.68#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:15:42.68#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:15:42.68#ibcon#about to clear, iclass 29 cls_cnt 0 2006.232.08:15:42.68#ibcon#cleared, iclass 29 cls_cnt 0 2006.232.08:15:42.68$vc4f8/vbbw=wide 2006.232.08:15:42.68#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.232.08:15:42.68#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.232.08:15:42.68#ibcon#ireg 8 cls_cnt 0 2006.232.08:15:42.68#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.232.08:15:42.74#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.232.08:15:42.74#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.232.08:15:42.74#ibcon#enter wrdev, iclass 31, count 0 2006.232.08:15:42.74#ibcon#first serial, iclass 31, count 0 2006.232.08:15:42.74#ibcon#enter sib2, iclass 31, count 0 2006.232.08:15:42.74#ibcon#flushed, iclass 31, count 0 2006.232.08:15:42.74#ibcon#about to write, iclass 31, count 0 2006.232.08:15:42.74#ibcon#wrote, iclass 31, count 0 2006.232.08:15:42.74#ibcon#about to read 3, iclass 31, count 0 2006.232.08:15:42.76#ibcon#read 3, iclass 31, count 0 2006.232.08:15:42.76#ibcon#about to read 4, iclass 31, count 0 2006.232.08:15:42.76#ibcon#read 4, iclass 31, count 0 2006.232.08:15:42.76#ibcon#about to read 5, iclass 31, count 0 2006.232.08:15:42.76#ibcon#read 5, iclass 31, count 0 2006.232.08:15:42.76#ibcon#about to read 6, iclass 31, count 0 2006.232.08:15:42.76#ibcon#read 6, iclass 31, count 0 2006.232.08:15:42.76#ibcon#end of sib2, iclass 31, count 0 2006.232.08:15:42.76#ibcon#*mode == 0, iclass 31, count 0 2006.232.08:15:42.76#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.232.08:15:42.76#ibcon#[27=BW32\r\n] 2006.232.08:15:42.76#ibcon#*before write, iclass 31, count 0 2006.232.08:15:42.76#ibcon#enter sib2, iclass 31, count 0 2006.232.08:15:42.76#ibcon#flushed, iclass 31, count 0 2006.232.08:15:42.76#ibcon#about to write, iclass 31, count 0 2006.232.08:15:42.76#ibcon#wrote, iclass 31, count 0 2006.232.08:15:42.76#ibcon#about to read 3, iclass 31, count 0 2006.232.08:15:42.80#ibcon#read 3, iclass 31, count 0 2006.232.08:15:42.80#ibcon#about to read 4, iclass 31, count 0 2006.232.08:15:42.80#ibcon#read 4, iclass 31, count 0 2006.232.08:15:42.80#ibcon#about to read 5, iclass 31, count 0 2006.232.08:15:42.80#ibcon#read 5, iclass 31, count 0 2006.232.08:15:42.80#ibcon#about to read 6, iclass 31, count 0 2006.232.08:15:42.80#ibcon#read 6, iclass 31, count 0 2006.232.08:15:42.80#ibcon#end of sib2, iclass 31, count 0 2006.232.08:15:42.80#ibcon#*after write, iclass 31, count 0 2006.232.08:15:42.80#ibcon#*before return 0, iclass 31, count 0 2006.232.08:15:42.80#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.232.08:15:42.80#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.232.08:15:42.80#ibcon#about to clear, iclass 31 cls_cnt 0 2006.232.08:15:42.80#ibcon#cleared, iclass 31 cls_cnt 0 2006.232.08:15:42.80$4f8m12a/ifd4f 2006.232.08:15:42.80$ifd4f/lo= 2006.232.08:15:42.80$ifd4f/lo=lo1,7680.00,usb,rcp,1 2006.232.08:15:42.80$ifd4f/lo=lo2,1600.00,usb,rcp,1 2006.232.08:15:42.80$ifd4f/lo=lo3,8080.00,usb,rcp,1 2006.232.08:15:42.80$ifd4f/patch= 2006.232.08:15:42.80$ifd4f/patch=lo1,a1,a2,a3,a4 2006.232.08:15:42.80$ifd4f/patch=lo2,b1,b2,b3,b4,b5,b6 2006.232.08:15:42.80$ifd4f/patch=lo3,a5,a6,a7,a8 2006.232.08:15:42.80$4f8m12a/"form=m,16.000,1:2 2006.232.08:15:42.80$4f8m12a/"tpicd 2006.232.08:15:42.80$4f8m12a/echo=off 2006.232.08:15:42.80$4f8m12a/xlog=off 2006.232.08:15:42.80:!2006.232.08:16:10 2006.232.08:15:55.13#trakl#Source acquired 2006.232.08:15:55.13#flagr#flagr/antenna,acquired 2006.232.08:16:10.01:preob 2006.232.08:16:11.13/onsource/TRACKING 2006.232.08:16:11.13:!2006.232.08:16:20 2006.232.08:16:20.00:data_valid=on 2006.232.08:16:20.00:midob 2006.232.08:16:20.13/onsource/TRACKING 2006.232.08:16:20.13/wx/29.28,1007.4,89 2006.232.08:16:20.29/cable/+6.3893E-03 2006.232.08:16:21.38/va/01,08,usb,yes,31,32 2006.232.08:16:21.38/va/02,07,usb,yes,31,32 2006.232.08:16:21.38/va/03,08,usb,yes,23,23 2006.232.08:16:21.38/va/04,07,usb,yes,32,35 2006.232.08:16:21.38/va/05,07,usb,yes,36,38 2006.232.08:16:21.38/va/06,06,usb,yes,35,35 2006.232.08:16:21.38/va/07,06,usb,yes,36,36 2006.232.08:16:21.38/va/08,06,usb,yes,38,38 2006.232.08:16:21.61/valo/01,532.99,yes,locked 2006.232.08:16:21.61/valo/02,572.99,yes,locked 2006.232.08:16:21.61/valo/03,672.99,yes,locked 2006.232.08:16:21.61/valo/04,832.99,yes,locked 2006.232.08:16:21.61/valo/05,652.99,yes,locked 2006.232.08:16:21.61/valo/06,772.99,yes,locked 2006.232.08:16:21.61/valo/07,832.99,yes,locked 2006.232.08:16:21.61/valo/08,852.99,yes,locked 2006.232.08:16:22.70/vb/01,04,usb,yes,30,29 2006.232.08:16:22.70/vb/02,04,usb,yes,32,34 2006.232.08:16:22.70/vb/03,04,usb,yes,29,32 2006.232.08:16:22.70/vb/04,04,usb,yes,29,30 2006.232.08:16:22.70/vb/05,03,usb,yes,35,40 2006.232.08:16:22.70/vb/06,04,usb,yes,29,32 2006.232.08:16:22.70/vb/07,04,usb,yes,31,31 2006.232.08:16:22.70/vb/08,04,usb,yes,29,32 2006.232.08:16:22.94/vblo/01,632.99,yes,locked 2006.232.08:16:22.94/vblo/02,640.99,yes,locked 2006.232.08:16:22.94/vblo/03,656.99,yes,locked 2006.232.08:16:22.94/vblo/04,712.99,yes,locked 2006.232.08:16:22.94/vblo/05,744.99,yes,locked 2006.232.08:16:22.94/vblo/06,752.99,yes,locked 2006.232.08:16:22.94/vblo/07,734.99,yes,locked 2006.232.08:16:22.94/vblo/08,744.99,yes,locked 2006.232.08:16:23.09/vabw/8 2006.232.08:16:23.24/vbbw/8 2006.232.08:16:23.33/xfe/off,on,13.7 2006.232.08:16:23.72/ifatt/23,28,28,28 2006.232.08:16:24.07/fmout-gps/S +4.52E-07 2006.232.08:16:24.12:!2006.232.08:17:20 2006.232.08:17:20.00:data_valid=off 2006.232.08:17:20.01:postob 2006.232.08:17:20.13/cable/+6.3886E-03 2006.232.08:17:20.14/wx/29.26,1007.4,89 2006.232.08:17:21.07/fmout-gps/S +4.53E-07 2006.232.08:17:21.08:scan_name=232-0818,k06232,60 2006.232.08:17:21.08:source=4c39.25,092703.01,390220.9,2000.0,ccw 2006.232.08:17:21.14#flagr#flagr/antenna,new-source 2006.232.08:17:22.14:checkk5 2006.232.08:17:22.52/chk_autoobs//k5ts1/ autoobs is running! 2006.232.08:17:22.90/chk_autoobs//k5ts2/ autoobs is running! 2006.232.08:17:23.27/chk_autoobs//k5ts3/ autoobs is running! 2006.232.08:17:23.64/chk_autoobs//k5ts4/ autoobs is running! 2006.232.08:17:24.01/chk_obsdata//k5ts1/T2320816??a.dat file size is correct (nominal:480MB, actual:480MB). 2006.232.08:17:24.38/chk_obsdata//k5ts2/T2320816??b.dat file size is correct (nominal:480MB, actual:480MB). 2006.232.08:17:24.76/chk_obsdata//k5ts3/T2320816??c.dat file size is correct (nominal:480MB, actual:480MB). 2006.232.08:17:25.13/chk_obsdata//k5ts4/T2320816??d.dat file size is correct (nominal:480MB, actual:480MB). 2006.232.08:17:25.82/k5log//k5ts1_log_newline 2006.232.08:17:26.52/k5log//k5ts2_log_newline 2006.232.08:17:27.23/k5log//k5ts3_log_newline 2006.232.08:17:27.92/k5log//k5ts4_log_newline 2006.232.08:17:27.94/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.232.08:17:27.94:4f8m12a=2 2006.232.08:17:27.94$4f8m12a/echo=on 2006.232.08:17:27.94$4f8m12a/pcalon 2006.232.08:17:27.94$pcalon/"no phase cal control is implemented here 2006.232.08:17:27.94$4f8m12a/"tpicd=stop 2006.232.08:17:27.94$4f8m12a/vc4f8 2006.232.08:17:27.94$vc4f8/valo=1,532.99 2006.232.08:17:27.94#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.232.08:17:27.94#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.232.08:17:27.94#ibcon#ireg 17 cls_cnt 0 2006.232.08:17:27.94#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.232.08:17:27.94#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.232.08:17:27.94#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.232.08:17:27.94#ibcon#enter wrdev, iclass 38, count 0 2006.232.08:17:27.94#ibcon#first serial, iclass 38, count 0 2006.232.08:17:27.94#ibcon#enter sib2, iclass 38, count 0 2006.232.08:17:27.94#ibcon#flushed, iclass 38, count 0 2006.232.08:17:27.94#ibcon#about to write, iclass 38, count 0 2006.232.08:17:27.94#ibcon#wrote, iclass 38, count 0 2006.232.08:17:27.94#ibcon#about to read 3, iclass 38, count 0 2006.232.08:17:27.98#ibcon#read 3, iclass 38, count 0 2006.232.08:17:27.98#ibcon#about to read 4, iclass 38, count 0 2006.232.08:17:27.98#ibcon#read 4, iclass 38, count 0 2006.232.08:17:27.98#ibcon#about to read 5, iclass 38, count 0 2006.232.08:17:27.98#ibcon#read 5, iclass 38, count 0 2006.232.08:17:27.98#ibcon#about to read 6, iclass 38, count 0 2006.232.08:17:27.98#ibcon#read 6, iclass 38, count 0 2006.232.08:17:27.98#ibcon#end of sib2, iclass 38, count 0 2006.232.08:17:27.98#ibcon#*mode == 0, iclass 38, count 0 2006.232.08:17:27.98#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.232.08:17:27.98#ibcon#[26=FRQ=01,532.99\r\n] 2006.232.08:17:27.98#ibcon#*before write, iclass 38, count 0 2006.232.08:17:27.98#ibcon#enter sib2, iclass 38, count 0 2006.232.08:17:27.98#ibcon#flushed, iclass 38, count 0 2006.232.08:17:27.98#ibcon#about to write, iclass 38, count 0 2006.232.08:17:27.98#ibcon#wrote, iclass 38, count 0 2006.232.08:17:27.98#ibcon#about to read 3, iclass 38, count 0 2006.232.08:17:28.03#ibcon#read 3, iclass 38, count 0 2006.232.08:17:28.03#ibcon#about to read 4, iclass 38, count 0 2006.232.08:17:28.03#ibcon#read 4, iclass 38, count 0 2006.232.08:17:28.03#ibcon#about to read 5, iclass 38, count 0 2006.232.08:17:28.03#ibcon#read 5, iclass 38, count 0 2006.232.08:17:28.03#ibcon#about to read 6, iclass 38, count 0 2006.232.08:17:28.03#ibcon#read 6, iclass 38, count 0 2006.232.08:17:28.03#ibcon#end of sib2, iclass 38, count 0 2006.232.08:17:28.03#ibcon#*after write, iclass 38, count 0 2006.232.08:17:28.03#ibcon#*before return 0, iclass 38, count 0 2006.232.08:17:28.03#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.232.08:17:28.03#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.232.08:17:28.03#ibcon#about to clear, iclass 38 cls_cnt 0 2006.232.08:17:28.03#ibcon#cleared, iclass 38 cls_cnt 0 2006.232.08:17:28.03$vc4f8/va=1,8 2006.232.08:17:28.03#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.232.08:17:28.03#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.232.08:17:28.03#ibcon#ireg 11 cls_cnt 2 2006.232.08:17:28.03#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.232.08:17:28.03#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.232.08:17:28.03#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.232.08:17:28.03#ibcon#enter wrdev, iclass 40, count 2 2006.232.08:17:28.03#ibcon#first serial, iclass 40, count 2 2006.232.08:17:28.03#ibcon#enter sib2, iclass 40, count 2 2006.232.08:17:28.03#ibcon#flushed, iclass 40, count 2 2006.232.08:17:28.03#ibcon#about to write, iclass 40, count 2 2006.232.08:17:28.03#ibcon#wrote, iclass 40, count 2 2006.232.08:17:28.03#ibcon#about to read 3, iclass 40, count 2 2006.232.08:17:28.06#ibcon#read 3, iclass 40, count 2 2006.232.08:17:28.06#ibcon#about to read 4, iclass 40, count 2 2006.232.08:17:28.06#ibcon#read 4, iclass 40, count 2 2006.232.08:17:28.06#ibcon#about to read 5, iclass 40, count 2 2006.232.08:17:28.06#ibcon#read 5, iclass 40, count 2 2006.232.08:17:28.06#ibcon#about to read 6, iclass 40, count 2 2006.232.08:17:28.06#ibcon#read 6, iclass 40, count 2 2006.232.08:17:28.06#ibcon#end of sib2, iclass 40, count 2 2006.232.08:17:28.06#ibcon#*mode == 0, iclass 40, count 2 2006.232.08:17:28.06#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.232.08:17:28.06#ibcon#[25=AT01-08\r\n] 2006.232.08:17:28.06#ibcon#*before write, iclass 40, count 2 2006.232.08:17:28.06#ibcon#enter sib2, iclass 40, count 2 2006.232.08:17:28.06#ibcon#flushed, iclass 40, count 2 2006.232.08:17:28.06#ibcon#about to write, iclass 40, count 2 2006.232.08:17:28.06#ibcon#wrote, iclass 40, count 2 2006.232.08:17:28.06#ibcon#about to read 3, iclass 40, count 2 2006.232.08:17:28.09#ibcon#read 3, iclass 40, count 2 2006.232.08:17:28.09#ibcon#about to read 4, iclass 40, count 2 2006.232.08:17:28.09#ibcon#read 4, iclass 40, count 2 2006.232.08:17:28.09#ibcon#about to read 5, iclass 40, count 2 2006.232.08:17:28.09#ibcon#read 5, iclass 40, count 2 2006.232.08:17:28.09#ibcon#about to read 6, iclass 40, count 2 2006.232.08:17:28.09#ibcon#read 6, iclass 40, count 2 2006.232.08:17:28.09#ibcon#end of sib2, iclass 40, count 2 2006.232.08:17:28.09#ibcon#*after write, iclass 40, count 2 2006.232.08:17:28.09#ibcon#*before return 0, iclass 40, count 2 2006.232.08:17:28.09#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.232.08:17:28.09#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.232.08:17:28.09#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.232.08:17:28.09#ibcon#ireg 7 cls_cnt 0 2006.232.08:17:28.09#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.232.08:17:28.20#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.232.08:17:28.20#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.232.08:17:28.20#ibcon#enter wrdev, iclass 40, count 0 2006.232.08:17:28.20#ibcon#first serial, iclass 40, count 0 2006.232.08:17:28.20#ibcon#enter sib2, iclass 40, count 0 2006.232.08:17:28.20#ibcon#flushed, iclass 40, count 0 2006.232.08:17:28.20#ibcon#about to write, iclass 40, count 0 2006.232.08:17:28.20#ibcon#wrote, iclass 40, count 0 2006.232.08:17:28.20#ibcon#about to read 3, iclass 40, count 0 2006.232.08:17:28.22#ibcon#read 3, iclass 40, count 0 2006.232.08:17:28.22#ibcon#about to read 4, iclass 40, count 0 2006.232.08:17:28.22#ibcon#read 4, iclass 40, count 0 2006.232.08:17:28.22#ibcon#about to read 5, iclass 40, count 0 2006.232.08:17:28.22#ibcon#read 5, iclass 40, count 0 2006.232.08:17:28.22#ibcon#about to read 6, iclass 40, count 0 2006.232.08:17:28.22#ibcon#read 6, iclass 40, count 0 2006.232.08:17:28.22#ibcon#end of sib2, iclass 40, count 0 2006.232.08:17:28.22#ibcon#*mode == 0, iclass 40, count 0 2006.232.08:17:28.22#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.232.08:17:28.22#ibcon#[25=USB\r\n] 2006.232.08:17:28.22#ibcon#*before write, iclass 40, count 0 2006.232.08:17:28.22#ibcon#enter sib2, iclass 40, count 0 2006.232.08:17:28.22#ibcon#flushed, iclass 40, count 0 2006.232.08:17:28.22#ibcon#about to write, iclass 40, count 0 2006.232.08:17:28.22#ibcon#wrote, iclass 40, count 0 2006.232.08:17:28.22#ibcon#about to read 3, iclass 40, count 0 2006.232.08:17:28.25#ibcon#read 3, iclass 40, count 0 2006.232.08:17:28.25#ibcon#about to read 4, iclass 40, count 0 2006.232.08:17:28.25#ibcon#read 4, iclass 40, count 0 2006.232.08:17:28.25#ibcon#about to read 5, iclass 40, count 0 2006.232.08:17:28.25#ibcon#read 5, iclass 40, count 0 2006.232.08:17:28.25#ibcon#about to read 6, iclass 40, count 0 2006.232.08:17:28.25#ibcon#read 6, iclass 40, count 0 2006.232.08:17:28.25#ibcon#end of sib2, iclass 40, count 0 2006.232.08:17:28.25#ibcon#*after write, iclass 40, count 0 2006.232.08:17:28.25#ibcon#*before return 0, iclass 40, count 0 2006.232.08:17:28.25#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.232.08:17:28.25#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.232.08:17:28.25#ibcon#about to clear, iclass 40 cls_cnt 0 2006.232.08:17:28.25#ibcon#cleared, iclass 40 cls_cnt 0 2006.232.08:17:28.25$vc4f8/valo=2,572.99 2006.232.08:17:28.25#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.232.08:17:28.25#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.232.08:17:28.25#ibcon#ireg 17 cls_cnt 0 2006.232.08:17:28.25#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.232.08:17:28.25#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.232.08:17:28.25#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.232.08:17:28.25#ibcon#enter wrdev, iclass 4, count 0 2006.232.08:17:28.25#ibcon#first serial, iclass 4, count 0 2006.232.08:17:28.25#ibcon#enter sib2, iclass 4, count 0 2006.232.08:17:28.25#ibcon#flushed, iclass 4, count 0 2006.232.08:17:28.25#ibcon#about to write, iclass 4, count 0 2006.232.08:17:28.25#ibcon#wrote, iclass 4, count 0 2006.232.08:17:28.25#ibcon#about to read 3, iclass 4, count 0 2006.232.08:17:28.27#ibcon#read 3, iclass 4, count 0 2006.232.08:17:28.27#ibcon#about to read 4, iclass 4, count 0 2006.232.08:17:28.27#ibcon#read 4, iclass 4, count 0 2006.232.08:17:28.27#ibcon#about to read 5, iclass 4, count 0 2006.232.08:17:28.27#ibcon#read 5, iclass 4, count 0 2006.232.08:17:28.27#ibcon#about to read 6, iclass 4, count 0 2006.232.08:17:28.27#ibcon#read 6, iclass 4, count 0 2006.232.08:17:28.27#ibcon#end of sib2, iclass 4, count 0 2006.232.08:17:28.27#ibcon#*mode == 0, iclass 4, count 0 2006.232.08:17:28.27#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.232.08:17:28.27#ibcon#[26=FRQ=02,572.99\r\n] 2006.232.08:17:28.27#ibcon#*before write, iclass 4, count 0 2006.232.08:17:28.27#ibcon#enter sib2, iclass 4, count 0 2006.232.08:17:28.27#ibcon#flushed, iclass 4, count 0 2006.232.08:17:28.27#ibcon#about to write, iclass 4, count 0 2006.232.08:17:28.27#ibcon#wrote, iclass 4, count 0 2006.232.08:17:28.27#ibcon#about to read 3, iclass 4, count 0 2006.232.08:17:28.31#ibcon#read 3, iclass 4, count 0 2006.232.08:17:28.31#ibcon#about to read 4, iclass 4, count 0 2006.232.08:17:28.31#ibcon#read 4, iclass 4, count 0 2006.232.08:17:28.31#ibcon#about to read 5, iclass 4, count 0 2006.232.08:17:28.31#ibcon#read 5, iclass 4, count 0 2006.232.08:17:28.31#ibcon#about to read 6, iclass 4, count 0 2006.232.08:17:28.31#ibcon#read 6, iclass 4, count 0 2006.232.08:17:28.31#ibcon#end of sib2, iclass 4, count 0 2006.232.08:17:28.31#ibcon#*after write, iclass 4, count 0 2006.232.08:17:28.31#ibcon#*before return 0, iclass 4, count 0 2006.232.08:17:28.31#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.232.08:17:28.31#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.232.08:17:28.31#ibcon#about to clear, iclass 4 cls_cnt 0 2006.232.08:17:28.31#ibcon#cleared, iclass 4 cls_cnt 0 2006.232.08:17:28.31$vc4f8/va=2,7 2006.232.08:17:28.31#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.232.08:17:28.31#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.232.08:17:28.31#ibcon#ireg 11 cls_cnt 2 2006.232.08:17:28.31#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.232.08:17:28.37#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.232.08:17:28.37#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.232.08:17:28.37#ibcon#enter wrdev, iclass 6, count 2 2006.232.08:17:28.37#ibcon#first serial, iclass 6, count 2 2006.232.08:17:28.37#ibcon#enter sib2, iclass 6, count 2 2006.232.08:17:28.37#ibcon#flushed, iclass 6, count 2 2006.232.08:17:28.37#ibcon#about to write, iclass 6, count 2 2006.232.08:17:28.38#ibcon#wrote, iclass 6, count 2 2006.232.08:17:28.38#ibcon#about to read 3, iclass 6, count 2 2006.232.08:17:28.39#ibcon#read 3, iclass 6, count 2 2006.232.08:17:28.39#ibcon#about to read 4, iclass 6, count 2 2006.232.08:17:28.39#ibcon#read 4, iclass 6, count 2 2006.232.08:17:28.39#ibcon#about to read 5, iclass 6, count 2 2006.232.08:17:28.39#ibcon#read 5, iclass 6, count 2 2006.232.08:17:28.39#ibcon#about to read 6, iclass 6, count 2 2006.232.08:17:28.39#ibcon#read 6, iclass 6, count 2 2006.232.08:17:28.39#ibcon#end of sib2, iclass 6, count 2 2006.232.08:17:28.39#ibcon#*mode == 0, iclass 6, count 2 2006.232.08:17:28.39#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.232.08:17:28.39#ibcon#[25=AT02-07\r\n] 2006.232.08:17:28.39#ibcon#*before write, iclass 6, count 2 2006.232.08:17:28.39#ibcon#enter sib2, iclass 6, count 2 2006.232.08:17:28.39#ibcon#flushed, iclass 6, count 2 2006.232.08:17:28.39#ibcon#about to write, iclass 6, count 2 2006.232.08:17:28.39#ibcon#wrote, iclass 6, count 2 2006.232.08:17:28.39#ibcon#about to read 3, iclass 6, count 2 2006.232.08:17:28.42#ibcon#read 3, iclass 6, count 2 2006.232.08:17:28.42#ibcon#about to read 4, iclass 6, count 2 2006.232.08:17:28.42#ibcon#read 4, iclass 6, count 2 2006.232.08:17:28.42#ibcon#about to read 5, iclass 6, count 2 2006.232.08:17:28.42#ibcon#read 5, iclass 6, count 2 2006.232.08:17:28.42#ibcon#about to read 6, iclass 6, count 2 2006.232.08:17:28.42#ibcon#read 6, iclass 6, count 2 2006.232.08:17:28.42#ibcon#end of sib2, iclass 6, count 2 2006.232.08:17:28.42#ibcon#*after write, iclass 6, count 2 2006.232.08:17:28.42#ibcon#*before return 0, iclass 6, count 2 2006.232.08:17:28.42#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.232.08:17:28.42#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.232.08:17:28.42#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.232.08:17:28.42#ibcon#ireg 7 cls_cnt 0 2006.232.08:17:28.42#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.232.08:17:28.54#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.232.08:17:28.54#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.232.08:17:28.54#ibcon#enter wrdev, iclass 6, count 0 2006.232.08:17:28.54#ibcon#first serial, iclass 6, count 0 2006.232.08:17:28.54#ibcon#enter sib2, iclass 6, count 0 2006.232.08:17:28.54#ibcon#flushed, iclass 6, count 0 2006.232.08:17:28.54#ibcon#about to write, iclass 6, count 0 2006.232.08:17:28.54#ibcon#wrote, iclass 6, count 0 2006.232.08:17:28.54#ibcon#about to read 3, iclass 6, count 0 2006.232.08:17:28.56#ibcon#read 3, iclass 6, count 0 2006.232.08:17:28.56#ibcon#about to read 4, iclass 6, count 0 2006.232.08:17:28.56#ibcon#read 4, iclass 6, count 0 2006.232.08:17:28.56#ibcon#about to read 5, iclass 6, count 0 2006.232.08:17:28.56#ibcon#read 5, iclass 6, count 0 2006.232.08:17:28.56#ibcon#about to read 6, iclass 6, count 0 2006.232.08:17:28.56#ibcon#read 6, iclass 6, count 0 2006.232.08:17:28.56#ibcon#end of sib2, iclass 6, count 0 2006.232.08:17:28.56#ibcon#*mode == 0, iclass 6, count 0 2006.232.08:17:28.56#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.232.08:17:28.56#ibcon#[25=USB\r\n] 2006.232.08:17:28.56#ibcon#*before write, iclass 6, count 0 2006.232.08:17:28.56#ibcon#enter sib2, iclass 6, count 0 2006.232.08:17:28.56#ibcon#flushed, iclass 6, count 0 2006.232.08:17:28.56#ibcon#about to write, iclass 6, count 0 2006.232.08:17:28.56#ibcon#wrote, iclass 6, count 0 2006.232.08:17:28.56#ibcon#about to read 3, iclass 6, count 0 2006.232.08:17:28.59#ibcon#read 3, iclass 6, count 0 2006.232.08:17:28.59#ibcon#about to read 4, iclass 6, count 0 2006.232.08:17:28.59#ibcon#read 4, iclass 6, count 0 2006.232.08:17:28.59#ibcon#about to read 5, iclass 6, count 0 2006.232.08:17:28.59#ibcon#read 5, iclass 6, count 0 2006.232.08:17:28.59#ibcon#about to read 6, iclass 6, count 0 2006.232.08:17:28.59#ibcon#read 6, iclass 6, count 0 2006.232.08:17:28.59#ibcon#end of sib2, iclass 6, count 0 2006.232.08:17:28.59#ibcon#*after write, iclass 6, count 0 2006.232.08:17:28.59#ibcon#*before return 0, iclass 6, count 0 2006.232.08:17:28.59#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.232.08:17:28.59#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.232.08:17:28.59#ibcon#about to clear, iclass 6 cls_cnt 0 2006.232.08:17:28.59#ibcon#cleared, iclass 6 cls_cnt 0 2006.232.08:17:28.59$vc4f8/valo=3,672.99 2006.232.08:17:28.59#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.232.08:17:28.59#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.232.08:17:28.59#ibcon#ireg 17 cls_cnt 0 2006.232.08:17:28.59#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.232.08:17:28.59#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.232.08:17:28.59#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.232.08:17:28.59#ibcon#enter wrdev, iclass 10, count 0 2006.232.08:17:28.59#ibcon#first serial, iclass 10, count 0 2006.232.08:17:28.59#ibcon#enter sib2, iclass 10, count 0 2006.232.08:17:28.59#ibcon#flushed, iclass 10, count 0 2006.232.08:17:28.59#ibcon#about to write, iclass 10, count 0 2006.232.08:17:28.59#ibcon#wrote, iclass 10, count 0 2006.232.08:17:28.59#ibcon#about to read 3, iclass 10, count 0 2006.232.08:17:28.61#ibcon#read 3, iclass 10, count 0 2006.232.08:17:28.61#ibcon#about to read 4, iclass 10, count 0 2006.232.08:17:28.61#ibcon#read 4, iclass 10, count 0 2006.232.08:17:28.61#ibcon#about to read 5, iclass 10, count 0 2006.232.08:17:28.61#ibcon#read 5, iclass 10, count 0 2006.232.08:17:28.61#ibcon#about to read 6, iclass 10, count 0 2006.232.08:17:28.61#ibcon#read 6, iclass 10, count 0 2006.232.08:17:28.61#ibcon#end of sib2, iclass 10, count 0 2006.232.08:17:28.61#ibcon#*mode == 0, iclass 10, count 0 2006.232.08:17:28.61#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.232.08:17:28.61#ibcon#[26=FRQ=03,672.99\r\n] 2006.232.08:17:28.61#ibcon#*before write, iclass 10, count 0 2006.232.08:17:28.61#ibcon#enter sib2, iclass 10, count 0 2006.232.08:17:28.61#ibcon#flushed, iclass 10, count 0 2006.232.08:17:28.61#ibcon#about to write, iclass 10, count 0 2006.232.08:17:28.61#ibcon#wrote, iclass 10, count 0 2006.232.08:17:28.61#ibcon#about to read 3, iclass 10, count 0 2006.232.08:17:28.65#ibcon#read 3, iclass 10, count 0 2006.232.08:17:28.65#ibcon#about to read 4, iclass 10, count 0 2006.232.08:17:28.65#ibcon#read 4, iclass 10, count 0 2006.232.08:17:28.65#ibcon#about to read 5, iclass 10, count 0 2006.232.08:17:28.65#ibcon#read 5, iclass 10, count 0 2006.232.08:17:28.65#ibcon#about to read 6, iclass 10, count 0 2006.232.08:17:28.65#ibcon#read 6, iclass 10, count 0 2006.232.08:17:28.65#ibcon#end of sib2, iclass 10, count 0 2006.232.08:17:28.65#ibcon#*after write, iclass 10, count 0 2006.232.08:17:28.65#ibcon#*before return 0, iclass 10, count 0 2006.232.08:17:28.65#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.232.08:17:28.65#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.232.08:17:28.65#ibcon#about to clear, iclass 10 cls_cnt 0 2006.232.08:17:28.65#ibcon#cleared, iclass 10 cls_cnt 0 2006.232.08:17:28.65$vc4f8/va=3,8 2006.232.08:17:28.65#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.232.08:17:28.65#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.232.08:17:28.65#ibcon#ireg 11 cls_cnt 2 2006.232.08:17:28.65#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.232.08:17:28.72#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.232.08:17:28.72#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.232.08:17:28.72#ibcon#enter wrdev, iclass 12, count 2 2006.232.08:17:28.72#ibcon#first serial, iclass 12, count 2 2006.232.08:17:28.72#ibcon#enter sib2, iclass 12, count 2 2006.232.08:17:28.72#ibcon#flushed, iclass 12, count 2 2006.232.08:17:28.72#ibcon#about to write, iclass 12, count 2 2006.232.08:17:28.72#ibcon#wrote, iclass 12, count 2 2006.232.08:17:28.72#ibcon#about to read 3, iclass 12, count 2 2006.232.08:17:28.73#ibcon#read 3, iclass 12, count 2 2006.232.08:17:28.73#ibcon#about to read 4, iclass 12, count 2 2006.232.08:17:28.73#ibcon#read 4, iclass 12, count 2 2006.232.08:17:28.73#ibcon#about to read 5, iclass 12, count 2 2006.232.08:17:28.73#ibcon#read 5, iclass 12, count 2 2006.232.08:17:28.73#ibcon#about to read 6, iclass 12, count 2 2006.232.08:17:28.73#ibcon#read 6, iclass 12, count 2 2006.232.08:17:28.73#ibcon#end of sib2, iclass 12, count 2 2006.232.08:17:28.73#ibcon#*mode == 0, iclass 12, count 2 2006.232.08:17:28.73#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.232.08:17:28.73#ibcon#[25=AT03-08\r\n] 2006.232.08:17:28.73#ibcon#*before write, iclass 12, count 2 2006.232.08:17:28.73#ibcon#enter sib2, iclass 12, count 2 2006.232.08:17:28.73#ibcon#flushed, iclass 12, count 2 2006.232.08:17:28.73#ibcon#about to write, iclass 12, count 2 2006.232.08:17:28.73#ibcon#wrote, iclass 12, count 2 2006.232.08:17:28.73#ibcon#about to read 3, iclass 12, count 2 2006.232.08:17:28.76#ibcon#read 3, iclass 12, count 2 2006.232.08:17:28.76#ibcon#about to read 4, iclass 12, count 2 2006.232.08:17:28.76#ibcon#read 4, iclass 12, count 2 2006.232.08:17:28.76#ibcon#about to read 5, iclass 12, count 2 2006.232.08:17:28.76#ibcon#read 5, iclass 12, count 2 2006.232.08:17:28.76#ibcon#about to read 6, iclass 12, count 2 2006.232.08:17:28.76#ibcon#read 6, iclass 12, count 2 2006.232.08:17:28.76#ibcon#end of sib2, iclass 12, count 2 2006.232.08:17:28.76#ibcon#*after write, iclass 12, count 2 2006.232.08:17:28.76#ibcon#*before return 0, iclass 12, count 2 2006.232.08:17:28.76#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.232.08:17:28.76#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.232.08:17:28.76#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.232.08:17:28.76#ibcon#ireg 7 cls_cnt 0 2006.232.08:17:28.76#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.232.08:17:28.88#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.232.08:17:28.88#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.232.08:17:28.88#ibcon#enter wrdev, iclass 12, count 0 2006.232.08:17:28.88#ibcon#first serial, iclass 12, count 0 2006.232.08:17:28.88#ibcon#enter sib2, iclass 12, count 0 2006.232.08:17:28.88#ibcon#flushed, iclass 12, count 0 2006.232.08:17:28.88#ibcon#about to write, iclass 12, count 0 2006.232.08:17:28.88#ibcon#wrote, iclass 12, count 0 2006.232.08:17:28.88#ibcon#about to read 3, iclass 12, count 0 2006.232.08:17:28.90#ibcon#read 3, iclass 12, count 0 2006.232.08:17:28.90#ibcon#about to read 4, iclass 12, count 0 2006.232.08:17:28.90#ibcon#read 4, iclass 12, count 0 2006.232.08:17:28.90#ibcon#about to read 5, iclass 12, count 0 2006.232.08:17:28.90#ibcon#read 5, iclass 12, count 0 2006.232.08:17:28.90#ibcon#about to read 6, iclass 12, count 0 2006.232.08:17:28.90#ibcon#read 6, iclass 12, count 0 2006.232.08:17:28.90#ibcon#end of sib2, iclass 12, count 0 2006.232.08:17:28.90#ibcon#*mode == 0, iclass 12, count 0 2006.232.08:17:28.90#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.232.08:17:28.90#ibcon#[25=USB\r\n] 2006.232.08:17:28.90#ibcon#*before write, iclass 12, count 0 2006.232.08:17:28.90#ibcon#enter sib2, iclass 12, count 0 2006.232.08:17:28.90#ibcon#flushed, iclass 12, count 0 2006.232.08:17:28.90#ibcon#about to write, iclass 12, count 0 2006.232.08:17:28.90#ibcon#wrote, iclass 12, count 0 2006.232.08:17:28.90#ibcon#about to read 3, iclass 12, count 0 2006.232.08:17:28.93#ibcon#read 3, iclass 12, count 0 2006.232.08:17:28.93#ibcon#about to read 4, iclass 12, count 0 2006.232.08:17:28.93#ibcon#read 4, iclass 12, count 0 2006.232.08:17:28.93#ibcon#about to read 5, iclass 12, count 0 2006.232.08:17:28.93#ibcon#read 5, iclass 12, count 0 2006.232.08:17:28.93#ibcon#about to read 6, iclass 12, count 0 2006.232.08:17:28.93#ibcon#read 6, iclass 12, count 0 2006.232.08:17:28.93#ibcon#end of sib2, iclass 12, count 0 2006.232.08:17:28.93#ibcon#*after write, iclass 12, count 0 2006.232.08:17:28.93#ibcon#*before return 0, iclass 12, count 0 2006.232.08:17:28.93#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.232.08:17:28.93#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.232.08:17:28.93#ibcon#about to clear, iclass 12 cls_cnt 0 2006.232.08:17:28.93#ibcon#cleared, iclass 12 cls_cnt 0 2006.232.08:17:28.93$vc4f8/valo=4,832.99 2006.232.08:17:28.93#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.232.08:17:28.93#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.232.08:17:28.93#ibcon#ireg 17 cls_cnt 0 2006.232.08:17:28.93#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.232.08:17:28.93#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.232.08:17:28.93#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.232.08:17:28.93#ibcon#enter wrdev, iclass 14, count 0 2006.232.08:17:28.93#ibcon#first serial, iclass 14, count 0 2006.232.08:17:28.93#ibcon#enter sib2, iclass 14, count 0 2006.232.08:17:28.93#ibcon#flushed, iclass 14, count 0 2006.232.08:17:28.93#ibcon#about to write, iclass 14, count 0 2006.232.08:17:28.93#ibcon#wrote, iclass 14, count 0 2006.232.08:17:28.93#ibcon#about to read 3, iclass 14, count 0 2006.232.08:17:28.95#ibcon#read 3, iclass 14, count 0 2006.232.08:17:28.95#ibcon#about to read 4, iclass 14, count 0 2006.232.08:17:28.95#ibcon#read 4, iclass 14, count 0 2006.232.08:17:28.95#ibcon#about to read 5, iclass 14, count 0 2006.232.08:17:28.95#ibcon#read 5, iclass 14, count 0 2006.232.08:17:28.95#ibcon#about to read 6, iclass 14, count 0 2006.232.08:17:28.95#ibcon#read 6, iclass 14, count 0 2006.232.08:17:28.95#ibcon#end of sib2, iclass 14, count 0 2006.232.08:17:28.95#ibcon#*mode == 0, iclass 14, count 0 2006.232.08:17:28.95#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.232.08:17:28.95#ibcon#[26=FRQ=04,832.99\r\n] 2006.232.08:17:28.95#ibcon#*before write, iclass 14, count 0 2006.232.08:17:28.95#ibcon#enter sib2, iclass 14, count 0 2006.232.08:17:28.95#ibcon#flushed, iclass 14, count 0 2006.232.08:17:28.95#ibcon#about to write, iclass 14, count 0 2006.232.08:17:28.95#ibcon#wrote, iclass 14, count 0 2006.232.08:17:28.95#ibcon#about to read 3, iclass 14, count 0 2006.232.08:17:28.99#ibcon#read 3, iclass 14, count 0 2006.232.08:17:28.99#ibcon#about to read 4, iclass 14, count 0 2006.232.08:17:28.99#ibcon#read 4, iclass 14, count 0 2006.232.08:17:28.99#ibcon#about to read 5, iclass 14, count 0 2006.232.08:17:28.99#ibcon#read 5, iclass 14, count 0 2006.232.08:17:28.99#ibcon#about to read 6, iclass 14, count 0 2006.232.08:17:28.99#ibcon#read 6, iclass 14, count 0 2006.232.08:17:28.99#ibcon#end of sib2, iclass 14, count 0 2006.232.08:17:28.99#ibcon#*after write, iclass 14, count 0 2006.232.08:17:28.99#ibcon#*before return 0, iclass 14, count 0 2006.232.08:17:28.99#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.232.08:17:28.99#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.232.08:17:28.99#ibcon#about to clear, iclass 14 cls_cnt 0 2006.232.08:17:28.99#ibcon#cleared, iclass 14 cls_cnt 0 2006.232.08:17:28.99$vc4f8/va=4,7 2006.232.08:17:28.99#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.232.08:17:28.99#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.232.08:17:28.99#ibcon#ireg 11 cls_cnt 2 2006.232.08:17:28.99#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.232.08:17:29.05#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.232.08:17:29.05#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.232.08:17:29.05#ibcon#enter wrdev, iclass 16, count 2 2006.232.08:17:29.05#ibcon#first serial, iclass 16, count 2 2006.232.08:17:29.05#ibcon#enter sib2, iclass 16, count 2 2006.232.08:17:29.05#ibcon#flushed, iclass 16, count 2 2006.232.08:17:29.05#ibcon#about to write, iclass 16, count 2 2006.232.08:17:29.05#ibcon#wrote, iclass 16, count 2 2006.232.08:17:29.05#ibcon#about to read 3, iclass 16, count 2 2006.232.08:17:29.07#ibcon#read 3, iclass 16, count 2 2006.232.08:17:29.07#ibcon#about to read 4, iclass 16, count 2 2006.232.08:17:29.07#ibcon#read 4, iclass 16, count 2 2006.232.08:17:29.07#ibcon#about to read 5, iclass 16, count 2 2006.232.08:17:29.07#ibcon#read 5, iclass 16, count 2 2006.232.08:17:29.07#ibcon#about to read 6, iclass 16, count 2 2006.232.08:17:29.07#ibcon#read 6, iclass 16, count 2 2006.232.08:17:29.07#ibcon#end of sib2, iclass 16, count 2 2006.232.08:17:29.07#ibcon#*mode == 0, iclass 16, count 2 2006.232.08:17:29.07#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.232.08:17:29.07#ibcon#[25=AT04-07\r\n] 2006.232.08:17:29.07#ibcon#*before write, iclass 16, count 2 2006.232.08:17:29.07#ibcon#enter sib2, iclass 16, count 2 2006.232.08:17:29.07#ibcon#flushed, iclass 16, count 2 2006.232.08:17:29.07#ibcon#about to write, iclass 16, count 2 2006.232.08:17:29.07#ibcon#wrote, iclass 16, count 2 2006.232.08:17:29.07#ibcon#about to read 3, iclass 16, count 2 2006.232.08:17:29.10#ibcon#read 3, iclass 16, count 2 2006.232.08:17:29.10#ibcon#about to read 4, iclass 16, count 2 2006.232.08:17:29.10#ibcon#read 4, iclass 16, count 2 2006.232.08:17:29.10#ibcon#about to read 5, iclass 16, count 2 2006.232.08:17:29.10#ibcon#read 5, iclass 16, count 2 2006.232.08:17:29.10#ibcon#about to read 6, iclass 16, count 2 2006.232.08:17:29.10#ibcon#read 6, iclass 16, count 2 2006.232.08:17:29.10#ibcon#end of sib2, iclass 16, count 2 2006.232.08:17:29.10#ibcon#*after write, iclass 16, count 2 2006.232.08:17:29.10#ibcon#*before return 0, iclass 16, count 2 2006.232.08:17:29.10#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.232.08:17:29.10#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.232.08:17:29.10#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.232.08:17:29.10#ibcon#ireg 7 cls_cnt 0 2006.232.08:17:29.10#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.232.08:17:29.22#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.232.08:17:29.22#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.232.08:17:29.22#ibcon#enter wrdev, iclass 16, count 0 2006.232.08:17:29.22#ibcon#first serial, iclass 16, count 0 2006.232.08:17:29.22#ibcon#enter sib2, iclass 16, count 0 2006.232.08:17:29.22#ibcon#flushed, iclass 16, count 0 2006.232.08:17:29.22#ibcon#about to write, iclass 16, count 0 2006.232.08:17:29.22#ibcon#wrote, iclass 16, count 0 2006.232.08:17:29.22#ibcon#about to read 3, iclass 16, count 0 2006.232.08:17:29.24#ibcon#read 3, iclass 16, count 0 2006.232.08:17:29.24#ibcon#about to read 4, iclass 16, count 0 2006.232.08:17:29.24#ibcon#read 4, iclass 16, count 0 2006.232.08:17:29.24#ibcon#about to read 5, iclass 16, count 0 2006.232.08:17:29.24#ibcon#read 5, iclass 16, count 0 2006.232.08:17:29.24#ibcon#about to read 6, iclass 16, count 0 2006.232.08:17:29.24#ibcon#read 6, iclass 16, count 0 2006.232.08:17:29.24#ibcon#end of sib2, iclass 16, count 0 2006.232.08:17:29.24#ibcon#*mode == 0, iclass 16, count 0 2006.232.08:17:29.24#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.232.08:17:29.24#ibcon#[25=USB\r\n] 2006.232.08:17:29.24#ibcon#*before write, iclass 16, count 0 2006.232.08:17:29.24#ibcon#enter sib2, iclass 16, count 0 2006.232.08:17:29.24#ibcon#flushed, iclass 16, count 0 2006.232.08:17:29.24#ibcon#about to write, iclass 16, count 0 2006.232.08:17:29.24#ibcon#wrote, iclass 16, count 0 2006.232.08:17:29.24#ibcon#about to read 3, iclass 16, count 0 2006.232.08:17:29.27#ibcon#read 3, iclass 16, count 0 2006.232.08:17:29.27#ibcon#about to read 4, iclass 16, count 0 2006.232.08:17:29.27#ibcon#read 4, iclass 16, count 0 2006.232.08:17:29.27#ibcon#about to read 5, iclass 16, count 0 2006.232.08:17:29.27#ibcon#read 5, iclass 16, count 0 2006.232.08:17:29.27#ibcon#about to read 6, iclass 16, count 0 2006.232.08:17:29.27#ibcon#read 6, iclass 16, count 0 2006.232.08:17:29.27#ibcon#end of sib2, iclass 16, count 0 2006.232.08:17:29.27#ibcon#*after write, iclass 16, count 0 2006.232.08:17:29.27#ibcon#*before return 0, iclass 16, count 0 2006.232.08:17:29.27#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.232.08:17:29.27#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.232.08:17:29.27#ibcon#about to clear, iclass 16 cls_cnt 0 2006.232.08:17:29.27#ibcon#cleared, iclass 16 cls_cnt 0 2006.232.08:17:29.27$vc4f8/valo=5,652.99 2006.232.08:17:29.27#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.232.08:17:29.27#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.232.08:17:29.27#ibcon#ireg 17 cls_cnt 0 2006.232.08:17:29.27#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.232.08:17:29.27#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.232.08:17:29.27#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.232.08:17:29.27#ibcon#enter wrdev, iclass 18, count 0 2006.232.08:17:29.27#ibcon#first serial, iclass 18, count 0 2006.232.08:17:29.27#ibcon#enter sib2, iclass 18, count 0 2006.232.08:17:29.27#ibcon#flushed, iclass 18, count 0 2006.232.08:17:29.27#ibcon#about to write, iclass 18, count 0 2006.232.08:17:29.27#ibcon#wrote, iclass 18, count 0 2006.232.08:17:29.27#ibcon#about to read 3, iclass 18, count 0 2006.232.08:17:29.29#ibcon#read 3, iclass 18, count 0 2006.232.08:17:29.29#ibcon#about to read 4, iclass 18, count 0 2006.232.08:17:29.29#ibcon#read 4, iclass 18, count 0 2006.232.08:17:29.29#ibcon#about to read 5, iclass 18, count 0 2006.232.08:17:29.29#ibcon#read 5, iclass 18, count 0 2006.232.08:17:29.29#ibcon#about to read 6, iclass 18, count 0 2006.232.08:17:29.29#ibcon#read 6, iclass 18, count 0 2006.232.08:17:29.29#ibcon#end of sib2, iclass 18, count 0 2006.232.08:17:29.29#ibcon#*mode == 0, iclass 18, count 0 2006.232.08:17:29.29#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.232.08:17:29.29#ibcon#[26=FRQ=05,652.99\r\n] 2006.232.08:17:29.29#ibcon#*before write, iclass 18, count 0 2006.232.08:17:29.29#ibcon#enter sib2, iclass 18, count 0 2006.232.08:17:29.29#ibcon#flushed, iclass 18, count 0 2006.232.08:17:29.29#ibcon#about to write, iclass 18, count 0 2006.232.08:17:29.29#ibcon#wrote, iclass 18, count 0 2006.232.08:17:29.29#ibcon#about to read 3, iclass 18, count 0 2006.232.08:17:29.33#ibcon#read 3, iclass 18, count 0 2006.232.08:17:29.33#ibcon#about to read 4, iclass 18, count 0 2006.232.08:17:29.33#ibcon#read 4, iclass 18, count 0 2006.232.08:17:29.33#ibcon#about to read 5, iclass 18, count 0 2006.232.08:17:29.33#ibcon#read 5, iclass 18, count 0 2006.232.08:17:29.33#ibcon#about to read 6, iclass 18, count 0 2006.232.08:17:29.33#ibcon#read 6, iclass 18, count 0 2006.232.08:17:29.33#ibcon#end of sib2, iclass 18, count 0 2006.232.08:17:29.33#ibcon#*after write, iclass 18, count 0 2006.232.08:17:29.33#ibcon#*before return 0, iclass 18, count 0 2006.232.08:17:29.33#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.232.08:17:29.33#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.232.08:17:29.33#ibcon#about to clear, iclass 18 cls_cnt 0 2006.232.08:17:29.33#ibcon#cleared, iclass 18 cls_cnt 0 2006.232.08:17:29.33$vc4f8/va=5,7 2006.232.08:17:29.33#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.232.08:17:29.33#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.232.08:17:29.33#ibcon#ireg 11 cls_cnt 2 2006.232.08:17:29.33#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.232.08:17:29.39#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.232.08:17:29.39#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.232.08:17:29.39#ibcon#enter wrdev, iclass 20, count 2 2006.232.08:17:29.39#ibcon#first serial, iclass 20, count 2 2006.232.08:17:29.39#ibcon#enter sib2, iclass 20, count 2 2006.232.08:17:29.39#ibcon#flushed, iclass 20, count 2 2006.232.08:17:29.39#ibcon#about to write, iclass 20, count 2 2006.232.08:17:29.39#ibcon#wrote, iclass 20, count 2 2006.232.08:17:29.39#ibcon#about to read 3, iclass 20, count 2 2006.232.08:17:29.41#ibcon#read 3, iclass 20, count 2 2006.232.08:17:29.41#ibcon#about to read 4, iclass 20, count 2 2006.232.08:17:29.41#ibcon#read 4, iclass 20, count 2 2006.232.08:17:29.41#ibcon#about to read 5, iclass 20, count 2 2006.232.08:17:29.41#ibcon#read 5, iclass 20, count 2 2006.232.08:17:29.41#ibcon#about to read 6, iclass 20, count 2 2006.232.08:17:29.41#ibcon#read 6, iclass 20, count 2 2006.232.08:17:29.41#ibcon#end of sib2, iclass 20, count 2 2006.232.08:17:29.41#ibcon#*mode == 0, iclass 20, count 2 2006.232.08:17:29.41#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.232.08:17:29.41#ibcon#[25=AT05-07\r\n] 2006.232.08:17:29.41#ibcon#*before write, iclass 20, count 2 2006.232.08:17:29.41#ibcon#enter sib2, iclass 20, count 2 2006.232.08:17:29.41#ibcon#flushed, iclass 20, count 2 2006.232.08:17:29.41#ibcon#about to write, iclass 20, count 2 2006.232.08:17:29.41#ibcon#wrote, iclass 20, count 2 2006.232.08:17:29.41#ibcon#about to read 3, iclass 20, count 2 2006.232.08:17:29.44#ibcon#read 3, iclass 20, count 2 2006.232.08:17:29.44#ibcon#about to read 4, iclass 20, count 2 2006.232.08:17:29.44#ibcon#read 4, iclass 20, count 2 2006.232.08:17:29.44#ibcon#about to read 5, iclass 20, count 2 2006.232.08:17:29.44#ibcon#read 5, iclass 20, count 2 2006.232.08:17:29.44#ibcon#about to read 6, iclass 20, count 2 2006.232.08:17:29.44#ibcon#read 6, iclass 20, count 2 2006.232.08:17:29.44#ibcon#end of sib2, iclass 20, count 2 2006.232.08:17:29.44#ibcon#*after write, iclass 20, count 2 2006.232.08:17:29.44#ibcon#*before return 0, iclass 20, count 2 2006.232.08:17:29.44#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.232.08:17:29.44#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.232.08:17:29.44#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.232.08:17:29.44#ibcon#ireg 7 cls_cnt 0 2006.232.08:17:29.44#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.232.08:17:29.56#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.232.08:17:29.56#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.232.08:17:29.56#ibcon#enter wrdev, iclass 20, count 0 2006.232.08:17:29.56#ibcon#first serial, iclass 20, count 0 2006.232.08:17:29.56#ibcon#enter sib2, iclass 20, count 0 2006.232.08:17:29.56#ibcon#flushed, iclass 20, count 0 2006.232.08:17:29.56#ibcon#about to write, iclass 20, count 0 2006.232.08:17:29.56#ibcon#wrote, iclass 20, count 0 2006.232.08:17:29.56#ibcon#about to read 3, iclass 20, count 0 2006.232.08:17:29.58#ibcon#read 3, iclass 20, count 0 2006.232.08:17:29.58#ibcon#about to read 4, iclass 20, count 0 2006.232.08:17:29.58#ibcon#read 4, iclass 20, count 0 2006.232.08:17:29.58#ibcon#about to read 5, iclass 20, count 0 2006.232.08:17:29.58#ibcon#read 5, iclass 20, count 0 2006.232.08:17:29.58#ibcon#about to read 6, iclass 20, count 0 2006.232.08:17:29.58#ibcon#read 6, iclass 20, count 0 2006.232.08:17:29.58#ibcon#end of sib2, iclass 20, count 0 2006.232.08:17:29.58#ibcon#*mode == 0, iclass 20, count 0 2006.232.08:17:29.58#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.232.08:17:29.58#ibcon#[25=USB\r\n] 2006.232.08:17:29.58#ibcon#*before write, iclass 20, count 0 2006.232.08:17:29.58#ibcon#enter sib2, iclass 20, count 0 2006.232.08:17:29.58#ibcon#flushed, iclass 20, count 0 2006.232.08:17:29.58#ibcon#about to write, iclass 20, count 0 2006.232.08:17:29.58#ibcon#wrote, iclass 20, count 0 2006.232.08:17:29.58#ibcon#about to read 3, iclass 20, count 0 2006.232.08:17:29.61#ibcon#read 3, iclass 20, count 0 2006.232.08:17:29.61#ibcon#about to read 4, iclass 20, count 0 2006.232.08:17:29.61#ibcon#read 4, iclass 20, count 0 2006.232.08:17:29.61#ibcon#about to read 5, iclass 20, count 0 2006.232.08:17:29.61#ibcon#read 5, iclass 20, count 0 2006.232.08:17:29.61#ibcon#about to read 6, iclass 20, count 0 2006.232.08:17:29.61#ibcon#read 6, iclass 20, count 0 2006.232.08:17:29.61#ibcon#end of sib2, iclass 20, count 0 2006.232.08:17:29.61#ibcon#*after write, iclass 20, count 0 2006.232.08:17:29.61#ibcon#*before return 0, iclass 20, count 0 2006.232.08:17:29.61#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.232.08:17:29.61#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.232.08:17:29.61#ibcon#about to clear, iclass 20 cls_cnt 0 2006.232.08:17:29.61#ibcon#cleared, iclass 20 cls_cnt 0 2006.232.08:17:29.61$vc4f8/valo=6,772.99 2006.232.08:17:29.61#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.232.08:17:29.61#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.232.08:17:29.61#ibcon#ireg 17 cls_cnt 0 2006.232.08:17:29.61#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.232.08:17:29.61#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.232.08:17:29.61#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.232.08:17:29.61#ibcon#enter wrdev, iclass 22, count 0 2006.232.08:17:29.61#ibcon#first serial, iclass 22, count 0 2006.232.08:17:29.61#ibcon#enter sib2, iclass 22, count 0 2006.232.08:17:29.61#ibcon#flushed, iclass 22, count 0 2006.232.08:17:29.61#ibcon#about to write, iclass 22, count 0 2006.232.08:17:29.61#ibcon#wrote, iclass 22, count 0 2006.232.08:17:29.61#ibcon#about to read 3, iclass 22, count 0 2006.232.08:17:29.63#ibcon#read 3, iclass 22, count 0 2006.232.08:17:29.63#ibcon#about to read 4, iclass 22, count 0 2006.232.08:17:29.63#ibcon#read 4, iclass 22, count 0 2006.232.08:17:29.63#ibcon#about to read 5, iclass 22, count 0 2006.232.08:17:29.63#ibcon#read 5, iclass 22, count 0 2006.232.08:17:29.63#ibcon#about to read 6, iclass 22, count 0 2006.232.08:17:29.63#ibcon#read 6, iclass 22, count 0 2006.232.08:17:29.63#ibcon#end of sib2, iclass 22, count 0 2006.232.08:17:29.63#ibcon#*mode == 0, iclass 22, count 0 2006.232.08:17:29.63#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.232.08:17:29.63#ibcon#[26=FRQ=06,772.99\r\n] 2006.232.08:17:29.63#ibcon#*before write, iclass 22, count 0 2006.232.08:17:29.63#ibcon#enter sib2, iclass 22, count 0 2006.232.08:17:29.63#ibcon#flushed, iclass 22, count 0 2006.232.08:17:29.63#ibcon#about to write, iclass 22, count 0 2006.232.08:17:29.63#ibcon#wrote, iclass 22, count 0 2006.232.08:17:29.63#ibcon#about to read 3, iclass 22, count 0 2006.232.08:17:29.67#ibcon#read 3, iclass 22, count 0 2006.232.08:17:29.67#ibcon#about to read 4, iclass 22, count 0 2006.232.08:17:29.67#ibcon#read 4, iclass 22, count 0 2006.232.08:17:29.67#ibcon#about to read 5, iclass 22, count 0 2006.232.08:17:29.67#ibcon#read 5, iclass 22, count 0 2006.232.08:17:29.67#ibcon#about to read 6, iclass 22, count 0 2006.232.08:17:29.67#ibcon#read 6, iclass 22, count 0 2006.232.08:17:29.67#ibcon#end of sib2, iclass 22, count 0 2006.232.08:17:29.67#ibcon#*after write, iclass 22, count 0 2006.232.08:17:29.67#ibcon#*before return 0, iclass 22, count 0 2006.232.08:17:29.67#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.232.08:17:29.67#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.232.08:17:29.67#ibcon#about to clear, iclass 22 cls_cnt 0 2006.232.08:17:29.67#ibcon#cleared, iclass 22 cls_cnt 0 2006.232.08:17:29.67$vc4f8/va=6,6 2006.232.08:17:29.67#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.232.08:17:29.67#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.232.08:17:29.67#ibcon#ireg 11 cls_cnt 2 2006.232.08:17:29.67#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.232.08:17:29.74#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.232.08:17:29.74#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.232.08:17:29.74#ibcon#enter wrdev, iclass 24, count 2 2006.232.08:17:29.74#ibcon#first serial, iclass 24, count 2 2006.232.08:17:29.74#ibcon#enter sib2, iclass 24, count 2 2006.232.08:17:29.74#ibcon#flushed, iclass 24, count 2 2006.232.08:17:29.74#ibcon#about to write, iclass 24, count 2 2006.232.08:17:29.74#ibcon#wrote, iclass 24, count 2 2006.232.08:17:29.74#ibcon#about to read 3, iclass 24, count 2 2006.232.08:17:29.75#ibcon#read 3, iclass 24, count 2 2006.232.08:17:29.75#ibcon#about to read 4, iclass 24, count 2 2006.232.08:17:29.75#ibcon#read 4, iclass 24, count 2 2006.232.08:17:29.75#ibcon#about to read 5, iclass 24, count 2 2006.232.08:17:29.75#ibcon#read 5, iclass 24, count 2 2006.232.08:17:29.75#ibcon#about to read 6, iclass 24, count 2 2006.232.08:17:29.75#ibcon#read 6, iclass 24, count 2 2006.232.08:17:29.75#ibcon#end of sib2, iclass 24, count 2 2006.232.08:17:29.75#ibcon#*mode == 0, iclass 24, count 2 2006.232.08:17:29.75#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.232.08:17:29.75#ibcon#[25=AT06-06\r\n] 2006.232.08:17:29.75#ibcon#*before write, iclass 24, count 2 2006.232.08:17:29.75#ibcon#enter sib2, iclass 24, count 2 2006.232.08:17:29.75#ibcon#flushed, iclass 24, count 2 2006.232.08:17:29.75#ibcon#about to write, iclass 24, count 2 2006.232.08:17:29.75#ibcon#wrote, iclass 24, count 2 2006.232.08:17:29.75#ibcon#about to read 3, iclass 24, count 2 2006.232.08:17:29.78#ibcon#read 3, iclass 24, count 2 2006.232.08:17:29.78#ibcon#about to read 4, iclass 24, count 2 2006.232.08:17:29.78#ibcon#read 4, iclass 24, count 2 2006.232.08:17:29.78#ibcon#about to read 5, iclass 24, count 2 2006.232.08:17:29.78#ibcon#read 5, iclass 24, count 2 2006.232.08:17:29.78#ibcon#about to read 6, iclass 24, count 2 2006.232.08:17:29.78#ibcon#read 6, iclass 24, count 2 2006.232.08:17:29.78#ibcon#end of sib2, iclass 24, count 2 2006.232.08:17:29.78#ibcon#*after write, iclass 24, count 2 2006.232.08:17:29.78#ibcon#*before return 0, iclass 24, count 2 2006.232.08:17:29.78#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.232.08:17:29.78#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.232.08:17:29.78#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.232.08:17:29.78#ibcon#ireg 7 cls_cnt 0 2006.232.08:17:29.78#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.232.08:17:29.90#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.232.08:17:29.90#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.232.08:17:29.90#ibcon#enter wrdev, iclass 24, count 0 2006.232.08:17:29.90#ibcon#first serial, iclass 24, count 0 2006.232.08:17:29.90#ibcon#enter sib2, iclass 24, count 0 2006.232.08:17:29.90#ibcon#flushed, iclass 24, count 0 2006.232.08:17:29.90#ibcon#about to write, iclass 24, count 0 2006.232.08:17:29.90#ibcon#wrote, iclass 24, count 0 2006.232.08:17:29.90#ibcon#about to read 3, iclass 24, count 0 2006.232.08:17:29.92#ibcon#read 3, iclass 24, count 0 2006.232.08:17:29.92#ibcon#about to read 4, iclass 24, count 0 2006.232.08:17:29.92#ibcon#read 4, iclass 24, count 0 2006.232.08:17:29.92#ibcon#about to read 5, iclass 24, count 0 2006.232.08:17:29.92#ibcon#read 5, iclass 24, count 0 2006.232.08:17:29.92#ibcon#about to read 6, iclass 24, count 0 2006.232.08:17:29.92#ibcon#read 6, iclass 24, count 0 2006.232.08:17:29.92#ibcon#end of sib2, iclass 24, count 0 2006.232.08:17:29.92#ibcon#*mode == 0, iclass 24, count 0 2006.232.08:17:29.92#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.232.08:17:29.92#ibcon#[25=USB\r\n] 2006.232.08:17:29.92#ibcon#*before write, iclass 24, count 0 2006.232.08:17:29.92#ibcon#enter sib2, iclass 24, count 0 2006.232.08:17:29.92#ibcon#flushed, iclass 24, count 0 2006.232.08:17:29.92#ibcon#about to write, iclass 24, count 0 2006.232.08:17:29.92#ibcon#wrote, iclass 24, count 0 2006.232.08:17:29.92#ibcon#about to read 3, iclass 24, count 0 2006.232.08:17:29.95#ibcon#read 3, iclass 24, count 0 2006.232.08:17:29.95#ibcon#about to read 4, iclass 24, count 0 2006.232.08:17:29.95#ibcon#read 4, iclass 24, count 0 2006.232.08:17:29.95#ibcon#about to read 5, iclass 24, count 0 2006.232.08:17:29.95#ibcon#read 5, iclass 24, count 0 2006.232.08:17:29.95#ibcon#about to read 6, iclass 24, count 0 2006.232.08:17:29.95#ibcon#read 6, iclass 24, count 0 2006.232.08:17:29.95#ibcon#end of sib2, iclass 24, count 0 2006.232.08:17:29.95#ibcon#*after write, iclass 24, count 0 2006.232.08:17:29.95#ibcon#*before return 0, iclass 24, count 0 2006.232.08:17:29.95#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.232.08:17:29.95#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.232.08:17:29.95#ibcon#about to clear, iclass 24 cls_cnt 0 2006.232.08:17:29.95#ibcon#cleared, iclass 24 cls_cnt 0 2006.232.08:17:29.95$vc4f8/valo=7,832.99 2006.232.08:17:29.95#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.232.08:17:29.95#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.232.08:17:29.95#ibcon#ireg 17 cls_cnt 0 2006.232.08:17:29.95#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.232.08:17:29.95#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.232.08:17:29.95#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.232.08:17:29.95#ibcon#enter wrdev, iclass 26, count 0 2006.232.08:17:29.95#ibcon#first serial, iclass 26, count 0 2006.232.08:17:29.95#ibcon#enter sib2, iclass 26, count 0 2006.232.08:17:29.95#ibcon#flushed, iclass 26, count 0 2006.232.08:17:29.95#ibcon#about to write, iclass 26, count 0 2006.232.08:17:29.95#ibcon#wrote, iclass 26, count 0 2006.232.08:17:29.95#ibcon#about to read 3, iclass 26, count 0 2006.232.08:17:29.97#ibcon#read 3, iclass 26, count 0 2006.232.08:17:29.97#ibcon#about to read 4, iclass 26, count 0 2006.232.08:17:29.97#ibcon#read 4, iclass 26, count 0 2006.232.08:17:29.97#ibcon#about to read 5, iclass 26, count 0 2006.232.08:17:29.97#ibcon#read 5, iclass 26, count 0 2006.232.08:17:29.97#ibcon#about to read 6, iclass 26, count 0 2006.232.08:17:29.97#ibcon#read 6, iclass 26, count 0 2006.232.08:17:29.97#ibcon#end of sib2, iclass 26, count 0 2006.232.08:17:29.97#ibcon#*mode == 0, iclass 26, count 0 2006.232.08:17:29.97#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.232.08:17:29.97#ibcon#[26=FRQ=07,832.99\r\n] 2006.232.08:17:29.97#ibcon#*before write, iclass 26, count 0 2006.232.08:17:29.97#ibcon#enter sib2, iclass 26, count 0 2006.232.08:17:29.97#ibcon#flushed, iclass 26, count 0 2006.232.08:17:29.97#ibcon#about to write, iclass 26, count 0 2006.232.08:17:29.97#ibcon#wrote, iclass 26, count 0 2006.232.08:17:29.97#ibcon#about to read 3, iclass 26, count 0 2006.232.08:17:30.01#ibcon#read 3, iclass 26, count 0 2006.232.08:17:30.01#ibcon#about to read 4, iclass 26, count 0 2006.232.08:17:30.01#ibcon#read 4, iclass 26, count 0 2006.232.08:17:30.01#ibcon#about to read 5, iclass 26, count 0 2006.232.08:17:30.01#ibcon#read 5, iclass 26, count 0 2006.232.08:17:30.01#ibcon#about to read 6, iclass 26, count 0 2006.232.08:17:30.01#ibcon#read 6, iclass 26, count 0 2006.232.08:17:30.01#ibcon#end of sib2, iclass 26, count 0 2006.232.08:17:30.01#ibcon#*after write, iclass 26, count 0 2006.232.08:17:30.01#ibcon#*before return 0, iclass 26, count 0 2006.232.08:17:30.01#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.232.08:17:30.01#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.232.08:17:30.01#ibcon#about to clear, iclass 26 cls_cnt 0 2006.232.08:17:30.01#ibcon#cleared, iclass 26 cls_cnt 0 2006.232.08:17:30.01$vc4f8/va=7,6 2006.232.08:17:30.01#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.232.08:17:30.01#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.232.08:17:30.01#ibcon#ireg 11 cls_cnt 2 2006.232.08:17:30.01#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.232.08:17:30.07#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.232.08:17:30.07#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.232.08:17:30.07#ibcon#enter wrdev, iclass 28, count 2 2006.232.08:17:30.07#ibcon#first serial, iclass 28, count 2 2006.232.08:17:30.07#ibcon#enter sib2, iclass 28, count 2 2006.232.08:17:30.07#ibcon#flushed, iclass 28, count 2 2006.232.08:17:30.07#ibcon#about to write, iclass 28, count 2 2006.232.08:17:30.07#ibcon#wrote, iclass 28, count 2 2006.232.08:17:30.07#ibcon#about to read 3, iclass 28, count 2 2006.232.08:17:30.09#ibcon#read 3, iclass 28, count 2 2006.232.08:17:30.09#ibcon#about to read 4, iclass 28, count 2 2006.232.08:17:30.09#ibcon#read 4, iclass 28, count 2 2006.232.08:17:30.09#ibcon#about to read 5, iclass 28, count 2 2006.232.08:17:30.09#ibcon#read 5, iclass 28, count 2 2006.232.08:17:30.09#ibcon#about to read 6, iclass 28, count 2 2006.232.08:17:30.09#ibcon#read 6, iclass 28, count 2 2006.232.08:17:30.09#ibcon#end of sib2, iclass 28, count 2 2006.232.08:17:30.09#ibcon#*mode == 0, iclass 28, count 2 2006.232.08:17:30.09#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.232.08:17:30.09#ibcon#[25=AT07-06\r\n] 2006.232.08:17:30.09#ibcon#*before write, iclass 28, count 2 2006.232.08:17:30.09#ibcon#enter sib2, iclass 28, count 2 2006.232.08:17:30.09#ibcon#flushed, iclass 28, count 2 2006.232.08:17:30.09#ibcon#about to write, iclass 28, count 2 2006.232.08:17:30.09#ibcon#wrote, iclass 28, count 2 2006.232.08:17:30.09#ibcon#about to read 3, iclass 28, count 2 2006.232.08:17:30.12#ibcon#read 3, iclass 28, count 2 2006.232.08:17:30.12#ibcon#about to read 4, iclass 28, count 2 2006.232.08:17:30.12#ibcon#read 4, iclass 28, count 2 2006.232.08:17:30.12#ibcon#about to read 5, iclass 28, count 2 2006.232.08:17:30.12#ibcon#read 5, iclass 28, count 2 2006.232.08:17:30.12#ibcon#about to read 6, iclass 28, count 2 2006.232.08:17:30.12#ibcon#read 6, iclass 28, count 2 2006.232.08:17:30.12#ibcon#end of sib2, iclass 28, count 2 2006.232.08:17:30.12#ibcon#*after write, iclass 28, count 2 2006.232.08:17:30.12#ibcon#*before return 0, iclass 28, count 2 2006.232.08:17:30.12#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.232.08:17:30.12#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.232.08:17:30.12#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.232.08:17:30.12#ibcon#ireg 7 cls_cnt 0 2006.232.08:17:30.12#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.232.08:17:30.24#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.232.08:17:30.24#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.232.08:17:30.24#ibcon#enter wrdev, iclass 28, count 0 2006.232.08:17:30.24#ibcon#first serial, iclass 28, count 0 2006.232.08:17:30.24#ibcon#enter sib2, iclass 28, count 0 2006.232.08:17:30.24#ibcon#flushed, iclass 28, count 0 2006.232.08:17:30.24#ibcon#about to write, iclass 28, count 0 2006.232.08:17:30.24#ibcon#wrote, iclass 28, count 0 2006.232.08:17:30.24#ibcon#about to read 3, iclass 28, count 0 2006.232.08:17:30.26#ibcon#read 3, iclass 28, count 0 2006.232.08:17:30.26#ibcon#about to read 4, iclass 28, count 0 2006.232.08:17:30.26#ibcon#read 4, iclass 28, count 0 2006.232.08:17:30.26#ibcon#about to read 5, iclass 28, count 0 2006.232.08:17:30.26#ibcon#read 5, iclass 28, count 0 2006.232.08:17:30.26#ibcon#about to read 6, iclass 28, count 0 2006.232.08:17:30.26#ibcon#read 6, iclass 28, count 0 2006.232.08:17:30.26#ibcon#end of sib2, iclass 28, count 0 2006.232.08:17:30.26#ibcon#*mode == 0, iclass 28, count 0 2006.232.08:17:30.26#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.232.08:17:30.26#ibcon#[25=USB\r\n] 2006.232.08:17:30.26#ibcon#*before write, iclass 28, count 0 2006.232.08:17:30.26#ibcon#enter sib2, iclass 28, count 0 2006.232.08:17:30.26#ibcon#flushed, iclass 28, count 0 2006.232.08:17:30.26#ibcon#about to write, iclass 28, count 0 2006.232.08:17:30.26#ibcon#wrote, iclass 28, count 0 2006.232.08:17:30.26#ibcon#about to read 3, iclass 28, count 0 2006.232.08:17:30.29#ibcon#read 3, iclass 28, count 0 2006.232.08:17:30.29#ibcon#about to read 4, iclass 28, count 0 2006.232.08:17:30.29#ibcon#read 4, iclass 28, count 0 2006.232.08:17:30.29#ibcon#about to read 5, iclass 28, count 0 2006.232.08:17:30.29#ibcon#read 5, iclass 28, count 0 2006.232.08:17:30.29#ibcon#about to read 6, iclass 28, count 0 2006.232.08:17:30.29#ibcon#read 6, iclass 28, count 0 2006.232.08:17:30.29#ibcon#end of sib2, iclass 28, count 0 2006.232.08:17:30.29#ibcon#*after write, iclass 28, count 0 2006.232.08:17:30.29#ibcon#*before return 0, iclass 28, count 0 2006.232.08:17:30.29#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.232.08:17:30.29#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.232.08:17:30.29#ibcon#about to clear, iclass 28 cls_cnt 0 2006.232.08:17:30.29#ibcon#cleared, iclass 28 cls_cnt 0 2006.232.08:17:30.29$vc4f8/valo=8,852.99 2006.232.08:17:30.29#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.232.08:17:30.29#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.232.08:17:30.29#ibcon#ireg 17 cls_cnt 0 2006.232.08:17:30.29#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.232.08:17:30.29#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.232.08:17:30.29#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.232.08:17:30.29#ibcon#enter wrdev, iclass 30, count 0 2006.232.08:17:30.29#ibcon#first serial, iclass 30, count 0 2006.232.08:17:30.29#ibcon#enter sib2, iclass 30, count 0 2006.232.08:17:30.29#ibcon#flushed, iclass 30, count 0 2006.232.08:17:30.29#ibcon#about to write, iclass 30, count 0 2006.232.08:17:30.29#ibcon#wrote, iclass 30, count 0 2006.232.08:17:30.29#ibcon#about to read 3, iclass 30, count 0 2006.232.08:17:30.31#ibcon#read 3, iclass 30, count 0 2006.232.08:17:30.31#ibcon#about to read 4, iclass 30, count 0 2006.232.08:17:30.31#ibcon#read 4, iclass 30, count 0 2006.232.08:17:30.31#ibcon#about to read 5, iclass 30, count 0 2006.232.08:17:30.31#ibcon#read 5, iclass 30, count 0 2006.232.08:17:30.31#ibcon#about to read 6, iclass 30, count 0 2006.232.08:17:30.31#ibcon#read 6, iclass 30, count 0 2006.232.08:17:30.31#ibcon#end of sib2, iclass 30, count 0 2006.232.08:17:30.31#ibcon#*mode == 0, iclass 30, count 0 2006.232.08:17:30.31#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.232.08:17:30.31#ibcon#[26=FRQ=08,852.99\r\n] 2006.232.08:17:30.31#ibcon#*before write, iclass 30, count 0 2006.232.08:17:30.31#ibcon#enter sib2, iclass 30, count 0 2006.232.08:17:30.31#ibcon#flushed, iclass 30, count 0 2006.232.08:17:30.31#ibcon#about to write, iclass 30, count 0 2006.232.08:17:30.31#ibcon#wrote, iclass 30, count 0 2006.232.08:17:30.31#ibcon#about to read 3, iclass 30, count 0 2006.232.08:17:30.35#ibcon#read 3, iclass 30, count 0 2006.232.08:17:30.35#ibcon#about to read 4, iclass 30, count 0 2006.232.08:17:30.35#ibcon#read 4, iclass 30, count 0 2006.232.08:17:30.35#ibcon#about to read 5, iclass 30, count 0 2006.232.08:17:30.35#ibcon#read 5, iclass 30, count 0 2006.232.08:17:30.35#ibcon#about to read 6, iclass 30, count 0 2006.232.08:17:30.35#ibcon#read 6, iclass 30, count 0 2006.232.08:17:30.35#ibcon#end of sib2, iclass 30, count 0 2006.232.08:17:30.35#ibcon#*after write, iclass 30, count 0 2006.232.08:17:30.35#ibcon#*before return 0, iclass 30, count 0 2006.232.08:17:30.35#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.232.08:17:30.35#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.232.08:17:30.35#ibcon#about to clear, iclass 30 cls_cnt 0 2006.232.08:17:30.35#ibcon#cleared, iclass 30 cls_cnt 0 2006.232.08:17:30.35$vc4f8/va=8,6 2006.232.08:17:30.35#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.232.08:17:30.35#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.232.08:17:30.35#ibcon#ireg 11 cls_cnt 2 2006.232.08:17:30.35#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.232.08:17:30.41#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.232.08:17:30.41#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.232.08:17:30.41#ibcon#enter wrdev, iclass 32, count 2 2006.232.08:17:30.41#ibcon#first serial, iclass 32, count 2 2006.232.08:17:30.41#ibcon#enter sib2, iclass 32, count 2 2006.232.08:17:30.41#ibcon#flushed, iclass 32, count 2 2006.232.08:17:30.41#ibcon#about to write, iclass 32, count 2 2006.232.08:17:30.41#ibcon#wrote, iclass 32, count 2 2006.232.08:17:30.41#ibcon#about to read 3, iclass 32, count 2 2006.232.08:17:30.43#ibcon#read 3, iclass 32, count 2 2006.232.08:17:30.43#ibcon#about to read 4, iclass 32, count 2 2006.232.08:17:30.43#ibcon#read 4, iclass 32, count 2 2006.232.08:17:30.43#ibcon#about to read 5, iclass 32, count 2 2006.232.08:17:30.43#ibcon#read 5, iclass 32, count 2 2006.232.08:17:30.43#ibcon#about to read 6, iclass 32, count 2 2006.232.08:17:30.43#ibcon#read 6, iclass 32, count 2 2006.232.08:17:30.43#ibcon#end of sib2, iclass 32, count 2 2006.232.08:17:30.43#ibcon#*mode == 0, iclass 32, count 2 2006.232.08:17:30.43#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.232.08:17:30.43#ibcon#[25=AT08-06\r\n] 2006.232.08:17:30.43#ibcon#*before write, iclass 32, count 2 2006.232.08:17:30.43#ibcon#enter sib2, iclass 32, count 2 2006.232.08:17:30.43#ibcon#flushed, iclass 32, count 2 2006.232.08:17:30.43#ibcon#about to write, iclass 32, count 2 2006.232.08:17:30.43#ibcon#wrote, iclass 32, count 2 2006.232.08:17:30.43#ibcon#about to read 3, iclass 32, count 2 2006.232.08:17:30.46#ibcon#read 3, iclass 32, count 2 2006.232.08:17:30.46#ibcon#about to read 4, iclass 32, count 2 2006.232.08:17:30.46#ibcon#read 4, iclass 32, count 2 2006.232.08:17:30.46#ibcon#about to read 5, iclass 32, count 2 2006.232.08:17:30.46#ibcon#read 5, iclass 32, count 2 2006.232.08:17:30.46#ibcon#about to read 6, iclass 32, count 2 2006.232.08:17:30.46#ibcon#read 6, iclass 32, count 2 2006.232.08:17:30.46#ibcon#end of sib2, iclass 32, count 2 2006.232.08:17:30.46#ibcon#*after write, iclass 32, count 2 2006.232.08:17:30.46#ibcon#*before return 0, iclass 32, count 2 2006.232.08:17:30.46#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.232.08:17:30.46#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.232.08:17:30.46#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.232.08:17:30.46#ibcon#ireg 7 cls_cnt 0 2006.232.08:17:30.46#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.232.08:17:30.58#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.232.08:17:30.58#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.232.08:17:30.58#ibcon#enter wrdev, iclass 32, count 0 2006.232.08:17:30.58#ibcon#first serial, iclass 32, count 0 2006.232.08:17:30.58#ibcon#enter sib2, iclass 32, count 0 2006.232.08:17:30.58#ibcon#flushed, iclass 32, count 0 2006.232.08:17:30.58#ibcon#about to write, iclass 32, count 0 2006.232.08:17:30.58#ibcon#wrote, iclass 32, count 0 2006.232.08:17:30.58#ibcon#about to read 3, iclass 32, count 0 2006.232.08:17:30.60#ibcon#read 3, iclass 32, count 0 2006.232.08:17:30.60#ibcon#about to read 4, iclass 32, count 0 2006.232.08:17:30.60#ibcon#read 4, iclass 32, count 0 2006.232.08:17:30.60#ibcon#about to read 5, iclass 32, count 0 2006.232.08:17:30.60#ibcon#read 5, iclass 32, count 0 2006.232.08:17:30.60#ibcon#about to read 6, iclass 32, count 0 2006.232.08:17:30.60#ibcon#read 6, iclass 32, count 0 2006.232.08:17:30.60#ibcon#end of sib2, iclass 32, count 0 2006.232.08:17:30.60#ibcon#*mode == 0, iclass 32, count 0 2006.232.08:17:30.60#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.232.08:17:30.60#ibcon#[25=USB\r\n] 2006.232.08:17:30.60#ibcon#*before write, iclass 32, count 0 2006.232.08:17:30.60#ibcon#enter sib2, iclass 32, count 0 2006.232.08:17:30.60#ibcon#flushed, iclass 32, count 0 2006.232.08:17:30.60#ibcon#about to write, iclass 32, count 0 2006.232.08:17:30.60#ibcon#wrote, iclass 32, count 0 2006.232.08:17:30.60#ibcon#about to read 3, iclass 32, count 0 2006.232.08:17:30.63#ibcon#read 3, iclass 32, count 0 2006.232.08:17:30.63#ibcon#about to read 4, iclass 32, count 0 2006.232.08:17:30.63#ibcon#read 4, iclass 32, count 0 2006.232.08:17:30.63#ibcon#about to read 5, iclass 32, count 0 2006.232.08:17:30.63#ibcon#read 5, iclass 32, count 0 2006.232.08:17:30.63#ibcon#about to read 6, iclass 32, count 0 2006.232.08:17:30.63#ibcon#read 6, iclass 32, count 0 2006.232.08:17:30.63#ibcon#end of sib2, iclass 32, count 0 2006.232.08:17:30.63#ibcon#*after write, iclass 32, count 0 2006.232.08:17:30.63#ibcon#*before return 0, iclass 32, count 0 2006.232.08:17:30.63#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.232.08:17:30.63#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.232.08:17:30.63#ibcon#about to clear, iclass 32 cls_cnt 0 2006.232.08:17:30.63#ibcon#cleared, iclass 32 cls_cnt 0 2006.232.08:17:30.63$vc4f8/vblo=1,632.99 2006.232.08:17:30.63#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.232.08:17:30.63#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.232.08:17:30.63#ibcon#ireg 17 cls_cnt 0 2006.232.08:17:30.63#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.232.08:17:30.63#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.232.08:17:30.63#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.232.08:17:30.63#ibcon#enter wrdev, iclass 34, count 0 2006.232.08:17:30.63#ibcon#first serial, iclass 34, count 0 2006.232.08:17:30.63#ibcon#enter sib2, iclass 34, count 0 2006.232.08:17:30.63#ibcon#flushed, iclass 34, count 0 2006.232.08:17:30.63#ibcon#about to write, iclass 34, count 0 2006.232.08:17:30.63#ibcon#wrote, iclass 34, count 0 2006.232.08:17:30.63#ibcon#about to read 3, iclass 34, count 0 2006.232.08:17:30.67#ibcon#read 3, iclass 34, count 0 2006.232.08:17:30.67#ibcon#about to read 4, iclass 34, count 0 2006.232.08:17:30.67#ibcon#read 4, iclass 34, count 0 2006.232.08:17:30.67#ibcon#about to read 5, iclass 34, count 0 2006.232.08:17:30.67#ibcon#read 5, iclass 34, count 0 2006.232.08:17:30.67#ibcon#about to read 6, iclass 34, count 0 2006.232.08:17:30.67#ibcon#read 6, iclass 34, count 0 2006.232.08:17:30.67#ibcon#end of sib2, iclass 34, count 0 2006.232.08:17:30.67#ibcon#*mode == 0, iclass 34, count 0 2006.232.08:17:30.67#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.232.08:17:30.67#ibcon#[28=FRQ=01,632.99\r\n] 2006.232.08:17:30.67#ibcon#*before write, iclass 34, count 0 2006.232.08:17:30.67#ibcon#enter sib2, iclass 34, count 0 2006.232.08:17:30.67#ibcon#flushed, iclass 34, count 0 2006.232.08:17:30.67#ibcon#about to write, iclass 34, count 0 2006.232.08:17:30.67#ibcon#wrote, iclass 34, count 0 2006.232.08:17:30.67#ibcon#about to read 3, iclass 34, count 0 2006.232.08:17:30.71#ibcon#read 3, iclass 34, count 0 2006.232.08:17:30.71#ibcon#about to read 4, iclass 34, count 0 2006.232.08:17:30.71#ibcon#read 4, iclass 34, count 0 2006.232.08:17:30.71#ibcon#about to read 5, iclass 34, count 0 2006.232.08:17:30.71#ibcon#read 5, iclass 34, count 0 2006.232.08:17:30.71#ibcon#about to read 6, iclass 34, count 0 2006.232.08:17:30.71#ibcon#read 6, iclass 34, count 0 2006.232.08:17:30.71#ibcon#end of sib2, iclass 34, count 0 2006.232.08:17:30.71#ibcon#*after write, iclass 34, count 0 2006.232.08:17:30.71#ibcon#*before return 0, iclass 34, count 0 2006.232.08:17:30.71#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.232.08:17:30.71#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.232.08:17:30.71#ibcon#about to clear, iclass 34 cls_cnt 0 2006.232.08:17:30.71#ibcon#cleared, iclass 34 cls_cnt 0 2006.232.08:17:30.71$vc4f8/vb=1,4 2006.232.08:17:30.71#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.232.08:17:30.71#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.232.08:17:30.71#ibcon#ireg 11 cls_cnt 2 2006.232.08:17:30.71#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.232.08:17:30.71#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.232.08:17:30.71#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.232.08:17:30.71#ibcon#enter wrdev, iclass 36, count 2 2006.232.08:17:30.71#ibcon#first serial, iclass 36, count 2 2006.232.08:17:30.71#ibcon#enter sib2, iclass 36, count 2 2006.232.08:17:30.71#ibcon#flushed, iclass 36, count 2 2006.232.08:17:30.71#ibcon#about to write, iclass 36, count 2 2006.232.08:17:30.71#ibcon#wrote, iclass 36, count 2 2006.232.08:17:30.71#ibcon#about to read 3, iclass 36, count 2 2006.232.08:17:30.73#ibcon#read 3, iclass 36, count 2 2006.232.08:17:30.73#ibcon#about to read 4, iclass 36, count 2 2006.232.08:17:30.73#ibcon#read 4, iclass 36, count 2 2006.232.08:17:30.73#ibcon#about to read 5, iclass 36, count 2 2006.232.08:17:30.73#ibcon#read 5, iclass 36, count 2 2006.232.08:17:30.73#ibcon#about to read 6, iclass 36, count 2 2006.232.08:17:30.73#ibcon#read 6, iclass 36, count 2 2006.232.08:17:30.73#ibcon#end of sib2, iclass 36, count 2 2006.232.08:17:30.73#ibcon#*mode == 0, iclass 36, count 2 2006.232.08:17:30.73#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.232.08:17:30.73#ibcon#[27=AT01-04\r\n] 2006.232.08:17:30.73#ibcon#*before write, iclass 36, count 2 2006.232.08:17:30.73#ibcon#enter sib2, iclass 36, count 2 2006.232.08:17:30.73#ibcon#flushed, iclass 36, count 2 2006.232.08:17:30.73#ibcon#about to write, iclass 36, count 2 2006.232.08:17:30.73#ibcon#wrote, iclass 36, count 2 2006.232.08:17:30.73#ibcon#about to read 3, iclass 36, count 2 2006.232.08:17:30.76#ibcon#read 3, iclass 36, count 2 2006.232.08:17:30.76#ibcon#about to read 4, iclass 36, count 2 2006.232.08:17:30.76#ibcon#read 4, iclass 36, count 2 2006.232.08:17:30.76#ibcon#about to read 5, iclass 36, count 2 2006.232.08:17:30.76#ibcon#read 5, iclass 36, count 2 2006.232.08:17:30.76#ibcon#about to read 6, iclass 36, count 2 2006.232.08:17:30.76#ibcon#read 6, iclass 36, count 2 2006.232.08:17:30.76#ibcon#end of sib2, iclass 36, count 2 2006.232.08:17:30.76#ibcon#*after write, iclass 36, count 2 2006.232.08:17:30.76#ibcon#*before return 0, iclass 36, count 2 2006.232.08:17:30.76#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.232.08:17:30.76#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.232.08:17:30.76#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.232.08:17:30.76#ibcon#ireg 7 cls_cnt 0 2006.232.08:17:30.76#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.232.08:17:30.88#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.232.08:17:30.88#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.232.08:17:30.88#ibcon#enter wrdev, iclass 36, count 0 2006.232.08:17:30.88#ibcon#first serial, iclass 36, count 0 2006.232.08:17:30.88#ibcon#enter sib2, iclass 36, count 0 2006.232.08:17:30.88#ibcon#flushed, iclass 36, count 0 2006.232.08:17:30.88#ibcon#about to write, iclass 36, count 0 2006.232.08:17:30.88#ibcon#wrote, iclass 36, count 0 2006.232.08:17:30.88#ibcon#about to read 3, iclass 36, count 0 2006.232.08:17:30.90#ibcon#read 3, iclass 36, count 0 2006.232.08:17:30.90#ibcon#about to read 4, iclass 36, count 0 2006.232.08:17:30.90#ibcon#read 4, iclass 36, count 0 2006.232.08:17:30.90#ibcon#about to read 5, iclass 36, count 0 2006.232.08:17:30.90#ibcon#read 5, iclass 36, count 0 2006.232.08:17:30.90#ibcon#about to read 6, iclass 36, count 0 2006.232.08:17:30.90#ibcon#read 6, iclass 36, count 0 2006.232.08:17:30.90#ibcon#end of sib2, iclass 36, count 0 2006.232.08:17:30.90#ibcon#*mode == 0, iclass 36, count 0 2006.232.08:17:30.90#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.232.08:17:30.90#ibcon#[27=USB\r\n] 2006.232.08:17:30.90#ibcon#*before write, iclass 36, count 0 2006.232.08:17:30.90#ibcon#enter sib2, iclass 36, count 0 2006.232.08:17:30.90#ibcon#flushed, iclass 36, count 0 2006.232.08:17:30.90#ibcon#about to write, iclass 36, count 0 2006.232.08:17:30.90#ibcon#wrote, iclass 36, count 0 2006.232.08:17:30.90#ibcon#about to read 3, iclass 36, count 0 2006.232.08:17:30.93#ibcon#read 3, iclass 36, count 0 2006.232.08:17:30.93#ibcon#about to read 4, iclass 36, count 0 2006.232.08:17:30.93#ibcon#read 4, iclass 36, count 0 2006.232.08:17:30.93#ibcon#about to read 5, iclass 36, count 0 2006.232.08:17:30.93#ibcon#read 5, iclass 36, count 0 2006.232.08:17:30.93#ibcon#about to read 6, iclass 36, count 0 2006.232.08:17:30.93#ibcon#read 6, iclass 36, count 0 2006.232.08:17:30.93#ibcon#end of sib2, iclass 36, count 0 2006.232.08:17:30.93#ibcon#*after write, iclass 36, count 0 2006.232.08:17:30.93#ibcon#*before return 0, iclass 36, count 0 2006.232.08:17:30.93#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.232.08:17:30.93#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.232.08:17:30.93#ibcon#about to clear, iclass 36 cls_cnt 0 2006.232.08:17:30.93#ibcon#cleared, iclass 36 cls_cnt 0 2006.232.08:17:30.93$vc4f8/vblo=2,640.99 2006.232.08:17:30.93#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.232.08:17:30.93#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.232.08:17:30.93#ibcon#ireg 17 cls_cnt 0 2006.232.08:17:30.93#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.232.08:17:30.93#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.232.08:17:30.93#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.232.08:17:30.93#ibcon#enter wrdev, iclass 38, count 0 2006.232.08:17:30.93#ibcon#first serial, iclass 38, count 0 2006.232.08:17:30.93#ibcon#enter sib2, iclass 38, count 0 2006.232.08:17:30.93#ibcon#flushed, iclass 38, count 0 2006.232.08:17:30.93#ibcon#about to write, iclass 38, count 0 2006.232.08:17:30.93#ibcon#wrote, iclass 38, count 0 2006.232.08:17:30.93#ibcon#about to read 3, iclass 38, count 0 2006.232.08:17:30.95#ibcon#read 3, iclass 38, count 0 2006.232.08:17:30.95#ibcon#about to read 4, iclass 38, count 0 2006.232.08:17:30.95#ibcon#read 4, iclass 38, count 0 2006.232.08:17:30.95#ibcon#about to read 5, iclass 38, count 0 2006.232.08:17:30.95#ibcon#read 5, iclass 38, count 0 2006.232.08:17:30.95#ibcon#about to read 6, iclass 38, count 0 2006.232.08:17:30.95#ibcon#read 6, iclass 38, count 0 2006.232.08:17:30.95#ibcon#end of sib2, iclass 38, count 0 2006.232.08:17:30.95#ibcon#*mode == 0, iclass 38, count 0 2006.232.08:17:30.95#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.232.08:17:30.95#ibcon#[28=FRQ=02,640.99\r\n] 2006.232.08:17:30.95#ibcon#*before write, iclass 38, count 0 2006.232.08:17:30.95#ibcon#enter sib2, iclass 38, count 0 2006.232.08:17:30.95#ibcon#flushed, iclass 38, count 0 2006.232.08:17:30.95#ibcon#about to write, iclass 38, count 0 2006.232.08:17:30.95#ibcon#wrote, iclass 38, count 0 2006.232.08:17:30.95#ibcon#about to read 3, iclass 38, count 0 2006.232.08:17:30.99#ibcon#read 3, iclass 38, count 0 2006.232.08:17:30.99#ibcon#about to read 4, iclass 38, count 0 2006.232.08:17:30.99#ibcon#read 4, iclass 38, count 0 2006.232.08:17:30.99#ibcon#about to read 5, iclass 38, count 0 2006.232.08:17:30.99#ibcon#read 5, iclass 38, count 0 2006.232.08:17:30.99#ibcon#about to read 6, iclass 38, count 0 2006.232.08:17:30.99#ibcon#read 6, iclass 38, count 0 2006.232.08:17:30.99#ibcon#end of sib2, iclass 38, count 0 2006.232.08:17:30.99#ibcon#*after write, iclass 38, count 0 2006.232.08:17:30.99#ibcon#*before return 0, iclass 38, count 0 2006.232.08:17:30.99#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.232.08:17:30.99#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.232.08:17:30.99#ibcon#about to clear, iclass 38 cls_cnt 0 2006.232.08:17:30.99#ibcon#cleared, iclass 38 cls_cnt 0 2006.232.08:17:30.99$vc4f8/vb=2,4 2006.232.08:17:30.99#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.232.08:17:30.99#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.232.08:17:30.99#ibcon#ireg 11 cls_cnt 2 2006.232.08:17:30.99#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.232.08:17:31.05#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.232.08:17:31.05#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.232.08:17:31.05#ibcon#enter wrdev, iclass 40, count 2 2006.232.08:17:31.05#ibcon#first serial, iclass 40, count 2 2006.232.08:17:31.05#ibcon#enter sib2, iclass 40, count 2 2006.232.08:17:31.05#ibcon#flushed, iclass 40, count 2 2006.232.08:17:31.05#ibcon#about to write, iclass 40, count 2 2006.232.08:17:31.05#ibcon#wrote, iclass 40, count 2 2006.232.08:17:31.05#ibcon#about to read 3, iclass 40, count 2 2006.232.08:17:31.07#ibcon#read 3, iclass 40, count 2 2006.232.08:17:31.07#ibcon#about to read 4, iclass 40, count 2 2006.232.08:17:31.07#ibcon#read 4, iclass 40, count 2 2006.232.08:17:31.07#ibcon#about to read 5, iclass 40, count 2 2006.232.08:17:31.07#ibcon#read 5, iclass 40, count 2 2006.232.08:17:31.07#ibcon#about to read 6, iclass 40, count 2 2006.232.08:17:31.07#ibcon#read 6, iclass 40, count 2 2006.232.08:17:31.07#ibcon#end of sib2, iclass 40, count 2 2006.232.08:17:31.07#ibcon#*mode == 0, iclass 40, count 2 2006.232.08:17:31.07#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.232.08:17:31.07#ibcon#[27=AT02-04\r\n] 2006.232.08:17:31.07#ibcon#*before write, iclass 40, count 2 2006.232.08:17:31.07#ibcon#enter sib2, iclass 40, count 2 2006.232.08:17:31.07#ibcon#flushed, iclass 40, count 2 2006.232.08:17:31.07#ibcon#about to write, iclass 40, count 2 2006.232.08:17:31.07#ibcon#wrote, iclass 40, count 2 2006.232.08:17:31.07#ibcon#about to read 3, iclass 40, count 2 2006.232.08:17:31.10#ibcon#read 3, iclass 40, count 2 2006.232.08:17:31.10#ibcon#about to read 4, iclass 40, count 2 2006.232.08:17:31.10#ibcon#read 4, iclass 40, count 2 2006.232.08:17:31.10#ibcon#about to read 5, iclass 40, count 2 2006.232.08:17:31.10#ibcon#read 5, iclass 40, count 2 2006.232.08:17:31.10#ibcon#about to read 6, iclass 40, count 2 2006.232.08:17:31.10#ibcon#read 6, iclass 40, count 2 2006.232.08:17:31.10#ibcon#end of sib2, iclass 40, count 2 2006.232.08:17:31.10#ibcon#*after write, iclass 40, count 2 2006.232.08:17:31.10#ibcon#*before return 0, iclass 40, count 2 2006.232.08:17:31.10#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.232.08:17:31.10#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.232.08:17:31.10#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.232.08:17:31.10#ibcon#ireg 7 cls_cnt 0 2006.232.08:17:31.10#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.232.08:17:31.22#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.232.08:17:31.22#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.232.08:17:31.22#ibcon#enter wrdev, iclass 40, count 0 2006.232.08:17:31.22#ibcon#first serial, iclass 40, count 0 2006.232.08:17:31.22#ibcon#enter sib2, iclass 40, count 0 2006.232.08:17:31.22#ibcon#flushed, iclass 40, count 0 2006.232.08:17:31.22#ibcon#about to write, iclass 40, count 0 2006.232.08:17:31.22#ibcon#wrote, iclass 40, count 0 2006.232.08:17:31.22#ibcon#about to read 3, iclass 40, count 0 2006.232.08:17:31.24#ibcon#read 3, iclass 40, count 0 2006.232.08:17:31.24#ibcon#about to read 4, iclass 40, count 0 2006.232.08:17:31.24#ibcon#read 4, iclass 40, count 0 2006.232.08:17:31.24#ibcon#about to read 5, iclass 40, count 0 2006.232.08:17:31.24#ibcon#read 5, iclass 40, count 0 2006.232.08:17:31.24#ibcon#about to read 6, iclass 40, count 0 2006.232.08:17:31.24#ibcon#read 6, iclass 40, count 0 2006.232.08:17:31.24#ibcon#end of sib2, iclass 40, count 0 2006.232.08:17:31.24#ibcon#*mode == 0, iclass 40, count 0 2006.232.08:17:31.24#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.232.08:17:31.24#ibcon#[27=USB\r\n] 2006.232.08:17:31.24#ibcon#*before write, iclass 40, count 0 2006.232.08:17:31.24#ibcon#enter sib2, iclass 40, count 0 2006.232.08:17:31.24#ibcon#flushed, iclass 40, count 0 2006.232.08:17:31.24#ibcon#about to write, iclass 40, count 0 2006.232.08:17:31.24#ibcon#wrote, iclass 40, count 0 2006.232.08:17:31.24#ibcon#about to read 3, iclass 40, count 0 2006.232.08:17:31.27#ibcon#read 3, iclass 40, count 0 2006.232.08:17:31.27#ibcon#about to read 4, iclass 40, count 0 2006.232.08:17:31.27#ibcon#read 4, iclass 40, count 0 2006.232.08:17:31.27#ibcon#about to read 5, iclass 40, count 0 2006.232.08:17:31.27#ibcon#read 5, iclass 40, count 0 2006.232.08:17:31.27#ibcon#about to read 6, iclass 40, count 0 2006.232.08:17:31.27#ibcon#read 6, iclass 40, count 0 2006.232.08:17:31.27#ibcon#end of sib2, iclass 40, count 0 2006.232.08:17:31.27#ibcon#*after write, iclass 40, count 0 2006.232.08:17:31.27#ibcon#*before return 0, iclass 40, count 0 2006.232.08:17:31.27#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.232.08:17:31.27#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.232.08:17:31.27#ibcon#about to clear, iclass 40 cls_cnt 0 2006.232.08:17:31.27#ibcon#cleared, iclass 40 cls_cnt 0 2006.232.08:17:31.27$vc4f8/vblo=3,656.99 2006.232.08:17:31.27#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.232.08:17:31.27#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.232.08:17:31.27#ibcon#ireg 17 cls_cnt 0 2006.232.08:17:31.27#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.232.08:17:31.27#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.232.08:17:31.27#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.232.08:17:31.27#ibcon#enter wrdev, iclass 4, count 0 2006.232.08:17:31.27#ibcon#first serial, iclass 4, count 0 2006.232.08:17:31.27#ibcon#enter sib2, iclass 4, count 0 2006.232.08:17:31.27#ibcon#flushed, iclass 4, count 0 2006.232.08:17:31.27#ibcon#about to write, iclass 4, count 0 2006.232.08:17:31.27#ibcon#wrote, iclass 4, count 0 2006.232.08:17:31.27#ibcon#about to read 3, iclass 4, count 0 2006.232.08:17:31.29#ibcon#read 3, iclass 4, count 0 2006.232.08:17:31.29#ibcon#about to read 4, iclass 4, count 0 2006.232.08:17:31.29#ibcon#read 4, iclass 4, count 0 2006.232.08:17:31.29#ibcon#about to read 5, iclass 4, count 0 2006.232.08:17:31.29#ibcon#read 5, iclass 4, count 0 2006.232.08:17:31.29#ibcon#about to read 6, iclass 4, count 0 2006.232.08:17:31.29#ibcon#read 6, iclass 4, count 0 2006.232.08:17:31.29#ibcon#end of sib2, iclass 4, count 0 2006.232.08:17:31.29#ibcon#*mode == 0, iclass 4, count 0 2006.232.08:17:31.29#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.232.08:17:31.29#ibcon#[28=FRQ=03,656.99\r\n] 2006.232.08:17:31.29#ibcon#*before write, iclass 4, count 0 2006.232.08:17:31.29#ibcon#enter sib2, iclass 4, count 0 2006.232.08:17:31.29#ibcon#flushed, iclass 4, count 0 2006.232.08:17:31.29#ibcon#about to write, iclass 4, count 0 2006.232.08:17:31.29#ibcon#wrote, iclass 4, count 0 2006.232.08:17:31.29#ibcon#about to read 3, iclass 4, count 0 2006.232.08:17:31.33#ibcon#read 3, iclass 4, count 0 2006.232.08:17:31.33#ibcon#about to read 4, iclass 4, count 0 2006.232.08:17:31.33#ibcon#read 4, iclass 4, count 0 2006.232.08:17:31.33#ibcon#about to read 5, iclass 4, count 0 2006.232.08:17:31.33#ibcon#read 5, iclass 4, count 0 2006.232.08:17:31.33#ibcon#about to read 6, iclass 4, count 0 2006.232.08:17:31.33#ibcon#read 6, iclass 4, count 0 2006.232.08:17:31.33#ibcon#end of sib2, iclass 4, count 0 2006.232.08:17:31.33#ibcon#*after write, iclass 4, count 0 2006.232.08:17:31.33#ibcon#*before return 0, iclass 4, count 0 2006.232.08:17:31.33#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.232.08:17:31.33#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.232.08:17:31.33#ibcon#about to clear, iclass 4 cls_cnt 0 2006.232.08:17:31.33#ibcon#cleared, iclass 4 cls_cnt 0 2006.232.08:17:31.33$vc4f8/vb=3,4 2006.232.08:17:31.33#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.232.08:17:31.33#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.232.08:17:31.33#ibcon#ireg 11 cls_cnt 2 2006.232.08:17:31.33#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.232.08:17:31.39#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.232.08:17:31.39#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.232.08:17:31.39#ibcon#enter wrdev, iclass 6, count 2 2006.232.08:17:31.39#ibcon#first serial, iclass 6, count 2 2006.232.08:17:31.39#ibcon#enter sib2, iclass 6, count 2 2006.232.08:17:31.39#ibcon#flushed, iclass 6, count 2 2006.232.08:17:31.39#ibcon#about to write, iclass 6, count 2 2006.232.08:17:31.39#ibcon#wrote, iclass 6, count 2 2006.232.08:17:31.39#ibcon#about to read 3, iclass 6, count 2 2006.232.08:17:31.42#ibcon#read 3, iclass 6, count 2 2006.232.08:17:31.42#ibcon#about to read 4, iclass 6, count 2 2006.232.08:17:31.42#ibcon#read 4, iclass 6, count 2 2006.232.08:17:31.42#ibcon#about to read 5, iclass 6, count 2 2006.232.08:17:31.42#ibcon#read 5, iclass 6, count 2 2006.232.08:17:31.42#ibcon#about to read 6, iclass 6, count 2 2006.232.08:17:31.42#ibcon#read 6, iclass 6, count 2 2006.232.08:17:31.42#ibcon#end of sib2, iclass 6, count 2 2006.232.08:17:31.42#ibcon#*mode == 0, iclass 6, count 2 2006.232.08:17:31.42#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.232.08:17:31.42#ibcon#[27=AT03-04\r\n] 2006.232.08:17:31.42#ibcon#*before write, iclass 6, count 2 2006.232.08:17:31.42#ibcon#enter sib2, iclass 6, count 2 2006.232.08:17:31.42#ibcon#flushed, iclass 6, count 2 2006.232.08:17:31.42#ibcon#about to write, iclass 6, count 2 2006.232.08:17:31.42#ibcon#wrote, iclass 6, count 2 2006.232.08:17:31.42#ibcon#about to read 3, iclass 6, count 2 2006.232.08:17:31.45#ibcon#read 3, iclass 6, count 2 2006.232.08:17:31.45#ibcon#about to read 4, iclass 6, count 2 2006.232.08:17:31.45#ibcon#read 4, iclass 6, count 2 2006.232.08:17:31.45#ibcon#about to read 5, iclass 6, count 2 2006.232.08:17:31.45#ibcon#read 5, iclass 6, count 2 2006.232.08:17:31.45#ibcon#about to read 6, iclass 6, count 2 2006.232.08:17:31.45#ibcon#read 6, iclass 6, count 2 2006.232.08:17:31.45#ibcon#end of sib2, iclass 6, count 2 2006.232.08:17:31.45#ibcon#*after write, iclass 6, count 2 2006.232.08:17:31.45#ibcon#*before return 0, iclass 6, count 2 2006.232.08:17:31.45#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.232.08:17:31.45#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.232.08:17:31.45#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.232.08:17:31.45#ibcon#ireg 7 cls_cnt 0 2006.232.08:17:31.45#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.232.08:17:31.57#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.232.08:17:31.57#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.232.08:17:31.57#ibcon#enter wrdev, iclass 6, count 0 2006.232.08:17:31.57#ibcon#first serial, iclass 6, count 0 2006.232.08:17:31.57#ibcon#enter sib2, iclass 6, count 0 2006.232.08:17:31.57#ibcon#flushed, iclass 6, count 0 2006.232.08:17:31.57#ibcon#about to write, iclass 6, count 0 2006.232.08:17:31.57#ibcon#wrote, iclass 6, count 0 2006.232.08:17:31.57#ibcon#about to read 3, iclass 6, count 0 2006.232.08:17:31.59#ibcon#read 3, iclass 6, count 0 2006.232.08:17:31.59#ibcon#about to read 4, iclass 6, count 0 2006.232.08:17:31.59#ibcon#read 4, iclass 6, count 0 2006.232.08:17:31.59#ibcon#about to read 5, iclass 6, count 0 2006.232.08:17:31.59#ibcon#read 5, iclass 6, count 0 2006.232.08:17:31.59#ibcon#about to read 6, iclass 6, count 0 2006.232.08:17:31.59#ibcon#read 6, iclass 6, count 0 2006.232.08:17:31.59#ibcon#end of sib2, iclass 6, count 0 2006.232.08:17:31.59#ibcon#*mode == 0, iclass 6, count 0 2006.232.08:17:31.59#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.232.08:17:31.59#ibcon#[27=USB\r\n] 2006.232.08:17:31.59#ibcon#*before write, iclass 6, count 0 2006.232.08:17:31.59#ibcon#enter sib2, iclass 6, count 0 2006.232.08:17:31.59#ibcon#flushed, iclass 6, count 0 2006.232.08:17:31.59#ibcon#about to write, iclass 6, count 0 2006.232.08:17:31.59#ibcon#wrote, iclass 6, count 0 2006.232.08:17:31.59#ibcon#about to read 3, iclass 6, count 0 2006.232.08:17:31.62#ibcon#read 3, iclass 6, count 0 2006.232.08:17:31.62#ibcon#about to read 4, iclass 6, count 0 2006.232.08:17:31.62#ibcon#read 4, iclass 6, count 0 2006.232.08:17:31.62#ibcon#about to read 5, iclass 6, count 0 2006.232.08:17:31.62#ibcon#read 5, iclass 6, count 0 2006.232.08:17:31.62#ibcon#about to read 6, iclass 6, count 0 2006.232.08:17:31.62#ibcon#read 6, iclass 6, count 0 2006.232.08:17:31.62#ibcon#end of sib2, iclass 6, count 0 2006.232.08:17:31.62#ibcon#*after write, iclass 6, count 0 2006.232.08:17:31.62#ibcon#*before return 0, iclass 6, count 0 2006.232.08:17:31.62#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.232.08:17:31.62#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.232.08:17:31.62#ibcon#about to clear, iclass 6 cls_cnt 0 2006.232.08:17:31.62#ibcon#cleared, iclass 6 cls_cnt 0 2006.232.08:17:31.62$vc4f8/vblo=4,712.99 2006.232.08:17:31.62#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.232.08:17:31.62#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.232.08:17:31.62#ibcon#ireg 17 cls_cnt 0 2006.232.08:17:31.62#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.232.08:17:31.62#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.232.08:17:31.62#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.232.08:17:31.62#ibcon#enter wrdev, iclass 10, count 0 2006.232.08:17:31.62#ibcon#first serial, iclass 10, count 0 2006.232.08:17:31.62#ibcon#enter sib2, iclass 10, count 0 2006.232.08:17:31.62#ibcon#flushed, iclass 10, count 0 2006.232.08:17:31.62#ibcon#about to write, iclass 10, count 0 2006.232.08:17:31.62#ibcon#wrote, iclass 10, count 0 2006.232.08:17:31.62#ibcon#about to read 3, iclass 10, count 0 2006.232.08:17:31.64#ibcon#read 3, iclass 10, count 0 2006.232.08:17:31.64#ibcon#about to read 4, iclass 10, count 0 2006.232.08:17:31.64#ibcon#read 4, iclass 10, count 0 2006.232.08:17:31.64#ibcon#about to read 5, iclass 10, count 0 2006.232.08:17:31.64#ibcon#read 5, iclass 10, count 0 2006.232.08:17:31.64#ibcon#about to read 6, iclass 10, count 0 2006.232.08:17:31.64#ibcon#read 6, iclass 10, count 0 2006.232.08:17:31.64#ibcon#end of sib2, iclass 10, count 0 2006.232.08:17:31.64#ibcon#*mode == 0, iclass 10, count 0 2006.232.08:17:31.64#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.232.08:17:31.64#ibcon#[28=FRQ=04,712.99\r\n] 2006.232.08:17:31.64#ibcon#*before write, iclass 10, count 0 2006.232.08:17:31.64#ibcon#enter sib2, iclass 10, count 0 2006.232.08:17:31.64#ibcon#flushed, iclass 10, count 0 2006.232.08:17:31.64#ibcon#about to write, iclass 10, count 0 2006.232.08:17:31.64#ibcon#wrote, iclass 10, count 0 2006.232.08:17:31.64#ibcon#about to read 3, iclass 10, count 0 2006.232.08:17:31.68#ibcon#read 3, iclass 10, count 0 2006.232.08:17:31.68#ibcon#about to read 4, iclass 10, count 0 2006.232.08:17:31.68#ibcon#read 4, iclass 10, count 0 2006.232.08:17:31.68#ibcon#about to read 5, iclass 10, count 0 2006.232.08:17:31.68#ibcon#read 5, iclass 10, count 0 2006.232.08:17:31.68#ibcon#about to read 6, iclass 10, count 0 2006.232.08:17:31.68#ibcon#read 6, iclass 10, count 0 2006.232.08:17:31.68#ibcon#end of sib2, iclass 10, count 0 2006.232.08:17:31.68#ibcon#*after write, iclass 10, count 0 2006.232.08:17:31.68#ibcon#*before return 0, iclass 10, count 0 2006.232.08:17:31.68#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.232.08:17:31.68#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.232.08:17:31.68#ibcon#about to clear, iclass 10 cls_cnt 0 2006.232.08:17:31.68#ibcon#cleared, iclass 10 cls_cnt 0 2006.232.08:17:31.68$vc4f8/vb=4,4 2006.232.08:17:31.68#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.232.08:17:31.68#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.232.08:17:31.68#ibcon#ireg 11 cls_cnt 2 2006.232.08:17:31.68#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.232.08:17:31.74#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.232.08:17:31.74#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.232.08:17:31.74#ibcon#enter wrdev, iclass 12, count 2 2006.232.08:17:31.74#ibcon#first serial, iclass 12, count 2 2006.232.08:17:31.74#ibcon#enter sib2, iclass 12, count 2 2006.232.08:17:31.74#ibcon#flushed, iclass 12, count 2 2006.232.08:17:31.74#ibcon#about to write, iclass 12, count 2 2006.232.08:17:31.74#ibcon#wrote, iclass 12, count 2 2006.232.08:17:31.74#ibcon#about to read 3, iclass 12, count 2 2006.232.08:17:31.76#ibcon#read 3, iclass 12, count 2 2006.232.08:17:31.76#ibcon#about to read 4, iclass 12, count 2 2006.232.08:17:31.76#ibcon#read 4, iclass 12, count 2 2006.232.08:17:31.76#ibcon#about to read 5, iclass 12, count 2 2006.232.08:17:31.76#ibcon#read 5, iclass 12, count 2 2006.232.08:17:31.76#ibcon#about to read 6, iclass 12, count 2 2006.232.08:17:31.76#ibcon#read 6, iclass 12, count 2 2006.232.08:17:31.76#ibcon#end of sib2, iclass 12, count 2 2006.232.08:17:31.76#ibcon#*mode == 0, iclass 12, count 2 2006.232.08:17:31.76#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.232.08:17:31.76#ibcon#[27=AT04-04\r\n] 2006.232.08:17:31.76#ibcon#*before write, iclass 12, count 2 2006.232.08:17:31.76#ibcon#enter sib2, iclass 12, count 2 2006.232.08:17:31.76#ibcon#flushed, iclass 12, count 2 2006.232.08:17:31.76#ibcon#about to write, iclass 12, count 2 2006.232.08:17:31.76#ibcon#wrote, iclass 12, count 2 2006.232.08:17:31.76#ibcon#about to read 3, iclass 12, count 2 2006.232.08:17:31.79#ibcon#read 3, iclass 12, count 2 2006.232.08:17:31.79#ibcon#about to read 4, iclass 12, count 2 2006.232.08:17:31.79#ibcon#read 4, iclass 12, count 2 2006.232.08:17:31.79#ibcon#about to read 5, iclass 12, count 2 2006.232.08:17:31.79#ibcon#read 5, iclass 12, count 2 2006.232.08:17:31.79#ibcon#about to read 6, iclass 12, count 2 2006.232.08:17:31.79#ibcon#read 6, iclass 12, count 2 2006.232.08:17:31.79#ibcon#end of sib2, iclass 12, count 2 2006.232.08:17:31.79#ibcon#*after write, iclass 12, count 2 2006.232.08:17:31.79#ibcon#*before return 0, iclass 12, count 2 2006.232.08:17:31.79#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.232.08:17:31.79#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.232.08:17:31.79#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.232.08:17:31.79#ibcon#ireg 7 cls_cnt 0 2006.232.08:17:31.79#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.232.08:17:31.91#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.232.08:17:31.91#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.232.08:17:31.91#ibcon#enter wrdev, iclass 12, count 0 2006.232.08:17:31.91#ibcon#first serial, iclass 12, count 0 2006.232.08:17:31.91#ibcon#enter sib2, iclass 12, count 0 2006.232.08:17:31.91#ibcon#flushed, iclass 12, count 0 2006.232.08:17:31.91#ibcon#about to write, iclass 12, count 0 2006.232.08:17:31.91#ibcon#wrote, iclass 12, count 0 2006.232.08:17:31.91#ibcon#about to read 3, iclass 12, count 0 2006.232.08:17:31.93#ibcon#read 3, iclass 12, count 0 2006.232.08:17:31.93#ibcon#about to read 4, iclass 12, count 0 2006.232.08:17:31.93#ibcon#read 4, iclass 12, count 0 2006.232.08:17:31.93#ibcon#about to read 5, iclass 12, count 0 2006.232.08:17:31.93#ibcon#read 5, iclass 12, count 0 2006.232.08:17:31.93#ibcon#about to read 6, iclass 12, count 0 2006.232.08:17:31.93#ibcon#read 6, iclass 12, count 0 2006.232.08:17:31.93#ibcon#end of sib2, iclass 12, count 0 2006.232.08:17:31.93#ibcon#*mode == 0, iclass 12, count 0 2006.232.08:17:31.93#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.232.08:17:31.93#ibcon#[27=USB\r\n] 2006.232.08:17:31.93#ibcon#*before write, iclass 12, count 0 2006.232.08:17:31.93#ibcon#enter sib2, iclass 12, count 0 2006.232.08:17:31.93#ibcon#flushed, iclass 12, count 0 2006.232.08:17:31.93#ibcon#about to write, iclass 12, count 0 2006.232.08:17:31.93#ibcon#wrote, iclass 12, count 0 2006.232.08:17:31.93#ibcon#about to read 3, iclass 12, count 0 2006.232.08:17:31.96#ibcon#read 3, iclass 12, count 0 2006.232.08:17:31.96#ibcon#about to read 4, iclass 12, count 0 2006.232.08:17:31.96#ibcon#read 4, iclass 12, count 0 2006.232.08:17:31.96#ibcon#about to read 5, iclass 12, count 0 2006.232.08:17:31.96#ibcon#read 5, iclass 12, count 0 2006.232.08:17:31.96#ibcon#about to read 6, iclass 12, count 0 2006.232.08:17:31.96#ibcon#read 6, iclass 12, count 0 2006.232.08:17:31.96#ibcon#end of sib2, iclass 12, count 0 2006.232.08:17:31.96#ibcon#*after write, iclass 12, count 0 2006.232.08:17:31.96#ibcon#*before return 0, iclass 12, count 0 2006.232.08:17:31.96#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.232.08:17:31.96#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.232.08:17:31.96#ibcon#about to clear, iclass 12 cls_cnt 0 2006.232.08:17:31.96#ibcon#cleared, iclass 12 cls_cnt 0 2006.232.08:17:31.96$vc4f8/vblo=5,744.99 2006.232.08:17:31.96#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.232.08:17:31.96#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.232.08:17:31.96#ibcon#ireg 17 cls_cnt 0 2006.232.08:17:31.96#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.232.08:17:31.96#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.232.08:17:31.96#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.232.08:17:31.96#ibcon#enter wrdev, iclass 14, count 0 2006.232.08:17:31.96#ibcon#first serial, iclass 14, count 0 2006.232.08:17:31.96#ibcon#enter sib2, iclass 14, count 0 2006.232.08:17:31.96#ibcon#flushed, iclass 14, count 0 2006.232.08:17:31.96#ibcon#about to write, iclass 14, count 0 2006.232.08:17:31.96#ibcon#wrote, iclass 14, count 0 2006.232.08:17:31.96#ibcon#about to read 3, iclass 14, count 0 2006.232.08:17:31.98#ibcon#read 3, iclass 14, count 0 2006.232.08:17:31.98#ibcon#about to read 4, iclass 14, count 0 2006.232.08:17:31.98#ibcon#read 4, iclass 14, count 0 2006.232.08:17:31.98#ibcon#about to read 5, iclass 14, count 0 2006.232.08:17:31.98#ibcon#read 5, iclass 14, count 0 2006.232.08:17:31.98#ibcon#about to read 6, iclass 14, count 0 2006.232.08:17:31.98#ibcon#read 6, iclass 14, count 0 2006.232.08:17:31.98#ibcon#end of sib2, iclass 14, count 0 2006.232.08:17:31.98#ibcon#*mode == 0, iclass 14, count 0 2006.232.08:17:31.98#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.232.08:17:31.98#ibcon#[28=FRQ=05,744.99\r\n] 2006.232.08:17:31.98#ibcon#*before write, iclass 14, count 0 2006.232.08:17:31.98#ibcon#enter sib2, iclass 14, count 0 2006.232.08:17:31.98#ibcon#flushed, iclass 14, count 0 2006.232.08:17:31.98#ibcon#about to write, iclass 14, count 0 2006.232.08:17:31.98#ibcon#wrote, iclass 14, count 0 2006.232.08:17:31.98#ibcon#about to read 3, iclass 14, count 0 2006.232.08:17:32.02#ibcon#read 3, iclass 14, count 0 2006.232.08:17:32.02#ibcon#about to read 4, iclass 14, count 0 2006.232.08:17:32.02#ibcon#read 4, iclass 14, count 0 2006.232.08:17:32.02#ibcon#about to read 5, iclass 14, count 0 2006.232.08:17:32.02#ibcon#read 5, iclass 14, count 0 2006.232.08:17:32.02#ibcon#about to read 6, iclass 14, count 0 2006.232.08:17:32.02#ibcon#read 6, iclass 14, count 0 2006.232.08:17:32.02#ibcon#end of sib2, iclass 14, count 0 2006.232.08:17:32.02#ibcon#*after write, iclass 14, count 0 2006.232.08:17:32.02#ibcon#*before return 0, iclass 14, count 0 2006.232.08:17:32.02#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.232.08:17:32.02#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.232.08:17:32.02#ibcon#about to clear, iclass 14 cls_cnt 0 2006.232.08:17:32.02#ibcon#cleared, iclass 14 cls_cnt 0 2006.232.08:17:32.02$vc4f8/vb=5,3 2006.232.08:17:32.02#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.232.08:17:32.02#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.232.08:17:32.02#ibcon#ireg 11 cls_cnt 2 2006.232.08:17:32.02#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.232.08:17:32.08#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.232.08:17:32.08#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.232.08:17:32.08#ibcon#enter wrdev, iclass 16, count 2 2006.232.08:17:32.08#ibcon#first serial, iclass 16, count 2 2006.232.08:17:32.08#ibcon#enter sib2, iclass 16, count 2 2006.232.08:17:32.08#ibcon#flushed, iclass 16, count 2 2006.232.08:17:32.08#ibcon#about to write, iclass 16, count 2 2006.232.08:17:32.08#ibcon#wrote, iclass 16, count 2 2006.232.08:17:32.08#ibcon#about to read 3, iclass 16, count 2 2006.232.08:17:32.10#ibcon#read 3, iclass 16, count 2 2006.232.08:17:32.10#ibcon#about to read 4, iclass 16, count 2 2006.232.08:17:32.10#ibcon#read 4, iclass 16, count 2 2006.232.08:17:32.10#ibcon#about to read 5, iclass 16, count 2 2006.232.08:17:32.10#ibcon#read 5, iclass 16, count 2 2006.232.08:17:32.10#ibcon#about to read 6, iclass 16, count 2 2006.232.08:17:32.10#ibcon#read 6, iclass 16, count 2 2006.232.08:17:32.10#ibcon#end of sib2, iclass 16, count 2 2006.232.08:17:32.10#ibcon#*mode == 0, iclass 16, count 2 2006.232.08:17:32.10#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.232.08:17:32.10#ibcon#[27=AT05-03\r\n] 2006.232.08:17:32.10#ibcon#*before write, iclass 16, count 2 2006.232.08:17:32.10#ibcon#enter sib2, iclass 16, count 2 2006.232.08:17:32.10#ibcon#flushed, iclass 16, count 2 2006.232.08:17:32.10#ibcon#about to write, iclass 16, count 2 2006.232.08:17:32.10#ibcon#wrote, iclass 16, count 2 2006.232.08:17:32.10#ibcon#about to read 3, iclass 16, count 2 2006.232.08:17:32.13#ibcon#read 3, iclass 16, count 2 2006.232.08:17:32.13#ibcon#about to read 4, iclass 16, count 2 2006.232.08:17:32.13#ibcon#read 4, iclass 16, count 2 2006.232.08:17:32.13#ibcon#about to read 5, iclass 16, count 2 2006.232.08:17:32.13#ibcon#read 5, iclass 16, count 2 2006.232.08:17:32.13#ibcon#about to read 6, iclass 16, count 2 2006.232.08:17:32.13#ibcon#read 6, iclass 16, count 2 2006.232.08:17:32.13#ibcon#end of sib2, iclass 16, count 2 2006.232.08:17:32.13#ibcon#*after write, iclass 16, count 2 2006.232.08:17:32.13#ibcon#*before return 0, iclass 16, count 2 2006.232.08:17:32.13#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.232.08:17:32.13#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.232.08:17:32.13#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.232.08:17:32.13#ibcon#ireg 7 cls_cnt 0 2006.232.08:17:32.13#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.232.08:17:32.25#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.232.08:17:32.25#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.232.08:17:32.25#ibcon#enter wrdev, iclass 16, count 0 2006.232.08:17:32.25#ibcon#first serial, iclass 16, count 0 2006.232.08:17:32.25#ibcon#enter sib2, iclass 16, count 0 2006.232.08:17:32.25#ibcon#flushed, iclass 16, count 0 2006.232.08:17:32.25#ibcon#about to write, iclass 16, count 0 2006.232.08:17:32.25#ibcon#wrote, iclass 16, count 0 2006.232.08:17:32.25#ibcon#about to read 3, iclass 16, count 0 2006.232.08:17:32.27#ibcon#read 3, iclass 16, count 0 2006.232.08:17:32.27#ibcon#about to read 4, iclass 16, count 0 2006.232.08:17:32.27#ibcon#read 4, iclass 16, count 0 2006.232.08:17:32.27#ibcon#about to read 5, iclass 16, count 0 2006.232.08:17:32.27#ibcon#read 5, iclass 16, count 0 2006.232.08:17:32.27#ibcon#about to read 6, iclass 16, count 0 2006.232.08:17:32.27#ibcon#read 6, iclass 16, count 0 2006.232.08:17:32.27#ibcon#end of sib2, iclass 16, count 0 2006.232.08:17:32.27#ibcon#*mode == 0, iclass 16, count 0 2006.232.08:17:32.27#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.232.08:17:32.27#ibcon#[27=USB\r\n] 2006.232.08:17:32.27#ibcon#*before write, iclass 16, count 0 2006.232.08:17:32.27#ibcon#enter sib2, iclass 16, count 0 2006.232.08:17:32.27#ibcon#flushed, iclass 16, count 0 2006.232.08:17:32.27#ibcon#about to write, iclass 16, count 0 2006.232.08:17:32.27#ibcon#wrote, iclass 16, count 0 2006.232.08:17:32.27#ibcon#about to read 3, iclass 16, count 0 2006.232.08:17:32.30#ibcon#read 3, iclass 16, count 0 2006.232.08:17:32.30#ibcon#about to read 4, iclass 16, count 0 2006.232.08:17:32.30#ibcon#read 4, iclass 16, count 0 2006.232.08:17:32.30#ibcon#about to read 5, iclass 16, count 0 2006.232.08:17:32.30#ibcon#read 5, iclass 16, count 0 2006.232.08:17:32.30#ibcon#about to read 6, iclass 16, count 0 2006.232.08:17:32.30#ibcon#read 6, iclass 16, count 0 2006.232.08:17:32.30#ibcon#end of sib2, iclass 16, count 0 2006.232.08:17:32.30#ibcon#*after write, iclass 16, count 0 2006.232.08:17:32.30#ibcon#*before return 0, iclass 16, count 0 2006.232.08:17:32.30#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.232.08:17:32.30#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.232.08:17:32.30#ibcon#about to clear, iclass 16 cls_cnt 0 2006.232.08:17:32.30#ibcon#cleared, iclass 16 cls_cnt 0 2006.232.08:17:32.30$vc4f8/vblo=6,752.99 2006.232.08:17:32.30#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.232.08:17:32.30#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.232.08:17:32.30#ibcon#ireg 17 cls_cnt 0 2006.232.08:17:32.30#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.232.08:17:32.30#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.232.08:17:32.30#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.232.08:17:32.30#ibcon#enter wrdev, iclass 18, count 0 2006.232.08:17:32.30#ibcon#first serial, iclass 18, count 0 2006.232.08:17:32.30#ibcon#enter sib2, iclass 18, count 0 2006.232.08:17:32.30#ibcon#flushed, iclass 18, count 0 2006.232.08:17:32.30#ibcon#about to write, iclass 18, count 0 2006.232.08:17:32.30#ibcon#wrote, iclass 18, count 0 2006.232.08:17:32.30#ibcon#about to read 3, iclass 18, count 0 2006.232.08:17:32.33#ibcon#read 3, iclass 18, count 0 2006.232.08:17:32.33#ibcon#about to read 4, iclass 18, count 0 2006.232.08:17:32.33#ibcon#read 4, iclass 18, count 0 2006.232.08:17:32.33#ibcon#about to read 5, iclass 18, count 0 2006.232.08:17:32.33#ibcon#read 5, iclass 18, count 0 2006.232.08:17:32.33#ibcon#about to read 6, iclass 18, count 0 2006.232.08:17:32.33#ibcon#read 6, iclass 18, count 0 2006.232.08:17:32.33#ibcon#end of sib2, iclass 18, count 0 2006.232.08:17:32.33#ibcon#*mode == 0, iclass 18, count 0 2006.232.08:17:32.33#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.232.08:17:32.33#ibcon#[28=FRQ=06,752.99\r\n] 2006.232.08:17:32.33#ibcon#*before write, iclass 18, count 0 2006.232.08:17:32.33#ibcon#enter sib2, iclass 18, count 0 2006.232.08:17:32.33#ibcon#flushed, iclass 18, count 0 2006.232.08:17:32.33#ibcon#about to write, iclass 18, count 0 2006.232.08:17:32.33#ibcon#wrote, iclass 18, count 0 2006.232.08:17:32.33#ibcon#about to read 3, iclass 18, count 0 2006.232.08:17:32.37#ibcon#read 3, iclass 18, count 0 2006.232.08:17:32.37#ibcon#about to read 4, iclass 18, count 0 2006.232.08:17:32.37#ibcon#read 4, iclass 18, count 0 2006.232.08:17:32.37#ibcon#about to read 5, iclass 18, count 0 2006.232.08:17:32.37#ibcon#read 5, iclass 18, count 0 2006.232.08:17:32.37#ibcon#about to read 6, iclass 18, count 0 2006.232.08:17:32.37#ibcon#read 6, iclass 18, count 0 2006.232.08:17:32.37#ibcon#end of sib2, iclass 18, count 0 2006.232.08:17:32.37#ibcon#*after write, iclass 18, count 0 2006.232.08:17:32.37#ibcon#*before return 0, iclass 18, count 0 2006.232.08:17:32.37#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.232.08:17:32.37#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.232.08:17:32.37#ibcon#about to clear, iclass 18 cls_cnt 0 2006.232.08:17:32.37#ibcon#cleared, iclass 18 cls_cnt 0 2006.232.08:17:32.37$vc4f8/vb=6,4 2006.232.08:17:32.37#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.232.08:17:32.37#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.232.08:17:32.37#ibcon#ireg 11 cls_cnt 2 2006.232.08:17:32.37#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.232.08:17:32.42#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.232.08:17:32.42#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.232.08:17:32.42#ibcon#enter wrdev, iclass 20, count 2 2006.232.08:17:32.42#ibcon#first serial, iclass 20, count 2 2006.232.08:17:32.42#ibcon#enter sib2, iclass 20, count 2 2006.232.08:17:32.42#ibcon#flushed, iclass 20, count 2 2006.232.08:17:32.42#ibcon#about to write, iclass 20, count 2 2006.232.08:17:32.42#ibcon#wrote, iclass 20, count 2 2006.232.08:17:32.42#ibcon#about to read 3, iclass 20, count 2 2006.232.08:17:32.44#ibcon#read 3, iclass 20, count 2 2006.232.08:17:32.44#ibcon#about to read 4, iclass 20, count 2 2006.232.08:17:32.44#ibcon#read 4, iclass 20, count 2 2006.232.08:17:32.44#ibcon#about to read 5, iclass 20, count 2 2006.232.08:17:32.44#ibcon#read 5, iclass 20, count 2 2006.232.08:17:32.44#ibcon#about to read 6, iclass 20, count 2 2006.232.08:17:32.44#ibcon#read 6, iclass 20, count 2 2006.232.08:17:32.44#ibcon#end of sib2, iclass 20, count 2 2006.232.08:17:32.44#ibcon#*mode == 0, iclass 20, count 2 2006.232.08:17:32.44#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.232.08:17:32.44#ibcon#[27=AT06-04\r\n] 2006.232.08:17:32.44#ibcon#*before write, iclass 20, count 2 2006.232.08:17:32.44#ibcon#enter sib2, iclass 20, count 2 2006.232.08:17:32.44#ibcon#flushed, iclass 20, count 2 2006.232.08:17:32.44#ibcon#about to write, iclass 20, count 2 2006.232.08:17:32.44#ibcon#wrote, iclass 20, count 2 2006.232.08:17:32.44#ibcon#about to read 3, iclass 20, count 2 2006.232.08:17:32.47#ibcon#read 3, iclass 20, count 2 2006.232.08:17:32.47#ibcon#about to read 4, iclass 20, count 2 2006.232.08:17:32.47#ibcon#read 4, iclass 20, count 2 2006.232.08:17:32.47#ibcon#about to read 5, iclass 20, count 2 2006.232.08:17:32.47#ibcon#read 5, iclass 20, count 2 2006.232.08:17:32.47#ibcon#about to read 6, iclass 20, count 2 2006.232.08:17:32.47#ibcon#read 6, iclass 20, count 2 2006.232.08:17:32.47#ibcon#end of sib2, iclass 20, count 2 2006.232.08:17:32.47#ibcon#*after write, iclass 20, count 2 2006.232.08:17:32.47#ibcon#*before return 0, iclass 20, count 2 2006.232.08:17:32.47#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.232.08:17:32.47#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.232.08:17:32.47#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.232.08:17:32.47#ibcon#ireg 7 cls_cnt 0 2006.232.08:17:32.47#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.232.08:17:32.59#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.232.08:17:32.59#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.232.08:17:32.59#ibcon#enter wrdev, iclass 20, count 0 2006.232.08:17:32.59#ibcon#first serial, iclass 20, count 0 2006.232.08:17:32.59#ibcon#enter sib2, iclass 20, count 0 2006.232.08:17:32.59#ibcon#flushed, iclass 20, count 0 2006.232.08:17:32.59#ibcon#about to write, iclass 20, count 0 2006.232.08:17:32.59#ibcon#wrote, iclass 20, count 0 2006.232.08:17:32.59#ibcon#about to read 3, iclass 20, count 0 2006.232.08:17:32.61#ibcon#read 3, iclass 20, count 0 2006.232.08:17:32.61#ibcon#about to read 4, iclass 20, count 0 2006.232.08:17:32.61#ibcon#read 4, iclass 20, count 0 2006.232.08:17:32.61#ibcon#about to read 5, iclass 20, count 0 2006.232.08:17:32.61#ibcon#read 5, iclass 20, count 0 2006.232.08:17:32.61#ibcon#about to read 6, iclass 20, count 0 2006.232.08:17:32.61#ibcon#read 6, iclass 20, count 0 2006.232.08:17:32.61#ibcon#end of sib2, iclass 20, count 0 2006.232.08:17:32.61#ibcon#*mode == 0, iclass 20, count 0 2006.232.08:17:32.61#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.232.08:17:32.61#ibcon#[27=USB\r\n] 2006.232.08:17:32.61#ibcon#*before write, iclass 20, count 0 2006.232.08:17:32.61#ibcon#enter sib2, iclass 20, count 0 2006.232.08:17:32.61#ibcon#flushed, iclass 20, count 0 2006.232.08:17:32.61#ibcon#about to write, iclass 20, count 0 2006.232.08:17:32.61#ibcon#wrote, iclass 20, count 0 2006.232.08:17:32.61#ibcon#about to read 3, iclass 20, count 0 2006.232.08:17:32.64#ibcon#read 3, iclass 20, count 0 2006.232.08:17:32.64#ibcon#about to read 4, iclass 20, count 0 2006.232.08:17:32.64#ibcon#read 4, iclass 20, count 0 2006.232.08:17:32.64#ibcon#about to read 5, iclass 20, count 0 2006.232.08:17:32.64#ibcon#read 5, iclass 20, count 0 2006.232.08:17:32.64#ibcon#about to read 6, iclass 20, count 0 2006.232.08:17:32.64#ibcon#read 6, iclass 20, count 0 2006.232.08:17:32.64#ibcon#end of sib2, iclass 20, count 0 2006.232.08:17:32.64#ibcon#*after write, iclass 20, count 0 2006.232.08:17:32.64#ibcon#*before return 0, iclass 20, count 0 2006.232.08:17:32.64#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.232.08:17:32.64#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.232.08:17:32.64#ibcon#about to clear, iclass 20 cls_cnt 0 2006.232.08:17:32.64#ibcon#cleared, iclass 20 cls_cnt 0 2006.232.08:17:32.64$vc4f8/vabw=wide 2006.232.08:17:32.64#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.232.08:17:32.64#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.232.08:17:32.64#ibcon#ireg 8 cls_cnt 0 2006.232.08:17:32.64#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.232.08:17:32.64#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.232.08:17:32.64#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.232.08:17:32.64#ibcon#enter wrdev, iclass 22, count 0 2006.232.08:17:32.64#ibcon#first serial, iclass 22, count 0 2006.232.08:17:32.64#ibcon#enter sib2, iclass 22, count 0 2006.232.08:17:32.64#ibcon#flushed, iclass 22, count 0 2006.232.08:17:32.64#ibcon#about to write, iclass 22, count 0 2006.232.08:17:32.64#ibcon#wrote, iclass 22, count 0 2006.232.08:17:32.64#ibcon#about to read 3, iclass 22, count 0 2006.232.08:17:32.66#ibcon#read 3, iclass 22, count 0 2006.232.08:17:32.66#ibcon#about to read 4, iclass 22, count 0 2006.232.08:17:32.66#ibcon#read 4, iclass 22, count 0 2006.232.08:17:32.66#ibcon#about to read 5, iclass 22, count 0 2006.232.08:17:32.66#ibcon#read 5, iclass 22, count 0 2006.232.08:17:32.66#ibcon#about to read 6, iclass 22, count 0 2006.232.08:17:32.66#ibcon#read 6, iclass 22, count 0 2006.232.08:17:32.66#ibcon#end of sib2, iclass 22, count 0 2006.232.08:17:32.66#ibcon#*mode == 0, iclass 22, count 0 2006.232.08:17:32.66#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.232.08:17:32.66#ibcon#[25=BW32\r\n] 2006.232.08:17:32.66#ibcon#*before write, iclass 22, count 0 2006.232.08:17:32.66#ibcon#enter sib2, iclass 22, count 0 2006.232.08:17:32.66#ibcon#flushed, iclass 22, count 0 2006.232.08:17:32.66#ibcon#about to write, iclass 22, count 0 2006.232.08:17:32.66#ibcon#wrote, iclass 22, count 0 2006.232.08:17:32.66#ibcon#about to read 3, iclass 22, count 0 2006.232.08:17:32.69#ibcon#read 3, iclass 22, count 0 2006.232.08:17:32.69#ibcon#about to read 4, iclass 22, count 0 2006.232.08:17:32.69#ibcon#read 4, iclass 22, count 0 2006.232.08:17:32.69#ibcon#about to read 5, iclass 22, count 0 2006.232.08:17:32.69#ibcon#read 5, iclass 22, count 0 2006.232.08:17:32.69#ibcon#about to read 6, iclass 22, count 0 2006.232.08:17:32.69#ibcon#read 6, iclass 22, count 0 2006.232.08:17:32.69#ibcon#end of sib2, iclass 22, count 0 2006.232.08:17:32.69#ibcon#*after write, iclass 22, count 0 2006.232.08:17:32.69#ibcon#*before return 0, iclass 22, count 0 2006.232.08:17:32.69#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.232.08:17:32.69#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.232.08:17:32.69#ibcon#about to clear, iclass 22 cls_cnt 0 2006.232.08:17:32.69#ibcon#cleared, iclass 22 cls_cnt 0 2006.232.08:17:32.69$vc4f8/vbbw=wide 2006.232.08:17:32.69#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.232.08:17:32.69#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.232.08:17:32.69#ibcon#ireg 8 cls_cnt 0 2006.232.08:17:32.69#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.232.08:17:32.76#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.232.08:17:32.76#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.232.08:17:32.76#ibcon#enter wrdev, iclass 24, count 0 2006.232.08:17:32.76#ibcon#first serial, iclass 24, count 0 2006.232.08:17:32.76#ibcon#enter sib2, iclass 24, count 0 2006.232.08:17:32.76#ibcon#flushed, iclass 24, count 0 2006.232.08:17:32.76#ibcon#about to write, iclass 24, count 0 2006.232.08:17:32.76#ibcon#wrote, iclass 24, count 0 2006.232.08:17:32.76#ibcon#about to read 3, iclass 24, count 0 2006.232.08:17:32.78#ibcon#read 3, iclass 24, count 0 2006.232.08:17:32.78#ibcon#about to read 4, iclass 24, count 0 2006.232.08:17:32.78#ibcon#read 4, iclass 24, count 0 2006.232.08:17:32.78#ibcon#about to read 5, iclass 24, count 0 2006.232.08:17:32.78#ibcon#read 5, iclass 24, count 0 2006.232.08:17:32.78#ibcon#about to read 6, iclass 24, count 0 2006.232.08:17:32.78#ibcon#read 6, iclass 24, count 0 2006.232.08:17:32.78#ibcon#end of sib2, iclass 24, count 0 2006.232.08:17:32.78#ibcon#*mode == 0, iclass 24, count 0 2006.232.08:17:32.78#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.232.08:17:32.78#ibcon#[27=BW32\r\n] 2006.232.08:17:32.78#ibcon#*before write, iclass 24, count 0 2006.232.08:17:32.78#ibcon#enter sib2, iclass 24, count 0 2006.232.08:17:32.78#ibcon#flushed, iclass 24, count 0 2006.232.08:17:32.78#ibcon#about to write, iclass 24, count 0 2006.232.08:17:32.78#ibcon#wrote, iclass 24, count 0 2006.232.08:17:32.78#ibcon#about to read 3, iclass 24, count 0 2006.232.08:17:32.81#ibcon#read 3, iclass 24, count 0 2006.232.08:17:32.81#ibcon#about to read 4, iclass 24, count 0 2006.232.08:17:32.81#ibcon#read 4, iclass 24, count 0 2006.232.08:17:32.81#ibcon#about to read 5, iclass 24, count 0 2006.232.08:17:32.81#ibcon#read 5, iclass 24, count 0 2006.232.08:17:32.81#ibcon#about to read 6, iclass 24, count 0 2006.232.08:17:32.81#ibcon#read 6, iclass 24, count 0 2006.232.08:17:32.81#ibcon#end of sib2, iclass 24, count 0 2006.232.08:17:32.81#ibcon#*after write, iclass 24, count 0 2006.232.08:17:32.81#ibcon#*before return 0, iclass 24, count 0 2006.232.08:17:32.81#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.232.08:17:32.81#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.232.08:17:32.81#ibcon#about to clear, iclass 24 cls_cnt 0 2006.232.08:17:32.81#ibcon#cleared, iclass 24 cls_cnt 0 2006.232.08:17:32.81$4f8m12a/ifd4f 2006.232.08:17:32.81$ifd4f/lo= 2006.232.08:17:32.81$ifd4f/lo=lo1,7680.00,usb,rcp,1 2006.232.08:17:32.81$ifd4f/lo=lo2,1600.00,usb,rcp,1 2006.232.08:17:32.81$ifd4f/lo=lo3,8080.00,usb,rcp,1 2006.232.08:17:32.82$ifd4f/patch= 2006.232.08:17:32.82$ifd4f/patch=lo1,a1,a2,a3,a4 2006.232.08:17:32.82$ifd4f/patch=lo2,b1,b2,b3,b4,b5,b6 2006.232.08:17:32.82$ifd4f/patch=lo3,a5,a6,a7,a8 2006.232.08:17:32.82$4f8m12a/"form=m,16.000,1:2 2006.232.08:17:32.82$4f8m12a/"tpicd 2006.232.08:17:32.82$4f8m12a/echo=off 2006.232.08:17:32.82$4f8m12a/xlog=off 2006.232.08:17:32.82:!2006.232.08:18:00 2006.232.08:17:42.14#trakl#Source acquired 2006.232.08:17:42.14#flagr#flagr/antenna,acquired 2006.232.08:18:00.01:preob 2006.232.08:18:01.14/onsource/TRACKING 2006.232.08:18:01.14:!2006.232.08:18:10 2006.232.08:18:10.00:data_valid=on 2006.232.08:18:10.00:midob 2006.232.08:18:10.14/onsource/TRACKING 2006.232.08:18:10.14/wx/29.24,1007.4,89 2006.232.08:18:10.29/cable/+6.3885E-03 2006.232.08:18:11.38/va/01,08,usb,yes,33,35 2006.232.08:18:11.38/va/02,07,usb,yes,33,35 2006.232.08:18:11.38/va/03,08,usb,yes,25,25 2006.232.08:18:11.38/va/04,07,usb,yes,34,37 2006.232.08:18:11.38/va/05,07,usb,yes,39,41 2006.232.08:18:11.38/va/06,06,usb,yes,38,38 2006.232.08:18:11.38/va/07,06,usb,yes,39,39 2006.232.08:18:11.38/va/08,06,usb,yes,42,41 2006.232.08:18:11.61/valo/01,532.99,yes,locked 2006.232.08:18:11.61/valo/02,572.99,yes,locked 2006.232.08:18:11.61/valo/03,672.99,yes,locked 2006.232.08:18:11.61/valo/04,832.99,yes,locked 2006.232.08:18:11.61/valo/05,652.99,yes,locked 2006.232.08:18:11.61/valo/06,772.99,yes,locked 2006.232.08:18:11.61/valo/07,832.99,yes,locked 2006.232.08:18:11.61/valo/08,852.99,yes,locked 2006.232.08:18:12.70/vb/01,04,usb,yes,32,31 2006.232.08:18:12.70/vb/02,04,usb,yes,34,35 2006.232.08:18:12.70/vb/03,04,usb,yes,30,34 2006.232.08:18:12.70/vb/04,04,usb,yes,31,31 2006.232.08:18:12.70/vb/05,03,usb,yes,36,41 2006.232.08:18:12.70/vb/06,04,usb,yes,30,33 2006.232.08:18:12.70/vb/07,04,usb,yes,33,32 2006.232.08:18:12.70/vb/08,04,usb,yes,30,34 2006.232.08:18:12.93/vblo/01,632.99,yes,locked 2006.232.08:18:12.93/vblo/02,640.99,yes,locked 2006.232.08:18:12.93/vblo/03,656.99,yes,locked 2006.232.08:18:12.93/vblo/04,712.99,yes,locked 2006.232.08:18:12.93/vblo/05,744.99,yes,locked 2006.232.08:18:12.93/vblo/06,752.99,yes,locked 2006.232.08:18:12.93/vblo/07,734.99,yes,locked 2006.232.08:18:12.93/vblo/08,744.99,yes,locked 2006.232.08:18:13.08/vabw/8 2006.232.08:18:13.23/vbbw/8 2006.232.08:18:13.32/xfe/off,on,13.7 2006.232.08:18:13.69/ifatt/23,28,28,28 2006.232.08:18:14.07/fmout-gps/S +4.54E-07 2006.232.08:18:14.12:!2006.232.08:19:10 2006.232.08:19:10.00:data_valid=off 2006.232.08:19:10.01:postob 2006.232.08:19:10.18/cable/+6.3890E-03 2006.232.08:19:10.19/wx/29.23,1007.4,90 2006.232.08:19:11.08/fmout-gps/S +4.55E-07 2006.232.08:19:11.09:scan_name=232-0821,k06232,60 2006.232.08:19:11.09:source=oq208,140700.39,282714.7,2000.0,ccw 2006.232.08:19:11.14#flagr#flagr/antenna,new-source 2006.232.08:19:12.14:checkk5 2006.232.08:19:12.52/chk_autoobs//k5ts1/ autoobs is running! 2006.232.08:19:12.90/chk_autoobs//k5ts2/ autoobs is running! 2006.232.08:19:13.28/chk_autoobs//k5ts3/ autoobs is running! 2006.232.08:19:13.65/chk_autoobs//k5ts4/ autoobs is running! 2006.232.08:19:14.01/chk_obsdata//k5ts1/T2320818??a.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.08:19:14.38/chk_obsdata//k5ts2/T2320818??b.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.08:19:14.75/chk_obsdata//k5ts3/T2320818??c.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.08:19:15.12/chk_obsdata//k5ts4/T2320818??d.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.08:19:15.80/k5log//k5ts1_log_newline 2006.232.08:19:16.49/k5log//k5ts2_log_newline 2006.232.08:19:17.19/k5log//k5ts3_log_newline 2006.232.08:19:17.88/k5log//k5ts4_log_newline 2006.232.08:19:17.90/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.232.08:19:17.90:4f8m12a=3 2006.232.08:19:17.90$4f8m12a/echo=on 2006.232.08:19:17.90$4f8m12a/pcalon 2006.232.08:19:17.90$pcalon/"no phase cal control is implemented here 2006.232.08:19:17.90$4f8m12a/"tpicd=stop 2006.232.08:19:17.90$4f8m12a/vc4f8 2006.232.08:19:17.90$vc4f8/valo=1,532.99 2006.232.08:19:17.91#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.232.08:19:17.91#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.232.08:19:17.91#ibcon#ireg 17 cls_cnt 0 2006.232.08:19:17.91#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.232.08:19:17.91#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.232.08:19:17.91#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.232.08:19:17.91#ibcon#enter wrdev, iclass 35, count 0 2006.232.08:19:17.91#ibcon#first serial, iclass 35, count 0 2006.232.08:19:17.91#ibcon#enter sib2, iclass 35, count 0 2006.232.08:19:17.91#ibcon#flushed, iclass 35, count 0 2006.232.08:19:17.91#ibcon#about to write, iclass 35, count 0 2006.232.08:19:17.91#ibcon#wrote, iclass 35, count 0 2006.232.08:19:17.91#ibcon#about to read 3, iclass 35, count 0 2006.232.08:19:17.95#ibcon#read 3, iclass 35, count 0 2006.232.08:19:17.95#ibcon#about to read 4, iclass 35, count 0 2006.232.08:19:17.95#ibcon#read 4, iclass 35, count 0 2006.232.08:19:17.95#ibcon#about to read 5, iclass 35, count 0 2006.232.08:19:17.95#ibcon#read 5, iclass 35, count 0 2006.232.08:19:17.95#ibcon#about to read 6, iclass 35, count 0 2006.232.08:19:17.95#ibcon#read 6, iclass 35, count 0 2006.232.08:19:17.95#ibcon#end of sib2, iclass 35, count 0 2006.232.08:19:17.95#ibcon#*mode == 0, iclass 35, count 0 2006.232.08:19:17.95#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.232.08:19:17.95#ibcon#[26=FRQ=01,532.99\r\n] 2006.232.08:19:17.95#ibcon#*before write, iclass 35, count 0 2006.232.08:19:17.95#ibcon#enter sib2, iclass 35, count 0 2006.232.08:19:17.95#ibcon#flushed, iclass 35, count 0 2006.232.08:19:17.95#ibcon#about to write, iclass 35, count 0 2006.232.08:19:17.95#ibcon#wrote, iclass 35, count 0 2006.232.08:19:17.95#ibcon#about to read 3, iclass 35, count 0 2006.232.08:19:17.99#ibcon#read 3, iclass 35, count 0 2006.232.08:19:17.99#ibcon#about to read 4, iclass 35, count 0 2006.232.08:19:17.99#ibcon#read 4, iclass 35, count 0 2006.232.08:19:17.99#ibcon#about to read 5, iclass 35, count 0 2006.232.08:19:17.99#ibcon#read 5, iclass 35, count 0 2006.232.08:19:17.99#ibcon#about to read 6, iclass 35, count 0 2006.232.08:19:17.99#ibcon#read 6, iclass 35, count 0 2006.232.08:19:17.99#ibcon#end of sib2, iclass 35, count 0 2006.232.08:19:17.99#ibcon#*after write, iclass 35, count 0 2006.232.08:19:17.99#ibcon#*before return 0, iclass 35, count 0 2006.232.08:19:17.99#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.232.08:19:17.99#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.232.08:19:17.99#ibcon#about to clear, iclass 35 cls_cnt 0 2006.232.08:19:17.99#ibcon#cleared, iclass 35 cls_cnt 0 2006.232.08:19:17.99$vc4f8/va=1,8 2006.232.08:19:17.99#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.232.08:19:17.99#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.232.08:19:17.99#ibcon#ireg 11 cls_cnt 2 2006.232.08:19:17.99#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.232.08:19:17.99#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.232.08:19:17.99#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.232.08:19:17.99#ibcon#enter wrdev, iclass 37, count 2 2006.232.08:19:17.99#ibcon#first serial, iclass 37, count 2 2006.232.08:19:17.99#ibcon#enter sib2, iclass 37, count 2 2006.232.08:19:17.99#ibcon#flushed, iclass 37, count 2 2006.232.08:19:17.99#ibcon#about to write, iclass 37, count 2 2006.232.08:19:17.99#ibcon#wrote, iclass 37, count 2 2006.232.08:19:17.99#ibcon#about to read 3, iclass 37, count 2 2006.232.08:19:18.02#ibcon#read 3, iclass 37, count 2 2006.232.08:19:18.02#ibcon#about to read 4, iclass 37, count 2 2006.232.08:19:18.02#ibcon#read 4, iclass 37, count 2 2006.232.08:19:18.02#ibcon#about to read 5, iclass 37, count 2 2006.232.08:19:18.02#ibcon#read 5, iclass 37, count 2 2006.232.08:19:18.02#ibcon#about to read 6, iclass 37, count 2 2006.232.08:19:18.02#ibcon#read 6, iclass 37, count 2 2006.232.08:19:18.02#ibcon#end of sib2, iclass 37, count 2 2006.232.08:19:18.02#ibcon#*mode == 0, iclass 37, count 2 2006.232.08:19:18.02#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.232.08:19:18.02#ibcon#[25=AT01-08\r\n] 2006.232.08:19:18.02#ibcon#*before write, iclass 37, count 2 2006.232.08:19:18.02#ibcon#enter sib2, iclass 37, count 2 2006.232.08:19:18.02#ibcon#flushed, iclass 37, count 2 2006.232.08:19:18.02#ibcon#about to write, iclass 37, count 2 2006.232.08:19:18.02#ibcon#wrote, iclass 37, count 2 2006.232.08:19:18.02#ibcon#about to read 3, iclass 37, count 2 2006.232.08:19:18.05#ibcon#read 3, iclass 37, count 2 2006.232.08:19:18.05#ibcon#about to read 4, iclass 37, count 2 2006.232.08:19:18.05#ibcon#read 4, iclass 37, count 2 2006.232.08:19:18.05#ibcon#about to read 5, iclass 37, count 2 2006.232.08:19:18.05#ibcon#read 5, iclass 37, count 2 2006.232.08:19:18.05#ibcon#about to read 6, iclass 37, count 2 2006.232.08:19:18.05#ibcon#read 6, iclass 37, count 2 2006.232.08:19:18.05#ibcon#end of sib2, iclass 37, count 2 2006.232.08:19:18.05#ibcon#*after write, iclass 37, count 2 2006.232.08:19:18.05#ibcon#*before return 0, iclass 37, count 2 2006.232.08:19:18.05#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.232.08:19:18.05#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.232.08:19:18.05#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.232.08:19:18.05#ibcon#ireg 7 cls_cnt 0 2006.232.08:19:18.05#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.232.08:19:18.17#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.232.08:19:18.17#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.232.08:19:18.17#ibcon#enter wrdev, iclass 37, count 0 2006.232.08:19:18.17#ibcon#first serial, iclass 37, count 0 2006.232.08:19:18.17#ibcon#enter sib2, iclass 37, count 0 2006.232.08:19:18.17#ibcon#flushed, iclass 37, count 0 2006.232.08:19:18.17#ibcon#about to write, iclass 37, count 0 2006.232.08:19:18.17#ibcon#wrote, iclass 37, count 0 2006.232.08:19:18.17#ibcon#about to read 3, iclass 37, count 0 2006.232.08:19:18.19#ibcon#read 3, iclass 37, count 0 2006.232.08:19:18.19#ibcon#about to read 4, iclass 37, count 0 2006.232.08:19:18.19#ibcon#read 4, iclass 37, count 0 2006.232.08:19:18.19#ibcon#about to read 5, iclass 37, count 0 2006.232.08:19:18.19#ibcon#read 5, iclass 37, count 0 2006.232.08:19:18.19#ibcon#about to read 6, iclass 37, count 0 2006.232.08:19:18.19#ibcon#read 6, iclass 37, count 0 2006.232.08:19:18.19#ibcon#end of sib2, iclass 37, count 0 2006.232.08:19:18.19#ibcon#*mode == 0, iclass 37, count 0 2006.232.08:19:18.19#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.232.08:19:18.19#ibcon#[25=USB\r\n] 2006.232.08:19:18.19#ibcon#*before write, iclass 37, count 0 2006.232.08:19:18.19#ibcon#enter sib2, iclass 37, count 0 2006.232.08:19:18.19#ibcon#flushed, iclass 37, count 0 2006.232.08:19:18.19#ibcon#about to write, iclass 37, count 0 2006.232.08:19:18.19#ibcon#wrote, iclass 37, count 0 2006.232.08:19:18.19#ibcon#about to read 3, iclass 37, count 0 2006.232.08:19:18.22#ibcon#read 3, iclass 37, count 0 2006.232.08:19:18.22#ibcon#about to read 4, iclass 37, count 0 2006.232.08:19:18.22#ibcon#read 4, iclass 37, count 0 2006.232.08:19:18.22#ibcon#about to read 5, iclass 37, count 0 2006.232.08:19:18.22#ibcon#read 5, iclass 37, count 0 2006.232.08:19:18.22#ibcon#about to read 6, iclass 37, count 0 2006.232.08:19:18.22#ibcon#read 6, iclass 37, count 0 2006.232.08:19:18.22#ibcon#end of sib2, iclass 37, count 0 2006.232.08:19:18.22#ibcon#*after write, iclass 37, count 0 2006.232.08:19:18.22#ibcon#*before return 0, iclass 37, count 0 2006.232.08:19:18.22#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.232.08:19:18.22#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.232.08:19:18.22#ibcon#about to clear, iclass 37 cls_cnt 0 2006.232.08:19:18.22#ibcon#cleared, iclass 37 cls_cnt 0 2006.232.08:19:18.22$vc4f8/valo=2,572.99 2006.232.08:19:18.22#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.232.08:19:18.22#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.232.08:19:18.22#ibcon#ireg 17 cls_cnt 0 2006.232.08:19:18.22#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.232.08:19:18.22#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.232.08:19:18.22#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.232.08:19:18.22#ibcon#enter wrdev, iclass 39, count 0 2006.232.08:19:18.22#ibcon#first serial, iclass 39, count 0 2006.232.08:19:18.22#ibcon#enter sib2, iclass 39, count 0 2006.232.08:19:18.22#ibcon#flushed, iclass 39, count 0 2006.232.08:19:18.22#ibcon#about to write, iclass 39, count 0 2006.232.08:19:18.22#ibcon#wrote, iclass 39, count 0 2006.232.08:19:18.22#ibcon#about to read 3, iclass 39, count 0 2006.232.08:19:18.24#ibcon#read 3, iclass 39, count 0 2006.232.08:19:18.24#ibcon#about to read 4, iclass 39, count 0 2006.232.08:19:18.24#ibcon#read 4, iclass 39, count 0 2006.232.08:19:18.24#ibcon#about to read 5, iclass 39, count 0 2006.232.08:19:18.24#ibcon#read 5, iclass 39, count 0 2006.232.08:19:18.24#ibcon#about to read 6, iclass 39, count 0 2006.232.08:19:18.24#ibcon#read 6, iclass 39, count 0 2006.232.08:19:18.24#ibcon#end of sib2, iclass 39, count 0 2006.232.08:19:18.24#ibcon#*mode == 0, iclass 39, count 0 2006.232.08:19:18.24#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.232.08:19:18.24#ibcon#[26=FRQ=02,572.99\r\n] 2006.232.08:19:18.24#ibcon#*before write, iclass 39, count 0 2006.232.08:19:18.24#ibcon#enter sib2, iclass 39, count 0 2006.232.08:19:18.24#ibcon#flushed, iclass 39, count 0 2006.232.08:19:18.24#ibcon#about to write, iclass 39, count 0 2006.232.08:19:18.24#ibcon#wrote, iclass 39, count 0 2006.232.08:19:18.24#ibcon#about to read 3, iclass 39, count 0 2006.232.08:19:18.28#ibcon#read 3, iclass 39, count 0 2006.232.08:19:18.28#ibcon#about to read 4, iclass 39, count 0 2006.232.08:19:18.28#ibcon#read 4, iclass 39, count 0 2006.232.08:19:18.28#ibcon#about to read 5, iclass 39, count 0 2006.232.08:19:18.28#ibcon#read 5, iclass 39, count 0 2006.232.08:19:18.28#ibcon#about to read 6, iclass 39, count 0 2006.232.08:19:18.28#ibcon#read 6, iclass 39, count 0 2006.232.08:19:18.28#ibcon#end of sib2, iclass 39, count 0 2006.232.08:19:18.28#ibcon#*after write, iclass 39, count 0 2006.232.08:19:18.28#ibcon#*before return 0, iclass 39, count 0 2006.232.08:19:18.28#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.232.08:19:18.28#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.232.08:19:18.28#ibcon#about to clear, iclass 39 cls_cnt 0 2006.232.08:19:18.28#ibcon#cleared, iclass 39 cls_cnt 0 2006.232.08:19:18.28$vc4f8/va=2,7 2006.232.08:19:18.28#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.232.08:19:18.28#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.232.08:19:18.28#ibcon#ireg 11 cls_cnt 2 2006.232.08:19:18.28#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.232.08:19:18.35#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.232.08:19:18.35#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.232.08:19:18.35#ibcon#enter wrdev, iclass 3, count 2 2006.232.08:19:18.35#ibcon#first serial, iclass 3, count 2 2006.232.08:19:18.35#ibcon#enter sib2, iclass 3, count 2 2006.232.08:19:18.35#ibcon#flushed, iclass 3, count 2 2006.232.08:19:18.35#ibcon#about to write, iclass 3, count 2 2006.232.08:19:18.35#ibcon#wrote, iclass 3, count 2 2006.232.08:19:18.35#ibcon#about to read 3, iclass 3, count 2 2006.232.08:19:18.36#ibcon#read 3, iclass 3, count 2 2006.232.08:19:18.36#ibcon#about to read 4, iclass 3, count 2 2006.232.08:19:18.36#ibcon#read 4, iclass 3, count 2 2006.232.08:19:18.36#ibcon#about to read 5, iclass 3, count 2 2006.232.08:19:18.36#ibcon#read 5, iclass 3, count 2 2006.232.08:19:18.36#ibcon#about to read 6, iclass 3, count 2 2006.232.08:19:18.36#ibcon#read 6, iclass 3, count 2 2006.232.08:19:18.36#ibcon#end of sib2, iclass 3, count 2 2006.232.08:19:18.36#ibcon#*mode == 0, iclass 3, count 2 2006.232.08:19:18.36#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.232.08:19:18.36#ibcon#[25=AT02-07\r\n] 2006.232.08:19:18.36#ibcon#*before write, iclass 3, count 2 2006.232.08:19:18.36#ibcon#enter sib2, iclass 3, count 2 2006.232.08:19:18.36#ibcon#flushed, iclass 3, count 2 2006.232.08:19:18.36#ibcon#about to write, iclass 3, count 2 2006.232.08:19:18.36#ibcon#wrote, iclass 3, count 2 2006.232.08:19:18.36#ibcon#about to read 3, iclass 3, count 2 2006.232.08:19:18.39#ibcon#read 3, iclass 3, count 2 2006.232.08:19:18.39#ibcon#about to read 4, iclass 3, count 2 2006.232.08:19:18.39#ibcon#read 4, iclass 3, count 2 2006.232.08:19:18.39#ibcon#about to read 5, iclass 3, count 2 2006.232.08:19:18.39#ibcon#read 5, iclass 3, count 2 2006.232.08:19:18.39#ibcon#about to read 6, iclass 3, count 2 2006.232.08:19:18.39#ibcon#read 6, iclass 3, count 2 2006.232.08:19:18.39#ibcon#end of sib2, iclass 3, count 2 2006.232.08:19:18.39#ibcon#*after write, iclass 3, count 2 2006.232.08:19:18.39#ibcon#*before return 0, iclass 3, count 2 2006.232.08:19:18.39#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.232.08:19:18.39#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.232.08:19:18.39#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.232.08:19:18.39#ibcon#ireg 7 cls_cnt 0 2006.232.08:19:18.39#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.232.08:19:18.51#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.232.08:19:18.51#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.232.08:19:18.51#ibcon#enter wrdev, iclass 3, count 0 2006.232.08:19:18.51#ibcon#first serial, iclass 3, count 0 2006.232.08:19:18.51#ibcon#enter sib2, iclass 3, count 0 2006.232.08:19:18.51#ibcon#flushed, iclass 3, count 0 2006.232.08:19:18.51#ibcon#about to write, iclass 3, count 0 2006.232.08:19:18.51#ibcon#wrote, iclass 3, count 0 2006.232.08:19:18.51#ibcon#about to read 3, iclass 3, count 0 2006.232.08:19:18.53#ibcon#read 3, iclass 3, count 0 2006.232.08:19:18.53#ibcon#about to read 4, iclass 3, count 0 2006.232.08:19:18.53#ibcon#read 4, iclass 3, count 0 2006.232.08:19:18.53#ibcon#about to read 5, iclass 3, count 0 2006.232.08:19:18.53#ibcon#read 5, iclass 3, count 0 2006.232.08:19:18.53#ibcon#about to read 6, iclass 3, count 0 2006.232.08:19:18.53#ibcon#read 6, iclass 3, count 0 2006.232.08:19:18.53#ibcon#end of sib2, iclass 3, count 0 2006.232.08:19:18.53#ibcon#*mode == 0, iclass 3, count 0 2006.232.08:19:18.53#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.232.08:19:18.53#ibcon#[25=USB\r\n] 2006.232.08:19:18.53#ibcon#*before write, iclass 3, count 0 2006.232.08:19:18.53#ibcon#enter sib2, iclass 3, count 0 2006.232.08:19:18.53#ibcon#flushed, iclass 3, count 0 2006.232.08:19:18.53#ibcon#about to write, iclass 3, count 0 2006.232.08:19:18.53#ibcon#wrote, iclass 3, count 0 2006.232.08:19:18.53#ibcon#about to read 3, iclass 3, count 0 2006.232.08:19:18.56#ibcon#read 3, iclass 3, count 0 2006.232.08:19:18.56#ibcon#about to read 4, iclass 3, count 0 2006.232.08:19:18.56#ibcon#read 4, iclass 3, count 0 2006.232.08:19:18.56#ibcon#about to read 5, iclass 3, count 0 2006.232.08:19:18.56#ibcon#read 5, iclass 3, count 0 2006.232.08:19:18.56#ibcon#about to read 6, iclass 3, count 0 2006.232.08:19:18.56#ibcon#read 6, iclass 3, count 0 2006.232.08:19:18.56#ibcon#end of sib2, iclass 3, count 0 2006.232.08:19:18.56#ibcon#*after write, iclass 3, count 0 2006.232.08:19:18.56#ibcon#*before return 0, iclass 3, count 0 2006.232.08:19:18.56#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.232.08:19:18.56#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.232.08:19:18.56#ibcon#about to clear, iclass 3 cls_cnt 0 2006.232.08:19:18.56#ibcon#cleared, iclass 3 cls_cnt 0 2006.232.08:19:18.56$vc4f8/valo=3,672.99 2006.232.08:19:18.56#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.232.08:19:18.56#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.232.08:19:18.56#ibcon#ireg 17 cls_cnt 0 2006.232.08:19:18.56#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.232.08:19:18.56#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.232.08:19:18.56#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.232.08:19:18.56#ibcon#enter wrdev, iclass 5, count 0 2006.232.08:19:18.56#ibcon#first serial, iclass 5, count 0 2006.232.08:19:18.56#ibcon#enter sib2, iclass 5, count 0 2006.232.08:19:18.56#ibcon#flushed, iclass 5, count 0 2006.232.08:19:18.56#ibcon#about to write, iclass 5, count 0 2006.232.08:19:18.56#ibcon#wrote, iclass 5, count 0 2006.232.08:19:18.56#ibcon#about to read 3, iclass 5, count 0 2006.232.08:19:18.59#ibcon#read 3, iclass 5, count 0 2006.232.08:19:18.59#ibcon#about to read 4, iclass 5, count 0 2006.232.08:19:18.59#ibcon#read 4, iclass 5, count 0 2006.232.08:19:18.59#ibcon#about to read 5, iclass 5, count 0 2006.232.08:19:18.59#ibcon#read 5, iclass 5, count 0 2006.232.08:19:18.59#ibcon#about to read 6, iclass 5, count 0 2006.232.08:19:18.59#ibcon#read 6, iclass 5, count 0 2006.232.08:19:18.59#ibcon#end of sib2, iclass 5, count 0 2006.232.08:19:18.59#ibcon#*mode == 0, iclass 5, count 0 2006.232.08:19:18.59#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.232.08:19:18.59#ibcon#[26=FRQ=03,672.99\r\n] 2006.232.08:19:18.59#ibcon#*before write, iclass 5, count 0 2006.232.08:19:18.59#ibcon#enter sib2, iclass 5, count 0 2006.232.08:19:18.59#ibcon#flushed, iclass 5, count 0 2006.232.08:19:18.59#ibcon#about to write, iclass 5, count 0 2006.232.08:19:18.59#ibcon#wrote, iclass 5, count 0 2006.232.08:19:18.59#ibcon#about to read 3, iclass 5, count 0 2006.232.08:19:18.63#ibcon#read 3, iclass 5, count 0 2006.232.08:19:18.63#ibcon#about to read 4, iclass 5, count 0 2006.232.08:19:18.63#ibcon#read 4, iclass 5, count 0 2006.232.08:19:18.63#ibcon#about to read 5, iclass 5, count 0 2006.232.08:19:18.63#ibcon#read 5, iclass 5, count 0 2006.232.08:19:18.63#ibcon#about to read 6, iclass 5, count 0 2006.232.08:19:18.63#ibcon#read 6, iclass 5, count 0 2006.232.08:19:18.63#ibcon#end of sib2, iclass 5, count 0 2006.232.08:19:18.63#ibcon#*after write, iclass 5, count 0 2006.232.08:19:18.63#ibcon#*before return 0, iclass 5, count 0 2006.232.08:19:18.63#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.232.08:19:18.63#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.232.08:19:18.63#ibcon#about to clear, iclass 5 cls_cnt 0 2006.232.08:19:18.63#ibcon#cleared, iclass 5 cls_cnt 0 2006.232.08:19:18.63$vc4f8/va=3,8 2006.232.08:19:18.63#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.232.08:19:18.63#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.232.08:19:18.63#ibcon#ireg 11 cls_cnt 2 2006.232.08:19:18.63#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.232.08:19:18.68#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.232.08:19:18.68#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.232.08:19:18.69#ibcon#enter wrdev, iclass 7, count 2 2006.232.08:19:18.69#ibcon#first serial, iclass 7, count 2 2006.232.08:19:18.69#ibcon#enter sib2, iclass 7, count 2 2006.232.08:19:18.69#ibcon#flushed, iclass 7, count 2 2006.232.08:19:18.69#ibcon#about to write, iclass 7, count 2 2006.232.08:19:18.69#ibcon#wrote, iclass 7, count 2 2006.232.08:19:18.69#ibcon#about to read 3, iclass 7, count 2 2006.232.08:19:18.70#ibcon#read 3, iclass 7, count 2 2006.232.08:19:18.70#ibcon#about to read 4, iclass 7, count 2 2006.232.08:19:18.70#ibcon#read 4, iclass 7, count 2 2006.232.08:19:18.70#ibcon#about to read 5, iclass 7, count 2 2006.232.08:19:18.70#ibcon#read 5, iclass 7, count 2 2006.232.08:19:18.70#ibcon#about to read 6, iclass 7, count 2 2006.232.08:19:18.70#ibcon#read 6, iclass 7, count 2 2006.232.08:19:18.70#ibcon#end of sib2, iclass 7, count 2 2006.232.08:19:18.70#ibcon#*mode == 0, iclass 7, count 2 2006.232.08:19:18.70#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.232.08:19:18.70#ibcon#[25=AT03-08\r\n] 2006.232.08:19:18.70#ibcon#*before write, iclass 7, count 2 2006.232.08:19:18.70#ibcon#enter sib2, iclass 7, count 2 2006.232.08:19:18.70#ibcon#flushed, iclass 7, count 2 2006.232.08:19:18.70#ibcon#about to write, iclass 7, count 2 2006.232.08:19:18.70#ibcon#wrote, iclass 7, count 2 2006.232.08:19:18.70#ibcon#about to read 3, iclass 7, count 2 2006.232.08:19:18.73#ibcon#read 3, iclass 7, count 2 2006.232.08:19:18.73#ibcon#about to read 4, iclass 7, count 2 2006.232.08:19:18.73#ibcon#read 4, iclass 7, count 2 2006.232.08:19:18.73#ibcon#about to read 5, iclass 7, count 2 2006.232.08:19:18.73#ibcon#read 5, iclass 7, count 2 2006.232.08:19:18.73#ibcon#about to read 6, iclass 7, count 2 2006.232.08:19:18.73#ibcon#read 6, iclass 7, count 2 2006.232.08:19:18.73#ibcon#end of sib2, iclass 7, count 2 2006.232.08:19:18.73#ibcon#*after write, iclass 7, count 2 2006.232.08:19:18.73#ibcon#*before return 0, iclass 7, count 2 2006.232.08:19:18.73#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.232.08:19:18.73#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.232.08:19:18.73#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.232.08:19:18.73#ibcon#ireg 7 cls_cnt 0 2006.232.08:19:18.73#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.232.08:19:18.85#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.232.08:19:18.85#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.232.08:19:18.85#ibcon#enter wrdev, iclass 7, count 0 2006.232.08:19:18.85#ibcon#first serial, iclass 7, count 0 2006.232.08:19:18.85#ibcon#enter sib2, iclass 7, count 0 2006.232.08:19:18.85#ibcon#flushed, iclass 7, count 0 2006.232.08:19:18.85#ibcon#about to write, iclass 7, count 0 2006.232.08:19:18.85#ibcon#wrote, iclass 7, count 0 2006.232.08:19:18.85#ibcon#about to read 3, iclass 7, count 0 2006.232.08:19:18.87#ibcon#read 3, iclass 7, count 0 2006.232.08:19:18.87#ibcon#about to read 4, iclass 7, count 0 2006.232.08:19:18.87#ibcon#read 4, iclass 7, count 0 2006.232.08:19:18.87#ibcon#about to read 5, iclass 7, count 0 2006.232.08:19:18.87#ibcon#read 5, iclass 7, count 0 2006.232.08:19:18.87#ibcon#about to read 6, iclass 7, count 0 2006.232.08:19:18.87#ibcon#read 6, iclass 7, count 0 2006.232.08:19:18.87#ibcon#end of sib2, iclass 7, count 0 2006.232.08:19:18.87#ibcon#*mode == 0, iclass 7, count 0 2006.232.08:19:18.87#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.232.08:19:18.87#ibcon#[25=USB\r\n] 2006.232.08:19:18.87#ibcon#*before write, iclass 7, count 0 2006.232.08:19:18.87#ibcon#enter sib2, iclass 7, count 0 2006.232.08:19:18.87#ibcon#flushed, iclass 7, count 0 2006.232.08:19:18.87#ibcon#about to write, iclass 7, count 0 2006.232.08:19:18.87#ibcon#wrote, iclass 7, count 0 2006.232.08:19:18.87#ibcon#about to read 3, iclass 7, count 0 2006.232.08:19:18.90#ibcon#read 3, iclass 7, count 0 2006.232.08:19:18.90#ibcon#about to read 4, iclass 7, count 0 2006.232.08:19:18.90#ibcon#read 4, iclass 7, count 0 2006.232.08:19:18.90#ibcon#about to read 5, iclass 7, count 0 2006.232.08:19:18.90#ibcon#read 5, iclass 7, count 0 2006.232.08:19:18.90#ibcon#about to read 6, iclass 7, count 0 2006.232.08:19:18.90#ibcon#read 6, iclass 7, count 0 2006.232.08:19:18.90#ibcon#end of sib2, iclass 7, count 0 2006.232.08:19:18.90#ibcon#*after write, iclass 7, count 0 2006.232.08:19:18.90#ibcon#*before return 0, iclass 7, count 0 2006.232.08:19:18.90#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.232.08:19:18.90#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.232.08:19:18.90#ibcon#about to clear, iclass 7 cls_cnt 0 2006.232.08:19:18.90#ibcon#cleared, iclass 7 cls_cnt 0 2006.232.08:19:18.90$vc4f8/valo=4,832.99 2006.232.08:19:18.90#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.232.08:19:18.90#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.232.08:19:18.90#ibcon#ireg 17 cls_cnt 0 2006.232.08:19:18.90#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.232.08:19:18.90#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.232.08:19:18.90#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.232.08:19:18.90#ibcon#enter wrdev, iclass 11, count 0 2006.232.08:19:18.90#ibcon#first serial, iclass 11, count 0 2006.232.08:19:18.90#ibcon#enter sib2, iclass 11, count 0 2006.232.08:19:18.90#ibcon#flushed, iclass 11, count 0 2006.232.08:19:18.90#ibcon#about to write, iclass 11, count 0 2006.232.08:19:18.90#ibcon#wrote, iclass 11, count 0 2006.232.08:19:18.90#ibcon#about to read 3, iclass 11, count 0 2006.232.08:19:18.93#ibcon#read 3, iclass 11, count 0 2006.232.08:19:18.93#ibcon#about to read 4, iclass 11, count 0 2006.232.08:19:18.93#ibcon#read 4, iclass 11, count 0 2006.232.08:19:18.93#ibcon#about to read 5, iclass 11, count 0 2006.232.08:19:18.93#ibcon#read 5, iclass 11, count 0 2006.232.08:19:18.93#ibcon#about to read 6, iclass 11, count 0 2006.232.08:19:18.93#ibcon#read 6, iclass 11, count 0 2006.232.08:19:18.93#ibcon#end of sib2, iclass 11, count 0 2006.232.08:19:18.93#ibcon#*mode == 0, iclass 11, count 0 2006.232.08:19:18.93#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.232.08:19:18.93#ibcon#[26=FRQ=04,832.99\r\n] 2006.232.08:19:18.93#ibcon#*before write, iclass 11, count 0 2006.232.08:19:18.93#ibcon#enter sib2, iclass 11, count 0 2006.232.08:19:18.93#ibcon#flushed, iclass 11, count 0 2006.232.08:19:18.93#ibcon#about to write, iclass 11, count 0 2006.232.08:19:18.93#ibcon#wrote, iclass 11, count 0 2006.232.08:19:18.93#ibcon#about to read 3, iclass 11, count 0 2006.232.08:19:18.96#ibcon#read 3, iclass 11, count 0 2006.232.08:19:18.96#ibcon#about to read 4, iclass 11, count 0 2006.232.08:19:18.96#ibcon#read 4, iclass 11, count 0 2006.232.08:19:18.96#ibcon#about to read 5, iclass 11, count 0 2006.232.08:19:18.96#ibcon#read 5, iclass 11, count 0 2006.232.08:19:18.96#ibcon#about to read 6, iclass 11, count 0 2006.232.08:19:18.96#ibcon#read 6, iclass 11, count 0 2006.232.08:19:18.96#ibcon#end of sib2, iclass 11, count 0 2006.232.08:19:18.96#ibcon#*after write, iclass 11, count 0 2006.232.08:19:18.96#ibcon#*before return 0, iclass 11, count 0 2006.232.08:19:18.96#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.232.08:19:18.96#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.232.08:19:18.96#ibcon#about to clear, iclass 11 cls_cnt 0 2006.232.08:19:18.96#ibcon#cleared, iclass 11 cls_cnt 0 2006.232.08:19:18.96$vc4f8/va=4,7 2006.232.08:19:18.96#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.232.08:19:18.96#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.232.08:19:18.96#ibcon#ireg 11 cls_cnt 2 2006.232.08:19:18.96#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.232.08:19:19.02#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.232.08:19:19.02#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.232.08:19:19.02#ibcon#enter wrdev, iclass 13, count 2 2006.232.08:19:19.02#ibcon#first serial, iclass 13, count 2 2006.232.08:19:19.02#ibcon#enter sib2, iclass 13, count 2 2006.232.08:19:19.02#ibcon#flushed, iclass 13, count 2 2006.232.08:19:19.02#ibcon#about to write, iclass 13, count 2 2006.232.08:19:19.02#ibcon#wrote, iclass 13, count 2 2006.232.08:19:19.02#ibcon#about to read 3, iclass 13, count 2 2006.232.08:19:19.04#ibcon#read 3, iclass 13, count 2 2006.232.08:19:19.04#ibcon#about to read 4, iclass 13, count 2 2006.232.08:19:19.04#ibcon#read 4, iclass 13, count 2 2006.232.08:19:19.04#ibcon#about to read 5, iclass 13, count 2 2006.232.08:19:19.04#ibcon#read 5, iclass 13, count 2 2006.232.08:19:19.04#ibcon#about to read 6, iclass 13, count 2 2006.232.08:19:19.04#ibcon#read 6, iclass 13, count 2 2006.232.08:19:19.04#ibcon#end of sib2, iclass 13, count 2 2006.232.08:19:19.04#ibcon#*mode == 0, iclass 13, count 2 2006.232.08:19:19.04#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.232.08:19:19.04#ibcon#[25=AT04-07\r\n] 2006.232.08:19:19.04#ibcon#*before write, iclass 13, count 2 2006.232.08:19:19.04#ibcon#enter sib2, iclass 13, count 2 2006.232.08:19:19.04#ibcon#flushed, iclass 13, count 2 2006.232.08:19:19.04#ibcon#about to write, iclass 13, count 2 2006.232.08:19:19.04#ibcon#wrote, iclass 13, count 2 2006.232.08:19:19.04#ibcon#about to read 3, iclass 13, count 2 2006.232.08:19:19.07#ibcon#read 3, iclass 13, count 2 2006.232.08:19:19.07#ibcon#about to read 4, iclass 13, count 2 2006.232.08:19:19.07#ibcon#read 4, iclass 13, count 2 2006.232.08:19:19.07#ibcon#about to read 5, iclass 13, count 2 2006.232.08:19:19.07#ibcon#read 5, iclass 13, count 2 2006.232.08:19:19.07#ibcon#about to read 6, iclass 13, count 2 2006.232.08:19:19.07#ibcon#read 6, iclass 13, count 2 2006.232.08:19:19.07#ibcon#end of sib2, iclass 13, count 2 2006.232.08:19:19.07#ibcon#*after write, iclass 13, count 2 2006.232.08:19:19.07#ibcon#*before return 0, iclass 13, count 2 2006.232.08:19:19.07#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.232.08:19:19.07#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.232.08:19:19.07#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.232.08:19:19.07#ibcon#ireg 7 cls_cnt 0 2006.232.08:19:19.07#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.232.08:19:19.19#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.232.08:19:19.19#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.232.08:19:19.19#ibcon#enter wrdev, iclass 13, count 0 2006.232.08:19:19.19#ibcon#first serial, iclass 13, count 0 2006.232.08:19:19.19#ibcon#enter sib2, iclass 13, count 0 2006.232.08:19:19.19#ibcon#flushed, iclass 13, count 0 2006.232.08:19:19.19#ibcon#about to write, iclass 13, count 0 2006.232.08:19:19.19#ibcon#wrote, iclass 13, count 0 2006.232.08:19:19.19#ibcon#about to read 3, iclass 13, count 0 2006.232.08:19:19.21#ibcon#read 3, iclass 13, count 0 2006.232.08:19:19.21#ibcon#about to read 4, iclass 13, count 0 2006.232.08:19:19.21#ibcon#read 4, iclass 13, count 0 2006.232.08:19:19.21#ibcon#about to read 5, iclass 13, count 0 2006.232.08:19:19.21#ibcon#read 5, iclass 13, count 0 2006.232.08:19:19.21#ibcon#about to read 6, iclass 13, count 0 2006.232.08:19:19.21#ibcon#read 6, iclass 13, count 0 2006.232.08:19:19.21#ibcon#end of sib2, iclass 13, count 0 2006.232.08:19:19.21#ibcon#*mode == 0, iclass 13, count 0 2006.232.08:19:19.21#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.232.08:19:19.21#ibcon#[25=USB\r\n] 2006.232.08:19:19.21#ibcon#*before write, iclass 13, count 0 2006.232.08:19:19.21#ibcon#enter sib2, iclass 13, count 0 2006.232.08:19:19.21#ibcon#flushed, iclass 13, count 0 2006.232.08:19:19.21#ibcon#about to write, iclass 13, count 0 2006.232.08:19:19.21#ibcon#wrote, iclass 13, count 0 2006.232.08:19:19.21#ibcon#about to read 3, iclass 13, count 0 2006.232.08:19:19.24#ibcon#read 3, iclass 13, count 0 2006.232.08:19:19.24#ibcon#about to read 4, iclass 13, count 0 2006.232.08:19:19.24#ibcon#read 4, iclass 13, count 0 2006.232.08:19:19.24#ibcon#about to read 5, iclass 13, count 0 2006.232.08:19:19.24#ibcon#read 5, iclass 13, count 0 2006.232.08:19:19.24#ibcon#about to read 6, iclass 13, count 0 2006.232.08:19:19.24#ibcon#read 6, iclass 13, count 0 2006.232.08:19:19.24#ibcon#end of sib2, iclass 13, count 0 2006.232.08:19:19.24#ibcon#*after write, iclass 13, count 0 2006.232.08:19:19.24#ibcon#*before return 0, iclass 13, count 0 2006.232.08:19:19.24#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.232.08:19:19.24#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.232.08:19:19.24#ibcon#about to clear, iclass 13 cls_cnt 0 2006.232.08:19:19.24#ibcon#cleared, iclass 13 cls_cnt 0 2006.232.08:19:19.24$vc4f8/valo=5,652.99 2006.232.08:19:19.24#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.232.08:19:19.24#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.232.08:19:19.24#ibcon#ireg 17 cls_cnt 0 2006.232.08:19:19.24#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.232.08:19:19.24#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.232.08:19:19.24#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.232.08:19:19.24#ibcon#enter wrdev, iclass 15, count 0 2006.232.08:19:19.24#ibcon#first serial, iclass 15, count 0 2006.232.08:19:19.24#ibcon#enter sib2, iclass 15, count 0 2006.232.08:19:19.24#ibcon#flushed, iclass 15, count 0 2006.232.08:19:19.24#ibcon#about to write, iclass 15, count 0 2006.232.08:19:19.24#ibcon#wrote, iclass 15, count 0 2006.232.08:19:19.24#ibcon#about to read 3, iclass 15, count 0 2006.232.08:19:19.26#ibcon#read 3, iclass 15, count 0 2006.232.08:19:19.26#ibcon#about to read 4, iclass 15, count 0 2006.232.08:19:19.26#ibcon#read 4, iclass 15, count 0 2006.232.08:19:19.26#ibcon#about to read 5, iclass 15, count 0 2006.232.08:19:19.26#ibcon#read 5, iclass 15, count 0 2006.232.08:19:19.26#ibcon#about to read 6, iclass 15, count 0 2006.232.08:19:19.26#ibcon#read 6, iclass 15, count 0 2006.232.08:19:19.26#ibcon#end of sib2, iclass 15, count 0 2006.232.08:19:19.26#ibcon#*mode == 0, iclass 15, count 0 2006.232.08:19:19.26#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.232.08:19:19.26#ibcon#[26=FRQ=05,652.99\r\n] 2006.232.08:19:19.26#ibcon#*before write, iclass 15, count 0 2006.232.08:19:19.26#ibcon#enter sib2, iclass 15, count 0 2006.232.08:19:19.26#ibcon#flushed, iclass 15, count 0 2006.232.08:19:19.26#ibcon#about to write, iclass 15, count 0 2006.232.08:19:19.26#ibcon#wrote, iclass 15, count 0 2006.232.08:19:19.26#ibcon#about to read 3, iclass 15, count 0 2006.232.08:19:19.30#ibcon#read 3, iclass 15, count 0 2006.232.08:19:19.30#ibcon#about to read 4, iclass 15, count 0 2006.232.08:19:19.30#ibcon#read 4, iclass 15, count 0 2006.232.08:19:19.30#ibcon#about to read 5, iclass 15, count 0 2006.232.08:19:19.30#ibcon#read 5, iclass 15, count 0 2006.232.08:19:19.30#ibcon#about to read 6, iclass 15, count 0 2006.232.08:19:19.30#ibcon#read 6, iclass 15, count 0 2006.232.08:19:19.30#ibcon#end of sib2, iclass 15, count 0 2006.232.08:19:19.30#ibcon#*after write, iclass 15, count 0 2006.232.08:19:19.30#ibcon#*before return 0, iclass 15, count 0 2006.232.08:19:19.30#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.232.08:19:19.30#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.232.08:19:19.30#ibcon#about to clear, iclass 15 cls_cnt 0 2006.232.08:19:19.30#ibcon#cleared, iclass 15 cls_cnt 0 2006.232.08:19:19.30$vc4f8/va=5,7 2006.232.08:19:19.30#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.232.08:19:19.30#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.232.08:19:19.30#ibcon#ireg 11 cls_cnt 2 2006.232.08:19:19.30#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.232.08:19:19.36#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.232.08:19:19.36#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.232.08:19:19.36#ibcon#enter wrdev, iclass 17, count 2 2006.232.08:19:19.36#ibcon#first serial, iclass 17, count 2 2006.232.08:19:19.36#ibcon#enter sib2, iclass 17, count 2 2006.232.08:19:19.36#ibcon#flushed, iclass 17, count 2 2006.232.08:19:19.36#ibcon#about to write, iclass 17, count 2 2006.232.08:19:19.36#ibcon#wrote, iclass 17, count 2 2006.232.08:19:19.36#ibcon#about to read 3, iclass 17, count 2 2006.232.08:19:19.38#ibcon#read 3, iclass 17, count 2 2006.232.08:19:19.38#ibcon#about to read 4, iclass 17, count 2 2006.232.08:19:19.38#ibcon#read 4, iclass 17, count 2 2006.232.08:19:19.38#ibcon#about to read 5, iclass 17, count 2 2006.232.08:19:19.38#ibcon#read 5, iclass 17, count 2 2006.232.08:19:19.38#ibcon#about to read 6, iclass 17, count 2 2006.232.08:19:19.38#ibcon#read 6, iclass 17, count 2 2006.232.08:19:19.38#ibcon#end of sib2, iclass 17, count 2 2006.232.08:19:19.38#ibcon#*mode == 0, iclass 17, count 2 2006.232.08:19:19.38#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.232.08:19:19.38#ibcon#[25=AT05-07\r\n] 2006.232.08:19:19.38#ibcon#*before write, iclass 17, count 2 2006.232.08:19:19.38#ibcon#enter sib2, iclass 17, count 2 2006.232.08:19:19.38#ibcon#flushed, iclass 17, count 2 2006.232.08:19:19.38#ibcon#about to write, iclass 17, count 2 2006.232.08:19:19.38#ibcon#wrote, iclass 17, count 2 2006.232.08:19:19.38#ibcon#about to read 3, iclass 17, count 2 2006.232.08:19:19.41#ibcon#read 3, iclass 17, count 2 2006.232.08:19:19.41#ibcon#about to read 4, iclass 17, count 2 2006.232.08:19:19.41#ibcon#read 4, iclass 17, count 2 2006.232.08:19:19.41#ibcon#about to read 5, iclass 17, count 2 2006.232.08:19:19.41#ibcon#read 5, iclass 17, count 2 2006.232.08:19:19.41#ibcon#about to read 6, iclass 17, count 2 2006.232.08:19:19.41#ibcon#read 6, iclass 17, count 2 2006.232.08:19:19.41#ibcon#end of sib2, iclass 17, count 2 2006.232.08:19:19.41#ibcon#*after write, iclass 17, count 2 2006.232.08:19:19.41#ibcon#*before return 0, iclass 17, count 2 2006.232.08:19:19.41#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.232.08:19:19.41#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.232.08:19:19.41#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.232.08:19:19.41#ibcon#ireg 7 cls_cnt 0 2006.232.08:19:19.41#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.232.08:19:19.53#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.232.08:19:19.53#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.232.08:19:19.53#ibcon#enter wrdev, iclass 17, count 0 2006.232.08:19:19.53#ibcon#first serial, iclass 17, count 0 2006.232.08:19:19.53#ibcon#enter sib2, iclass 17, count 0 2006.232.08:19:19.53#ibcon#flushed, iclass 17, count 0 2006.232.08:19:19.53#ibcon#about to write, iclass 17, count 0 2006.232.08:19:19.53#ibcon#wrote, iclass 17, count 0 2006.232.08:19:19.53#ibcon#about to read 3, iclass 17, count 0 2006.232.08:19:19.55#ibcon#read 3, iclass 17, count 0 2006.232.08:19:19.55#ibcon#about to read 4, iclass 17, count 0 2006.232.08:19:19.55#ibcon#read 4, iclass 17, count 0 2006.232.08:19:19.55#ibcon#about to read 5, iclass 17, count 0 2006.232.08:19:19.55#ibcon#read 5, iclass 17, count 0 2006.232.08:19:19.55#ibcon#about to read 6, iclass 17, count 0 2006.232.08:19:19.55#ibcon#read 6, iclass 17, count 0 2006.232.08:19:19.55#ibcon#end of sib2, iclass 17, count 0 2006.232.08:19:19.55#ibcon#*mode == 0, iclass 17, count 0 2006.232.08:19:19.55#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.232.08:19:19.55#ibcon#[25=USB\r\n] 2006.232.08:19:19.55#ibcon#*before write, iclass 17, count 0 2006.232.08:19:19.55#ibcon#enter sib2, iclass 17, count 0 2006.232.08:19:19.55#ibcon#flushed, iclass 17, count 0 2006.232.08:19:19.55#ibcon#about to write, iclass 17, count 0 2006.232.08:19:19.55#ibcon#wrote, iclass 17, count 0 2006.232.08:19:19.55#ibcon#about to read 3, iclass 17, count 0 2006.232.08:19:19.58#ibcon#read 3, iclass 17, count 0 2006.232.08:19:19.58#ibcon#about to read 4, iclass 17, count 0 2006.232.08:19:19.58#ibcon#read 4, iclass 17, count 0 2006.232.08:19:19.58#ibcon#about to read 5, iclass 17, count 0 2006.232.08:19:19.58#ibcon#read 5, iclass 17, count 0 2006.232.08:19:19.58#ibcon#about to read 6, iclass 17, count 0 2006.232.08:19:19.58#ibcon#read 6, iclass 17, count 0 2006.232.08:19:19.58#ibcon#end of sib2, iclass 17, count 0 2006.232.08:19:19.58#ibcon#*after write, iclass 17, count 0 2006.232.08:19:19.58#ibcon#*before return 0, iclass 17, count 0 2006.232.08:19:19.58#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.232.08:19:19.58#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.232.08:19:19.58#ibcon#about to clear, iclass 17 cls_cnt 0 2006.232.08:19:19.58#ibcon#cleared, iclass 17 cls_cnt 0 2006.232.08:19:19.58$vc4f8/valo=6,772.99 2006.232.08:19:19.58#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.232.08:19:19.58#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.232.08:19:19.58#ibcon#ireg 17 cls_cnt 0 2006.232.08:19:19.58#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.232.08:19:19.58#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.232.08:19:19.58#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.232.08:19:19.58#ibcon#enter wrdev, iclass 19, count 0 2006.232.08:19:19.58#ibcon#first serial, iclass 19, count 0 2006.232.08:19:19.58#ibcon#enter sib2, iclass 19, count 0 2006.232.08:19:19.58#ibcon#flushed, iclass 19, count 0 2006.232.08:19:19.58#ibcon#about to write, iclass 19, count 0 2006.232.08:19:19.58#ibcon#wrote, iclass 19, count 0 2006.232.08:19:19.58#ibcon#about to read 3, iclass 19, count 0 2006.232.08:19:19.60#ibcon#read 3, iclass 19, count 0 2006.232.08:19:19.61#ibcon#about to read 4, iclass 19, count 0 2006.232.08:19:19.61#ibcon#read 4, iclass 19, count 0 2006.232.08:19:19.61#ibcon#about to read 5, iclass 19, count 0 2006.232.08:19:19.61#ibcon#read 5, iclass 19, count 0 2006.232.08:19:19.61#ibcon#about to read 6, iclass 19, count 0 2006.232.08:19:19.61#ibcon#read 6, iclass 19, count 0 2006.232.08:19:19.61#ibcon#end of sib2, iclass 19, count 0 2006.232.08:19:19.61#ibcon#*mode == 0, iclass 19, count 0 2006.232.08:19:19.61#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.232.08:19:19.61#ibcon#[26=FRQ=06,772.99\r\n] 2006.232.08:19:19.61#ibcon#*before write, iclass 19, count 0 2006.232.08:19:19.61#ibcon#enter sib2, iclass 19, count 0 2006.232.08:19:19.61#ibcon#flushed, iclass 19, count 0 2006.232.08:19:19.61#ibcon#about to write, iclass 19, count 0 2006.232.08:19:19.61#ibcon#wrote, iclass 19, count 0 2006.232.08:19:19.61#ibcon#about to read 3, iclass 19, count 0 2006.232.08:19:19.65#ibcon#read 3, iclass 19, count 0 2006.232.08:19:19.65#ibcon#about to read 4, iclass 19, count 0 2006.232.08:19:19.65#ibcon#read 4, iclass 19, count 0 2006.232.08:19:19.65#ibcon#about to read 5, iclass 19, count 0 2006.232.08:19:19.65#ibcon#read 5, iclass 19, count 0 2006.232.08:19:19.65#ibcon#about to read 6, iclass 19, count 0 2006.232.08:19:19.65#ibcon#read 6, iclass 19, count 0 2006.232.08:19:19.65#ibcon#end of sib2, iclass 19, count 0 2006.232.08:19:19.65#ibcon#*after write, iclass 19, count 0 2006.232.08:19:19.65#ibcon#*before return 0, iclass 19, count 0 2006.232.08:19:19.65#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.232.08:19:19.65#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.232.08:19:19.65#ibcon#about to clear, iclass 19 cls_cnt 0 2006.232.08:19:19.65#ibcon#cleared, iclass 19 cls_cnt 0 2006.232.08:19:19.65$vc4f8/va=6,6 2006.232.08:19:19.65#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.232.08:19:19.65#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.232.08:19:19.65#ibcon#ireg 11 cls_cnt 2 2006.232.08:19:19.65#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.232.08:19:19.69#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.232.08:19:19.69#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.232.08:19:19.69#ibcon#enter wrdev, iclass 21, count 2 2006.232.08:19:19.69#ibcon#first serial, iclass 21, count 2 2006.232.08:19:19.69#ibcon#enter sib2, iclass 21, count 2 2006.232.08:19:19.69#ibcon#flushed, iclass 21, count 2 2006.232.08:19:19.69#ibcon#about to write, iclass 21, count 2 2006.232.08:19:19.69#ibcon#wrote, iclass 21, count 2 2006.232.08:19:19.69#ibcon#about to read 3, iclass 21, count 2 2006.232.08:19:19.71#ibcon#read 3, iclass 21, count 2 2006.232.08:19:19.71#ibcon#about to read 4, iclass 21, count 2 2006.232.08:19:19.71#ibcon#read 4, iclass 21, count 2 2006.232.08:19:19.71#ibcon#about to read 5, iclass 21, count 2 2006.232.08:19:19.71#ibcon#read 5, iclass 21, count 2 2006.232.08:19:19.71#ibcon#about to read 6, iclass 21, count 2 2006.232.08:19:19.71#ibcon#read 6, iclass 21, count 2 2006.232.08:19:19.71#ibcon#end of sib2, iclass 21, count 2 2006.232.08:19:19.71#ibcon#*mode == 0, iclass 21, count 2 2006.232.08:19:19.71#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.232.08:19:19.71#ibcon#[25=AT06-06\r\n] 2006.232.08:19:19.71#ibcon#*before write, iclass 21, count 2 2006.232.08:19:19.71#ibcon#enter sib2, iclass 21, count 2 2006.232.08:19:19.71#ibcon#flushed, iclass 21, count 2 2006.232.08:19:19.71#ibcon#about to write, iclass 21, count 2 2006.232.08:19:19.71#ibcon#wrote, iclass 21, count 2 2006.232.08:19:19.71#ibcon#about to read 3, iclass 21, count 2 2006.232.08:19:19.74#ibcon#read 3, iclass 21, count 2 2006.232.08:19:19.74#ibcon#about to read 4, iclass 21, count 2 2006.232.08:19:19.74#ibcon#read 4, iclass 21, count 2 2006.232.08:19:19.74#ibcon#about to read 5, iclass 21, count 2 2006.232.08:19:19.74#ibcon#read 5, iclass 21, count 2 2006.232.08:19:19.74#ibcon#about to read 6, iclass 21, count 2 2006.232.08:19:19.74#ibcon#read 6, iclass 21, count 2 2006.232.08:19:19.74#ibcon#end of sib2, iclass 21, count 2 2006.232.08:19:19.74#ibcon#*after write, iclass 21, count 2 2006.232.08:19:19.74#ibcon#*before return 0, iclass 21, count 2 2006.232.08:19:19.74#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.232.08:19:19.74#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.232.08:19:19.74#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.232.08:19:19.74#ibcon#ireg 7 cls_cnt 0 2006.232.08:19:19.74#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.232.08:19:19.86#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.232.08:19:19.86#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.232.08:19:19.86#ibcon#enter wrdev, iclass 21, count 0 2006.232.08:19:19.86#ibcon#first serial, iclass 21, count 0 2006.232.08:19:19.86#ibcon#enter sib2, iclass 21, count 0 2006.232.08:19:19.86#ibcon#flushed, iclass 21, count 0 2006.232.08:19:19.86#ibcon#about to write, iclass 21, count 0 2006.232.08:19:19.86#ibcon#wrote, iclass 21, count 0 2006.232.08:19:19.86#ibcon#about to read 3, iclass 21, count 0 2006.232.08:19:19.88#ibcon#read 3, iclass 21, count 0 2006.232.08:19:19.88#ibcon#about to read 4, iclass 21, count 0 2006.232.08:19:19.88#ibcon#read 4, iclass 21, count 0 2006.232.08:19:19.88#ibcon#about to read 5, iclass 21, count 0 2006.232.08:19:19.88#ibcon#read 5, iclass 21, count 0 2006.232.08:19:19.88#ibcon#about to read 6, iclass 21, count 0 2006.232.08:19:19.88#ibcon#read 6, iclass 21, count 0 2006.232.08:19:19.88#ibcon#end of sib2, iclass 21, count 0 2006.232.08:19:19.88#ibcon#*mode == 0, iclass 21, count 0 2006.232.08:19:19.88#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.232.08:19:19.88#ibcon#[25=USB\r\n] 2006.232.08:19:19.88#ibcon#*before write, iclass 21, count 0 2006.232.08:19:19.88#ibcon#enter sib2, iclass 21, count 0 2006.232.08:19:19.88#ibcon#flushed, iclass 21, count 0 2006.232.08:19:19.88#ibcon#about to write, iclass 21, count 0 2006.232.08:19:19.88#ibcon#wrote, iclass 21, count 0 2006.232.08:19:19.88#ibcon#about to read 3, iclass 21, count 0 2006.232.08:19:19.91#ibcon#read 3, iclass 21, count 0 2006.232.08:19:19.91#ibcon#about to read 4, iclass 21, count 0 2006.232.08:19:19.91#ibcon#read 4, iclass 21, count 0 2006.232.08:19:19.91#ibcon#about to read 5, iclass 21, count 0 2006.232.08:19:19.91#ibcon#read 5, iclass 21, count 0 2006.232.08:19:19.91#ibcon#about to read 6, iclass 21, count 0 2006.232.08:19:19.91#ibcon#read 6, iclass 21, count 0 2006.232.08:19:19.91#ibcon#end of sib2, iclass 21, count 0 2006.232.08:19:19.91#ibcon#*after write, iclass 21, count 0 2006.232.08:19:19.91#ibcon#*before return 0, iclass 21, count 0 2006.232.08:19:19.91#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.232.08:19:19.91#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.232.08:19:19.91#ibcon#about to clear, iclass 21 cls_cnt 0 2006.232.08:19:19.91#ibcon#cleared, iclass 21 cls_cnt 0 2006.232.08:19:19.91$vc4f8/valo=7,832.99 2006.232.08:19:19.91#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.232.08:19:19.91#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.232.08:19:19.91#ibcon#ireg 17 cls_cnt 0 2006.232.08:19:19.91#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.232.08:19:19.91#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.232.08:19:19.91#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.232.08:19:19.91#ibcon#enter wrdev, iclass 23, count 0 2006.232.08:19:19.91#ibcon#first serial, iclass 23, count 0 2006.232.08:19:19.91#ibcon#enter sib2, iclass 23, count 0 2006.232.08:19:19.91#ibcon#flushed, iclass 23, count 0 2006.232.08:19:19.91#ibcon#about to write, iclass 23, count 0 2006.232.08:19:19.91#ibcon#wrote, iclass 23, count 0 2006.232.08:19:19.91#ibcon#about to read 3, iclass 23, count 0 2006.232.08:19:19.93#ibcon#read 3, iclass 23, count 0 2006.232.08:19:19.93#ibcon#about to read 4, iclass 23, count 0 2006.232.08:19:19.93#ibcon#read 4, iclass 23, count 0 2006.232.08:19:19.93#ibcon#about to read 5, iclass 23, count 0 2006.232.08:19:19.93#ibcon#read 5, iclass 23, count 0 2006.232.08:19:19.93#ibcon#about to read 6, iclass 23, count 0 2006.232.08:19:19.93#ibcon#read 6, iclass 23, count 0 2006.232.08:19:19.93#ibcon#end of sib2, iclass 23, count 0 2006.232.08:19:19.93#ibcon#*mode == 0, iclass 23, count 0 2006.232.08:19:19.93#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.232.08:19:19.93#ibcon#[26=FRQ=07,832.99\r\n] 2006.232.08:19:19.93#ibcon#*before write, iclass 23, count 0 2006.232.08:19:19.93#ibcon#enter sib2, iclass 23, count 0 2006.232.08:19:19.93#ibcon#flushed, iclass 23, count 0 2006.232.08:19:19.93#ibcon#about to write, iclass 23, count 0 2006.232.08:19:19.93#ibcon#wrote, iclass 23, count 0 2006.232.08:19:19.93#ibcon#about to read 3, iclass 23, count 0 2006.232.08:19:19.97#ibcon#read 3, iclass 23, count 0 2006.232.08:19:19.97#ibcon#about to read 4, iclass 23, count 0 2006.232.08:19:19.97#ibcon#read 4, iclass 23, count 0 2006.232.08:19:19.97#ibcon#about to read 5, iclass 23, count 0 2006.232.08:19:19.97#ibcon#read 5, iclass 23, count 0 2006.232.08:19:19.97#ibcon#about to read 6, iclass 23, count 0 2006.232.08:19:19.97#ibcon#read 6, iclass 23, count 0 2006.232.08:19:19.97#ibcon#end of sib2, iclass 23, count 0 2006.232.08:19:19.97#ibcon#*after write, iclass 23, count 0 2006.232.08:19:19.97#ibcon#*before return 0, iclass 23, count 0 2006.232.08:19:19.97#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.232.08:19:19.97#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.232.08:19:19.97#ibcon#about to clear, iclass 23 cls_cnt 0 2006.232.08:19:19.97#ibcon#cleared, iclass 23 cls_cnt 0 2006.232.08:19:19.97$vc4f8/va=7,6 2006.232.08:19:19.97#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.232.08:19:19.97#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.232.08:19:19.97#ibcon#ireg 11 cls_cnt 2 2006.232.08:19:19.97#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.232.08:19:20.03#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.232.08:19:20.03#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.232.08:19:20.03#ibcon#enter wrdev, iclass 25, count 2 2006.232.08:19:20.03#ibcon#first serial, iclass 25, count 2 2006.232.08:19:20.03#ibcon#enter sib2, iclass 25, count 2 2006.232.08:19:20.03#ibcon#flushed, iclass 25, count 2 2006.232.08:19:20.03#ibcon#about to write, iclass 25, count 2 2006.232.08:19:20.03#ibcon#wrote, iclass 25, count 2 2006.232.08:19:20.03#ibcon#about to read 3, iclass 25, count 2 2006.232.08:19:20.05#ibcon#read 3, iclass 25, count 2 2006.232.08:19:20.05#ibcon#about to read 4, iclass 25, count 2 2006.232.08:19:20.05#ibcon#read 4, iclass 25, count 2 2006.232.08:19:20.05#ibcon#about to read 5, iclass 25, count 2 2006.232.08:19:20.05#ibcon#read 5, iclass 25, count 2 2006.232.08:19:20.05#ibcon#about to read 6, iclass 25, count 2 2006.232.08:19:20.05#ibcon#read 6, iclass 25, count 2 2006.232.08:19:20.05#ibcon#end of sib2, iclass 25, count 2 2006.232.08:19:20.05#ibcon#*mode == 0, iclass 25, count 2 2006.232.08:19:20.05#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.232.08:19:20.05#ibcon#[25=AT07-06\r\n] 2006.232.08:19:20.05#ibcon#*before write, iclass 25, count 2 2006.232.08:19:20.05#ibcon#enter sib2, iclass 25, count 2 2006.232.08:19:20.05#ibcon#flushed, iclass 25, count 2 2006.232.08:19:20.05#ibcon#about to write, iclass 25, count 2 2006.232.08:19:20.05#ibcon#wrote, iclass 25, count 2 2006.232.08:19:20.05#ibcon#about to read 3, iclass 25, count 2 2006.232.08:19:20.08#ibcon#read 3, iclass 25, count 2 2006.232.08:19:20.08#ibcon#about to read 4, iclass 25, count 2 2006.232.08:19:20.08#ibcon#read 4, iclass 25, count 2 2006.232.08:19:20.08#ibcon#about to read 5, iclass 25, count 2 2006.232.08:19:20.08#ibcon#read 5, iclass 25, count 2 2006.232.08:19:20.08#ibcon#about to read 6, iclass 25, count 2 2006.232.08:19:20.08#ibcon#read 6, iclass 25, count 2 2006.232.08:19:20.08#ibcon#end of sib2, iclass 25, count 2 2006.232.08:19:20.08#ibcon#*after write, iclass 25, count 2 2006.232.08:19:20.08#ibcon#*before return 0, iclass 25, count 2 2006.232.08:19:20.08#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.232.08:19:20.08#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.232.08:19:20.08#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.232.08:19:20.08#ibcon#ireg 7 cls_cnt 0 2006.232.08:19:20.08#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.232.08:19:20.20#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.232.08:19:20.20#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.232.08:19:20.20#ibcon#enter wrdev, iclass 25, count 0 2006.232.08:19:20.20#ibcon#first serial, iclass 25, count 0 2006.232.08:19:20.20#ibcon#enter sib2, iclass 25, count 0 2006.232.08:19:20.20#ibcon#flushed, iclass 25, count 0 2006.232.08:19:20.20#ibcon#about to write, iclass 25, count 0 2006.232.08:19:20.20#ibcon#wrote, iclass 25, count 0 2006.232.08:19:20.20#ibcon#about to read 3, iclass 25, count 0 2006.232.08:19:20.22#ibcon#read 3, iclass 25, count 0 2006.232.08:19:20.22#ibcon#about to read 4, iclass 25, count 0 2006.232.08:19:20.22#ibcon#read 4, iclass 25, count 0 2006.232.08:19:20.22#ibcon#about to read 5, iclass 25, count 0 2006.232.08:19:20.22#ibcon#read 5, iclass 25, count 0 2006.232.08:19:20.22#ibcon#about to read 6, iclass 25, count 0 2006.232.08:19:20.22#ibcon#read 6, iclass 25, count 0 2006.232.08:19:20.22#ibcon#end of sib2, iclass 25, count 0 2006.232.08:19:20.22#ibcon#*mode == 0, iclass 25, count 0 2006.232.08:19:20.22#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.232.08:19:20.22#ibcon#[25=USB\r\n] 2006.232.08:19:20.22#ibcon#*before write, iclass 25, count 0 2006.232.08:19:20.22#ibcon#enter sib2, iclass 25, count 0 2006.232.08:19:20.22#ibcon#flushed, iclass 25, count 0 2006.232.08:19:20.22#ibcon#about to write, iclass 25, count 0 2006.232.08:19:20.22#ibcon#wrote, iclass 25, count 0 2006.232.08:19:20.22#ibcon#about to read 3, iclass 25, count 0 2006.232.08:19:20.25#ibcon#read 3, iclass 25, count 0 2006.232.08:19:20.25#ibcon#about to read 4, iclass 25, count 0 2006.232.08:19:20.25#ibcon#read 4, iclass 25, count 0 2006.232.08:19:20.25#ibcon#about to read 5, iclass 25, count 0 2006.232.08:19:20.25#ibcon#read 5, iclass 25, count 0 2006.232.08:19:20.25#ibcon#about to read 6, iclass 25, count 0 2006.232.08:19:20.25#ibcon#read 6, iclass 25, count 0 2006.232.08:19:20.25#ibcon#end of sib2, iclass 25, count 0 2006.232.08:19:20.25#ibcon#*after write, iclass 25, count 0 2006.232.08:19:20.25#ibcon#*before return 0, iclass 25, count 0 2006.232.08:19:20.25#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.232.08:19:20.25#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.232.08:19:20.25#ibcon#about to clear, iclass 25 cls_cnt 0 2006.232.08:19:20.25#ibcon#cleared, iclass 25 cls_cnt 0 2006.232.08:19:20.25$vc4f8/valo=8,852.99 2006.232.08:19:20.25#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.232.08:19:20.25#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.232.08:19:20.25#ibcon#ireg 17 cls_cnt 0 2006.232.08:19:20.25#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.232.08:19:20.25#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.232.08:19:20.25#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.232.08:19:20.25#ibcon#enter wrdev, iclass 27, count 0 2006.232.08:19:20.25#ibcon#first serial, iclass 27, count 0 2006.232.08:19:20.25#ibcon#enter sib2, iclass 27, count 0 2006.232.08:19:20.25#ibcon#flushed, iclass 27, count 0 2006.232.08:19:20.25#ibcon#about to write, iclass 27, count 0 2006.232.08:19:20.25#ibcon#wrote, iclass 27, count 0 2006.232.08:19:20.25#ibcon#about to read 3, iclass 27, count 0 2006.232.08:19:20.27#ibcon#read 3, iclass 27, count 0 2006.232.08:19:20.27#ibcon#about to read 4, iclass 27, count 0 2006.232.08:19:20.27#ibcon#read 4, iclass 27, count 0 2006.232.08:19:20.27#ibcon#about to read 5, iclass 27, count 0 2006.232.08:19:20.27#ibcon#read 5, iclass 27, count 0 2006.232.08:19:20.27#ibcon#about to read 6, iclass 27, count 0 2006.232.08:19:20.27#ibcon#read 6, iclass 27, count 0 2006.232.08:19:20.27#ibcon#end of sib2, iclass 27, count 0 2006.232.08:19:20.27#ibcon#*mode == 0, iclass 27, count 0 2006.232.08:19:20.27#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.232.08:19:20.27#ibcon#[26=FRQ=08,852.99\r\n] 2006.232.08:19:20.27#ibcon#*before write, iclass 27, count 0 2006.232.08:19:20.27#ibcon#enter sib2, iclass 27, count 0 2006.232.08:19:20.27#ibcon#flushed, iclass 27, count 0 2006.232.08:19:20.27#ibcon#about to write, iclass 27, count 0 2006.232.08:19:20.27#ibcon#wrote, iclass 27, count 0 2006.232.08:19:20.27#ibcon#about to read 3, iclass 27, count 0 2006.232.08:19:20.31#ibcon#read 3, iclass 27, count 0 2006.232.08:19:20.31#ibcon#about to read 4, iclass 27, count 0 2006.232.08:19:20.31#ibcon#read 4, iclass 27, count 0 2006.232.08:19:20.31#ibcon#about to read 5, iclass 27, count 0 2006.232.08:19:20.31#ibcon#read 5, iclass 27, count 0 2006.232.08:19:20.31#ibcon#about to read 6, iclass 27, count 0 2006.232.08:19:20.31#ibcon#read 6, iclass 27, count 0 2006.232.08:19:20.31#ibcon#end of sib2, iclass 27, count 0 2006.232.08:19:20.31#ibcon#*after write, iclass 27, count 0 2006.232.08:19:20.31#ibcon#*before return 0, iclass 27, count 0 2006.232.08:19:20.31#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.232.08:19:20.31#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.232.08:19:20.31#ibcon#about to clear, iclass 27 cls_cnt 0 2006.232.08:19:20.31#ibcon#cleared, iclass 27 cls_cnt 0 2006.232.08:19:20.31$vc4f8/va=8,6 2006.232.08:19:20.31#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.232.08:19:20.31#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.232.08:19:20.31#ibcon#ireg 11 cls_cnt 2 2006.232.08:19:20.31#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.232.08:19:20.37#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.232.08:19:20.37#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.232.08:19:20.37#ibcon#enter wrdev, iclass 29, count 2 2006.232.08:19:20.37#ibcon#first serial, iclass 29, count 2 2006.232.08:19:20.37#ibcon#enter sib2, iclass 29, count 2 2006.232.08:19:20.37#ibcon#flushed, iclass 29, count 2 2006.232.08:19:20.37#ibcon#about to write, iclass 29, count 2 2006.232.08:19:20.37#ibcon#wrote, iclass 29, count 2 2006.232.08:19:20.37#ibcon#about to read 3, iclass 29, count 2 2006.232.08:19:20.39#ibcon#read 3, iclass 29, count 2 2006.232.08:19:20.39#ibcon#about to read 4, iclass 29, count 2 2006.232.08:19:20.39#ibcon#read 4, iclass 29, count 2 2006.232.08:19:20.39#ibcon#about to read 5, iclass 29, count 2 2006.232.08:19:20.39#ibcon#read 5, iclass 29, count 2 2006.232.08:19:20.39#ibcon#about to read 6, iclass 29, count 2 2006.232.08:19:20.39#ibcon#read 6, iclass 29, count 2 2006.232.08:19:20.39#ibcon#end of sib2, iclass 29, count 2 2006.232.08:19:20.39#ibcon#*mode == 0, iclass 29, count 2 2006.232.08:19:20.39#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.232.08:19:20.39#ibcon#[25=AT08-06\r\n] 2006.232.08:19:20.39#ibcon#*before write, iclass 29, count 2 2006.232.08:19:20.39#ibcon#enter sib2, iclass 29, count 2 2006.232.08:19:20.39#ibcon#flushed, iclass 29, count 2 2006.232.08:19:20.39#ibcon#about to write, iclass 29, count 2 2006.232.08:19:20.39#ibcon#wrote, iclass 29, count 2 2006.232.08:19:20.39#ibcon#about to read 3, iclass 29, count 2 2006.232.08:19:20.42#ibcon#read 3, iclass 29, count 2 2006.232.08:19:20.42#ibcon#about to read 4, iclass 29, count 2 2006.232.08:19:20.42#ibcon#read 4, iclass 29, count 2 2006.232.08:19:20.42#ibcon#about to read 5, iclass 29, count 2 2006.232.08:19:20.42#ibcon#read 5, iclass 29, count 2 2006.232.08:19:20.42#ibcon#about to read 6, iclass 29, count 2 2006.232.08:19:20.42#ibcon#read 6, iclass 29, count 2 2006.232.08:19:20.42#ibcon#end of sib2, iclass 29, count 2 2006.232.08:19:20.42#ibcon#*after write, iclass 29, count 2 2006.232.08:19:20.42#ibcon#*before return 0, iclass 29, count 2 2006.232.08:19:20.42#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.232.08:19:20.42#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.232.08:19:20.42#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.232.08:19:20.42#ibcon#ireg 7 cls_cnt 0 2006.232.08:19:20.42#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.232.08:19:20.54#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.232.08:19:20.54#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.232.08:19:20.54#ibcon#enter wrdev, iclass 29, count 0 2006.232.08:19:20.54#ibcon#first serial, iclass 29, count 0 2006.232.08:19:20.54#ibcon#enter sib2, iclass 29, count 0 2006.232.08:19:20.54#ibcon#flushed, iclass 29, count 0 2006.232.08:19:20.54#ibcon#about to write, iclass 29, count 0 2006.232.08:19:20.54#ibcon#wrote, iclass 29, count 0 2006.232.08:19:20.54#ibcon#about to read 3, iclass 29, count 0 2006.232.08:19:20.56#ibcon#read 3, iclass 29, count 0 2006.232.08:19:20.56#ibcon#about to read 4, iclass 29, count 0 2006.232.08:19:20.56#ibcon#read 4, iclass 29, count 0 2006.232.08:19:20.56#ibcon#about to read 5, iclass 29, count 0 2006.232.08:19:20.56#ibcon#read 5, iclass 29, count 0 2006.232.08:19:20.56#ibcon#about to read 6, iclass 29, count 0 2006.232.08:19:20.56#ibcon#read 6, iclass 29, count 0 2006.232.08:19:20.56#ibcon#end of sib2, iclass 29, count 0 2006.232.08:19:20.56#ibcon#*mode == 0, iclass 29, count 0 2006.232.08:19:20.56#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.232.08:19:20.56#ibcon#[25=USB\r\n] 2006.232.08:19:20.56#ibcon#*before write, iclass 29, count 0 2006.232.08:19:20.56#ibcon#enter sib2, iclass 29, count 0 2006.232.08:19:20.56#ibcon#flushed, iclass 29, count 0 2006.232.08:19:20.56#ibcon#about to write, iclass 29, count 0 2006.232.08:19:20.56#ibcon#wrote, iclass 29, count 0 2006.232.08:19:20.56#ibcon#about to read 3, iclass 29, count 0 2006.232.08:19:20.59#ibcon#read 3, iclass 29, count 0 2006.232.08:19:20.59#ibcon#about to read 4, iclass 29, count 0 2006.232.08:19:20.59#ibcon#read 4, iclass 29, count 0 2006.232.08:19:20.59#ibcon#about to read 5, iclass 29, count 0 2006.232.08:19:20.59#ibcon#read 5, iclass 29, count 0 2006.232.08:19:20.59#ibcon#about to read 6, iclass 29, count 0 2006.232.08:19:20.59#ibcon#read 6, iclass 29, count 0 2006.232.08:19:20.59#ibcon#end of sib2, iclass 29, count 0 2006.232.08:19:20.59#ibcon#*after write, iclass 29, count 0 2006.232.08:19:20.59#ibcon#*before return 0, iclass 29, count 0 2006.232.08:19:20.59#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.232.08:19:20.59#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.232.08:19:20.59#ibcon#about to clear, iclass 29 cls_cnt 0 2006.232.08:19:20.59#ibcon#cleared, iclass 29 cls_cnt 0 2006.232.08:19:20.59$vc4f8/vblo=1,632.99 2006.232.08:19:20.59#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.232.08:19:20.59#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.232.08:19:20.59#ibcon#ireg 17 cls_cnt 0 2006.232.08:19:20.59#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.232.08:19:20.59#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.232.08:19:20.59#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.232.08:19:20.59#ibcon#enter wrdev, iclass 31, count 0 2006.232.08:19:20.59#ibcon#first serial, iclass 31, count 0 2006.232.08:19:20.59#ibcon#enter sib2, iclass 31, count 0 2006.232.08:19:20.59#ibcon#flushed, iclass 31, count 0 2006.232.08:19:20.59#ibcon#about to write, iclass 31, count 0 2006.232.08:19:20.59#ibcon#wrote, iclass 31, count 0 2006.232.08:19:20.59#ibcon#about to read 3, iclass 31, count 0 2006.232.08:19:20.62#ibcon#read 3, iclass 31, count 0 2006.232.08:19:20.62#ibcon#about to read 4, iclass 31, count 0 2006.232.08:19:20.62#ibcon#read 4, iclass 31, count 0 2006.232.08:19:20.62#ibcon#about to read 5, iclass 31, count 0 2006.232.08:19:20.62#ibcon#read 5, iclass 31, count 0 2006.232.08:19:20.62#ibcon#about to read 6, iclass 31, count 0 2006.232.08:19:20.62#ibcon#read 6, iclass 31, count 0 2006.232.08:19:20.62#ibcon#end of sib2, iclass 31, count 0 2006.232.08:19:20.62#ibcon#*mode == 0, iclass 31, count 0 2006.232.08:19:20.62#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.232.08:19:20.62#ibcon#[28=FRQ=01,632.99\r\n] 2006.232.08:19:20.62#ibcon#*before write, iclass 31, count 0 2006.232.08:19:20.62#ibcon#enter sib2, iclass 31, count 0 2006.232.08:19:20.62#ibcon#flushed, iclass 31, count 0 2006.232.08:19:20.62#ibcon#about to write, iclass 31, count 0 2006.232.08:19:20.62#ibcon#wrote, iclass 31, count 0 2006.232.08:19:20.62#ibcon#about to read 3, iclass 31, count 0 2006.232.08:19:20.66#ibcon#read 3, iclass 31, count 0 2006.232.08:19:20.66#ibcon#about to read 4, iclass 31, count 0 2006.232.08:19:20.66#ibcon#read 4, iclass 31, count 0 2006.232.08:19:20.66#ibcon#about to read 5, iclass 31, count 0 2006.232.08:19:20.66#ibcon#read 5, iclass 31, count 0 2006.232.08:19:20.66#ibcon#about to read 6, iclass 31, count 0 2006.232.08:19:20.66#ibcon#read 6, iclass 31, count 0 2006.232.08:19:20.66#ibcon#end of sib2, iclass 31, count 0 2006.232.08:19:20.66#ibcon#*after write, iclass 31, count 0 2006.232.08:19:20.66#ibcon#*before return 0, iclass 31, count 0 2006.232.08:19:20.66#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.232.08:19:20.66#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.232.08:19:20.66#ibcon#about to clear, iclass 31 cls_cnt 0 2006.232.08:19:20.66#ibcon#cleared, iclass 31 cls_cnt 0 2006.232.08:19:20.66$vc4f8/vb=1,4 2006.232.08:19:20.66#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.232.08:19:20.66#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.232.08:19:20.66#ibcon#ireg 11 cls_cnt 2 2006.232.08:19:20.66#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.232.08:19:20.66#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.232.08:19:20.66#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.232.08:19:20.66#ibcon#enter wrdev, iclass 33, count 2 2006.232.08:19:20.66#ibcon#first serial, iclass 33, count 2 2006.232.08:19:20.66#ibcon#enter sib2, iclass 33, count 2 2006.232.08:19:20.66#ibcon#flushed, iclass 33, count 2 2006.232.08:19:20.66#ibcon#about to write, iclass 33, count 2 2006.232.08:19:20.66#ibcon#wrote, iclass 33, count 2 2006.232.08:19:20.66#ibcon#about to read 3, iclass 33, count 2 2006.232.08:19:20.68#ibcon#read 3, iclass 33, count 2 2006.232.08:19:20.68#ibcon#about to read 4, iclass 33, count 2 2006.232.08:19:20.68#ibcon#read 4, iclass 33, count 2 2006.232.08:19:20.68#ibcon#about to read 5, iclass 33, count 2 2006.232.08:19:20.68#ibcon#read 5, iclass 33, count 2 2006.232.08:19:20.68#ibcon#about to read 6, iclass 33, count 2 2006.232.08:19:20.68#ibcon#read 6, iclass 33, count 2 2006.232.08:19:20.68#ibcon#end of sib2, iclass 33, count 2 2006.232.08:19:20.68#ibcon#*mode == 0, iclass 33, count 2 2006.232.08:19:20.68#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.232.08:19:20.68#ibcon#[27=AT01-04\r\n] 2006.232.08:19:20.68#ibcon#*before write, iclass 33, count 2 2006.232.08:19:20.68#ibcon#enter sib2, iclass 33, count 2 2006.232.08:19:20.68#ibcon#flushed, iclass 33, count 2 2006.232.08:19:20.68#ibcon#about to write, iclass 33, count 2 2006.232.08:19:20.68#ibcon#wrote, iclass 33, count 2 2006.232.08:19:20.68#ibcon#about to read 3, iclass 33, count 2 2006.232.08:19:20.71#ibcon#read 3, iclass 33, count 2 2006.232.08:19:20.71#ibcon#about to read 4, iclass 33, count 2 2006.232.08:19:20.71#ibcon#read 4, iclass 33, count 2 2006.232.08:19:20.71#ibcon#about to read 5, iclass 33, count 2 2006.232.08:19:20.71#ibcon#read 5, iclass 33, count 2 2006.232.08:19:20.71#ibcon#about to read 6, iclass 33, count 2 2006.232.08:19:20.71#ibcon#read 6, iclass 33, count 2 2006.232.08:19:20.71#ibcon#end of sib2, iclass 33, count 2 2006.232.08:19:20.71#ibcon#*after write, iclass 33, count 2 2006.232.08:19:20.71#ibcon#*before return 0, iclass 33, count 2 2006.232.08:19:20.71#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.232.08:19:20.71#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.232.08:19:20.71#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.232.08:19:20.71#ibcon#ireg 7 cls_cnt 0 2006.232.08:19:20.71#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.232.08:19:20.83#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.232.08:19:20.83#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.232.08:19:20.83#ibcon#enter wrdev, iclass 33, count 0 2006.232.08:19:20.83#ibcon#first serial, iclass 33, count 0 2006.232.08:19:20.83#ibcon#enter sib2, iclass 33, count 0 2006.232.08:19:20.83#ibcon#flushed, iclass 33, count 0 2006.232.08:19:20.83#ibcon#about to write, iclass 33, count 0 2006.232.08:19:20.83#ibcon#wrote, iclass 33, count 0 2006.232.08:19:20.83#ibcon#about to read 3, iclass 33, count 0 2006.232.08:19:20.85#ibcon#read 3, iclass 33, count 0 2006.232.08:19:20.85#ibcon#about to read 4, iclass 33, count 0 2006.232.08:19:20.85#ibcon#read 4, iclass 33, count 0 2006.232.08:19:20.85#ibcon#about to read 5, iclass 33, count 0 2006.232.08:19:20.85#ibcon#read 5, iclass 33, count 0 2006.232.08:19:20.85#ibcon#about to read 6, iclass 33, count 0 2006.232.08:19:20.85#ibcon#read 6, iclass 33, count 0 2006.232.08:19:20.85#ibcon#end of sib2, iclass 33, count 0 2006.232.08:19:20.85#ibcon#*mode == 0, iclass 33, count 0 2006.232.08:19:20.85#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.232.08:19:20.85#ibcon#[27=USB\r\n] 2006.232.08:19:20.85#ibcon#*before write, iclass 33, count 0 2006.232.08:19:20.85#ibcon#enter sib2, iclass 33, count 0 2006.232.08:19:20.85#ibcon#flushed, iclass 33, count 0 2006.232.08:19:20.85#ibcon#about to write, iclass 33, count 0 2006.232.08:19:20.85#ibcon#wrote, iclass 33, count 0 2006.232.08:19:20.85#ibcon#about to read 3, iclass 33, count 0 2006.232.08:19:20.88#ibcon#read 3, iclass 33, count 0 2006.232.08:19:20.88#ibcon#about to read 4, iclass 33, count 0 2006.232.08:19:20.88#ibcon#read 4, iclass 33, count 0 2006.232.08:19:20.88#ibcon#about to read 5, iclass 33, count 0 2006.232.08:19:20.88#ibcon#read 5, iclass 33, count 0 2006.232.08:19:20.88#ibcon#about to read 6, iclass 33, count 0 2006.232.08:19:20.88#ibcon#read 6, iclass 33, count 0 2006.232.08:19:20.88#ibcon#end of sib2, iclass 33, count 0 2006.232.08:19:20.88#ibcon#*after write, iclass 33, count 0 2006.232.08:19:20.88#ibcon#*before return 0, iclass 33, count 0 2006.232.08:19:20.88#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.232.08:19:20.88#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.232.08:19:20.88#ibcon#about to clear, iclass 33 cls_cnt 0 2006.232.08:19:20.88#ibcon#cleared, iclass 33 cls_cnt 0 2006.232.08:19:20.88$vc4f8/vblo=2,640.99 2006.232.08:19:20.88#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.232.08:19:20.88#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.232.08:19:20.88#ibcon#ireg 17 cls_cnt 0 2006.232.08:19:20.88#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.232.08:19:20.88#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.232.08:19:20.88#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.232.08:19:20.88#ibcon#enter wrdev, iclass 35, count 0 2006.232.08:19:20.88#ibcon#first serial, iclass 35, count 0 2006.232.08:19:20.88#ibcon#enter sib2, iclass 35, count 0 2006.232.08:19:20.88#ibcon#flushed, iclass 35, count 0 2006.232.08:19:20.88#ibcon#about to write, iclass 35, count 0 2006.232.08:19:20.88#ibcon#wrote, iclass 35, count 0 2006.232.08:19:20.88#ibcon#about to read 3, iclass 35, count 0 2006.232.08:19:20.90#ibcon#read 3, iclass 35, count 0 2006.232.08:19:20.90#ibcon#about to read 4, iclass 35, count 0 2006.232.08:19:20.90#ibcon#read 4, iclass 35, count 0 2006.232.08:19:20.90#ibcon#about to read 5, iclass 35, count 0 2006.232.08:19:20.90#ibcon#read 5, iclass 35, count 0 2006.232.08:19:20.90#ibcon#about to read 6, iclass 35, count 0 2006.232.08:19:20.90#ibcon#read 6, iclass 35, count 0 2006.232.08:19:20.90#ibcon#end of sib2, iclass 35, count 0 2006.232.08:19:20.90#ibcon#*mode == 0, iclass 35, count 0 2006.232.08:19:20.90#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.232.08:19:20.90#ibcon#[28=FRQ=02,640.99\r\n] 2006.232.08:19:20.90#ibcon#*before write, iclass 35, count 0 2006.232.08:19:20.90#ibcon#enter sib2, iclass 35, count 0 2006.232.08:19:20.90#ibcon#flushed, iclass 35, count 0 2006.232.08:19:20.90#ibcon#about to write, iclass 35, count 0 2006.232.08:19:20.90#ibcon#wrote, iclass 35, count 0 2006.232.08:19:20.90#ibcon#about to read 3, iclass 35, count 0 2006.232.08:19:20.94#ibcon#read 3, iclass 35, count 0 2006.232.08:19:20.94#ibcon#about to read 4, iclass 35, count 0 2006.232.08:19:20.94#ibcon#read 4, iclass 35, count 0 2006.232.08:19:20.94#ibcon#about to read 5, iclass 35, count 0 2006.232.08:19:20.94#ibcon#read 5, iclass 35, count 0 2006.232.08:19:20.94#ibcon#about to read 6, iclass 35, count 0 2006.232.08:19:20.94#ibcon#read 6, iclass 35, count 0 2006.232.08:19:20.94#ibcon#end of sib2, iclass 35, count 0 2006.232.08:19:20.94#ibcon#*after write, iclass 35, count 0 2006.232.08:19:20.94#ibcon#*before return 0, iclass 35, count 0 2006.232.08:19:20.94#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.232.08:19:20.94#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.232.08:19:20.94#ibcon#about to clear, iclass 35 cls_cnt 0 2006.232.08:19:20.94#ibcon#cleared, iclass 35 cls_cnt 0 2006.232.08:19:20.94$vc4f8/vb=2,4 2006.232.08:19:20.94#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.232.08:19:20.94#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.232.08:19:20.94#ibcon#ireg 11 cls_cnt 2 2006.232.08:19:20.94#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.232.08:19:21.00#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.232.08:19:21.00#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.232.08:19:21.00#ibcon#enter wrdev, iclass 37, count 2 2006.232.08:19:21.00#ibcon#first serial, iclass 37, count 2 2006.232.08:19:21.00#ibcon#enter sib2, iclass 37, count 2 2006.232.08:19:21.00#ibcon#flushed, iclass 37, count 2 2006.232.08:19:21.00#ibcon#about to write, iclass 37, count 2 2006.232.08:19:21.00#ibcon#wrote, iclass 37, count 2 2006.232.08:19:21.00#ibcon#about to read 3, iclass 37, count 2 2006.232.08:19:21.02#ibcon#read 3, iclass 37, count 2 2006.232.08:19:21.02#ibcon#about to read 4, iclass 37, count 2 2006.232.08:19:21.02#ibcon#read 4, iclass 37, count 2 2006.232.08:19:21.02#ibcon#about to read 5, iclass 37, count 2 2006.232.08:19:21.02#ibcon#read 5, iclass 37, count 2 2006.232.08:19:21.02#ibcon#about to read 6, iclass 37, count 2 2006.232.08:19:21.02#ibcon#read 6, iclass 37, count 2 2006.232.08:19:21.02#ibcon#end of sib2, iclass 37, count 2 2006.232.08:19:21.02#ibcon#*mode == 0, iclass 37, count 2 2006.232.08:19:21.02#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.232.08:19:21.02#ibcon#[27=AT02-04\r\n] 2006.232.08:19:21.02#ibcon#*before write, iclass 37, count 2 2006.232.08:19:21.02#ibcon#enter sib2, iclass 37, count 2 2006.232.08:19:21.02#ibcon#flushed, iclass 37, count 2 2006.232.08:19:21.02#ibcon#about to write, iclass 37, count 2 2006.232.08:19:21.02#ibcon#wrote, iclass 37, count 2 2006.232.08:19:21.02#ibcon#about to read 3, iclass 37, count 2 2006.232.08:19:21.05#ibcon#read 3, iclass 37, count 2 2006.232.08:19:21.05#ibcon#about to read 4, iclass 37, count 2 2006.232.08:19:21.05#ibcon#read 4, iclass 37, count 2 2006.232.08:19:21.05#ibcon#about to read 5, iclass 37, count 2 2006.232.08:19:21.05#ibcon#read 5, iclass 37, count 2 2006.232.08:19:21.05#ibcon#about to read 6, iclass 37, count 2 2006.232.08:19:21.05#ibcon#read 6, iclass 37, count 2 2006.232.08:19:21.05#ibcon#end of sib2, iclass 37, count 2 2006.232.08:19:21.05#ibcon#*after write, iclass 37, count 2 2006.232.08:19:21.05#ibcon#*before return 0, iclass 37, count 2 2006.232.08:19:21.05#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.232.08:19:21.05#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.232.08:19:21.05#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.232.08:19:21.05#ibcon#ireg 7 cls_cnt 0 2006.232.08:19:21.05#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.232.08:19:21.17#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.232.08:19:21.17#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.232.08:19:21.17#ibcon#enter wrdev, iclass 37, count 0 2006.232.08:19:21.17#ibcon#first serial, iclass 37, count 0 2006.232.08:19:21.17#ibcon#enter sib2, iclass 37, count 0 2006.232.08:19:21.17#ibcon#flushed, iclass 37, count 0 2006.232.08:19:21.17#ibcon#about to write, iclass 37, count 0 2006.232.08:19:21.17#ibcon#wrote, iclass 37, count 0 2006.232.08:19:21.17#ibcon#about to read 3, iclass 37, count 0 2006.232.08:19:21.19#ibcon#read 3, iclass 37, count 0 2006.232.08:19:21.19#ibcon#about to read 4, iclass 37, count 0 2006.232.08:19:21.19#ibcon#read 4, iclass 37, count 0 2006.232.08:19:21.19#ibcon#about to read 5, iclass 37, count 0 2006.232.08:19:21.19#ibcon#read 5, iclass 37, count 0 2006.232.08:19:21.19#ibcon#about to read 6, iclass 37, count 0 2006.232.08:19:21.19#ibcon#read 6, iclass 37, count 0 2006.232.08:19:21.19#ibcon#end of sib2, iclass 37, count 0 2006.232.08:19:21.19#ibcon#*mode == 0, iclass 37, count 0 2006.232.08:19:21.19#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.232.08:19:21.19#ibcon#[27=USB\r\n] 2006.232.08:19:21.19#ibcon#*before write, iclass 37, count 0 2006.232.08:19:21.19#ibcon#enter sib2, iclass 37, count 0 2006.232.08:19:21.19#ibcon#flushed, iclass 37, count 0 2006.232.08:19:21.19#ibcon#about to write, iclass 37, count 0 2006.232.08:19:21.19#ibcon#wrote, iclass 37, count 0 2006.232.08:19:21.19#ibcon#about to read 3, iclass 37, count 0 2006.232.08:19:21.22#ibcon#read 3, iclass 37, count 0 2006.232.08:19:21.22#ibcon#about to read 4, iclass 37, count 0 2006.232.08:19:21.22#ibcon#read 4, iclass 37, count 0 2006.232.08:19:21.22#ibcon#about to read 5, iclass 37, count 0 2006.232.08:19:21.22#ibcon#read 5, iclass 37, count 0 2006.232.08:19:21.22#ibcon#about to read 6, iclass 37, count 0 2006.232.08:19:21.22#ibcon#read 6, iclass 37, count 0 2006.232.08:19:21.22#ibcon#end of sib2, iclass 37, count 0 2006.232.08:19:21.22#ibcon#*after write, iclass 37, count 0 2006.232.08:19:21.22#ibcon#*before return 0, iclass 37, count 0 2006.232.08:19:21.22#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.232.08:19:21.22#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.232.08:19:21.22#ibcon#about to clear, iclass 37 cls_cnt 0 2006.232.08:19:21.22#ibcon#cleared, iclass 37 cls_cnt 0 2006.232.08:19:21.22$vc4f8/vblo=3,656.99 2006.232.08:19:21.22#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.232.08:19:21.22#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.232.08:19:21.22#ibcon#ireg 17 cls_cnt 0 2006.232.08:19:21.22#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.232.08:19:21.22#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.232.08:19:21.22#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.232.08:19:21.22#ibcon#enter wrdev, iclass 39, count 0 2006.232.08:19:21.22#ibcon#first serial, iclass 39, count 0 2006.232.08:19:21.22#ibcon#enter sib2, iclass 39, count 0 2006.232.08:19:21.22#ibcon#flushed, iclass 39, count 0 2006.232.08:19:21.22#ibcon#about to write, iclass 39, count 0 2006.232.08:19:21.22#ibcon#wrote, iclass 39, count 0 2006.232.08:19:21.22#ibcon#about to read 3, iclass 39, count 0 2006.232.08:19:21.24#ibcon#read 3, iclass 39, count 0 2006.232.08:19:21.24#ibcon#about to read 4, iclass 39, count 0 2006.232.08:19:21.24#ibcon#read 4, iclass 39, count 0 2006.232.08:19:21.24#ibcon#about to read 5, iclass 39, count 0 2006.232.08:19:21.24#ibcon#read 5, iclass 39, count 0 2006.232.08:19:21.24#ibcon#about to read 6, iclass 39, count 0 2006.232.08:19:21.24#ibcon#read 6, iclass 39, count 0 2006.232.08:19:21.24#ibcon#end of sib2, iclass 39, count 0 2006.232.08:19:21.24#ibcon#*mode == 0, iclass 39, count 0 2006.232.08:19:21.24#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.232.08:19:21.24#ibcon#[28=FRQ=03,656.99\r\n] 2006.232.08:19:21.24#ibcon#*before write, iclass 39, count 0 2006.232.08:19:21.24#ibcon#enter sib2, iclass 39, count 0 2006.232.08:19:21.24#ibcon#flushed, iclass 39, count 0 2006.232.08:19:21.24#ibcon#about to write, iclass 39, count 0 2006.232.08:19:21.24#ibcon#wrote, iclass 39, count 0 2006.232.08:19:21.24#ibcon#about to read 3, iclass 39, count 0 2006.232.08:19:21.28#ibcon#read 3, iclass 39, count 0 2006.232.08:19:21.28#ibcon#about to read 4, iclass 39, count 0 2006.232.08:19:21.28#ibcon#read 4, iclass 39, count 0 2006.232.08:19:21.28#ibcon#about to read 5, iclass 39, count 0 2006.232.08:19:21.28#ibcon#read 5, iclass 39, count 0 2006.232.08:19:21.28#ibcon#about to read 6, iclass 39, count 0 2006.232.08:19:21.28#ibcon#read 6, iclass 39, count 0 2006.232.08:19:21.28#ibcon#end of sib2, iclass 39, count 0 2006.232.08:19:21.28#ibcon#*after write, iclass 39, count 0 2006.232.08:19:21.28#ibcon#*before return 0, iclass 39, count 0 2006.232.08:19:21.28#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.232.08:19:21.28#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.232.08:19:21.28#ibcon#about to clear, iclass 39 cls_cnt 0 2006.232.08:19:21.28#ibcon#cleared, iclass 39 cls_cnt 0 2006.232.08:19:21.28$vc4f8/vb=3,4 2006.232.08:19:21.28#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.232.08:19:21.28#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.232.08:19:21.28#ibcon#ireg 11 cls_cnt 2 2006.232.08:19:21.28#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.232.08:19:21.34#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.232.08:19:21.34#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.232.08:19:21.34#ibcon#enter wrdev, iclass 3, count 2 2006.232.08:19:21.34#ibcon#first serial, iclass 3, count 2 2006.232.08:19:21.34#ibcon#enter sib2, iclass 3, count 2 2006.232.08:19:21.34#ibcon#flushed, iclass 3, count 2 2006.232.08:19:21.34#ibcon#about to write, iclass 3, count 2 2006.232.08:19:21.34#ibcon#wrote, iclass 3, count 2 2006.232.08:19:21.34#ibcon#about to read 3, iclass 3, count 2 2006.232.08:19:21.37#ibcon#read 3, iclass 3, count 2 2006.232.08:19:21.37#ibcon#about to read 4, iclass 3, count 2 2006.232.08:19:21.37#ibcon#read 4, iclass 3, count 2 2006.232.08:19:21.37#ibcon#about to read 5, iclass 3, count 2 2006.232.08:19:21.37#ibcon#read 5, iclass 3, count 2 2006.232.08:19:21.37#ibcon#about to read 6, iclass 3, count 2 2006.232.08:19:21.37#ibcon#read 6, iclass 3, count 2 2006.232.08:19:21.37#ibcon#end of sib2, iclass 3, count 2 2006.232.08:19:21.37#ibcon#*mode == 0, iclass 3, count 2 2006.232.08:19:21.37#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.232.08:19:21.37#ibcon#[27=AT03-04\r\n] 2006.232.08:19:21.37#ibcon#*before write, iclass 3, count 2 2006.232.08:19:21.37#ibcon#enter sib2, iclass 3, count 2 2006.232.08:19:21.37#ibcon#flushed, iclass 3, count 2 2006.232.08:19:21.37#ibcon#about to write, iclass 3, count 2 2006.232.08:19:21.37#ibcon#wrote, iclass 3, count 2 2006.232.08:19:21.37#ibcon#about to read 3, iclass 3, count 2 2006.232.08:19:21.40#ibcon#read 3, iclass 3, count 2 2006.232.08:19:21.40#ibcon#about to read 4, iclass 3, count 2 2006.232.08:19:21.40#ibcon#read 4, iclass 3, count 2 2006.232.08:19:21.40#ibcon#about to read 5, iclass 3, count 2 2006.232.08:19:21.40#ibcon#read 5, iclass 3, count 2 2006.232.08:19:21.40#ibcon#about to read 6, iclass 3, count 2 2006.232.08:19:21.40#ibcon#read 6, iclass 3, count 2 2006.232.08:19:21.40#ibcon#end of sib2, iclass 3, count 2 2006.232.08:19:21.40#ibcon#*after write, iclass 3, count 2 2006.232.08:19:21.40#ibcon#*before return 0, iclass 3, count 2 2006.232.08:19:21.40#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.232.08:19:21.40#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.232.08:19:21.40#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.232.08:19:21.40#ibcon#ireg 7 cls_cnt 0 2006.232.08:19:21.40#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.232.08:19:21.52#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.232.08:19:21.52#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.232.08:19:21.52#ibcon#enter wrdev, iclass 3, count 0 2006.232.08:19:21.52#ibcon#first serial, iclass 3, count 0 2006.232.08:19:21.52#ibcon#enter sib2, iclass 3, count 0 2006.232.08:19:21.52#ibcon#flushed, iclass 3, count 0 2006.232.08:19:21.52#ibcon#about to write, iclass 3, count 0 2006.232.08:19:21.52#ibcon#wrote, iclass 3, count 0 2006.232.08:19:21.52#ibcon#about to read 3, iclass 3, count 0 2006.232.08:19:21.54#ibcon#read 3, iclass 3, count 0 2006.232.08:19:21.54#ibcon#about to read 4, iclass 3, count 0 2006.232.08:19:21.54#ibcon#read 4, iclass 3, count 0 2006.232.08:19:21.54#ibcon#about to read 5, iclass 3, count 0 2006.232.08:19:21.54#ibcon#read 5, iclass 3, count 0 2006.232.08:19:21.54#ibcon#about to read 6, iclass 3, count 0 2006.232.08:19:21.54#ibcon#read 6, iclass 3, count 0 2006.232.08:19:21.54#ibcon#end of sib2, iclass 3, count 0 2006.232.08:19:21.54#ibcon#*mode == 0, iclass 3, count 0 2006.232.08:19:21.54#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.232.08:19:21.54#ibcon#[27=USB\r\n] 2006.232.08:19:21.54#ibcon#*before write, iclass 3, count 0 2006.232.08:19:21.54#ibcon#enter sib2, iclass 3, count 0 2006.232.08:19:21.54#ibcon#flushed, iclass 3, count 0 2006.232.08:19:21.54#ibcon#about to write, iclass 3, count 0 2006.232.08:19:21.54#ibcon#wrote, iclass 3, count 0 2006.232.08:19:21.54#ibcon#about to read 3, iclass 3, count 0 2006.232.08:19:21.57#ibcon#read 3, iclass 3, count 0 2006.232.08:19:21.57#ibcon#about to read 4, iclass 3, count 0 2006.232.08:19:21.57#ibcon#read 4, iclass 3, count 0 2006.232.08:19:21.57#ibcon#about to read 5, iclass 3, count 0 2006.232.08:19:21.57#ibcon#read 5, iclass 3, count 0 2006.232.08:19:21.57#ibcon#about to read 6, iclass 3, count 0 2006.232.08:19:21.57#ibcon#read 6, iclass 3, count 0 2006.232.08:19:21.57#ibcon#end of sib2, iclass 3, count 0 2006.232.08:19:21.57#ibcon#*after write, iclass 3, count 0 2006.232.08:19:21.57#ibcon#*before return 0, iclass 3, count 0 2006.232.08:19:21.57#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.232.08:19:21.57#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.232.08:19:21.57#ibcon#about to clear, iclass 3 cls_cnt 0 2006.232.08:19:21.57#ibcon#cleared, iclass 3 cls_cnt 0 2006.232.08:19:21.57$vc4f8/vblo=4,712.99 2006.232.08:19:21.57#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.232.08:19:21.57#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.232.08:19:21.57#ibcon#ireg 17 cls_cnt 0 2006.232.08:19:21.57#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.232.08:19:21.57#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.232.08:19:21.57#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.232.08:19:21.57#ibcon#enter wrdev, iclass 5, count 0 2006.232.08:19:21.57#ibcon#first serial, iclass 5, count 0 2006.232.08:19:21.57#ibcon#enter sib2, iclass 5, count 0 2006.232.08:19:21.57#ibcon#flushed, iclass 5, count 0 2006.232.08:19:21.57#ibcon#about to write, iclass 5, count 0 2006.232.08:19:21.57#ibcon#wrote, iclass 5, count 0 2006.232.08:19:21.57#ibcon#about to read 3, iclass 5, count 0 2006.232.08:19:21.59#ibcon#read 3, iclass 5, count 0 2006.232.08:19:21.59#ibcon#about to read 4, iclass 5, count 0 2006.232.08:19:21.59#ibcon#read 4, iclass 5, count 0 2006.232.08:19:21.59#ibcon#about to read 5, iclass 5, count 0 2006.232.08:19:21.59#ibcon#read 5, iclass 5, count 0 2006.232.08:19:21.59#ibcon#about to read 6, iclass 5, count 0 2006.232.08:19:21.59#ibcon#read 6, iclass 5, count 0 2006.232.08:19:21.59#ibcon#end of sib2, iclass 5, count 0 2006.232.08:19:21.59#ibcon#*mode == 0, iclass 5, count 0 2006.232.08:19:21.59#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.232.08:19:21.59#ibcon#[28=FRQ=04,712.99\r\n] 2006.232.08:19:21.59#ibcon#*before write, iclass 5, count 0 2006.232.08:19:21.59#ibcon#enter sib2, iclass 5, count 0 2006.232.08:19:21.59#ibcon#flushed, iclass 5, count 0 2006.232.08:19:21.59#ibcon#about to write, iclass 5, count 0 2006.232.08:19:21.59#ibcon#wrote, iclass 5, count 0 2006.232.08:19:21.59#ibcon#about to read 3, iclass 5, count 0 2006.232.08:19:21.63#ibcon#read 3, iclass 5, count 0 2006.232.08:19:21.63#ibcon#about to read 4, iclass 5, count 0 2006.232.08:19:21.63#ibcon#read 4, iclass 5, count 0 2006.232.08:19:21.63#ibcon#about to read 5, iclass 5, count 0 2006.232.08:19:21.63#ibcon#read 5, iclass 5, count 0 2006.232.08:19:21.63#ibcon#about to read 6, iclass 5, count 0 2006.232.08:19:21.63#ibcon#read 6, iclass 5, count 0 2006.232.08:19:21.63#ibcon#end of sib2, iclass 5, count 0 2006.232.08:19:21.63#ibcon#*after write, iclass 5, count 0 2006.232.08:19:21.63#ibcon#*before return 0, iclass 5, count 0 2006.232.08:19:21.63#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.232.08:19:21.63#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.232.08:19:21.63#ibcon#about to clear, iclass 5 cls_cnt 0 2006.232.08:19:21.63#ibcon#cleared, iclass 5 cls_cnt 0 2006.232.08:19:21.63$vc4f8/vb=4,4 2006.232.08:19:21.63#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.232.08:19:21.63#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.232.08:19:21.63#ibcon#ireg 11 cls_cnt 2 2006.232.08:19:21.63#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.232.08:19:21.69#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.232.08:19:21.69#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.232.08:19:21.69#ibcon#enter wrdev, iclass 7, count 2 2006.232.08:19:21.69#ibcon#first serial, iclass 7, count 2 2006.232.08:19:21.69#ibcon#enter sib2, iclass 7, count 2 2006.232.08:19:21.69#ibcon#flushed, iclass 7, count 2 2006.232.08:19:21.69#ibcon#about to write, iclass 7, count 2 2006.232.08:19:21.69#ibcon#wrote, iclass 7, count 2 2006.232.08:19:21.69#ibcon#about to read 3, iclass 7, count 2 2006.232.08:19:21.71#ibcon#read 3, iclass 7, count 2 2006.232.08:19:21.71#ibcon#about to read 4, iclass 7, count 2 2006.232.08:19:21.71#ibcon#read 4, iclass 7, count 2 2006.232.08:19:21.71#ibcon#about to read 5, iclass 7, count 2 2006.232.08:19:21.71#ibcon#read 5, iclass 7, count 2 2006.232.08:19:21.71#ibcon#about to read 6, iclass 7, count 2 2006.232.08:19:21.71#ibcon#read 6, iclass 7, count 2 2006.232.08:19:21.71#ibcon#end of sib2, iclass 7, count 2 2006.232.08:19:21.71#ibcon#*mode == 0, iclass 7, count 2 2006.232.08:19:21.71#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.232.08:19:21.71#ibcon#[27=AT04-04\r\n] 2006.232.08:19:21.71#ibcon#*before write, iclass 7, count 2 2006.232.08:19:21.71#ibcon#enter sib2, iclass 7, count 2 2006.232.08:19:21.71#ibcon#flushed, iclass 7, count 2 2006.232.08:19:21.71#ibcon#about to write, iclass 7, count 2 2006.232.08:19:21.71#ibcon#wrote, iclass 7, count 2 2006.232.08:19:21.71#ibcon#about to read 3, iclass 7, count 2 2006.232.08:19:21.74#ibcon#read 3, iclass 7, count 2 2006.232.08:19:21.74#ibcon#about to read 4, iclass 7, count 2 2006.232.08:19:21.74#ibcon#read 4, iclass 7, count 2 2006.232.08:19:21.74#ibcon#about to read 5, iclass 7, count 2 2006.232.08:19:21.74#ibcon#read 5, iclass 7, count 2 2006.232.08:19:21.74#ibcon#about to read 6, iclass 7, count 2 2006.232.08:19:21.74#ibcon#read 6, iclass 7, count 2 2006.232.08:19:21.74#ibcon#end of sib2, iclass 7, count 2 2006.232.08:19:21.74#ibcon#*after write, iclass 7, count 2 2006.232.08:19:21.74#ibcon#*before return 0, iclass 7, count 2 2006.232.08:19:21.74#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.232.08:19:21.74#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.232.08:19:21.74#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.232.08:19:21.74#ibcon#ireg 7 cls_cnt 0 2006.232.08:19:21.74#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.232.08:19:21.86#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.232.08:19:21.86#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.232.08:19:21.86#ibcon#enter wrdev, iclass 7, count 0 2006.232.08:19:21.86#ibcon#first serial, iclass 7, count 0 2006.232.08:19:21.86#ibcon#enter sib2, iclass 7, count 0 2006.232.08:19:21.86#ibcon#flushed, iclass 7, count 0 2006.232.08:19:21.86#ibcon#about to write, iclass 7, count 0 2006.232.08:19:21.86#ibcon#wrote, iclass 7, count 0 2006.232.08:19:21.86#ibcon#about to read 3, iclass 7, count 0 2006.232.08:19:21.88#ibcon#read 3, iclass 7, count 0 2006.232.08:19:21.88#ibcon#about to read 4, iclass 7, count 0 2006.232.08:19:21.88#ibcon#read 4, iclass 7, count 0 2006.232.08:19:21.88#ibcon#about to read 5, iclass 7, count 0 2006.232.08:19:21.88#ibcon#read 5, iclass 7, count 0 2006.232.08:19:21.88#ibcon#about to read 6, iclass 7, count 0 2006.232.08:19:21.88#ibcon#read 6, iclass 7, count 0 2006.232.08:19:21.88#ibcon#end of sib2, iclass 7, count 0 2006.232.08:19:21.88#ibcon#*mode == 0, iclass 7, count 0 2006.232.08:19:21.88#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.232.08:19:21.88#ibcon#[27=USB\r\n] 2006.232.08:19:21.88#ibcon#*before write, iclass 7, count 0 2006.232.08:19:21.88#ibcon#enter sib2, iclass 7, count 0 2006.232.08:19:21.88#ibcon#flushed, iclass 7, count 0 2006.232.08:19:21.88#ibcon#about to write, iclass 7, count 0 2006.232.08:19:21.88#ibcon#wrote, iclass 7, count 0 2006.232.08:19:21.88#ibcon#about to read 3, iclass 7, count 0 2006.232.08:19:21.91#ibcon#read 3, iclass 7, count 0 2006.232.08:19:21.91#ibcon#about to read 4, iclass 7, count 0 2006.232.08:19:21.91#ibcon#read 4, iclass 7, count 0 2006.232.08:19:21.91#ibcon#about to read 5, iclass 7, count 0 2006.232.08:19:21.91#ibcon#read 5, iclass 7, count 0 2006.232.08:19:21.91#ibcon#about to read 6, iclass 7, count 0 2006.232.08:19:21.91#ibcon#read 6, iclass 7, count 0 2006.232.08:19:21.91#ibcon#end of sib2, iclass 7, count 0 2006.232.08:19:21.91#ibcon#*after write, iclass 7, count 0 2006.232.08:19:21.91#ibcon#*before return 0, iclass 7, count 0 2006.232.08:19:21.91#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.232.08:19:21.91#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.232.08:19:21.91#ibcon#about to clear, iclass 7 cls_cnt 0 2006.232.08:19:21.91#ibcon#cleared, iclass 7 cls_cnt 0 2006.232.08:19:21.91$vc4f8/vblo=5,744.99 2006.232.08:19:21.91#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.232.08:19:21.91#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.232.08:19:21.91#ibcon#ireg 17 cls_cnt 0 2006.232.08:19:21.91#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.232.08:19:21.91#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.232.08:19:21.91#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.232.08:19:21.91#ibcon#enter wrdev, iclass 11, count 0 2006.232.08:19:21.91#ibcon#first serial, iclass 11, count 0 2006.232.08:19:21.91#ibcon#enter sib2, iclass 11, count 0 2006.232.08:19:21.91#ibcon#flushed, iclass 11, count 0 2006.232.08:19:21.91#ibcon#about to write, iclass 11, count 0 2006.232.08:19:21.91#ibcon#wrote, iclass 11, count 0 2006.232.08:19:21.91#ibcon#about to read 3, iclass 11, count 0 2006.232.08:19:21.93#ibcon#read 3, iclass 11, count 0 2006.232.08:19:21.93#ibcon#about to read 4, iclass 11, count 0 2006.232.08:19:21.93#ibcon#read 4, iclass 11, count 0 2006.232.08:19:21.93#ibcon#about to read 5, iclass 11, count 0 2006.232.08:19:21.93#ibcon#read 5, iclass 11, count 0 2006.232.08:19:21.93#ibcon#about to read 6, iclass 11, count 0 2006.232.08:19:21.93#ibcon#read 6, iclass 11, count 0 2006.232.08:19:21.93#ibcon#end of sib2, iclass 11, count 0 2006.232.08:19:21.93#ibcon#*mode == 0, iclass 11, count 0 2006.232.08:19:21.93#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.232.08:19:21.93#ibcon#[28=FRQ=05,744.99\r\n] 2006.232.08:19:21.93#ibcon#*before write, iclass 11, count 0 2006.232.08:19:21.93#ibcon#enter sib2, iclass 11, count 0 2006.232.08:19:21.93#ibcon#flushed, iclass 11, count 0 2006.232.08:19:21.93#ibcon#about to write, iclass 11, count 0 2006.232.08:19:21.93#ibcon#wrote, iclass 11, count 0 2006.232.08:19:21.93#ibcon#about to read 3, iclass 11, count 0 2006.232.08:19:21.97#ibcon#read 3, iclass 11, count 0 2006.232.08:19:21.97#ibcon#about to read 4, iclass 11, count 0 2006.232.08:19:21.97#ibcon#read 4, iclass 11, count 0 2006.232.08:19:21.97#ibcon#about to read 5, iclass 11, count 0 2006.232.08:19:21.97#ibcon#read 5, iclass 11, count 0 2006.232.08:19:21.97#ibcon#about to read 6, iclass 11, count 0 2006.232.08:19:21.97#ibcon#read 6, iclass 11, count 0 2006.232.08:19:21.97#ibcon#end of sib2, iclass 11, count 0 2006.232.08:19:21.97#ibcon#*after write, iclass 11, count 0 2006.232.08:19:21.97#ibcon#*before return 0, iclass 11, count 0 2006.232.08:19:21.97#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.232.08:19:21.97#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.232.08:19:21.97#ibcon#about to clear, iclass 11 cls_cnt 0 2006.232.08:19:21.97#ibcon#cleared, iclass 11 cls_cnt 0 2006.232.08:19:21.97$vc4f8/vb=5,3 2006.232.08:19:21.97#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.232.08:19:21.97#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.232.08:19:21.97#ibcon#ireg 11 cls_cnt 2 2006.232.08:19:21.97#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.232.08:19:22.03#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.232.08:19:22.03#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.232.08:19:22.03#ibcon#enter wrdev, iclass 13, count 2 2006.232.08:19:22.03#ibcon#first serial, iclass 13, count 2 2006.232.08:19:22.03#ibcon#enter sib2, iclass 13, count 2 2006.232.08:19:22.03#ibcon#flushed, iclass 13, count 2 2006.232.08:19:22.03#ibcon#about to write, iclass 13, count 2 2006.232.08:19:22.03#ibcon#wrote, iclass 13, count 2 2006.232.08:19:22.03#ibcon#about to read 3, iclass 13, count 2 2006.232.08:19:22.05#ibcon#read 3, iclass 13, count 2 2006.232.08:19:22.05#ibcon#about to read 4, iclass 13, count 2 2006.232.08:19:22.05#ibcon#read 4, iclass 13, count 2 2006.232.08:19:22.05#ibcon#about to read 5, iclass 13, count 2 2006.232.08:19:22.05#ibcon#read 5, iclass 13, count 2 2006.232.08:19:22.05#ibcon#about to read 6, iclass 13, count 2 2006.232.08:19:22.05#ibcon#read 6, iclass 13, count 2 2006.232.08:19:22.05#ibcon#end of sib2, iclass 13, count 2 2006.232.08:19:22.05#ibcon#*mode == 0, iclass 13, count 2 2006.232.08:19:22.05#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.232.08:19:22.05#ibcon#[27=AT05-03\r\n] 2006.232.08:19:22.05#ibcon#*before write, iclass 13, count 2 2006.232.08:19:22.05#ibcon#enter sib2, iclass 13, count 2 2006.232.08:19:22.05#ibcon#flushed, iclass 13, count 2 2006.232.08:19:22.05#ibcon#about to write, iclass 13, count 2 2006.232.08:19:22.05#ibcon#wrote, iclass 13, count 2 2006.232.08:19:22.05#ibcon#about to read 3, iclass 13, count 2 2006.232.08:19:22.08#ibcon#read 3, iclass 13, count 2 2006.232.08:19:22.08#ibcon#about to read 4, iclass 13, count 2 2006.232.08:19:22.08#ibcon#read 4, iclass 13, count 2 2006.232.08:19:22.08#ibcon#about to read 5, iclass 13, count 2 2006.232.08:19:22.08#ibcon#read 5, iclass 13, count 2 2006.232.08:19:22.08#ibcon#about to read 6, iclass 13, count 2 2006.232.08:19:22.08#ibcon#read 6, iclass 13, count 2 2006.232.08:19:22.08#ibcon#end of sib2, iclass 13, count 2 2006.232.08:19:22.08#ibcon#*after write, iclass 13, count 2 2006.232.08:19:22.08#ibcon#*before return 0, iclass 13, count 2 2006.232.08:19:22.08#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.232.08:19:22.08#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.232.08:19:22.08#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.232.08:19:22.08#ibcon#ireg 7 cls_cnt 0 2006.232.08:19:22.08#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.232.08:19:22.20#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.232.08:19:22.20#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.232.08:19:22.20#ibcon#enter wrdev, iclass 13, count 0 2006.232.08:19:22.20#ibcon#first serial, iclass 13, count 0 2006.232.08:19:22.20#ibcon#enter sib2, iclass 13, count 0 2006.232.08:19:22.20#ibcon#flushed, iclass 13, count 0 2006.232.08:19:22.20#ibcon#about to write, iclass 13, count 0 2006.232.08:19:22.20#ibcon#wrote, iclass 13, count 0 2006.232.08:19:22.20#ibcon#about to read 3, iclass 13, count 0 2006.232.08:19:22.22#ibcon#read 3, iclass 13, count 0 2006.232.08:19:22.22#ibcon#about to read 4, iclass 13, count 0 2006.232.08:19:22.22#ibcon#read 4, iclass 13, count 0 2006.232.08:19:22.22#ibcon#about to read 5, iclass 13, count 0 2006.232.08:19:22.22#ibcon#read 5, iclass 13, count 0 2006.232.08:19:22.22#ibcon#about to read 6, iclass 13, count 0 2006.232.08:19:22.22#ibcon#read 6, iclass 13, count 0 2006.232.08:19:22.22#ibcon#end of sib2, iclass 13, count 0 2006.232.08:19:22.22#ibcon#*mode == 0, iclass 13, count 0 2006.232.08:19:22.22#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.232.08:19:22.22#ibcon#[27=USB\r\n] 2006.232.08:19:22.22#ibcon#*before write, iclass 13, count 0 2006.232.08:19:22.22#ibcon#enter sib2, iclass 13, count 0 2006.232.08:19:22.22#ibcon#flushed, iclass 13, count 0 2006.232.08:19:22.22#ibcon#about to write, iclass 13, count 0 2006.232.08:19:22.22#ibcon#wrote, iclass 13, count 0 2006.232.08:19:22.22#ibcon#about to read 3, iclass 13, count 0 2006.232.08:19:22.25#ibcon#read 3, iclass 13, count 0 2006.232.08:19:22.25#ibcon#about to read 4, iclass 13, count 0 2006.232.08:19:22.25#ibcon#read 4, iclass 13, count 0 2006.232.08:19:22.25#ibcon#about to read 5, iclass 13, count 0 2006.232.08:19:22.25#ibcon#read 5, iclass 13, count 0 2006.232.08:19:22.25#ibcon#about to read 6, iclass 13, count 0 2006.232.08:19:22.25#ibcon#read 6, iclass 13, count 0 2006.232.08:19:22.25#ibcon#end of sib2, iclass 13, count 0 2006.232.08:19:22.25#ibcon#*after write, iclass 13, count 0 2006.232.08:19:22.25#ibcon#*before return 0, iclass 13, count 0 2006.232.08:19:22.25#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.232.08:19:22.25#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.232.08:19:22.25#ibcon#about to clear, iclass 13 cls_cnt 0 2006.232.08:19:22.25#ibcon#cleared, iclass 13 cls_cnt 0 2006.232.08:19:22.25$vc4f8/vblo=6,752.99 2006.232.08:19:22.25#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.232.08:19:22.25#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.232.08:19:22.25#ibcon#ireg 17 cls_cnt 0 2006.232.08:19:22.25#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.232.08:19:22.25#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.232.08:19:22.25#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.232.08:19:22.25#ibcon#enter wrdev, iclass 15, count 0 2006.232.08:19:22.25#ibcon#first serial, iclass 15, count 0 2006.232.08:19:22.25#ibcon#enter sib2, iclass 15, count 0 2006.232.08:19:22.25#ibcon#flushed, iclass 15, count 0 2006.232.08:19:22.25#ibcon#about to write, iclass 15, count 0 2006.232.08:19:22.25#ibcon#wrote, iclass 15, count 0 2006.232.08:19:22.25#ibcon#about to read 3, iclass 15, count 0 2006.232.08:19:22.27#ibcon#read 3, iclass 15, count 0 2006.232.08:19:22.27#ibcon#about to read 4, iclass 15, count 0 2006.232.08:19:22.27#ibcon#read 4, iclass 15, count 0 2006.232.08:19:22.27#ibcon#about to read 5, iclass 15, count 0 2006.232.08:19:22.27#ibcon#read 5, iclass 15, count 0 2006.232.08:19:22.27#ibcon#about to read 6, iclass 15, count 0 2006.232.08:19:22.27#ibcon#read 6, iclass 15, count 0 2006.232.08:19:22.27#ibcon#end of sib2, iclass 15, count 0 2006.232.08:19:22.27#ibcon#*mode == 0, iclass 15, count 0 2006.232.08:19:22.27#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.232.08:19:22.27#ibcon#[28=FRQ=06,752.99\r\n] 2006.232.08:19:22.27#ibcon#*before write, iclass 15, count 0 2006.232.08:19:22.27#ibcon#enter sib2, iclass 15, count 0 2006.232.08:19:22.27#ibcon#flushed, iclass 15, count 0 2006.232.08:19:22.27#ibcon#about to write, iclass 15, count 0 2006.232.08:19:22.27#ibcon#wrote, iclass 15, count 0 2006.232.08:19:22.27#ibcon#about to read 3, iclass 15, count 0 2006.232.08:19:22.31#ibcon#read 3, iclass 15, count 0 2006.232.08:19:22.31#ibcon#about to read 4, iclass 15, count 0 2006.232.08:19:22.31#ibcon#read 4, iclass 15, count 0 2006.232.08:19:22.31#ibcon#about to read 5, iclass 15, count 0 2006.232.08:19:22.31#ibcon#read 5, iclass 15, count 0 2006.232.08:19:22.31#ibcon#about to read 6, iclass 15, count 0 2006.232.08:19:22.31#ibcon#read 6, iclass 15, count 0 2006.232.08:19:22.31#ibcon#end of sib2, iclass 15, count 0 2006.232.08:19:22.31#ibcon#*after write, iclass 15, count 0 2006.232.08:19:22.31#ibcon#*before return 0, iclass 15, count 0 2006.232.08:19:22.31#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.232.08:19:22.31#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.232.08:19:22.31#ibcon#about to clear, iclass 15 cls_cnt 0 2006.232.08:19:22.31#ibcon#cleared, iclass 15 cls_cnt 0 2006.232.08:19:22.31$vc4f8/vb=6,4 2006.232.08:19:22.31#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.232.08:19:22.31#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.232.08:19:22.31#ibcon#ireg 11 cls_cnt 2 2006.232.08:19:22.31#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.232.08:19:22.37#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.232.08:19:22.37#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.232.08:19:22.37#ibcon#enter wrdev, iclass 17, count 2 2006.232.08:19:22.37#ibcon#first serial, iclass 17, count 2 2006.232.08:19:22.37#ibcon#enter sib2, iclass 17, count 2 2006.232.08:19:22.37#ibcon#flushed, iclass 17, count 2 2006.232.08:19:22.37#ibcon#about to write, iclass 17, count 2 2006.232.08:19:22.37#ibcon#wrote, iclass 17, count 2 2006.232.08:19:22.37#ibcon#about to read 3, iclass 17, count 2 2006.232.08:19:22.39#ibcon#read 3, iclass 17, count 2 2006.232.08:19:22.39#ibcon#about to read 4, iclass 17, count 2 2006.232.08:19:22.39#ibcon#read 4, iclass 17, count 2 2006.232.08:19:22.39#ibcon#about to read 5, iclass 17, count 2 2006.232.08:19:22.39#ibcon#read 5, iclass 17, count 2 2006.232.08:19:22.39#ibcon#about to read 6, iclass 17, count 2 2006.232.08:19:22.39#ibcon#read 6, iclass 17, count 2 2006.232.08:19:22.39#ibcon#end of sib2, iclass 17, count 2 2006.232.08:19:22.39#ibcon#*mode == 0, iclass 17, count 2 2006.232.08:19:22.39#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.232.08:19:22.39#ibcon#[27=AT06-04\r\n] 2006.232.08:19:22.39#ibcon#*before write, iclass 17, count 2 2006.232.08:19:22.39#ibcon#enter sib2, iclass 17, count 2 2006.232.08:19:22.39#ibcon#flushed, iclass 17, count 2 2006.232.08:19:22.39#ibcon#about to write, iclass 17, count 2 2006.232.08:19:22.39#ibcon#wrote, iclass 17, count 2 2006.232.08:19:22.39#ibcon#about to read 3, iclass 17, count 2 2006.232.08:19:22.42#ibcon#read 3, iclass 17, count 2 2006.232.08:19:22.42#ibcon#about to read 4, iclass 17, count 2 2006.232.08:19:22.42#ibcon#read 4, iclass 17, count 2 2006.232.08:19:22.42#ibcon#about to read 5, iclass 17, count 2 2006.232.08:19:22.42#ibcon#read 5, iclass 17, count 2 2006.232.08:19:22.42#ibcon#about to read 6, iclass 17, count 2 2006.232.08:19:22.42#ibcon#read 6, iclass 17, count 2 2006.232.08:19:22.42#ibcon#end of sib2, iclass 17, count 2 2006.232.08:19:22.42#ibcon#*after write, iclass 17, count 2 2006.232.08:19:22.42#ibcon#*before return 0, iclass 17, count 2 2006.232.08:19:22.42#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.232.08:19:22.42#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.232.08:19:22.42#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.232.08:19:22.42#ibcon#ireg 7 cls_cnt 0 2006.232.08:19:22.42#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.232.08:19:22.54#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.232.08:19:22.54#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.232.08:19:22.54#ibcon#enter wrdev, iclass 17, count 0 2006.232.08:19:22.54#ibcon#first serial, iclass 17, count 0 2006.232.08:19:22.54#ibcon#enter sib2, iclass 17, count 0 2006.232.08:19:22.54#ibcon#flushed, iclass 17, count 0 2006.232.08:19:22.54#ibcon#about to write, iclass 17, count 0 2006.232.08:19:22.54#ibcon#wrote, iclass 17, count 0 2006.232.08:19:22.54#ibcon#about to read 3, iclass 17, count 0 2006.232.08:19:22.56#ibcon#read 3, iclass 17, count 0 2006.232.08:19:22.56#ibcon#about to read 4, iclass 17, count 0 2006.232.08:19:22.56#ibcon#read 4, iclass 17, count 0 2006.232.08:19:22.56#ibcon#about to read 5, iclass 17, count 0 2006.232.08:19:22.56#ibcon#read 5, iclass 17, count 0 2006.232.08:19:22.56#ibcon#about to read 6, iclass 17, count 0 2006.232.08:19:22.56#ibcon#read 6, iclass 17, count 0 2006.232.08:19:22.56#ibcon#end of sib2, iclass 17, count 0 2006.232.08:19:22.56#ibcon#*mode == 0, iclass 17, count 0 2006.232.08:19:22.56#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.232.08:19:22.56#ibcon#[27=USB\r\n] 2006.232.08:19:22.56#ibcon#*before write, iclass 17, count 0 2006.232.08:19:22.56#ibcon#enter sib2, iclass 17, count 0 2006.232.08:19:22.56#ibcon#flushed, iclass 17, count 0 2006.232.08:19:22.56#ibcon#about to write, iclass 17, count 0 2006.232.08:19:22.56#ibcon#wrote, iclass 17, count 0 2006.232.08:19:22.56#ibcon#about to read 3, iclass 17, count 0 2006.232.08:19:22.59#ibcon#read 3, iclass 17, count 0 2006.232.08:19:22.59#ibcon#about to read 4, iclass 17, count 0 2006.232.08:19:22.59#ibcon#read 4, iclass 17, count 0 2006.232.08:19:22.59#ibcon#about to read 5, iclass 17, count 0 2006.232.08:19:22.59#ibcon#read 5, iclass 17, count 0 2006.232.08:19:22.59#ibcon#about to read 6, iclass 17, count 0 2006.232.08:19:22.59#ibcon#read 6, iclass 17, count 0 2006.232.08:19:22.59#ibcon#end of sib2, iclass 17, count 0 2006.232.08:19:22.59#ibcon#*after write, iclass 17, count 0 2006.232.08:19:22.59#ibcon#*before return 0, iclass 17, count 0 2006.232.08:19:22.59#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.232.08:19:22.59#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.232.08:19:22.59#ibcon#about to clear, iclass 17 cls_cnt 0 2006.232.08:19:22.59#ibcon#cleared, iclass 17 cls_cnt 0 2006.232.08:19:22.59$vc4f8/vabw=wide 2006.232.08:19:22.59#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.232.08:19:22.59#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.232.08:19:22.59#ibcon#ireg 8 cls_cnt 0 2006.232.08:19:22.59#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.232.08:19:22.59#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.232.08:19:22.59#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.232.08:19:22.59#ibcon#enter wrdev, iclass 19, count 0 2006.232.08:19:22.59#ibcon#first serial, iclass 19, count 0 2006.232.08:19:22.59#ibcon#enter sib2, iclass 19, count 0 2006.232.08:19:22.59#ibcon#flushed, iclass 19, count 0 2006.232.08:19:22.59#ibcon#about to write, iclass 19, count 0 2006.232.08:19:22.59#ibcon#wrote, iclass 19, count 0 2006.232.08:19:22.59#ibcon#about to read 3, iclass 19, count 0 2006.232.08:19:22.61#ibcon#read 3, iclass 19, count 0 2006.232.08:19:22.61#ibcon#about to read 4, iclass 19, count 0 2006.232.08:19:22.61#ibcon#read 4, iclass 19, count 0 2006.232.08:19:22.61#ibcon#about to read 5, iclass 19, count 0 2006.232.08:19:22.61#ibcon#read 5, iclass 19, count 0 2006.232.08:19:22.61#ibcon#about to read 6, iclass 19, count 0 2006.232.08:19:22.61#ibcon#read 6, iclass 19, count 0 2006.232.08:19:22.61#ibcon#end of sib2, iclass 19, count 0 2006.232.08:19:22.61#ibcon#*mode == 0, iclass 19, count 0 2006.232.08:19:22.61#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.232.08:19:22.61#ibcon#[25=BW32\r\n] 2006.232.08:19:22.61#ibcon#*before write, iclass 19, count 0 2006.232.08:19:22.61#ibcon#enter sib2, iclass 19, count 0 2006.232.08:19:22.61#ibcon#flushed, iclass 19, count 0 2006.232.08:19:22.61#ibcon#about to write, iclass 19, count 0 2006.232.08:19:22.61#ibcon#wrote, iclass 19, count 0 2006.232.08:19:22.61#ibcon#about to read 3, iclass 19, count 0 2006.232.08:19:22.64#ibcon#read 3, iclass 19, count 0 2006.232.08:19:22.64#ibcon#about to read 4, iclass 19, count 0 2006.232.08:19:22.64#ibcon#read 4, iclass 19, count 0 2006.232.08:19:22.64#ibcon#about to read 5, iclass 19, count 0 2006.232.08:19:22.64#ibcon#read 5, iclass 19, count 0 2006.232.08:19:22.64#ibcon#about to read 6, iclass 19, count 0 2006.232.08:19:22.64#ibcon#read 6, iclass 19, count 0 2006.232.08:19:22.64#ibcon#end of sib2, iclass 19, count 0 2006.232.08:19:22.64#ibcon#*after write, iclass 19, count 0 2006.232.08:19:22.64#ibcon#*before return 0, iclass 19, count 0 2006.232.08:19:22.64#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.232.08:19:22.64#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.232.08:19:22.64#ibcon#about to clear, iclass 19 cls_cnt 0 2006.232.08:19:22.64#ibcon#cleared, iclass 19 cls_cnt 0 2006.232.08:19:22.64$vc4f8/vbbw=wide 2006.232.08:19:22.64#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.232.08:19:22.64#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.232.08:19:22.64#ibcon#ireg 8 cls_cnt 0 2006.232.08:19:22.64#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.232.08:19:22.71#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.232.08:19:22.71#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.232.08:19:22.71#ibcon#enter wrdev, iclass 21, count 0 2006.232.08:19:22.71#ibcon#first serial, iclass 21, count 0 2006.232.08:19:22.71#ibcon#enter sib2, iclass 21, count 0 2006.232.08:19:22.71#ibcon#flushed, iclass 21, count 0 2006.232.08:19:22.71#ibcon#about to write, iclass 21, count 0 2006.232.08:19:22.71#ibcon#wrote, iclass 21, count 0 2006.232.08:19:22.71#ibcon#about to read 3, iclass 21, count 0 2006.232.08:19:22.73#ibcon#read 3, iclass 21, count 0 2006.232.08:19:22.73#ibcon#about to read 4, iclass 21, count 0 2006.232.08:19:22.73#ibcon#read 4, iclass 21, count 0 2006.232.08:19:22.73#ibcon#about to read 5, iclass 21, count 0 2006.232.08:19:22.73#ibcon#read 5, iclass 21, count 0 2006.232.08:19:22.73#ibcon#about to read 6, iclass 21, count 0 2006.232.08:19:22.73#ibcon#read 6, iclass 21, count 0 2006.232.08:19:22.73#ibcon#end of sib2, iclass 21, count 0 2006.232.08:19:22.73#ibcon#*mode == 0, iclass 21, count 0 2006.232.08:19:22.73#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.232.08:19:22.73#ibcon#[27=BW32\r\n] 2006.232.08:19:22.73#ibcon#*before write, iclass 21, count 0 2006.232.08:19:22.73#ibcon#enter sib2, iclass 21, count 0 2006.232.08:19:22.73#ibcon#flushed, iclass 21, count 0 2006.232.08:19:22.73#ibcon#about to write, iclass 21, count 0 2006.232.08:19:22.73#ibcon#wrote, iclass 21, count 0 2006.232.08:19:22.73#ibcon#about to read 3, iclass 21, count 0 2006.232.08:19:22.76#ibcon#read 3, iclass 21, count 0 2006.232.08:19:22.76#ibcon#about to read 4, iclass 21, count 0 2006.232.08:19:22.76#ibcon#read 4, iclass 21, count 0 2006.232.08:19:22.76#ibcon#about to read 5, iclass 21, count 0 2006.232.08:19:22.76#ibcon#read 5, iclass 21, count 0 2006.232.08:19:22.76#ibcon#about to read 6, iclass 21, count 0 2006.232.08:19:22.76#ibcon#read 6, iclass 21, count 0 2006.232.08:19:22.76#ibcon#end of sib2, iclass 21, count 0 2006.232.08:19:22.76#ibcon#*after write, iclass 21, count 0 2006.232.08:19:22.76#ibcon#*before return 0, iclass 21, count 0 2006.232.08:19:22.76#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.232.08:19:22.76#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.232.08:19:22.76#ibcon#about to clear, iclass 21 cls_cnt 0 2006.232.08:19:22.76#ibcon#cleared, iclass 21 cls_cnt 0 2006.232.08:19:22.76$4f8m12a/ifd4f 2006.232.08:19:22.76$ifd4f/lo= 2006.232.08:19:22.76$ifd4f/lo=lo1,7680.00,usb,rcp,1 2006.232.08:19:22.76$ifd4f/lo=lo2,1600.00,usb,rcp,1 2006.232.08:19:22.76$ifd4f/lo=lo3,8080.00,usb,rcp,1 2006.232.08:19:22.76$ifd4f/patch= 2006.232.08:19:22.76$ifd4f/patch=lo1,a1,a2,a3,a4 2006.232.08:19:22.76$ifd4f/patch=lo2,b1,b2,b3,b4,b5,b6 2006.232.08:19:22.77$ifd4f/patch=lo3,a5,a6,a7,a8 2006.232.08:19:22.77$4f8m12a/"form=m,16.000,1:2 2006.232.08:19:22.77$4f8m12a/"tpicd 2006.232.08:19:22.77$4f8m12a/echo=off 2006.232.08:19:22.77$4f8m12a/xlog=off 2006.232.08:19:22.77:!2006.232.08:20:50 2006.232.08:19:38.14#trakl#Source acquired 2006.232.08:19:38.14#flagr#flagr/antenna,acquired 2006.232.08:20:50.01:preob 2006.232.08:20:51.14/onsource/TRACKING 2006.232.08:20:51.14:!2006.232.08:21:00 2006.232.08:21:00.00:data_valid=on 2006.232.08:21:00.00:midob 2006.232.08:21:00.14/onsource/TRACKING 2006.232.08:21:00.14/wx/29.20,1007.4,90 2006.232.08:21:00.34/cable/+6.3891E-03 2006.232.08:21:01.43/va/01,08,usb,yes,30,32 2006.232.08:21:01.43/va/02,07,usb,yes,30,32 2006.232.08:21:01.43/va/03,08,usb,yes,23,23 2006.232.08:21:01.43/va/04,07,usb,yes,31,34 2006.232.08:21:01.43/va/05,07,usb,yes,35,37 2006.232.08:21:01.43/va/06,06,usb,yes,34,34 2006.232.08:21:01.43/va/07,06,usb,yes,35,35 2006.232.08:21:01.43/va/08,06,usb,yes,37,37 2006.232.08:21:01.66/valo/01,532.99,yes,locked 2006.232.08:21:01.66/valo/02,572.99,yes,locked 2006.232.08:21:01.66/valo/03,672.99,yes,locked 2006.232.08:21:01.66/valo/04,832.99,yes,locked 2006.232.08:21:01.66/valo/05,652.99,yes,locked 2006.232.08:21:01.66/valo/06,772.99,yes,locked 2006.232.08:21:01.66/valo/07,832.99,yes,locked 2006.232.08:21:01.66/valo/08,852.99,yes,locked 2006.232.08:21:02.75/vb/01,04,usb,yes,30,29 2006.232.08:21:02.75/vb/02,04,usb,yes,32,33 2006.232.08:21:02.75/vb/03,04,usb,yes,28,32 2006.232.08:21:02.75/vb/04,04,usb,yes,29,29 2006.232.08:21:02.75/vb/05,03,usb,yes,34,39 2006.232.08:21:02.75/vb/06,04,usb,yes,28,31 2006.232.08:21:02.75/vb/07,04,usb,yes,31,31 2006.232.08:21:02.75/vb/08,04,usb,yes,28,31 2006.232.08:21:02.99/vblo/01,632.99,yes,locked 2006.232.08:21:02.99/vblo/02,640.99,yes,locked 2006.232.08:21:02.99/vblo/03,656.99,yes,locked 2006.232.08:21:02.99/vblo/04,712.99,yes,locked 2006.232.08:21:02.99/vblo/05,744.99,yes,locked 2006.232.08:21:02.99/vblo/06,752.99,yes,locked 2006.232.08:21:02.99/vblo/07,734.99,yes,locked 2006.232.08:21:02.99/vblo/08,744.99,yes,locked 2006.232.08:21:03.14/vabw/8 2006.232.08:21:03.29/vbbw/8 2006.232.08:21:03.40/xfe/off,on,14.0 2006.232.08:21:03.77/ifatt/23,28,28,28 2006.232.08:21:04.07/fmout-gps/S +4.58E-07 2006.232.08:21:04.11:!2006.232.08:22:00 2006.232.08:22:00.00:data_valid=off 2006.232.08:22:00.01:postob 2006.232.08:22:00.18/cable/+6.3872E-03 2006.232.08:22:00.22/wx/29.18,1007.4,90 2006.232.08:22:01.07/fmout-gps/S +4.57E-07 2006.232.08:22:01.07:scan_name=232-0824,k06232,60 2006.232.08:22:01.07:source=1803+784,180045.68,782804.0,2000.0,neutral 2006.232.08:22:01.14#flagr#flagr/antenna,new-source 2006.232.08:22:02.14:checkk5 2006.232.08:22:02.49/chk_autoobs//k5ts1/ autoobs is running! 2006.232.08:22:02.86/chk_autoobs//k5ts2/ autoobs is running! 2006.232.08:22:03.24/chk_autoobs//k5ts3/ autoobs is running! 2006.232.08:22:03.62/chk_autoobs//k5ts4/ autoobs is running! 2006.232.08:22:03.98/chk_obsdata//k5ts1/T2320821??a.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.08:22:04.34/chk_obsdata//k5ts2/T2320821??b.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.08:22:04.72/chk_obsdata//k5ts3/T2320821??c.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.08:22:05.09/chk_obsdata//k5ts4/T2320821??d.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.08:22:05.78/k5log//k5ts1_log_newline 2006.232.08:22:06.46/k5log//k5ts2_log_newline 2006.232.08:22:07.15/k5log//k5ts3_log_newline 2006.232.08:22:07.84/k5log//k5ts4_log_newline 2006.232.08:22:07.86/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.232.08:22:07.86:4f8m12a=3 2006.232.08:22:07.86$4f8m12a/echo=on 2006.232.08:22:07.86$4f8m12a/pcalon 2006.232.08:22:07.86$pcalon/"no phase cal control is implemented here 2006.232.08:22:07.86$4f8m12a/"tpicd=stop 2006.232.08:22:07.86$4f8m12a/vc4f8 2006.232.08:22:07.86$vc4f8/valo=1,532.99 2006.232.08:22:07.87#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.232.08:22:07.87#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.232.08:22:07.87#ibcon#ireg 17 cls_cnt 0 2006.232.08:22:07.87#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.232.08:22:07.87#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.232.08:22:07.87#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.232.08:22:07.87#ibcon#enter wrdev, iclass 16, count 0 2006.232.08:22:07.87#ibcon#first serial, iclass 16, count 0 2006.232.08:22:07.87#ibcon#enter sib2, iclass 16, count 0 2006.232.08:22:07.87#ibcon#flushed, iclass 16, count 0 2006.232.08:22:07.87#ibcon#about to write, iclass 16, count 0 2006.232.08:22:07.87#ibcon#wrote, iclass 16, count 0 2006.232.08:22:07.87#ibcon#about to read 3, iclass 16, count 0 2006.232.08:22:07.90#ibcon#read 3, iclass 16, count 0 2006.232.08:22:07.90#ibcon#about to read 4, iclass 16, count 0 2006.232.08:22:07.90#ibcon#read 4, iclass 16, count 0 2006.232.08:22:07.90#ibcon#about to read 5, iclass 16, count 0 2006.232.08:22:07.90#ibcon#read 5, iclass 16, count 0 2006.232.08:22:07.90#ibcon#about to read 6, iclass 16, count 0 2006.232.08:22:07.90#ibcon#read 6, iclass 16, count 0 2006.232.08:22:07.90#ibcon#end of sib2, iclass 16, count 0 2006.232.08:22:07.90#ibcon#*mode == 0, iclass 16, count 0 2006.232.08:22:07.90#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.232.08:22:07.90#ibcon#[26=FRQ=01,532.99\r\n] 2006.232.08:22:07.90#ibcon#*before write, iclass 16, count 0 2006.232.08:22:07.90#ibcon#enter sib2, iclass 16, count 0 2006.232.08:22:07.90#ibcon#flushed, iclass 16, count 0 2006.232.08:22:07.90#ibcon#about to write, iclass 16, count 0 2006.232.08:22:07.90#ibcon#wrote, iclass 16, count 0 2006.232.08:22:07.90#ibcon#about to read 3, iclass 16, count 0 2006.232.08:22:07.95#ibcon#read 3, iclass 16, count 0 2006.232.08:22:07.95#ibcon#about to read 4, iclass 16, count 0 2006.232.08:22:07.95#ibcon#read 4, iclass 16, count 0 2006.232.08:22:07.95#ibcon#about to read 5, iclass 16, count 0 2006.232.08:22:07.95#ibcon#read 5, iclass 16, count 0 2006.232.08:22:07.95#ibcon#about to read 6, iclass 16, count 0 2006.232.08:22:07.95#ibcon#read 6, iclass 16, count 0 2006.232.08:22:07.95#ibcon#end of sib2, iclass 16, count 0 2006.232.08:22:07.95#ibcon#*after write, iclass 16, count 0 2006.232.08:22:07.95#ibcon#*before return 0, iclass 16, count 0 2006.232.08:22:07.95#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.232.08:22:07.95#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.232.08:22:07.95#ibcon#about to clear, iclass 16 cls_cnt 0 2006.232.08:22:07.95#ibcon#cleared, iclass 16 cls_cnt 0 2006.232.08:22:07.95$vc4f8/va=1,8 2006.232.08:22:07.95#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.232.08:22:07.95#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.232.08:22:07.95#ibcon#ireg 11 cls_cnt 2 2006.232.08:22:07.95#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.232.08:22:07.95#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.232.08:22:07.95#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.232.08:22:07.95#ibcon#enter wrdev, iclass 18, count 2 2006.232.08:22:07.95#ibcon#first serial, iclass 18, count 2 2006.232.08:22:07.95#ibcon#enter sib2, iclass 18, count 2 2006.232.08:22:07.95#ibcon#flushed, iclass 18, count 2 2006.232.08:22:07.95#ibcon#about to write, iclass 18, count 2 2006.232.08:22:07.95#ibcon#wrote, iclass 18, count 2 2006.232.08:22:07.95#ibcon#about to read 3, iclass 18, count 2 2006.232.08:22:07.97#ibcon#read 3, iclass 18, count 2 2006.232.08:22:07.97#ibcon#about to read 4, iclass 18, count 2 2006.232.08:22:07.97#ibcon#read 4, iclass 18, count 2 2006.232.08:22:07.97#ibcon#about to read 5, iclass 18, count 2 2006.232.08:22:07.97#ibcon#read 5, iclass 18, count 2 2006.232.08:22:07.97#ibcon#about to read 6, iclass 18, count 2 2006.232.08:22:07.97#ibcon#read 6, iclass 18, count 2 2006.232.08:22:07.97#ibcon#end of sib2, iclass 18, count 2 2006.232.08:22:07.97#ibcon#*mode == 0, iclass 18, count 2 2006.232.08:22:07.97#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.232.08:22:07.97#ibcon#[25=AT01-08\r\n] 2006.232.08:22:07.97#ibcon#*before write, iclass 18, count 2 2006.232.08:22:07.97#ibcon#enter sib2, iclass 18, count 2 2006.232.08:22:07.97#ibcon#flushed, iclass 18, count 2 2006.232.08:22:07.97#ibcon#about to write, iclass 18, count 2 2006.232.08:22:07.97#ibcon#wrote, iclass 18, count 2 2006.232.08:22:07.97#ibcon#about to read 3, iclass 18, count 2 2006.232.08:22:08.00#ibcon#read 3, iclass 18, count 2 2006.232.08:22:08.00#ibcon#about to read 4, iclass 18, count 2 2006.232.08:22:08.00#ibcon#read 4, iclass 18, count 2 2006.232.08:22:08.00#ibcon#about to read 5, iclass 18, count 2 2006.232.08:22:08.00#ibcon#read 5, iclass 18, count 2 2006.232.08:22:08.00#ibcon#about to read 6, iclass 18, count 2 2006.232.08:22:08.00#ibcon#read 6, iclass 18, count 2 2006.232.08:22:08.00#ibcon#end of sib2, iclass 18, count 2 2006.232.08:22:08.00#ibcon#*after write, iclass 18, count 2 2006.232.08:22:08.00#ibcon#*before return 0, iclass 18, count 2 2006.232.08:22:08.00#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.232.08:22:08.00#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.232.08:22:08.00#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.232.08:22:08.00#ibcon#ireg 7 cls_cnt 0 2006.232.08:22:08.00#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.232.08:22:08.12#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.232.08:22:08.12#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.232.08:22:08.12#ibcon#enter wrdev, iclass 18, count 0 2006.232.08:22:08.12#ibcon#first serial, iclass 18, count 0 2006.232.08:22:08.12#ibcon#enter sib2, iclass 18, count 0 2006.232.08:22:08.12#ibcon#flushed, iclass 18, count 0 2006.232.08:22:08.12#ibcon#about to write, iclass 18, count 0 2006.232.08:22:08.12#ibcon#wrote, iclass 18, count 0 2006.232.08:22:08.12#ibcon#about to read 3, iclass 18, count 0 2006.232.08:22:08.14#ibcon#read 3, iclass 18, count 0 2006.232.08:22:08.14#ibcon#about to read 4, iclass 18, count 0 2006.232.08:22:08.14#ibcon#read 4, iclass 18, count 0 2006.232.08:22:08.14#ibcon#about to read 5, iclass 18, count 0 2006.232.08:22:08.14#ibcon#read 5, iclass 18, count 0 2006.232.08:22:08.14#ibcon#about to read 6, iclass 18, count 0 2006.232.08:22:08.14#ibcon#read 6, iclass 18, count 0 2006.232.08:22:08.14#ibcon#end of sib2, iclass 18, count 0 2006.232.08:22:08.14#ibcon#*mode == 0, iclass 18, count 0 2006.232.08:22:08.14#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.232.08:22:08.14#ibcon#[25=USB\r\n] 2006.232.08:22:08.14#ibcon#*before write, iclass 18, count 0 2006.232.08:22:08.14#ibcon#enter sib2, iclass 18, count 0 2006.232.08:22:08.14#ibcon#flushed, iclass 18, count 0 2006.232.08:22:08.14#ibcon#about to write, iclass 18, count 0 2006.232.08:22:08.14#ibcon#wrote, iclass 18, count 0 2006.232.08:22:08.14#ibcon#about to read 3, iclass 18, count 0 2006.232.08:22:08.17#ibcon#read 3, iclass 18, count 0 2006.232.08:22:08.17#ibcon#about to read 4, iclass 18, count 0 2006.232.08:22:08.17#ibcon#read 4, iclass 18, count 0 2006.232.08:22:08.17#ibcon#about to read 5, iclass 18, count 0 2006.232.08:22:08.17#ibcon#read 5, iclass 18, count 0 2006.232.08:22:08.17#ibcon#about to read 6, iclass 18, count 0 2006.232.08:22:08.17#ibcon#read 6, iclass 18, count 0 2006.232.08:22:08.17#ibcon#end of sib2, iclass 18, count 0 2006.232.08:22:08.17#ibcon#*after write, iclass 18, count 0 2006.232.08:22:08.17#ibcon#*before return 0, iclass 18, count 0 2006.232.08:22:08.17#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.232.08:22:08.17#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.232.08:22:08.17#ibcon#about to clear, iclass 18 cls_cnt 0 2006.232.08:22:08.17#ibcon#cleared, iclass 18 cls_cnt 0 2006.232.08:22:08.17$vc4f8/valo=2,572.99 2006.232.08:22:08.17#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.232.08:22:08.17#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.232.08:22:08.17#ibcon#ireg 17 cls_cnt 0 2006.232.08:22:08.17#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.232.08:22:08.17#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.232.08:22:08.17#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.232.08:22:08.17#ibcon#enter wrdev, iclass 20, count 0 2006.232.08:22:08.17#ibcon#first serial, iclass 20, count 0 2006.232.08:22:08.17#ibcon#enter sib2, iclass 20, count 0 2006.232.08:22:08.17#ibcon#flushed, iclass 20, count 0 2006.232.08:22:08.17#ibcon#about to write, iclass 20, count 0 2006.232.08:22:08.17#ibcon#wrote, iclass 20, count 0 2006.232.08:22:08.17#ibcon#about to read 3, iclass 20, count 0 2006.232.08:22:08.19#ibcon#read 3, iclass 20, count 0 2006.232.08:22:08.19#ibcon#about to read 4, iclass 20, count 0 2006.232.08:22:08.19#ibcon#read 4, iclass 20, count 0 2006.232.08:22:08.19#ibcon#about to read 5, iclass 20, count 0 2006.232.08:22:08.19#ibcon#read 5, iclass 20, count 0 2006.232.08:22:08.19#ibcon#about to read 6, iclass 20, count 0 2006.232.08:22:08.19#ibcon#read 6, iclass 20, count 0 2006.232.08:22:08.19#ibcon#end of sib2, iclass 20, count 0 2006.232.08:22:08.19#ibcon#*mode == 0, iclass 20, count 0 2006.232.08:22:08.19#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.232.08:22:08.19#ibcon#[26=FRQ=02,572.99\r\n] 2006.232.08:22:08.19#ibcon#*before write, iclass 20, count 0 2006.232.08:22:08.19#ibcon#enter sib2, iclass 20, count 0 2006.232.08:22:08.19#ibcon#flushed, iclass 20, count 0 2006.232.08:22:08.19#ibcon#about to write, iclass 20, count 0 2006.232.08:22:08.19#ibcon#wrote, iclass 20, count 0 2006.232.08:22:08.19#ibcon#about to read 3, iclass 20, count 0 2006.232.08:22:08.23#ibcon#read 3, iclass 20, count 0 2006.232.08:22:08.23#ibcon#about to read 4, iclass 20, count 0 2006.232.08:22:08.23#ibcon#read 4, iclass 20, count 0 2006.232.08:22:08.23#ibcon#about to read 5, iclass 20, count 0 2006.232.08:22:08.23#ibcon#read 5, iclass 20, count 0 2006.232.08:22:08.23#ibcon#about to read 6, iclass 20, count 0 2006.232.08:22:08.23#ibcon#read 6, iclass 20, count 0 2006.232.08:22:08.23#ibcon#end of sib2, iclass 20, count 0 2006.232.08:22:08.23#ibcon#*after write, iclass 20, count 0 2006.232.08:22:08.23#ibcon#*before return 0, iclass 20, count 0 2006.232.08:22:08.23#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.232.08:22:08.23#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.232.08:22:08.23#ibcon#about to clear, iclass 20 cls_cnt 0 2006.232.08:22:08.23#ibcon#cleared, iclass 20 cls_cnt 0 2006.232.08:22:08.23$vc4f8/va=2,7 2006.232.08:22:08.23#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.232.08:22:08.23#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.232.08:22:08.23#ibcon#ireg 11 cls_cnt 2 2006.232.08:22:08.23#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.232.08:22:08.29#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.232.08:22:08.29#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.232.08:22:08.29#ibcon#enter wrdev, iclass 22, count 2 2006.232.08:22:08.29#ibcon#first serial, iclass 22, count 2 2006.232.08:22:08.29#ibcon#enter sib2, iclass 22, count 2 2006.232.08:22:08.29#ibcon#flushed, iclass 22, count 2 2006.232.08:22:08.29#ibcon#about to write, iclass 22, count 2 2006.232.08:22:08.29#ibcon#wrote, iclass 22, count 2 2006.232.08:22:08.29#ibcon#about to read 3, iclass 22, count 2 2006.232.08:22:08.31#ibcon#read 3, iclass 22, count 2 2006.232.08:22:08.31#ibcon#about to read 4, iclass 22, count 2 2006.232.08:22:08.31#ibcon#read 4, iclass 22, count 2 2006.232.08:22:08.31#ibcon#about to read 5, iclass 22, count 2 2006.232.08:22:08.31#ibcon#read 5, iclass 22, count 2 2006.232.08:22:08.31#ibcon#about to read 6, iclass 22, count 2 2006.232.08:22:08.31#ibcon#read 6, iclass 22, count 2 2006.232.08:22:08.31#ibcon#end of sib2, iclass 22, count 2 2006.232.08:22:08.31#ibcon#*mode == 0, iclass 22, count 2 2006.232.08:22:08.31#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.232.08:22:08.31#ibcon#[25=AT02-07\r\n] 2006.232.08:22:08.31#ibcon#*before write, iclass 22, count 2 2006.232.08:22:08.31#ibcon#enter sib2, iclass 22, count 2 2006.232.08:22:08.31#ibcon#flushed, iclass 22, count 2 2006.232.08:22:08.31#ibcon#about to write, iclass 22, count 2 2006.232.08:22:08.31#ibcon#wrote, iclass 22, count 2 2006.232.08:22:08.31#ibcon#about to read 3, iclass 22, count 2 2006.232.08:22:08.34#ibcon#read 3, iclass 22, count 2 2006.232.08:22:08.34#ibcon#about to read 4, iclass 22, count 2 2006.232.08:22:08.34#ibcon#read 4, iclass 22, count 2 2006.232.08:22:08.34#ibcon#about to read 5, iclass 22, count 2 2006.232.08:22:08.34#ibcon#read 5, iclass 22, count 2 2006.232.08:22:08.34#ibcon#about to read 6, iclass 22, count 2 2006.232.08:22:08.34#ibcon#read 6, iclass 22, count 2 2006.232.08:22:08.34#ibcon#end of sib2, iclass 22, count 2 2006.232.08:22:08.34#ibcon#*after write, iclass 22, count 2 2006.232.08:22:08.34#ibcon#*before return 0, iclass 22, count 2 2006.232.08:22:08.34#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.232.08:22:08.34#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.232.08:22:08.34#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.232.08:22:08.34#ibcon#ireg 7 cls_cnt 0 2006.232.08:22:08.34#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.232.08:22:08.46#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.232.08:22:08.46#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.232.08:22:08.46#ibcon#enter wrdev, iclass 22, count 0 2006.232.08:22:08.46#ibcon#first serial, iclass 22, count 0 2006.232.08:22:08.46#ibcon#enter sib2, iclass 22, count 0 2006.232.08:22:08.46#ibcon#flushed, iclass 22, count 0 2006.232.08:22:08.46#ibcon#about to write, iclass 22, count 0 2006.232.08:22:08.46#ibcon#wrote, iclass 22, count 0 2006.232.08:22:08.46#ibcon#about to read 3, iclass 22, count 0 2006.232.08:22:08.48#ibcon#read 3, iclass 22, count 0 2006.232.08:22:08.48#ibcon#about to read 4, iclass 22, count 0 2006.232.08:22:08.48#ibcon#read 4, iclass 22, count 0 2006.232.08:22:08.48#ibcon#about to read 5, iclass 22, count 0 2006.232.08:22:08.48#ibcon#read 5, iclass 22, count 0 2006.232.08:22:08.48#ibcon#about to read 6, iclass 22, count 0 2006.232.08:22:08.48#ibcon#read 6, iclass 22, count 0 2006.232.08:22:08.48#ibcon#end of sib2, iclass 22, count 0 2006.232.08:22:08.48#ibcon#*mode == 0, iclass 22, count 0 2006.232.08:22:08.48#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.232.08:22:08.48#ibcon#[25=USB\r\n] 2006.232.08:22:08.48#ibcon#*before write, iclass 22, count 0 2006.232.08:22:08.48#ibcon#enter sib2, iclass 22, count 0 2006.232.08:22:08.48#ibcon#flushed, iclass 22, count 0 2006.232.08:22:08.48#ibcon#about to write, iclass 22, count 0 2006.232.08:22:08.48#ibcon#wrote, iclass 22, count 0 2006.232.08:22:08.48#ibcon#about to read 3, iclass 22, count 0 2006.232.08:22:08.51#ibcon#read 3, iclass 22, count 0 2006.232.08:22:08.51#ibcon#about to read 4, iclass 22, count 0 2006.232.08:22:08.51#ibcon#read 4, iclass 22, count 0 2006.232.08:22:08.51#ibcon#about to read 5, iclass 22, count 0 2006.232.08:22:08.51#ibcon#read 5, iclass 22, count 0 2006.232.08:22:08.51#ibcon#about to read 6, iclass 22, count 0 2006.232.08:22:08.51#ibcon#read 6, iclass 22, count 0 2006.232.08:22:08.51#ibcon#end of sib2, iclass 22, count 0 2006.232.08:22:08.51#ibcon#*after write, iclass 22, count 0 2006.232.08:22:08.51#ibcon#*before return 0, iclass 22, count 0 2006.232.08:22:08.51#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.232.08:22:08.51#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.232.08:22:08.51#ibcon#about to clear, iclass 22 cls_cnt 0 2006.232.08:22:08.51#ibcon#cleared, iclass 22 cls_cnt 0 2006.232.08:22:08.51$vc4f8/valo=3,672.99 2006.232.08:22:08.51#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.232.08:22:08.51#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.232.08:22:08.51#ibcon#ireg 17 cls_cnt 0 2006.232.08:22:08.51#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.232.08:22:08.51#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.232.08:22:08.51#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.232.08:22:08.51#ibcon#enter wrdev, iclass 24, count 0 2006.232.08:22:08.51#ibcon#first serial, iclass 24, count 0 2006.232.08:22:08.51#ibcon#enter sib2, iclass 24, count 0 2006.232.08:22:08.51#ibcon#flushed, iclass 24, count 0 2006.232.08:22:08.51#ibcon#about to write, iclass 24, count 0 2006.232.08:22:08.51#ibcon#wrote, iclass 24, count 0 2006.232.08:22:08.51#ibcon#about to read 3, iclass 24, count 0 2006.232.08:22:08.53#ibcon#read 3, iclass 24, count 0 2006.232.08:22:08.53#ibcon#about to read 4, iclass 24, count 0 2006.232.08:22:08.53#ibcon#read 4, iclass 24, count 0 2006.232.08:22:08.53#ibcon#about to read 5, iclass 24, count 0 2006.232.08:22:08.53#ibcon#read 5, iclass 24, count 0 2006.232.08:22:08.53#ibcon#about to read 6, iclass 24, count 0 2006.232.08:22:08.53#ibcon#read 6, iclass 24, count 0 2006.232.08:22:08.53#ibcon#end of sib2, iclass 24, count 0 2006.232.08:22:08.53#ibcon#*mode == 0, iclass 24, count 0 2006.232.08:22:08.53#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.232.08:22:08.53#ibcon#[26=FRQ=03,672.99\r\n] 2006.232.08:22:08.53#ibcon#*before write, iclass 24, count 0 2006.232.08:22:08.53#ibcon#enter sib2, iclass 24, count 0 2006.232.08:22:08.53#ibcon#flushed, iclass 24, count 0 2006.232.08:22:08.53#ibcon#about to write, iclass 24, count 0 2006.232.08:22:08.53#ibcon#wrote, iclass 24, count 0 2006.232.08:22:08.53#ibcon#about to read 3, iclass 24, count 0 2006.232.08:22:08.57#ibcon#read 3, iclass 24, count 0 2006.232.08:22:08.57#ibcon#about to read 4, iclass 24, count 0 2006.232.08:22:08.57#ibcon#read 4, iclass 24, count 0 2006.232.08:22:08.57#ibcon#about to read 5, iclass 24, count 0 2006.232.08:22:08.57#ibcon#read 5, iclass 24, count 0 2006.232.08:22:08.57#ibcon#about to read 6, iclass 24, count 0 2006.232.08:22:08.57#ibcon#read 6, iclass 24, count 0 2006.232.08:22:08.57#ibcon#end of sib2, iclass 24, count 0 2006.232.08:22:08.57#ibcon#*after write, iclass 24, count 0 2006.232.08:22:08.57#ibcon#*before return 0, iclass 24, count 0 2006.232.08:22:08.57#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.232.08:22:08.57#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.232.08:22:08.57#ibcon#about to clear, iclass 24 cls_cnt 0 2006.232.08:22:08.57#ibcon#cleared, iclass 24 cls_cnt 0 2006.232.08:22:08.57$vc4f8/va=3,8 2006.232.08:22:08.57#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.232.08:22:08.57#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.232.08:22:08.57#ibcon#ireg 11 cls_cnt 2 2006.232.08:22:08.57#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.232.08:22:08.63#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.232.08:22:08.63#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.232.08:22:08.63#ibcon#enter wrdev, iclass 26, count 2 2006.232.08:22:08.63#ibcon#first serial, iclass 26, count 2 2006.232.08:22:08.63#ibcon#enter sib2, iclass 26, count 2 2006.232.08:22:08.63#ibcon#flushed, iclass 26, count 2 2006.232.08:22:08.63#ibcon#about to write, iclass 26, count 2 2006.232.08:22:08.63#ibcon#wrote, iclass 26, count 2 2006.232.08:22:08.63#ibcon#about to read 3, iclass 26, count 2 2006.232.08:22:08.65#ibcon#read 3, iclass 26, count 2 2006.232.08:22:08.65#ibcon#about to read 4, iclass 26, count 2 2006.232.08:22:08.65#ibcon#read 4, iclass 26, count 2 2006.232.08:22:08.65#ibcon#about to read 5, iclass 26, count 2 2006.232.08:22:08.65#ibcon#read 5, iclass 26, count 2 2006.232.08:22:08.65#ibcon#about to read 6, iclass 26, count 2 2006.232.08:22:08.65#ibcon#read 6, iclass 26, count 2 2006.232.08:22:08.65#ibcon#end of sib2, iclass 26, count 2 2006.232.08:22:08.65#ibcon#*mode == 0, iclass 26, count 2 2006.232.08:22:08.65#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.232.08:22:08.65#ibcon#[25=AT03-08\r\n] 2006.232.08:22:08.65#ibcon#*before write, iclass 26, count 2 2006.232.08:22:08.65#ibcon#enter sib2, iclass 26, count 2 2006.232.08:22:08.65#ibcon#flushed, iclass 26, count 2 2006.232.08:22:08.65#ibcon#about to write, iclass 26, count 2 2006.232.08:22:08.65#ibcon#wrote, iclass 26, count 2 2006.232.08:22:08.65#ibcon#about to read 3, iclass 26, count 2 2006.232.08:22:08.68#ibcon#read 3, iclass 26, count 2 2006.232.08:22:08.68#ibcon#about to read 4, iclass 26, count 2 2006.232.08:22:08.68#ibcon#read 4, iclass 26, count 2 2006.232.08:22:08.68#ibcon#about to read 5, iclass 26, count 2 2006.232.08:22:08.68#ibcon#read 5, iclass 26, count 2 2006.232.08:22:08.68#ibcon#about to read 6, iclass 26, count 2 2006.232.08:22:08.68#ibcon#read 6, iclass 26, count 2 2006.232.08:22:08.68#ibcon#end of sib2, iclass 26, count 2 2006.232.08:22:08.68#ibcon#*after write, iclass 26, count 2 2006.232.08:22:08.68#ibcon#*before return 0, iclass 26, count 2 2006.232.08:22:08.68#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.232.08:22:08.68#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.232.08:22:08.68#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.232.08:22:08.68#ibcon#ireg 7 cls_cnt 0 2006.232.08:22:08.68#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.232.08:22:08.80#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.232.08:22:08.80#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.232.08:22:08.80#ibcon#enter wrdev, iclass 26, count 0 2006.232.08:22:08.80#ibcon#first serial, iclass 26, count 0 2006.232.08:22:08.80#ibcon#enter sib2, iclass 26, count 0 2006.232.08:22:08.80#ibcon#flushed, iclass 26, count 0 2006.232.08:22:08.80#ibcon#about to write, iclass 26, count 0 2006.232.08:22:08.80#ibcon#wrote, iclass 26, count 0 2006.232.08:22:08.80#ibcon#about to read 3, iclass 26, count 0 2006.232.08:22:08.82#ibcon#read 3, iclass 26, count 0 2006.232.08:22:08.82#ibcon#about to read 4, iclass 26, count 0 2006.232.08:22:08.82#ibcon#read 4, iclass 26, count 0 2006.232.08:22:08.82#ibcon#about to read 5, iclass 26, count 0 2006.232.08:22:08.82#ibcon#read 5, iclass 26, count 0 2006.232.08:22:08.82#ibcon#about to read 6, iclass 26, count 0 2006.232.08:22:08.82#ibcon#read 6, iclass 26, count 0 2006.232.08:22:08.82#ibcon#end of sib2, iclass 26, count 0 2006.232.08:22:08.82#ibcon#*mode == 0, iclass 26, count 0 2006.232.08:22:08.82#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.232.08:22:08.82#ibcon#[25=USB\r\n] 2006.232.08:22:08.82#ibcon#*before write, iclass 26, count 0 2006.232.08:22:08.82#ibcon#enter sib2, iclass 26, count 0 2006.232.08:22:08.82#ibcon#flushed, iclass 26, count 0 2006.232.08:22:08.82#ibcon#about to write, iclass 26, count 0 2006.232.08:22:08.82#ibcon#wrote, iclass 26, count 0 2006.232.08:22:08.82#ibcon#about to read 3, iclass 26, count 0 2006.232.08:22:08.84#abcon#<5=/05 3.3 6.3 29.18 901007.4\r\n> 2006.232.08:22:08.85#ibcon#read 3, iclass 26, count 0 2006.232.08:22:08.85#ibcon#about to read 4, iclass 26, count 0 2006.232.08:22:08.85#ibcon#read 4, iclass 26, count 0 2006.232.08:22:08.85#ibcon#about to read 5, iclass 26, count 0 2006.232.08:22:08.85#ibcon#read 5, iclass 26, count 0 2006.232.08:22:08.85#ibcon#about to read 6, iclass 26, count 0 2006.232.08:22:08.85#ibcon#read 6, iclass 26, count 0 2006.232.08:22:08.85#ibcon#end of sib2, iclass 26, count 0 2006.232.08:22:08.85#ibcon#*after write, iclass 26, count 0 2006.232.08:22:08.85#ibcon#*before return 0, iclass 26, count 0 2006.232.08:22:08.85#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.232.08:22:08.85#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.232.08:22:08.85#ibcon#about to clear, iclass 26 cls_cnt 0 2006.232.08:22:08.85#ibcon#cleared, iclass 26 cls_cnt 0 2006.232.08:22:08.85$vc4f8/valo=4,832.99 2006.232.08:22:08.85#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.232.08:22:08.85#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.232.08:22:08.85#ibcon#ireg 17 cls_cnt 0 2006.232.08:22:08.85#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.232.08:22:08.85#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.232.08:22:08.85#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.232.08:22:08.85#ibcon#enter wrdev, iclass 31, count 0 2006.232.08:22:08.85#ibcon#first serial, iclass 31, count 0 2006.232.08:22:08.85#ibcon#enter sib2, iclass 31, count 0 2006.232.08:22:08.85#ibcon#flushed, iclass 31, count 0 2006.232.08:22:08.85#ibcon#about to write, iclass 31, count 0 2006.232.08:22:08.85#ibcon#wrote, iclass 31, count 0 2006.232.08:22:08.85#ibcon#about to read 3, iclass 31, count 0 2006.232.08:22:08.86#abcon#{5=INTERFACE CLEAR} 2006.232.08:22:08.87#ibcon#read 3, iclass 31, count 0 2006.232.08:22:08.87#ibcon#about to read 4, iclass 31, count 0 2006.232.08:22:08.87#ibcon#read 4, iclass 31, count 0 2006.232.08:22:08.87#ibcon#about to read 5, iclass 31, count 0 2006.232.08:22:08.87#ibcon#read 5, iclass 31, count 0 2006.232.08:22:08.87#ibcon#about to read 6, iclass 31, count 0 2006.232.08:22:08.87#ibcon#read 6, iclass 31, count 0 2006.232.08:22:08.87#ibcon#end of sib2, iclass 31, count 0 2006.232.08:22:08.87#ibcon#*mode == 0, iclass 31, count 0 2006.232.08:22:08.87#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.232.08:22:08.87#ibcon#[26=FRQ=04,832.99\r\n] 2006.232.08:22:08.87#ibcon#*before write, iclass 31, count 0 2006.232.08:22:08.87#ibcon#enter sib2, iclass 31, count 0 2006.232.08:22:08.87#ibcon#flushed, iclass 31, count 0 2006.232.08:22:08.87#ibcon#about to write, iclass 31, count 0 2006.232.08:22:08.87#ibcon#wrote, iclass 31, count 0 2006.232.08:22:08.87#ibcon#about to read 3, iclass 31, count 0 2006.232.08:22:08.91#ibcon#read 3, iclass 31, count 0 2006.232.08:22:08.91#ibcon#about to read 4, iclass 31, count 0 2006.232.08:22:08.91#ibcon#read 4, iclass 31, count 0 2006.232.08:22:08.91#ibcon#about to read 5, iclass 31, count 0 2006.232.08:22:08.91#ibcon#read 5, iclass 31, count 0 2006.232.08:22:08.91#ibcon#about to read 6, iclass 31, count 0 2006.232.08:22:08.91#ibcon#read 6, iclass 31, count 0 2006.232.08:22:08.91#ibcon#end of sib2, iclass 31, count 0 2006.232.08:22:08.91#ibcon#*after write, iclass 31, count 0 2006.232.08:22:08.91#ibcon#*before return 0, iclass 31, count 0 2006.232.08:22:08.91#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.232.08:22:08.91#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.232.08:22:08.91#ibcon#about to clear, iclass 31 cls_cnt 0 2006.232.08:22:08.91#ibcon#cleared, iclass 31 cls_cnt 0 2006.232.08:22:08.91$vc4f8/va=4,7 2006.232.08:22:08.91#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.232.08:22:08.91#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.232.08:22:08.91#ibcon#ireg 11 cls_cnt 2 2006.232.08:22:08.91#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.232.08:22:08.92#abcon#[5=S1D000X0/0*\r\n] 2006.232.08:22:08.97#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.232.08:22:08.97#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.232.08:22:08.97#ibcon#enter wrdev, iclass 34, count 2 2006.232.08:22:08.97#ibcon#first serial, iclass 34, count 2 2006.232.08:22:08.97#ibcon#enter sib2, iclass 34, count 2 2006.232.08:22:08.97#ibcon#flushed, iclass 34, count 2 2006.232.08:22:08.97#ibcon#about to write, iclass 34, count 2 2006.232.08:22:08.97#ibcon#wrote, iclass 34, count 2 2006.232.08:22:08.97#ibcon#about to read 3, iclass 34, count 2 2006.232.08:22:08.99#ibcon#read 3, iclass 34, count 2 2006.232.08:22:08.99#ibcon#about to read 4, iclass 34, count 2 2006.232.08:22:08.99#ibcon#read 4, iclass 34, count 2 2006.232.08:22:08.99#ibcon#about to read 5, iclass 34, count 2 2006.232.08:22:08.99#ibcon#read 5, iclass 34, count 2 2006.232.08:22:08.99#ibcon#about to read 6, iclass 34, count 2 2006.232.08:22:08.99#ibcon#read 6, iclass 34, count 2 2006.232.08:22:08.99#ibcon#end of sib2, iclass 34, count 2 2006.232.08:22:08.99#ibcon#*mode == 0, iclass 34, count 2 2006.232.08:22:08.99#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.232.08:22:08.99#ibcon#[25=AT04-07\r\n] 2006.232.08:22:08.99#ibcon#*before write, iclass 34, count 2 2006.232.08:22:08.99#ibcon#enter sib2, iclass 34, count 2 2006.232.08:22:08.99#ibcon#flushed, iclass 34, count 2 2006.232.08:22:08.99#ibcon#about to write, iclass 34, count 2 2006.232.08:22:08.99#ibcon#wrote, iclass 34, count 2 2006.232.08:22:08.99#ibcon#about to read 3, iclass 34, count 2 2006.232.08:22:09.02#ibcon#read 3, iclass 34, count 2 2006.232.08:22:09.02#ibcon#about to read 4, iclass 34, count 2 2006.232.08:22:09.02#ibcon#read 4, iclass 34, count 2 2006.232.08:22:09.02#ibcon#about to read 5, iclass 34, count 2 2006.232.08:22:09.02#ibcon#read 5, iclass 34, count 2 2006.232.08:22:09.02#ibcon#about to read 6, iclass 34, count 2 2006.232.08:22:09.02#ibcon#read 6, iclass 34, count 2 2006.232.08:22:09.02#ibcon#end of sib2, iclass 34, count 2 2006.232.08:22:09.02#ibcon#*after write, iclass 34, count 2 2006.232.08:22:09.02#ibcon#*before return 0, iclass 34, count 2 2006.232.08:22:09.02#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.232.08:22:09.02#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.232.08:22:09.02#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.232.08:22:09.02#ibcon#ireg 7 cls_cnt 0 2006.232.08:22:09.02#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.232.08:22:09.14#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.232.08:22:09.14#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.232.08:22:09.14#ibcon#enter wrdev, iclass 34, count 0 2006.232.08:22:09.14#ibcon#first serial, iclass 34, count 0 2006.232.08:22:09.14#ibcon#enter sib2, iclass 34, count 0 2006.232.08:22:09.14#ibcon#flushed, iclass 34, count 0 2006.232.08:22:09.14#ibcon#about to write, iclass 34, count 0 2006.232.08:22:09.14#ibcon#wrote, iclass 34, count 0 2006.232.08:22:09.14#ibcon#about to read 3, iclass 34, count 0 2006.232.08:22:09.16#ibcon#read 3, iclass 34, count 0 2006.232.08:22:09.16#ibcon#about to read 4, iclass 34, count 0 2006.232.08:22:09.16#ibcon#read 4, iclass 34, count 0 2006.232.08:22:09.16#ibcon#about to read 5, iclass 34, count 0 2006.232.08:22:09.16#ibcon#read 5, iclass 34, count 0 2006.232.08:22:09.16#ibcon#about to read 6, iclass 34, count 0 2006.232.08:22:09.16#ibcon#read 6, iclass 34, count 0 2006.232.08:22:09.16#ibcon#end of sib2, iclass 34, count 0 2006.232.08:22:09.16#ibcon#*mode == 0, iclass 34, count 0 2006.232.08:22:09.16#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.232.08:22:09.16#ibcon#[25=USB\r\n] 2006.232.08:22:09.16#ibcon#*before write, iclass 34, count 0 2006.232.08:22:09.16#ibcon#enter sib2, iclass 34, count 0 2006.232.08:22:09.16#ibcon#flushed, iclass 34, count 0 2006.232.08:22:09.16#ibcon#about to write, iclass 34, count 0 2006.232.08:22:09.16#ibcon#wrote, iclass 34, count 0 2006.232.08:22:09.16#ibcon#about to read 3, iclass 34, count 0 2006.232.08:22:09.19#ibcon#read 3, iclass 34, count 0 2006.232.08:22:09.19#ibcon#about to read 4, iclass 34, count 0 2006.232.08:22:09.19#ibcon#read 4, iclass 34, count 0 2006.232.08:22:09.19#ibcon#about to read 5, iclass 34, count 0 2006.232.08:22:09.19#ibcon#read 5, iclass 34, count 0 2006.232.08:22:09.19#ibcon#about to read 6, iclass 34, count 0 2006.232.08:22:09.19#ibcon#read 6, iclass 34, count 0 2006.232.08:22:09.19#ibcon#end of sib2, iclass 34, count 0 2006.232.08:22:09.19#ibcon#*after write, iclass 34, count 0 2006.232.08:22:09.19#ibcon#*before return 0, iclass 34, count 0 2006.232.08:22:09.19#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.232.08:22:09.19#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.232.08:22:09.19#ibcon#about to clear, iclass 34 cls_cnt 0 2006.232.08:22:09.19#ibcon#cleared, iclass 34 cls_cnt 0 2006.232.08:22:09.19$vc4f8/valo=5,652.99 2006.232.08:22:09.19#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.232.08:22:09.19#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.232.08:22:09.19#ibcon#ireg 17 cls_cnt 0 2006.232.08:22:09.19#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.232.08:22:09.19#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.232.08:22:09.19#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.232.08:22:09.19#ibcon#enter wrdev, iclass 36, count 0 2006.232.08:22:09.19#ibcon#first serial, iclass 36, count 0 2006.232.08:22:09.19#ibcon#enter sib2, iclass 36, count 0 2006.232.08:22:09.19#ibcon#flushed, iclass 36, count 0 2006.232.08:22:09.19#ibcon#about to write, iclass 36, count 0 2006.232.08:22:09.19#ibcon#wrote, iclass 36, count 0 2006.232.08:22:09.19#ibcon#about to read 3, iclass 36, count 0 2006.232.08:22:09.21#ibcon#read 3, iclass 36, count 0 2006.232.08:22:09.21#ibcon#about to read 4, iclass 36, count 0 2006.232.08:22:09.21#ibcon#read 4, iclass 36, count 0 2006.232.08:22:09.21#ibcon#about to read 5, iclass 36, count 0 2006.232.08:22:09.21#ibcon#read 5, iclass 36, count 0 2006.232.08:22:09.21#ibcon#about to read 6, iclass 36, count 0 2006.232.08:22:09.21#ibcon#read 6, iclass 36, count 0 2006.232.08:22:09.21#ibcon#end of sib2, iclass 36, count 0 2006.232.08:22:09.21#ibcon#*mode == 0, iclass 36, count 0 2006.232.08:22:09.21#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.232.08:22:09.21#ibcon#[26=FRQ=05,652.99\r\n] 2006.232.08:22:09.21#ibcon#*before write, iclass 36, count 0 2006.232.08:22:09.21#ibcon#enter sib2, iclass 36, count 0 2006.232.08:22:09.21#ibcon#flushed, iclass 36, count 0 2006.232.08:22:09.21#ibcon#about to write, iclass 36, count 0 2006.232.08:22:09.21#ibcon#wrote, iclass 36, count 0 2006.232.08:22:09.21#ibcon#about to read 3, iclass 36, count 0 2006.232.08:22:09.25#ibcon#read 3, iclass 36, count 0 2006.232.08:22:09.25#ibcon#about to read 4, iclass 36, count 0 2006.232.08:22:09.25#ibcon#read 4, iclass 36, count 0 2006.232.08:22:09.25#ibcon#about to read 5, iclass 36, count 0 2006.232.08:22:09.25#ibcon#read 5, iclass 36, count 0 2006.232.08:22:09.25#ibcon#about to read 6, iclass 36, count 0 2006.232.08:22:09.25#ibcon#read 6, iclass 36, count 0 2006.232.08:22:09.25#ibcon#end of sib2, iclass 36, count 0 2006.232.08:22:09.25#ibcon#*after write, iclass 36, count 0 2006.232.08:22:09.25#ibcon#*before return 0, iclass 36, count 0 2006.232.08:22:09.25#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.232.08:22:09.25#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.232.08:22:09.25#ibcon#about to clear, iclass 36 cls_cnt 0 2006.232.08:22:09.25#ibcon#cleared, iclass 36 cls_cnt 0 2006.232.08:22:09.25$vc4f8/va=5,7 2006.232.08:22:09.25#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.232.08:22:09.25#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.232.08:22:09.25#ibcon#ireg 11 cls_cnt 2 2006.232.08:22:09.25#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.232.08:22:09.31#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.232.08:22:09.31#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.232.08:22:09.31#ibcon#enter wrdev, iclass 38, count 2 2006.232.08:22:09.31#ibcon#first serial, iclass 38, count 2 2006.232.08:22:09.31#ibcon#enter sib2, iclass 38, count 2 2006.232.08:22:09.31#ibcon#flushed, iclass 38, count 2 2006.232.08:22:09.31#ibcon#about to write, iclass 38, count 2 2006.232.08:22:09.31#ibcon#wrote, iclass 38, count 2 2006.232.08:22:09.31#ibcon#about to read 3, iclass 38, count 2 2006.232.08:22:09.33#ibcon#read 3, iclass 38, count 2 2006.232.08:22:09.33#ibcon#about to read 4, iclass 38, count 2 2006.232.08:22:09.33#ibcon#read 4, iclass 38, count 2 2006.232.08:22:09.33#ibcon#about to read 5, iclass 38, count 2 2006.232.08:22:09.33#ibcon#read 5, iclass 38, count 2 2006.232.08:22:09.33#ibcon#about to read 6, iclass 38, count 2 2006.232.08:22:09.33#ibcon#read 6, iclass 38, count 2 2006.232.08:22:09.33#ibcon#end of sib2, iclass 38, count 2 2006.232.08:22:09.33#ibcon#*mode == 0, iclass 38, count 2 2006.232.08:22:09.33#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.232.08:22:09.33#ibcon#[25=AT05-07\r\n] 2006.232.08:22:09.33#ibcon#*before write, iclass 38, count 2 2006.232.08:22:09.33#ibcon#enter sib2, iclass 38, count 2 2006.232.08:22:09.33#ibcon#flushed, iclass 38, count 2 2006.232.08:22:09.33#ibcon#about to write, iclass 38, count 2 2006.232.08:22:09.33#ibcon#wrote, iclass 38, count 2 2006.232.08:22:09.33#ibcon#about to read 3, iclass 38, count 2 2006.232.08:22:09.36#ibcon#read 3, iclass 38, count 2 2006.232.08:22:09.36#ibcon#about to read 4, iclass 38, count 2 2006.232.08:22:09.36#ibcon#read 4, iclass 38, count 2 2006.232.08:22:09.36#ibcon#about to read 5, iclass 38, count 2 2006.232.08:22:09.36#ibcon#read 5, iclass 38, count 2 2006.232.08:22:09.36#ibcon#about to read 6, iclass 38, count 2 2006.232.08:22:09.36#ibcon#read 6, iclass 38, count 2 2006.232.08:22:09.36#ibcon#end of sib2, iclass 38, count 2 2006.232.08:22:09.36#ibcon#*after write, iclass 38, count 2 2006.232.08:22:09.36#ibcon#*before return 0, iclass 38, count 2 2006.232.08:22:09.36#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.232.08:22:09.36#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.232.08:22:09.36#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.232.08:22:09.36#ibcon#ireg 7 cls_cnt 0 2006.232.08:22:09.36#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.232.08:22:09.48#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.232.08:22:09.48#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.232.08:22:09.48#ibcon#enter wrdev, iclass 38, count 0 2006.232.08:22:09.48#ibcon#first serial, iclass 38, count 0 2006.232.08:22:09.48#ibcon#enter sib2, iclass 38, count 0 2006.232.08:22:09.48#ibcon#flushed, iclass 38, count 0 2006.232.08:22:09.48#ibcon#about to write, iclass 38, count 0 2006.232.08:22:09.48#ibcon#wrote, iclass 38, count 0 2006.232.08:22:09.48#ibcon#about to read 3, iclass 38, count 0 2006.232.08:22:09.50#ibcon#read 3, iclass 38, count 0 2006.232.08:22:09.50#ibcon#about to read 4, iclass 38, count 0 2006.232.08:22:09.50#ibcon#read 4, iclass 38, count 0 2006.232.08:22:09.50#ibcon#about to read 5, iclass 38, count 0 2006.232.08:22:09.50#ibcon#read 5, iclass 38, count 0 2006.232.08:22:09.50#ibcon#about to read 6, iclass 38, count 0 2006.232.08:22:09.50#ibcon#read 6, iclass 38, count 0 2006.232.08:22:09.50#ibcon#end of sib2, iclass 38, count 0 2006.232.08:22:09.50#ibcon#*mode == 0, iclass 38, count 0 2006.232.08:22:09.50#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.232.08:22:09.50#ibcon#[25=USB\r\n] 2006.232.08:22:09.50#ibcon#*before write, iclass 38, count 0 2006.232.08:22:09.50#ibcon#enter sib2, iclass 38, count 0 2006.232.08:22:09.50#ibcon#flushed, iclass 38, count 0 2006.232.08:22:09.50#ibcon#about to write, iclass 38, count 0 2006.232.08:22:09.50#ibcon#wrote, iclass 38, count 0 2006.232.08:22:09.50#ibcon#about to read 3, iclass 38, count 0 2006.232.08:22:09.53#ibcon#read 3, iclass 38, count 0 2006.232.08:22:09.53#ibcon#about to read 4, iclass 38, count 0 2006.232.08:22:09.53#ibcon#read 4, iclass 38, count 0 2006.232.08:22:09.53#ibcon#about to read 5, iclass 38, count 0 2006.232.08:22:09.53#ibcon#read 5, iclass 38, count 0 2006.232.08:22:09.53#ibcon#about to read 6, iclass 38, count 0 2006.232.08:22:09.53#ibcon#read 6, iclass 38, count 0 2006.232.08:22:09.53#ibcon#end of sib2, iclass 38, count 0 2006.232.08:22:09.53#ibcon#*after write, iclass 38, count 0 2006.232.08:22:09.53#ibcon#*before return 0, iclass 38, count 0 2006.232.08:22:09.53#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.232.08:22:09.53#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.232.08:22:09.53#ibcon#about to clear, iclass 38 cls_cnt 0 2006.232.08:22:09.53#ibcon#cleared, iclass 38 cls_cnt 0 2006.232.08:22:09.53$vc4f8/valo=6,772.99 2006.232.08:22:09.53#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.232.08:22:09.53#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.232.08:22:09.53#ibcon#ireg 17 cls_cnt 0 2006.232.08:22:09.53#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.232.08:22:09.53#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.232.08:22:09.53#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.232.08:22:09.53#ibcon#enter wrdev, iclass 40, count 0 2006.232.08:22:09.53#ibcon#first serial, iclass 40, count 0 2006.232.08:22:09.53#ibcon#enter sib2, iclass 40, count 0 2006.232.08:22:09.53#ibcon#flushed, iclass 40, count 0 2006.232.08:22:09.53#ibcon#about to write, iclass 40, count 0 2006.232.08:22:09.53#ibcon#wrote, iclass 40, count 0 2006.232.08:22:09.53#ibcon#about to read 3, iclass 40, count 0 2006.232.08:22:09.56#ibcon#read 3, iclass 40, count 0 2006.232.08:22:09.56#ibcon#about to read 4, iclass 40, count 0 2006.232.08:22:09.56#ibcon#read 4, iclass 40, count 0 2006.232.08:22:09.56#ibcon#about to read 5, iclass 40, count 0 2006.232.08:22:09.56#ibcon#read 5, iclass 40, count 0 2006.232.08:22:09.56#ibcon#about to read 6, iclass 40, count 0 2006.232.08:22:09.56#ibcon#read 6, iclass 40, count 0 2006.232.08:22:09.56#ibcon#end of sib2, iclass 40, count 0 2006.232.08:22:09.56#ibcon#*mode == 0, iclass 40, count 0 2006.232.08:22:09.56#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.232.08:22:09.56#ibcon#[26=FRQ=06,772.99\r\n] 2006.232.08:22:09.56#ibcon#*before write, iclass 40, count 0 2006.232.08:22:09.56#ibcon#enter sib2, iclass 40, count 0 2006.232.08:22:09.56#ibcon#flushed, iclass 40, count 0 2006.232.08:22:09.56#ibcon#about to write, iclass 40, count 0 2006.232.08:22:09.56#ibcon#wrote, iclass 40, count 0 2006.232.08:22:09.56#ibcon#about to read 3, iclass 40, count 0 2006.232.08:22:09.60#ibcon#read 3, iclass 40, count 0 2006.232.08:22:09.60#ibcon#about to read 4, iclass 40, count 0 2006.232.08:22:09.60#ibcon#read 4, iclass 40, count 0 2006.232.08:22:09.60#ibcon#about to read 5, iclass 40, count 0 2006.232.08:22:09.60#ibcon#read 5, iclass 40, count 0 2006.232.08:22:09.60#ibcon#about to read 6, iclass 40, count 0 2006.232.08:22:09.60#ibcon#read 6, iclass 40, count 0 2006.232.08:22:09.60#ibcon#end of sib2, iclass 40, count 0 2006.232.08:22:09.60#ibcon#*after write, iclass 40, count 0 2006.232.08:22:09.60#ibcon#*before return 0, iclass 40, count 0 2006.232.08:22:09.60#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.232.08:22:09.60#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.232.08:22:09.60#ibcon#about to clear, iclass 40 cls_cnt 0 2006.232.08:22:09.60#ibcon#cleared, iclass 40 cls_cnt 0 2006.232.08:22:09.60$vc4f8/va=6,6 2006.232.08:22:09.60#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.232.08:22:09.60#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.232.08:22:09.60#ibcon#ireg 11 cls_cnt 2 2006.232.08:22:09.60#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.232.08:22:09.65#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.232.08:22:09.65#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.232.08:22:09.65#ibcon#enter wrdev, iclass 4, count 2 2006.232.08:22:09.65#ibcon#first serial, iclass 4, count 2 2006.232.08:22:09.65#ibcon#enter sib2, iclass 4, count 2 2006.232.08:22:09.65#ibcon#flushed, iclass 4, count 2 2006.232.08:22:09.65#ibcon#about to write, iclass 4, count 2 2006.232.08:22:09.65#ibcon#wrote, iclass 4, count 2 2006.232.08:22:09.65#ibcon#about to read 3, iclass 4, count 2 2006.232.08:22:09.67#ibcon#read 3, iclass 4, count 2 2006.232.08:22:09.67#ibcon#about to read 4, iclass 4, count 2 2006.232.08:22:09.67#ibcon#read 4, iclass 4, count 2 2006.232.08:22:09.67#ibcon#about to read 5, iclass 4, count 2 2006.232.08:22:09.67#ibcon#read 5, iclass 4, count 2 2006.232.08:22:09.67#ibcon#about to read 6, iclass 4, count 2 2006.232.08:22:09.67#ibcon#read 6, iclass 4, count 2 2006.232.08:22:09.67#ibcon#end of sib2, iclass 4, count 2 2006.232.08:22:09.67#ibcon#*mode == 0, iclass 4, count 2 2006.232.08:22:09.67#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.232.08:22:09.67#ibcon#[25=AT06-06\r\n] 2006.232.08:22:09.67#ibcon#*before write, iclass 4, count 2 2006.232.08:22:09.67#ibcon#enter sib2, iclass 4, count 2 2006.232.08:22:09.67#ibcon#flushed, iclass 4, count 2 2006.232.08:22:09.67#ibcon#about to write, iclass 4, count 2 2006.232.08:22:09.67#ibcon#wrote, iclass 4, count 2 2006.232.08:22:09.67#ibcon#about to read 3, iclass 4, count 2 2006.232.08:22:09.70#ibcon#read 3, iclass 4, count 2 2006.232.08:22:09.70#ibcon#about to read 4, iclass 4, count 2 2006.232.08:22:09.70#ibcon#read 4, iclass 4, count 2 2006.232.08:22:09.70#ibcon#about to read 5, iclass 4, count 2 2006.232.08:22:09.70#ibcon#read 5, iclass 4, count 2 2006.232.08:22:09.70#ibcon#about to read 6, iclass 4, count 2 2006.232.08:22:09.70#ibcon#read 6, iclass 4, count 2 2006.232.08:22:09.70#ibcon#end of sib2, iclass 4, count 2 2006.232.08:22:09.70#ibcon#*after write, iclass 4, count 2 2006.232.08:22:09.70#ibcon#*before return 0, iclass 4, count 2 2006.232.08:22:09.70#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.232.08:22:09.70#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.232.08:22:09.70#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.232.08:22:09.70#ibcon#ireg 7 cls_cnt 0 2006.232.08:22:09.70#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.232.08:22:09.82#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.232.08:22:09.82#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.232.08:22:09.82#ibcon#enter wrdev, iclass 4, count 0 2006.232.08:22:09.82#ibcon#first serial, iclass 4, count 0 2006.232.08:22:09.82#ibcon#enter sib2, iclass 4, count 0 2006.232.08:22:09.82#ibcon#flushed, iclass 4, count 0 2006.232.08:22:09.82#ibcon#about to write, iclass 4, count 0 2006.232.08:22:09.82#ibcon#wrote, iclass 4, count 0 2006.232.08:22:09.82#ibcon#about to read 3, iclass 4, count 0 2006.232.08:22:09.84#ibcon#read 3, iclass 4, count 0 2006.232.08:22:09.84#ibcon#about to read 4, iclass 4, count 0 2006.232.08:22:09.84#ibcon#read 4, iclass 4, count 0 2006.232.08:22:09.84#ibcon#about to read 5, iclass 4, count 0 2006.232.08:22:09.84#ibcon#read 5, iclass 4, count 0 2006.232.08:22:09.84#ibcon#about to read 6, iclass 4, count 0 2006.232.08:22:09.84#ibcon#read 6, iclass 4, count 0 2006.232.08:22:09.84#ibcon#end of sib2, iclass 4, count 0 2006.232.08:22:09.84#ibcon#*mode == 0, iclass 4, count 0 2006.232.08:22:09.84#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.232.08:22:09.84#ibcon#[25=USB\r\n] 2006.232.08:22:09.84#ibcon#*before write, iclass 4, count 0 2006.232.08:22:09.84#ibcon#enter sib2, iclass 4, count 0 2006.232.08:22:09.84#ibcon#flushed, iclass 4, count 0 2006.232.08:22:09.84#ibcon#about to write, iclass 4, count 0 2006.232.08:22:09.84#ibcon#wrote, iclass 4, count 0 2006.232.08:22:09.84#ibcon#about to read 3, iclass 4, count 0 2006.232.08:22:09.87#ibcon#read 3, iclass 4, count 0 2006.232.08:22:09.87#ibcon#about to read 4, iclass 4, count 0 2006.232.08:22:09.87#ibcon#read 4, iclass 4, count 0 2006.232.08:22:09.87#ibcon#about to read 5, iclass 4, count 0 2006.232.08:22:09.87#ibcon#read 5, iclass 4, count 0 2006.232.08:22:09.87#ibcon#about to read 6, iclass 4, count 0 2006.232.08:22:09.87#ibcon#read 6, iclass 4, count 0 2006.232.08:22:09.87#ibcon#end of sib2, iclass 4, count 0 2006.232.08:22:09.87#ibcon#*after write, iclass 4, count 0 2006.232.08:22:09.87#ibcon#*before return 0, iclass 4, count 0 2006.232.08:22:09.87#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.232.08:22:09.87#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.232.08:22:09.87#ibcon#about to clear, iclass 4 cls_cnt 0 2006.232.08:22:09.87#ibcon#cleared, iclass 4 cls_cnt 0 2006.232.08:22:09.87$vc4f8/valo=7,832.99 2006.232.08:22:09.87#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.232.08:22:09.87#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.232.08:22:09.87#ibcon#ireg 17 cls_cnt 0 2006.232.08:22:09.87#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.232.08:22:09.87#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.232.08:22:09.87#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.232.08:22:09.87#ibcon#enter wrdev, iclass 6, count 0 2006.232.08:22:09.87#ibcon#first serial, iclass 6, count 0 2006.232.08:22:09.87#ibcon#enter sib2, iclass 6, count 0 2006.232.08:22:09.87#ibcon#flushed, iclass 6, count 0 2006.232.08:22:09.87#ibcon#about to write, iclass 6, count 0 2006.232.08:22:09.87#ibcon#wrote, iclass 6, count 0 2006.232.08:22:09.87#ibcon#about to read 3, iclass 6, count 0 2006.232.08:22:09.89#ibcon#read 3, iclass 6, count 0 2006.232.08:22:09.89#ibcon#about to read 4, iclass 6, count 0 2006.232.08:22:09.89#ibcon#read 4, iclass 6, count 0 2006.232.08:22:09.89#ibcon#about to read 5, iclass 6, count 0 2006.232.08:22:09.89#ibcon#read 5, iclass 6, count 0 2006.232.08:22:09.89#ibcon#about to read 6, iclass 6, count 0 2006.232.08:22:09.89#ibcon#read 6, iclass 6, count 0 2006.232.08:22:09.89#ibcon#end of sib2, iclass 6, count 0 2006.232.08:22:09.89#ibcon#*mode == 0, iclass 6, count 0 2006.232.08:22:09.89#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.232.08:22:09.89#ibcon#[26=FRQ=07,832.99\r\n] 2006.232.08:22:09.89#ibcon#*before write, iclass 6, count 0 2006.232.08:22:09.89#ibcon#enter sib2, iclass 6, count 0 2006.232.08:22:09.89#ibcon#flushed, iclass 6, count 0 2006.232.08:22:09.89#ibcon#about to write, iclass 6, count 0 2006.232.08:22:09.89#ibcon#wrote, iclass 6, count 0 2006.232.08:22:09.89#ibcon#about to read 3, iclass 6, count 0 2006.232.08:22:09.93#ibcon#read 3, iclass 6, count 0 2006.232.08:22:09.93#ibcon#about to read 4, iclass 6, count 0 2006.232.08:22:09.93#ibcon#read 4, iclass 6, count 0 2006.232.08:22:09.93#ibcon#about to read 5, iclass 6, count 0 2006.232.08:22:09.93#ibcon#read 5, iclass 6, count 0 2006.232.08:22:09.93#ibcon#about to read 6, iclass 6, count 0 2006.232.08:22:09.93#ibcon#read 6, iclass 6, count 0 2006.232.08:22:09.93#ibcon#end of sib2, iclass 6, count 0 2006.232.08:22:09.93#ibcon#*after write, iclass 6, count 0 2006.232.08:22:09.93#ibcon#*before return 0, iclass 6, count 0 2006.232.08:22:09.93#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.232.08:22:09.93#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.232.08:22:09.93#ibcon#about to clear, iclass 6 cls_cnt 0 2006.232.08:22:09.93#ibcon#cleared, iclass 6 cls_cnt 0 2006.232.08:22:09.93$vc4f8/va=7,6 2006.232.08:22:09.93#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.232.08:22:09.93#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.232.08:22:09.93#ibcon#ireg 11 cls_cnt 2 2006.232.08:22:09.93#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.232.08:22:09.99#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.232.08:22:09.99#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.232.08:22:09.99#ibcon#enter wrdev, iclass 10, count 2 2006.232.08:22:09.99#ibcon#first serial, iclass 10, count 2 2006.232.08:22:09.99#ibcon#enter sib2, iclass 10, count 2 2006.232.08:22:09.99#ibcon#flushed, iclass 10, count 2 2006.232.08:22:09.99#ibcon#about to write, iclass 10, count 2 2006.232.08:22:09.99#ibcon#wrote, iclass 10, count 2 2006.232.08:22:09.99#ibcon#about to read 3, iclass 10, count 2 2006.232.08:22:10.01#ibcon#read 3, iclass 10, count 2 2006.232.08:22:10.01#ibcon#about to read 4, iclass 10, count 2 2006.232.08:22:10.01#ibcon#read 4, iclass 10, count 2 2006.232.08:22:10.01#ibcon#about to read 5, iclass 10, count 2 2006.232.08:22:10.01#ibcon#read 5, iclass 10, count 2 2006.232.08:22:10.01#ibcon#about to read 6, iclass 10, count 2 2006.232.08:22:10.01#ibcon#read 6, iclass 10, count 2 2006.232.08:22:10.01#ibcon#end of sib2, iclass 10, count 2 2006.232.08:22:10.01#ibcon#*mode == 0, iclass 10, count 2 2006.232.08:22:10.01#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.232.08:22:10.01#ibcon#[25=AT07-06\r\n] 2006.232.08:22:10.01#ibcon#*before write, iclass 10, count 2 2006.232.08:22:10.01#ibcon#enter sib2, iclass 10, count 2 2006.232.08:22:10.01#ibcon#flushed, iclass 10, count 2 2006.232.08:22:10.01#ibcon#about to write, iclass 10, count 2 2006.232.08:22:10.01#ibcon#wrote, iclass 10, count 2 2006.232.08:22:10.01#ibcon#about to read 3, iclass 10, count 2 2006.232.08:22:10.04#ibcon#read 3, iclass 10, count 2 2006.232.08:22:10.04#ibcon#about to read 4, iclass 10, count 2 2006.232.08:22:10.04#ibcon#read 4, iclass 10, count 2 2006.232.08:22:10.04#ibcon#about to read 5, iclass 10, count 2 2006.232.08:22:10.04#ibcon#read 5, iclass 10, count 2 2006.232.08:22:10.04#ibcon#about to read 6, iclass 10, count 2 2006.232.08:22:10.04#ibcon#read 6, iclass 10, count 2 2006.232.08:22:10.04#ibcon#end of sib2, iclass 10, count 2 2006.232.08:22:10.04#ibcon#*after write, iclass 10, count 2 2006.232.08:22:10.04#ibcon#*before return 0, iclass 10, count 2 2006.232.08:22:10.04#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.232.08:22:10.04#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.232.08:22:10.04#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.232.08:22:10.04#ibcon#ireg 7 cls_cnt 0 2006.232.08:22:10.04#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.232.08:22:10.16#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.232.08:22:10.16#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.232.08:22:10.16#ibcon#enter wrdev, iclass 10, count 0 2006.232.08:22:10.16#ibcon#first serial, iclass 10, count 0 2006.232.08:22:10.16#ibcon#enter sib2, iclass 10, count 0 2006.232.08:22:10.16#ibcon#flushed, iclass 10, count 0 2006.232.08:22:10.16#ibcon#about to write, iclass 10, count 0 2006.232.08:22:10.16#ibcon#wrote, iclass 10, count 0 2006.232.08:22:10.16#ibcon#about to read 3, iclass 10, count 0 2006.232.08:22:10.18#ibcon#read 3, iclass 10, count 0 2006.232.08:22:10.18#ibcon#about to read 4, iclass 10, count 0 2006.232.08:22:10.18#ibcon#read 4, iclass 10, count 0 2006.232.08:22:10.18#ibcon#about to read 5, iclass 10, count 0 2006.232.08:22:10.18#ibcon#read 5, iclass 10, count 0 2006.232.08:22:10.18#ibcon#about to read 6, iclass 10, count 0 2006.232.08:22:10.18#ibcon#read 6, iclass 10, count 0 2006.232.08:22:10.18#ibcon#end of sib2, iclass 10, count 0 2006.232.08:22:10.18#ibcon#*mode == 0, iclass 10, count 0 2006.232.08:22:10.18#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.232.08:22:10.18#ibcon#[25=USB\r\n] 2006.232.08:22:10.18#ibcon#*before write, iclass 10, count 0 2006.232.08:22:10.18#ibcon#enter sib2, iclass 10, count 0 2006.232.08:22:10.18#ibcon#flushed, iclass 10, count 0 2006.232.08:22:10.18#ibcon#about to write, iclass 10, count 0 2006.232.08:22:10.18#ibcon#wrote, iclass 10, count 0 2006.232.08:22:10.18#ibcon#about to read 3, iclass 10, count 0 2006.232.08:22:10.21#ibcon#read 3, iclass 10, count 0 2006.232.08:22:10.21#ibcon#about to read 4, iclass 10, count 0 2006.232.08:22:10.21#ibcon#read 4, iclass 10, count 0 2006.232.08:22:10.21#ibcon#about to read 5, iclass 10, count 0 2006.232.08:22:10.21#ibcon#read 5, iclass 10, count 0 2006.232.08:22:10.21#ibcon#about to read 6, iclass 10, count 0 2006.232.08:22:10.21#ibcon#read 6, iclass 10, count 0 2006.232.08:22:10.21#ibcon#end of sib2, iclass 10, count 0 2006.232.08:22:10.21#ibcon#*after write, iclass 10, count 0 2006.232.08:22:10.21#ibcon#*before return 0, iclass 10, count 0 2006.232.08:22:10.21#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.232.08:22:10.21#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.232.08:22:10.21#ibcon#about to clear, iclass 10 cls_cnt 0 2006.232.08:22:10.21#ibcon#cleared, iclass 10 cls_cnt 0 2006.232.08:22:10.21$vc4f8/valo=8,852.99 2006.232.08:22:10.21#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.232.08:22:10.21#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.232.08:22:10.21#ibcon#ireg 17 cls_cnt 0 2006.232.08:22:10.21#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.232.08:22:10.21#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.232.08:22:10.21#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.232.08:22:10.21#ibcon#enter wrdev, iclass 12, count 0 2006.232.08:22:10.21#ibcon#first serial, iclass 12, count 0 2006.232.08:22:10.21#ibcon#enter sib2, iclass 12, count 0 2006.232.08:22:10.21#ibcon#flushed, iclass 12, count 0 2006.232.08:22:10.21#ibcon#about to write, iclass 12, count 0 2006.232.08:22:10.21#ibcon#wrote, iclass 12, count 0 2006.232.08:22:10.21#ibcon#about to read 3, iclass 12, count 0 2006.232.08:22:10.23#ibcon#read 3, iclass 12, count 0 2006.232.08:22:10.23#ibcon#about to read 4, iclass 12, count 0 2006.232.08:22:10.23#ibcon#read 4, iclass 12, count 0 2006.232.08:22:10.23#ibcon#about to read 5, iclass 12, count 0 2006.232.08:22:10.23#ibcon#read 5, iclass 12, count 0 2006.232.08:22:10.23#ibcon#about to read 6, iclass 12, count 0 2006.232.08:22:10.23#ibcon#read 6, iclass 12, count 0 2006.232.08:22:10.23#ibcon#end of sib2, iclass 12, count 0 2006.232.08:22:10.23#ibcon#*mode == 0, iclass 12, count 0 2006.232.08:22:10.23#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.232.08:22:10.23#ibcon#[26=FRQ=08,852.99\r\n] 2006.232.08:22:10.23#ibcon#*before write, iclass 12, count 0 2006.232.08:22:10.23#ibcon#enter sib2, iclass 12, count 0 2006.232.08:22:10.23#ibcon#flushed, iclass 12, count 0 2006.232.08:22:10.23#ibcon#about to write, iclass 12, count 0 2006.232.08:22:10.23#ibcon#wrote, iclass 12, count 0 2006.232.08:22:10.23#ibcon#about to read 3, iclass 12, count 0 2006.232.08:22:10.27#ibcon#read 3, iclass 12, count 0 2006.232.08:22:10.27#ibcon#about to read 4, iclass 12, count 0 2006.232.08:22:10.27#ibcon#read 4, iclass 12, count 0 2006.232.08:22:10.27#ibcon#about to read 5, iclass 12, count 0 2006.232.08:22:10.27#ibcon#read 5, iclass 12, count 0 2006.232.08:22:10.27#ibcon#about to read 6, iclass 12, count 0 2006.232.08:22:10.27#ibcon#read 6, iclass 12, count 0 2006.232.08:22:10.27#ibcon#end of sib2, iclass 12, count 0 2006.232.08:22:10.27#ibcon#*after write, iclass 12, count 0 2006.232.08:22:10.27#ibcon#*before return 0, iclass 12, count 0 2006.232.08:22:10.27#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.232.08:22:10.27#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.232.08:22:10.27#ibcon#about to clear, iclass 12 cls_cnt 0 2006.232.08:22:10.27#ibcon#cleared, iclass 12 cls_cnt 0 2006.232.08:22:10.27$vc4f8/va=8,6 2006.232.08:22:10.27#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.232.08:22:10.27#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.232.08:22:10.27#ibcon#ireg 11 cls_cnt 2 2006.232.08:22:10.27#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.232.08:22:10.33#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.232.08:22:10.33#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.232.08:22:10.33#ibcon#enter wrdev, iclass 14, count 2 2006.232.08:22:10.33#ibcon#first serial, iclass 14, count 2 2006.232.08:22:10.33#ibcon#enter sib2, iclass 14, count 2 2006.232.08:22:10.33#ibcon#flushed, iclass 14, count 2 2006.232.08:22:10.33#ibcon#about to write, iclass 14, count 2 2006.232.08:22:10.33#ibcon#wrote, iclass 14, count 2 2006.232.08:22:10.33#ibcon#about to read 3, iclass 14, count 2 2006.232.08:22:10.36#ibcon#read 3, iclass 14, count 2 2006.232.08:22:10.36#ibcon#about to read 4, iclass 14, count 2 2006.232.08:22:10.36#ibcon#read 4, iclass 14, count 2 2006.232.08:22:10.36#ibcon#about to read 5, iclass 14, count 2 2006.232.08:22:10.36#ibcon#read 5, iclass 14, count 2 2006.232.08:22:10.36#ibcon#about to read 6, iclass 14, count 2 2006.232.08:22:10.36#ibcon#read 6, iclass 14, count 2 2006.232.08:22:10.36#ibcon#end of sib2, iclass 14, count 2 2006.232.08:22:10.36#ibcon#*mode == 0, iclass 14, count 2 2006.232.08:22:10.36#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.232.08:22:10.36#ibcon#[25=AT08-06\r\n] 2006.232.08:22:10.36#ibcon#*before write, iclass 14, count 2 2006.232.08:22:10.36#ibcon#enter sib2, iclass 14, count 2 2006.232.08:22:10.36#ibcon#flushed, iclass 14, count 2 2006.232.08:22:10.36#ibcon#about to write, iclass 14, count 2 2006.232.08:22:10.36#ibcon#wrote, iclass 14, count 2 2006.232.08:22:10.36#ibcon#about to read 3, iclass 14, count 2 2006.232.08:22:10.39#ibcon#read 3, iclass 14, count 2 2006.232.08:22:10.39#ibcon#about to read 4, iclass 14, count 2 2006.232.08:22:10.39#ibcon#read 4, iclass 14, count 2 2006.232.08:22:10.39#ibcon#about to read 5, iclass 14, count 2 2006.232.08:22:10.39#ibcon#read 5, iclass 14, count 2 2006.232.08:22:10.39#ibcon#about to read 6, iclass 14, count 2 2006.232.08:22:10.39#ibcon#read 6, iclass 14, count 2 2006.232.08:22:10.39#ibcon#end of sib2, iclass 14, count 2 2006.232.08:22:10.39#ibcon#*after write, iclass 14, count 2 2006.232.08:22:10.39#ibcon#*before return 0, iclass 14, count 2 2006.232.08:22:10.39#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.232.08:22:10.39#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.232.08:22:10.39#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.232.08:22:10.39#ibcon#ireg 7 cls_cnt 0 2006.232.08:22:10.39#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.232.08:22:10.51#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.232.08:22:10.51#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.232.08:22:10.51#ibcon#enter wrdev, iclass 14, count 0 2006.232.08:22:10.51#ibcon#first serial, iclass 14, count 0 2006.232.08:22:10.51#ibcon#enter sib2, iclass 14, count 0 2006.232.08:22:10.51#ibcon#flushed, iclass 14, count 0 2006.232.08:22:10.51#ibcon#about to write, iclass 14, count 0 2006.232.08:22:10.51#ibcon#wrote, iclass 14, count 0 2006.232.08:22:10.51#ibcon#about to read 3, iclass 14, count 0 2006.232.08:22:10.53#ibcon#read 3, iclass 14, count 0 2006.232.08:22:10.53#ibcon#about to read 4, iclass 14, count 0 2006.232.08:22:10.53#ibcon#read 4, iclass 14, count 0 2006.232.08:22:10.53#ibcon#about to read 5, iclass 14, count 0 2006.232.08:22:10.53#ibcon#read 5, iclass 14, count 0 2006.232.08:22:10.53#ibcon#about to read 6, iclass 14, count 0 2006.232.08:22:10.53#ibcon#read 6, iclass 14, count 0 2006.232.08:22:10.53#ibcon#end of sib2, iclass 14, count 0 2006.232.08:22:10.53#ibcon#*mode == 0, iclass 14, count 0 2006.232.08:22:10.53#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.232.08:22:10.53#ibcon#[25=USB\r\n] 2006.232.08:22:10.53#ibcon#*before write, iclass 14, count 0 2006.232.08:22:10.53#ibcon#enter sib2, iclass 14, count 0 2006.232.08:22:10.53#ibcon#flushed, iclass 14, count 0 2006.232.08:22:10.53#ibcon#about to write, iclass 14, count 0 2006.232.08:22:10.53#ibcon#wrote, iclass 14, count 0 2006.232.08:22:10.53#ibcon#about to read 3, iclass 14, count 0 2006.232.08:22:10.56#ibcon#read 3, iclass 14, count 0 2006.232.08:22:10.56#ibcon#about to read 4, iclass 14, count 0 2006.232.08:22:10.56#ibcon#read 4, iclass 14, count 0 2006.232.08:22:10.56#ibcon#about to read 5, iclass 14, count 0 2006.232.08:22:10.56#ibcon#read 5, iclass 14, count 0 2006.232.08:22:10.56#ibcon#about to read 6, iclass 14, count 0 2006.232.08:22:10.56#ibcon#read 6, iclass 14, count 0 2006.232.08:22:10.56#ibcon#end of sib2, iclass 14, count 0 2006.232.08:22:10.56#ibcon#*after write, iclass 14, count 0 2006.232.08:22:10.56#ibcon#*before return 0, iclass 14, count 0 2006.232.08:22:10.56#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.232.08:22:10.56#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.232.08:22:10.56#ibcon#about to clear, iclass 14 cls_cnt 0 2006.232.08:22:10.56#ibcon#cleared, iclass 14 cls_cnt 0 2006.232.08:22:10.56$vc4f8/vblo=1,632.99 2006.232.08:22:10.56#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.232.08:22:10.56#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.232.08:22:10.56#ibcon#ireg 17 cls_cnt 0 2006.232.08:22:10.56#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.232.08:22:10.56#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.232.08:22:10.56#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.232.08:22:10.56#ibcon#enter wrdev, iclass 16, count 0 2006.232.08:22:10.56#ibcon#first serial, iclass 16, count 0 2006.232.08:22:10.56#ibcon#enter sib2, iclass 16, count 0 2006.232.08:22:10.56#ibcon#flushed, iclass 16, count 0 2006.232.08:22:10.56#ibcon#about to write, iclass 16, count 0 2006.232.08:22:10.56#ibcon#wrote, iclass 16, count 0 2006.232.08:22:10.56#ibcon#about to read 3, iclass 16, count 0 2006.232.08:22:10.58#ibcon#read 3, iclass 16, count 0 2006.232.08:22:10.58#ibcon#about to read 4, iclass 16, count 0 2006.232.08:22:10.58#ibcon#read 4, iclass 16, count 0 2006.232.08:22:10.58#ibcon#about to read 5, iclass 16, count 0 2006.232.08:22:10.58#ibcon#read 5, iclass 16, count 0 2006.232.08:22:10.58#ibcon#about to read 6, iclass 16, count 0 2006.232.08:22:10.58#ibcon#read 6, iclass 16, count 0 2006.232.08:22:10.58#ibcon#end of sib2, iclass 16, count 0 2006.232.08:22:10.58#ibcon#*mode == 0, iclass 16, count 0 2006.232.08:22:10.58#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.232.08:22:10.58#ibcon#[28=FRQ=01,632.99\r\n] 2006.232.08:22:10.58#ibcon#*before write, iclass 16, count 0 2006.232.08:22:10.58#ibcon#enter sib2, iclass 16, count 0 2006.232.08:22:10.58#ibcon#flushed, iclass 16, count 0 2006.232.08:22:10.58#ibcon#about to write, iclass 16, count 0 2006.232.08:22:10.58#ibcon#wrote, iclass 16, count 0 2006.232.08:22:10.58#ibcon#about to read 3, iclass 16, count 0 2006.232.08:22:10.62#ibcon#read 3, iclass 16, count 0 2006.232.08:22:10.62#ibcon#about to read 4, iclass 16, count 0 2006.232.08:22:10.62#ibcon#read 4, iclass 16, count 0 2006.232.08:22:10.62#ibcon#about to read 5, iclass 16, count 0 2006.232.08:22:10.62#ibcon#read 5, iclass 16, count 0 2006.232.08:22:10.62#ibcon#about to read 6, iclass 16, count 0 2006.232.08:22:10.62#ibcon#read 6, iclass 16, count 0 2006.232.08:22:10.62#ibcon#end of sib2, iclass 16, count 0 2006.232.08:22:10.62#ibcon#*after write, iclass 16, count 0 2006.232.08:22:10.62#ibcon#*before return 0, iclass 16, count 0 2006.232.08:22:10.62#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.232.08:22:10.62#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.232.08:22:10.62#ibcon#about to clear, iclass 16 cls_cnt 0 2006.232.08:22:10.62#ibcon#cleared, iclass 16 cls_cnt 0 2006.232.08:22:10.62$vc4f8/vb=1,4 2006.232.08:22:10.62#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.232.08:22:10.62#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.232.08:22:10.62#ibcon#ireg 11 cls_cnt 2 2006.232.08:22:10.62#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.232.08:22:10.62#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.232.08:22:10.62#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.232.08:22:10.62#ibcon#enter wrdev, iclass 18, count 2 2006.232.08:22:10.62#ibcon#first serial, iclass 18, count 2 2006.232.08:22:10.62#ibcon#enter sib2, iclass 18, count 2 2006.232.08:22:10.62#ibcon#flushed, iclass 18, count 2 2006.232.08:22:10.62#ibcon#about to write, iclass 18, count 2 2006.232.08:22:10.62#ibcon#wrote, iclass 18, count 2 2006.232.08:22:10.62#ibcon#about to read 3, iclass 18, count 2 2006.232.08:22:10.64#ibcon#read 3, iclass 18, count 2 2006.232.08:22:10.64#ibcon#about to read 4, iclass 18, count 2 2006.232.08:22:10.64#ibcon#read 4, iclass 18, count 2 2006.232.08:22:10.64#ibcon#about to read 5, iclass 18, count 2 2006.232.08:22:10.64#ibcon#read 5, iclass 18, count 2 2006.232.08:22:10.64#ibcon#about to read 6, iclass 18, count 2 2006.232.08:22:10.64#ibcon#read 6, iclass 18, count 2 2006.232.08:22:10.64#ibcon#end of sib2, iclass 18, count 2 2006.232.08:22:10.64#ibcon#*mode == 0, iclass 18, count 2 2006.232.08:22:10.64#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.232.08:22:10.64#ibcon#[27=AT01-04\r\n] 2006.232.08:22:10.64#ibcon#*before write, iclass 18, count 2 2006.232.08:22:10.64#ibcon#enter sib2, iclass 18, count 2 2006.232.08:22:10.64#ibcon#flushed, iclass 18, count 2 2006.232.08:22:10.64#ibcon#about to write, iclass 18, count 2 2006.232.08:22:10.64#ibcon#wrote, iclass 18, count 2 2006.232.08:22:10.64#ibcon#about to read 3, iclass 18, count 2 2006.232.08:22:10.67#ibcon#read 3, iclass 18, count 2 2006.232.08:22:10.67#ibcon#about to read 4, iclass 18, count 2 2006.232.08:22:10.67#ibcon#read 4, iclass 18, count 2 2006.232.08:22:10.67#ibcon#about to read 5, iclass 18, count 2 2006.232.08:22:10.67#ibcon#read 5, iclass 18, count 2 2006.232.08:22:10.67#ibcon#about to read 6, iclass 18, count 2 2006.232.08:22:10.67#ibcon#read 6, iclass 18, count 2 2006.232.08:22:10.67#ibcon#end of sib2, iclass 18, count 2 2006.232.08:22:10.67#ibcon#*after write, iclass 18, count 2 2006.232.08:22:10.67#ibcon#*before return 0, iclass 18, count 2 2006.232.08:22:10.67#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.232.08:22:10.67#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.232.08:22:10.67#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.232.08:22:10.67#ibcon#ireg 7 cls_cnt 0 2006.232.08:22:10.67#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.232.08:22:10.79#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.232.08:22:10.79#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.232.08:22:10.79#ibcon#enter wrdev, iclass 18, count 0 2006.232.08:22:10.79#ibcon#first serial, iclass 18, count 0 2006.232.08:22:10.79#ibcon#enter sib2, iclass 18, count 0 2006.232.08:22:10.79#ibcon#flushed, iclass 18, count 0 2006.232.08:22:10.79#ibcon#about to write, iclass 18, count 0 2006.232.08:22:10.79#ibcon#wrote, iclass 18, count 0 2006.232.08:22:10.79#ibcon#about to read 3, iclass 18, count 0 2006.232.08:22:10.81#ibcon#read 3, iclass 18, count 0 2006.232.08:22:10.81#ibcon#about to read 4, iclass 18, count 0 2006.232.08:22:10.81#ibcon#read 4, iclass 18, count 0 2006.232.08:22:10.81#ibcon#about to read 5, iclass 18, count 0 2006.232.08:22:10.81#ibcon#read 5, iclass 18, count 0 2006.232.08:22:10.81#ibcon#about to read 6, iclass 18, count 0 2006.232.08:22:10.81#ibcon#read 6, iclass 18, count 0 2006.232.08:22:10.81#ibcon#end of sib2, iclass 18, count 0 2006.232.08:22:10.81#ibcon#*mode == 0, iclass 18, count 0 2006.232.08:22:10.81#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.232.08:22:10.81#ibcon#[27=USB\r\n] 2006.232.08:22:10.81#ibcon#*before write, iclass 18, count 0 2006.232.08:22:10.81#ibcon#enter sib2, iclass 18, count 0 2006.232.08:22:10.81#ibcon#flushed, iclass 18, count 0 2006.232.08:22:10.81#ibcon#about to write, iclass 18, count 0 2006.232.08:22:10.81#ibcon#wrote, iclass 18, count 0 2006.232.08:22:10.81#ibcon#about to read 3, iclass 18, count 0 2006.232.08:22:10.84#ibcon#read 3, iclass 18, count 0 2006.232.08:22:10.84#ibcon#about to read 4, iclass 18, count 0 2006.232.08:22:10.84#ibcon#read 4, iclass 18, count 0 2006.232.08:22:10.84#ibcon#about to read 5, iclass 18, count 0 2006.232.08:22:10.84#ibcon#read 5, iclass 18, count 0 2006.232.08:22:10.84#ibcon#about to read 6, iclass 18, count 0 2006.232.08:22:10.84#ibcon#read 6, iclass 18, count 0 2006.232.08:22:10.84#ibcon#end of sib2, iclass 18, count 0 2006.232.08:22:10.84#ibcon#*after write, iclass 18, count 0 2006.232.08:22:10.84#ibcon#*before return 0, iclass 18, count 0 2006.232.08:22:10.84#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.232.08:22:10.84#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.232.08:22:10.84#ibcon#about to clear, iclass 18 cls_cnt 0 2006.232.08:22:10.84#ibcon#cleared, iclass 18 cls_cnt 0 2006.232.08:22:10.84$vc4f8/vblo=2,640.99 2006.232.08:22:10.84#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.232.08:22:10.84#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.232.08:22:10.84#ibcon#ireg 17 cls_cnt 0 2006.232.08:22:10.84#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.232.08:22:10.84#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.232.08:22:10.84#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.232.08:22:10.84#ibcon#enter wrdev, iclass 20, count 0 2006.232.08:22:10.84#ibcon#first serial, iclass 20, count 0 2006.232.08:22:10.84#ibcon#enter sib2, iclass 20, count 0 2006.232.08:22:10.84#ibcon#flushed, iclass 20, count 0 2006.232.08:22:10.84#ibcon#about to write, iclass 20, count 0 2006.232.08:22:10.84#ibcon#wrote, iclass 20, count 0 2006.232.08:22:10.84#ibcon#about to read 3, iclass 20, count 0 2006.232.08:22:10.86#ibcon#read 3, iclass 20, count 0 2006.232.08:22:10.86#ibcon#about to read 4, iclass 20, count 0 2006.232.08:22:10.86#ibcon#read 4, iclass 20, count 0 2006.232.08:22:10.86#ibcon#about to read 5, iclass 20, count 0 2006.232.08:22:10.86#ibcon#read 5, iclass 20, count 0 2006.232.08:22:10.86#ibcon#about to read 6, iclass 20, count 0 2006.232.08:22:10.86#ibcon#read 6, iclass 20, count 0 2006.232.08:22:10.86#ibcon#end of sib2, iclass 20, count 0 2006.232.08:22:10.86#ibcon#*mode == 0, iclass 20, count 0 2006.232.08:22:10.86#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.232.08:22:10.86#ibcon#[28=FRQ=02,640.99\r\n] 2006.232.08:22:10.86#ibcon#*before write, iclass 20, count 0 2006.232.08:22:10.86#ibcon#enter sib2, iclass 20, count 0 2006.232.08:22:10.86#ibcon#flushed, iclass 20, count 0 2006.232.08:22:10.86#ibcon#about to write, iclass 20, count 0 2006.232.08:22:10.86#ibcon#wrote, iclass 20, count 0 2006.232.08:22:10.86#ibcon#about to read 3, iclass 20, count 0 2006.232.08:22:10.90#ibcon#read 3, iclass 20, count 0 2006.232.08:22:10.90#ibcon#about to read 4, iclass 20, count 0 2006.232.08:22:10.90#ibcon#read 4, iclass 20, count 0 2006.232.08:22:10.90#ibcon#about to read 5, iclass 20, count 0 2006.232.08:22:10.90#ibcon#read 5, iclass 20, count 0 2006.232.08:22:10.90#ibcon#about to read 6, iclass 20, count 0 2006.232.08:22:10.90#ibcon#read 6, iclass 20, count 0 2006.232.08:22:10.90#ibcon#end of sib2, iclass 20, count 0 2006.232.08:22:10.90#ibcon#*after write, iclass 20, count 0 2006.232.08:22:10.90#ibcon#*before return 0, iclass 20, count 0 2006.232.08:22:10.90#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.232.08:22:10.90#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.232.08:22:10.90#ibcon#about to clear, iclass 20 cls_cnt 0 2006.232.08:22:10.90#ibcon#cleared, iclass 20 cls_cnt 0 2006.232.08:22:10.90$vc4f8/vb=2,4 2006.232.08:22:10.90#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.232.08:22:10.90#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.232.08:22:10.90#ibcon#ireg 11 cls_cnt 2 2006.232.08:22:10.90#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.232.08:22:10.96#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.232.08:22:10.96#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.232.08:22:10.96#ibcon#enter wrdev, iclass 22, count 2 2006.232.08:22:10.96#ibcon#first serial, iclass 22, count 2 2006.232.08:22:10.96#ibcon#enter sib2, iclass 22, count 2 2006.232.08:22:10.96#ibcon#flushed, iclass 22, count 2 2006.232.08:22:10.96#ibcon#about to write, iclass 22, count 2 2006.232.08:22:10.96#ibcon#wrote, iclass 22, count 2 2006.232.08:22:10.96#ibcon#about to read 3, iclass 22, count 2 2006.232.08:22:10.98#ibcon#read 3, iclass 22, count 2 2006.232.08:22:10.98#ibcon#about to read 4, iclass 22, count 2 2006.232.08:22:10.98#ibcon#read 4, iclass 22, count 2 2006.232.08:22:10.98#ibcon#about to read 5, iclass 22, count 2 2006.232.08:22:10.98#ibcon#read 5, iclass 22, count 2 2006.232.08:22:10.98#ibcon#about to read 6, iclass 22, count 2 2006.232.08:22:10.98#ibcon#read 6, iclass 22, count 2 2006.232.08:22:10.98#ibcon#end of sib2, iclass 22, count 2 2006.232.08:22:10.98#ibcon#*mode == 0, iclass 22, count 2 2006.232.08:22:10.98#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.232.08:22:10.98#ibcon#[27=AT02-04\r\n] 2006.232.08:22:10.98#ibcon#*before write, iclass 22, count 2 2006.232.08:22:10.98#ibcon#enter sib2, iclass 22, count 2 2006.232.08:22:10.98#ibcon#flushed, iclass 22, count 2 2006.232.08:22:10.98#ibcon#about to write, iclass 22, count 2 2006.232.08:22:10.98#ibcon#wrote, iclass 22, count 2 2006.232.08:22:10.98#ibcon#about to read 3, iclass 22, count 2 2006.232.08:22:11.01#ibcon#read 3, iclass 22, count 2 2006.232.08:22:11.01#ibcon#about to read 4, iclass 22, count 2 2006.232.08:22:11.01#ibcon#read 4, iclass 22, count 2 2006.232.08:22:11.01#ibcon#about to read 5, iclass 22, count 2 2006.232.08:22:11.01#ibcon#read 5, iclass 22, count 2 2006.232.08:22:11.01#ibcon#about to read 6, iclass 22, count 2 2006.232.08:22:11.01#ibcon#read 6, iclass 22, count 2 2006.232.08:22:11.01#ibcon#end of sib2, iclass 22, count 2 2006.232.08:22:11.01#ibcon#*after write, iclass 22, count 2 2006.232.08:22:11.01#ibcon#*before return 0, iclass 22, count 2 2006.232.08:22:11.01#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.232.08:22:11.01#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.232.08:22:11.01#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.232.08:22:11.01#ibcon#ireg 7 cls_cnt 0 2006.232.08:22:11.01#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.232.08:22:11.13#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.232.08:22:11.13#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.232.08:22:11.13#ibcon#enter wrdev, iclass 22, count 0 2006.232.08:22:11.13#ibcon#first serial, iclass 22, count 0 2006.232.08:22:11.13#ibcon#enter sib2, iclass 22, count 0 2006.232.08:22:11.13#ibcon#flushed, iclass 22, count 0 2006.232.08:22:11.13#ibcon#about to write, iclass 22, count 0 2006.232.08:22:11.13#ibcon#wrote, iclass 22, count 0 2006.232.08:22:11.13#ibcon#about to read 3, iclass 22, count 0 2006.232.08:22:11.15#ibcon#read 3, iclass 22, count 0 2006.232.08:22:11.15#ibcon#about to read 4, iclass 22, count 0 2006.232.08:22:11.15#ibcon#read 4, iclass 22, count 0 2006.232.08:22:11.15#ibcon#about to read 5, iclass 22, count 0 2006.232.08:22:11.15#ibcon#read 5, iclass 22, count 0 2006.232.08:22:11.15#ibcon#about to read 6, iclass 22, count 0 2006.232.08:22:11.15#ibcon#read 6, iclass 22, count 0 2006.232.08:22:11.15#ibcon#end of sib2, iclass 22, count 0 2006.232.08:22:11.15#ibcon#*mode == 0, iclass 22, count 0 2006.232.08:22:11.15#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.232.08:22:11.15#ibcon#[27=USB\r\n] 2006.232.08:22:11.15#ibcon#*before write, iclass 22, count 0 2006.232.08:22:11.15#ibcon#enter sib2, iclass 22, count 0 2006.232.08:22:11.15#ibcon#flushed, iclass 22, count 0 2006.232.08:22:11.15#ibcon#about to write, iclass 22, count 0 2006.232.08:22:11.15#ibcon#wrote, iclass 22, count 0 2006.232.08:22:11.15#ibcon#about to read 3, iclass 22, count 0 2006.232.08:22:11.18#ibcon#read 3, iclass 22, count 0 2006.232.08:22:11.18#ibcon#about to read 4, iclass 22, count 0 2006.232.08:22:11.18#ibcon#read 4, iclass 22, count 0 2006.232.08:22:11.18#ibcon#about to read 5, iclass 22, count 0 2006.232.08:22:11.18#ibcon#read 5, iclass 22, count 0 2006.232.08:22:11.18#ibcon#about to read 6, iclass 22, count 0 2006.232.08:22:11.18#ibcon#read 6, iclass 22, count 0 2006.232.08:22:11.18#ibcon#end of sib2, iclass 22, count 0 2006.232.08:22:11.18#ibcon#*after write, iclass 22, count 0 2006.232.08:22:11.18#ibcon#*before return 0, iclass 22, count 0 2006.232.08:22:11.18#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.232.08:22:11.18#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.232.08:22:11.18#ibcon#about to clear, iclass 22 cls_cnt 0 2006.232.08:22:11.18#ibcon#cleared, iclass 22 cls_cnt 0 2006.232.08:22:11.18$vc4f8/vblo=3,656.99 2006.232.08:22:11.18#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.232.08:22:11.18#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.232.08:22:11.18#ibcon#ireg 17 cls_cnt 0 2006.232.08:22:11.18#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.232.08:22:11.18#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.232.08:22:11.18#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.232.08:22:11.18#ibcon#enter wrdev, iclass 24, count 0 2006.232.08:22:11.18#ibcon#first serial, iclass 24, count 0 2006.232.08:22:11.18#ibcon#enter sib2, iclass 24, count 0 2006.232.08:22:11.18#ibcon#flushed, iclass 24, count 0 2006.232.08:22:11.18#ibcon#about to write, iclass 24, count 0 2006.232.08:22:11.18#ibcon#wrote, iclass 24, count 0 2006.232.08:22:11.18#ibcon#about to read 3, iclass 24, count 0 2006.232.08:22:11.20#ibcon#read 3, iclass 24, count 0 2006.232.08:22:11.20#ibcon#about to read 4, iclass 24, count 0 2006.232.08:22:11.20#ibcon#read 4, iclass 24, count 0 2006.232.08:22:11.20#ibcon#about to read 5, iclass 24, count 0 2006.232.08:22:11.20#ibcon#read 5, iclass 24, count 0 2006.232.08:22:11.20#ibcon#about to read 6, iclass 24, count 0 2006.232.08:22:11.20#ibcon#read 6, iclass 24, count 0 2006.232.08:22:11.20#ibcon#end of sib2, iclass 24, count 0 2006.232.08:22:11.20#ibcon#*mode == 0, iclass 24, count 0 2006.232.08:22:11.20#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.232.08:22:11.20#ibcon#[28=FRQ=03,656.99\r\n] 2006.232.08:22:11.20#ibcon#*before write, iclass 24, count 0 2006.232.08:22:11.20#ibcon#enter sib2, iclass 24, count 0 2006.232.08:22:11.20#ibcon#flushed, iclass 24, count 0 2006.232.08:22:11.20#ibcon#about to write, iclass 24, count 0 2006.232.08:22:11.20#ibcon#wrote, iclass 24, count 0 2006.232.08:22:11.20#ibcon#about to read 3, iclass 24, count 0 2006.232.08:22:11.25#ibcon#read 3, iclass 24, count 0 2006.232.08:22:11.25#ibcon#about to read 4, iclass 24, count 0 2006.232.08:22:11.25#ibcon#read 4, iclass 24, count 0 2006.232.08:22:11.25#ibcon#about to read 5, iclass 24, count 0 2006.232.08:22:11.25#ibcon#read 5, iclass 24, count 0 2006.232.08:22:11.25#ibcon#about to read 6, iclass 24, count 0 2006.232.08:22:11.25#ibcon#read 6, iclass 24, count 0 2006.232.08:22:11.25#ibcon#end of sib2, iclass 24, count 0 2006.232.08:22:11.25#ibcon#*after write, iclass 24, count 0 2006.232.08:22:11.25#ibcon#*before return 0, iclass 24, count 0 2006.232.08:22:11.25#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.232.08:22:11.25#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.232.08:22:11.25#ibcon#about to clear, iclass 24 cls_cnt 0 2006.232.08:22:11.25#ibcon#cleared, iclass 24 cls_cnt 0 2006.232.08:22:11.25$vc4f8/vb=3,4 2006.232.08:22:11.25#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.232.08:22:11.25#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.232.08:22:11.25#ibcon#ireg 11 cls_cnt 2 2006.232.08:22:11.25#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.232.08:22:11.29#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.232.08:22:11.29#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.232.08:22:11.29#ibcon#enter wrdev, iclass 26, count 2 2006.232.08:22:11.29#ibcon#first serial, iclass 26, count 2 2006.232.08:22:11.29#ibcon#enter sib2, iclass 26, count 2 2006.232.08:22:11.29#ibcon#flushed, iclass 26, count 2 2006.232.08:22:11.29#ibcon#about to write, iclass 26, count 2 2006.232.08:22:11.29#ibcon#wrote, iclass 26, count 2 2006.232.08:22:11.29#ibcon#about to read 3, iclass 26, count 2 2006.232.08:22:11.31#ibcon#read 3, iclass 26, count 2 2006.232.08:22:11.31#ibcon#about to read 4, iclass 26, count 2 2006.232.08:22:11.31#ibcon#read 4, iclass 26, count 2 2006.232.08:22:11.31#ibcon#about to read 5, iclass 26, count 2 2006.232.08:22:11.31#ibcon#read 5, iclass 26, count 2 2006.232.08:22:11.31#ibcon#about to read 6, iclass 26, count 2 2006.232.08:22:11.31#ibcon#read 6, iclass 26, count 2 2006.232.08:22:11.31#ibcon#end of sib2, iclass 26, count 2 2006.232.08:22:11.31#ibcon#*mode == 0, iclass 26, count 2 2006.232.08:22:11.31#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.232.08:22:11.31#ibcon#[27=AT03-04\r\n] 2006.232.08:22:11.31#ibcon#*before write, iclass 26, count 2 2006.232.08:22:11.31#ibcon#enter sib2, iclass 26, count 2 2006.232.08:22:11.31#ibcon#flushed, iclass 26, count 2 2006.232.08:22:11.31#ibcon#about to write, iclass 26, count 2 2006.232.08:22:11.31#ibcon#wrote, iclass 26, count 2 2006.232.08:22:11.31#ibcon#about to read 3, iclass 26, count 2 2006.232.08:22:11.34#ibcon#read 3, iclass 26, count 2 2006.232.08:22:11.34#ibcon#about to read 4, iclass 26, count 2 2006.232.08:22:11.34#ibcon#read 4, iclass 26, count 2 2006.232.08:22:11.34#ibcon#about to read 5, iclass 26, count 2 2006.232.08:22:11.34#ibcon#read 5, iclass 26, count 2 2006.232.08:22:11.34#ibcon#about to read 6, iclass 26, count 2 2006.232.08:22:11.34#ibcon#read 6, iclass 26, count 2 2006.232.08:22:11.34#ibcon#end of sib2, iclass 26, count 2 2006.232.08:22:11.34#ibcon#*after write, iclass 26, count 2 2006.232.08:22:11.34#ibcon#*before return 0, iclass 26, count 2 2006.232.08:22:11.34#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.232.08:22:11.34#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.232.08:22:11.34#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.232.08:22:11.34#ibcon#ireg 7 cls_cnt 0 2006.232.08:22:11.34#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.232.08:22:11.46#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.232.08:22:11.46#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.232.08:22:11.46#ibcon#enter wrdev, iclass 26, count 0 2006.232.08:22:11.46#ibcon#first serial, iclass 26, count 0 2006.232.08:22:11.46#ibcon#enter sib2, iclass 26, count 0 2006.232.08:22:11.46#ibcon#flushed, iclass 26, count 0 2006.232.08:22:11.46#ibcon#about to write, iclass 26, count 0 2006.232.08:22:11.46#ibcon#wrote, iclass 26, count 0 2006.232.08:22:11.46#ibcon#about to read 3, iclass 26, count 0 2006.232.08:22:11.48#ibcon#read 3, iclass 26, count 0 2006.232.08:22:11.48#ibcon#about to read 4, iclass 26, count 0 2006.232.08:22:11.48#ibcon#read 4, iclass 26, count 0 2006.232.08:22:11.48#ibcon#about to read 5, iclass 26, count 0 2006.232.08:22:11.48#ibcon#read 5, iclass 26, count 0 2006.232.08:22:11.48#ibcon#about to read 6, iclass 26, count 0 2006.232.08:22:11.48#ibcon#read 6, iclass 26, count 0 2006.232.08:22:11.48#ibcon#end of sib2, iclass 26, count 0 2006.232.08:22:11.48#ibcon#*mode == 0, iclass 26, count 0 2006.232.08:22:11.48#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.232.08:22:11.48#ibcon#[27=USB\r\n] 2006.232.08:22:11.48#ibcon#*before write, iclass 26, count 0 2006.232.08:22:11.48#ibcon#enter sib2, iclass 26, count 0 2006.232.08:22:11.48#ibcon#flushed, iclass 26, count 0 2006.232.08:22:11.48#ibcon#about to write, iclass 26, count 0 2006.232.08:22:11.48#ibcon#wrote, iclass 26, count 0 2006.232.08:22:11.48#ibcon#about to read 3, iclass 26, count 0 2006.232.08:22:11.51#ibcon#read 3, iclass 26, count 0 2006.232.08:22:11.51#ibcon#about to read 4, iclass 26, count 0 2006.232.08:22:11.51#ibcon#read 4, iclass 26, count 0 2006.232.08:22:11.51#ibcon#about to read 5, iclass 26, count 0 2006.232.08:22:11.51#ibcon#read 5, iclass 26, count 0 2006.232.08:22:11.51#ibcon#about to read 6, iclass 26, count 0 2006.232.08:22:11.51#ibcon#read 6, iclass 26, count 0 2006.232.08:22:11.51#ibcon#end of sib2, iclass 26, count 0 2006.232.08:22:11.51#ibcon#*after write, iclass 26, count 0 2006.232.08:22:11.51#ibcon#*before return 0, iclass 26, count 0 2006.232.08:22:11.51#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.232.08:22:11.51#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.232.08:22:11.51#ibcon#about to clear, iclass 26 cls_cnt 0 2006.232.08:22:11.51#ibcon#cleared, iclass 26 cls_cnt 0 2006.232.08:22:11.51$vc4f8/vblo=4,712.99 2006.232.08:22:11.51#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.232.08:22:11.51#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.232.08:22:11.51#ibcon#ireg 17 cls_cnt 0 2006.232.08:22:11.51#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.232.08:22:11.51#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.232.08:22:11.51#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.232.08:22:11.51#ibcon#enter wrdev, iclass 28, count 0 2006.232.08:22:11.51#ibcon#first serial, iclass 28, count 0 2006.232.08:22:11.51#ibcon#enter sib2, iclass 28, count 0 2006.232.08:22:11.51#ibcon#flushed, iclass 28, count 0 2006.232.08:22:11.51#ibcon#about to write, iclass 28, count 0 2006.232.08:22:11.51#ibcon#wrote, iclass 28, count 0 2006.232.08:22:11.51#ibcon#about to read 3, iclass 28, count 0 2006.232.08:22:11.53#ibcon#read 3, iclass 28, count 0 2006.232.08:22:11.53#ibcon#about to read 4, iclass 28, count 0 2006.232.08:22:11.53#ibcon#read 4, iclass 28, count 0 2006.232.08:22:11.53#ibcon#about to read 5, iclass 28, count 0 2006.232.08:22:11.53#ibcon#read 5, iclass 28, count 0 2006.232.08:22:11.53#ibcon#about to read 6, iclass 28, count 0 2006.232.08:22:11.53#ibcon#read 6, iclass 28, count 0 2006.232.08:22:11.53#ibcon#end of sib2, iclass 28, count 0 2006.232.08:22:11.53#ibcon#*mode == 0, iclass 28, count 0 2006.232.08:22:11.53#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.232.08:22:11.53#ibcon#[28=FRQ=04,712.99\r\n] 2006.232.08:22:11.53#ibcon#*before write, iclass 28, count 0 2006.232.08:22:11.53#ibcon#enter sib2, iclass 28, count 0 2006.232.08:22:11.53#ibcon#flushed, iclass 28, count 0 2006.232.08:22:11.53#ibcon#about to write, iclass 28, count 0 2006.232.08:22:11.53#ibcon#wrote, iclass 28, count 0 2006.232.08:22:11.53#ibcon#about to read 3, iclass 28, count 0 2006.232.08:22:11.57#ibcon#read 3, iclass 28, count 0 2006.232.08:22:11.57#ibcon#about to read 4, iclass 28, count 0 2006.232.08:22:11.57#ibcon#read 4, iclass 28, count 0 2006.232.08:22:11.57#ibcon#about to read 5, iclass 28, count 0 2006.232.08:22:11.57#ibcon#read 5, iclass 28, count 0 2006.232.08:22:11.57#ibcon#about to read 6, iclass 28, count 0 2006.232.08:22:11.57#ibcon#read 6, iclass 28, count 0 2006.232.08:22:11.57#ibcon#end of sib2, iclass 28, count 0 2006.232.08:22:11.57#ibcon#*after write, iclass 28, count 0 2006.232.08:22:11.57#ibcon#*before return 0, iclass 28, count 0 2006.232.08:22:11.57#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.232.08:22:11.57#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.232.08:22:11.57#ibcon#about to clear, iclass 28 cls_cnt 0 2006.232.08:22:11.57#ibcon#cleared, iclass 28 cls_cnt 0 2006.232.08:22:11.57$vc4f8/vb=4,4 2006.232.08:22:11.57#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.232.08:22:11.57#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.232.08:22:11.57#ibcon#ireg 11 cls_cnt 2 2006.232.08:22:11.57#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.232.08:22:11.63#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.232.08:22:11.63#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.232.08:22:11.63#ibcon#enter wrdev, iclass 30, count 2 2006.232.08:22:11.63#ibcon#first serial, iclass 30, count 2 2006.232.08:22:11.63#ibcon#enter sib2, iclass 30, count 2 2006.232.08:22:11.63#ibcon#flushed, iclass 30, count 2 2006.232.08:22:11.63#ibcon#about to write, iclass 30, count 2 2006.232.08:22:11.63#ibcon#wrote, iclass 30, count 2 2006.232.08:22:11.63#ibcon#about to read 3, iclass 30, count 2 2006.232.08:22:11.65#ibcon#read 3, iclass 30, count 2 2006.232.08:22:11.65#ibcon#about to read 4, iclass 30, count 2 2006.232.08:22:11.65#ibcon#read 4, iclass 30, count 2 2006.232.08:22:11.65#ibcon#about to read 5, iclass 30, count 2 2006.232.08:22:11.65#ibcon#read 5, iclass 30, count 2 2006.232.08:22:11.65#ibcon#about to read 6, iclass 30, count 2 2006.232.08:22:11.65#ibcon#read 6, iclass 30, count 2 2006.232.08:22:11.65#ibcon#end of sib2, iclass 30, count 2 2006.232.08:22:11.65#ibcon#*mode == 0, iclass 30, count 2 2006.232.08:22:11.65#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.232.08:22:11.65#ibcon#[27=AT04-04\r\n] 2006.232.08:22:11.65#ibcon#*before write, iclass 30, count 2 2006.232.08:22:11.65#ibcon#enter sib2, iclass 30, count 2 2006.232.08:22:11.65#ibcon#flushed, iclass 30, count 2 2006.232.08:22:11.65#ibcon#about to write, iclass 30, count 2 2006.232.08:22:11.65#ibcon#wrote, iclass 30, count 2 2006.232.08:22:11.65#ibcon#about to read 3, iclass 30, count 2 2006.232.08:22:11.68#ibcon#read 3, iclass 30, count 2 2006.232.08:22:11.68#ibcon#about to read 4, iclass 30, count 2 2006.232.08:22:11.68#ibcon#read 4, iclass 30, count 2 2006.232.08:22:11.68#ibcon#about to read 5, iclass 30, count 2 2006.232.08:22:11.68#ibcon#read 5, iclass 30, count 2 2006.232.08:22:11.68#ibcon#about to read 6, iclass 30, count 2 2006.232.08:22:11.68#ibcon#read 6, iclass 30, count 2 2006.232.08:22:11.68#ibcon#end of sib2, iclass 30, count 2 2006.232.08:22:11.68#ibcon#*after write, iclass 30, count 2 2006.232.08:22:11.68#ibcon#*before return 0, iclass 30, count 2 2006.232.08:22:11.68#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.232.08:22:11.68#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.232.08:22:11.68#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.232.08:22:11.68#ibcon#ireg 7 cls_cnt 0 2006.232.08:22:11.68#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.232.08:22:11.80#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.232.08:22:11.80#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.232.08:22:11.80#ibcon#enter wrdev, iclass 30, count 0 2006.232.08:22:11.80#ibcon#first serial, iclass 30, count 0 2006.232.08:22:11.80#ibcon#enter sib2, iclass 30, count 0 2006.232.08:22:11.80#ibcon#flushed, iclass 30, count 0 2006.232.08:22:11.80#ibcon#about to write, iclass 30, count 0 2006.232.08:22:11.80#ibcon#wrote, iclass 30, count 0 2006.232.08:22:11.80#ibcon#about to read 3, iclass 30, count 0 2006.232.08:22:11.82#ibcon#read 3, iclass 30, count 0 2006.232.08:22:11.82#ibcon#about to read 4, iclass 30, count 0 2006.232.08:22:11.82#ibcon#read 4, iclass 30, count 0 2006.232.08:22:11.82#ibcon#about to read 5, iclass 30, count 0 2006.232.08:22:11.82#ibcon#read 5, iclass 30, count 0 2006.232.08:22:11.82#ibcon#about to read 6, iclass 30, count 0 2006.232.08:22:11.82#ibcon#read 6, iclass 30, count 0 2006.232.08:22:11.82#ibcon#end of sib2, iclass 30, count 0 2006.232.08:22:11.82#ibcon#*mode == 0, iclass 30, count 0 2006.232.08:22:11.82#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.232.08:22:11.82#ibcon#[27=USB\r\n] 2006.232.08:22:11.82#ibcon#*before write, iclass 30, count 0 2006.232.08:22:11.82#ibcon#enter sib2, iclass 30, count 0 2006.232.08:22:11.82#ibcon#flushed, iclass 30, count 0 2006.232.08:22:11.82#ibcon#about to write, iclass 30, count 0 2006.232.08:22:11.82#ibcon#wrote, iclass 30, count 0 2006.232.08:22:11.82#ibcon#about to read 3, iclass 30, count 0 2006.232.08:22:11.85#ibcon#read 3, iclass 30, count 0 2006.232.08:22:11.85#ibcon#about to read 4, iclass 30, count 0 2006.232.08:22:11.85#ibcon#read 4, iclass 30, count 0 2006.232.08:22:11.85#ibcon#about to read 5, iclass 30, count 0 2006.232.08:22:11.85#ibcon#read 5, iclass 30, count 0 2006.232.08:22:11.85#ibcon#about to read 6, iclass 30, count 0 2006.232.08:22:11.85#ibcon#read 6, iclass 30, count 0 2006.232.08:22:11.85#ibcon#end of sib2, iclass 30, count 0 2006.232.08:22:11.85#ibcon#*after write, iclass 30, count 0 2006.232.08:22:11.85#ibcon#*before return 0, iclass 30, count 0 2006.232.08:22:11.85#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.232.08:22:11.85#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.232.08:22:11.85#ibcon#about to clear, iclass 30 cls_cnt 0 2006.232.08:22:11.85#ibcon#cleared, iclass 30 cls_cnt 0 2006.232.08:22:11.85$vc4f8/vblo=5,744.99 2006.232.08:22:11.85#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.232.08:22:11.85#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.232.08:22:11.85#ibcon#ireg 17 cls_cnt 0 2006.232.08:22:11.85#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.232.08:22:11.85#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.232.08:22:11.85#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.232.08:22:11.85#ibcon#enter wrdev, iclass 32, count 0 2006.232.08:22:11.85#ibcon#first serial, iclass 32, count 0 2006.232.08:22:11.85#ibcon#enter sib2, iclass 32, count 0 2006.232.08:22:11.85#ibcon#flushed, iclass 32, count 0 2006.232.08:22:11.85#ibcon#about to write, iclass 32, count 0 2006.232.08:22:11.85#ibcon#wrote, iclass 32, count 0 2006.232.08:22:11.85#ibcon#about to read 3, iclass 32, count 0 2006.232.08:22:11.87#ibcon#read 3, iclass 32, count 0 2006.232.08:22:11.87#ibcon#about to read 4, iclass 32, count 0 2006.232.08:22:11.87#ibcon#read 4, iclass 32, count 0 2006.232.08:22:11.87#ibcon#about to read 5, iclass 32, count 0 2006.232.08:22:11.87#ibcon#read 5, iclass 32, count 0 2006.232.08:22:11.87#ibcon#about to read 6, iclass 32, count 0 2006.232.08:22:11.87#ibcon#read 6, iclass 32, count 0 2006.232.08:22:11.87#ibcon#end of sib2, iclass 32, count 0 2006.232.08:22:11.87#ibcon#*mode == 0, iclass 32, count 0 2006.232.08:22:11.87#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.232.08:22:11.87#ibcon#[28=FRQ=05,744.99\r\n] 2006.232.08:22:11.87#ibcon#*before write, iclass 32, count 0 2006.232.08:22:11.87#ibcon#enter sib2, iclass 32, count 0 2006.232.08:22:11.87#ibcon#flushed, iclass 32, count 0 2006.232.08:22:11.87#ibcon#about to write, iclass 32, count 0 2006.232.08:22:11.87#ibcon#wrote, iclass 32, count 0 2006.232.08:22:11.87#ibcon#about to read 3, iclass 32, count 0 2006.232.08:22:11.91#ibcon#read 3, iclass 32, count 0 2006.232.08:22:11.91#ibcon#about to read 4, iclass 32, count 0 2006.232.08:22:11.91#ibcon#read 4, iclass 32, count 0 2006.232.08:22:11.91#ibcon#about to read 5, iclass 32, count 0 2006.232.08:22:11.91#ibcon#read 5, iclass 32, count 0 2006.232.08:22:11.91#ibcon#about to read 6, iclass 32, count 0 2006.232.08:22:11.91#ibcon#read 6, iclass 32, count 0 2006.232.08:22:11.91#ibcon#end of sib2, iclass 32, count 0 2006.232.08:22:11.91#ibcon#*after write, iclass 32, count 0 2006.232.08:22:11.91#ibcon#*before return 0, iclass 32, count 0 2006.232.08:22:11.91#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.232.08:22:11.91#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.232.08:22:11.91#ibcon#about to clear, iclass 32 cls_cnt 0 2006.232.08:22:11.91#ibcon#cleared, iclass 32 cls_cnt 0 2006.232.08:22:11.91$vc4f8/vb=5,3 2006.232.08:22:11.91#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.232.08:22:11.91#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.232.08:22:11.91#ibcon#ireg 11 cls_cnt 2 2006.232.08:22:11.91#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.232.08:22:11.97#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.232.08:22:11.97#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.232.08:22:11.97#ibcon#enter wrdev, iclass 34, count 2 2006.232.08:22:11.97#ibcon#first serial, iclass 34, count 2 2006.232.08:22:11.97#ibcon#enter sib2, iclass 34, count 2 2006.232.08:22:11.97#ibcon#flushed, iclass 34, count 2 2006.232.08:22:11.97#ibcon#about to write, iclass 34, count 2 2006.232.08:22:11.97#ibcon#wrote, iclass 34, count 2 2006.232.08:22:11.97#ibcon#about to read 3, iclass 34, count 2 2006.232.08:22:12.00#ibcon#read 3, iclass 34, count 2 2006.232.08:22:12.00#ibcon#about to read 4, iclass 34, count 2 2006.232.08:22:12.00#ibcon#read 4, iclass 34, count 2 2006.232.08:22:12.00#ibcon#about to read 5, iclass 34, count 2 2006.232.08:22:12.00#ibcon#read 5, iclass 34, count 2 2006.232.08:22:12.00#ibcon#about to read 6, iclass 34, count 2 2006.232.08:22:12.00#ibcon#read 6, iclass 34, count 2 2006.232.08:22:12.00#ibcon#end of sib2, iclass 34, count 2 2006.232.08:22:12.00#ibcon#*mode == 0, iclass 34, count 2 2006.232.08:22:12.00#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.232.08:22:12.00#ibcon#[27=AT05-03\r\n] 2006.232.08:22:12.00#ibcon#*before write, iclass 34, count 2 2006.232.08:22:12.00#ibcon#enter sib2, iclass 34, count 2 2006.232.08:22:12.00#ibcon#flushed, iclass 34, count 2 2006.232.08:22:12.00#ibcon#about to write, iclass 34, count 2 2006.232.08:22:12.00#ibcon#wrote, iclass 34, count 2 2006.232.08:22:12.00#ibcon#about to read 3, iclass 34, count 2 2006.232.08:22:12.03#ibcon#read 3, iclass 34, count 2 2006.232.08:22:12.03#ibcon#about to read 4, iclass 34, count 2 2006.232.08:22:12.03#ibcon#read 4, iclass 34, count 2 2006.232.08:22:12.03#ibcon#about to read 5, iclass 34, count 2 2006.232.08:22:12.03#ibcon#read 5, iclass 34, count 2 2006.232.08:22:12.03#ibcon#about to read 6, iclass 34, count 2 2006.232.08:22:12.03#ibcon#read 6, iclass 34, count 2 2006.232.08:22:12.03#ibcon#end of sib2, iclass 34, count 2 2006.232.08:22:12.03#ibcon#*after write, iclass 34, count 2 2006.232.08:22:12.03#ibcon#*before return 0, iclass 34, count 2 2006.232.08:22:12.03#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.232.08:22:12.03#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.232.08:22:12.03#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.232.08:22:12.03#ibcon#ireg 7 cls_cnt 0 2006.232.08:22:12.03#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.232.08:22:12.15#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.232.08:22:12.15#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.232.08:22:12.15#ibcon#enter wrdev, iclass 34, count 0 2006.232.08:22:12.15#ibcon#first serial, iclass 34, count 0 2006.232.08:22:12.15#ibcon#enter sib2, iclass 34, count 0 2006.232.08:22:12.15#ibcon#flushed, iclass 34, count 0 2006.232.08:22:12.15#ibcon#about to write, iclass 34, count 0 2006.232.08:22:12.15#ibcon#wrote, iclass 34, count 0 2006.232.08:22:12.15#ibcon#about to read 3, iclass 34, count 0 2006.232.08:22:12.17#ibcon#read 3, iclass 34, count 0 2006.232.08:22:12.17#ibcon#about to read 4, iclass 34, count 0 2006.232.08:22:12.17#ibcon#read 4, iclass 34, count 0 2006.232.08:22:12.17#ibcon#about to read 5, iclass 34, count 0 2006.232.08:22:12.17#ibcon#read 5, iclass 34, count 0 2006.232.08:22:12.17#ibcon#about to read 6, iclass 34, count 0 2006.232.08:22:12.17#ibcon#read 6, iclass 34, count 0 2006.232.08:22:12.17#ibcon#end of sib2, iclass 34, count 0 2006.232.08:22:12.17#ibcon#*mode == 0, iclass 34, count 0 2006.232.08:22:12.17#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.232.08:22:12.17#ibcon#[27=USB\r\n] 2006.232.08:22:12.17#ibcon#*before write, iclass 34, count 0 2006.232.08:22:12.17#ibcon#enter sib2, iclass 34, count 0 2006.232.08:22:12.17#ibcon#flushed, iclass 34, count 0 2006.232.08:22:12.17#ibcon#about to write, iclass 34, count 0 2006.232.08:22:12.17#ibcon#wrote, iclass 34, count 0 2006.232.08:22:12.17#ibcon#about to read 3, iclass 34, count 0 2006.232.08:22:12.20#ibcon#read 3, iclass 34, count 0 2006.232.08:22:12.20#ibcon#about to read 4, iclass 34, count 0 2006.232.08:22:12.20#ibcon#read 4, iclass 34, count 0 2006.232.08:22:12.20#ibcon#about to read 5, iclass 34, count 0 2006.232.08:22:12.20#ibcon#read 5, iclass 34, count 0 2006.232.08:22:12.20#ibcon#about to read 6, iclass 34, count 0 2006.232.08:22:12.20#ibcon#read 6, iclass 34, count 0 2006.232.08:22:12.20#ibcon#end of sib2, iclass 34, count 0 2006.232.08:22:12.20#ibcon#*after write, iclass 34, count 0 2006.232.08:22:12.20#ibcon#*before return 0, iclass 34, count 0 2006.232.08:22:12.20#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.232.08:22:12.20#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.232.08:22:12.20#ibcon#about to clear, iclass 34 cls_cnt 0 2006.232.08:22:12.20#ibcon#cleared, iclass 34 cls_cnt 0 2006.232.08:22:12.20$vc4f8/vblo=6,752.99 2006.232.08:22:12.20#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.232.08:22:12.20#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.232.08:22:12.20#ibcon#ireg 17 cls_cnt 0 2006.232.08:22:12.20#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.232.08:22:12.20#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.232.08:22:12.20#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.232.08:22:12.20#ibcon#enter wrdev, iclass 36, count 0 2006.232.08:22:12.20#ibcon#first serial, iclass 36, count 0 2006.232.08:22:12.20#ibcon#enter sib2, iclass 36, count 0 2006.232.08:22:12.20#ibcon#flushed, iclass 36, count 0 2006.232.08:22:12.20#ibcon#about to write, iclass 36, count 0 2006.232.08:22:12.20#ibcon#wrote, iclass 36, count 0 2006.232.08:22:12.20#ibcon#about to read 3, iclass 36, count 0 2006.232.08:22:12.22#ibcon#read 3, iclass 36, count 0 2006.232.08:22:12.22#ibcon#about to read 4, iclass 36, count 0 2006.232.08:22:12.22#ibcon#read 4, iclass 36, count 0 2006.232.08:22:12.22#ibcon#about to read 5, iclass 36, count 0 2006.232.08:22:12.22#ibcon#read 5, iclass 36, count 0 2006.232.08:22:12.22#ibcon#about to read 6, iclass 36, count 0 2006.232.08:22:12.22#ibcon#read 6, iclass 36, count 0 2006.232.08:22:12.22#ibcon#end of sib2, iclass 36, count 0 2006.232.08:22:12.22#ibcon#*mode == 0, iclass 36, count 0 2006.232.08:22:12.22#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.232.08:22:12.22#ibcon#[28=FRQ=06,752.99\r\n] 2006.232.08:22:12.22#ibcon#*before write, iclass 36, count 0 2006.232.08:22:12.22#ibcon#enter sib2, iclass 36, count 0 2006.232.08:22:12.22#ibcon#flushed, iclass 36, count 0 2006.232.08:22:12.22#ibcon#about to write, iclass 36, count 0 2006.232.08:22:12.22#ibcon#wrote, iclass 36, count 0 2006.232.08:22:12.22#ibcon#about to read 3, iclass 36, count 0 2006.232.08:22:12.26#ibcon#read 3, iclass 36, count 0 2006.232.08:22:12.26#ibcon#about to read 4, iclass 36, count 0 2006.232.08:22:12.26#ibcon#read 4, iclass 36, count 0 2006.232.08:22:12.26#ibcon#about to read 5, iclass 36, count 0 2006.232.08:22:12.26#ibcon#read 5, iclass 36, count 0 2006.232.08:22:12.26#ibcon#about to read 6, iclass 36, count 0 2006.232.08:22:12.26#ibcon#read 6, iclass 36, count 0 2006.232.08:22:12.26#ibcon#end of sib2, iclass 36, count 0 2006.232.08:22:12.26#ibcon#*after write, iclass 36, count 0 2006.232.08:22:12.26#ibcon#*before return 0, iclass 36, count 0 2006.232.08:22:12.26#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.232.08:22:12.26#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.232.08:22:12.26#ibcon#about to clear, iclass 36 cls_cnt 0 2006.232.08:22:12.26#ibcon#cleared, iclass 36 cls_cnt 0 2006.232.08:22:12.26$vc4f8/vb=6,4 2006.232.08:22:12.26#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.232.08:22:12.26#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.232.08:22:12.26#ibcon#ireg 11 cls_cnt 2 2006.232.08:22:12.26#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.232.08:22:12.32#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.232.08:22:12.32#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.232.08:22:12.32#ibcon#enter wrdev, iclass 38, count 2 2006.232.08:22:12.32#ibcon#first serial, iclass 38, count 2 2006.232.08:22:12.32#ibcon#enter sib2, iclass 38, count 2 2006.232.08:22:12.32#ibcon#flushed, iclass 38, count 2 2006.232.08:22:12.32#ibcon#about to write, iclass 38, count 2 2006.232.08:22:12.32#ibcon#wrote, iclass 38, count 2 2006.232.08:22:12.32#ibcon#about to read 3, iclass 38, count 2 2006.232.08:22:12.34#ibcon#read 3, iclass 38, count 2 2006.232.08:22:12.34#ibcon#about to read 4, iclass 38, count 2 2006.232.08:22:12.34#ibcon#read 4, iclass 38, count 2 2006.232.08:22:12.34#ibcon#about to read 5, iclass 38, count 2 2006.232.08:22:12.34#ibcon#read 5, iclass 38, count 2 2006.232.08:22:12.34#ibcon#about to read 6, iclass 38, count 2 2006.232.08:22:12.34#ibcon#read 6, iclass 38, count 2 2006.232.08:22:12.34#ibcon#end of sib2, iclass 38, count 2 2006.232.08:22:12.34#ibcon#*mode == 0, iclass 38, count 2 2006.232.08:22:12.34#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.232.08:22:12.34#ibcon#[27=AT06-04\r\n] 2006.232.08:22:12.34#ibcon#*before write, iclass 38, count 2 2006.232.08:22:12.34#ibcon#enter sib2, iclass 38, count 2 2006.232.08:22:12.34#ibcon#flushed, iclass 38, count 2 2006.232.08:22:12.34#ibcon#about to write, iclass 38, count 2 2006.232.08:22:12.34#ibcon#wrote, iclass 38, count 2 2006.232.08:22:12.34#ibcon#about to read 3, iclass 38, count 2 2006.232.08:22:12.37#ibcon#read 3, iclass 38, count 2 2006.232.08:22:12.37#ibcon#about to read 4, iclass 38, count 2 2006.232.08:22:12.37#ibcon#read 4, iclass 38, count 2 2006.232.08:22:12.37#ibcon#about to read 5, iclass 38, count 2 2006.232.08:22:12.37#ibcon#read 5, iclass 38, count 2 2006.232.08:22:12.37#ibcon#about to read 6, iclass 38, count 2 2006.232.08:22:12.37#ibcon#read 6, iclass 38, count 2 2006.232.08:22:12.37#ibcon#end of sib2, iclass 38, count 2 2006.232.08:22:12.37#ibcon#*after write, iclass 38, count 2 2006.232.08:22:12.37#ibcon#*before return 0, iclass 38, count 2 2006.232.08:22:12.37#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.232.08:22:12.37#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.232.08:22:12.37#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.232.08:22:12.37#ibcon#ireg 7 cls_cnt 0 2006.232.08:22:12.37#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.232.08:22:12.49#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.232.08:22:12.49#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.232.08:22:12.49#ibcon#enter wrdev, iclass 38, count 0 2006.232.08:22:12.49#ibcon#first serial, iclass 38, count 0 2006.232.08:22:12.49#ibcon#enter sib2, iclass 38, count 0 2006.232.08:22:12.49#ibcon#flushed, iclass 38, count 0 2006.232.08:22:12.49#ibcon#about to write, iclass 38, count 0 2006.232.08:22:12.49#ibcon#wrote, iclass 38, count 0 2006.232.08:22:12.49#ibcon#about to read 3, iclass 38, count 0 2006.232.08:22:12.51#ibcon#read 3, iclass 38, count 0 2006.232.08:22:12.51#ibcon#about to read 4, iclass 38, count 0 2006.232.08:22:12.51#ibcon#read 4, iclass 38, count 0 2006.232.08:22:12.51#ibcon#about to read 5, iclass 38, count 0 2006.232.08:22:12.51#ibcon#read 5, iclass 38, count 0 2006.232.08:22:12.51#ibcon#about to read 6, iclass 38, count 0 2006.232.08:22:12.51#ibcon#read 6, iclass 38, count 0 2006.232.08:22:12.51#ibcon#end of sib2, iclass 38, count 0 2006.232.08:22:12.51#ibcon#*mode == 0, iclass 38, count 0 2006.232.08:22:12.51#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.232.08:22:12.51#ibcon#[27=USB\r\n] 2006.232.08:22:12.51#ibcon#*before write, iclass 38, count 0 2006.232.08:22:12.51#ibcon#enter sib2, iclass 38, count 0 2006.232.08:22:12.51#ibcon#flushed, iclass 38, count 0 2006.232.08:22:12.51#ibcon#about to write, iclass 38, count 0 2006.232.08:22:12.51#ibcon#wrote, iclass 38, count 0 2006.232.08:22:12.51#ibcon#about to read 3, iclass 38, count 0 2006.232.08:22:12.54#ibcon#read 3, iclass 38, count 0 2006.232.08:22:12.54#ibcon#about to read 4, iclass 38, count 0 2006.232.08:22:12.54#ibcon#read 4, iclass 38, count 0 2006.232.08:22:12.54#ibcon#about to read 5, iclass 38, count 0 2006.232.08:22:12.54#ibcon#read 5, iclass 38, count 0 2006.232.08:22:12.54#ibcon#about to read 6, iclass 38, count 0 2006.232.08:22:12.54#ibcon#read 6, iclass 38, count 0 2006.232.08:22:12.54#ibcon#end of sib2, iclass 38, count 0 2006.232.08:22:12.54#ibcon#*after write, iclass 38, count 0 2006.232.08:22:12.54#ibcon#*before return 0, iclass 38, count 0 2006.232.08:22:12.54#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.232.08:22:12.54#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.232.08:22:12.54#ibcon#about to clear, iclass 38 cls_cnt 0 2006.232.08:22:12.54#ibcon#cleared, iclass 38 cls_cnt 0 2006.232.08:22:12.54$vc4f8/vabw=wide 2006.232.08:22:12.54#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.232.08:22:12.54#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.232.08:22:12.54#ibcon#ireg 8 cls_cnt 0 2006.232.08:22:12.54#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.232.08:22:12.54#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.232.08:22:12.54#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.232.08:22:12.54#ibcon#enter wrdev, iclass 40, count 0 2006.232.08:22:12.54#ibcon#first serial, iclass 40, count 0 2006.232.08:22:12.54#ibcon#enter sib2, iclass 40, count 0 2006.232.08:22:12.54#ibcon#flushed, iclass 40, count 0 2006.232.08:22:12.54#ibcon#about to write, iclass 40, count 0 2006.232.08:22:12.54#ibcon#wrote, iclass 40, count 0 2006.232.08:22:12.54#ibcon#about to read 3, iclass 40, count 0 2006.232.08:22:12.56#ibcon#read 3, iclass 40, count 0 2006.232.08:22:12.56#ibcon#about to read 4, iclass 40, count 0 2006.232.08:22:12.56#ibcon#read 4, iclass 40, count 0 2006.232.08:22:12.56#ibcon#about to read 5, iclass 40, count 0 2006.232.08:22:12.56#ibcon#read 5, iclass 40, count 0 2006.232.08:22:12.56#ibcon#about to read 6, iclass 40, count 0 2006.232.08:22:12.56#ibcon#read 6, iclass 40, count 0 2006.232.08:22:12.56#ibcon#end of sib2, iclass 40, count 0 2006.232.08:22:12.56#ibcon#*mode == 0, iclass 40, count 0 2006.232.08:22:12.56#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.232.08:22:12.56#ibcon#[25=BW32\r\n] 2006.232.08:22:12.56#ibcon#*before write, iclass 40, count 0 2006.232.08:22:12.56#ibcon#enter sib2, iclass 40, count 0 2006.232.08:22:12.56#ibcon#flushed, iclass 40, count 0 2006.232.08:22:12.56#ibcon#about to write, iclass 40, count 0 2006.232.08:22:12.56#ibcon#wrote, iclass 40, count 0 2006.232.08:22:12.56#ibcon#about to read 3, iclass 40, count 0 2006.232.08:22:12.59#ibcon#read 3, iclass 40, count 0 2006.232.08:22:12.59#ibcon#about to read 4, iclass 40, count 0 2006.232.08:22:12.59#ibcon#read 4, iclass 40, count 0 2006.232.08:22:12.59#ibcon#about to read 5, iclass 40, count 0 2006.232.08:22:12.59#ibcon#read 5, iclass 40, count 0 2006.232.08:22:12.59#ibcon#about to read 6, iclass 40, count 0 2006.232.08:22:12.59#ibcon#read 6, iclass 40, count 0 2006.232.08:22:12.59#ibcon#end of sib2, iclass 40, count 0 2006.232.08:22:12.59#ibcon#*after write, iclass 40, count 0 2006.232.08:22:12.59#ibcon#*before return 0, iclass 40, count 0 2006.232.08:22:12.59#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.232.08:22:12.59#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.232.08:22:12.59#ibcon#about to clear, iclass 40 cls_cnt 0 2006.232.08:22:12.59#ibcon#cleared, iclass 40 cls_cnt 0 2006.232.08:22:12.59$vc4f8/vbbw=wide 2006.232.08:22:12.59#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.232.08:22:12.59#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.232.08:22:12.59#ibcon#ireg 8 cls_cnt 0 2006.232.08:22:12.59#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.232.08:22:12.66#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.232.08:22:12.66#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.232.08:22:12.66#ibcon#enter wrdev, iclass 4, count 0 2006.232.08:22:12.66#ibcon#first serial, iclass 4, count 0 2006.232.08:22:12.66#ibcon#enter sib2, iclass 4, count 0 2006.232.08:22:12.66#ibcon#flushed, iclass 4, count 0 2006.232.08:22:12.66#ibcon#about to write, iclass 4, count 0 2006.232.08:22:12.66#ibcon#wrote, iclass 4, count 0 2006.232.08:22:12.66#ibcon#about to read 3, iclass 4, count 0 2006.232.08:22:12.68#ibcon#read 3, iclass 4, count 0 2006.232.08:22:12.68#ibcon#about to read 4, iclass 4, count 0 2006.232.08:22:12.68#ibcon#read 4, iclass 4, count 0 2006.232.08:22:12.68#ibcon#about to read 5, iclass 4, count 0 2006.232.08:22:12.68#ibcon#read 5, iclass 4, count 0 2006.232.08:22:12.68#ibcon#about to read 6, iclass 4, count 0 2006.232.08:22:12.68#ibcon#read 6, iclass 4, count 0 2006.232.08:22:12.68#ibcon#end of sib2, iclass 4, count 0 2006.232.08:22:12.68#ibcon#*mode == 0, iclass 4, count 0 2006.232.08:22:12.68#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.232.08:22:12.68#ibcon#[27=BW32\r\n] 2006.232.08:22:12.68#ibcon#*before write, iclass 4, count 0 2006.232.08:22:12.68#ibcon#enter sib2, iclass 4, count 0 2006.232.08:22:12.68#ibcon#flushed, iclass 4, count 0 2006.232.08:22:12.68#ibcon#about to write, iclass 4, count 0 2006.232.08:22:12.68#ibcon#wrote, iclass 4, count 0 2006.232.08:22:12.68#ibcon#about to read 3, iclass 4, count 0 2006.232.08:22:12.71#ibcon#read 3, iclass 4, count 0 2006.232.08:22:12.71#ibcon#about to read 4, iclass 4, count 0 2006.232.08:22:12.71#ibcon#read 4, iclass 4, count 0 2006.232.08:22:12.71#ibcon#about to read 5, iclass 4, count 0 2006.232.08:22:12.71#ibcon#read 5, iclass 4, count 0 2006.232.08:22:12.71#ibcon#about to read 6, iclass 4, count 0 2006.232.08:22:12.71#ibcon#read 6, iclass 4, count 0 2006.232.08:22:12.71#ibcon#end of sib2, iclass 4, count 0 2006.232.08:22:12.71#ibcon#*after write, iclass 4, count 0 2006.232.08:22:12.71#ibcon#*before return 0, iclass 4, count 0 2006.232.08:22:12.71#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.232.08:22:12.71#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.232.08:22:12.71#ibcon#about to clear, iclass 4 cls_cnt 0 2006.232.08:22:12.71#ibcon#cleared, iclass 4 cls_cnt 0 2006.232.08:22:12.71$4f8m12a/ifd4f 2006.232.08:22:12.71$ifd4f/lo= 2006.232.08:22:12.71$ifd4f/lo=lo1,7680.00,usb,rcp,1 2006.232.08:22:12.71$ifd4f/lo=lo2,1600.00,usb,rcp,1 2006.232.08:22:12.71$ifd4f/lo=lo3,8080.00,usb,rcp,1 2006.232.08:22:12.71$ifd4f/patch= 2006.232.08:22:12.71$ifd4f/patch=lo1,a1,a2,a3,a4 2006.232.08:22:12.71$ifd4f/patch=lo2,b1,b2,b3,b4,b5,b6 2006.232.08:22:12.71$ifd4f/patch=lo3,a5,a6,a7,a8 2006.232.08:22:12.71$4f8m12a/"form=m,16.000,1:2 2006.232.08:22:12.71$4f8m12a/"tpicd 2006.232.08:22:12.71$4f8m12a/echo=off 2006.232.08:22:12.71$4f8m12a/xlog=off 2006.232.08:22:12.71:!2006.232.08:24:20 2006.232.08:22:47.14#trakl#Source acquired 2006.232.08:22:49.14#flagr#flagr/antenna,acquired 2006.232.08:24:20.00:preob 2006.232.08:24:20.13/onsource/TRACKING 2006.232.08:24:20.13:!2006.232.08:24:30 2006.232.08:24:30.00:data_valid=on 2006.232.08:24:30.00:midob 2006.232.08:24:31.13/onsource/TRACKING 2006.232.08:24:31.13/wx/29.14,1007.4,90 2006.232.08:24:31.31/cable/+6.3879E-03 2006.232.08:24:32.40/va/01,08,usb,yes,31,32 2006.232.08:24:32.40/va/02,07,usb,yes,31,32 2006.232.08:24:32.40/va/03,08,usb,yes,23,23 2006.232.08:24:32.40/va/04,07,usb,yes,32,35 2006.232.08:24:32.40/va/05,07,usb,yes,36,38 2006.232.08:24:32.40/va/06,06,usb,yes,35,35 2006.232.08:24:32.40/va/07,06,usb,yes,36,36 2006.232.08:24:32.40/va/08,06,usb,yes,38,38 2006.232.08:24:32.63/valo/01,532.99,yes,locked 2006.232.08:24:32.63/valo/02,572.99,yes,locked 2006.232.08:24:32.63/valo/03,672.99,yes,locked 2006.232.08:24:32.63/valo/04,832.99,yes,locked 2006.232.08:24:32.63/valo/05,652.99,yes,locked 2006.232.08:24:32.63/valo/06,772.99,yes,locked 2006.232.08:24:32.63/valo/07,832.99,yes,locked 2006.232.08:24:32.63/valo/08,852.99,yes,locked 2006.232.08:24:33.72/vb/01,04,usb,yes,31,29 2006.232.08:24:33.72/vb/02,04,usb,yes,32,34 2006.232.08:24:33.72/vb/03,04,usb,yes,29,32 2006.232.08:24:33.72/vb/04,04,usb,yes,29,30 2006.232.08:24:33.72/vb/05,03,usb,yes,35,39 2006.232.08:24:33.72/vb/06,04,usb,yes,29,32 2006.232.08:24:33.72/vb/07,04,usb,yes,31,31 2006.232.08:24:33.72/vb/08,04,usb,yes,29,32 2006.232.08:24:33.95/vblo/01,632.99,yes,locked 2006.232.08:24:33.95/vblo/02,640.99,yes,locked 2006.232.08:24:33.95/vblo/03,656.99,yes,locked 2006.232.08:24:33.95/vblo/04,712.99,yes,locked 2006.232.08:24:33.95/vblo/05,744.99,yes,locked 2006.232.08:24:33.95/vblo/06,752.99,yes,locked 2006.232.08:24:33.95/vblo/07,734.99,yes,locked 2006.232.08:24:33.95/vblo/08,744.99,yes,locked 2006.232.08:24:34.10/vabw/8 2006.232.08:24:34.25/vbbw/8 2006.232.08:24:34.34/xfe/off,on,14.0 2006.232.08:24:34.73/ifatt/23,28,28,28 2006.232.08:24:35.07/fmout-gps/S +4.61E-07 2006.232.08:24:35.11:!2006.232.08:25:30 2006.232.08:25:30.00:data_valid=off 2006.232.08:25:30.01:postob 2006.232.08:25:30.22/cable/+6.3897E-03 2006.232.08:25:30.23/wx/29.12,1007.4,90 2006.232.08:25:31.07/fmout-gps/S +4.61E-07 2006.232.08:25:31.08:scan_name=232-0826,k06232,60 2006.232.08:25:31.08:source=3c418,203837.03,511912.7,2000.0,cw 2006.232.08:25:31.14#flagr#flagr/antenna,new-source 2006.232.08:25:32.14:checkk5 2006.232.08:25:32.52/chk_autoobs//k5ts1/ autoobs is running! 2006.232.08:25:32.89/chk_autoobs//k5ts2/ autoobs is running! 2006.232.08:25:33.27/chk_autoobs//k5ts3/ autoobs is running! 2006.232.08:25:33.65/chk_autoobs//k5ts4/ autoobs is running! 2006.232.08:25:34.02/chk_obsdata//k5ts1/T2320824??a.dat file size is correct (nominal:480MB, actual:480MB). 2006.232.08:25:34.38/chk_obsdata//k5ts2/T2320824??b.dat file size is correct (nominal:480MB, actual:480MB). 2006.232.08:25:34.75/chk_obsdata//k5ts3/T2320824??c.dat file size is correct (nominal:480MB, actual:480MB). 2006.232.08:25:35.12/chk_obsdata//k5ts4/T2320824??d.dat file size is correct (nominal:480MB, actual:480MB). 2006.232.08:25:35.81/k5log//k5ts1_log_newline 2006.232.08:25:36.50/k5log//k5ts2_log_newline 2006.232.08:25:37.19/k5log//k5ts3_log_newline 2006.232.08:25:37.88/k5log//k5ts4_log_newline 2006.232.08:25:37.90/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.232.08:25:37.90:4f8m12a=3 2006.232.08:25:37.90$4f8m12a/echo=on 2006.232.08:25:37.90$4f8m12a/pcalon 2006.232.08:25:37.90$pcalon/"no phase cal control is implemented here 2006.232.08:25:37.90$4f8m12a/"tpicd=stop 2006.232.08:25:37.90$4f8m12a/vc4f8 2006.232.08:25:37.90$vc4f8/valo=1,532.99 2006.232.08:25:37.91#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.232.08:25:37.91#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.232.08:25:37.91#ibcon#ireg 17 cls_cnt 0 2006.232.08:25:37.91#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.232.08:25:37.91#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.232.08:25:37.91#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.232.08:25:37.91#ibcon#enter wrdev, iclass 17, count 0 2006.232.08:25:37.91#ibcon#first serial, iclass 17, count 0 2006.232.08:25:37.91#ibcon#enter sib2, iclass 17, count 0 2006.232.08:25:37.91#ibcon#flushed, iclass 17, count 0 2006.232.08:25:37.91#ibcon#about to write, iclass 17, count 0 2006.232.08:25:37.91#ibcon#wrote, iclass 17, count 0 2006.232.08:25:37.91#ibcon#about to read 3, iclass 17, count 0 2006.232.08:25:37.94#ibcon#read 3, iclass 17, count 0 2006.232.08:25:37.94#ibcon#about to read 4, iclass 17, count 0 2006.232.08:25:37.94#ibcon#read 4, iclass 17, count 0 2006.232.08:25:37.94#ibcon#about to read 5, iclass 17, count 0 2006.232.08:25:37.94#ibcon#read 5, iclass 17, count 0 2006.232.08:25:37.94#ibcon#about to read 6, iclass 17, count 0 2006.232.08:25:37.94#ibcon#read 6, iclass 17, count 0 2006.232.08:25:37.94#ibcon#end of sib2, iclass 17, count 0 2006.232.08:25:37.94#ibcon#*mode == 0, iclass 17, count 0 2006.232.08:25:37.94#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.232.08:25:37.94#ibcon#[26=FRQ=01,532.99\r\n] 2006.232.08:25:37.94#ibcon#*before write, iclass 17, count 0 2006.232.08:25:37.94#ibcon#enter sib2, iclass 17, count 0 2006.232.08:25:37.94#ibcon#flushed, iclass 17, count 0 2006.232.08:25:37.94#ibcon#about to write, iclass 17, count 0 2006.232.08:25:37.94#ibcon#wrote, iclass 17, count 0 2006.232.08:25:37.94#ibcon#about to read 3, iclass 17, count 0 2006.232.08:25:37.99#ibcon#read 3, iclass 17, count 0 2006.232.08:25:37.99#ibcon#about to read 4, iclass 17, count 0 2006.232.08:25:37.99#ibcon#read 4, iclass 17, count 0 2006.232.08:25:37.99#ibcon#about to read 5, iclass 17, count 0 2006.232.08:25:37.99#ibcon#read 5, iclass 17, count 0 2006.232.08:25:37.99#ibcon#about to read 6, iclass 17, count 0 2006.232.08:25:37.99#ibcon#read 6, iclass 17, count 0 2006.232.08:25:37.99#ibcon#end of sib2, iclass 17, count 0 2006.232.08:25:37.99#ibcon#*after write, iclass 17, count 0 2006.232.08:25:37.99#ibcon#*before return 0, iclass 17, count 0 2006.232.08:25:37.99#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.232.08:25:37.99#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.232.08:25:37.99#ibcon#about to clear, iclass 17 cls_cnt 0 2006.232.08:25:37.99#ibcon#cleared, iclass 17 cls_cnt 0 2006.232.08:25:37.99$vc4f8/va=1,8 2006.232.08:25:37.99#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.232.08:25:37.99#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.232.08:25:37.99#ibcon#ireg 11 cls_cnt 2 2006.232.08:25:37.99#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.232.08:25:37.99#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.232.08:25:37.99#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.232.08:25:37.99#ibcon#enter wrdev, iclass 19, count 2 2006.232.08:25:37.99#ibcon#first serial, iclass 19, count 2 2006.232.08:25:37.99#ibcon#enter sib2, iclass 19, count 2 2006.232.08:25:37.99#ibcon#flushed, iclass 19, count 2 2006.232.08:25:37.99#ibcon#about to write, iclass 19, count 2 2006.232.08:25:37.99#ibcon#wrote, iclass 19, count 2 2006.232.08:25:37.99#ibcon#about to read 3, iclass 19, count 2 2006.232.08:25:38.01#ibcon#read 3, iclass 19, count 2 2006.232.08:25:38.01#ibcon#about to read 4, iclass 19, count 2 2006.232.08:25:38.01#ibcon#read 4, iclass 19, count 2 2006.232.08:25:38.01#ibcon#about to read 5, iclass 19, count 2 2006.232.08:25:38.01#ibcon#read 5, iclass 19, count 2 2006.232.08:25:38.01#ibcon#about to read 6, iclass 19, count 2 2006.232.08:25:38.01#ibcon#read 6, iclass 19, count 2 2006.232.08:25:38.01#ibcon#end of sib2, iclass 19, count 2 2006.232.08:25:38.01#ibcon#*mode == 0, iclass 19, count 2 2006.232.08:25:38.01#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.232.08:25:38.01#ibcon#[25=AT01-08\r\n] 2006.232.08:25:38.01#ibcon#*before write, iclass 19, count 2 2006.232.08:25:38.01#ibcon#enter sib2, iclass 19, count 2 2006.232.08:25:38.01#ibcon#flushed, iclass 19, count 2 2006.232.08:25:38.01#ibcon#about to write, iclass 19, count 2 2006.232.08:25:38.01#ibcon#wrote, iclass 19, count 2 2006.232.08:25:38.01#ibcon#about to read 3, iclass 19, count 2 2006.232.08:25:38.04#ibcon#read 3, iclass 19, count 2 2006.232.08:25:38.04#ibcon#about to read 4, iclass 19, count 2 2006.232.08:25:38.04#ibcon#read 4, iclass 19, count 2 2006.232.08:25:38.04#ibcon#about to read 5, iclass 19, count 2 2006.232.08:25:38.04#ibcon#read 5, iclass 19, count 2 2006.232.08:25:38.04#ibcon#about to read 6, iclass 19, count 2 2006.232.08:25:38.04#ibcon#read 6, iclass 19, count 2 2006.232.08:25:38.04#ibcon#end of sib2, iclass 19, count 2 2006.232.08:25:38.04#ibcon#*after write, iclass 19, count 2 2006.232.08:25:38.04#ibcon#*before return 0, iclass 19, count 2 2006.232.08:25:38.04#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.232.08:25:38.04#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.232.08:25:38.04#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.232.08:25:38.04#ibcon#ireg 7 cls_cnt 0 2006.232.08:25:38.04#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.232.08:25:38.16#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.232.08:25:38.16#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.232.08:25:38.16#ibcon#enter wrdev, iclass 19, count 0 2006.232.08:25:38.16#ibcon#first serial, iclass 19, count 0 2006.232.08:25:38.16#ibcon#enter sib2, iclass 19, count 0 2006.232.08:25:38.16#ibcon#flushed, iclass 19, count 0 2006.232.08:25:38.16#ibcon#about to write, iclass 19, count 0 2006.232.08:25:38.16#ibcon#wrote, iclass 19, count 0 2006.232.08:25:38.16#ibcon#about to read 3, iclass 19, count 0 2006.232.08:25:38.18#ibcon#read 3, iclass 19, count 0 2006.232.08:25:38.18#ibcon#about to read 4, iclass 19, count 0 2006.232.08:25:38.18#ibcon#read 4, iclass 19, count 0 2006.232.08:25:38.18#ibcon#about to read 5, iclass 19, count 0 2006.232.08:25:38.18#ibcon#read 5, iclass 19, count 0 2006.232.08:25:38.18#ibcon#about to read 6, iclass 19, count 0 2006.232.08:25:38.18#ibcon#read 6, iclass 19, count 0 2006.232.08:25:38.18#ibcon#end of sib2, iclass 19, count 0 2006.232.08:25:38.18#ibcon#*mode == 0, iclass 19, count 0 2006.232.08:25:38.18#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.232.08:25:38.18#ibcon#[25=USB\r\n] 2006.232.08:25:38.18#ibcon#*before write, iclass 19, count 0 2006.232.08:25:38.18#ibcon#enter sib2, iclass 19, count 0 2006.232.08:25:38.18#ibcon#flushed, iclass 19, count 0 2006.232.08:25:38.18#ibcon#about to write, iclass 19, count 0 2006.232.08:25:38.18#ibcon#wrote, iclass 19, count 0 2006.232.08:25:38.18#ibcon#about to read 3, iclass 19, count 0 2006.232.08:25:38.21#ibcon#read 3, iclass 19, count 0 2006.232.08:25:38.21#ibcon#about to read 4, iclass 19, count 0 2006.232.08:25:38.21#ibcon#read 4, iclass 19, count 0 2006.232.08:25:38.21#ibcon#about to read 5, iclass 19, count 0 2006.232.08:25:38.21#ibcon#read 5, iclass 19, count 0 2006.232.08:25:38.21#ibcon#about to read 6, iclass 19, count 0 2006.232.08:25:38.21#ibcon#read 6, iclass 19, count 0 2006.232.08:25:38.21#ibcon#end of sib2, iclass 19, count 0 2006.232.08:25:38.21#ibcon#*after write, iclass 19, count 0 2006.232.08:25:38.21#ibcon#*before return 0, iclass 19, count 0 2006.232.08:25:38.21#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.232.08:25:38.21#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.232.08:25:38.21#ibcon#about to clear, iclass 19 cls_cnt 0 2006.232.08:25:38.21#ibcon#cleared, iclass 19 cls_cnt 0 2006.232.08:25:38.21$vc4f8/valo=2,572.99 2006.232.08:25:38.21#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.232.08:25:38.21#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.232.08:25:38.21#ibcon#ireg 17 cls_cnt 0 2006.232.08:25:38.21#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.232.08:25:38.21#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.232.08:25:38.21#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.232.08:25:38.21#ibcon#enter wrdev, iclass 21, count 0 2006.232.08:25:38.21#ibcon#first serial, iclass 21, count 0 2006.232.08:25:38.21#ibcon#enter sib2, iclass 21, count 0 2006.232.08:25:38.21#ibcon#flushed, iclass 21, count 0 2006.232.08:25:38.21#ibcon#about to write, iclass 21, count 0 2006.232.08:25:38.21#ibcon#wrote, iclass 21, count 0 2006.232.08:25:38.21#ibcon#about to read 3, iclass 21, count 0 2006.232.08:25:38.23#ibcon#read 3, iclass 21, count 0 2006.232.08:25:38.23#ibcon#about to read 4, iclass 21, count 0 2006.232.08:25:38.23#ibcon#read 4, iclass 21, count 0 2006.232.08:25:38.23#ibcon#about to read 5, iclass 21, count 0 2006.232.08:25:38.23#ibcon#read 5, iclass 21, count 0 2006.232.08:25:38.23#ibcon#about to read 6, iclass 21, count 0 2006.232.08:25:38.23#ibcon#read 6, iclass 21, count 0 2006.232.08:25:38.23#ibcon#end of sib2, iclass 21, count 0 2006.232.08:25:38.23#ibcon#*mode == 0, iclass 21, count 0 2006.232.08:25:38.23#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.232.08:25:38.23#ibcon#[26=FRQ=02,572.99\r\n] 2006.232.08:25:38.23#ibcon#*before write, iclass 21, count 0 2006.232.08:25:38.23#ibcon#enter sib2, iclass 21, count 0 2006.232.08:25:38.23#ibcon#flushed, iclass 21, count 0 2006.232.08:25:38.23#ibcon#about to write, iclass 21, count 0 2006.232.08:25:38.23#ibcon#wrote, iclass 21, count 0 2006.232.08:25:38.23#ibcon#about to read 3, iclass 21, count 0 2006.232.08:25:38.27#ibcon#read 3, iclass 21, count 0 2006.232.08:25:38.27#ibcon#about to read 4, iclass 21, count 0 2006.232.08:25:38.27#ibcon#read 4, iclass 21, count 0 2006.232.08:25:38.27#ibcon#about to read 5, iclass 21, count 0 2006.232.08:25:38.27#ibcon#read 5, iclass 21, count 0 2006.232.08:25:38.27#ibcon#about to read 6, iclass 21, count 0 2006.232.08:25:38.27#ibcon#read 6, iclass 21, count 0 2006.232.08:25:38.27#ibcon#end of sib2, iclass 21, count 0 2006.232.08:25:38.27#ibcon#*after write, iclass 21, count 0 2006.232.08:25:38.27#ibcon#*before return 0, iclass 21, count 0 2006.232.08:25:38.27#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.232.08:25:38.27#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.232.08:25:38.27#ibcon#about to clear, iclass 21 cls_cnt 0 2006.232.08:25:38.27#ibcon#cleared, iclass 21 cls_cnt 0 2006.232.08:25:38.27$vc4f8/va=2,7 2006.232.08:25:38.27#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.232.08:25:38.27#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.232.08:25:38.27#ibcon#ireg 11 cls_cnt 2 2006.232.08:25:38.27#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.232.08:25:38.33#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.232.08:25:38.33#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.232.08:25:38.33#ibcon#enter wrdev, iclass 23, count 2 2006.232.08:25:38.33#ibcon#first serial, iclass 23, count 2 2006.232.08:25:38.33#ibcon#enter sib2, iclass 23, count 2 2006.232.08:25:38.33#ibcon#flushed, iclass 23, count 2 2006.232.08:25:38.33#ibcon#about to write, iclass 23, count 2 2006.232.08:25:38.33#ibcon#wrote, iclass 23, count 2 2006.232.08:25:38.33#ibcon#about to read 3, iclass 23, count 2 2006.232.08:25:38.35#ibcon#read 3, iclass 23, count 2 2006.232.08:25:38.35#ibcon#about to read 4, iclass 23, count 2 2006.232.08:25:38.35#ibcon#read 4, iclass 23, count 2 2006.232.08:25:38.35#ibcon#about to read 5, iclass 23, count 2 2006.232.08:25:38.35#ibcon#read 5, iclass 23, count 2 2006.232.08:25:38.35#ibcon#about to read 6, iclass 23, count 2 2006.232.08:25:38.35#ibcon#read 6, iclass 23, count 2 2006.232.08:25:38.35#ibcon#end of sib2, iclass 23, count 2 2006.232.08:25:38.35#ibcon#*mode == 0, iclass 23, count 2 2006.232.08:25:38.35#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.232.08:25:38.35#ibcon#[25=AT02-07\r\n] 2006.232.08:25:38.35#ibcon#*before write, iclass 23, count 2 2006.232.08:25:38.35#ibcon#enter sib2, iclass 23, count 2 2006.232.08:25:38.35#ibcon#flushed, iclass 23, count 2 2006.232.08:25:38.35#ibcon#about to write, iclass 23, count 2 2006.232.08:25:38.35#ibcon#wrote, iclass 23, count 2 2006.232.08:25:38.35#ibcon#about to read 3, iclass 23, count 2 2006.232.08:25:38.38#ibcon#read 3, iclass 23, count 2 2006.232.08:25:38.38#ibcon#about to read 4, iclass 23, count 2 2006.232.08:25:38.38#ibcon#read 4, iclass 23, count 2 2006.232.08:25:38.38#ibcon#about to read 5, iclass 23, count 2 2006.232.08:25:38.38#ibcon#read 5, iclass 23, count 2 2006.232.08:25:38.38#ibcon#about to read 6, iclass 23, count 2 2006.232.08:25:38.38#ibcon#read 6, iclass 23, count 2 2006.232.08:25:38.38#ibcon#end of sib2, iclass 23, count 2 2006.232.08:25:38.38#ibcon#*after write, iclass 23, count 2 2006.232.08:25:38.38#ibcon#*before return 0, iclass 23, count 2 2006.232.08:25:38.38#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.232.08:25:38.38#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.232.08:25:38.38#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.232.08:25:38.38#ibcon#ireg 7 cls_cnt 0 2006.232.08:25:38.38#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.232.08:25:38.50#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.232.08:25:38.50#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.232.08:25:38.50#ibcon#enter wrdev, iclass 23, count 0 2006.232.08:25:38.50#ibcon#first serial, iclass 23, count 0 2006.232.08:25:38.50#ibcon#enter sib2, iclass 23, count 0 2006.232.08:25:38.50#ibcon#flushed, iclass 23, count 0 2006.232.08:25:38.50#ibcon#about to write, iclass 23, count 0 2006.232.08:25:38.50#ibcon#wrote, iclass 23, count 0 2006.232.08:25:38.50#ibcon#about to read 3, iclass 23, count 0 2006.232.08:25:38.52#ibcon#read 3, iclass 23, count 0 2006.232.08:25:38.52#ibcon#about to read 4, iclass 23, count 0 2006.232.08:25:38.52#ibcon#read 4, iclass 23, count 0 2006.232.08:25:38.52#ibcon#about to read 5, iclass 23, count 0 2006.232.08:25:38.52#ibcon#read 5, iclass 23, count 0 2006.232.08:25:38.52#ibcon#about to read 6, iclass 23, count 0 2006.232.08:25:38.52#ibcon#read 6, iclass 23, count 0 2006.232.08:25:38.52#ibcon#end of sib2, iclass 23, count 0 2006.232.08:25:38.52#ibcon#*mode == 0, iclass 23, count 0 2006.232.08:25:38.52#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.232.08:25:38.52#ibcon#[25=USB\r\n] 2006.232.08:25:38.52#ibcon#*before write, iclass 23, count 0 2006.232.08:25:38.52#ibcon#enter sib2, iclass 23, count 0 2006.232.08:25:38.52#ibcon#flushed, iclass 23, count 0 2006.232.08:25:38.52#ibcon#about to write, iclass 23, count 0 2006.232.08:25:38.52#ibcon#wrote, iclass 23, count 0 2006.232.08:25:38.52#ibcon#about to read 3, iclass 23, count 0 2006.232.08:25:38.55#ibcon#read 3, iclass 23, count 0 2006.232.08:25:38.55#ibcon#about to read 4, iclass 23, count 0 2006.232.08:25:38.55#ibcon#read 4, iclass 23, count 0 2006.232.08:25:38.55#ibcon#about to read 5, iclass 23, count 0 2006.232.08:25:38.55#ibcon#read 5, iclass 23, count 0 2006.232.08:25:38.55#ibcon#about to read 6, iclass 23, count 0 2006.232.08:25:38.55#ibcon#read 6, iclass 23, count 0 2006.232.08:25:38.55#ibcon#end of sib2, iclass 23, count 0 2006.232.08:25:38.55#ibcon#*after write, iclass 23, count 0 2006.232.08:25:38.55#ibcon#*before return 0, iclass 23, count 0 2006.232.08:25:38.55#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.232.08:25:38.55#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.232.08:25:38.55#ibcon#about to clear, iclass 23 cls_cnt 0 2006.232.08:25:38.55#ibcon#cleared, iclass 23 cls_cnt 0 2006.232.08:25:38.55$vc4f8/valo=3,672.99 2006.232.08:25:38.55#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.232.08:25:38.55#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.232.08:25:38.55#ibcon#ireg 17 cls_cnt 0 2006.232.08:25:38.55#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:25:38.55#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:25:38.55#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:25:38.55#ibcon#enter wrdev, iclass 25, count 0 2006.232.08:25:38.55#ibcon#first serial, iclass 25, count 0 2006.232.08:25:38.55#ibcon#enter sib2, iclass 25, count 0 2006.232.08:25:38.55#ibcon#flushed, iclass 25, count 0 2006.232.08:25:38.55#ibcon#about to write, iclass 25, count 0 2006.232.08:25:38.55#ibcon#wrote, iclass 25, count 0 2006.232.08:25:38.55#ibcon#about to read 3, iclass 25, count 0 2006.232.08:25:38.57#ibcon#read 3, iclass 25, count 0 2006.232.08:25:38.57#ibcon#about to read 4, iclass 25, count 0 2006.232.08:25:38.57#ibcon#read 4, iclass 25, count 0 2006.232.08:25:38.57#ibcon#about to read 5, iclass 25, count 0 2006.232.08:25:38.57#ibcon#read 5, iclass 25, count 0 2006.232.08:25:38.57#ibcon#about to read 6, iclass 25, count 0 2006.232.08:25:38.57#ibcon#read 6, iclass 25, count 0 2006.232.08:25:38.57#ibcon#end of sib2, iclass 25, count 0 2006.232.08:25:38.57#ibcon#*mode == 0, iclass 25, count 0 2006.232.08:25:38.57#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.232.08:25:38.57#ibcon#[26=FRQ=03,672.99\r\n] 2006.232.08:25:38.57#ibcon#*before write, iclass 25, count 0 2006.232.08:25:38.57#ibcon#enter sib2, iclass 25, count 0 2006.232.08:25:38.57#ibcon#flushed, iclass 25, count 0 2006.232.08:25:38.57#ibcon#about to write, iclass 25, count 0 2006.232.08:25:38.57#ibcon#wrote, iclass 25, count 0 2006.232.08:25:38.57#ibcon#about to read 3, iclass 25, count 0 2006.232.08:25:38.61#ibcon#read 3, iclass 25, count 0 2006.232.08:25:38.61#ibcon#about to read 4, iclass 25, count 0 2006.232.08:25:38.61#ibcon#read 4, iclass 25, count 0 2006.232.08:25:38.61#ibcon#about to read 5, iclass 25, count 0 2006.232.08:25:38.61#ibcon#read 5, iclass 25, count 0 2006.232.08:25:38.61#ibcon#about to read 6, iclass 25, count 0 2006.232.08:25:38.61#ibcon#read 6, iclass 25, count 0 2006.232.08:25:38.61#ibcon#end of sib2, iclass 25, count 0 2006.232.08:25:38.61#ibcon#*after write, iclass 25, count 0 2006.232.08:25:38.61#ibcon#*before return 0, iclass 25, count 0 2006.232.08:25:38.61#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:25:38.61#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:25:38.61#ibcon#about to clear, iclass 25 cls_cnt 0 2006.232.08:25:38.61#ibcon#cleared, iclass 25 cls_cnt 0 2006.232.08:25:38.61$vc4f8/va=3,8 2006.232.08:25:38.61#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.232.08:25:38.61#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.232.08:25:38.61#ibcon#ireg 11 cls_cnt 2 2006.232.08:25:38.61#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:25:38.67#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:25:38.67#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:25:38.67#ibcon#enter wrdev, iclass 27, count 2 2006.232.08:25:38.67#ibcon#first serial, iclass 27, count 2 2006.232.08:25:38.67#ibcon#enter sib2, iclass 27, count 2 2006.232.08:25:38.67#ibcon#flushed, iclass 27, count 2 2006.232.08:25:38.67#ibcon#about to write, iclass 27, count 2 2006.232.08:25:38.67#ibcon#wrote, iclass 27, count 2 2006.232.08:25:38.67#ibcon#about to read 3, iclass 27, count 2 2006.232.08:25:38.69#ibcon#read 3, iclass 27, count 2 2006.232.08:25:38.69#ibcon#about to read 4, iclass 27, count 2 2006.232.08:25:38.69#ibcon#read 4, iclass 27, count 2 2006.232.08:25:38.69#ibcon#about to read 5, iclass 27, count 2 2006.232.08:25:38.69#ibcon#read 5, iclass 27, count 2 2006.232.08:25:38.69#ibcon#about to read 6, iclass 27, count 2 2006.232.08:25:38.69#ibcon#read 6, iclass 27, count 2 2006.232.08:25:38.69#ibcon#end of sib2, iclass 27, count 2 2006.232.08:25:38.69#ibcon#*mode == 0, iclass 27, count 2 2006.232.08:25:38.69#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.232.08:25:38.69#ibcon#[25=AT03-08\r\n] 2006.232.08:25:38.69#ibcon#*before write, iclass 27, count 2 2006.232.08:25:38.69#ibcon#enter sib2, iclass 27, count 2 2006.232.08:25:38.69#ibcon#flushed, iclass 27, count 2 2006.232.08:25:38.69#ibcon#about to write, iclass 27, count 2 2006.232.08:25:38.69#ibcon#wrote, iclass 27, count 2 2006.232.08:25:38.69#ibcon#about to read 3, iclass 27, count 2 2006.232.08:25:38.72#ibcon#read 3, iclass 27, count 2 2006.232.08:25:38.72#ibcon#about to read 4, iclass 27, count 2 2006.232.08:25:38.72#ibcon#read 4, iclass 27, count 2 2006.232.08:25:38.72#ibcon#about to read 5, iclass 27, count 2 2006.232.08:25:38.72#ibcon#read 5, iclass 27, count 2 2006.232.08:25:38.72#ibcon#about to read 6, iclass 27, count 2 2006.232.08:25:38.72#ibcon#read 6, iclass 27, count 2 2006.232.08:25:38.72#ibcon#end of sib2, iclass 27, count 2 2006.232.08:25:38.72#ibcon#*after write, iclass 27, count 2 2006.232.08:25:38.72#ibcon#*before return 0, iclass 27, count 2 2006.232.08:25:38.72#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:25:38.72#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:25:38.72#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.232.08:25:38.72#ibcon#ireg 7 cls_cnt 0 2006.232.08:25:38.72#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:25:38.84#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:25:38.84#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:25:38.84#ibcon#enter wrdev, iclass 27, count 0 2006.232.08:25:38.84#ibcon#first serial, iclass 27, count 0 2006.232.08:25:38.84#ibcon#enter sib2, iclass 27, count 0 2006.232.08:25:38.84#ibcon#flushed, iclass 27, count 0 2006.232.08:25:38.84#ibcon#about to write, iclass 27, count 0 2006.232.08:25:38.84#ibcon#wrote, iclass 27, count 0 2006.232.08:25:38.84#ibcon#about to read 3, iclass 27, count 0 2006.232.08:25:38.86#ibcon#read 3, iclass 27, count 0 2006.232.08:25:38.86#ibcon#about to read 4, iclass 27, count 0 2006.232.08:25:38.86#ibcon#read 4, iclass 27, count 0 2006.232.08:25:38.86#ibcon#about to read 5, iclass 27, count 0 2006.232.08:25:38.86#ibcon#read 5, iclass 27, count 0 2006.232.08:25:38.86#ibcon#about to read 6, iclass 27, count 0 2006.232.08:25:38.86#ibcon#read 6, iclass 27, count 0 2006.232.08:25:38.86#ibcon#end of sib2, iclass 27, count 0 2006.232.08:25:38.86#ibcon#*mode == 0, iclass 27, count 0 2006.232.08:25:38.86#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.232.08:25:38.86#ibcon#[25=USB\r\n] 2006.232.08:25:38.86#ibcon#*before write, iclass 27, count 0 2006.232.08:25:38.86#ibcon#enter sib2, iclass 27, count 0 2006.232.08:25:38.86#ibcon#flushed, iclass 27, count 0 2006.232.08:25:38.86#ibcon#about to write, iclass 27, count 0 2006.232.08:25:38.86#ibcon#wrote, iclass 27, count 0 2006.232.08:25:38.86#ibcon#about to read 3, iclass 27, count 0 2006.232.08:25:38.89#ibcon#read 3, iclass 27, count 0 2006.232.08:25:38.89#ibcon#about to read 4, iclass 27, count 0 2006.232.08:25:38.89#ibcon#read 4, iclass 27, count 0 2006.232.08:25:38.89#ibcon#about to read 5, iclass 27, count 0 2006.232.08:25:38.89#ibcon#read 5, iclass 27, count 0 2006.232.08:25:38.89#ibcon#about to read 6, iclass 27, count 0 2006.232.08:25:38.89#ibcon#read 6, iclass 27, count 0 2006.232.08:25:38.89#ibcon#end of sib2, iclass 27, count 0 2006.232.08:25:38.89#ibcon#*after write, iclass 27, count 0 2006.232.08:25:38.89#ibcon#*before return 0, iclass 27, count 0 2006.232.08:25:38.89#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:25:38.89#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:25:38.89#ibcon#about to clear, iclass 27 cls_cnt 0 2006.232.08:25:38.89#ibcon#cleared, iclass 27 cls_cnt 0 2006.232.08:25:38.89$vc4f8/valo=4,832.99 2006.232.08:25:38.89#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.232.08:25:38.89#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.232.08:25:38.89#ibcon#ireg 17 cls_cnt 0 2006.232.08:25:38.89#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:25:38.89#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:25:38.89#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:25:38.89#ibcon#enter wrdev, iclass 29, count 0 2006.232.08:25:38.89#ibcon#first serial, iclass 29, count 0 2006.232.08:25:38.89#ibcon#enter sib2, iclass 29, count 0 2006.232.08:25:38.89#ibcon#flushed, iclass 29, count 0 2006.232.08:25:38.89#ibcon#about to write, iclass 29, count 0 2006.232.08:25:38.89#ibcon#wrote, iclass 29, count 0 2006.232.08:25:38.89#ibcon#about to read 3, iclass 29, count 0 2006.232.08:25:38.91#ibcon#read 3, iclass 29, count 0 2006.232.08:25:38.91#ibcon#about to read 4, iclass 29, count 0 2006.232.08:25:38.91#ibcon#read 4, iclass 29, count 0 2006.232.08:25:38.91#ibcon#about to read 5, iclass 29, count 0 2006.232.08:25:38.91#ibcon#read 5, iclass 29, count 0 2006.232.08:25:38.91#ibcon#about to read 6, iclass 29, count 0 2006.232.08:25:38.91#ibcon#read 6, iclass 29, count 0 2006.232.08:25:38.91#ibcon#end of sib2, iclass 29, count 0 2006.232.08:25:38.91#ibcon#*mode == 0, iclass 29, count 0 2006.232.08:25:38.91#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.232.08:25:38.91#ibcon#[26=FRQ=04,832.99\r\n] 2006.232.08:25:38.91#ibcon#*before write, iclass 29, count 0 2006.232.08:25:38.91#ibcon#enter sib2, iclass 29, count 0 2006.232.08:25:38.91#ibcon#flushed, iclass 29, count 0 2006.232.08:25:38.91#ibcon#about to write, iclass 29, count 0 2006.232.08:25:38.91#ibcon#wrote, iclass 29, count 0 2006.232.08:25:38.91#ibcon#about to read 3, iclass 29, count 0 2006.232.08:25:38.95#ibcon#read 3, iclass 29, count 0 2006.232.08:25:38.95#ibcon#about to read 4, iclass 29, count 0 2006.232.08:25:38.95#ibcon#read 4, iclass 29, count 0 2006.232.08:25:38.95#ibcon#about to read 5, iclass 29, count 0 2006.232.08:25:38.95#ibcon#read 5, iclass 29, count 0 2006.232.08:25:38.95#ibcon#about to read 6, iclass 29, count 0 2006.232.08:25:38.95#ibcon#read 6, iclass 29, count 0 2006.232.08:25:38.95#ibcon#end of sib2, iclass 29, count 0 2006.232.08:25:38.95#ibcon#*after write, iclass 29, count 0 2006.232.08:25:38.95#ibcon#*before return 0, iclass 29, count 0 2006.232.08:25:38.95#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:25:38.95#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:25:38.95#ibcon#about to clear, iclass 29 cls_cnt 0 2006.232.08:25:38.95#ibcon#cleared, iclass 29 cls_cnt 0 2006.232.08:25:38.95$vc4f8/va=4,7 2006.232.08:25:38.95#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.232.08:25:38.95#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.232.08:25:38.95#ibcon#ireg 11 cls_cnt 2 2006.232.08:25:38.95#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.232.08:25:39.01#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.232.08:25:39.01#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.232.08:25:39.01#ibcon#enter wrdev, iclass 31, count 2 2006.232.08:25:39.01#ibcon#first serial, iclass 31, count 2 2006.232.08:25:39.01#ibcon#enter sib2, iclass 31, count 2 2006.232.08:25:39.01#ibcon#flushed, iclass 31, count 2 2006.232.08:25:39.01#ibcon#about to write, iclass 31, count 2 2006.232.08:25:39.01#ibcon#wrote, iclass 31, count 2 2006.232.08:25:39.01#ibcon#about to read 3, iclass 31, count 2 2006.232.08:25:39.03#ibcon#read 3, iclass 31, count 2 2006.232.08:25:39.03#ibcon#about to read 4, iclass 31, count 2 2006.232.08:25:39.03#ibcon#read 4, iclass 31, count 2 2006.232.08:25:39.03#ibcon#about to read 5, iclass 31, count 2 2006.232.08:25:39.03#ibcon#read 5, iclass 31, count 2 2006.232.08:25:39.03#ibcon#about to read 6, iclass 31, count 2 2006.232.08:25:39.03#ibcon#read 6, iclass 31, count 2 2006.232.08:25:39.03#ibcon#end of sib2, iclass 31, count 2 2006.232.08:25:39.03#ibcon#*mode == 0, iclass 31, count 2 2006.232.08:25:39.03#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.232.08:25:39.03#ibcon#[25=AT04-07\r\n] 2006.232.08:25:39.03#ibcon#*before write, iclass 31, count 2 2006.232.08:25:39.03#ibcon#enter sib2, iclass 31, count 2 2006.232.08:25:39.03#ibcon#flushed, iclass 31, count 2 2006.232.08:25:39.03#ibcon#about to write, iclass 31, count 2 2006.232.08:25:39.03#ibcon#wrote, iclass 31, count 2 2006.232.08:25:39.03#ibcon#about to read 3, iclass 31, count 2 2006.232.08:25:39.06#ibcon#read 3, iclass 31, count 2 2006.232.08:25:39.06#ibcon#about to read 4, iclass 31, count 2 2006.232.08:25:39.06#ibcon#read 4, iclass 31, count 2 2006.232.08:25:39.06#ibcon#about to read 5, iclass 31, count 2 2006.232.08:25:39.06#ibcon#read 5, iclass 31, count 2 2006.232.08:25:39.06#ibcon#about to read 6, iclass 31, count 2 2006.232.08:25:39.06#ibcon#read 6, iclass 31, count 2 2006.232.08:25:39.06#ibcon#end of sib2, iclass 31, count 2 2006.232.08:25:39.06#ibcon#*after write, iclass 31, count 2 2006.232.08:25:39.06#ibcon#*before return 0, iclass 31, count 2 2006.232.08:25:39.06#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.232.08:25:39.06#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.232.08:25:39.06#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.232.08:25:39.06#ibcon#ireg 7 cls_cnt 0 2006.232.08:25:39.06#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.232.08:25:39.18#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.232.08:25:39.18#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.232.08:25:39.18#ibcon#enter wrdev, iclass 31, count 0 2006.232.08:25:39.18#ibcon#first serial, iclass 31, count 0 2006.232.08:25:39.18#ibcon#enter sib2, iclass 31, count 0 2006.232.08:25:39.18#ibcon#flushed, iclass 31, count 0 2006.232.08:25:39.18#ibcon#about to write, iclass 31, count 0 2006.232.08:25:39.18#ibcon#wrote, iclass 31, count 0 2006.232.08:25:39.18#ibcon#about to read 3, iclass 31, count 0 2006.232.08:25:39.20#ibcon#read 3, iclass 31, count 0 2006.232.08:25:39.20#ibcon#about to read 4, iclass 31, count 0 2006.232.08:25:39.20#ibcon#read 4, iclass 31, count 0 2006.232.08:25:39.20#ibcon#about to read 5, iclass 31, count 0 2006.232.08:25:39.20#ibcon#read 5, iclass 31, count 0 2006.232.08:25:39.20#ibcon#about to read 6, iclass 31, count 0 2006.232.08:25:39.20#ibcon#read 6, iclass 31, count 0 2006.232.08:25:39.20#ibcon#end of sib2, iclass 31, count 0 2006.232.08:25:39.20#ibcon#*mode == 0, iclass 31, count 0 2006.232.08:25:39.20#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.232.08:25:39.20#ibcon#[25=USB\r\n] 2006.232.08:25:39.20#ibcon#*before write, iclass 31, count 0 2006.232.08:25:39.20#ibcon#enter sib2, iclass 31, count 0 2006.232.08:25:39.20#ibcon#flushed, iclass 31, count 0 2006.232.08:25:39.20#ibcon#about to write, iclass 31, count 0 2006.232.08:25:39.20#ibcon#wrote, iclass 31, count 0 2006.232.08:25:39.20#ibcon#about to read 3, iclass 31, count 0 2006.232.08:25:39.23#ibcon#read 3, iclass 31, count 0 2006.232.08:25:39.23#ibcon#about to read 4, iclass 31, count 0 2006.232.08:25:39.23#ibcon#read 4, iclass 31, count 0 2006.232.08:25:39.23#ibcon#about to read 5, iclass 31, count 0 2006.232.08:25:39.23#ibcon#read 5, iclass 31, count 0 2006.232.08:25:39.23#ibcon#about to read 6, iclass 31, count 0 2006.232.08:25:39.23#ibcon#read 6, iclass 31, count 0 2006.232.08:25:39.23#ibcon#end of sib2, iclass 31, count 0 2006.232.08:25:39.23#ibcon#*after write, iclass 31, count 0 2006.232.08:25:39.23#ibcon#*before return 0, iclass 31, count 0 2006.232.08:25:39.23#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.232.08:25:39.23#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.232.08:25:39.23#ibcon#about to clear, iclass 31 cls_cnt 0 2006.232.08:25:39.23#ibcon#cleared, iclass 31 cls_cnt 0 2006.232.08:25:39.23$vc4f8/valo=5,652.99 2006.232.08:25:39.23#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.232.08:25:39.23#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.232.08:25:39.23#ibcon#ireg 17 cls_cnt 0 2006.232.08:25:39.23#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.232.08:25:39.23#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.232.08:25:39.23#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.232.08:25:39.23#ibcon#enter wrdev, iclass 33, count 0 2006.232.08:25:39.23#ibcon#first serial, iclass 33, count 0 2006.232.08:25:39.23#ibcon#enter sib2, iclass 33, count 0 2006.232.08:25:39.23#ibcon#flushed, iclass 33, count 0 2006.232.08:25:39.23#ibcon#about to write, iclass 33, count 0 2006.232.08:25:39.23#ibcon#wrote, iclass 33, count 0 2006.232.08:25:39.23#ibcon#about to read 3, iclass 33, count 0 2006.232.08:25:39.25#ibcon#read 3, iclass 33, count 0 2006.232.08:25:39.25#ibcon#about to read 4, iclass 33, count 0 2006.232.08:25:39.25#ibcon#read 4, iclass 33, count 0 2006.232.08:25:39.25#ibcon#about to read 5, iclass 33, count 0 2006.232.08:25:39.25#ibcon#read 5, iclass 33, count 0 2006.232.08:25:39.25#ibcon#about to read 6, iclass 33, count 0 2006.232.08:25:39.25#ibcon#read 6, iclass 33, count 0 2006.232.08:25:39.25#ibcon#end of sib2, iclass 33, count 0 2006.232.08:25:39.25#ibcon#*mode == 0, iclass 33, count 0 2006.232.08:25:39.25#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.232.08:25:39.25#ibcon#[26=FRQ=05,652.99\r\n] 2006.232.08:25:39.25#ibcon#*before write, iclass 33, count 0 2006.232.08:25:39.25#ibcon#enter sib2, iclass 33, count 0 2006.232.08:25:39.25#ibcon#flushed, iclass 33, count 0 2006.232.08:25:39.25#ibcon#about to write, iclass 33, count 0 2006.232.08:25:39.25#ibcon#wrote, iclass 33, count 0 2006.232.08:25:39.25#ibcon#about to read 3, iclass 33, count 0 2006.232.08:25:39.29#ibcon#read 3, iclass 33, count 0 2006.232.08:25:39.29#ibcon#about to read 4, iclass 33, count 0 2006.232.08:25:39.29#ibcon#read 4, iclass 33, count 0 2006.232.08:25:39.29#ibcon#about to read 5, iclass 33, count 0 2006.232.08:25:39.29#ibcon#read 5, iclass 33, count 0 2006.232.08:25:39.29#ibcon#about to read 6, iclass 33, count 0 2006.232.08:25:39.29#ibcon#read 6, iclass 33, count 0 2006.232.08:25:39.29#ibcon#end of sib2, iclass 33, count 0 2006.232.08:25:39.29#ibcon#*after write, iclass 33, count 0 2006.232.08:25:39.29#ibcon#*before return 0, iclass 33, count 0 2006.232.08:25:39.29#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.232.08:25:39.29#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.232.08:25:39.29#ibcon#about to clear, iclass 33 cls_cnt 0 2006.232.08:25:39.29#ibcon#cleared, iclass 33 cls_cnt 0 2006.232.08:25:39.29$vc4f8/va=5,7 2006.232.08:25:39.29#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.232.08:25:39.29#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.232.08:25:39.29#ibcon#ireg 11 cls_cnt 2 2006.232.08:25:39.29#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.232.08:25:39.35#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.232.08:25:39.35#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.232.08:25:39.35#ibcon#enter wrdev, iclass 35, count 2 2006.232.08:25:39.35#ibcon#first serial, iclass 35, count 2 2006.232.08:25:39.35#ibcon#enter sib2, iclass 35, count 2 2006.232.08:25:39.35#ibcon#flushed, iclass 35, count 2 2006.232.08:25:39.35#ibcon#about to write, iclass 35, count 2 2006.232.08:25:39.35#ibcon#wrote, iclass 35, count 2 2006.232.08:25:39.35#ibcon#about to read 3, iclass 35, count 2 2006.232.08:25:39.37#ibcon#read 3, iclass 35, count 2 2006.232.08:25:39.37#ibcon#about to read 4, iclass 35, count 2 2006.232.08:25:39.37#ibcon#read 4, iclass 35, count 2 2006.232.08:25:39.37#ibcon#about to read 5, iclass 35, count 2 2006.232.08:25:39.37#ibcon#read 5, iclass 35, count 2 2006.232.08:25:39.37#ibcon#about to read 6, iclass 35, count 2 2006.232.08:25:39.37#ibcon#read 6, iclass 35, count 2 2006.232.08:25:39.37#ibcon#end of sib2, iclass 35, count 2 2006.232.08:25:39.37#ibcon#*mode == 0, iclass 35, count 2 2006.232.08:25:39.37#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.232.08:25:39.37#ibcon#[25=AT05-07\r\n] 2006.232.08:25:39.37#ibcon#*before write, iclass 35, count 2 2006.232.08:25:39.37#ibcon#enter sib2, iclass 35, count 2 2006.232.08:25:39.37#ibcon#flushed, iclass 35, count 2 2006.232.08:25:39.37#ibcon#about to write, iclass 35, count 2 2006.232.08:25:39.37#ibcon#wrote, iclass 35, count 2 2006.232.08:25:39.37#ibcon#about to read 3, iclass 35, count 2 2006.232.08:25:39.41#ibcon#read 3, iclass 35, count 2 2006.232.08:25:39.41#ibcon#about to read 4, iclass 35, count 2 2006.232.08:25:39.41#ibcon#read 4, iclass 35, count 2 2006.232.08:25:39.41#ibcon#about to read 5, iclass 35, count 2 2006.232.08:25:39.41#ibcon#read 5, iclass 35, count 2 2006.232.08:25:39.41#ibcon#about to read 6, iclass 35, count 2 2006.232.08:25:39.41#ibcon#read 6, iclass 35, count 2 2006.232.08:25:39.41#ibcon#end of sib2, iclass 35, count 2 2006.232.08:25:39.41#ibcon#*after write, iclass 35, count 2 2006.232.08:25:39.41#ibcon#*before return 0, iclass 35, count 2 2006.232.08:25:39.41#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.232.08:25:39.41#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.232.08:25:39.41#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.232.08:25:39.41#ibcon#ireg 7 cls_cnt 0 2006.232.08:25:39.41#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.232.08:25:39.52#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.232.08:25:39.52#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.232.08:25:39.52#ibcon#enter wrdev, iclass 35, count 0 2006.232.08:25:39.52#ibcon#first serial, iclass 35, count 0 2006.232.08:25:39.52#ibcon#enter sib2, iclass 35, count 0 2006.232.08:25:39.52#ibcon#flushed, iclass 35, count 0 2006.232.08:25:39.52#ibcon#about to write, iclass 35, count 0 2006.232.08:25:39.52#ibcon#wrote, iclass 35, count 0 2006.232.08:25:39.52#ibcon#about to read 3, iclass 35, count 0 2006.232.08:25:39.54#ibcon#read 3, iclass 35, count 0 2006.232.08:25:39.54#ibcon#about to read 4, iclass 35, count 0 2006.232.08:25:39.54#ibcon#read 4, iclass 35, count 0 2006.232.08:25:39.54#ibcon#about to read 5, iclass 35, count 0 2006.232.08:25:39.54#ibcon#read 5, iclass 35, count 0 2006.232.08:25:39.54#ibcon#about to read 6, iclass 35, count 0 2006.232.08:25:39.54#ibcon#read 6, iclass 35, count 0 2006.232.08:25:39.54#ibcon#end of sib2, iclass 35, count 0 2006.232.08:25:39.54#ibcon#*mode == 0, iclass 35, count 0 2006.232.08:25:39.54#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.232.08:25:39.54#ibcon#[25=USB\r\n] 2006.232.08:25:39.54#ibcon#*before write, iclass 35, count 0 2006.232.08:25:39.54#ibcon#enter sib2, iclass 35, count 0 2006.232.08:25:39.54#ibcon#flushed, iclass 35, count 0 2006.232.08:25:39.54#ibcon#about to write, iclass 35, count 0 2006.232.08:25:39.54#ibcon#wrote, iclass 35, count 0 2006.232.08:25:39.54#ibcon#about to read 3, iclass 35, count 0 2006.232.08:25:39.57#ibcon#read 3, iclass 35, count 0 2006.232.08:25:39.57#ibcon#about to read 4, iclass 35, count 0 2006.232.08:25:39.57#ibcon#read 4, iclass 35, count 0 2006.232.08:25:39.57#ibcon#about to read 5, iclass 35, count 0 2006.232.08:25:39.57#ibcon#read 5, iclass 35, count 0 2006.232.08:25:39.57#ibcon#about to read 6, iclass 35, count 0 2006.232.08:25:39.57#ibcon#read 6, iclass 35, count 0 2006.232.08:25:39.57#ibcon#end of sib2, iclass 35, count 0 2006.232.08:25:39.57#ibcon#*after write, iclass 35, count 0 2006.232.08:25:39.57#ibcon#*before return 0, iclass 35, count 0 2006.232.08:25:39.57#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.232.08:25:39.57#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.232.08:25:39.57#ibcon#about to clear, iclass 35 cls_cnt 0 2006.232.08:25:39.57#ibcon#cleared, iclass 35 cls_cnt 0 2006.232.08:25:39.57$vc4f8/valo=6,772.99 2006.232.08:25:39.57#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.232.08:25:39.57#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.232.08:25:39.57#ibcon#ireg 17 cls_cnt 0 2006.232.08:25:39.57#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.232.08:25:39.57#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.232.08:25:39.57#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.232.08:25:39.57#ibcon#enter wrdev, iclass 37, count 0 2006.232.08:25:39.57#ibcon#first serial, iclass 37, count 0 2006.232.08:25:39.57#ibcon#enter sib2, iclass 37, count 0 2006.232.08:25:39.57#ibcon#flushed, iclass 37, count 0 2006.232.08:25:39.57#ibcon#about to write, iclass 37, count 0 2006.232.08:25:39.57#ibcon#wrote, iclass 37, count 0 2006.232.08:25:39.57#ibcon#about to read 3, iclass 37, count 0 2006.232.08:25:39.59#ibcon#read 3, iclass 37, count 0 2006.232.08:25:39.59#ibcon#about to read 4, iclass 37, count 0 2006.232.08:25:39.59#ibcon#read 4, iclass 37, count 0 2006.232.08:25:39.59#ibcon#about to read 5, iclass 37, count 0 2006.232.08:25:39.59#ibcon#read 5, iclass 37, count 0 2006.232.08:25:39.59#ibcon#about to read 6, iclass 37, count 0 2006.232.08:25:39.59#ibcon#read 6, iclass 37, count 0 2006.232.08:25:39.59#ibcon#end of sib2, iclass 37, count 0 2006.232.08:25:39.59#ibcon#*mode == 0, iclass 37, count 0 2006.232.08:25:39.59#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.232.08:25:39.59#ibcon#[26=FRQ=06,772.99\r\n] 2006.232.08:25:39.59#ibcon#*before write, iclass 37, count 0 2006.232.08:25:39.59#ibcon#enter sib2, iclass 37, count 0 2006.232.08:25:39.59#ibcon#flushed, iclass 37, count 0 2006.232.08:25:39.59#ibcon#about to write, iclass 37, count 0 2006.232.08:25:39.59#ibcon#wrote, iclass 37, count 0 2006.232.08:25:39.59#ibcon#about to read 3, iclass 37, count 0 2006.232.08:25:39.63#ibcon#read 3, iclass 37, count 0 2006.232.08:25:39.63#ibcon#about to read 4, iclass 37, count 0 2006.232.08:25:39.63#ibcon#read 4, iclass 37, count 0 2006.232.08:25:39.63#ibcon#about to read 5, iclass 37, count 0 2006.232.08:25:39.63#ibcon#read 5, iclass 37, count 0 2006.232.08:25:39.63#ibcon#about to read 6, iclass 37, count 0 2006.232.08:25:39.63#ibcon#read 6, iclass 37, count 0 2006.232.08:25:39.63#ibcon#end of sib2, iclass 37, count 0 2006.232.08:25:39.63#ibcon#*after write, iclass 37, count 0 2006.232.08:25:39.63#ibcon#*before return 0, iclass 37, count 0 2006.232.08:25:39.63#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.232.08:25:39.63#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.232.08:25:39.63#ibcon#about to clear, iclass 37 cls_cnt 0 2006.232.08:25:39.63#ibcon#cleared, iclass 37 cls_cnt 0 2006.232.08:25:39.63$vc4f8/va=6,6 2006.232.08:25:39.63#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.232.08:25:39.63#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.232.08:25:39.63#ibcon#ireg 11 cls_cnt 2 2006.232.08:25:39.63#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.232.08:25:39.69#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.232.08:25:39.69#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.232.08:25:39.69#ibcon#enter wrdev, iclass 39, count 2 2006.232.08:25:39.69#ibcon#first serial, iclass 39, count 2 2006.232.08:25:39.69#ibcon#enter sib2, iclass 39, count 2 2006.232.08:25:39.69#ibcon#flushed, iclass 39, count 2 2006.232.08:25:39.69#ibcon#about to write, iclass 39, count 2 2006.232.08:25:39.69#ibcon#wrote, iclass 39, count 2 2006.232.08:25:39.69#ibcon#about to read 3, iclass 39, count 2 2006.232.08:25:39.71#ibcon#read 3, iclass 39, count 2 2006.232.08:25:39.71#ibcon#about to read 4, iclass 39, count 2 2006.232.08:25:39.71#ibcon#read 4, iclass 39, count 2 2006.232.08:25:39.71#ibcon#about to read 5, iclass 39, count 2 2006.232.08:25:39.71#ibcon#read 5, iclass 39, count 2 2006.232.08:25:39.71#ibcon#about to read 6, iclass 39, count 2 2006.232.08:25:39.71#ibcon#read 6, iclass 39, count 2 2006.232.08:25:39.71#ibcon#end of sib2, iclass 39, count 2 2006.232.08:25:39.71#ibcon#*mode == 0, iclass 39, count 2 2006.232.08:25:39.71#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.232.08:25:39.71#ibcon#[25=AT06-06\r\n] 2006.232.08:25:39.71#ibcon#*before write, iclass 39, count 2 2006.232.08:25:39.71#ibcon#enter sib2, iclass 39, count 2 2006.232.08:25:39.71#ibcon#flushed, iclass 39, count 2 2006.232.08:25:39.71#ibcon#about to write, iclass 39, count 2 2006.232.08:25:39.71#ibcon#wrote, iclass 39, count 2 2006.232.08:25:39.71#ibcon#about to read 3, iclass 39, count 2 2006.232.08:25:39.74#ibcon#read 3, iclass 39, count 2 2006.232.08:25:39.74#ibcon#about to read 4, iclass 39, count 2 2006.232.08:25:39.74#ibcon#read 4, iclass 39, count 2 2006.232.08:25:39.74#ibcon#about to read 5, iclass 39, count 2 2006.232.08:25:39.74#ibcon#read 5, iclass 39, count 2 2006.232.08:25:39.74#ibcon#about to read 6, iclass 39, count 2 2006.232.08:25:39.74#ibcon#read 6, iclass 39, count 2 2006.232.08:25:39.74#ibcon#end of sib2, iclass 39, count 2 2006.232.08:25:39.74#ibcon#*after write, iclass 39, count 2 2006.232.08:25:39.74#ibcon#*before return 0, iclass 39, count 2 2006.232.08:25:39.74#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.232.08:25:39.74#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.232.08:25:39.74#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.232.08:25:39.74#ibcon#ireg 7 cls_cnt 0 2006.232.08:25:39.74#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.232.08:25:39.86#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.232.08:25:39.86#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.232.08:25:39.86#ibcon#enter wrdev, iclass 39, count 0 2006.232.08:25:39.86#ibcon#first serial, iclass 39, count 0 2006.232.08:25:39.86#ibcon#enter sib2, iclass 39, count 0 2006.232.08:25:39.86#ibcon#flushed, iclass 39, count 0 2006.232.08:25:39.86#ibcon#about to write, iclass 39, count 0 2006.232.08:25:39.86#ibcon#wrote, iclass 39, count 0 2006.232.08:25:39.86#ibcon#about to read 3, iclass 39, count 0 2006.232.08:25:39.88#ibcon#read 3, iclass 39, count 0 2006.232.08:25:39.88#ibcon#about to read 4, iclass 39, count 0 2006.232.08:25:39.88#ibcon#read 4, iclass 39, count 0 2006.232.08:25:39.88#ibcon#about to read 5, iclass 39, count 0 2006.232.08:25:39.88#ibcon#read 5, iclass 39, count 0 2006.232.08:25:39.88#ibcon#about to read 6, iclass 39, count 0 2006.232.08:25:39.88#ibcon#read 6, iclass 39, count 0 2006.232.08:25:39.88#ibcon#end of sib2, iclass 39, count 0 2006.232.08:25:39.88#ibcon#*mode == 0, iclass 39, count 0 2006.232.08:25:39.88#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.232.08:25:39.88#ibcon#[25=USB\r\n] 2006.232.08:25:39.88#ibcon#*before write, iclass 39, count 0 2006.232.08:25:39.88#ibcon#enter sib2, iclass 39, count 0 2006.232.08:25:39.88#ibcon#flushed, iclass 39, count 0 2006.232.08:25:39.88#ibcon#about to write, iclass 39, count 0 2006.232.08:25:39.88#ibcon#wrote, iclass 39, count 0 2006.232.08:25:39.88#ibcon#about to read 3, iclass 39, count 0 2006.232.08:25:39.91#ibcon#read 3, iclass 39, count 0 2006.232.08:25:39.91#ibcon#about to read 4, iclass 39, count 0 2006.232.08:25:39.91#ibcon#read 4, iclass 39, count 0 2006.232.08:25:39.91#ibcon#about to read 5, iclass 39, count 0 2006.232.08:25:39.91#ibcon#read 5, iclass 39, count 0 2006.232.08:25:39.91#ibcon#about to read 6, iclass 39, count 0 2006.232.08:25:39.91#ibcon#read 6, iclass 39, count 0 2006.232.08:25:39.91#ibcon#end of sib2, iclass 39, count 0 2006.232.08:25:39.91#ibcon#*after write, iclass 39, count 0 2006.232.08:25:39.91#ibcon#*before return 0, iclass 39, count 0 2006.232.08:25:39.91#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.232.08:25:39.91#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.232.08:25:39.91#ibcon#about to clear, iclass 39 cls_cnt 0 2006.232.08:25:39.91#ibcon#cleared, iclass 39 cls_cnt 0 2006.232.08:25:39.91$vc4f8/valo=7,832.99 2006.232.08:25:39.91#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.232.08:25:39.91#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.232.08:25:39.91#ibcon#ireg 17 cls_cnt 0 2006.232.08:25:39.91#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:25:39.91#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:25:39.91#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:25:39.91#ibcon#enter wrdev, iclass 3, count 0 2006.232.08:25:39.91#ibcon#first serial, iclass 3, count 0 2006.232.08:25:39.91#ibcon#enter sib2, iclass 3, count 0 2006.232.08:25:39.91#ibcon#flushed, iclass 3, count 0 2006.232.08:25:39.91#ibcon#about to write, iclass 3, count 0 2006.232.08:25:39.91#ibcon#wrote, iclass 3, count 0 2006.232.08:25:39.91#ibcon#about to read 3, iclass 3, count 0 2006.232.08:25:39.93#ibcon#read 3, iclass 3, count 0 2006.232.08:25:39.93#ibcon#about to read 4, iclass 3, count 0 2006.232.08:25:39.93#ibcon#read 4, iclass 3, count 0 2006.232.08:25:39.93#ibcon#about to read 5, iclass 3, count 0 2006.232.08:25:39.93#ibcon#read 5, iclass 3, count 0 2006.232.08:25:39.93#ibcon#about to read 6, iclass 3, count 0 2006.232.08:25:39.93#ibcon#read 6, iclass 3, count 0 2006.232.08:25:39.93#ibcon#end of sib2, iclass 3, count 0 2006.232.08:25:39.93#ibcon#*mode == 0, iclass 3, count 0 2006.232.08:25:39.93#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.232.08:25:39.93#ibcon#[26=FRQ=07,832.99\r\n] 2006.232.08:25:39.93#ibcon#*before write, iclass 3, count 0 2006.232.08:25:39.93#ibcon#enter sib2, iclass 3, count 0 2006.232.08:25:39.93#ibcon#flushed, iclass 3, count 0 2006.232.08:25:39.93#ibcon#about to write, iclass 3, count 0 2006.232.08:25:39.93#ibcon#wrote, iclass 3, count 0 2006.232.08:25:39.93#ibcon#about to read 3, iclass 3, count 0 2006.232.08:25:39.97#ibcon#read 3, iclass 3, count 0 2006.232.08:25:39.97#ibcon#about to read 4, iclass 3, count 0 2006.232.08:25:39.97#ibcon#read 4, iclass 3, count 0 2006.232.08:25:39.97#ibcon#about to read 5, iclass 3, count 0 2006.232.08:25:39.97#ibcon#read 5, iclass 3, count 0 2006.232.08:25:39.97#ibcon#about to read 6, iclass 3, count 0 2006.232.08:25:39.97#ibcon#read 6, iclass 3, count 0 2006.232.08:25:39.97#ibcon#end of sib2, iclass 3, count 0 2006.232.08:25:39.97#ibcon#*after write, iclass 3, count 0 2006.232.08:25:39.97#ibcon#*before return 0, iclass 3, count 0 2006.232.08:25:39.97#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:25:39.97#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:25:39.97#ibcon#about to clear, iclass 3 cls_cnt 0 2006.232.08:25:39.97#ibcon#cleared, iclass 3 cls_cnt 0 2006.232.08:25:39.97$vc4f8/va=7,6 2006.232.08:25:39.97#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.232.08:25:39.97#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.232.08:25:39.97#ibcon#ireg 11 cls_cnt 2 2006.232.08:25:39.97#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.232.08:25:40.03#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.232.08:25:40.03#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.232.08:25:40.03#ibcon#enter wrdev, iclass 5, count 2 2006.232.08:25:40.03#ibcon#first serial, iclass 5, count 2 2006.232.08:25:40.03#ibcon#enter sib2, iclass 5, count 2 2006.232.08:25:40.03#ibcon#flushed, iclass 5, count 2 2006.232.08:25:40.03#ibcon#about to write, iclass 5, count 2 2006.232.08:25:40.03#ibcon#wrote, iclass 5, count 2 2006.232.08:25:40.03#ibcon#about to read 3, iclass 5, count 2 2006.232.08:25:40.05#ibcon#read 3, iclass 5, count 2 2006.232.08:25:40.05#ibcon#about to read 4, iclass 5, count 2 2006.232.08:25:40.05#ibcon#read 4, iclass 5, count 2 2006.232.08:25:40.05#ibcon#about to read 5, iclass 5, count 2 2006.232.08:25:40.05#ibcon#read 5, iclass 5, count 2 2006.232.08:25:40.05#ibcon#about to read 6, iclass 5, count 2 2006.232.08:25:40.05#ibcon#read 6, iclass 5, count 2 2006.232.08:25:40.05#ibcon#end of sib2, iclass 5, count 2 2006.232.08:25:40.05#ibcon#*mode == 0, iclass 5, count 2 2006.232.08:25:40.05#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.232.08:25:40.05#ibcon#[25=AT07-06\r\n] 2006.232.08:25:40.05#ibcon#*before write, iclass 5, count 2 2006.232.08:25:40.05#ibcon#enter sib2, iclass 5, count 2 2006.232.08:25:40.05#ibcon#flushed, iclass 5, count 2 2006.232.08:25:40.05#ibcon#about to write, iclass 5, count 2 2006.232.08:25:40.05#ibcon#wrote, iclass 5, count 2 2006.232.08:25:40.05#ibcon#about to read 3, iclass 5, count 2 2006.232.08:25:40.08#ibcon#read 3, iclass 5, count 2 2006.232.08:25:40.08#ibcon#about to read 4, iclass 5, count 2 2006.232.08:25:40.08#ibcon#read 4, iclass 5, count 2 2006.232.08:25:40.08#ibcon#about to read 5, iclass 5, count 2 2006.232.08:25:40.08#ibcon#read 5, iclass 5, count 2 2006.232.08:25:40.08#ibcon#about to read 6, iclass 5, count 2 2006.232.08:25:40.08#ibcon#read 6, iclass 5, count 2 2006.232.08:25:40.08#ibcon#end of sib2, iclass 5, count 2 2006.232.08:25:40.08#ibcon#*after write, iclass 5, count 2 2006.232.08:25:40.08#ibcon#*before return 0, iclass 5, count 2 2006.232.08:25:40.08#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.232.08:25:40.08#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.232.08:25:40.08#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.232.08:25:40.08#ibcon#ireg 7 cls_cnt 0 2006.232.08:25:40.08#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.232.08:25:40.20#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.232.08:25:40.20#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.232.08:25:40.20#ibcon#enter wrdev, iclass 5, count 0 2006.232.08:25:40.20#ibcon#first serial, iclass 5, count 0 2006.232.08:25:40.20#ibcon#enter sib2, iclass 5, count 0 2006.232.08:25:40.20#ibcon#flushed, iclass 5, count 0 2006.232.08:25:40.20#ibcon#about to write, iclass 5, count 0 2006.232.08:25:40.20#ibcon#wrote, iclass 5, count 0 2006.232.08:25:40.20#ibcon#about to read 3, iclass 5, count 0 2006.232.08:25:40.22#ibcon#read 3, iclass 5, count 0 2006.232.08:25:40.22#ibcon#about to read 4, iclass 5, count 0 2006.232.08:25:40.22#ibcon#read 4, iclass 5, count 0 2006.232.08:25:40.22#ibcon#about to read 5, iclass 5, count 0 2006.232.08:25:40.22#ibcon#read 5, iclass 5, count 0 2006.232.08:25:40.22#ibcon#about to read 6, iclass 5, count 0 2006.232.08:25:40.22#ibcon#read 6, iclass 5, count 0 2006.232.08:25:40.22#ibcon#end of sib2, iclass 5, count 0 2006.232.08:25:40.22#ibcon#*mode == 0, iclass 5, count 0 2006.232.08:25:40.22#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.232.08:25:40.22#ibcon#[25=USB\r\n] 2006.232.08:25:40.22#ibcon#*before write, iclass 5, count 0 2006.232.08:25:40.22#ibcon#enter sib2, iclass 5, count 0 2006.232.08:25:40.22#ibcon#flushed, iclass 5, count 0 2006.232.08:25:40.22#ibcon#about to write, iclass 5, count 0 2006.232.08:25:40.22#ibcon#wrote, iclass 5, count 0 2006.232.08:25:40.22#ibcon#about to read 3, iclass 5, count 0 2006.232.08:25:40.25#ibcon#read 3, iclass 5, count 0 2006.232.08:25:40.25#ibcon#about to read 4, iclass 5, count 0 2006.232.08:25:40.25#ibcon#read 4, iclass 5, count 0 2006.232.08:25:40.25#ibcon#about to read 5, iclass 5, count 0 2006.232.08:25:40.25#ibcon#read 5, iclass 5, count 0 2006.232.08:25:40.25#ibcon#about to read 6, iclass 5, count 0 2006.232.08:25:40.25#ibcon#read 6, iclass 5, count 0 2006.232.08:25:40.25#ibcon#end of sib2, iclass 5, count 0 2006.232.08:25:40.25#ibcon#*after write, iclass 5, count 0 2006.232.08:25:40.25#ibcon#*before return 0, iclass 5, count 0 2006.232.08:25:40.25#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.232.08:25:40.25#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.232.08:25:40.25#ibcon#about to clear, iclass 5 cls_cnt 0 2006.232.08:25:40.25#ibcon#cleared, iclass 5 cls_cnt 0 2006.232.08:25:40.25$vc4f8/valo=8,852.99 2006.232.08:25:40.25#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.232.08:25:40.25#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.232.08:25:40.25#ibcon#ireg 17 cls_cnt 0 2006.232.08:25:40.25#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.232.08:25:40.25#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.232.08:25:40.25#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.232.08:25:40.25#ibcon#enter wrdev, iclass 7, count 0 2006.232.08:25:40.25#ibcon#first serial, iclass 7, count 0 2006.232.08:25:40.25#ibcon#enter sib2, iclass 7, count 0 2006.232.08:25:40.25#ibcon#flushed, iclass 7, count 0 2006.232.08:25:40.25#ibcon#about to write, iclass 7, count 0 2006.232.08:25:40.25#ibcon#wrote, iclass 7, count 0 2006.232.08:25:40.25#ibcon#about to read 3, iclass 7, count 0 2006.232.08:25:40.27#ibcon#read 3, iclass 7, count 0 2006.232.08:25:40.27#ibcon#about to read 4, iclass 7, count 0 2006.232.08:25:40.27#ibcon#read 4, iclass 7, count 0 2006.232.08:25:40.27#ibcon#about to read 5, iclass 7, count 0 2006.232.08:25:40.27#ibcon#read 5, iclass 7, count 0 2006.232.08:25:40.27#ibcon#about to read 6, iclass 7, count 0 2006.232.08:25:40.27#ibcon#read 6, iclass 7, count 0 2006.232.08:25:40.27#ibcon#end of sib2, iclass 7, count 0 2006.232.08:25:40.27#ibcon#*mode == 0, iclass 7, count 0 2006.232.08:25:40.27#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.232.08:25:40.27#ibcon#[26=FRQ=08,852.99\r\n] 2006.232.08:25:40.27#ibcon#*before write, iclass 7, count 0 2006.232.08:25:40.27#ibcon#enter sib2, iclass 7, count 0 2006.232.08:25:40.27#ibcon#flushed, iclass 7, count 0 2006.232.08:25:40.27#ibcon#about to write, iclass 7, count 0 2006.232.08:25:40.27#ibcon#wrote, iclass 7, count 0 2006.232.08:25:40.27#ibcon#about to read 3, iclass 7, count 0 2006.232.08:25:40.31#ibcon#read 3, iclass 7, count 0 2006.232.08:25:40.31#ibcon#about to read 4, iclass 7, count 0 2006.232.08:25:40.31#ibcon#read 4, iclass 7, count 0 2006.232.08:25:40.31#ibcon#about to read 5, iclass 7, count 0 2006.232.08:25:40.31#ibcon#read 5, iclass 7, count 0 2006.232.08:25:40.31#ibcon#about to read 6, iclass 7, count 0 2006.232.08:25:40.31#ibcon#read 6, iclass 7, count 0 2006.232.08:25:40.31#ibcon#end of sib2, iclass 7, count 0 2006.232.08:25:40.31#ibcon#*after write, iclass 7, count 0 2006.232.08:25:40.31#ibcon#*before return 0, iclass 7, count 0 2006.232.08:25:40.31#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.232.08:25:40.31#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.232.08:25:40.31#ibcon#about to clear, iclass 7 cls_cnt 0 2006.232.08:25:40.31#ibcon#cleared, iclass 7 cls_cnt 0 2006.232.08:25:40.31$vc4f8/va=8,6 2006.232.08:25:40.31#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.232.08:25:40.31#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.232.08:25:40.31#ibcon#ireg 11 cls_cnt 2 2006.232.08:25:40.31#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.232.08:25:40.37#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.232.08:25:40.37#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.232.08:25:40.37#ibcon#enter wrdev, iclass 11, count 2 2006.232.08:25:40.37#ibcon#first serial, iclass 11, count 2 2006.232.08:25:40.37#ibcon#enter sib2, iclass 11, count 2 2006.232.08:25:40.37#ibcon#flushed, iclass 11, count 2 2006.232.08:25:40.37#ibcon#about to write, iclass 11, count 2 2006.232.08:25:40.37#ibcon#wrote, iclass 11, count 2 2006.232.08:25:40.37#ibcon#about to read 3, iclass 11, count 2 2006.232.08:25:40.39#ibcon#read 3, iclass 11, count 2 2006.232.08:25:40.39#ibcon#about to read 4, iclass 11, count 2 2006.232.08:25:40.39#ibcon#read 4, iclass 11, count 2 2006.232.08:25:40.39#ibcon#about to read 5, iclass 11, count 2 2006.232.08:25:40.39#ibcon#read 5, iclass 11, count 2 2006.232.08:25:40.39#ibcon#about to read 6, iclass 11, count 2 2006.232.08:25:40.39#ibcon#read 6, iclass 11, count 2 2006.232.08:25:40.39#ibcon#end of sib2, iclass 11, count 2 2006.232.08:25:40.39#ibcon#*mode == 0, iclass 11, count 2 2006.232.08:25:40.39#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.232.08:25:40.39#ibcon#[25=AT08-06\r\n] 2006.232.08:25:40.39#ibcon#*before write, iclass 11, count 2 2006.232.08:25:40.39#ibcon#enter sib2, iclass 11, count 2 2006.232.08:25:40.39#ibcon#flushed, iclass 11, count 2 2006.232.08:25:40.39#ibcon#about to write, iclass 11, count 2 2006.232.08:25:40.39#ibcon#wrote, iclass 11, count 2 2006.232.08:25:40.39#ibcon#about to read 3, iclass 11, count 2 2006.232.08:25:40.42#ibcon#read 3, iclass 11, count 2 2006.232.08:25:40.42#ibcon#about to read 4, iclass 11, count 2 2006.232.08:25:40.42#ibcon#read 4, iclass 11, count 2 2006.232.08:25:40.42#ibcon#about to read 5, iclass 11, count 2 2006.232.08:25:40.42#ibcon#read 5, iclass 11, count 2 2006.232.08:25:40.42#ibcon#about to read 6, iclass 11, count 2 2006.232.08:25:40.42#ibcon#read 6, iclass 11, count 2 2006.232.08:25:40.42#ibcon#end of sib2, iclass 11, count 2 2006.232.08:25:40.42#ibcon#*after write, iclass 11, count 2 2006.232.08:25:40.42#ibcon#*before return 0, iclass 11, count 2 2006.232.08:25:40.42#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.232.08:25:40.42#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.232.08:25:40.42#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.232.08:25:40.42#ibcon#ireg 7 cls_cnt 0 2006.232.08:25:40.42#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.232.08:25:40.54#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.232.08:25:40.54#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.232.08:25:40.54#ibcon#enter wrdev, iclass 11, count 0 2006.232.08:25:40.54#ibcon#first serial, iclass 11, count 0 2006.232.08:25:40.54#ibcon#enter sib2, iclass 11, count 0 2006.232.08:25:40.54#ibcon#flushed, iclass 11, count 0 2006.232.08:25:40.54#ibcon#about to write, iclass 11, count 0 2006.232.08:25:40.54#ibcon#wrote, iclass 11, count 0 2006.232.08:25:40.54#ibcon#about to read 3, iclass 11, count 0 2006.232.08:25:40.56#ibcon#read 3, iclass 11, count 0 2006.232.08:25:40.56#ibcon#about to read 4, iclass 11, count 0 2006.232.08:25:40.56#ibcon#read 4, iclass 11, count 0 2006.232.08:25:40.56#ibcon#about to read 5, iclass 11, count 0 2006.232.08:25:40.56#ibcon#read 5, iclass 11, count 0 2006.232.08:25:40.56#ibcon#about to read 6, iclass 11, count 0 2006.232.08:25:40.56#ibcon#read 6, iclass 11, count 0 2006.232.08:25:40.56#ibcon#end of sib2, iclass 11, count 0 2006.232.08:25:40.56#ibcon#*mode == 0, iclass 11, count 0 2006.232.08:25:40.56#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.232.08:25:40.56#ibcon#[25=USB\r\n] 2006.232.08:25:40.56#ibcon#*before write, iclass 11, count 0 2006.232.08:25:40.56#ibcon#enter sib2, iclass 11, count 0 2006.232.08:25:40.56#ibcon#flushed, iclass 11, count 0 2006.232.08:25:40.56#ibcon#about to write, iclass 11, count 0 2006.232.08:25:40.56#ibcon#wrote, iclass 11, count 0 2006.232.08:25:40.56#ibcon#about to read 3, iclass 11, count 0 2006.232.08:25:40.59#ibcon#read 3, iclass 11, count 0 2006.232.08:25:40.59#ibcon#about to read 4, iclass 11, count 0 2006.232.08:25:40.59#ibcon#read 4, iclass 11, count 0 2006.232.08:25:40.59#ibcon#about to read 5, iclass 11, count 0 2006.232.08:25:40.59#ibcon#read 5, iclass 11, count 0 2006.232.08:25:40.59#ibcon#about to read 6, iclass 11, count 0 2006.232.08:25:40.59#ibcon#read 6, iclass 11, count 0 2006.232.08:25:40.59#ibcon#end of sib2, iclass 11, count 0 2006.232.08:25:40.59#ibcon#*after write, iclass 11, count 0 2006.232.08:25:40.59#ibcon#*before return 0, iclass 11, count 0 2006.232.08:25:40.59#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.232.08:25:40.59#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.232.08:25:40.59#ibcon#about to clear, iclass 11 cls_cnt 0 2006.232.08:25:40.59#ibcon#cleared, iclass 11 cls_cnt 0 2006.232.08:25:40.59$vc4f8/vblo=1,632.99 2006.232.08:25:40.59#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.232.08:25:40.59#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.232.08:25:40.59#ibcon#ireg 17 cls_cnt 0 2006.232.08:25:40.59#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.232.08:25:40.59#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.232.08:25:40.59#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.232.08:25:40.59#ibcon#enter wrdev, iclass 13, count 0 2006.232.08:25:40.59#ibcon#first serial, iclass 13, count 0 2006.232.08:25:40.59#ibcon#enter sib2, iclass 13, count 0 2006.232.08:25:40.59#ibcon#flushed, iclass 13, count 0 2006.232.08:25:40.59#ibcon#about to write, iclass 13, count 0 2006.232.08:25:40.59#ibcon#wrote, iclass 13, count 0 2006.232.08:25:40.59#ibcon#about to read 3, iclass 13, count 0 2006.232.08:25:40.61#ibcon#read 3, iclass 13, count 0 2006.232.08:25:40.61#ibcon#about to read 4, iclass 13, count 0 2006.232.08:25:40.61#ibcon#read 4, iclass 13, count 0 2006.232.08:25:40.61#ibcon#about to read 5, iclass 13, count 0 2006.232.08:25:40.61#ibcon#read 5, iclass 13, count 0 2006.232.08:25:40.61#ibcon#about to read 6, iclass 13, count 0 2006.232.08:25:40.61#ibcon#read 6, iclass 13, count 0 2006.232.08:25:40.61#ibcon#end of sib2, iclass 13, count 0 2006.232.08:25:40.61#ibcon#*mode == 0, iclass 13, count 0 2006.232.08:25:40.61#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.232.08:25:40.61#ibcon#[28=FRQ=01,632.99\r\n] 2006.232.08:25:40.61#ibcon#*before write, iclass 13, count 0 2006.232.08:25:40.61#ibcon#enter sib2, iclass 13, count 0 2006.232.08:25:40.61#ibcon#flushed, iclass 13, count 0 2006.232.08:25:40.61#ibcon#about to write, iclass 13, count 0 2006.232.08:25:40.61#ibcon#wrote, iclass 13, count 0 2006.232.08:25:40.61#ibcon#about to read 3, iclass 13, count 0 2006.232.08:25:40.65#ibcon#read 3, iclass 13, count 0 2006.232.08:25:40.65#ibcon#about to read 4, iclass 13, count 0 2006.232.08:25:40.65#ibcon#read 4, iclass 13, count 0 2006.232.08:25:40.65#ibcon#about to read 5, iclass 13, count 0 2006.232.08:25:40.65#ibcon#read 5, iclass 13, count 0 2006.232.08:25:40.65#ibcon#about to read 6, iclass 13, count 0 2006.232.08:25:40.65#ibcon#read 6, iclass 13, count 0 2006.232.08:25:40.65#ibcon#end of sib2, iclass 13, count 0 2006.232.08:25:40.65#ibcon#*after write, iclass 13, count 0 2006.232.08:25:40.65#ibcon#*before return 0, iclass 13, count 0 2006.232.08:25:40.65#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.232.08:25:40.65#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.232.08:25:40.65#ibcon#about to clear, iclass 13 cls_cnt 0 2006.232.08:25:40.65#ibcon#cleared, iclass 13 cls_cnt 0 2006.232.08:25:40.65$vc4f8/vb=1,4 2006.232.08:25:40.65#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.232.08:25:40.65#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.232.08:25:40.65#ibcon#ireg 11 cls_cnt 2 2006.232.08:25:40.65#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.232.08:25:40.65#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.232.08:25:40.65#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.232.08:25:40.65#ibcon#enter wrdev, iclass 15, count 2 2006.232.08:25:40.65#ibcon#first serial, iclass 15, count 2 2006.232.08:25:40.65#ibcon#enter sib2, iclass 15, count 2 2006.232.08:25:40.65#ibcon#flushed, iclass 15, count 2 2006.232.08:25:40.65#ibcon#about to write, iclass 15, count 2 2006.232.08:25:40.65#ibcon#wrote, iclass 15, count 2 2006.232.08:25:40.65#ibcon#about to read 3, iclass 15, count 2 2006.232.08:25:40.67#ibcon#read 3, iclass 15, count 2 2006.232.08:25:40.67#ibcon#about to read 4, iclass 15, count 2 2006.232.08:25:40.67#ibcon#read 4, iclass 15, count 2 2006.232.08:25:40.67#ibcon#about to read 5, iclass 15, count 2 2006.232.08:25:40.67#ibcon#read 5, iclass 15, count 2 2006.232.08:25:40.67#ibcon#about to read 6, iclass 15, count 2 2006.232.08:25:40.67#ibcon#read 6, iclass 15, count 2 2006.232.08:25:40.67#ibcon#end of sib2, iclass 15, count 2 2006.232.08:25:40.67#ibcon#*mode == 0, iclass 15, count 2 2006.232.08:25:40.67#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.232.08:25:40.67#ibcon#[27=AT01-04\r\n] 2006.232.08:25:40.67#ibcon#*before write, iclass 15, count 2 2006.232.08:25:40.67#ibcon#enter sib2, iclass 15, count 2 2006.232.08:25:40.67#ibcon#flushed, iclass 15, count 2 2006.232.08:25:40.67#ibcon#about to write, iclass 15, count 2 2006.232.08:25:40.67#ibcon#wrote, iclass 15, count 2 2006.232.08:25:40.67#ibcon#about to read 3, iclass 15, count 2 2006.232.08:25:40.70#ibcon#read 3, iclass 15, count 2 2006.232.08:25:40.70#ibcon#about to read 4, iclass 15, count 2 2006.232.08:25:40.70#ibcon#read 4, iclass 15, count 2 2006.232.08:25:40.70#ibcon#about to read 5, iclass 15, count 2 2006.232.08:25:40.70#ibcon#read 5, iclass 15, count 2 2006.232.08:25:40.70#ibcon#about to read 6, iclass 15, count 2 2006.232.08:25:40.70#ibcon#read 6, iclass 15, count 2 2006.232.08:25:40.70#ibcon#end of sib2, iclass 15, count 2 2006.232.08:25:40.70#ibcon#*after write, iclass 15, count 2 2006.232.08:25:40.70#ibcon#*before return 0, iclass 15, count 2 2006.232.08:25:40.70#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.232.08:25:40.70#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.232.08:25:40.70#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.232.08:25:40.70#ibcon#ireg 7 cls_cnt 0 2006.232.08:25:40.70#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.232.08:25:40.82#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.232.08:25:40.82#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.232.08:25:40.82#ibcon#enter wrdev, iclass 15, count 0 2006.232.08:25:40.82#ibcon#first serial, iclass 15, count 0 2006.232.08:25:40.82#ibcon#enter sib2, iclass 15, count 0 2006.232.08:25:40.82#ibcon#flushed, iclass 15, count 0 2006.232.08:25:40.82#ibcon#about to write, iclass 15, count 0 2006.232.08:25:40.82#ibcon#wrote, iclass 15, count 0 2006.232.08:25:40.82#ibcon#about to read 3, iclass 15, count 0 2006.232.08:25:40.84#ibcon#read 3, iclass 15, count 0 2006.232.08:25:40.84#ibcon#about to read 4, iclass 15, count 0 2006.232.08:25:40.84#ibcon#read 4, iclass 15, count 0 2006.232.08:25:40.84#ibcon#about to read 5, iclass 15, count 0 2006.232.08:25:40.84#ibcon#read 5, iclass 15, count 0 2006.232.08:25:40.84#ibcon#about to read 6, iclass 15, count 0 2006.232.08:25:40.84#ibcon#read 6, iclass 15, count 0 2006.232.08:25:40.84#ibcon#end of sib2, iclass 15, count 0 2006.232.08:25:40.84#ibcon#*mode == 0, iclass 15, count 0 2006.232.08:25:40.84#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.232.08:25:40.84#ibcon#[27=USB\r\n] 2006.232.08:25:40.84#ibcon#*before write, iclass 15, count 0 2006.232.08:25:40.84#ibcon#enter sib2, iclass 15, count 0 2006.232.08:25:40.84#ibcon#flushed, iclass 15, count 0 2006.232.08:25:40.84#ibcon#about to write, iclass 15, count 0 2006.232.08:25:40.84#ibcon#wrote, iclass 15, count 0 2006.232.08:25:40.84#ibcon#about to read 3, iclass 15, count 0 2006.232.08:25:40.87#ibcon#read 3, iclass 15, count 0 2006.232.08:25:40.87#ibcon#about to read 4, iclass 15, count 0 2006.232.08:25:40.87#ibcon#read 4, iclass 15, count 0 2006.232.08:25:40.87#ibcon#about to read 5, iclass 15, count 0 2006.232.08:25:40.87#ibcon#read 5, iclass 15, count 0 2006.232.08:25:40.87#ibcon#about to read 6, iclass 15, count 0 2006.232.08:25:40.87#ibcon#read 6, iclass 15, count 0 2006.232.08:25:40.87#ibcon#end of sib2, iclass 15, count 0 2006.232.08:25:40.87#ibcon#*after write, iclass 15, count 0 2006.232.08:25:40.87#ibcon#*before return 0, iclass 15, count 0 2006.232.08:25:40.87#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.232.08:25:40.87#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.232.08:25:40.87#ibcon#about to clear, iclass 15 cls_cnt 0 2006.232.08:25:40.87#ibcon#cleared, iclass 15 cls_cnt 0 2006.232.08:25:40.87$vc4f8/vblo=2,640.99 2006.232.08:25:40.87#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.232.08:25:40.87#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.232.08:25:40.87#ibcon#ireg 17 cls_cnt 0 2006.232.08:25:40.87#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.232.08:25:40.87#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.232.08:25:40.87#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.232.08:25:40.87#ibcon#enter wrdev, iclass 17, count 0 2006.232.08:25:40.87#ibcon#first serial, iclass 17, count 0 2006.232.08:25:40.87#ibcon#enter sib2, iclass 17, count 0 2006.232.08:25:40.87#ibcon#flushed, iclass 17, count 0 2006.232.08:25:40.87#ibcon#about to write, iclass 17, count 0 2006.232.08:25:40.87#ibcon#wrote, iclass 17, count 0 2006.232.08:25:40.87#ibcon#about to read 3, iclass 17, count 0 2006.232.08:25:40.89#ibcon#read 3, iclass 17, count 0 2006.232.08:25:40.89#ibcon#about to read 4, iclass 17, count 0 2006.232.08:25:40.89#ibcon#read 4, iclass 17, count 0 2006.232.08:25:40.89#ibcon#about to read 5, iclass 17, count 0 2006.232.08:25:40.89#ibcon#read 5, iclass 17, count 0 2006.232.08:25:40.89#ibcon#about to read 6, iclass 17, count 0 2006.232.08:25:40.89#ibcon#read 6, iclass 17, count 0 2006.232.08:25:40.89#ibcon#end of sib2, iclass 17, count 0 2006.232.08:25:40.89#ibcon#*mode == 0, iclass 17, count 0 2006.232.08:25:40.89#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.232.08:25:40.89#ibcon#[28=FRQ=02,640.99\r\n] 2006.232.08:25:40.89#ibcon#*before write, iclass 17, count 0 2006.232.08:25:40.89#ibcon#enter sib2, iclass 17, count 0 2006.232.08:25:40.89#ibcon#flushed, iclass 17, count 0 2006.232.08:25:40.89#ibcon#about to write, iclass 17, count 0 2006.232.08:25:40.89#ibcon#wrote, iclass 17, count 0 2006.232.08:25:40.89#ibcon#about to read 3, iclass 17, count 0 2006.232.08:25:40.93#ibcon#read 3, iclass 17, count 0 2006.232.08:25:40.93#ibcon#about to read 4, iclass 17, count 0 2006.232.08:25:40.93#ibcon#read 4, iclass 17, count 0 2006.232.08:25:40.93#ibcon#about to read 5, iclass 17, count 0 2006.232.08:25:40.93#ibcon#read 5, iclass 17, count 0 2006.232.08:25:40.93#ibcon#about to read 6, iclass 17, count 0 2006.232.08:25:40.93#ibcon#read 6, iclass 17, count 0 2006.232.08:25:40.93#ibcon#end of sib2, iclass 17, count 0 2006.232.08:25:40.93#ibcon#*after write, iclass 17, count 0 2006.232.08:25:40.93#ibcon#*before return 0, iclass 17, count 0 2006.232.08:25:40.93#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.232.08:25:40.93#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.232.08:25:40.93#ibcon#about to clear, iclass 17 cls_cnt 0 2006.232.08:25:40.93#ibcon#cleared, iclass 17 cls_cnt 0 2006.232.08:25:40.93$vc4f8/vb=2,4 2006.232.08:25:40.93#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.232.08:25:40.93#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.232.08:25:40.93#ibcon#ireg 11 cls_cnt 2 2006.232.08:25:40.93#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.232.08:25:40.99#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.232.08:25:40.99#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.232.08:25:40.99#ibcon#enter wrdev, iclass 19, count 2 2006.232.08:25:40.99#ibcon#first serial, iclass 19, count 2 2006.232.08:25:40.99#ibcon#enter sib2, iclass 19, count 2 2006.232.08:25:40.99#ibcon#flushed, iclass 19, count 2 2006.232.08:25:40.99#ibcon#about to write, iclass 19, count 2 2006.232.08:25:40.99#ibcon#wrote, iclass 19, count 2 2006.232.08:25:40.99#ibcon#about to read 3, iclass 19, count 2 2006.232.08:25:41.01#ibcon#read 3, iclass 19, count 2 2006.232.08:25:41.01#ibcon#about to read 4, iclass 19, count 2 2006.232.08:25:41.01#ibcon#read 4, iclass 19, count 2 2006.232.08:25:41.01#ibcon#about to read 5, iclass 19, count 2 2006.232.08:25:41.01#ibcon#read 5, iclass 19, count 2 2006.232.08:25:41.01#ibcon#about to read 6, iclass 19, count 2 2006.232.08:25:41.01#ibcon#read 6, iclass 19, count 2 2006.232.08:25:41.01#ibcon#end of sib2, iclass 19, count 2 2006.232.08:25:41.01#ibcon#*mode == 0, iclass 19, count 2 2006.232.08:25:41.01#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.232.08:25:41.01#ibcon#[27=AT02-04\r\n] 2006.232.08:25:41.01#ibcon#*before write, iclass 19, count 2 2006.232.08:25:41.01#ibcon#enter sib2, iclass 19, count 2 2006.232.08:25:41.01#ibcon#flushed, iclass 19, count 2 2006.232.08:25:41.01#ibcon#about to write, iclass 19, count 2 2006.232.08:25:41.01#ibcon#wrote, iclass 19, count 2 2006.232.08:25:41.01#ibcon#about to read 3, iclass 19, count 2 2006.232.08:25:41.04#ibcon#read 3, iclass 19, count 2 2006.232.08:25:41.04#ibcon#about to read 4, iclass 19, count 2 2006.232.08:25:41.04#ibcon#read 4, iclass 19, count 2 2006.232.08:25:41.04#ibcon#about to read 5, iclass 19, count 2 2006.232.08:25:41.04#ibcon#read 5, iclass 19, count 2 2006.232.08:25:41.04#ibcon#about to read 6, iclass 19, count 2 2006.232.08:25:41.04#ibcon#read 6, iclass 19, count 2 2006.232.08:25:41.04#ibcon#end of sib2, iclass 19, count 2 2006.232.08:25:41.04#ibcon#*after write, iclass 19, count 2 2006.232.08:25:41.04#ibcon#*before return 0, iclass 19, count 2 2006.232.08:25:41.04#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.232.08:25:41.04#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.232.08:25:41.04#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.232.08:25:41.04#ibcon#ireg 7 cls_cnt 0 2006.232.08:25:41.04#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.232.08:25:41.16#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.232.08:25:41.16#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.232.08:25:41.16#ibcon#enter wrdev, iclass 19, count 0 2006.232.08:25:41.16#ibcon#first serial, iclass 19, count 0 2006.232.08:25:41.16#ibcon#enter sib2, iclass 19, count 0 2006.232.08:25:41.16#ibcon#flushed, iclass 19, count 0 2006.232.08:25:41.16#ibcon#about to write, iclass 19, count 0 2006.232.08:25:41.16#ibcon#wrote, iclass 19, count 0 2006.232.08:25:41.16#ibcon#about to read 3, iclass 19, count 0 2006.232.08:25:41.18#ibcon#read 3, iclass 19, count 0 2006.232.08:25:41.18#ibcon#about to read 4, iclass 19, count 0 2006.232.08:25:41.18#ibcon#read 4, iclass 19, count 0 2006.232.08:25:41.18#ibcon#about to read 5, iclass 19, count 0 2006.232.08:25:41.18#ibcon#read 5, iclass 19, count 0 2006.232.08:25:41.18#ibcon#about to read 6, iclass 19, count 0 2006.232.08:25:41.18#ibcon#read 6, iclass 19, count 0 2006.232.08:25:41.18#ibcon#end of sib2, iclass 19, count 0 2006.232.08:25:41.18#ibcon#*mode == 0, iclass 19, count 0 2006.232.08:25:41.18#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.232.08:25:41.18#ibcon#[27=USB\r\n] 2006.232.08:25:41.18#ibcon#*before write, iclass 19, count 0 2006.232.08:25:41.18#ibcon#enter sib2, iclass 19, count 0 2006.232.08:25:41.18#ibcon#flushed, iclass 19, count 0 2006.232.08:25:41.18#ibcon#about to write, iclass 19, count 0 2006.232.08:25:41.18#ibcon#wrote, iclass 19, count 0 2006.232.08:25:41.18#ibcon#about to read 3, iclass 19, count 0 2006.232.08:25:41.21#ibcon#read 3, iclass 19, count 0 2006.232.08:25:41.21#ibcon#about to read 4, iclass 19, count 0 2006.232.08:25:41.21#ibcon#read 4, iclass 19, count 0 2006.232.08:25:41.21#ibcon#about to read 5, iclass 19, count 0 2006.232.08:25:41.21#ibcon#read 5, iclass 19, count 0 2006.232.08:25:41.21#ibcon#about to read 6, iclass 19, count 0 2006.232.08:25:41.21#ibcon#read 6, iclass 19, count 0 2006.232.08:25:41.21#ibcon#end of sib2, iclass 19, count 0 2006.232.08:25:41.21#ibcon#*after write, iclass 19, count 0 2006.232.08:25:41.21#ibcon#*before return 0, iclass 19, count 0 2006.232.08:25:41.21#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.232.08:25:41.21#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.232.08:25:41.21#ibcon#about to clear, iclass 19 cls_cnt 0 2006.232.08:25:41.21#ibcon#cleared, iclass 19 cls_cnt 0 2006.232.08:25:41.21$vc4f8/vblo=3,656.99 2006.232.08:25:41.21#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.232.08:25:41.21#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.232.08:25:41.21#ibcon#ireg 17 cls_cnt 0 2006.232.08:25:41.21#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.232.08:25:41.21#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.232.08:25:41.21#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.232.08:25:41.21#ibcon#enter wrdev, iclass 21, count 0 2006.232.08:25:41.21#ibcon#first serial, iclass 21, count 0 2006.232.08:25:41.21#ibcon#enter sib2, iclass 21, count 0 2006.232.08:25:41.21#ibcon#flushed, iclass 21, count 0 2006.232.08:25:41.21#ibcon#about to write, iclass 21, count 0 2006.232.08:25:41.21#ibcon#wrote, iclass 21, count 0 2006.232.08:25:41.21#ibcon#about to read 3, iclass 21, count 0 2006.232.08:25:41.24#ibcon#read 3, iclass 21, count 0 2006.232.08:25:41.24#ibcon#about to read 4, iclass 21, count 0 2006.232.08:25:41.24#ibcon#read 4, iclass 21, count 0 2006.232.08:25:41.24#ibcon#about to read 5, iclass 21, count 0 2006.232.08:25:41.24#ibcon#read 5, iclass 21, count 0 2006.232.08:25:41.24#ibcon#about to read 6, iclass 21, count 0 2006.232.08:25:41.24#ibcon#read 6, iclass 21, count 0 2006.232.08:25:41.24#ibcon#end of sib2, iclass 21, count 0 2006.232.08:25:41.24#ibcon#*mode == 0, iclass 21, count 0 2006.232.08:25:41.24#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.232.08:25:41.24#ibcon#[28=FRQ=03,656.99\r\n] 2006.232.08:25:41.24#ibcon#*before write, iclass 21, count 0 2006.232.08:25:41.24#ibcon#enter sib2, iclass 21, count 0 2006.232.08:25:41.24#ibcon#flushed, iclass 21, count 0 2006.232.08:25:41.24#ibcon#about to write, iclass 21, count 0 2006.232.08:25:41.24#ibcon#wrote, iclass 21, count 0 2006.232.08:25:41.24#ibcon#about to read 3, iclass 21, count 0 2006.232.08:25:41.28#ibcon#read 3, iclass 21, count 0 2006.232.08:25:41.28#ibcon#about to read 4, iclass 21, count 0 2006.232.08:25:41.28#ibcon#read 4, iclass 21, count 0 2006.232.08:25:41.28#ibcon#about to read 5, iclass 21, count 0 2006.232.08:25:41.28#ibcon#read 5, iclass 21, count 0 2006.232.08:25:41.28#ibcon#about to read 6, iclass 21, count 0 2006.232.08:25:41.28#ibcon#read 6, iclass 21, count 0 2006.232.08:25:41.28#ibcon#end of sib2, iclass 21, count 0 2006.232.08:25:41.28#ibcon#*after write, iclass 21, count 0 2006.232.08:25:41.28#ibcon#*before return 0, iclass 21, count 0 2006.232.08:25:41.28#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.232.08:25:41.28#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.232.08:25:41.28#ibcon#about to clear, iclass 21 cls_cnt 0 2006.232.08:25:41.28#ibcon#cleared, iclass 21 cls_cnt 0 2006.232.08:25:41.28$vc4f8/vb=3,4 2006.232.08:25:41.28#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.232.08:25:41.28#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.232.08:25:41.28#ibcon#ireg 11 cls_cnt 2 2006.232.08:25:41.28#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.232.08:25:41.33#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.232.08:25:41.33#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.232.08:25:41.33#ibcon#enter wrdev, iclass 23, count 2 2006.232.08:25:41.33#ibcon#first serial, iclass 23, count 2 2006.232.08:25:41.33#ibcon#enter sib2, iclass 23, count 2 2006.232.08:25:41.33#ibcon#flushed, iclass 23, count 2 2006.232.08:25:41.33#ibcon#about to write, iclass 23, count 2 2006.232.08:25:41.33#ibcon#wrote, iclass 23, count 2 2006.232.08:25:41.33#ibcon#about to read 3, iclass 23, count 2 2006.232.08:25:41.35#ibcon#read 3, iclass 23, count 2 2006.232.08:25:41.35#ibcon#about to read 4, iclass 23, count 2 2006.232.08:25:41.35#ibcon#read 4, iclass 23, count 2 2006.232.08:25:41.35#ibcon#about to read 5, iclass 23, count 2 2006.232.08:25:41.35#ibcon#read 5, iclass 23, count 2 2006.232.08:25:41.35#ibcon#about to read 6, iclass 23, count 2 2006.232.08:25:41.35#ibcon#read 6, iclass 23, count 2 2006.232.08:25:41.35#ibcon#end of sib2, iclass 23, count 2 2006.232.08:25:41.35#ibcon#*mode == 0, iclass 23, count 2 2006.232.08:25:41.35#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.232.08:25:41.35#ibcon#[27=AT03-04\r\n] 2006.232.08:25:41.35#ibcon#*before write, iclass 23, count 2 2006.232.08:25:41.35#ibcon#enter sib2, iclass 23, count 2 2006.232.08:25:41.35#ibcon#flushed, iclass 23, count 2 2006.232.08:25:41.35#ibcon#about to write, iclass 23, count 2 2006.232.08:25:41.35#ibcon#wrote, iclass 23, count 2 2006.232.08:25:41.35#ibcon#about to read 3, iclass 23, count 2 2006.232.08:25:41.38#ibcon#read 3, iclass 23, count 2 2006.232.08:25:41.38#ibcon#about to read 4, iclass 23, count 2 2006.232.08:25:41.38#ibcon#read 4, iclass 23, count 2 2006.232.08:25:41.38#ibcon#about to read 5, iclass 23, count 2 2006.232.08:25:41.38#ibcon#read 5, iclass 23, count 2 2006.232.08:25:41.38#ibcon#about to read 6, iclass 23, count 2 2006.232.08:25:41.38#ibcon#read 6, iclass 23, count 2 2006.232.08:25:41.38#ibcon#end of sib2, iclass 23, count 2 2006.232.08:25:41.38#ibcon#*after write, iclass 23, count 2 2006.232.08:25:41.38#ibcon#*before return 0, iclass 23, count 2 2006.232.08:25:41.38#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.232.08:25:41.38#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.232.08:25:41.38#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.232.08:25:41.38#ibcon#ireg 7 cls_cnt 0 2006.232.08:25:41.38#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.232.08:25:41.50#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.232.08:25:41.50#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.232.08:25:41.50#ibcon#enter wrdev, iclass 23, count 0 2006.232.08:25:41.50#ibcon#first serial, iclass 23, count 0 2006.232.08:25:41.50#ibcon#enter sib2, iclass 23, count 0 2006.232.08:25:41.50#ibcon#flushed, iclass 23, count 0 2006.232.08:25:41.50#ibcon#about to write, iclass 23, count 0 2006.232.08:25:41.50#ibcon#wrote, iclass 23, count 0 2006.232.08:25:41.50#ibcon#about to read 3, iclass 23, count 0 2006.232.08:25:41.52#ibcon#read 3, iclass 23, count 0 2006.232.08:25:41.52#ibcon#about to read 4, iclass 23, count 0 2006.232.08:25:41.52#ibcon#read 4, iclass 23, count 0 2006.232.08:25:41.52#ibcon#about to read 5, iclass 23, count 0 2006.232.08:25:41.52#ibcon#read 5, iclass 23, count 0 2006.232.08:25:41.52#ibcon#about to read 6, iclass 23, count 0 2006.232.08:25:41.52#ibcon#read 6, iclass 23, count 0 2006.232.08:25:41.52#ibcon#end of sib2, iclass 23, count 0 2006.232.08:25:41.52#ibcon#*mode == 0, iclass 23, count 0 2006.232.08:25:41.52#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.232.08:25:41.52#ibcon#[27=USB\r\n] 2006.232.08:25:41.52#ibcon#*before write, iclass 23, count 0 2006.232.08:25:41.52#ibcon#enter sib2, iclass 23, count 0 2006.232.08:25:41.52#ibcon#flushed, iclass 23, count 0 2006.232.08:25:41.52#ibcon#about to write, iclass 23, count 0 2006.232.08:25:41.52#ibcon#wrote, iclass 23, count 0 2006.232.08:25:41.52#ibcon#about to read 3, iclass 23, count 0 2006.232.08:25:41.55#ibcon#read 3, iclass 23, count 0 2006.232.08:25:41.55#ibcon#about to read 4, iclass 23, count 0 2006.232.08:25:41.55#ibcon#read 4, iclass 23, count 0 2006.232.08:25:41.55#ibcon#about to read 5, iclass 23, count 0 2006.232.08:25:41.55#ibcon#read 5, iclass 23, count 0 2006.232.08:25:41.55#ibcon#about to read 6, iclass 23, count 0 2006.232.08:25:41.55#ibcon#read 6, iclass 23, count 0 2006.232.08:25:41.55#ibcon#end of sib2, iclass 23, count 0 2006.232.08:25:41.55#ibcon#*after write, iclass 23, count 0 2006.232.08:25:41.55#ibcon#*before return 0, iclass 23, count 0 2006.232.08:25:41.55#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.232.08:25:41.55#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.232.08:25:41.55#ibcon#about to clear, iclass 23 cls_cnt 0 2006.232.08:25:41.55#ibcon#cleared, iclass 23 cls_cnt 0 2006.232.08:25:41.55$vc4f8/vblo=4,712.99 2006.232.08:25:41.55#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.232.08:25:41.55#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.232.08:25:41.55#ibcon#ireg 17 cls_cnt 0 2006.232.08:25:41.55#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:25:41.55#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:25:41.55#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:25:41.55#ibcon#enter wrdev, iclass 25, count 0 2006.232.08:25:41.55#ibcon#first serial, iclass 25, count 0 2006.232.08:25:41.55#ibcon#enter sib2, iclass 25, count 0 2006.232.08:25:41.55#ibcon#flushed, iclass 25, count 0 2006.232.08:25:41.55#ibcon#about to write, iclass 25, count 0 2006.232.08:25:41.55#ibcon#wrote, iclass 25, count 0 2006.232.08:25:41.55#ibcon#about to read 3, iclass 25, count 0 2006.232.08:25:41.57#ibcon#read 3, iclass 25, count 0 2006.232.08:25:41.57#ibcon#about to read 4, iclass 25, count 0 2006.232.08:25:41.57#ibcon#read 4, iclass 25, count 0 2006.232.08:25:41.57#ibcon#about to read 5, iclass 25, count 0 2006.232.08:25:41.57#ibcon#read 5, iclass 25, count 0 2006.232.08:25:41.57#ibcon#about to read 6, iclass 25, count 0 2006.232.08:25:41.57#ibcon#read 6, iclass 25, count 0 2006.232.08:25:41.57#ibcon#end of sib2, iclass 25, count 0 2006.232.08:25:41.57#ibcon#*mode == 0, iclass 25, count 0 2006.232.08:25:41.57#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.232.08:25:41.57#ibcon#[28=FRQ=04,712.99\r\n] 2006.232.08:25:41.57#ibcon#*before write, iclass 25, count 0 2006.232.08:25:41.57#ibcon#enter sib2, iclass 25, count 0 2006.232.08:25:41.57#ibcon#flushed, iclass 25, count 0 2006.232.08:25:41.57#ibcon#about to write, iclass 25, count 0 2006.232.08:25:41.57#ibcon#wrote, iclass 25, count 0 2006.232.08:25:41.57#ibcon#about to read 3, iclass 25, count 0 2006.232.08:25:41.61#ibcon#read 3, iclass 25, count 0 2006.232.08:25:41.61#ibcon#about to read 4, iclass 25, count 0 2006.232.08:25:41.61#ibcon#read 4, iclass 25, count 0 2006.232.08:25:41.61#ibcon#about to read 5, iclass 25, count 0 2006.232.08:25:41.61#ibcon#read 5, iclass 25, count 0 2006.232.08:25:41.61#ibcon#about to read 6, iclass 25, count 0 2006.232.08:25:41.61#ibcon#read 6, iclass 25, count 0 2006.232.08:25:41.61#ibcon#end of sib2, iclass 25, count 0 2006.232.08:25:41.61#ibcon#*after write, iclass 25, count 0 2006.232.08:25:41.61#ibcon#*before return 0, iclass 25, count 0 2006.232.08:25:41.61#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:25:41.61#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.232.08:25:41.61#ibcon#about to clear, iclass 25 cls_cnt 0 2006.232.08:25:41.61#ibcon#cleared, iclass 25 cls_cnt 0 2006.232.08:25:41.61$vc4f8/vb=4,4 2006.232.08:25:41.61#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.232.08:25:41.61#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.232.08:25:41.61#ibcon#ireg 11 cls_cnt 2 2006.232.08:25:41.61#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:25:41.67#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:25:41.67#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:25:41.67#ibcon#enter wrdev, iclass 27, count 2 2006.232.08:25:41.67#ibcon#first serial, iclass 27, count 2 2006.232.08:25:41.67#ibcon#enter sib2, iclass 27, count 2 2006.232.08:25:41.67#ibcon#flushed, iclass 27, count 2 2006.232.08:25:41.67#ibcon#about to write, iclass 27, count 2 2006.232.08:25:41.67#ibcon#wrote, iclass 27, count 2 2006.232.08:25:41.67#ibcon#about to read 3, iclass 27, count 2 2006.232.08:25:41.69#ibcon#read 3, iclass 27, count 2 2006.232.08:25:41.69#ibcon#about to read 4, iclass 27, count 2 2006.232.08:25:41.69#ibcon#read 4, iclass 27, count 2 2006.232.08:25:41.69#ibcon#about to read 5, iclass 27, count 2 2006.232.08:25:41.69#ibcon#read 5, iclass 27, count 2 2006.232.08:25:41.69#ibcon#about to read 6, iclass 27, count 2 2006.232.08:25:41.69#ibcon#read 6, iclass 27, count 2 2006.232.08:25:41.69#ibcon#end of sib2, iclass 27, count 2 2006.232.08:25:41.69#ibcon#*mode == 0, iclass 27, count 2 2006.232.08:25:41.69#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.232.08:25:41.69#ibcon#[27=AT04-04\r\n] 2006.232.08:25:41.69#ibcon#*before write, iclass 27, count 2 2006.232.08:25:41.69#ibcon#enter sib2, iclass 27, count 2 2006.232.08:25:41.69#ibcon#flushed, iclass 27, count 2 2006.232.08:25:41.69#ibcon#about to write, iclass 27, count 2 2006.232.08:25:41.69#ibcon#wrote, iclass 27, count 2 2006.232.08:25:41.69#ibcon#about to read 3, iclass 27, count 2 2006.232.08:25:41.72#ibcon#read 3, iclass 27, count 2 2006.232.08:25:41.72#ibcon#about to read 4, iclass 27, count 2 2006.232.08:25:41.72#ibcon#read 4, iclass 27, count 2 2006.232.08:25:41.72#ibcon#about to read 5, iclass 27, count 2 2006.232.08:25:41.72#ibcon#read 5, iclass 27, count 2 2006.232.08:25:41.72#ibcon#about to read 6, iclass 27, count 2 2006.232.08:25:41.72#ibcon#read 6, iclass 27, count 2 2006.232.08:25:41.72#ibcon#end of sib2, iclass 27, count 2 2006.232.08:25:41.72#ibcon#*after write, iclass 27, count 2 2006.232.08:25:41.72#ibcon#*before return 0, iclass 27, count 2 2006.232.08:25:41.72#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:25:41.72#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.232.08:25:41.72#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.232.08:25:41.72#ibcon#ireg 7 cls_cnt 0 2006.232.08:25:41.72#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:25:41.84#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:25:41.84#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:25:41.84#ibcon#enter wrdev, iclass 27, count 0 2006.232.08:25:41.84#ibcon#first serial, iclass 27, count 0 2006.232.08:25:41.84#ibcon#enter sib2, iclass 27, count 0 2006.232.08:25:41.84#ibcon#flushed, iclass 27, count 0 2006.232.08:25:41.84#ibcon#about to write, iclass 27, count 0 2006.232.08:25:41.84#ibcon#wrote, iclass 27, count 0 2006.232.08:25:41.84#ibcon#about to read 3, iclass 27, count 0 2006.232.08:25:41.86#ibcon#read 3, iclass 27, count 0 2006.232.08:25:41.86#ibcon#about to read 4, iclass 27, count 0 2006.232.08:25:41.86#ibcon#read 4, iclass 27, count 0 2006.232.08:25:41.86#ibcon#about to read 5, iclass 27, count 0 2006.232.08:25:41.86#ibcon#read 5, iclass 27, count 0 2006.232.08:25:41.86#ibcon#about to read 6, iclass 27, count 0 2006.232.08:25:41.86#ibcon#read 6, iclass 27, count 0 2006.232.08:25:41.86#ibcon#end of sib2, iclass 27, count 0 2006.232.08:25:41.86#ibcon#*mode == 0, iclass 27, count 0 2006.232.08:25:41.86#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.232.08:25:41.86#ibcon#[27=USB\r\n] 2006.232.08:25:41.86#ibcon#*before write, iclass 27, count 0 2006.232.08:25:41.86#ibcon#enter sib2, iclass 27, count 0 2006.232.08:25:41.86#ibcon#flushed, iclass 27, count 0 2006.232.08:25:41.86#ibcon#about to write, iclass 27, count 0 2006.232.08:25:41.86#ibcon#wrote, iclass 27, count 0 2006.232.08:25:41.86#ibcon#about to read 3, iclass 27, count 0 2006.232.08:25:41.89#ibcon#read 3, iclass 27, count 0 2006.232.08:25:41.89#ibcon#about to read 4, iclass 27, count 0 2006.232.08:25:41.89#ibcon#read 4, iclass 27, count 0 2006.232.08:25:41.89#ibcon#about to read 5, iclass 27, count 0 2006.232.08:25:41.89#ibcon#read 5, iclass 27, count 0 2006.232.08:25:41.89#ibcon#about to read 6, iclass 27, count 0 2006.232.08:25:41.89#ibcon#read 6, iclass 27, count 0 2006.232.08:25:41.89#ibcon#end of sib2, iclass 27, count 0 2006.232.08:25:41.89#ibcon#*after write, iclass 27, count 0 2006.232.08:25:41.89#ibcon#*before return 0, iclass 27, count 0 2006.232.08:25:41.89#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:25:41.89#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.232.08:25:41.89#ibcon#about to clear, iclass 27 cls_cnt 0 2006.232.08:25:41.89#ibcon#cleared, iclass 27 cls_cnt 0 2006.232.08:25:41.89$vc4f8/vblo=5,744.99 2006.232.08:25:41.89#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.232.08:25:41.89#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.232.08:25:41.89#ibcon#ireg 17 cls_cnt 0 2006.232.08:25:41.89#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:25:41.89#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:25:41.89#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:25:41.89#ibcon#enter wrdev, iclass 29, count 0 2006.232.08:25:41.89#ibcon#first serial, iclass 29, count 0 2006.232.08:25:41.89#ibcon#enter sib2, iclass 29, count 0 2006.232.08:25:41.89#ibcon#flushed, iclass 29, count 0 2006.232.08:25:41.89#ibcon#about to write, iclass 29, count 0 2006.232.08:25:41.89#ibcon#wrote, iclass 29, count 0 2006.232.08:25:41.89#ibcon#about to read 3, iclass 29, count 0 2006.232.08:25:41.91#ibcon#read 3, iclass 29, count 0 2006.232.08:25:41.91#ibcon#about to read 4, iclass 29, count 0 2006.232.08:25:41.91#ibcon#read 4, iclass 29, count 0 2006.232.08:25:41.91#ibcon#about to read 5, iclass 29, count 0 2006.232.08:25:41.91#ibcon#read 5, iclass 29, count 0 2006.232.08:25:41.91#ibcon#about to read 6, iclass 29, count 0 2006.232.08:25:41.91#ibcon#read 6, iclass 29, count 0 2006.232.08:25:41.91#ibcon#end of sib2, iclass 29, count 0 2006.232.08:25:41.91#ibcon#*mode == 0, iclass 29, count 0 2006.232.08:25:41.91#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.232.08:25:41.91#ibcon#[28=FRQ=05,744.99\r\n] 2006.232.08:25:41.91#ibcon#*before write, iclass 29, count 0 2006.232.08:25:41.91#ibcon#enter sib2, iclass 29, count 0 2006.232.08:25:41.91#ibcon#flushed, iclass 29, count 0 2006.232.08:25:41.91#ibcon#about to write, iclass 29, count 0 2006.232.08:25:41.91#ibcon#wrote, iclass 29, count 0 2006.232.08:25:41.91#ibcon#about to read 3, iclass 29, count 0 2006.232.08:25:41.95#ibcon#read 3, iclass 29, count 0 2006.232.08:25:41.95#ibcon#about to read 4, iclass 29, count 0 2006.232.08:25:41.95#ibcon#read 4, iclass 29, count 0 2006.232.08:25:41.95#ibcon#about to read 5, iclass 29, count 0 2006.232.08:25:41.95#ibcon#read 5, iclass 29, count 0 2006.232.08:25:41.95#ibcon#about to read 6, iclass 29, count 0 2006.232.08:25:41.95#ibcon#read 6, iclass 29, count 0 2006.232.08:25:41.95#ibcon#end of sib2, iclass 29, count 0 2006.232.08:25:41.95#ibcon#*after write, iclass 29, count 0 2006.232.08:25:41.95#ibcon#*before return 0, iclass 29, count 0 2006.232.08:25:41.95#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:25:41.95#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.232.08:25:41.95#ibcon#about to clear, iclass 29 cls_cnt 0 2006.232.08:25:41.95#ibcon#cleared, iclass 29 cls_cnt 0 2006.232.08:25:41.95$vc4f8/vb=5,3 2006.232.08:25:41.95#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.232.08:25:41.95#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.232.08:25:41.95#ibcon#ireg 11 cls_cnt 2 2006.232.08:25:41.95#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.232.08:25:42.01#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.232.08:25:42.01#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.232.08:25:42.01#ibcon#enter wrdev, iclass 31, count 2 2006.232.08:25:42.01#ibcon#first serial, iclass 31, count 2 2006.232.08:25:42.01#ibcon#enter sib2, iclass 31, count 2 2006.232.08:25:42.01#ibcon#flushed, iclass 31, count 2 2006.232.08:25:42.01#ibcon#about to write, iclass 31, count 2 2006.232.08:25:42.01#ibcon#wrote, iclass 31, count 2 2006.232.08:25:42.01#ibcon#about to read 3, iclass 31, count 2 2006.232.08:25:42.03#ibcon#read 3, iclass 31, count 2 2006.232.08:25:42.03#ibcon#about to read 4, iclass 31, count 2 2006.232.08:25:42.03#ibcon#read 4, iclass 31, count 2 2006.232.08:25:42.03#ibcon#about to read 5, iclass 31, count 2 2006.232.08:25:42.03#ibcon#read 5, iclass 31, count 2 2006.232.08:25:42.03#ibcon#about to read 6, iclass 31, count 2 2006.232.08:25:42.03#ibcon#read 6, iclass 31, count 2 2006.232.08:25:42.03#ibcon#end of sib2, iclass 31, count 2 2006.232.08:25:42.03#ibcon#*mode == 0, iclass 31, count 2 2006.232.08:25:42.03#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.232.08:25:42.03#ibcon#[27=AT05-03\r\n] 2006.232.08:25:42.03#ibcon#*before write, iclass 31, count 2 2006.232.08:25:42.03#ibcon#enter sib2, iclass 31, count 2 2006.232.08:25:42.03#ibcon#flushed, iclass 31, count 2 2006.232.08:25:42.03#ibcon#about to write, iclass 31, count 2 2006.232.08:25:42.03#ibcon#wrote, iclass 31, count 2 2006.232.08:25:42.03#ibcon#about to read 3, iclass 31, count 2 2006.232.08:25:42.06#ibcon#read 3, iclass 31, count 2 2006.232.08:25:42.06#ibcon#about to read 4, iclass 31, count 2 2006.232.08:25:42.06#ibcon#read 4, iclass 31, count 2 2006.232.08:25:42.06#ibcon#about to read 5, iclass 31, count 2 2006.232.08:25:42.06#ibcon#read 5, iclass 31, count 2 2006.232.08:25:42.06#ibcon#about to read 6, iclass 31, count 2 2006.232.08:25:42.06#ibcon#read 6, iclass 31, count 2 2006.232.08:25:42.06#ibcon#end of sib2, iclass 31, count 2 2006.232.08:25:42.06#ibcon#*after write, iclass 31, count 2 2006.232.08:25:42.06#ibcon#*before return 0, iclass 31, count 2 2006.232.08:25:42.06#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.232.08:25:42.06#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.232.08:25:42.06#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.232.08:25:42.06#ibcon#ireg 7 cls_cnt 0 2006.232.08:25:42.06#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.232.08:25:42.18#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.232.08:25:42.18#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.232.08:25:42.18#ibcon#enter wrdev, iclass 31, count 0 2006.232.08:25:42.18#ibcon#first serial, iclass 31, count 0 2006.232.08:25:42.18#ibcon#enter sib2, iclass 31, count 0 2006.232.08:25:42.18#ibcon#flushed, iclass 31, count 0 2006.232.08:25:42.18#ibcon#about to write, iclass 31, count 0 2006.232.08:25:42.18#ibcon#wrote, iclass 31, count 0 2006.232.08:25:42.18#ibcon#about to read 3, iclass 31, count 0 2006.232.08:25:42.20#ibcon#read 3, iclass 31, count 0 2006.232.08:25:42.20#ibcon#about to read 4, iclass 31, count 0 2006.232.08:25:42.20#ibcon#read 4, iclass 31, count 0 2006.232.08:25:42.20#ibcon#about to read 5, iclass 31, count 0 2006.232.08:25:42.20#ibcon#read 5, iclass 31, count 0 2006.232.08:25:42.20#ibcon#about to read 6, iclass 31, count 0 2006.232.08:25:42.20#ibcon#read 6, iclass 31, count 0 2006.232.08:25:42.20#ibcon#end of sib2, iclass 31, count 0 2006.232.08:25:42.20#ibcon#*mode == 0, iclass 31, count 0 2006.232.08:25:42.20#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.232.08:25:42.20#ibcon#[27=USB\r\n] 2006.232.08:25:42.20#ibcon#*before write, iclass 31, count 0 2006.232.08:25:42.20#ibcon#enter sib2, iclass 31, count 0 2006.232.08:25:42.20#ibcon#flushed, iclass 31, count 0 2006.232.08:25:42.20#ibcon#about to write, iclass 31, count 0 2006.232.08:25:42.20#ibcon#wrote, iclass 31, count 0 2006.232.08:25:42.20#ibcon#about to read 3, iclass 31, count 0 2006.232.08:25:42.23#ibcon#read 3, iclass 31, count 0 2006.232.08:25:42.23#ibcon#about to read 4, iclass 31, count 0 2006.232.08:25:42.23#ibcon#read 4, iclass 31, count 0 2006.232.08:25:42.23#ibcon#about to read 5, iclass 31, count 0 2006.232.08:25:42.23#ibcon#read 5, iclass 31, count 0 2006.232.08:25:42.23#ibcon#about to read 6, iclass 31, count 0 2006.232.08:25:42.23#ibcon#read 6, iclass 31, count 0 2006.232.08:25:42.23#ibcon#end of sib2, iclass 31, count 0 2006.232.08:25:42.23#ibcon#*after write, iclass 31, count 0 2006.232.08:25:42.23#ibcon#*before return 0, iclass 31, count 0 2006.232.08:25:42.23#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.232.08:25:42.23#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.232.08:25:42.23#ibcon#about to clear, iclass 31 cls_cnt 0 2006.232.08:25:42.23#ibcon#cleared, iclass 31 cls_cnt 0 2006.232.08:25:42.23$vc4f8/vblo=6,752.99 2006.232.08:25:42.23#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.232.08:25:42.23#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.232.08:25:42.23#ibcon#ireg 17 cls_cnt 0 2006.232.08:25:42.23#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.232.08:25:42.23#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.232.08:25:42.23#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.232.08:25:42.23#ibcon#enter wrdev, iclass 33, count 0 2006.232.08:25:42.23#ibcon#first serial, iclass 33, count 0 2006.232.08:25:42.23#ibcon#enter sib2, iclass 33, count 0 2006.232.08:25:42.23#ibcon#flushed, iclass 33, count 0 2006.232.08:25:42.23#ibcon#about to write, iclass 33, count 0 2006.232.08:25:42.23#ibcon#wrote, iclass 33, count 0 2006.232.08:25:42.23#ibcon#about to read 3, iclass 33, count 0 2006.232.08:25:42.25#ibcon#read 3, iclass 33, count 0 2006.232.08:25:42.25#ibcon#about to read 4, iclass 33, count 0 2006.232.08:25:42.25#ibcon#read 4, iclass 33, count 0 2006.232.08:25:42.25#ibcon#about to read 5, iclass 33, count 0 2006.232.08:25:42.25#ibcon#read 5, iclass 33, count 0 2006.232.08:25:42.25#ibcon#about to read 6, iclass 33, count 0 2006.232.08:25:42.25#ibcon#read 6, iclass 33, count 0 2006.232.08:25:42.25#ibcon#end of sib2, iclass 33, count 0 2006.232.08:25:42.25#ibcon#*mode == 0, iclass 33, count 0 2006.232.08:25:42.25#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.232.08:25:42.25#ibcon#[28=FRQ=06,752.99\r\n] 2006.232.08:25:42.25#ibcon#*before write, iclass 33, count 0 2006.232.08:25:42.25#ibcon#enter sib2, iclass 33, count 0 2006.232.08:25:42.25#ibcon#flushed, iclass 33, count 0 2006.232.08:25:42.25#ibcon#about to write, iclass 33, count 0 2006.232.08:25:42.25#ibcon#wrote, iclass 33, count 0 2006.232.08:25:42.25#ibcon#about to read 3, iclass 33, count 0 2006.232.08:25:42.29#ibcon#read 3, iclass 33, count 0 2006.232.08:25:42.29#ibcon#about to read 4, iclass 33, count 0 2006.232.08:25:42.29#ibcon#read 4, iclass 33, count 0 2006.232.08:25:42.29#ibcon#about to read 5, iclass 33, count 0 2006.232.08:25:42.29#ibcon#read 5, iclass 33, count 0 2006.232.08:25:42.29#ibcon#about to read 6, iclass 33, count 0 2006.232.08:25:42.29#ibcon#read 6, iclass 33, count 0 2006.232.08:25:42.29#ibcon#end of sib2, iclass 33, count 0 2006.232.08:25:42.29#ibcon#*after write, iclass 33, count 0 2006.232.08:25:42.29#ibcon#*before return 0, iclass 33, count 0 2006.232.08:25:42.29#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.232.08:25:42.29#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.232.08:25:42.29#ibcon#about to clear, iclass 33 cls_cnt 0 2006.232.08:25:42.29#ibcon#cleared, iclass 33 cls_cnt 0 2006.232.08:25:42.29$vc4f8/vb=6,4 2006.232.08:25:42.29#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.232.08:25:42.29#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.232.08:25:42.29#ibcon#ireg 11 cls_cnt 2 2006.232.08:25:42.29#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.232.08:25:42.35#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.232.08:25:42.35#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.232.08:25:42.35#ibcon#enter wrdev, iclass 35, count 2 2006.232.08:25:42.35#ibcon#first serial, iclass 35, count 2 2006.232.08:25:42.35#ibcon#enter sib2, iclass 35, count 2 2006.232.08:25:42.35#ibcon#flushed, iclass 35, count 2 2006.232.08:25:42.35#ibcon#about to write, iclass 35, count 2 2006.232.08:25:42.35#ibcon#wrote, iclass 35, count 2 2006.232.08:25:42.35#ibcon#about to read 3, iclass 35, count 2 2006.232.08:25:42.37#ibcon#read 3, iclass 35, count 2 2006.232.08:25:42.37#ibcon#about to read 4, iclass 35, count 2 2006.232.08:25:42.37#ibcon#read 4, iclass 35, count 2 2006.232.08:25:42.37#ibcon#about to read 5, iclass 35, count 2 2006.232.08:25:42.37#ibcon#read 5, iclass 35, count 2 2006.232.08:25:42.37#ibcon#about to read 6, iclass 35, count 2 2006.232.08:25:42.37#ibcon#read 6, iclass 35, count 2 2006.232.08:25:42.37#ibcon#end of sib2, iclass 35, count 2 2006.232.08:25:42.37#ibcon#*mode == 0, iclass 35, count 2 2006.232.08:25:42.37#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.232.08:25:42.37#ibcon#[27=AT06-04\r\n] 2006.232.08:25:42.37#ibcon#*before write, iclass 35, count 2 2006.232.08:25:42.37#ibcon#enter sib2, iclass 35, count 2 2006.232.08:25:42.37#ibcon#flushed, iclass 35, count 2 2006.232.08:25:42.37#ibcon#about to write, iclass 35, count 2 2006.232.08:25:42.37#ibcon#wrote, iclass 35, count 2 2006.232.08:25:42.37#ibcon#about to read 3, iclass 35, count 2 2006.232.08:25:42.40#ibcon#read 3, iclass 35, count 2 2006.232.08:25:42.40#ibcon#about to read 4, iclass 35, count 2 2006.232.08:25:42.40#ibcon#read 4, iclass 35, count 2 2006.232.08:25:42.40#ibcon#about to read 5, iclass 35, count 2 2006.232.08:25:42.40#ibcon#read 5, iclass 35, count 2 2006.232.08:25:42.40#ibcon#about to read 6, iclass 35, count 2 2006.232.08:25:42.40#ibcon#read 6, iclass 35, count 2 2006.232.08:25:42.40#ibcon#end of sib2, iclass 35, count 2 2006.232.08:25:42.40#ibcon#*after write, iclass 35, count 2 2006.232.08:25:42.40#ibcon#*before return 0, iclass 35, count 2 2006.232.08:25:42.40#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.232.08:25:42.40#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.232.08:25:42.40#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.232.08:25:42.40#ibcon#ireg 7 cls_cnt 0 2006.232.08:25:42.40#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.232.08:25:42.50#abcon#<5=/05 3.2 6.3 29.12 901007.4\r\n> 2006.232.08:25:42.52#abcon#{5=INTERFACE CLEAR} 2006.232.08:25:42.52#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.232.08:25:42.52#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.232.08:25:42.52#ibcon#enter wrdev, iclass 35, count 0 2006.232.08:25:42.52#ibcon#first serial, iclass 35, count 0 2006.232.08:25:42.52#ibcon#enter sib2, iclass 35, count 0 2006.232.08:25:42.52#ibcon#flushed, iclass 35, count 0 2006.232.08:25:42.52#ibcon#about to write, iclass 35, count 0 2006.232.08:25:42.52#ibcon#wrote, iclass 35, count 0 2006.232.08:25:42.52#ibcon#about to read 3, iclass 35, count 0 2006.232.08:25:42.54#ibcon#read 3, iclass 35, count 0 2006.232.08:25:42.54#ibcon#about to read 4, iclass 35, count 0 2006.232.08:25:42.54#ibcon#read 4, iclass 35, count 0 2006.232.08:25:42.54#ibcon#about to read 5, iclass 35, count 0 2006.232.08:25:42.54#ibcon#read 5, iclass 35, count 0 2006.232.08:25:42.54#ibcon#about to read 6, iclass 35, count 0 2006.232.08:25:42.54#ibcon#read 6, iclass 35, count 0 2006.232.08:25:42.54#ibcon#end of sib2, iclass 35, count 0 2006.232.08:25:42.54#ibcon#*mode == 0, iclass 35, count 0 2006.232.08:25:42.54#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.232.08:25:42.54#ibcon#[27=USB\r\n] 2006.232.08:25:42.54#ibcon#*before write, iclass 35, count 0 2006.232.08:25:42.54#ibcon#enter sib2, iclass 35, count 0 2006.232.08:25:42.54#ibcon#flushed, iclass 35, count 0 2006.232.08:25:42.54#ibcon#about to write, iclass 35, count 0 2006.232.08:25:42.54#ibcon#wrote, iclass 35, count 0 2006.232.08:25:42.54#ibcon#about to read 3, iclass 35, count 0 2006.232.08:25:42.57#ibcon#read 3, iclass 35, count 0 2006.232.08:25:42.57#ibcon#about to read 4, iclass 35, count 0 2006.232.08:25:42.57#ibcon#read 4, iclass 35, count 0 2006.232.08:25:42.57#ibcon#about to read 5, iclass 35, count 0 2006.232.08:25:42.57#ibcon#read 5, iclass 35, count 0 2006.232.08:25:42.57#ibcon#about to read 6, iclass 35, count 0 2006.232.08:25:42.57#ibcon#read 6, iclass 35, count 0 2006.232.08:25:42.57#ibcon#end of sib2, iclass 35, count 0 2006.232.08:25:42.57#ibcon#*after write, iclass 35, count 0 2006.232.08:25:42.57#ibcon#*before return 0, iclass 35, count 0 2006.232.08:25:42.57#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.232.08:25:42.57#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.232.08:25:42.57#ibcon#about to clear, iclass 35 cls_cnt 0 2006.232.08:25:42.57#ibcon#cleared, iclass 35 cls_cnt 0 2006.232.08:25:42.57$vc4f8/vabw=wide 2006.232.08:25:42.57#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.232.08:25:42.57#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.232.08:25:42.57#ibcon#ireg 8 cls_cnt 0 2006.232.08:25:42.57#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:25:42.57#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:25:42.57#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:25:42.57#ibcon#enter wrdev, iclass 3, count 0 2006.232.08:25:42.57#ibcon#first serial, iclass 3, count 0 2006.232.08:25:42.57#ibcon#enter sib2, iclass 3, count 0 2006.232.08:25:42.57#ibcon#flushed, iclass 3, count 0 2006.232.08:25:42.57#ibcon#about to write, iclass 3, count 0 2006.232.08:25:42.57#ibcon#wrote, iclass 3, count 0 2006.232.08:25:42.57#ibcon#about to read 3, iclass 3, count 0 2006.232.08:25:42.58#abcon#[5=S1D000X0/0*\r\n] 2006.232.08:25:42.59#ibcon#read 3, iclass 3, count 0 2006.232.08:25:42.59#ibcon#about to read 4, iclass 3, count 0 2006.232.08:25:42.59#ibcon#read 4, iclass 3, count 0 2006.232.08:25:42.59#ibcon#about to read 5, iclass 3, count 0 2006.232.08:25:42.59#ibcon#read 5, iclass 3, count 0 2006.232.08:25:42.59#ibcon#about to read 6, iclass 3, count 0 2006.232.08:25:42.59#ibcon#read 6, iclass 3, count 0 2006.232.08:25:42.59#ibcon#end of sib2, iclass 3, count 0 2006.232.08:25:42.59#ibcon#*mode == 0, iclass 3, count 0 2006.232.08:25:42.59#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.232.08:25:42.59#ibcon#[25=BW32\r\n] 2006.232.08:25:42.59#ibcon#*before write, iclass 3, count 0 2006.232.08:25:42.59#ibcon#enter sib2, iclass 3, count 0 2006.232.08:25:42.59#ibcon#flushed, iclass 3, count 0 2006.232.08:25:42.59#ibcon#about to write, iclass 3, count 0 2006.232.08:25:42.59#ibcon#wrote, iclass 3, count 0 2006.232.08:25:42.59#ibcon#about to read 3, iclass 3, count 0 2006.232.08:25:42.62#ibcon#read 3, iclass 3, count 0 2006.232.08:25:42.62#ibcon#about to read 4, iclass 3, count 0 2006.232.08:25:42.62#ibcon#read 4, iclass 3, count 0 2006.232.08:25:42.62#ibcon#about to read 5, iclass 3, count 0 2006.232.08:25:42.62#ibcon#read 5, iclass 3, count 0 2006.232.08:25:42.62#ibcon#about to read 6, iclass 3, count 0 2006.232.08:25:42.62#ibcon#read 6, iclass 3, count 0 2006.232.08:25:42.62#ibcon#end of sib2, iclass 3, count 0 2006.232.08:25:42.62#ibcon#*after write, iclass 3, count 0 2006.232.08:25:42.62#ibcon#*before return 0, iclass 3, count 0 2006.232.08:25:42.62#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:25:42.62#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.232.08:25:42.62#ibcon#about to clear, iclass 3 cls_cnt 0 2006.232.08:25:42.62#ibcon#cleared, iclass 3 cls_cnt 0 2006.232.08:25:42.62$vc4f8/vbbw=wide 2006.232.08:25:42.62#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.232.08:25:42.62#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.232.08:25:42.62#ibcon#ireg 8 cls_cnt 0 2006.232.08:25:42.62#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.232.08:25:42.69#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.232.08:25:42.69#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.232.08:25:42.69#ibcon#enter wrdev, iclass 5, count 0 2006.232.08:25:42.69#ibcon#first serial, iclass 5, count 0 2006.232.08:25:42.69#ibcon#enter sib2, iclass 5, count 0 2006.232.08:25:42.69#ibcon#flushed, iclass 5, count 0 2006.232.08:25:42.69#ibcon#about to write, iclass 5, count 0 2006.232.08:25:42.69#ibcon#wrote, iclass 5, count 0 2006.232.08:25:42.69#ibcon#about to read 3, iclass 5, count 0 2006.232.08:25:42.72#ibcon#read 3, iclass 5, count 0 2006.232.08:25:42.72#ibcon#about to read 4, iclass 5, count 0 2006.232.08:25:42.72#ibcon#read 4, iclass 5, count 0 2006.232.08:25:42.72#ibcon#about to read 5, iclass 5, count 0 2006.232.08:25:42.72#ibcon#read 5, iclass 5, count 0 2006.232.08:25:42.72#ibcon#about to read 6, iclass 5, count 0 2006.232.08:25:42.72#ibcon#read 6, iclass 5, count 0 2006.232.08:25:42.72#ibcon#end of sib2, iclass 5, count 0 2006.232.08:25:42.72#ibcon#*mode == 0, iclass 5, count 0 2006.232.08:25:42.72#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.232.08:25:42.72#ibcon#[27=BW32\r\n] 2006.232.08:25:42.72#ibcon#*before write, iclass 5, count 0 2006.232.08:25:42.72#ibcon#enter sib2, iclass 5, count 0 2006.232.08:25:42.72#ibcon#flushed, iclass 5, count 0 2006.232.08:25:42.72#ibcon#about to write, iclass 5, count 0 2006.232.08:25:42.72#ibcon#wrote, iclass 5, count 0 2006.232.08:25:42.72#ibcon#about to read 3, iclass 5, count 0 2006.232.08:25:42.75#ibcon#read 3, iclass 5, count 0 2006.232.08:25:42.75#ibcon#about to read 4, iclass 5, count 0 2006.232.08:25:42.75#ibcon#read 4, iclass 5, count 0 2006.232.08:25:42.75#ibcon#about to read 5, iclass 5, count 0 2006.232.08:25:42.75#ibcon#read 5, iclass 5, count 0 2006.232.08:25:42.75#ibcon#about to read 6, iclass 5, count 0 2006.232.08:25:42.75#ibcon#read 6, iclass 5, count 0 2006.232.08:25:42.75#ibcon#end of sib2, iclass 5, count 0 2006.232.08:25:42.75#ibcon#*after write, iclass 5, count 0 2006.232.08:25:42.75#ibcon#*before return 0, iclass 5, count 0 2006.232.08:25:42.75#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.232.08:25:42.75#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.232.08:25:42.75#ibcon#about to clear, iclass 5 cls_cnt 0 2006.232.08:25:42.75#ibcon#cleared, iclass 5 cls_cnt 0 2006.232.08:25:42.75$4f8m12a/ifd4f 2006.232.08:25:42.75$ifd4f/lo= 2006.232.08:25:42.75$ifd4f/lo=lo1,7680.00,usb,rcp,1 2006.232.08:25:42.75$ifd4f/lo=lo2,1600.00,usb,rcp,1 2006.232.08:25:42.75$ifd4f/lo=lo3,8080.00,usb,rcp,1 2006.232.08:25:42.75$ifd4f/patch= 2006.232.08:25:42.75$ifd4f/patch=lo1,a1,a2,a3,a4 2006.232.08:25:42.75$ifd4f/patch=lo2,b1,b2,b3,b4,b5,b6 2006.232.08:25:42.75$ifd4f/patch=lo3,a5,a6,a7,a8 2006.232.08:25:42.75$4f8m12a/"form=m,16.000,1:2 2006.232.08:25:42.75$4f8m12a/"tpicd 2006.232.08:25:42.75$4f8m12a/echo=off 2006.232.08:25:42.75$4f8m12a/xlog=off 2006.232.08:25:42.75:!2006.232.08:26:10 2006.232.08:25:54.14#trakl#Source acquired 2006.232.08:25:55.14#flagr#flagr/antenna,acquired 2006.232.08:26:10.00:preob 2006.232.08:26:11.14/onsource/TRACKING 2006.232.08:26:11.14:!2006.232.08:26:20 2006.232.08:26:20.00:data_valid=on 2006.232.08:26:20.00:midob 2006.232.08:26:20.14/onsource/TRACKING 2006.232.08:26:20.14/wx/29.11,1007.4,90 2006.232.08:26:20.26/cable/+6.3873E-03 2006.232.08:26:21.35/va/01,08,usb,yes,31,32 2006.232.08:26:21.35/va/02,07,usb,yes,31,33 2006.232.08:26:21.35/va/03,08,usb,yes,23,23 2006.232.08:26:21.35/va/04,07,usb,yes,32,35 2006.232.08:26:21.35/va/05,07,usb,yes,37,39 2006.232.08:26:21.35/va/06,06,usb,yes,36,36 2006.232.08:26:21.35/va/07,06,usb,yes,37,37 2006.232.08:26:21.35/va/08,06,usb,yes,39,39 2006.232.08:26:21.58/valo/01,532.99,yes,locked 2006.232.08:26:21.58/valo/02,572.99,yes,locked 2006.232.08:26:21.58/valo/03,672.99,yes,locked 2006.232.08:26:21.58/valo/04,832.99,yes,locked 2006.232.08:26:21.58/valo/05,652.99,yes,locked 2006.232.08:26:21.58/valo/06,772.99,yes,locked 2006.232.08:26:21.58/valo/07,832.99,yes,locked 2006.232.08:26:21.58/valo/08,852.99,yes,locked 2006.232.08:26:22.67/vb/01,04,usb,yes,31,30 2006.232.08:26:22.67/vb/02,04,usb,yes,33,34 2006.232.08:26:22.67/vb/03,04,usb,yes,29,33 2006.232.08:26:22.67/vb/04,04,usb,yes,30,30 2006.232.08:26:22.67/vb/05,03,usb,yes,36,40 2006.232.08:26:22.67/vb/06,04,usb,yes,29,32 2006.232.08:26:22.67/vb/07,04,usb,yes,32,32 2006.232.08:26:22.67/vb/08,04,usb,yes,29,33 2006.232.08:26:22.90/vblo/01,632.99,yes,locked 2006.232.08:26:22.90/vblo/02,640.99,yes,locked 2006.232.08:26:22.90/vblo/03,656.99,yes,locked 2006.232.08:26:22.90/vblo/04,712.99,yes,locked 2006.232.08:26:22.90/vblo/05,744.99,yes,locked 2006.232.08:26:22.90/vblo/06,752.99,yes,locked 2006.232.08:26:22.90/vblo/07,734.99,yes,locked 2006.232.08:26:22.90/vblo/08,744.99,yes,locked 2006.232.08:26:23.05/vabw/8 2006.232.08:26:23.20/vbbw/8 2006.232.08:26:23.29/xfe/off,on,14.0 2006.232.08:26:23.71/ifatt/23,28,28,28 2006.232.08:26:24.07/fmout-gps/S +4.62E-07 2006.232.08:26:24.11:!2006.232.08:27:20 2006.232.08:27:20.00:data_valid=off 2006.232.08:27:20.01:postob 2006.232.08:27:20.17/cable/+6.3865E-03 2006.232.08:27:20.17/wx/29.09,1007.4,90 2006.232.08:27:21.07/fmout-gps/S +4.62E-07 2006.232.08:27:21.07:checkk5last 2006.232.08:27:21.08&checkk5last/chk_obsdata=1 2006.232.08:27:21.08&checkk5last/chk_obsdata=2 2006.232.08:27:21.08&checkk5last/chk_obsdata=3 2006.232.08:27:21.09&checkk5last/chk_obsdata=4 2006.232.08:27:21.09&checkk5last/k5log=1 2006.232.08:27:21.09&checkk5last/k5log=2 2006.232.08:27:21.10&checkk5last/k5log=3 2006.232.08:27:21.10&checkk5last/k5log=4 2006.232.08:27:21.10&checkk5last/obsinfo 2006.232.08:27:21.49/chk_obsdata//k5ts1/T2320826??a.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.08:27:21.86/chk_obsdata//k5ts2/T2320826??b.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.08:27:22.23/chk_obsdata//k5ts3/T2320826??c.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.08:27:22.60/chk_obsdata//k5ts4/T2320826??d.dat file size is correct (nominal:480MB, actual:472MB). 2006.232.08:27:23.29/k5log//k5ts1_log_newline 2006.232.08:27:23.97/k5log//k5ts2_log_newline 2006.232.08:27:24.66/k5log//k5ts3_log_newline 2006.232.08:27:25.35/k5log//k5ts4_log_newline 2006.232.08:27:25.37/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.232.08:27:25.37:sched_end 2006.232.08:27:25.37&sched_end/stopcheck 2006.232.08:27:25.37&stopcheck/sy=killall check_fsrun.pl 2006.232.08:27:25.37&stopcheck/" sy=killall chmem.sh 2006.232.08:27:25.46:source=idle 2006.232.08:27:26.14#flagr#flagr/antenna,new-source 2006.232.08:27:26.15:stow 2006.232.08:27:26.15&stow/source=idle 2006.232.08:27:26.15&stow/"this is stow command. 2006.232.08:27:26.16&stow/antenna=m3 2006.232.08:27:30.01:!+10m 2006.232.08:37:30.03:standby 2006.232.08:37:30.03&standby/"this is standby command. 2006.232.08:37:30.04&standby/antenna=m0 2006.232.08:37:31.01:checkk5hdd 2006.232.08:37:31.01&checkk5hdd/chk_hdd=1 2006.232.08:37:31.02&checkk5hdd/chk_hdd=2 2006.232.08:37:31.02&checkk5hdd/chk_hdd=3 2006.232.08:37:31.02&checkk5hdd/chk_hdd=4 2006.232.08:37:33.85/chk_hdd//k5ts1/GSI00275:T232073000a.dat~T232082620a.dat[12937396224Byte] 2006.232.08:37:36.67/chk_hdd//k5ts2/GSI00163:T232073000b.dat~T232082620b.dat[12937396224Byte] 2006.232.08:37:39.49/chk_hdd//k5ts3/GSI00278:T232073000c.dat~T232082620c.dat[12937396224Byte] 2006.232.08:37:42.30/chk_hdd//k5ts4/GSI00141:T232073000d.dat~T232082620d.dat[12937396224Byte] 2006.232.08:37:42.30:sy=cp /usr2/log/k06232ts.log /usr2/log_backup/ 2006.232.08:37:42.38:*end of schedule